1 /* QLogic qede NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
11 #include <linux/compiler.h>
12 #include <linux/version.h>
13 #include <linux/workqueue.h>
14 #include <linux/netdevice.h>
15 #include <linux/interrupt.h>
16 #include <linux/bitmap.h>
17 #include <linux/kernel.h>
18 #include <linux/mutex.h>
20 #include <linux/qed/common_hsi.h>
21 #include <linux/qed/eth_common.h>
22 #include <linux/qed/qed_if.h>
23 #include <linux/qed/qed_chain.h>
24 #include <linux/qed/qed_eth_if.h>
26 #define QEDE_MAJOR_VERSION 8
27 #define QEDE_MINOR_VERSION 10
28 #define QEDE_REVISION_VERSION 9
29 #define QEDE_ENGINEERING_VERSION 20
30 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \
31 __stringify(QEDE_MINOR_VERSION) "." \
32 __stringify(QEDE_REVISION_VERSION) "." \
33 __stringify(QEDE_ENGINEERING_VERSION)
35 #define DRV_MODULE_SYM qede
39 u64 packet_too_big_discard
;
47 u64 mftag_filter_discards
;
48 u64 mac_filter_discards
;
58 u64 coalesced_aborts_num
;
59 u64 non_coalesced_pkts
;
63 u64 rx_64_byte_packets
;
64 u64 rx_65_to_127_byte_packets
;
65 u64 rx_128_to_255_byte_packets
;
66 u64 rx_256_to_511_byte_packets
;
67 u64 rx_512_to_1023_byte_packets
;
68 u64 rx_1024_to_1518_byte_packets
;
69 u64 rx_1519_to_1522_byte_packets
;
70 u64 rx_1519_to_2047_byte_packets
;
71 u64 rx_2048_to_4095_byte_packets
;
72 u64 rx_4096_to_9216_byte_packets
;
73 u64 rx_9217_to_16383_byte_packets
;
75 u64 rx_mac_crtl_frames
;
79 u64 rx_carrier_errors
;
80 u64 rx_oversize_packets
;
82 u64 rx_undersize_packets
;
84 u64 tx_64_byte_packets
;
85 u64 tx_65_to_127_byte_packets
;
86 u64 tx_128_to_255_byte_packets
;
87 u64 tx_256_to_511_byte_packets
;
88 u64 tx_512_to_1023_byte_packets
;
89 u64 tx_1024_to_1518_byte_packets
;
90 u64 tx_1519_to_2047_byte_packets
;
91 u64 tx_2048_to_4095_byte_packets
;
92 u64 tx_4096_to_9216_byte_packets
;
93 u64 tx_9217_to_16383_byte_packets
;
96 u64 tx_lpi_entry_count
;
97 u64 tx_total_collisions
;
100 u64 tx_mac_ctrl_frames
;
104 struct list_head list
;
110 struct qed_dev
*cdev
;
111 struct net_device
*ndev
;
112 struct pci_dev
*pdev
;
118 #define QEDE_FLAG_IS_VF BIT(0)
119 #define IS_VF(edev) (!!((edev)->flags & QEDE_FLAG_IS_VF))
121 const struct qed_eth_ops
*ops
;
123 struct qed_dev_eth_info dev_info
;
124 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
125 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues * \
126 (edev)->dev_info.num_tc)
128 struct qede_fastpath
*fp_array
;
136 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues)
137 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx)
138 #define QEDE_TSS_COUNT(edev) (((edev)->num_queues - (edev)->fp_num_rx) * \
140 #define QEDE_TX_IDX(edev, txqidx) ((edev)->fp_num_rx + (txqidx) % \
141 QEDE_TSS_COUNT(edev))
142 #define QEDE_TC_IDX(edev, txqidx) ((txqidx) / QEDE_TSS_COUNT(edev))
143 #define QEDE_TX_QUEUE(edev, txqidx) \
144 (&(edev)->fp_array[QEDE_TX_IDX((edev), (txqidx))].txqs[QEDE_TC_IDX(\
147 struct qed_int_info int_info
;
148 unsigned char primary_mac
[ETH_ALEN
];
150 /* Smaller private varaiant of the RTNL lock */
151 struct mutex qede_lock
;
152 u32 state
; /* Protected by qede_lock */
156 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
157 #define ETH_OVERHEAD (ETH_HLEN + 8 + 8)
158 /* Max supported alignment is 256 (8 shift)
159 * minimal alignment shift 6 is optimal for 57xxx HW performance
161 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
162 /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
163 * at the end of skb->data, to avoid wasting a full cache line.
164 * This reduces memory use (skb->truesize).
166 #define QEDE_FW_RX_ALIGN_END \
167 max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \
168 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
170 struct qede_stats stats
;
171 #define QEDE_RSS_INDIR_INITED BIT(0)
172 #define QEDE_RSS_KEY_INITED BIT(1)
173 #define QEDE_RSS_CAPS_INITED BIT(2)
174 u32 rss_params_inited
; /* bit-field to track initialized rss params */
175 struct qed_update_vport_rss_params rss_params
;
176 u16 q_num_rx_buffers
; /* Must be a power of two */
177 u16 q_num_tx_buffers
; /* Must be a power of two */
180 struct list_head vlan_list
;
181 u16 configured_vlans
;
182 u16 non_configured_vlans
;
183 bool accept_any_vlan
;
184 struct delayed_work sp_task
;
185 unsigned long sp_flags
;
195 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
198 #define MAX_NUM_PRI 8
200 /* The driver supports the new build_skb() API:
201 * RX ring buffer contains pointer to kmalloc() data only,
202 * skb are built only after the frame was DMA-ed.
207 unsigned int page_offset
;
210 enum qede_agg_state
{
211 QEDE_AGG_STATE_NONE
= 0,
212 QEDE_AGG_STATE_START
= 1,
213 QEDE_AGG_STATE_ERROR
= 2
216 struct qede_agg_info
{
217 struct sw_rx_data replace_buf
;
218 dma_addr_t replace_buf_mapping
;
219 struct sw_rx_data start_buf
;
220 dma_addr_t start_buf_mapping
;
221 struct eth_fast_path_rx_tpa_start_cqe start_cqe
;
222 enum qede_agg_state agg_state
;
228 struct qede_rx_queue
{
230 struct sw_rx_data
*sw_rx_ring
;
233 struct qed_chain rx_bd_ring
;
234 struct qed_chain rx_comp_ring
;
235 void __iomem
*hw_rxq_prod_addr
;
238 struct qede_agg_info tpa_info
[ETH_TPA_MAX_AGGS_NUM
];
241 unsigned int rx_buf_seg_size
;
253 struct eth_db_data data
;
260 /* Set on the first BD descriptor when there is a split BD */
261 #define QEDE_TSO_SPLIT_BD BIT(0)
264 struct qede_tx_queue
{
265 int index
; /* Queue index */
267 struct sw_tx_bd
*sw_tx_ring
;
270 struct qed_chain tx_pbl
;
271 void __iomem
*doorbell_addr
;
281 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \
282 le32_to_cpu((bd)->addr.lo))
283 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \
285 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \
286 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \
287 (bd)->nbytes = cpu_to_le16(len); \
289 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
291 struct qede_fastpath
{
292 struct qede_dev
*edev
;
293 #define QEDE_FASTPATH_TX BIT(0)
294 #define QEDE_FASTPATH_RX BIT(1)
295 #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX)
298 struct napi_struct napi
;
299 struct qed_sb_info
*sb_info
;
300 struct qede_rx_queue
*rxq
;
301 struct qede_tx_queue
*txqs
;
303 #define VEC_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8)
304 char name
[VEC_NAME_SIZE
];
307 /* Debug print definitions */
308 #define DP_NAME(edev) ((edev)->ndev->name)
311 #define XMIT_L4_CSUM BIT(0)
312 #define XMIT_LSO BIT(1)
313 #define XMIT_ENC BIT(2)
315 #define QEDE_CSUM_ERROR BIT(0)
316 #define QEDE_CSUM_UNNECESSARY BIT(1)
317 #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2)
319 #define QEDE_SP_RX_MODE 1
320 #define QEDE_SP_VXLAN_PORT_CONFIG 2
321 #define QEDE_SP_GENEVE_PORT_CONFIG 3
323 union qede_reload_args
{
328 void qede_set_dcbnl_ops(struct net_device
*ndev
);
330 void qede_config_debug(uint debug
, u32
*p_dp_module
, u8
*p_dp_level
);
331 void qede_set_ethtool_ops(struct net_device
*netdev
);
332 void qede_reload(struct qede_dev
*edev
,
333 void (*func
)(struct qede_dev
*edev
,
334 union qede_reload_args
*args
),
335 union qede_reload_args
*args
);
336 int qede_change_mtu(struct net_device
*dev
, int new_mtu
);
337 void qede_fill_by_demand_stats(struct qede_dev
*edev
);
338 bool qede_has_rx_work(struct qede_rx_queue
*rxq
);
339 int qede_txq_has_work(struct qede_tx_queue
*txq
);
340 void qede_recycle_rx_bd_ring(struct qede_rx_queue
*rxq
, struct qede_dev
*edev
,
343 #define RX_RING_SIZE_POW 13
344 #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW))
345 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1)
346 #define NUM_RX_BDS_MIN 128
347 #define NUM_RX_BDS_DEF NUM_RX_BDS_MAX
349 #define TX_RING_SIZE_POW 13
350 #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW))
351 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1)
352 #define NUM_TX_BDS_MIN 128
353 #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX
355 #define QEDE_MIN_PKT_LEN 64
356 #define QEDE_RX_HDR_SIZE 256
357 #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++)
359 #endif /* _QEDE_H_ */