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drivers:net: dma_alloc_coherent: use __GFP_ZERO instead of memset(, 0)
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic_ctx.c
1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #include "qlcnic.h"
9
10 static const struct qlcnic_mailbox_metadata qlcnic_mbx_tbl[] = {
11 {QLCNIC_CMD_CREATE_RX_CTX, 4, 1},
12 {QLCNIC_CMD_DESTROY_RX_CTX, 2, 1},
13 {QLCNIC_CMD_CREATE_TX_CTX, 4, 1},
14 {QLCNIC_CMD_DESTROY_TX_CTX, 2, 1},
15 {QLCNIC_CMD_INTRPT_TEST, 4, 1},
16 {QLCNIC_CMD_SET_MTU, 4, 1},
17 {QLCNIC_CMD_READ_PHY, 4, 2},
18 {QLCNIC_CMD_WRITE_PHY, 5, 1},
19 {QLCNIC_CMD_READ_HW_REG, 4, 1},
20 {QLCNIC_CMD_GET_FLOW_CTL, 4, 2},
21 {QLCNIC_CMD_SET_FLOW_CTL, 4, 1},
22 {QLCNIC_CMD_READ_MAX_MTU, 4, 2},
23 {QLCNIC_CMD_READ_MAX_LRO, 4, 2},
24 {QLCNIC_CMD_MAC_ADDRESS, 4, 3},
25 {QLCNIC_CMD_GET_PCI_INFO, 4, 1},
26 {QLCNIC_CMD_GET_NIC_INFO, 4, 1},
27 {QLCNIC_CMD_SET_NIC_INFO, 4, 1},
28 {QLCNIC_CMD_GET_ESWITCH_CAPABILITY, 4, 3},
29 {QLCNIC_CMD_TOGGLE_ESWITCH, 4, 1},
30 {QLCNIC_CMD_GET_ESWITCH_STATUS, 4, 3},
31 {QLCNIC_CMD_SET_PORTMIRRORING, 4, 1},
32 {QLCNIC_CMD_CONFIGURE_ESWITCH, 4, 1},
33 {QLCNIC_CMD_GET_MAC_STATS, 4, 1},
34 {QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG, 4, 3},
35 {QLCNIC_CMD_GET_ESWITCH_STATS, 5, 1},
36 {QLCNIC_CMD_CONFIG_PORT, 4, 1},
37 {QLCNIC_CMD_TEMP_SIZE, 4, 4},
38 {QLCNIC_CMD_GET_TEMP_HDR, 4, 1},
39 {QLCNIC_CMD_SET_DRV_VER, 4, 1},
40 };
41
42 static inline u32 qlcnic_get_cmd_signature(struct qlcnic_hardware_context *ahw)
43 {
44 return (ahw->pci_func & 0xff) | ((ahw->fw_hal_version & 0xff) << 8) |
45 (0xcafe << 16);
46 }
47
48 /* Allocate mailbox registers */
49 int qlcnic_82xx_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
50 struct qlcnic_adapter *adapter, u32 type)
51 {
52 int i, size;
53 const struct qlcnic_mailbox_metadata *mbx_tbl;
54
55 mbx_tbl = qlcnic_mbx_tbl;
56 size = ARRAY_SIZE(qlcnic_mbx_tbl);
57 for (i = 0; i < size; i++) {
58 if (type == mbx_tbl[i].cmd) {
59 mbx->req.num = mbx_tbl[i].in_args;
60 mbx->rsp.num = mbx_tbl[i].out_args;
61 mbx->req.arg = kcalloc(mbx->req.num,
62 sizeof(u32), GFP_ATOMIC);
63 if (!mbx->req.arg)
64 return -ENOMEM;
65 mbx->rsp.arg = kcalloc(mbx->rsp.num,
66 sizeof(u32), GFP_ATOMIC);
67 if (!mbx->rsp.arg) {
68 kfree(mbx->req.arg);
69 mbx->req.arg = NULL;
70 return -ENOMEM;
71 }
72 memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
73 memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
74 mbx->req.arg[0] = type;
75 break;
76 }
77 }
78 return 0;
79 }
80
81 /* Free up mailbox registers */
82 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd)
83 {
84 kfree(cmd->req.arg);
85 cmd->req.arg = NULL;
86 kfree(cmd->rsp.arg);
87 cmd->rsp.arg = NULL;
88 }
89
90 static int qlcnic_is_valid_nic_func(struct qlcnic_adapter *adapter, u8 pci_func)
91 {
92 int i;
93
94 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
95 if (adapter->npars[i].pci_func == pci_func)
96 return i;
97 }
98
99 return -1;
100 }
101
102 static u32
103 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
104 {
105 u32 rsp;
106 int timeout = 0;
107
108 do {
109 /* give atleast 1ms for firmware to respond */
110 mdelay(1);
111
112 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
113 return QLCNIC_CDRP_RSP_TIMEOUT;
114
115 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
116 } while (!QLCNIC_CDRP_IS_RSP(rsp));
117
118 return rsp;
119 }
120
121 int qlcnic_82xx_issue_cmd(struct qlcnic_adapter *adapter,
122 struct qlcnic_cmd_args *cmd)
123 {
124 int i;
125 u32 rsp;
126 u32 signature;
127 struct pci_dev *pdev = adapter->pdev;
128 struct qlcnic_hardware_context *ahw = adapter->ahw;
129 const char *fmt;
130
131 signature = qlcnic_get_cmd_signature(ahw);
132
133 /* Acquire semaphore before accessing CRB */
134 if (qlcnic_api_lock(adapter)) {
135 cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT;
136 return cmd->rsp.arg[0];
137 }
138
139 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
140 for (i = 1; i < QLCNIC_CDRP_MAX_ARGS; i++)
141 QLCWR32(adapter, QLCNIC_CDRP_ARG(i), cmd->req.arg[i]);
142 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET,
143 QLCNIC_CDRP_FORM_CMD(cmd->req.arg[0]));
144 rsp = qlcnic_poll_rsp(adapter);
145
146 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
147 dev_err(&pdev->dev, "card response timeout.\n");
148 cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT;
149 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
150 cmd->rsp.arg[0] = QLCRD32(adapter, QLCNIC_CDRP_ARG(1));
151 switch (cmd->rsp.arg[0]) {
152 case QLCNIC_RCODE_INVALID_ARGS:
153 fmt = "CDRP invalid args: [%d]\n";
154 break;
155 case QLCNIC_RCODE_NOT_SUPPORTED:
156 case QLCNIC_RCODE_NOT_IMPL:
157 fmt = "CDRP command not supported: [%d]\n";
158 break;
159 case QLCNIC_RCODE_NOT_PERMITTED:
160 fmt = "CDRP requested action not permitted: [%d]\n";
161 break;
162 case QLCNIC_RCODE_INVALID:
163 fmt = "CDRP invalid or unknown cmd received: [%d]\n";
164 break;
165 case QLCNIC_RCODE_TIMEOUT:
166 fmt = "CDRP command timeout: [%d]\n";
167 break;
168 default:
169 fmt = "CDRP command failed: [%d]\n";
170 break;
171 }
172 dev_err(&pdev->dev, fmt, cmd->rsp.arg[0]);
173 } else if (rsp == QLCNIC_CDRP_RSP_OK)
174 cmd->rsp.arg[0] = QLCNIC_RCODE_SUCCESS;
175
176 for (i = 1; i < cmd->rsp.num; i++)
177 cmd->rsp.arg[i] = QLCRD32(adapter, QLCNIC_CDRP_ARG(i));
178
179 /* Release semaphore */
180 qlcnic_api_unlock(adapter);
181 return cmd->rsp.arg[0];
182 }
183
184 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *adapter)
185 {
186 struct qlcnic_cmd_args cmd;
187 u32 arg1, arg2, arg3;
188 char drv_string[12];
189 int err = 0;
190
191 memset(drv_string, 0, sizeof(drv_string));
192 snprintf(drv_string, sizeof(drv_string), "%d"".""%d"".""%d",
193 _QLCNIC_LINUX_MAJOR, _QLCNIC_LINUX_MINOR,
194 _QLCNIC_LINUX_SUBVERSION);
195
196 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_DRV_VER);
197 memcpy(&arg1, drv_string, sizeof(u32));
198 memcpy(&arg2, drv_string + 4, sizeof(u32));
199 memcpy(&arg3, drv_string + 8, sizeof(u32));
200
201 cmd.req.arg[1] = arg1;
202 cmd.req.arg[2] = arg2;
203 cmd.req.arg[3] = arg3;
204
205 err = qlcnic_issue_cmd(adapter, &cmd);
206 if (err) {
207 dev_info(&adapter->pdev->dev,
208 "Failed to set driver version in firmware\n");
209 return -EIO;
210 }
211
212 return 0;
213 }
214
215 int
216 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
217 {
218 int err = 0;
219 struct qlcnic_cmd_args cmd;
220 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
221
222 if (recv_ctx->state != QLCNIC_HOST_CTX_STATE_ACTIVE)
223 return err;
224 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_MTU);
225 cmd.req.arg[1] = recv_ctx->context_id;
226 cmd.req.arg[2] = mtu;
227
228 err = qlcnic_issue_cmd(adapter, &cmd);
229 if (err) {
230 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
231 err = -EIO;
232 }
233 qlcnic_free_mbx_args(&cmd);
234 return err;
235 }
236
237 int qlcnic_82xx_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
238 {
239 void *addr;
240 struct qlcnic_hostrq_rx_ctx *prq;
241 struct qlcnic_cardrsp_rx_ctx *prsp;
242 struct qlcnic_hostrq_rds_ring *prq_rds;
243 struct qlcnic_hostrq_sds_ring *prq_sds;
244 struct qlcnic_cardrsp_rds_ring *prsp_rds;
245 struct qlcnic_cardrsp_sds_ring *prsp_sds;
246 struct qlcnic_host_rds_ring *rds_ring;
247 struct qlcnic_host_sds_ring *sds_ring;
248 struct qlcnic_cmd_args cmd;
249
250 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
251 u64 phys_addr;
252
253 u8 i, nrds_rings, nsds_rings;
254 u16 temp_u16;
255 size_t rq_size, rsp_size;
256 u32 cap, reg, val, reg2;
257 int err;
258
259 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
260
261 nrds_rings = adapter->max_rds_rings;
262 nsds_rings = adapter->max_sds_rings;
263
264 rq_size =
265 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
266 nsds_rings);
267 rsp_size =
268 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
269 nsds_rings);
270
271 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
272 &hostrq_phys_addr, GFP_KERNEL);
273 if (addr == NULL)
274 return -ENOMEM;
275 prq = addr;
276
277 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
278 &cardrsp_phys_addr, GFP_KERNEL);
279 if (addr == NULL) {
280 err = -ENOMEM;
281 goto out_free_rq;
282 }
283 prsp = addr;
284
285 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
286
287 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
288 | QLCNIC_CAP0_VALIDOFF);
289 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
290
291 temp_u16 = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler);
292 prq->valid_field_offset = cpu_to_le16(temp_u16);
293 prq->txrx_sds_binding = nsds_rings - 1;
294
295 prq->capabilities[0] = cpu_to_le32(cap);
296 prq->host_int_crb_mode =
297 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
298 prq->host_rds_crb_mode =
299 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
300
301 prq->num_rds_rings = cpu_to_le16(nrds_rings);
302 prq->num_sds_rings = cpu_to_le16(nsds_rings);
303 prq->rds_ring_offset = 0;
304
305 val = le32_to_cpu(prq->rds_ring_offset) +
306 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
307 prq->sds_ring_offset = cpu_to_le32(val);
308
309 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
310 le32_to_cpu(prq->rds_ring_offset));
311
312 for (i = 0; i < nrds_rings; i++) {
313
314 rds_ring = &recv_ctx->rds_rings[i];
315 rds_ring->producer = 0;
316
317 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
318 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
319 prq_rds[i].ring_kind = cpu_to_le32(i);
320 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
321 }
322
323 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
324 le32_to_cpu(prq->sds_ring_offset));
325
326 for (i = 0; i < nsds_rings; i++) {
327
328 sds_ring = &recv_ctx->sds_rings[i];
329 sds_ring->consumer = 0;
330 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
331
332 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
333 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
334 prq_sds[i].msi_index = cpu_to_le16(i);
335 }
336
337 phys_addr = hostrq_phys_addr;
338 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CREATE_RX_CTX);
339 cmd.req.arg[1] = MSD(phys_addr);
340 cmd.req.arg[2] = LSD(phys_addr);
341 cmd.req.arg[3] = rq_size;
342 err = qlcnic_issue_cmd(adapter, &cmd);
343 if (err) {
344 dev_err(&adapter->pdev->dev,
345 "Failed to create rx ctx in firmware%d\n", err);
346 goto out_free_rsp;
347 }
348
349 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
350 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
351
352 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
353 rds_ring = &recv_ctx->rds_rings[i];
354
355 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
356 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
357 }
358
359 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
360 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
361
362 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
363 sds_ring = &recv_ctx->sds_rings[i];
364
365 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
366 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
367
368 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
369 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
370 }
371
372 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
373 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
374 recv_ctx->virt_port = prsp->virt_port;
375
376 out_free_rsp:
377 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
378 cardrsp_phys_addr);
379 qlcnic_free_mbx_args(&cmd);
380 out_free_rq:
381 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
382 return err;
383 }
384
385 static void
386 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
387 {
388 int err;
389 struct qlcnic_cmd_args cmd;
390 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
391
392 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_RX_CTX);
393 cmd.req.arg[1] = recv_ctx->context_id;
394 err = qlcnic_issue_cmd(adapter, &cmd);
395 if (err)
396 dev_err(&adapter->pdev->dev,
397 "Failed to destroy rx ctx in firmware\n");
398
399 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
400 qlcnic_free_mbx_args(&cmd);
401 }
402
403 int qlcnic_82xx_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
404 struct qlcnic_host_tx_ring *tx_ring,
405 int ring)
406 {
407 struct qlcnic_hostrq_tx_ctx *prq;
408 struct qlcnic_hostrq_cds_ring *prq_cds;
409 struct qlcnic_cardrsp_tx_ctx *prsp;
410 void *rq_addr, *rsp_addr;
411 size_t rq_size, rsp_size;
412 u32 temp;
413 struct qlcnic_cmd_args cmd;
414 int err;
415 u64 phys_addr;
416 dma_addr_t rq_phys_addr, rsp_phys_addr;
417
418 /* reset host resources */
419 tx_ring->producer = 0;
420 tx_ring->sw_consumer = 0;
421 *(tx_ring->hw_consumer) = 0;
422
423 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
424 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
425 &rq_phys_addr, GFP_KERNEL | __GFP_ZERO);
426 if (!rq_addr)
427 return -ENOMEM;
428
429 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
430 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
431 &rsp_phys_addr, GFP_KERNEL | __GFP_ZERO);
432 if (!rsp_addr) {
433 err = -ENOMEM;
434 goto out_free_rq;
435 }
436
437 prq = rq_addr;
438
439 prsp = rsp_addr;
440
441 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
442
443 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
444 QLCNIC_CAP0_LSO);
445 prq->capabilities[0] = cpu_to_le32(temp);
446
447 prq->host_int_crb_mode =
448 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
449 prq->msi_index = 0;
450
451 prq->interrupt_ctl = 0;
452 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
453
454 prq_cds = &prq->cds_ring;
455
456 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
457 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
458
459 phys_addr = rq_phys_addr;
460
461 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CREATE_TX_CTX);
462 cmd.req.arg[1] = MSD(phys_addr);
463 cmd.req.arg[2] = LSD(phys_addr);
464 cmd.req.arg[3] = rq_size;
465 err = qlcnic_issue_cmd(adapter, &cmd);
466
467 if (err == QLCNIC_RCODE_SUCCESS) {
468 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
469 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
470 tx_ring->ctx_id = le16_to_cpu(prsp->context_id);
471 } else {
472 dev_err(&adapter->pdev->dev,
473 "Failed to create tx ctx in firmware%d\n", err);
474 err = -EIO;
475 }
476
477 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
478 rsp_phys_addr);
479
480 out_free_rq:
481 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
482 qlcnic_free_mbx_args(&cmd);
483
484 return err;
485 }
486
487 static void
488 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter,
489 struct qlcnic_host_tx_ring *tx_ring)
490 {
491 struct qlcnic_cmd_args cmd;
492
493 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_TX_CTX);
494 cmd.req.arg[1] = tx_ring->ctx_id;
495 if (qlcnic_issue_cmd(adapter, &cmd))
496 dev_err(&adapter->pdev->dev,
497 "Failed to destroy tx ctx in firmware\n");
498 qlcnic_free_mbx_args(&cmd);
499 }
500
501 int
502 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
503 {
504 int err;
505 struct qlcnic_cmd_args cmd;
506
507 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIG_PORT);
508 cmd.req.arg[1] = config;
509 err = qlcnic_issue_cmd(adapter, &cmd);
510 qlcnic_free_mbx_args(&cmd);
511 return err;
512 }
513
514 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
515 {
516 void *addr;
517 int err, ring;
518 struct qlcnic_recv_context *recv_ctx;
519 struct qlcnic_host_rds_ring *rds_ring;
520 struct qlcnic_host_sds_ring *sds_ring;
521 struct qlcnic_host_tx_ring *tx_ring;
522 __le32 *ptr;
523
524 struct pci_dev *pdev = adapter->pdev;
525
526 recv_ctx = adapter->recv_ctx;
527
528 for (ring = 0; ring < adapter->max_drv_tx_rings; ring++) {
529 tx_ring = &adapter->tx_ring[ring];
530 ptr = (__le32 *)dma_alloc_coherent(&pdev->dev, sizeof(u32),
531 &tx_ring->hw_cons_phys_addr,
532 GFP_KERNEL);
533 if (ptr == NULL)
534 return -ENOMEM;
535
536 tx_ring->hw_consumer = ptr;
537 /* cmd desc ring */
538 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
539 &tx_ring->phys_addr,
540 GFP_KERNEL);
541 if (addr == NULL) {
542 err = -ENOMEM;
543 goto err_out_free;
544 }
545
546 tx_ring->desc_head = addr;
547 }
548
549 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
550 rds_ring = &recv_ctx->rds_rings[ring];
551 addr = dma_alloc_coherent(&adapter->pdev->dev,
552 RCV_DESC_RINGSIZE(rds_ring),
553 &rds_ring->phys_addr, GFP_KERNEL);
554 if (addr == NULL) {
555 err = -ENOMEM;
556 goto err_out_free;
557 }
558 rds_ring->desc_head = addr;
559
560 }
561
562 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
563 sds_ring = &recv_ctx->sds_rings[ring];
564
565 addr = dma_alloc_coherent(&adapter->pdev->dev,
566 STATUS_DESC_RINGSIZE(sds_ring),
567 &sds_ring->phys_addr, GFP_KERNEL);
568 if (addr == NULL) {
569 err = -ENOMEM;
570 goto err_out_free;
571 }
572 sds_ring->desc_head = addr;
573 }
574
575 return 0;
576
577 err_out_free:
578 qlcnic_free_hw_resources(adapter);
579 return err;
580 }
581
582 int qlcnic_fw_create_ctx(struct qlcnic_adapter *dev)
583 {
584 int i, err, ring;
585
586 if (dev->flags & QLCNIC_NEED_FLR) {
587 pci_reset_function(dev->pdev);
588 dev->flags &= ~QLCNIC_NEED_FLR;
589 }
590
591 if (qlcnic_83xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED)) {
592 if (dev->ahw->diag_test != QLCNIC_LOOPBACK_TEST) {
593 err = qlcnic_83xx_config_intrpt(dev, 1);
594 if (err)
595 return err;
596 }
597 }
598
599 err = qlcnic_fw_cmd_create_rx_ctx(dev);
600 if (err)
601 goto err_out;
602
603 for (ring = 0; ring < dev->max_drv_tx_rings; ring++) {
604 err = qlcnic_fw_cmd_create_tx_ctx(dev,
605 &dev->tx_ring[ring],
606 ring);
607 if (err) {
608 qlcnic_fw_cmd_destroy_rx_ctx(dev);
609 if (ring == 0)
610 goto err_out;
611
612 for (i = 0; i < ring; i++)
613 qlcnic_fw_cmd_destroy_tx_ctx(dev,
614 &dev->tx_ring[i]);
615
616 goto err_out;
617 }
618 }
619
620 set_bit(__QLCNIC_FW_ATTACHED, &dev->state);
621 return 0;
622
623 err_out:
624 if (qlcnic_83xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED)) {
625 if (dev->ahw->diag_test != QLCNIC_LOOPBACK_TEST)
626 qlcnic_83xx_config_intrpt(dev, 0);
627 }
628 return err;
629 }
630
631 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
632 {
633 int ring;
634
635 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
636 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
637 for (ring = 0; ring < adapter->max_drv_tx_rings; ring++)
638 qlcnic_fw_cmd_destroy_tx_ctx(adapter,
639 &adapter->tx_ring[ring]);
640
641 if (qlcnic_83xx_check(adapter) &&
642 (adapter->flags & QLCNIC_MSIX_ENABLED)) {
643 if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST)
644 qlcnic_83xx_config_intrpt(adapter, 0);
645 }
646 /* Allow dma queues to drain after context reset */
647 mdelay(20);
648 }
649 }
650
651 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
652 {
653 struct qlcnic_recv_context *recv_ctx;
654 struct qlcnic_host_rds_ring *rds_ring;
655 struct qlcnic_host_sds_ring *sds_ring;
656 struct qlcnic_host_tx_ring *tx_ring;
657 int ring;
658
659 recv_ctx = adapter->recv_ctx;
660
661 for (ring = 0; ring < adapter->max_drv_tx_rings; ring++) {
662 tx_ring = &adapter->tx_ring[ring];
663 if (tx_ring->hw_consumer != NULL) {
664 dma_free_coherent(&adapter->pdev->dev, sizeof(u32),
665 tx_ring->hw_consumer,
666 tx_ring->hw_cons_phys_addr);
667
668 tx_ring->hw_consumer = NULL;
669 }
670
671 if (tx_ring->desc_head != NULL) {
672 dma_free_coherent(&adapter->pdev->dev,
673 TX_DESC_RINGSIZE(tx_ring),
674 tx_ring->desc_head,
675 tx_ring->phys_addr);
676 tx_ring->desc_head = NULL;
677 }
678 }
679
680 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
681 rds_ring = &recv_ctx->rds_rings[ring];
682
683 if (rds_ring->desc_head != NULL) {
684 dma_free_coherent(&adapter->pdev->dev,
685 RCV_DESC_RINGSIZE(rds_ring),
686 rds_ring->desc_head,
687 rds_ring->phys_addr);
688 rds_ring->desc_head = NULL;
689 }
690 }
691
692 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
693 sds_ring = &recv_ctx->sds_rings[ring];
694
695 if (sds_ring->desc_head != NULL) {
696 dma_free_coherent(&adapter->pdev->dev,
697 STATUS_DESC_RINGSIZE(sds_ring),
698 sds_ring->desc_head,
699 sds_ring->phys_addr);
700 sds_ring->desc_head = NULL;
701 }
702 }
703 }
704
705
706 int qlcnic_82xx_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
707 {
708 int err, i;
709 struct qlcnic_cmd_args cmd;
710 u32 mac_low, mac_high;
711
712 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_MAC_ADDRESS);
713 cmd.req.arg[1] = adapter->ahw->pci_func | BIT_8;
714 err = qlcnic_issue_cmd(adapter, &cmd);
715
716 if (err == QLCNIC_RCODE_SUCCESS) {
717 mac_low = cmd.rsp.arg[1];
718 mac_high = cmd.rsp.arg[2];
719
720 for (i = 0; i < 2; i++)
721 mac[i] = (u8) (mac_high >> ((1 - i) * 8));
722 for (i = 2; i < 6; i++)
723 mac[i] = (u8) (mac_low >> ((5 - i) * 8));
724 } else {
725 dev_err(&adapter->pdev->dev,
726 "Failed to get mac address%d\n", err);
727 err = -EIO;
728 }
729 qlcnic_free_mbx_args(&cmd);
730 return err;
731 }
732
733 /* Get info of a NIC partition */
734 int qlcnic_82xx_get_nic_info(struct qlcnic_adapter *adapter,
735 struct qlcnic_info *npar_info, u8 func_id)
736 {
737 int err;
738 dma_addr_t nic_dma_t;
739 const struct qlcnic_info_le *nic_info;
740 void *nic_info_addr;
741 struct qlcnic_cmd_args cmd;
742 size_t nic_size = sizeof(struct qlcnic_info_le);
743
744 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
745 &nic_dma_t, GFP_KERNEL | __GFP_ZERO);
746 if (!nic_info_addr)
747 return -ENOMEM;
748
749 nic_info = nic_info_addr;
750
751 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
752 cmd.req.arg[1] = MSD(nic_dma_t);
753 cmd.req.arg[2] = LSD(nic_dma_t);
754 cmd.req.arg[3] = (func_id << 16 | nic_size);
755 err = qlcnic_issue_cmd(adapter, &cmd);
756 if (err != QLCNIC_RCODE_SUCCESS) {
757 dev_err(&adapter->pdev->dev,
758 "Failed to get nic info%d\n", err);
759 err = -EIO;
760 } else {
761 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
762 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
763 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
764 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
765 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
766 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
767 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
768 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
769 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
770 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
771 }
772
773 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
774 nic_dma_t);
775 qlcnic_free_mbx_args(&cmd);
776
777 return err;
778 }
779
780 /* Configure a NIC partition */
781 int qlcnic_82xx_set_nic_info(struct qlcnic_adapter *adapter,
782 struct qlcnic_info *nic)
783 {
784 int err = -EIO;
785 dma_addr_t nic_dma_t;
786 void *nic_info_addr;
787 struct qlcnic_cmd_args cmd;
788 struct qlcnic_info_le *nic_info;
789 size_t nic_size = sizeof(struct qlcnic_info_le);
790
791 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
792 return err;
793
794 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
795 &nic_dma_t, GFP_KERNEL | __GFP_ZERO);
796 if (!nic_info_addr)
797 return -ENOMEM;
798
799 nic_info = nic_info_addr;
800
801 nic_info->pci_func = cpu_to_le16(nic->pci_func);
802 nic_info->op_mode = cpu_to_le16(nic->op_mode);
803 nic_info->phys_port = cpu_to_le16(nic->phys_port);
804 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
805 nic_info->capabilities = cpu_to_le32(nic->capabilities);
806 nic_info->max_mac_filters = nic->max_mac_filters;
807 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
808 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
809 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
810 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
811
812 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_NIC_INFO);
813 cmd.req.arg[1] = MSD(nic_dma_t);
814 cmd.req.arg[2] = LSD(nic_dma_t);
815 cmd.req.arg[3] = ((nic->pci_func << 16) | nic_size);
816 err = qlcnic_issue_cmd(adapter, &cmd);
817
818 if (err != QLCNIC_RCODE_SUCCESS) {
819 dev_err(&adapter->pdev->dev,
820 "Failed to set nic info%d\n", err);
821 err = -EIO;
822 }
823
824 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
825 nic_dma_t);
826 qlcnic_free_mbx_args(&cmd);
827
828 return err;
829 }
830
831 /* Get PCI Info of a partition */
832 int qlcnic_82xx_get_pci_info(struct qlcnic_adapter *adapter,
833 struct qlcnic_pci_info *pci_info)
834 {
835 int err = 0, i;
836 struct qlcnic_cmd_args cmd;
837 dma_addr_t pci_info_dma_t;
838 struct qlcnic_pci_info_le *npar;
839 void *pci_info_addr;
840 size_t npar_size = sizeof(struct qlcnic_pci_info_le);
841 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
842
843 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
844 &pci_info_dma_t,
845 GFP_KERNEL | __GFP_ZERO);
846 if (!pci_info_addr)
847 return -ENOMEM;
848
849 npar = pci_info_addr;
850 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_PCI_INFO);
851 cmd.req.arg[1] = MSD(pci_info_dma_t);
852 cmd.req.arg[2] = LSD(pci_info_dma_t);
853 cmd.req.arg[3] = pci_size;
854 err = qlcnic_issue_cmd(adapter, &cmd);
855
856 adapter->ahw->act_pci_func = 0;
857 if (err == QLCNIC_RCODE_SUCCESS) {
858 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
859 pci_info->id = le16_to_cpu(npar->id);
860 pci_info->active = le16_to_cpu(npar->active);
861 pci_info->type = le16_to_cpu(npar->type);
862 if (pci_info->type == QLCNIC_TYPE_NIC)
863 adapter->ahw->act_pci_func++;
864 pci_info->default_port =
865 le16_to_cpu(npar->default_port);
866 pci_info->tx_min_bw =
867 le16_to_cpu(npar->tx_min_bw);
868 pci_info->tx_max_bw =
869 le16_to_cpu(npar->tx_max_bw);
870 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
871 }
872 } else {
873 dev_err(&adapter->pdev->dev,
874 "Failed to get PCI Info%d\n", err);
875 err = -EIO;
876 }
877
878 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
879 pci_info_dma_t);
880 qlcnic_free_mbx_args(&cmd);
881
882 return err;
883 }
884
885 /* Configure eSwitch for port mirroring */
886 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
887 u8 enable_mirroring, u8 pci_func)
888 {
889 int err = -EIO;
890 u32 arg1;
891 struct qlcnic_cmd_args cmd;
892
893 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC ||
894 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
895 return err;
896
897 arg1 = id | (enable_mirroring ? BIT_4 : 0);
898 arg1 |= pci_func << 8;
899
900 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_PORTMIRRORING);
901 cmd.req.arg[1] = arg1;
902 err = qlcnic_issue_cmd(adapter, &cmd);
903
904 if (err != QLCNIC_RCODE_SUCCESS)
905 dev_err(&adapter->pdev->dev,
906 "Failed to configure port mirroring%d on eswitch:%d\n",
907 pci_func, id);
908 else
909 dev_info(&adapter->pdev->dev,
910 "Configured eSwitch %d for port mirroring:%d\n",
911 id, pci_func);
912 qlcnic_free_mbx_args(&cmd);
913
914 return err;
915 }
916
917 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
918 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
919
920 size_t stats_size = sizeof(struct qlcnic_esw_stats_le);
921 struct qlcnic_esw_stats_le *stats;
922 dma_addr_t stats_dma_t;
923 void *stats_addr;
924 u32 arg1;
925 struct qlcnic_cmd_args cmd;
926 int err;
927
928 if (esw_stats == NULL)
929 return -ENOMEM;
930
931 if ((adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) &&
932 (func != adapter->ahw->pci_func)) {
933 dev_err(&adapter->pdev->dev,
934 "Not privilege to query stats for func=%d", func);
935 return -EIO;
936 }
937
938 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
939 &stats_dma_t, GFP_KERNEL | __GFP_ZERO);
940 if (!stats_addr)
941 return -ENOMEM;
942
943 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
944 arg1 |= rx_tx << 15 | stats_size << 16;
945
946 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_ESWITCH_STATS);
947 cmd.req.arg[1] = arg1;
948 cmd.req.arg[2] = MSD(stats_dma_t);
949 cmd.req.arg[3] = LSD(stats_dma_t);
950 err = qlcnic_issue_cmd(adapter, &cmd);
951
952 if (!err) {
953 stats = stats_addr;
954 esw_stats->context_id = le16_to_cpu(stats->context_id);
955 esw_stats->version = le16_to_cpu(stats->version);
956 esw_stats->size = le16_to_cpu(stats->size);
957 esw_stats->multicast_frames =
958 le64_to_cpu(stats->multicast_frames);
959 esw_stats->broadcast_frames =
960 le64_to_cpu(stats->broadcast_frames);
961 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
962 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
963 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
964 esw_stats->errors = le64_to_cpu(stats->errors);
965 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
966 }
967
968 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
969 stats_dma_t);
970 qlcnic_free_mbx_args(&cmd);
971
972 return err;
973 }
974
975 /* This routine will retrieve the MAC statistics from firmware */
976 int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,
977 struct qlcnic_mac_statistics *mac_stats)
978 {
979 struct qlcnic_mac_statistics_le *stats;
980 struct qlcnic_cmd_args cmd;
981 size_t stats_size = sizeof(struct qlcnic_mac_statistics_le);
982 dma_addr_t stats_dma_t;
983 void *stats_addr;
984 int err;
985
986 if (mac_stats == NULL)
987 return -ENOMEM;
988
989 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
990 &stats_dma_t, GFP_KERNEL | __GFP_ZERO);
991 if (!stats_addr)
992 return -ENOMEM;
993
994 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_MAC_STATS);
995 cmd.req.arg[1] = stats_size << 16;
996 cmd.req.arg[2] = MSD(stats_dma_t);
997 cmd.req.arg[3] = LSD(stats_dma_t);
998 err = qlcnic_issue_cmd(adapter, &cmd);
999 if (!err) {
1000 stats = stats_addr;
1001 mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames);
1002 mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes);
1003 mac_stats->mac_tx_mcast_pkts =
1004 le64_to_cpu(stats->mac_tx_mcast_pkts);
1005 mac_stats->mac_tx_bcast_pkts =
1006 le64_to_cpu(stats->mac_tx_bcast_pkts);
1007 mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames);
1008 mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes);
1009 mac_stats->mac_rx_mcast_pkts =
1010 le64_to_cpu(stats->mac_rx_mcast_pkts);
1011 mac_stats->mac_rx_length_error =
1012 le64_to_cpu(stats->mac_rx_length_error);
1013 mac_stats->mac_rx_length_small =
1014 le64_to_cpu(stats->mac_rx_length_small);
1015 mac_stats->mac_rx_length_large =
1016 le64_to_cpu(stats->mac_rx_length_large);
1017 mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber);
1018 mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped);
1019 mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error);
1020 } else {
1021 dev_err(&adapter->pdev->dev,
1022 "%s: Get mac stats failed, err=%d.\n", __func__, err);
1023 }
1024
1025 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
1026 stats_dma_t);
1027
1028 qlcnic_free_mbx_args(&cmd);
1029
1030 return err;
1031 }
1032
1033 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
1034 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1035
1036 struct __qlcnic_esw_statistics port_stats;
1037 u8 i;
1038 int ret = -EIO;
1039
1040 if (esw_stats == NULL)
1041 return -ENOMEM;
1042 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1043 return -EIO;
1044 if (adapter->npars == NULL)
1045 return -EIO;
1046
1047 memset(esw_stats, 0, sizeof(u64));
1048 esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL;
1049 esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL;
1050 esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL;
1051 esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL;
1052 esw_stats->errors = QLCNIC_STATS_NOT_AVAIL;
1053 esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL;
1054 esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL;
1055 esw_stats->context_id = eswitch;
1056
1057 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
1058 if (adapter->npars[i].phy_port != eswitch)
1059 continue;
1060
1061 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1062 if (qlcnic_get_port_stats(adapter, adapter->npars[i].pci_func,
1063 rx_tx, &port_stats))
1064 continue;
1065
1066 esw_stats->size = port_stats.size;
1067 esw_stats->version = port_stats.version;
1068 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
1069 port_stats.unicast_frames);
1070 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
1071 port_stats.multicast_frames);
1072 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
1073 port_stats.broadcast_frames);
1074 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
1075 port_stats.dropped_frames);
1076 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
1077 port_stats.errors);
1078 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
1079 port_stats.local_frames);
1080 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
1081 port_stats.numbytes);
1082 ret = 0;
1083 }
1084 return ret;
1085 }
1086
1087 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1088 const u8 port, const u8 rx_tx)
1089 {
1090 int err;
1091 u32 arg1;
1092 struct qlcnic_cmd_args cmd;
1093
1094 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1095 return -EIO;
1096
1097 if (func_esw == QLCNIC_STATS_PORT) {
1098 if (port >= QLCNIC_MAX_PCI_FUNC)
1099 goto err_ret;
1100 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1101 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1102 goto err_ret;
1103 } else {
1104 goto err_ret;
1105 }
1106
1107 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1108 goto err_ret;
1109
1110 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1111 arg1 |= BIT_14 | rx_tx << 15;
1112
1113 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_ESWITCH_STATS);
1114 cmd.req.arg[1] = arg1;
1115 err = qlcnic_issue_cmd(adapter, &cmd);
1116 qlcnic_free_mbx_args(&cmd);
1117 return err;
1118
1119 err_ret:
1120 dev_err(&adapter->pdev->dev,
1121 "Invalid args func_esw %d port %d rx_ctx %d\n",
1122 func_esw, port, rx_tx);
1123 return -EIO;
1124 }
1125
1126 static int
1127 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1128 u32 *arg1, u32 *arg2)
1129 {
1130 int err = -EIO;
1131 struct qlcnic_cmd_args cmd;
1132 u8 pci_func;
1133 pci_func = (*arg1 >> 8);
1134
1135 qlcnic_alloc_mbx_args(&cmd, adapter,
1136 QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG);
1137 cmd.req.arg[1] = *arg1;
1138 err = qlcnic_issue_cmd(adapter, &cmd);
1139 *arg1 = cmd.rsp.arg[1];
1140 *arg2 = cmd.rsp.arg[2];
1141 qlcnic_free_mbx_args(&cmd);
1142
1143 if (err == QLCNIC_RCODE_SUCCESS)
1144 dev_info(&adapter->pdev->dev,
1145 "eSwitch port config for pci func %d\n", pci_func);
1146 else
1147 dev_err(&adapter->pdev->dev,
1148 "Failed to get eswitch port config for pci func %d\n",
1149 pci_func);
1150 return err;
1151 }
1152 /* Configure eSwitch port
1153 op_mode = 0 for setting default port behavior
1154 op_mode = 1 for setting vlan id
1155 op_mode = 2 for deleting vlan id
1156 op_type = 0 for vlan_id
1157 op_type = 1 for port vlan_id
1158 */
1159 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1160 struct qlcnic_esw_func_cfg *esw_cfg)
1161 {
1162 int err = -EIO, index;
1163 u32 arg1, arg2 = 0;
1164 struct qlcnic_cmd_args cmd;
1165 u8 pci_func;
1166
1167 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1168 return err;
1169 pci_func = esw_cfg->pci_func;
1170 index = qlcnic_is_valid_nic_func(adapter, pci_func);
1171 if (index < 0)
1172 return err;
1173 arg1 = (adapter->npars[index].phy_port & BIT_0);
1174 arg1 |= (pci_func << 8);
1175
1176 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1177 return err;
1178 arg1 &= ~(0x0ff << 8);
1179 arg1 |= (pci_func << 8);
1180 arg1 &= ~(BIT_2 | BIT_3);
1181 switch (esw_cfg->op_mode) {
1182 case QLCNIC_PORT_DEFAULTS:
1183 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1184 arg2 |= (BIT_0 | BIT_1);
1185 if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1186 arg2 |= (BIT_2 | BIT_3);
1187 if (!(esw_cfg->discard_tagged))
1188 arg1 &= ~BIT_4;
1189 if (!(esw_cfg->promisc_mode))
1190 arg1 &= ~BIT_6;
1191 if (!(esw_cfg->mac_override))
1192 arg1 &= ~BIT_7;
1193 if (!(esw_cfg->mac_anti_spoof))
1194 arg2 &= ~BIT_0;
1195 if (!(esw_cfg->offload_flags & BIT_0))
1196 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1197 if (!(esw_cfg->offload_flags & BIT_1))
1198 arg2 &= ~BIT_2;
1199 if (!(esw_cfg->offload_flags & BIT_2))
1200 arg2 &= ~BIT_3;
1201 break;
1202 case QLCNIC_ADD_VLAN:
1203 arg1 |= (BIT_2 | BIT_5);
1204 arg1 |= (esw_cfg->vlan_id << 16);
1205 break;
1206 case QLCNIC_DEL_VLAN:
1207 arg1 |= (BIT_3 | BIT_5);
1208 arg1 &= ~(0x0ffff << 16);
1209 break;
1210 default:
1211 return err;
1212 }
1213
1214 qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIGURE_ESWITCH);
1215 cmd.req.arg[1] = arg1;
1216 cmd.req.arg[2] = arg2;
1217 err = qlcnic_issue_cmd(adapter, &cmd);
1218 qlcnic_free_mbx_args(&cmd);
1219
1220 if (err != QLCNIC_RCODE_SUCCESS)
1221 dev_err(&adapter->pdev->dev,
1222 "Failed to configure eswitch pci func %d\n", pci_func);
1223 else
1224 dev_info(&adapter->pdev->dev,
1225 "Configured eSwitch for pci func %d\n", pci_func);
1226
1227 return err;
1228 }
1229
1230 int
1231 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1232 struct qlcnic_esw_func_cfg *esw_cfg)
1233 {
1234 u32 arg1, arg2;
1235 int index;
1236 u8 phy_port;
1237
1238 if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC) {
1239 index = qlcnic_is_valid_nic_func(adapter, esw_cfg->pci_func);
1240 if (index < 0)
1241 return -EIO;
1242 phy_port = adapter->npars[index].phy_port;
1243 } else {
1244 phy_port = adapter->ahw->physical_port;
1245 }
1246 arg1 = phy_port;
1247 arg1 |= (esw_cfg->pci_func << 8);
1248 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1249 return -EIO;
1250
1251 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1252 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1253 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1254 esw_cfg->mac_override = !!(arg1 & BIT_7);
1255 esw_cfg->vlan_id = LSW(arg1 >> 16);
1256 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1257 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1258
1259 return 0;
1260 }
Linux kernel - Deliverables
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