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[deliverable/linux.git] / drivers / net / ethernet / sfc / efx.c
1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
26 #include "efx.h"
27 #include "nic.h"
28 #include "selftest.h"
29 #include "sriov.h"
30
31 #include "mcdi.h"
32 #include "workarounds.h"
33
34 /**************************************************************************
35 *
36 * Type name strings
37 *
38 **************************************************************************
39 */
40
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 };
72
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_DATAPATH] = "DATAPATH",
81 [RESET_TYPE_MC_BIST] = "MC_BIST",
82 [RESET_TYPE_DISABLE] = "DISABLE",
83 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
84 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
85 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
87 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
90 };
91
92 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
93 * queued onto this work queue. This is not a per-nic work queue, because
94 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
95 */
96 static struct workqueue_struct *reset_workqueue;
97
98 /* How often and how many times to poll for a reset while waiting for a
99 * BIST that another function started to complete.
100 */
101 #define BIST_WAIT_DELAY_MS 100
102 #define BIST_WAIT_DELAY_COUNT 100
103
104 /**************************************************************************
105 *
106 * Configurable values
107 *
108 *************************************************************************/
109
110 /*
111 * Use separate channels for TX and RX events
112 *
113 * Set this to 1 to use separate channels for TX and RX. It allows us
114 * to control interrupt affinity separately for TX and RX.
115 *
116 * This is only used in MSI-X interrupt mode
117 */
118 bool efx_separate_tx_channels;
119 module_param(efx_separate_tx_channels, bool, 0444);
120 MODULE_PARM_DESC(efx_separate_tx_channels,
121 "Use separate channels for TX and RX");
122
123 /* This is the weight assigned to each of the (per-channel) virtual
124 * NAPI devices.
125 */
126 static int napi_weight = 64;
127
128 /* This is the time (in jiffies) between invocations of the hardware
129 * monitor.
130 * On Falcon-based NICs, this will:
131 * - Check the on-board hardware monitor;
132 * - Poll the link state and reconfigure the hardware as necessary.
133 * On Siena-based NICs for power systems with EEH support, this will give EEH a
134 * chance to start.
135 */
136 static unsigned int efx_monitor_interval = 1 * HZ;
137
138 /* Initial interrupt moderation settings. They can be modified after
139 * module load with ethtool.
140 *
141 * The default for RX should strike a balance between increasing the
142 * round-trip latency and reducing overhead.
143 */
144 static unsigned int rx_irq_mod_usec = 60;
145
146 /* Initial interrupt moderation settings. They can be modified after
147 * module load with ethtool.
148 *
149 * This default is chosen to ensure that a 10G link does not go idle
150 * while a TX queue is stopped after it has become full. A queue is
151 * restarted when it drops below half full. The time this takes (assuming
152 * worst case 3 descriptors per packet and 1024 descriptors) is
153 * 512 / 3 * 1.2 = 205 usec.
154 */
155 static unsigned int tx_irq_mod_usec = 150;
156
157 /* This is the first interrupt mode to try out of:
158 * 0 => MSI-X
159 * 1 => MSI
160 * 2 => legacy
161 */
162 static unsigned int interrupt_mode;
163
164 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
165 * i.e. the number of CPUs among which we may distribute simultaneous
166 * interrupt handling.
167 *
168 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
169 * The default (0) means to assign an interrupt to each core.
170 */
171 static unsigned int rss_cpus;
172 module_param(rss_cpus, uint, 0444);
173 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
174
175 static bool phy_flash_cfg;
176 module_param(phy_flash_cfg, bool, 0644);
177 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
178
179 static unsigned irq_adapt_low_thresh = 8000;
180 module_param(irq_adapt_low_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_low_thresh,
182 "Threshold score for reducing IRQ moderation");
183
184 static unsigned irq_adapt_high_thresh = 16000;
185 module_param(irq_adapt_high_thresh, uint, 0644);
186 MODULE_PARM_DESC(irq_adapt_high_thresh,
187 "Threshold score for increasing IRQ moderation");
188
189 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
190 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
191 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
192 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
193 module_param(debug, uint, 0);
194 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
195
196 /**************************************************************************
197 *
198 * Utility functions and prototypes
199 *
200 *************************************************************************/
201
202 static int efx_soft_enable_interrupts(struct efx_nic *efx);
203 static void efx_soft_disable_interrupts(struct efx_nic *efx);
204 static void efx_remove_channel(struct efx_channel *channel);
205 static void efx_remove_channels(struct efx_nic *efx);
206 static const struct efx_channel_type efx_default_channel_type;
207 static void efx_remove_port(struct efx_nic *efx);
208 static void efx_init_napi_channel(struct efx_channel *channel);
209 static void efx_fini_napi(struct efx_nic *efx);
210 static void efx_fini_napi_channel(struct efx_channel *channel);
211 static void efx_fini_struct(struct efx_nic *efx);
212 static void efx_start_all(struct efx_nic *efx);
213 static void efx_stop_all(struct efx_nic *efx);
214
215 #define EFX_ASSERT_RESET_SERIALISED(efx) \
216 do { \
217 if ((efx->state == STATE_READY) || \
218 (efx->state == STATE_RECOVERY) || \
219 (efx->state == STATE_DISABLED)) \
220 ASSERT_RTNL(); \
221 } while (0)
222
223 static int efx_check_disabled(struct efx_nic *efx)
224 {
225 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
226 netif_err(efx, drv, efx->net_dev,
227 "device is disabled due to earlier errors\n");
228 return -EIO;
229 }
230 return 0;
231 }
232
233 /**************************************************************************
234 *
235 * Event queue processing
236 *
237 *************************************************************************/
238
239 /* Process channel's event queue
240 *
241 * This function is responsible for processing the event queue of a
242 * single channel. The caller must guarantee that this function will
243 * never be concurrently called more than once on the same channel,
244 * though different channels may be being processed concurrently.
245 */
246 static int efx_process_channel(struct efx_channel *channel, int budget)
247 {
248 struct efx_tx_queue *tx_queue;
249 int spent;
250
251 if (unlikely(!channel->enabled))
252 return 0;
253
254 efx_for_each_channel_tx_queue(tx_queue, channel) {
255 tx_queue->pkts_compl = 0;
256 tx_queue->bytes_compl = 0;
257 }
258
259 spent = efx_nic_process_eventq(channel, budget);
260 if (spent && efx_channel_has_rx_queue(channel)) {
261 struct efx_rx_queue *rx_queue =
262 efx_channel_get_rx_queue(channel);
263
264 efx_rx_flush_packet(channel);
265 efx_fast_push_rx_descriptors(rx_queue, true);
266 }
267
268 /* Update BQL */
269 efx_for_each_channel_tx_queue(tx_queue, channel) {
270 if (tx_queue->bytes_compl) {
271 netdev_tx_completed_queue(tx_queue->core_txq,
272 tx_queue->pkts_compl, tx_queue->bytes_compl);
273 }
274 }
275
276 return spent;
277 }
278
279 /* NAPI poll handler
280 *
281 * NAPI guarantees serialisation of polls of the same device, which
282 * provides the guarantee required by efx_process_channel().
283 */
284 static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
285 {
286 int step = efx->irq_mod_step_us;
287
288 if (channel->irq_mod_score < irq_adapt_low_thresh) {
289 if (channel->irq_moderation_us > step) {
290 channel->irq_moderation_us -= step;
291 efx->type->push_irq_moderation(channel);
292 }
293 } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
294 if (channel->irq_moderation_us <
295 efx->irq_rx_moderation_us) {
296 channel->irq_moderation_us += step;
297 efx->type->push_irq_moderation(channel);
298 }
299 }
300
301 channel->irq_count = 0;
302 channel->irq_mod_score = 0;
303 }
304
305 static int efx_poll(struct napi_struct *napi, int budget)
306 {
307 struct efx_channel *channel =
308 container_of(napi, struct efx_channel, napi_str);
309 struct efx_nic *efx = channel->efx;
310 int spent;
311
312 if (!efx_channel_lock_napi(channel))
313 return budget;
314
315 netif_vdbg(efx, intr, efx->net_dev,
316 "channel %d NAPI poll executing on CPU %d\n",
317 channel->channel, raw_smp_processor_id());
318
319 spent = efx_process_channel(channel, budget);
320
321 if (spent < budget) {
322 if (efx_channel_has_rx_queue(channel) &&
323 efx->irq_rx_adaptive &&
324 unlikely(++channel->irq_count == 1000)) {
325 efx_update_irq_mod(efx, channel);
326 }
327
328 efx_filter_rfs_expire(channel);
329
330 /* There is no race here; although napi_disable() will
331 * only wait for napi_complete(), this isn't a problem
332 * since efx_nic_eventq_read_ack() will have no effect if
333 * interrupts have already been disabled.
334 */
335 napi_complete(napi);
336 efx_nic_eventq_read_ack(channel);
337 }
338
339 efx_channel_unlock_napi(channel);
340 return spent;
341 }
342
343 /* Create event queue
344 * Event queue memory allocations are done only once. If the channel
345 * is reset, the memory buffer will be reused; this guards against
346 * errors during channel reset and also simplifies interrupt handling.
347 */
348 static int efx_probe_eventq(struct efx_channel *channel)
349 {
350 struct efx_nic *efx = channel->efx;
351 unsigned long entries;
352
353 netif_dbg(efx, probe, efx->net_dev,
354 "chan %d create event queue\n", channel->channel);
355
356 /* Build an event queue with room for one event per tx and rx buffer,
357 * plus some extra for link state events and MCDI completions. */
358 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
359 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
360 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
361
362 return efx_nic_probe_eventq(channel);
363 }
364
365 /* Prepare channel's event queue */
366 static int efx_init_eventq(struct efx_channel *channel)
367 {
368 struct efx_nic *efx = channel->efx;
369 int rc;
370
371 EFX_WARN_ON_PARANOID(channel->eventq_init);
372
373 netif_dbg(efx, drv, efx->net_dev,
374 "chan %d init event queue\n", channel->channel);
375
376 rc = efx_nic_init_eventq(channel);
377 if (rc == 0) {
378 efx->type->push_irq_moderation(channel);
379 channel->eventq_read_ptr = 0;
380 channel->eventq_init = true;
381 }
382 return rc;
383 }
384
385 /* Enable event queue processing and NAPI */
386 void efx_start_eventq(struct efx_channel *channel)
387 {
388 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
389 "chan %d start event queue\n", channel->channel);
390
391 /* Make sure the NAPI handler sees the enabled flag set */
392 channel->enabled = true;
393 smp_wmb();
394
395 efx_channel_enable(channel);
396 napi_enable(&channel->napi_str);
397 efx_nic_eventq_read_ack(channel);
398 }
399
400 /* Disable event queue processing and NAPI */
401 void efx_stop_eventq(struct efx_channel *channel)
402 {
403 if (!channel->enabled)
404 return;
405
406 napi_disable(&channel->napi_str);
407 while (!efx_channel_disable(channel))
408 usleep_range(1000, 20000);
409 channel->enabled = false;
410 }
411
412 static void efx_fini_eventq(struct efx_channel *channel)
413 {
414 if (!channel->eventq_init)
415 return;
416
417 netif_dbg(channel->efx, drv, channel->efx->net_dev,
418 "chan %d fini event queue\n", channel->channel);
419
420 efx_nic_fini_eventq(channel);
421 channel->eventq_init = false;
422 }
423
424 static void efx_remove_eventq(struct efx_channel *channel)
425 {
426 netif_dbg(channel->efx, drv, channel->efx->net_dev,
427 "chan %d remove event queue\n", channel->channel);
428
429 efx_nic_remove_eventq(channel);
430 }
431
432 /**************************************************************************
433 *
434 * Channel handling
435 *
436 *************************************************************************/
437
438 /* Allocate and initialise a channel structure. */
439 static struct efx_channel *
440 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
441 {
442 struct efx_channel *channel;
443 struct efx_rx_queue *rx_queue;
444 struct efx_tx_queue *tx_queue;
445 int j;
446
447 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
448 if (!channel)
449 return NULL;
450
451 channel->efx = efx;
452 channel->channel = i;
453 channel->type = &efx_default_channel_type;
454
455 for (j = 0; j < EFX_TXQ_TYPES; j++) {
456 tx_queue = &channel->tx_queue[j];
457 tx_queue->efx = efx;
458 tx_queue->queue = i * EFX_TXQ_TYPES + j;
459 tx_queue->channel = channel;
460 }
461
462 rx_queue = &channel->rx_queue;
463 rx_queue->efx = efx;
464 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
465 (unsigned long)rx_queue);
466
467 return channel;
468 }
469
470 /* Allocate and initialise a channel structure, copying parameters
471 * (but not resources) from an old channel structure.
472 */
473 static struct efx_channel *
474 efx_copy_channel(const struct efx_channel *old_channel)
475 {
476 struct efx_channel *channel;
477 struct efx_rx_queue *rx_queue;
478 struct efx_tx_queue *tx_queue;
479 int j;
480
481 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
482 if (!channel)
483 return NULL;
484
485 *channel = *old_channel;
486
487 channel->napi_dev = NULL;
488 memset(&channel->eventq, 0, sizeof(channel->eventq));
489
490 for (j = 0; j < EFX_TXQ_TYPES; j++) {
491 tx_queue = &channel->tx_queue[j];
492 if (tx_queue->channel)
493 tx_queue->channel = channel;
494 tx_queue->buffer = NULL;
495 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
496 }
497
498 rx_queue = &channel->rx_queue;
499 rx_queue->buffer = NULL;
500 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
501 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
502 (unsigned long)rx_queue);
503
504 return channel;
505 }
506
507 static int efx_probe_channel(struct efx_channel *channel)
508 {
509 struct efx_tx_queue *tx_queue;
510 struct efx_rx_queue *rx_queue;
511 int rc;
512
513 netif_dbg(channel->efx, probe, channel->efx->net_dev,
514 "creating channel %d\n", channel->channel);
515
516 rc = channel->type->pre_probe(channel);
517 if (rc)
518 goto fail;
519
520 rc = efx_probe_eventq(channel);
521 if (rc)
522 goto fail;
523
524 efx_for_each_channel_tx_queue(tx_queue, channel) {
525 rc = efx_probe_tx_queue(tx_queue);
526 if (rc)
527 goto fail;
528 }
529
530 efx_for_each_channel_rx_queue(rx_queue, channel) {
531 rc = efx_probe_rx_queue(rx_queue);
532 if (rc)
533 goto fail;
534 }
535
536 return 0;
537
538 fail:
539 efx_remove_channel(channel);
540 return rc;
541 }
542
543 static void
544 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
545 {
546 struct efx_nic *efx = channel->efx;
547 const char *type;
548 int number;
549
550 number = channel->channel;
551 if (efx->tx_channel_offset == 0) {
552 type = "";
553 } else if (channel->channel < efx->tx_channel_offset) {
554 type = "-rx";
555 } else {
556 type = "-tx";
557 number -= efx->tx_channel_offset;
558 }
559 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
560 }
561
562 static void efx_set_channel_names(struct efx_nic *efx)
563 {
564 struct efx_channel *channel;
565
566 efx_for_each_channel(channel, efx)
567 channel->type->get_name(channel,
568 efx->msi_context[channel->channel].name,
569 sizeof(efx->msi_context[0].name));
570 }
571
572 static int efx_probe_channels(struct efx_nic *efx)
573 {
574 struct efx_channel *channel;
575 int rc;
576
577 /* Restart special buffer allocation */
578 efx->next_buffer_table = 0;
579
580 /* Probe channels in reverse, so that any 'extra' channels
581 * use the start of the buffer table. This allows the traffic
582 * channels to be resized without moving them or wasting the
583 * entries before them.
584 */
585 efx_for_each_channel_rev(channel, efx) {
586 rc = efx_probe_channel(channel);
587 if (rc) {
588 netif_err(efx, probe, efx->net_dev,
589 "failed to create channel %d\n",
590 channel->channel);
591 goto fail;
592 }
593 }
594 efx_set_channel_names(efx);
595
596 return 0;
597
598 fail:
599 efx_remove_channels(efx);
600 return rc;
601 }
602
603 /* Channels are shutdown and reinitialised whilst the NIC is running
604 * to propagate configuration changes (mtu, checksum offload), or
605 * to clear hardware error conditions
606 */
607 static void efx_start_datapath(struct efx_nic *efx)
608 {
609 netdev_features_t old_features = efx->net_dev->features;
610 bool old_rx_scatter = efx->rx_scatter;
611 struct efx_tx_queue *tx_queue;
612 struct efx_rx_queue *rx_queue;
613 struct efx_channel *channel;
614 size_t rx_buf_len;
615
616 /* Calculate the rx buffer allocation parameters required to
617 * support the current MTU, including padding for header
618 * alignment and overruns.
619 */
620 efx->rx_dma_len = (efx->rx_prefix_size +
621 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
622 efx->type->rx_buffer_padding);
623 rx_buf_len = (sizeof(struct efx_rx_page_state) +
624 efx->rx_ip_align + efx->rx_dma_len);
625 if (rx_buf_len <= PAGE_SIZE) {
626 efx->rx_scatter = efx->type->always_rx_scatter;
627 efx->rx_buffer_order = 0;
628 } else if (efx->type->can_rx_scatter) {
629 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
630 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
631 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
632 EFX_RX_BUF_ALIGNMENT) >
633 PAGE_SIZE);
634 efx->rx_scatter = true;
635 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
636 efx->rx_buffer_order = 0;
637 } else {
638 efx->rx_scatter = false;
639 efx->rx_buffer_order = get_order(rx_buf_len);
640 }
641
642 efx_rx_config_page_split(efx);
643 if (efx->rx_buffer_order)
644 netif_dbg(efx, drv, efx->net_dev,
645 "RX buf len=%u; page order=%u batch=%u\n",
646 efx->rx_dma_len, efx->rx_buffer_order,
647 efx->rx_pages_per_batch);
648 else
649 netif_dbg(efx, drv, efx->net_dev,
650 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
651 efx->rx_dma_len, efx->rx_page_buf_step,
652 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
653
654 /* Restore previously fixed features in hw_features and remove
655 * features which are fixed now
656 */
657 efx->net_dev->hw_features |= efx->net_dev->features;
658 efx->net_dev->hw_features &= ~efx->fixed_features;
659 efx->net_dev->features |= efx->fixed_features;
660 if (efx->net_dev->features != old_features)
661 netdev_features_change(efx->net_dev);
662
663 /* RX filters may also have scatter-enabled flags */
664 if (efx->rx_scatter != old_rx_scatter)
665 efx->type->filter_update_rx_scatter(efx);
666
667 /* We must keep at least one descriptor in a TX ring empty.
668 * We could avoid this when the queue size does not exactly
669 * match the hardware ring size, but it's not that important.
670 * Therefore we stop the queue when one more skb might fill
671 * the ring completely. We wake it when half way back to
672 * empty.
673 */
674 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
675 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
676
677 /* Initialise the channels */
678 efx_for_each_channel(channel, efx) {
679 efx_for_each_channel_tx_queue(tx_queue, channel) {
680 efx_init_tx_queue(tx_queue);
681 atomic_inc(&efx->active_queues);
682 }
683
684 efx_for_each_channel_rx_queue(rx_queue, channel) {
685 efx_init_rx_queue(rx_queue);
686 atomic_inc(&efx->active_queues);
687 efx_stop_eventq(channel);
688 efx_fast_push_rx_descriptors(rx_queue, false);
689 efx_start_eventq(channel);
690 }
691
692 WARN_ON(channel->rx_pkt_n_frags);
693 }
694
695 efx_ptp_start_datapath(efx);
696
697 if (netif_device_present(efx->net_dev))
698 netif_tx_wake_all_queues(efx->net_dev);
699 }
700
701 static void efx_stop_datapath(struct efx_nic *efx)
702 {
703 struct efx_channel *channel;
704 struct efx_tx_queue *tx_queue;
705 struct efx_rx_queue *rx_queue;
706 int rc;
707
708 EFX_ASSERT_RESET_SERIALISED(efx);
709 BUG_ON(efx->port_enabled);
710
711 efx_ptp_stop_datapath(efx);
712
713 /* Stop RX refill */
714 efx_for_each_channel(channel, efx) {
715 efx_for_each_channel_rx_queue(rx_queue, channel)
716 rx_queue->refill_enabled = false;
717 }
718
719 efx_for_each_channel(channel, efx) {
720 /* RX packet processing is pipelined, so wait for the
721 * NAPI handler to complete. At least event queue 0
722 * might be kept active by non-data events, so don't
723 * use napi_synchronize() but actually disable NAPI
724 * temporarily.
725 */
726 if (efx_channel_has_rx_queue(channel)) {
727 efx_stop_eventq(channel);
728 efx_start_eventq(channel);
729 }
730 }
731
732 rc = efx->type->fini_dmaq(efx);
733 if (rc && EFX_WORKAROUND_7803(efx)) {
734 /* Schedule a reset to recover from the flush failure. The
735 * descriptor caches reference memory we're about to free,
736 * but falcon_reconfigure_mac_wrapper() won't reconnect
737 * the MACs because of the pending reset.
738 */
739 netif_err(efx, drv, efx->net_dev,
740 "Resetting to recover from flush failure\n");
741 efx_schedule_reset(efx, RESET_TYPE_ALL);
742 } else if (rc) {
743 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
744 } else {
745 netif_dbg(efx, drv, efx->net_dev,
746 "successfully flushed all queues\n");
747 }
748
749 efx_for_each_channel(channel, efx) {
750 efx_for_each_channel_rx_queue(rx_queue, channel)
751 efx_fini_rx_queue(rx_queue);
752 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
753 efx_fini_tx_queue(tx_queue);
754 }
755 }
756
757 static void efx_remove_channel(struct efx_channel *channel)
758 {
759 struct efx_tx_queue *tx_queue;
760 struct efx_rx_queue *rx_queue;
761
762 netif_dbg(channel->efx, drv, channel->efx->net_dev,
763 "destroy chan %d\n", channel->channel);
764
765 efx_for_each_channel_rx_queue(rx_queue, channel)
766 efx_remove_rx_queue(rx_queue);
767 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
768 efx_remove_tx_queue(tx_queue);
769 efx_remove_eventq(channel);
770 channel->type->post_remove(channel);
771 }
772
773 static void efx_remove_channels(struct efx_nic *efx)
774 {
775 struct efx_channel *channel;
776
777 efx_for_each_channel(channel, efx)
778 efx_remove_channel(channel);
779 }
780
781 int
782 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
783 {
784 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
785 u32 old_rxq_entries, old_txq_entries;
786 unsigned i, next_buffer_table = 0;
787 int rc, rc2;
788
789 rc = efx_check_disabled(efx);
790 if (rc)
791 return rc;
792
793 /* Not all channels should be reallocated. We must avoid
794 * reallocating their buffer table entries.
795 */
796 efx_for_each_channel(channel, efx) {
797 struct efx_rx_queue *rx_queue;
798 struct efx_tx_queue *tx_queue;
799
800 if (channel->type->copy)
801 continue;
802 next_buffer_table = max(next_buffer_table,
803 channel->eventq.index +
804 channel->eventq.entries);
805 efx_for_each_channel_rx_queue(rx_queue, channel)
806 next_buffer_table = max(next_buffer_table,
807 rx_queue->rxd.index +
808 rx_queue->rxd.entries);
809 efx_for_each_channel_tx_queue(tx_queue, channel)
810 next_buffer_table = max(next_buffer_table,
811 tx_queue->txd.index +
812 tx_queue->txd.entries);
813 }
814
815 efx_device_detach_sync(efx);
816 efx_stop_all(efx);
817 efx_soft_disable_interrupts(efx);
818
819 /* Clone channels (where possible) */
820 memset(other_channel, 0, sizeof(other_channel));
821 for (i = 0; i < efx->n_channels; i++) {
822 channel = efx->channel[i];
823 if (channel->type->copy)
824 channel = channel->type->copy(channel);
825 if (!channel) {
826 rc = -ENOMEM;
827 goto out;
828 }
829 other_channel[i] = channel;
830 }
831
832 /* Swap entry counts and channel pointers */
833 old_rxq_entries = efx->rxq_entries;
834 old_txq_entries = efx->txq_entries;
835 efx->rxq_entries = rxq_entries;
836 efx->txq_entries = txq_entries;
837 for (i = 0; i < efx->n_channels; i++) {
838 channel = efx->channel[i];
839 efx->channel[i] = other_channel[i];
840 other_channel[i] = channel;
841 }
842
843 /* Restart buffer table allocation */
844 efx->next_buffer_table = next_buffer_table;
845
846 for (i = 0; i < efx->n_channels; i++) {
847 channel = efx->channel[i];
848 if (!channel->type->copy)
849 continue;
850 rc = efx_probe_channel(channel);
851 if (rc)
852 goto rollback;
853 efx_init_napi_channel(efx->channel[i]);
854 }
855
856 out:
857 /* Destroy unused channel structures */
858 for (i = 0; i < efx->n_channels; i++) {
859 channel = other_channel[i];
860 if (channel && channel->type->copy) {
861 efx_fini_napi_channel(channel);
862 efx_remove_channel(channel);
863 kfree(channel);
864 }
865 }
866
867 rc2 = efx_soft_enable_interrupts(efx);
868 if (rc2) {
869 rc = rc ? rc : rc2;
870 netif_err(efx, drv, efx->net_dev,
871 "unable to restart interrupts on channel reallocation\n");
872 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
873 } else {
874 efx_start_all(efx);
875 netif_device_attach(efx->net_dev);
876 }
877 return rc;
878
879 rollback:
880 /* Swap back */
881 efx->rxq_entries = old_rxq_entries;
882 efx->txq_entries = old_txq_entries;
883 for (i = 0; i < efx->n_channels; i++) {
884 channel = efx->channel[i];
885 efx->channel[i] = other_channel[i];
886 other_channel[i] = channel;
887 }
888 goto out;
889 }
890
891 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
892 {
893 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
894 }
895
896 static const struct efx_channel_type efx_default_channel_type = {
897 .pre_probe = efx_channel_dummy_op_int,
898 .post_remove = efx_channel_dummy_op_void,
899 .get_name = efx_get_channel_name,
900 .copy = efx_copy_channel,
901 .keep_eventq = false,
902 };
903
904 int efx_channel_dummy_op_int(struct efx_channel *channel)
905 {
906 return 0;
907 }
908
909 void efx_channel_dummy_op_void(struct efx_channel *channel)
910 {
911 }
912
913 /**************************************************************************
914 *
915 * Port handling
916 *
917 **************************************************************************/
918
919 /* This ensures that the kernel is kept informed (via
920 * netif_carrier_on/off) of the link status, and also maintains the
921 * link status's stop on the port's TX queue.
922 */
923 void efx_link_status_changed(struct efx_nic *efx)
924 {
925 struct efx_link_state *link_state = &efx->link_state;
926
927 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
928 * that no events are triggered between unregister_netdev() and the
929 * driver unloading. A more general condition is that NETDEV_CHANGE
930 * can only be generated between NETDEV_UP and NETDEV_DOWN */
931 if (!netif_running(efx->net_dev))
932 return;
933
934 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
935 efx->n_link_state_changes++;
936
937 if (link_state->up)
938 netif_carrier_on(efx->net_dev);
939 else
940 netif_carrier_off(efx->net_dev);
941 }
942
943 /* Status message for kernel log */
944 if (link_state->up)
945 netif_info(efx, link, efx->net_dev,
946 "link up at %uMbps %s-duplex (MTU %d)\n",
947 link_state->speed, link_state->fd ? "full" : "half",
948 efx->net_dev->mtu);
949 else
950 netif_info(efx, link, efx->net_dev, "link down\n");
951 }
952
953 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
954 {
955 efx->link_advertising = advertising;
956 if (advertising) {
957 if (advertising & ADVERTISED_Pause)
958 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
959 else
960 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
961 if (advertising & ADVERTISED_Asym_Pause)
962 efx->wanted_fc ^= EFX_FC_TX;
963 }
964 }
965
966 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
967 {
968 efx->wanted_fc = wanted_fc;
969 if (efx->link_advertising) {
970 if (wanted_fc & EFX_FC_RX)
971 efx->link_advertising |= (ADVERTISED_Pause |
972 ADVERTISED_Asym_Pause);
973 else
974 efx->link_advertising &= ~(ADVERTISED_Pause |
975 ADVERTISED_Asym_Pause);
976 if (wanted_fc & EFX_FC_TX)
977 efx->link_advertising ^= ADVERTISED_Asym_Pause;
978 }
979 }
980
981 static void efx_fini_port(struct efx_nic *efx);
982
983 /* We assume that efx->type->reconfigure_mac will always try to sync RX
984 * filters and therefore needs to read-lock the filter table against freeing
985 */
986 void efx_mac_reconfigure(struct efx_nic *efx)
987 {
988 down_read(&efx->filter_sem);
989 efx->type->reconfigure_mac(efx);
990 up_read(&efx->filter_sem);
991 }
992
993 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
994 * the MAC appropriately. All other PHY configuration changes are pushed
995 * through phy_op->set_settings(), and pushed asynchronously to the MAC
996 * through efx_monitor().
997 *
998 * Callers must hold the mac_lock
999 */
1000 int __efx_reconfigure_port(struct efx_nic *efx)
1001 {
1002 enum efx_phy_mode phy_mode;
1003 int rc;
1004
1005 WARN_ON(!mutex_is_locked(&efx->mac_lock));
1006
1007 /* Disable PHY transmit in mac level loopbacks */
1008 phy_mode = efx->phy_mode;
1009 if (LOOPBACK_INTERNAL(efx))
1010 efx->phy_mode |= PHY_MODE_TX_DISABLED;
1011 else
1012 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
1013
1014 rc = efx->type->reconfigure_port(efx);
1015
1016 if (rc)
1017 efx->phy_mode = phy_mode;
1018
1019 return rc;
1020 }
1021
1022 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1023 * disabled. */
1024 int efx_reconfigure_port(struct efx_nic *efx)
1025 {
1026 int rc;
1027
1028 EFX_ASSERT_RESET_SERIALISED(efx);
1029
1030 mutex_lock(&efx->mac_lock);
1031 rc = __efx_reconfigure_port(efx);
1032 mutex_unlock(&efx->mac_lock);
1033
1034 return rc;
1035 }
1036
1037 /* Asynchronous work item for changing MAC promiscuity and multicast
1038 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1039 * MAC directly. */
1040 static void efx_mac_work(struct work_struct *data)
1041 {
1042 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1043
1044 mutex_lock(&efx->mac_lock);
1045 if (efx->port_enabled)
1046 efx_mac_reconfigure(efx);
1047 mutex_unlock(&efx->mac_lock);
1048 }
1049
1050 static int efx_probe_port(struct efx_nic *efx)
1051 {
1052 int rc;
1053
1054 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1055
1056 if (phy_flash_cfg)
1057 efx->phy_mode = PHY_MODE_SPECIAL;
1058
1059 /* Connect up MAC/PHY operations table */
1060 rc = efx->type->probe_port(efx);
1061 if (rc)
1062 return rc;
1063
1064 /* Initialise MAC address to permanent address */
1065 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1066
1067 return 0;
1068 }
1069
1070 static int efx_init_port(struct efx_nic *efx)
1071 {
1072 int rc;
1073
1074 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1075
1076 mutex_lock(&efx->mac_lock);
1077
1078 rc = efx->phy_op->init(efx);
1079 if (rc)
1080 goto fail1;
1081
1082 efx->port_initialized = true;
1083
1084 /* Reconfigure the MAC before creating dma queues (required for
1085 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1086 efx_mac_reconfigure(efx);
1087
1088 /* Ensure the PHY advertises the correct flow control settings */
1089 rc = efx->phy_op->reconfigure(efx);
1090 if (rc && rc != -EPERM)
1091 goto fail2;
1092
1093 mutex_unlock(&efx->mac_lock);
1094 return 0;
1095
1096 fail2:
1097 efx->phy_op->fini(efx);
1098 fail1:
1099 mutex_unlock(&efx->mac_lock);
1100 return rc;
1101 }
1102
1103 static void efx_start_port(struct efx_nic *efx)
1104 {
1105 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1106 BUG_ON(efx->port_enabled);
1107
1108 mutex_lock(&efx->mac_lock);
1109 efx->port_enabled = true;
1110
1111 /* Ensure MAC ingress/egress is enabled */
1112 efx_mac_reconfigure(efx);
1113
1114 mutex_unlock(&efx->mac_lock);
1115 }
1116
1117 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1118 * and the async self-test, wait for them to finish and prevent them
1119 * being scheduled again. This doesn't cover online resets, which
1120 * should only be cancelled when removing the device.
1121 */
1122 static void efx_stop_port(struct efx_nic *efx)
1123 {
1124 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1125
1126 EFX_ASSERT_RESET_SERIALISED(efx);
1127
1128 mutex_lock(&efx->mac_lock);
1129 efx->port_enabled = false;
1130 mutex_unlock(&efx->mac_lock);
1131
1132 /* Serialise against efx_set_multicast_list() */
1133 netif_addr_lock_bh(efx->net_dev);
1134 netif_addr_unlock_bh(efx->net_dev);
1135
1136 cancel_delayed_work_sync(&efx->monitor_work);
1137 efx_selftest_async_cancel(efx);
1138 cancel_work_sync(&efx->mac_work);
1139 }
1140
1141 static void efx_fini_port(struct efx_nic *efx)
1142 {
1143 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1144
1145 if (!efx->port_initialized)
1146 return;
1147
1148 efx->phy_op->fini(efx);
1149 efx->port_initialized = false;
1150
1151 efx->link_state.up = false;
1152 efx_link_status_changed(efx);
1153 }
1154
1155 static void efx_remove_port(struct efx_nic *efx)
1156 {
1157 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1158
1159 efx->type->remove_port(efx);
1160 }
1161
1162 /**************************************************************************
1163 *
1164 * NIC handling
1165 *
1166 **************************************************************************/
1167
1168 static LIST_HEAD(efx_primary_list);
1169 static LIST_HEAD(efx_unassociated_list);
1170
1171 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1172 {
1173 return left->type == right->type &&
1174 left->vpd_sn && right->vpd_sn &&
1175 !strcmp(left->vpd_sn, right->vpd_sn);
1176 }
1177
1178 static void efx_associate(struct efx_nic *efx)
1179 {
1180 struct efx_nic *other, *next;
1181
1182 if (efx->primary == efx) {
1183 /* Adding primary function; look for secondaries */
1184
1185 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1186 list_add_tail(&efx->node, &efx_primary_list);
1187
1188 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1189 node) {
1190 if (efx_same_controller(efx, other)) {
1191 list_del(&other->node);
1192 netif_dbg(other, probe, other->net_dev,
1193 "moving to secondary list of %s %s\n",
1194 pci_name(efx->pci_dev),
1195 efx->net_dev->name);
1196 list_add_tail(&other->node,
1197 &efx->secondary_list);
1198 other->primary = efx;
1199 }
1200 }
1201 } else {
1202 /* Adding secondary function; look for primary */
1203
1204 list_for_each_entry(other, &efx_primary_list, node) {
1205 if (efx_same_controller(efx, other)) {
1206 netif_dbg(efx, probe, efx->net_dev,
1207 "adding to secondary list of %s %s\n",
1208 pci_name(other->pci_dev),
1209 other->net_dev->name);
1210 list_add_tail(&efx->node,
1211 &other->secondary_list);
1212 efx->primary = other;
1213 return;
1214 }
1215 }
1216
1217 netif_dbg(efx, probe, efx->net_dev,
1218 "adding to unassociated list\n");
1219 list_add_tail(&efx->node, &efx_unassociated_list);
1220 }
1221 }
1222
1223 static void efx_dissociate(struct efx_nic *efx)
1224 {
1225 struct efx_nic *other, *next;
1226
1227 list_del(&efx->node);
1228 efx->primary = NULL;
1229
1230 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1231 list_del(&other->node);
1232 netif_dbg(other, probe, other->net_dev,
1233 "moving to unassociated list\n");
1234 list_add_tail(&other->node, &efx_unassociated_list);
1235 other->primary = NULL;
1236 }
1237 }
1238
1239 /* This configures the PCI device to enable I/O and DMA. */
1240 static int efx_init_io(struct efx_nic *efx)
1241 {
1242 struct pci_dev *pci_dev = efx->pci_dev;
1243 dma_addr_t dma_mask = efx->type->max_dma_mask;
1244 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1245 int rc, bar;
1246
1247 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1248
1249 bar = efx->type->mem_bar;
1250
1251 rc = pci_enable_device(pci_dev);
1252 if (rc) {
1253 netif_err(efx, probe, efx->net_dev,
1254 "failed to enable PCI device\n");
1255 goto fail1;
1256 }
1257
1258 pci_set_master(pci_dev);
1259
1260 /* Set the PCI DMA mask. Try all possibilities from our
1261 * genuine mask down to 32 bits, because some architectures
1262 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1263 * masks event though they reject 46 bit masks.
1264 */
1265 while (dma_mask > 0x7fffffffUL) {
1266 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1267 if (rc == 0)
1268 break;
1269 dma_mask >>= 1;
1270 }
1271 if (rc) {
1272 netif_err(efx, probe, efx->net_dev,
1273 "could not find a suitable DMA mask\n");
1274 goto fail2;
1275 }
1276 netif_dbg(efx, probe, efx->net_dev,
1277 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1278
1279 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1280 rc = pci_request_region(pci_dev, bar, "sfc");
1281 if (rc) {
1282 netif_err(efx, probe, efx->net_dev,
1283 "request for memory BAR failed\n");
1284 rc = -EIO;
1285 goto fail3;
1286 }
1287 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1288 if (!efx->membase) {
1289 netif_err(efx, probe, efx->net_dev,
1290 "could not map memory BAR at %llx+%x\n",
1291 (unsigned long long)efx->membase_phys, mem_map_size);
1292 rc = -ENOMEM;
1293 goto fail4;
1294 }
1295 netif_dbg(efx, probe, efx->net_dev,
1296 "memory BAR at %llx+%x (virtual %p)\n",
1297 (unsigned long long)efx->membase_phys, mem_map_size,
1298 efx->membase);
1299
1300 return 0;
1301
1302 fail4:
1303 pci_release_region(efx->pci_dev, bar);
1304 fail3:
1305 efx->membase_phys = 0;
1306 fail2:
1307 pci_disable_device(efx->pci_dev);
1308 fail1:
1309 return rc;
1310 }
1311
1312 static void efx_fini_io(struct efx_nic *efx)
1313 {
1314 int bar;
1315
1316 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1317
1318 if (efx->membase) {
1319 iounmap(efx->membase);
1320 efx->membase = NULL;
1321 }
1322
1323 if (efx->membase_phys) {
1324 bar = efx->type->mem_bar;
1325 pci_release_region(efx->pci_dev, bar);
1326 efx->membase_phys = 0;
1327 }
1328
1329 /* Don't disable bus-mastering if VFs are assigned */
1330 if (!pci_vfs_assigned(efx->pci_dev))
1331 pci_disable_device(efx->pci_dev);
1332 }
1333
1334 void efx_set_default_rx_indir_table(struct efx_nic *efx)
1335 {
1336 size_t i;
1337
1338 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1339 efx->rx_indir_table[i] =
1340 ethtool_rxfh_indir_default(i, efx->rss_spread);
1341 }
1342
1343 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1344 {
1345 cpumask_var_t thread_mask;
1346 unsigned int count;
1347 int cpu;
1348
1349 if (rss_cpus) {
1350 count = rss_cpus;
1351 } else {
1352 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1353 netif_warn(efx, probe, efx->net_dev,
1354 "RSS disabled due to allocation failure\n");
1355 return 1;
1356 }
1357
1358 count = 0;
1359 for_each_online_cpu(cpu) {
1360 if (!cpumask_test_cpu(cpu, thread_mask)) {
1361 ++count;
1362 cpumask_or(thread_mask, thread_mask,
1363 topology_sibling_cpumask(cpu));
1364 }
1365 }
1366
1367 free_cpumask_var(thread_mask);
1368 }
1369
1370 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1371 * table entries that are inaccessible to VFs
1372 */
1373 #ifdef CONFIG_SFC_SRIOV
1374 if (efx->type->sriov_wanted) {
1375 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1376 count > efx_vf_size(efx)) {
1377 netif_warn(efx, probe, efx->net_dev,
1378 "Reducing number of RSS channels from %u to %u for "
1379 "VF support. Increase vf-msix-limit to use more "
1380 "channels on the PF.\n",
1381 count, efx_vf_size(efx));
1382 count = efx_vf_size(efx);
1383 }
1384 }
1385 #endif
1386
1387 return count;
1388 }
1389
1390 /* Probe the number and type of interrupts we are able to obtain, and
1391 * the resulting numbers of channels and RX queues.
1392 */
1393 static int efx_probe_interrupts(struct efx_nic *efx)
1394 {
1395 unsigned int extra_channels = 0;
1396 unsigned int i, j;
1397 int rc;
1398
1399 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1400 if (efx->extra_channel_type[i])
1401 ++extra_channels;
1402
1403 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1404 struct msix_entry xentries[EFX_MAX_CHANNELS];
1405 unsigned int n_channels;
1406
1407 n_channels = efx_wanted_parallelism(efx);
1408 if (efx_separate_tx_channels)
1409 n_channels *= 2;
1410 n_channels += extra_channels;
1411 n_channels = min(n_channels, efx->max_channels);
1412
1413 for (i = 0; i < n_channels; i++)
1414 xentries[i].entry = i;
1415 rc = pci_enable_msix_range(efx->pci_dev,
1416 xentries, 1, n_channels);
1417 if (rc < 0) {
1418 /* Fall back to single channel MSI */
1419 efx->interrupt_mode = EFX_INT_MODE_MSI;
1420 netif_err(efx, drv, efx->net_dev,
1421 "could not enable MSI-X\n");
1422 } else if (rc < n_channels) {
1423 netif_err(efx, drv, efx->net_dev,
1424 "WARNING: Insufficient MSI-X vectors"
1425 " available (%d < %u).\n", rc, n_channels);
1426 netif_err(efx, drv, efx->net_dev,
1427 "WARNING: Performance may be reduced.\n");
1428 n_channels = rc;
1429 }
1430
1431 if (rc > 0) {
1432 efx->n_channels = n_channels;
1433 if (n_channels > extra_channels)
1434 n_channels -= extra_channels;
1435 if (efx_separate_tx_channels) {
1436 efx->n_tx_channels = min(max(n_channels / 2,
1437 1U),
1438 efx->max_tx_channels);
1439 efx->n_rx_channels = max(n_channels -
1440 efx->n_tx_channels,
1441 1U);
1442 } else {
1443 efx->n_tx_channels = min(n_channels,
1444 efx->max_tx_channels);
1445 efx->n_rx_channels = n_channels;
1446 }
1447 for (i = 0; i < efx->n_channels; i++)
1448 efx_get_channel(efx, i)->irq =
1449 xentries[i].vector;
1450 }
1451 }
1452
1453 /* Try single interrupt MSI */
1454 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1455 efx->n_channels = 1;
1456 efx->n_rx_channels = 1;
1457 efx->n_tx_channels = 1;
1458 rc = pci_enable_msi(efx->pci_dev);
1459 if (rc == 0) {
1460 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1461 } else {
1462 netif_err(efx, drv, efx->net_dev,
1463 "could not enable MSI\n");
1464 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1465 }
1466 }
1467
1468 /* Assume legacy interrupts */
1469 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1470 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1471 efx->n_rx_channels = 1;
1472 efx->n_tx_channels = 1;
1473 efx->legacy_irq = efx->pci_dev->irq;
1474 }
1475
1476 /* Assign extra channels if possible */
1477 j = efx->n_channels;
1478 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1479 if (!efx->extra_channel_type[i])
1480 continue;
1481 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1482 efx->n_channels <= extra_channels) {
1483 efx->extra_channel_type[i]->handle_no_channel(efx);
1484 } else {
1485 --j;
1486 efx_get_channel(efx, j)->type =
1487 efx->extra_channel_type[i];
1488 }
1489 }
1490
1491 /* RSS might be usable on VFs even if it is disabled on the PF */
1492 #ifdef CONFIG_SFC_SRIOV
1493 if (efx->type->sriov_wanted) {
1494 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1495 !efx->type->sriov_wanted(efx)) ?
1496 efx->n_rx_channels : efx_vf_size(efx));
1497 return 0;
1498 }
1499 #endif
1500 efx->rss_spread = efx->n_rx_channels;
1501
1502 return 0;
1503 }
1504
1505 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1506 {
1507 struct efx_channel *channel, *end_channel;
1508 int rc;
1509
1510 BUG_ON(efx->state == STATE_DISABLED);
1511
1512 efx->irq_soft_enabled = true;
1513 smp_wmb();
1514
1515 efx_for_each_channel(channel, efx) {
1516 if (!channel->type->keep_eventq) {
1517 rc = efx_init_eventq(channel);
1518 if (rc)
1519 goto fail;
1520 }
1521 efx_start_eventq(channel);
1522 }
1523
1524 efx_mcdi_mode_event(efx);
1525
1526 return 0;
1527 fail:
1528 end_channel = channel;
1529 efx_for_each_channel(channel, efx) {
1530 if (channel == end_channel)
1531 break;
1532 efx_stop_eventq(channel);
1533 if (!channel->type->keep_eventq)
1534 efx_fini_eventq(channel);
1535 }
1536
1537 return rc;
1538 }
1539
1540 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1541 {
1542 struct efx_channel *channel;
1543
1544 if (efx->state == STATE_DISABLED)
1545 return;
1546
1547 efx_mcdi_mode_poll(efx);
1548
1549 efx->irq_soft_enabled = false;
1550 smp_wmb();
1551
1552 if (efx->legacy_irq)
1553 synchronize_irq(efx->legacy_irq);
1554
1555 efx_for_each_channel(channel, efx) {
1556 if (channel->irq)
1557 synchronize_irq(channel->irq);
1558
1559 efx_stop_eventq(channel);
1560 if (!channel->type->keep_eventq)
1561 efx_fini_eventq(channel);
1562 }
1563
1564 /* Flush the asynchronous MCDI request queue */
1565 efx_mcdi_flush_async(efx);
1566 }
1567
1568 static int efx_enable_interrupts(struct efx_nic *efx)
1569 {
1570 struct efx_channel *channel, *end_channel;
1571 int rc;
1572
1573 BUG_ON(efx->state == STATE_DISABLED);
1574
1575 if (efx->eeh_disabled_legacy_irq) {
1576 enable_irq(efx->legacy_irq);
1577 efx->eeh_disabled_legacy_irq = false;
1578 }
1579
1580 efx->type->irq_enable_master(efx);
1581
1582 efx_for_each_channel(channel, efx) {
1583 if (channel->type->keep_eventq) {
1584 rc = efx_init_eventq(channel);
1585 if (rc)
1586 goto fail;
1587 }
1588 }
1589
1590 rc = efx_soft_enable_interrupts(efx);
1591 if (rc)
1592 goto fail;
1593
1594 return 0;
1595
1596 fail:
1597 end_channel = channel;
1598 efx_for_each_channel(channel, efx) {
1599 if (channel == end_channel)
1600 break;
1601 if (channel->type->keep_eventq)
1602 efx_fini_eventq(channel);
1603 }
1604
1605 efx->type->irq_disable_non_ev(efx);
1606
1607 return rc;
1608 }
1609
1610 static void efx_disable_interrupts(struct efx_nic *efx)
1611 {
1612 struct efx_channel *channel;
1613
1614 efx_soft_disable_interrupts(efx);
1615
1616 efx_for_each_channel(channel, efx) {
1617 if (channel->type->keep_eventq)
1618 efx_fini_eventq(channel);
1619 }
1620
1621 efx->type->irq_disable_non_ev(efx);
1622 }
1623
1624 static void efx_remove_interrupts(struct efx_nic *efx)
1625 {
1626 struct efx_channel *channel;
1627
1628 /* Remove MSI/MSI-X interrupts */
1629 efx_for_each_channel(channel, efx)
1630 channel->irq = 0;
1631 pci_disable_msi(efx->pci_dev);
1632 pci_disable_msix(efx->pci_dev);
1633
1634 /* Remove legacy interrupt */
1635 efx->legacy_irq = 0;
1636 }
1637
1638 static void efx_set_channels(struct efx_nic *efx)
1639 {
1640 struct efx_channel *channel;
1641 struct efx_tx_queue *tx_queue;
1642
1643 efx->tx_channel_offset =
1644 efx_separate_tx_channels ?
1645 efx->n_channels - efx->n_tx_channels : 0;
1646
1647 /* We need to mark which channels really have RX and TX
1648 * queues, and adjust the TX queue numbers if we have separate
1649 * RX-only and TX-only channels.
1650 */
1651 efx_for_each_channel(channel, efx) {
1652 if (channel->channel < efx->n_rx_channels)
1653 channel->rx_queue.core_index = channel->channel;
1654 else
1655 channel->rx_queue.core_index = -1;
1656
1657 efx_for_each_channel_tx_queue(tx_queue, channel)
1658 tx_queue->queue -= (efx->tx_channel_offset *
1659 EFX_TXQ_TYPES);
1660 }
1661 }
1662
1663 static int efx_probe_nic(struct efx_nic *efx)
1664 {
1665 int rc;
1666
1667 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1668
1669 /* Carry out hardware-type specific initialisation */
1670 rc = efx->type->probe(efx);
1671 if (rc)
1672 return rc;
1673
1674 do {
1675 if (!efx->max_channels || !efx->max_tx_channels) {
1676 netif_err(efx, drv, efx->net_dev,
1677 "Insufficient resources to allocate"
1678 " any channels\n");
1679 rc = -ENOSPC;
1680 goto fail1;
1681 }
1682
1683 /* Determine the number of channels and queues by trying
1684 * to hook in MSI-X interrupts.
1685 */
1686 rc = efx_probe_interrupts(efx);
1687 if (rc)
1688 goto fail1;
1689
1690 efx_set_channels(efx);
1691
1692 /* dimension_resources can fail with EAGAIN */
1693 rc = efx->type->dimension_resources(efx);
1694 if (rc != 0 && rc != -EAGAIN)
1695 goto fail2;
1696
1697 if (rc == -EAGAIN)
1698 /* try again with new max_channels */
1699 efx_remove_interrupts(efx);
1700
1701 } while (rc == -EAGAIN);
1702
1703 if (efx->n_channels > 1)
1704 netdev_rss_key_fill(&efx->rx_hash_key,
1705 sizeof(efx->rx_hash_key));
1706 efx_set_default_rx_indir_table(efx);
1707
1708 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1709 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1710
1711 /* Initialise the interrupt moderation settings */
1712 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1713 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1714 true);
1715
1716 return 0;
1717
1718 fail2:
1719 efx_remove_interrupts(efx);
1720 fail1:
1721 efx->type->remove(efx);
1722 return rc;
1723 }
1724
1725 static void efx_remove_nic(struct efx_nic *efx)
1726 {
1727 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1728
1729 efx_remove_interrupts(efx);
1730 efx->type->remove(efx);
1731 }
1732
1733 static int efx_probe_filters(struct efx_nic *efx)
1734 {
1735 int rc;
1736
1737 spin_lock_init(&efx->filter_lock);
1738 init_rwsem(&efx->filter_sem);
1739 mutex_lock(&efx->mac_lock);
1740 down_write(&efx->filter_sem);
1741 rc = efx->type->filter_table_probe(efx);
1742 if (rc)
1743 goto out_unlock;
1744
1745 #ifdef CONFIG_RFS_ACCEL
1746 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1747 struct efx_channel *channel;
1748 int i, success = 1;
1749
1750 efx_for_each_channel(channel, efx) {
1751 channel->rps_flow_id =
1752 kcalloc(efx->type->max_rx_ip_filters,
1753 sizeof(*channel->rps_flow_id),
1754 GFP_KERNEL);
1755 if (!channel->rps_flow_id)
1756 success = 0;
1757 else
1758 for (i = 0;
1759 i < efx->type->max_rx_ip_filters;
1760 ++i)
1761 channel->rps_flow_id[i] =
1762 RPS_FLOW_ID_INVALID;
1763 }
1764
1765 if (!success) {
1766 efx_for_each_channel(channel, efx)
1767 kfree(channel->rps_flow_id);
1768 efx->type->filter_table_remove(efx);
1769 rc = -ENOMEM;
1770 goto out_unlock;
1771 }
1772
1773 efx->rps_expire_index = efx->rps_expire_channel = 0;
1774 }
1775 #endif
1776 out_unlock:
1777 up_write(&efx->filter_sem);
1778 mutex_unlock(&efx->mac_lock);
1779 return rc;
1780 }
1781
1782 static void efx_remove_filters(struct efx_nic *efx)
1783 {
1784 #ifdef CONFIG_RFS_ACCEL
1785 struct efx_channel *channel;
1786
1787 efx_for_each_channel(channel, efx)
1788 kfree(channel->rps_flow_id);
1789 #endif
1790 down_write(&efx->filter_sem);
1791 efx->type->filter_table_remove(efx);
1792 up_write(&efx->filter_sem);
1793 }
1794
1795 static void efx_restore_filters(struct efx_nic *efx)
1796 {
1797 down_read(&efx->filter_sem);
1798 efx->type->filter_table_restore(efx);
1799 up_read(&efx->filter_sem);
1800 }
1801
1802 /**************************************************************************
1803 *
1804 * NIC startup/shutdown
1805 *
1806 *************************************************************************/
1807
1808 static int efx_probe_all(struct efx_nic *efx)
1809 {
1810 int rc;
1811
1812 rc = efx_probe_nic(efx);
1813 if (rc) {
1814 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1815 goto fail1;
1816 }
1817
1818 rc = efx_probe_port(efx);
1819 if (rc) {
1820 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1821 goto fail2;
1822 }
1823
1824 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1825 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1826 rc = -EINVAL;
1827 goto fail3;
1828 }
1829 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1830
1831 #ifdef CONFIG_SFC_SRIOV
1832 rc = efx->type->vswitching_probe(efx);
1833 if (rc) /* not fatal; the PF will still work fine */
1834 netif_warn(efx, probe, efx->net_dev,
1835 "failed to setup vswitching rc=%d;"
1836 " VFs may not function\n", rc);
1837 #endif
1838
1839 rc = efx_probe_filters(efx);
1840 if (rc) {
1841 netif_err(efx, probe, efx->net_dev,
1842 "failed to create filter tables\n");
1843 goto fail4;
1844 }
1845
1846 rc = efx_probe_channels(efx);
1847 if (rc)
1848 goto fail5;
1849
1850 return 0;
1851
1852 fail5:
1853 efx_remove_filters(efx);
1854 fail4:
1855 #ifdef CONFIG_SFC_SRIOV
1856 efx->type->vswitching_remove(efx);
1857 #endif
1858 fail3:
1859 efx_remove_port(efx);
1860 fail2:
1861 efx_remove_nic(efx);
1862 fail1:
1863 return rc;
1864 }
1865
1866 /* If the interface is supposed to be running but is not, start
1867 * the hardware and software data path, regular activity for the port
1868 * (MAC statistics, link polling, etc.) and schedule the port to be
1869 * reconfigured. Interrupts must already be enabled. This function
1870 * is safe to call multiple times, so long as the NIC is not disabled.
1871 * Requires the RTNL lock.
1872 */
1873 static void efx_start_all(struct efx_nic *efx)
1874 {
1875 EFX_ASSERT_RESET_SERIALISED(efx);
1876 BUG_ON(efx->state == STATE_DISABLED);
1877
1878 /* Check that it is appropriate to restart the interface. All
1879 * of these flags are safe to read under just the rtnl lock */
1880 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1881 efx->reset_pending)
1882 return;
1883
1884 efx_start_port(efx);
1885 efx_start_datapath(efx);
1886
1887 /* Start the hardware monitor if there is one */
1888 if (efx->type->monitor != NULL)
1889 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1890 efx_monitor_interval);
1891
1892 /* If link state detection is normally event-driven, we have
1893 * to poll now because we could have missed a change
1894 */
1895 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1896 mutex_lock(&efx->mac_lock);
1897 if (efx->phy_op->poll(efx))
1898 efx_link_status_changed(efx);
1899 mutex_unlock(&efx->mac_lock);
1900 }
1901
1902 efx->type->start_stats(efx);
1903 efx->type->pull_stats(efx);
1904 spin_lock_bh(&efx->stats_lock);
1905 efx->type->update_stats(efx, NULL, NULL);
1906 spin_unlock_bh(&efx->stats_lock);
1907 }
1908
1909 /* Quiesce the hardware and software data path, and regular activity
1910 * for the port without bringing the link down. Safe to call multiple
1911 * times with the NIC in almost any state, but interrupts should be
1912 * enabled. Requires the RTNL lock.
1913 */
1914 static void efx_stop_all(struct efx_nic *efx)
1915 {
1916 EFX_ASSERT_RESET_SERIALISED(efx);
1917
1918 /* port_enabled can be read safely under the rtnl lock */
1919 if (!efx->port_enabled)
1920 return;
1921
1922 /* update stats before we go down so we can accurately count
1923 * rx_nodesc_drops
1924 */
1925 efx->type->pull_stats(efx);
1926 spin_lock_bh(&efx->stats_lock);
1927 efx->type->update_stats(efx, NULL, NULL);
1928 spin_unlock_bh(&efx->stats_lock);
1929 efx->type->stop_stats(efx);
1930 efx_stop_port(efx);
1931
1932 /* Stop the kernel transmit interface. This is only valid if
1933 * the device is stopped or detached; otherwise the watchdog
1934 * may fire immediately.
1935 */
1936 WARN_ON(netif_running(efx->net_dev) &&
1937 netif_device_present(efx->net_dev));
1938 netif_tx_disable(efx->net_dev);
1939
1940 efx_stop_datapath(efx);
1941 }
1942
1943 static void efx_remove_all(struct efx_nic *efx)
1944 {
1945 efx_remove_channels(efx);
1946 efx_remove_filters(efx);
1947 #ifdef CONFIG_SFC_SRIOV
1948 efx->type->vswitching_remove(efx);
1949 #endif
1950 efx_remove_port(efx);
1951 efx_remove_nic(efx);
1952 }
1953
1954 /**************************************************************************
1955 *
1956 * Interrupt moderation
1957 *
1958 **************************************************************************/
1959 unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
1960 {
1961 if (usecs == 0)
1962 return 0;
1963 if (usecs * 1000 < efx->timer_quantum_ns)
1964 return 1; /* never round down to 0 */
1965 return usecs * 1000 / efx->timer_quantum_ns;
1966 }
1967
1968 unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
1969 {
1970 /* We must round up when converting ticks to microseconds
1971 * because we round down when converting the other way.
1972 */
1973 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
1974 }
1975
1976 /* Set interrupt moderation parameters */
1977 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1978 unsigned int rx_usecs, bool rx_adaptive,
1979 bool rx_may_override_tx)
1980 {
1981 struct efx_channel *channel;
1982 unsigned int timer_max_us;
1983
1984 EFX_ASSERT_RESET_SERIALISED(efx);
1985
1986 timer_max_us = efx->timer_max_ns / 1000;
1987
1988 if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
1989 return -EINVAL;
1990
1991 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
1992 !rx_may_override_tx) {
1993 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1994 "RX and TX IRQ moderation must be equal\n");
1995 return -EINVAL;
1996 }
1997
1998 efx->irq_rx_adaptive = rx_adaptive;
1999 efx->irq_rx_moderation_us = rx_usecs;
2000 efx_for_each_channel(channel, efx) {
2001 if (efx_channel_has_rx_queue(channel))
2002 channel->irq_moderation_us = rx_usecs;
2003 else if (efx_channel_has_tx_queues(channel))
2004 channel->irq_moderation_us = tx_usecs;
2005 }
2006
2007 return 0;
2008 }
2009
2010 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
2011 unsigned int *rx_usecs, bool *rx_adaptive)
2012 {
2013 *rx_adaptive = efx->irq_rx_adaptive;
2014 *rx_usecs = efx->irq_rx_moderation_us;
2015
2016 /* If channels are shared between RX and TX, so is IRQ
2017 * moderation. Otherwise, IRQ moderation is the same for all
2018 * TX channels and is not adaptive.
2019 */
2020 if (efx->tx_channel_offset == 0) {
2021 *tx_usecs = *rx_usecs;
2022 } else {
2023 struct efx_channel *tx_channel;
2024
2025 tx_channel = efx->channel[efx->tx_channel_offset];
2026 *tx_usecs = tx_channel->irq_moderation_us;
2027 }
2028 }
2029
2030 /**************************************************************************
2031 *
2032 * Hardware monitor
2033 *
2034 **************************************************************************/
2035
2036 /* Run periodically off the general workqueue */
2037 static void efx_monitor(struct work_struct *data)
2038 {
2039 struct efx_nic *efx = container_of(data, struct efx_nic,
2040 monitor_work.work);
2041
2042 netif_vdbg(efx, timer, efx->net_dev,
2043 "hardware monitor executing on CPU %d\n",
2044 raw_smp_processor_id());
2045 BUG_ON(efx->type->monitor == NULL);
2046
2047 /* If the mac_lock is already held then it is likely a port
2048 * reconfiguration is already in place, which will likely do
2049 * most of the work of monitor() anyway. */
2050 if (mutex_trylock(&efx->mac_lock)) {
2051 if (efx->port_enabled)
2052 efx->type->monitor(efx);
2053 mutex_unlock(&efx->mac_lock);
2054 }
2055
2056 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2057 efx_monitor_interval);
2058 }
2059
2060 /**************************************************************************
2061 *
2062 * ioctls
2063 *
2064 *************************************************************************/
2065
2066 /* Net device ioctl
2067 * Context: process, rtnl_lock() held.
2068 */
2069 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2070 {
2071 struct efx_nic *efx = netdev_priv(net_dev);
2072 struct mii_ioctl_data *data = if_mii(ifr);
2073
2074 if (cmd == SIOCSHWTSTAMP)
2075 return efx_ptp_set_ts_config(efx, ifr);
2076 if (cmd == SIOCGHWTSTAMP)
2077 return efx_ptp_get_ts_config(efx, ifr);
2078
2079 /* Convert phy_id from older PRTAD/DEVAD format */
2080 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2081 (data->phy_id & 0xfc00) == 0x0400)
2082 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2083
2084 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2085 }
2086
2087 /**************************************************************************
2088 *
2089 * NAPI interface
2090 *
2091 **************************************************************************/
2092
2093 static void efx_init_napi_channel(struct efx_channel *channel)
2094 {
2095 struct efx_nic *efx = channel->efx;
2096
2097 channel->napi_dev = efx->net_dev;
2098 netif_napi_add(channel->napi_dev, &channel->napi_str,
2099 efx_poll, napi_weight);
2100 efx_channel_busy_poll_init(channel);
2101 }
2102
2103 static void efx_init_napi(struct efx_nic *efx)
2104 {
2105 struct efx_channel *channel;
2106
2107 efx_for_each_channel(channel, efx)
2108 efx_init_napi_channel(channel);
2109 }
2110
2111 static void efx_fini_napi_channel(struct efx_channel *channel)
2112 {
2113 if (channel->napi_dev) {
2114 netif_napi_del(&channel->napi_str);
2115 napi_hash_del(&channel->napi_str);
2116 }
2117 channel->napi_dev = NULL;
2118 }
2119
2120 static void efx_fini_napi(struct efx_nic *efx)
2121 {
2122 struct efx_channel *channel;
2123
2124 efx_for_each_channel(channel, efx)
2125 efx_fini_napi_channel(channel);
2126 }
2127
2128 /**************************************************************************
2129 *
2130 * Kernel netpoll interface
2131 *
2132 *************************************************************************/
2133
2134 #ifdef CONFIG_NET_POLL_CONTROLLER
2135
2136 /* Although in the common case interrupts will be disabled, this is not
2137 * guaranteed. However, all our work happens inside the NAPI callback,
2138 * so no locking is required.
2139 */
2140 static void efx_netpoll(struct net_device *net_dev)
2141 {
2142 struct efx_nic *efx = netdev_priv(net_dev);
2143 struct efx_channel *channel;
2144
2145 efx_for_each_channel(channel, efx)
2146 efx_schedule_channel(channel);
2147 }
2148
2149 #endif
2150
2151 #ifdef CONFIG_NET_RX_BUSY_POLL
2152 static int efx_busy_poll(struct napi_struct *napi)
2153 {
2154 struct efx_channel *channel =
2155 container_of(napi, struct efx_channel, napi_str);
2156 struct efx_nic *efx = channel->efx;
2157 int budget = 4;
2158 int old_rx_packets, rx_packets;
2159
2160 if (!netif_running(efx->net_dev))
2161 return LL_FLUSH_FAILED;
2162
2163 if (!efx_channel_try_lock_poll(channel))
2164 return LL_FLUSH_BUSY;
2165
2166 old_rx_packets = channel->rx_queue.rx_packets;
2167 efx_process_channel(channel, budget);
2168
2169 rx_packets = channel->rx_queue.rx_packets - old_rx_packets;
2170
2171 /* There is no race condition with NAPI here.
2172 * NAPI will automatically be rescheduled if it yielded during busy
2173 * polling, because it was not able to take the lock and thus returned
2174 * the full budget.
2175 */
2176 efx_channel_unlock_poll(channel);
2177
2178 return rx_packets;
2179 }
2180 #endif
2181
2182 /**************************************************************************
2183 *
2184 * Kernel net device interface
2185 *
2186 *************************************************************************/
2187
2188 /* Context: process, rtnl_lock() held. */
2189 int efx_net_open(struct net_device *net_dev)
2190 {
2191 struct efx_nic *efx = netdev_priv(net_dev);
2192 int rc;
2193
2194 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2195 raw_smp_processor_id());
2196
2197 rc = efx_check_disabled(efx);
2198 if (rc)
2199 return rc;
2200 if (efx->phy_mode & PHY_MODE_SPECIAL)
2201 return -EBUSY;
2202 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2203 return -EIO;
2204
2205 /* Notify the kernel of the link state polled during driver load,
2206 * before the monitor starts running */
2207 efx_link_status_changed(efx);
2208
2209 efx_start_all(efx);
2210 efx_selftest_async_start(efx);
2211 return 0;
2212 }
2213
2214 /* Context: process, rtnl_lock() held.
2215 * Note that the kernel will ignore our return code; this method
2216 * should really be a void.
2217 */
2218 int efx_net_stop(struct net_device *net_dev)
2219 {
2220 struct efx_nic *efx = netdev_priv(net_dev);
2221
2222 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2223 raw_smp_processor_id());
2224
2225 /* Stop the device and flush all the channels */
2226 efx_stop_all(efx);
2227
2228 return 0;
2229 }
2230
2231 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2232 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2233 struct rtnl_link_stats64 *stats)
2234 {
2235 struct efx_nic *efx = netdev_priv(net_dev);
2236
2237 spin_lock_bh(&efx->stats_lock);
2238 efx->type->update_stats(efx, NULL, stats);
2239 spin_unlock_bh(&efx->stats_lock);
2240
2241 return stats;
2242 }
2243
2244 /* Context: netif_tx_lock held, BHs disabled. */
2245 static void efx_watchdog(struct net_device *net_dev)
2246 {
2247 struct efx_nic *efx = netdev_priv(net_dev);
2248
2249 netif_err(efx, tx_err, efx->net_dev,
2250 "TX stuck with port_enabled=%d: resetting channels\n",
2251 efx->port_enabled);
2252
2253 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2254 }
2255
2256
2257 /* Context: process, rtnl_lock() held. */
2258 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2259 {
2260 struct efx_nic *efx = netdev_priv(net_dev);
2261 int rc;
2262
2263 rc = efx_check_disabled(efx);
2264 if (rc)
2265 return rc;
2266 if (new_mtu > EFX_MAX_MTU) {
2267 netif_err(efx, drv, efx->net_dev,
2268 "Requested MTU of %d too big (max: %d)\n",
2269 new_mtu, EFX_MAX_MTU);
2270 return -EINVAL;
2271 }
2272 if (new_mtu < EFX_MIN_MTU) {
2273 netif_err(efx, drv, efx->net_dev,
2274 "Requested MTU of %d too small (min: %d)\n",
2275 new_mtu, EFX_MIN_MTU);
2276 return -EINVAL;
2277 }
2278
2279 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2280
2281 efx_device_detach_sync(efx);
2282 efx_stop_all(efx);
2283
2284 mutex_lock(&efx->mac_lock);
2285 net_dev->mtu = new_mtu;
2286 efx_mac_reconfigure(efx);
2287 mutex_unlock(&efx->mac_lock);
2288
2289 efx_start_all(efx);
2290 netif_device_attach(efx->net_dev);
2291 return 0;
2292 }
2293
2294 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2295 {
2296 struct efx_nic *efx = netdev_priv(net_dev);
2297 struct sockaddr *addr = data;
2298 u8 *new_addr = addr->sa_data;
2299 u8 old_addr[6];
2300 int rc;
2301
2302 if (!is_valid_ether_addr(new_addr)) {
2303 netif_err(efx, drv, efx->net_dev,
2304 "invalid ethernet MAC address requested: %pM\n",
2305 new_addr);
2306 return -EADDRNOTAVAIL;
2307 }
2308
2309 /* save old address */
2310 ether_addr_copy(old_addr, net_dev->dev_addr);
2311 ether_addr_copy(net_dev->dev_addr, new_addr);
2312 if (efx->type->set_mac_address) {
2313 rc = efx->type->set_mac_address(efx);
2314 if (rc) {
2315 ether_addr_copy(net_dev->dev_addr, old_addr);
2316 return rc;
2317 }
2318 }
2319
2320 /* Reconfigure the MAC */
2321 mutex_lock(&efx->mac_lock);
2322 efx_mac_reconfigure(efx);
2323 mutex_unlock(&efx->mac_lock);
2324
2325 return 0;
2326 }
2327
2328 /* Context: netif_addr_lock held, BHs disabled. */
2329 static void efx_set_rx_mode(struct net_device *net_dev)
2330 {
2331 struct efx_nic *efx = netdev_priv(net_dev);
2332
2333 if (efx->port_enabled)
2334 queue_work(efx->workqueue, &efx->mac_work);
2335 /* Otherwise efx_start_port() will do this */
2336 }
2337
2338 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2339 {
2340 struct efx_nic *efx = netdev_priv(net_dev);
2341 int rc;
2342
2343 /* If disabling RX n-tuple filtering, clear existing filters */
2344 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2345 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2346 if (rc)
2347 return rc;
2348 }
2349
2350 /* If Rx VLAN filter is changed, update filters via mac_reconfigure */
2351 if ((net_dev->features ^ data) & NETIF_F_HW_VLAN_CTAG_FILTER) {
2352 /* efx_set_rx_mode() will schedule MAC work to update filters
2353 * when a new features are finally set in net_dev.
2354 */
2355 efx_set_rx_mode(net_dev);
2356 }
2357
2358 return 0;
2359 }
2360
2361 static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2362 {
2363 struct efx_nic *efx = netdev_priv(net_dev);
2364
2365 if (efx->type->vlan_rx_add_vid)
2366 return efx->type->vlan_rx_add_vid(efx, proto, vid);
2367 else
2368 return -EOPNOTSUPP;
2369 }
2370
2371 static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2372 {
2373 struct efx_nic *efx = netdev_priv(net_dev);
2374
2375 if (efx->type->vlan_rx_kill_vid)
2376 return efx->type->vlan_rx_kill_vid(efx, proto, vid);
2377 else
2378 return -EOPNOTSUPP;
2379 }
2380
2381 static const struct net_device_ops efx_netdev_ops = {
2382 .ndo_open = efx_net_open,
2383 .ndo_stop = efx_net_stop,
2384 .ndo_get_stats64 = efx_net_stats,
2385 .ndo_tx_timeout = efx_watchdog,
2386 .ndo_start_xmit = efx_hard_start_xmit,
2387 .ndo_validate_addr = eth_validate_addr,
2388 .ndo_do_ioctl = efx_ioctl,
2389 .ndo_change_mtu = efx_change_mtu,
2390 .ndo_set_mac_address = efx_set_mac_address,
2391 .ndo_set_rx_mode = efx_set_rx_mode,
2392 .ndo_set_features = efx_set_features,
2393 .ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid,
2394 .ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid,
2395 #ifdef CONFIG_SFC_SRIOV
2396 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2397 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2398 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2399 .ndo_get_vf_config = efx_sriov_get_vf_config,
2400 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2401 .ndo_get_phys_port_id = efx_sriov_get_phys_port_id,
2402 #endif
2403 #ifdef CONFIG_NET_POLL_CONTROLLER
2404 .ndo_poll_controller = efx_netpoll,
2405 #endif
2406 .ndo_setup_tc = efx_setup_tc,
2407 #ifdef CONFIG_NET_RX_BUSY_POLL
2408 .ndo_busy_poll = efx_busy_poll,
2409 #endif
2410 #ifdef CONFIG_RFS_ACCEL
2411 .ndo_rx_flow_steer = efx_filter_rfs,
2412 #endif
2413 };
2414
2415 static void efx_update_name(struct efx_nic *efx)
2416 {
2417 strcpy(efx->name, efx->net_dev->name);
2418 efx_mtd_rename(efx);
2419 efx_set_channel_names(efx);
2420 }
2421
2422 static int efx_netdev_event(struct notifier_block *this,
2423 unsigned long event, void *ptr)
2424 {
2425 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2426
2427 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2428 event == NETDEV_CHANGENAME)
2429 efx_update_name(netdev_priv(net_dev));
2430
2431 return NOTIFY_DONE;
2432 }
2433
2434 static struct notifier_block efx_netdev_notifier = {
2435 .notifier_call = efx_netdev_event,
2436 };
2437
2438 static ssize_t
2439 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2440 {
2441 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2442 return sprintf(buf, "%d\n", efx->phy_type);
2443 }
2444 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2445
2446 #ifdef CONFIG_SFC_MCDI_LOGGING
2447 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2448 char *buf)
2449 {
2450 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2451 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2452
2453 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2454 }
2455 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2456 const char *buf, size_t count)
2457 {
2458 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2459 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2460 bool enable = count > 0 && *buf != '0';
2461
2462 mcdi->logging_enabled = enable;
2463 return count;
2464 }
2465 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2466 #endif
2467
2468 static int efx_register_netdev(struct efx_nic *efx)
2469 {
2470 struct net_device *net_dev = efx->net_dev;
2471 struct efx_channel *channel;
2472 int rc;
2473
2474 net_dev->watchdog_timeo = 5 * HZ;
2475 net_dev->irq = efx->pci_dev->irq;
2476 net_dev->netdev_ops = &efx_netdev_ops;
2477 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2478 net_dev->priv_flags |= IFF_UNICAST_FLT;
2479 net_dev->ethtool_ops = &efx_ethtool_ops;
2480 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2481
2482 rtnl_lock();
2483
2484 /* Enable resets to be scheduled and check whether any were
2485 * already requested. If so, the NIC is probably hosed so we
2486 * abort.
2487 */
2488 efx->state = STATE_READY;
2489 smp_mb(); /* ensure we change state before checking reset_pending */
2490 if (efx->reset_pending) {
2491 netif_err(efx, probe, efx->net_dev,
2492 "aborting probe due to scheduled reset\n");
2493 rc = -EIO;
2494 goto fail_locked;
2495 }
2496
2497 rc = dev_alloc_name(net_dev, net_dev->name);
2498 if (rc < 0)
2499 goto fail_locked;
2500 efx_update_name(efx);
2501
2502 /* Always start with carrier off; PHY events will detect the link */
2503 netif_carrier_off(net_dev);
2504
2505 rc = register_netdevice(net_dev);
2506 if (rc)
2507 goto fail_locked;
2508
2509 efx_for_each_channel(channel, efx) {
2510 struct efx_tx_queue *tx_queue;
2511 efx_for_each_channel_tx_queue(tx_queue, channel)
2512 efx_init_tx_queue_core_txq(tx_queue);
2513 }
2514
2515 efx_associate(efx);
2516
2517 rtnl_unlock();
2518
2519 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2520 if (rc) {
2521 netif_err(efx, drv, efx->net_dev,
2522 "failed to init net dev attributes\n");
2523 goto fail_registered;
2524 }
2525 #ifdef CONFIG_SFC_MCDI_LOGGING
2526 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2527 if (rc) {
2528 netif_err(efx, drv, efx->net_dev,
2529 "failed to init net dev attributes\n");
2530 goto fail_attr_mcdi_logging;
2531 }
2532 #endif
2533
2534 return 0;
2535
2536 #ifdef CONFIG_SFC_MCDI_LOGGING
2537 fail_attr_mcdi_logging:
2538 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2539 #endif
2540 fail_registered:
2541 rtnl_lock();
2542 efx_dissociate(efx);
2543 unregister_netdevice(net_dev);
2544 fail_locked:
2545 efx->state = STATE_UNINIT;
2546 rtnl_unlock();
2547 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2548 return rc;
2549 }
2550
2551 static void efx_unregister_netdev(struct efx_nic *efx)
2552 {
2553 if (!efx->net_dev)
2554 return;
2555
2556 BUG_ON(netdev_priv(efx->net_dev) != efx);
2557
2558 if (efx_dev_registered(efx)) {
2559 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2560 #ifdef CONFIG_SFC_MCDI_LOGGING
2561 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2562 #endif
2563 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2564 unregister_netdev(efx->net_dev);
2565 }
2566 }
2567
2568 /**************************************************************************
2569 *
2570 * Device reset and suspend
2571 *
2572 **************************************************************************/
2573
2574 /* Tears down the entire software state and most of the hardware state
2575 * before reset. */
2576 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2577 {
2578 EFX_ASSERT_RESET_SERIALISED(efx);
2579
2580 if (method == RESET_TYPE_MCDI_TIMEOUT)
2581 efx->type->prepare_flr(efx);
2582
2583 efx_stop_all(efx);
2584 efx_disable_interrupts(efx);
2585
2586 mutex_lock(&efx->mac_lock);
2587 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2588 method != RESET_TYPE_DATAPATH)
2589 efx->phy_op->fini(efx);
2590 efx->type->fini(efx);
2591 }
2592
2593 /* This function will always ensure that the locks acquired in
2594 * efx_reset_down() are released. A failure return code indicates
2595 * that we were unable to reinitialise the hardware, and the
2596 * driver should be disabled. If ok is false, then the rx and tx
2597 * engines are not restarted, pending a RESET_DISABLE. */
2598 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2599 {
2600 int rc;
2601
2602 EFX_ASSERT_RESET_SERIALISED(efx);
2603
2604 if (method == RESET_TYPE_MCDI_TIMEOUT)
2605 efx->type->finish_flr(efx);
2606
2607 /* Ensure that SRAM is initialised even if we're disabling the device */
2608 rc = efx->type->init(efx);
2609 if (rc) {
2610 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2611 goto fail;
2612 }
2613
2614 if (!ok)
2615 goto fail;
2616
2617 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2618 method != RESET_TYPE_DATAPATH) {
2619 rc = efx->phy_op->init(efx);
2620 if (rc)
2621 goto fail;
2622 rc = efx->phy_op->reconfigure(efx);
2623 if (rc && rc != -EPERM)
2624 netif_err(efx, drv, efx->net_dev,
2625 "could not restore PHY settings\n");
2626 }
2627
2628 rc = efx_enable_interrupts(efx);
2629 if (rc)
2630 goto fail;
2631
2632 #ifdef CONFIG_SFC_SRIOV
2633 rc = efx->type->vswitching_restore(efx);
2634 if (rc) /* not fatal; the PF will still work fine */
2635 netif_warn(efx, probe, efx->net_dev,
2636 "failed to restore vswitching rc=%d;"
2637 " VFs may not function\n", rc);
2638 #endif
2639
2640 down_read(&efx->filter_sem);
2641 efx_restore_filters(efx);
2642 up_read(&efx->filter_sem);
2643 if (efx->type->sriov_reset)
2644 efx->type->sriov_reset(efx);
2645
2646 mutex_unlock(&efx->mac_lock);
2647
2648 efx_start_all(efx);
2649
2650 return 0;
2651
2652 fail:
2653 efx->port_initialized = false;
2654
2655 mutex_unlock(&efx->mac_lock);
2656
2657 return rc;
2658 }
2659
2660 /* Reset the NIC using the specified method. Note that the reset may
2661 * fail, in which case the card will be left in an unusable state.
2662 *
2663 * Caller must hold the rtnl_lock.
2664 */
2665 int efx_reset(struct efx_nic *efx, enum reset_type method)
2666 {
2667 int rc, rc2;
2668 bool disabled;
2669
2670 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2671 RESET_TYPE(method));
2672
2673 efx_device_detach_sync(efx);
2674 efx_reset_down(efx, method);
2675
2676 rc = efx->type->reset(efx, method);
2677 if (rc) {
2678 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2679 goto out;
2680 }
2681
2682 /* Clear flags for the scopes we covered. We assume the NIC and
2683 * driver are now quiescent so that there is no race here.
2684 */
2685 if (method < RESET_TYPE_MAX_METHOD)
2686 efx->reset_pending &= -(1 << (method + 1));
2687 else /* it doesn't fit into the well-ordered scope hierarchy */
2688 __clear_bit(method, &efx->reset_pending);
2689
2690 /* Reinitialise bus-mastering, which may have been turned off before
2691 * the reset was scheduled. This is still appropriate, even in the
2692 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2693 * can respond to requests. */
2694 pci_set_master(efx->pci_dev);
2695
2696 out:
2697 /* Leave device stopped if necessary */
2698 disabled = rc ||
2699 method == RESET_TYPE_DISABLE ||
2700 method == RESET_TYPE_RECOVER_OR_DISABLE;
2701 rc2 = efx_reset_up(efx, method, !disabled);
2702 if (rc2) {
2703 disabled = true;
2704 if (!rc)
2705 rc = rc2;
2706 }
2707
2708 if (disabled) {
2709 dev_close(efx->net_dev);
2710 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2711 efx->state = STATE_DISABLED;
2712 } else {
2713 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2714 netif_device_attach(efx->net_dev);
2715 }
2716 return rc;
2717 }
2718
2719 /* Try recovery mechanisms.
2720 * For now only EEH is supported.
2721 * Returns 0 if the recovery mechanisms are unsuccessful.
2722 * Returns a non-zero value otherwise.
2723 */
2724 int efx_try_recovery(struct efx_nic *efx)
2725 {
2726 #ifdef CONFIG_EEH
2727 /* A PCI error can occur and not be seen by EEH because nothing
2728 * happens on the PCI bus. In this case the driver may fail and
2729 * schedule a 'recover or reset', leading to this recovery handler.
2730 * Manually call the eeh failure check function.
2731 */
2732 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2733 if (eeh_dev_check_failure(eehdev)) {
2734 /* The EEH mechanisms will handle the error and reset the
2735 * device if necessary.
2736 */
2737 return 1;
2738 }
2739 #endif
2740 return 0;
2741 }
2742
2743 static void efx_wait_for_bist_end(struct efx_nic *efx)
2744 {
2745 int i;
2746
2747 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2748 if (efx_mcdi_poll_reboot(efx))
2749 goto out;
2750 msleep(BIST_WAIT_DELAY_MS);
2751 }
2752
2753 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2754 out:
2755 /* Either way unset the BIST flag. If we found no reboot we probably
2756 * won't recover, but we should try.
2757 */
2758 efx->mc_bist_for_other_fn = false;
2759 }
2760
2761 /* The worker thread exists so that code that cannot sleep can
2762 * schedule a reset for later.
2763 */
2764 static void efx_reset_work(struct work_struct *data)
2765 {
2766 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2767 unsigned long pending;
2768 enum reset_type method;
2769
2770 pending = ACCESS_ONCE(efx->reset_pending);
2771 method = fls(pending) - 1;
2772
2773 if (method == RESET_TYPE_MC_BIST)
2774 efx_wait_for_bist_end(efx);
2775
2776 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2777 method == RESET_TYPE_RECOVER_OR_ALL) &&
2778 efx_try_recovery(efx))
2779 return;
2780
2781 if (!pending)
2782 return;
2783
2784 rtnl_lock();
2785
2786 /* We checked the state in efx_schedule_reset() but it may
2787 * have changed by now. Now that we have the RTNL lock,
2788 * it cannot change again.
2789 */
2790 if (efx->state == STATE_READY)
2791 (void)efx_reset(efx, method);
2792
2793 rtnl_unlock();
2794 }
2795
2796 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2797 {
2798 enum reset_type method;
2799
2800 if (efx->state == STATE_RECOVERY) {
2801 netif_dbg(efx, drv, efx->net_dev,
2802 "recovering: skip scheduling %s reset\n",
2803 RESET_TYPE(type));
2804 return;
2805 }
2806
2807 switch (type) {
2808 case RESET_TYPE_INVISIBLE:
2809 case RESET_TYPE_ALL:
2810 case RESET_TYPE_RECOVER_OR_ALL:
2811 case RESET_TYPE_WORLD:
2812 case RESET_TYPE_DISABLE:
2813 case RESET_TYPE_RECOVER_OR_DISABLE:
2814 case RESET_TYPE_DATAPATH:
2815 case RESET_TYPE_MC_BIST:
2816 case RESET_TYPE_MCDI_TIMEOUT:
2817 method = type;
2818 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2819 RESET_TYPE(method));
2820 break;
2821 default:
2822 method = efx->type->map_reset_reason(type);
2823 netif_dbg(efx, drv, efx->net_dev,
2824 "scheduling %s reset for %s\n",
2825 RESET_TYPE(method), RESET_TYPE(type));
2826 break;
2827 }
2828
2829 set_bit(method, &efx->reset_pending);
2830 smp_mb(); /* ensure we change reset_pending before checking state */
2831
2832 /* If we're not READY then just leave the flags set as the cue
2833 * to abort probing or reschedule the reset later.
2834 */
2835 if (ACCESS_ONCE(efx->state) != STATE_READY)
2836 return;
2837
2838 /* efx_process_channel() will no longer read events once a
2839 * reset is scheduled. So switch back to poll'd MCDI completions. */
2840 efx_mcdi_mode_poll(efx);
2841
2842 queue_work(reset_workqueue, &efx->reset_work);
2843 }
2844
2845 /**************************************************************************
2846 *
2847 * List of NICs we support
2848 *
2849 **************************************************************************/
2850
2851 /* PCI device ID table */
2852 static const struct pci_device_id efx_pci_table[] = {
2853 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2854 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2855 .driver_data = (unsigned long) &falcon_a1_nic_type},
2856 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2857 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2858 .driver_data = (unsigned long) &falcon_b0_nic_type},
2859 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2860 .driver_data = (unsigned long) &siena_a0_nic_type},
2861 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2862 .driver_data = (unsigned long) &siena_a0_nic_type},
2863 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2864 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2865 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2866 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2867 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2868 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2869 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */
2870 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2871 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */
2872 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2873 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */
2874 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2875 {0} /* end of list */
2876 };
2877
2878 /**************************************************************************
2879 *
2880 * Dummy PHY/MAC operations
2881 *
2882 * Can be used for some unimplemented operations
2883 * Needed so all function pointers are valid and do not have to be tested
2884 * before use
2885 *
2886 **************************************************************************/
2887 int efx_port_dummy_op_int(struct efx_nic *efx)
2888 {
2889 return 0;
2890 }
2891 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2892
2893 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2894 {
2895 return false;
2896 }
2897
2898 static const struct efx_phy_operations efx_dummy_phy_operations = {
2899 .init = efx_port_dummy_op_int,
2900 .reconfigure = efx_port_dummy_op_int,
2901 .poll = efx_port_dummy_op_poll,
2902 .fini = efx_port_dummy_op_void,
2903 };
2904
2905 /**************************************************************************
2906 *
2907 * Data housekeeping
2908 *
2909 **************************************************************************/
2910
2911 /* This zeroes out and then fills in the invariants in a struct
2912 * efx_nic (including all sub-structures).
2913 */
2914 static int efx_init_struct(struct efx_nic *efx,
2915 struct pci_dev *pci_dev, struct net_device *net_dev)
2916 {
2917 int i;
2918
2919 /* Initialise common structures */
2920 INIT_LIST_HEAD(&efx->node);
2921 INIT_LIST_HEAD(&efx->secondary_list);
2922 spin_lock_init(&efx->biu_lock);
2923 #ifdef CONFIG_SFC_MTD
2924 INIT_LIST_HEAD(&efx->mtd_list);
2925 #endif
2926 INIT_WORK(&efx->reset_work, efx_reset_work);
2927 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2928 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2929 efx->pci_dev = pci_dev;
2930 efx->msg_enable = debug;
2931 efx->state = STATE_UNINIT;
2932 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2933
2934 efx->net_dev = net_dev;
2935 efx->rx_prefix_size = efx->type->rx_prefix_size;
2936 efx->rx_ip_align =
2937 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2938 efx->rx_packet_hash_offset =
2939 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2940 efx->rx_packet_ts_offset =
2941 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2942 spin_lock_init(&efx->stats_lock);
2943 mutex_init(&efx->mac_lock);
2944 efx->phy_op = &efx_dummy_phy_operations;
2945 efx->mdio.dev = net_dev;
2946 INIT_WORK(&efx->mac_work, efx_mac_work);
2947 init_waitqueue_head(&efx->flush_wq);
2948
2949 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2950 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2951 if (!efx->channel[i])
2952 goto fail;
2953 efx->msi_context[i].efx = efx;
2954 efx->msi_context[i].index = i;
2955 }
2956
2957 /* Higher numbered interrupt modes are less capable! */
2958 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2959 interrupt_mode);
2960
2961 /* Would be good to use the net_dev name, but we're too early */
2962 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2963 pci_name(pci_dev));
2964 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2965 if (!efx->workqueue)
2966 goto fail;
2967
2968 return 0;
2969
2970 fail:
2971 efx_fini_struct(efx);
2972 return -ENOMEM;
2973 }
2974
2975 static void efx_fini_struct(struct efx_nic *efx)
2976 {
2977 int i;
2978
2979 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2980 kfree(efx->channel[i]);
2981
2982 kfree(efx->vpd_sn);
2983
2984 if (efx->workqueue) {
2985 destroy_workqueue(efx->workqueue);
2986 efx->workqueue = NULL;
2987 }
2988 }
2989
2990 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
2991 {
2992 u64 n_rx_nodesc_trunc = 0;
2993 struct efx_channel *channel;
2994
2995 efx_for_each_channel(channel, efx)
2996 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2997 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2998 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2999 }
3000
3001 /**************************************************************************
3002 *
3003 * PCI interface
3004 *
3005 **************************************************************************/
3006
3007 /* Main body of final NIC shutdown code
3008 * This is called only at module unload (or hotplug removal).
3009 */
3010 static void efx_pci_remove_main(struct efx_nic *efx)
3011 {
3012 /* Flush reset_work. It can no longer be scheduled since we
3013 * are not READY.
3014 */
3015 BUG_ON(efx->state == STATE_READY);
3016 cancel_work_sync(&efx->reset_work);
3017
3018 efx_disable_interrupts(efx);
3019 efx_nic_fini_interrupt(efx);
3020 efx_fini_port(efx);
3021 efx->type->fini(efx);
3022 efx_fini_napi(efx);
3023 efx_remove_all(efx);
3024 }
3025
3026 /* Final NIC shutdown
3027 * This is called only at module unload (or hotplug removal). A PF can call
3028 * this on its VFs to ensure they are unbound first.
3029 */
3030 static void efx_pci_remove(struct pci_dev *pci_dev)
3031 {
3032 struct efx_nic *efx;
3033
3034 efx = pci_get_drvdata(pci_dev);
3035 if (!efx)
3036 return;
3037
3038 /* Mark the NIC as fini, then stop the interface */
3039 rtnl_lock();
3040 efx_dissociate(efx);
3041 dev_close(efx->net_dev);
3042 efx_disable_interrupts(efx);
3043 efx->state = STATE_UNINIT;
3044 rtnl_unlock();
3045
3046 if (efx->type->sriov_fini)
3047 efx->type->sriov_fini(efx);
3048
3049 efx_unregister_netdev(efx);
3050
3051 efx_mtd_remove(efx);
3052
3053 efx_pci_remove_main(efx);
3054
3055 efx_fini_io(efx);
3056 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
3057
3058 efx_fini_struct(efx);
3059 free_netdev(efx->net_dev);
3060
3061 pci_disable_pcie_error_reporting(pci_dev);
3062 };
3063
3064 /* NIC VPD information
3065 * Called during probe to display the part number of the
3066 * installed NIC. VPD is potentially very large but this should
3067 * always appear within the first 512 bytes.
3068 */
3069 #define SFC_VPD_LEN 512
3070 static void efx_probe_vpd_strings(struct efx_nic *efx)
3071 {
3072 struct pci_dev *dev = efx->pci_dev;
3073 char vpd_data[SFC_VPD_LEN];
3074 ssize_t vpd_size;
3075 int ro_start, ro_size, i, j;
3076
3077 /* Get the vpd data from the device */
3078 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
3079 if (vpd_size <= 0) {
3080 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
3081 return;
3082 }
3083
3084 /* Get the Read only section */
3085 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3086 if (ro_start < 0) {
3087 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3088 return;
3089 }
3090
3091 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3092 j = ro_size;
3093 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3094 if (i + j > vpd_size)
3095 j = vpd_size - i;
3096
3097 /* Get the Part number */
3098 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3099 if (i < 0) {
3100 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3101 return;
3102 }
3103
3104 j = pci_vpd_info_field_size(&vpd_data[i]);
3105 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3106 if (i + j > vpd_size) {
3107 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3108 return;
3109 }
3110
3111 netif_info(efx, drv, efx->net_dev,
3112 "Part Number : %.*s\n", j, &vpd_data[i]);
3113
3114 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3115 j = ro_size;
3116 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3117 if (i < 0) {
3118 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3119 return;
3120 }
3121
3122 j = pci_vpd_info_field_size(&vpd_data[i]);
3123 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3124 if (i + j > vpd_size) {
3125 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3126 return;
3127 }
3128
3129 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3130 if (!efx->vpd_sn)
3131 return;
3132
3133 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3134 }
3135
3136
3137 /* Main body of NIC initialisation
3138 * This is called at module load (or hotplug insertion, theoretically).
3139 */
3140 static int efx_pci_probe_main(struct efx_nic *efx)
3141 {
3142 int rc;
3143
3144 /* Do start-of-day initialisation */
3145 rc = efx_probe_all(efx);
3146 if (rc)
3147 goto fail1;
3148
3149 efx_init_napi(efx);
3150
3151 rc = efx->type->init(efx);
3152 if (rc) {
3153 netif_err(efx, probe, efx->net_dev,
3154 "failed to initialise NIC\n");
3155 goto fail3;
3156 }
3157
3158 rc = efx_init_port(efx);
3159 if (rc) {
3160 netif_err(efx, probe, efx->net_dev,
3161 "failed to initialise port\n");
3162 goto fail4;
3163 }
3164
3165 rc = efx_nic_init_interrupt(efx);
3166 if (rc)
3167 goto fail5;
3168 rc = efx_enable_interrupts(efx);
3169 if (rc)
3170 goto fail6;
3171
3172 return 0;
3173
3174 fail6:
3175 efx_nic_fini_interrupt(efx);
3176 fail5:
3177 efx_fini_port(efx);
3178 fail4:
3179 efx->type->fini(efx);
3180 fail3:
3181 efx_fini_napi(efx);
3182 efx_remove_all(efx);
3183 fail1:
3184 return rc;
3185 }
3186
3187 /* NIC initialisation
3188 *
3189 * This is called at module load (or hotplug insertion,
3190 * theoretically). It sets up PCI mappings, resets the NIC,
3191 * sets up and registers the network devices with the kernel and hooks
3192 * the interrupt service routine. It does not prepare the device for
3193 * transmission; this is left to the first time one of the network
3194 * interfaces is brought up (i.e. efx_net_open).
3195 */
3196 static int efx_pci_probe(struct pci_dev *pci_dev,
3197 const struct pci_device_id *entry)
3198 {
3199 struct net_device *net_dev;
3200 struct efx_nic *efx;
3201 int rc;
3202
3203 /* Allocate and initialise a struct net_device and struct efx_nic */
3204 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3205 EFX_MAX_RX_QUEUES);
3206 if (!net_dev)
3207 return -ENOMEM;
3208 efx = netdev_priv(net_dev);
3209 efx->type = (const struct efx_nic_type *) entry->driver_data;
3210 efx->fixed_features |= NETIF_F_HIGHDMA;
3211 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3212 NETIF_F_TSO | NETIF_F_RXCSUM);
3213 if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM))
3214 net_dev->features |= NETIF_F_TSO6;
3215 /* Mask for features that also apply to VLAN devices */
3216 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
3217 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3218 NETIF_F_RXCSUM);
3219
3220 net_dev->hw_features = net_dev->features & ~efx->fixed_features;
3221
3222 /* Disable VLAN filtering by default. It may be enforced if
3223 * the feature is fixed (i.e. VLAN filters are required to
3224 * receive VLAN tagged packets due to vPort restrictions).
3225 */
3226 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
3227 net_dev->features |= efx->fixed_features;
3228
3229 pci_set_drvdata(pci_dev, efx);
3230 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3231 rc = efx_init_struct(efx, pci_dev, net_dev);
3232 if (rc)
3233 goto fail1;
3234
3235 netif_info(efx, probe, efx->net_dev,
3236 "Solarflare NIC detected\n");
3237
3238 if (!efx->type->is_vf)
3239 efx_probe_vpd_strings(efx);
3240
3241 /* Set up basic I/O (BAR mappings etc) */
3242 rc = efx_init_io(efx);
3243 if (rc)
3244 goto fail2;
3245
3246 rc = efx_pci_probe_main(efx);
3247 if (rc)
3248 goto fail3;
3249
3250 rc = efx_register_netdev(efx);
3251 if (rc)
3252 goto fail4;
3253
3254 if (efx->type->sriov_init) {
3255 rc = efx->type->sriov_init(efx);
3256 if (rc)
3257 netif_err(efx, probe, efx->net_dev,
3258 "SR-IOV can't be enabled rc %d\n", rc);
3259 }
3260
3261 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3262
3263 /* Try to create MTDs, but allow this to fail */
3264 rtnl_lock();
3265 rc = efx_mtd_probe(efx);
3266 rtnl_unlock();
3267 if (rc && rc != -EPERM)
3268 netif_warn(efx, probe, efx->net_dev,
3269 "failed to create MTDs (%d)\n", rc);
3270
3271 rc = pci_enable_pcie_error_reporting(pci_dev);
3272 if (rc && rc != -EINVAL)
3273 netif_notice(efx, probe, efx->net_dev,
3274 "PCIE error reporting unavailable (%d).\n",
3275 rc);
3276
3277 return 0;
3278
3279 fail4:
3280 efx_pci_remove_main(efx);
3281 fail3:
3282 efx_fini_io(efx);
3283 fail2:
3284 efx_fini_struct(efx);
3285 fail1:
3286 WARN_ON(rc > 0);
3287 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3288 free_netdev(net_dev);
3289 return rc;
3290 }
3291
3292 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3293 * enabled on success
3294 */
3295 #ifdef CONFIG_SFC_SRIOV
3296 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3297 {
3298 int rc;
3299 struct efx_nic *efx = pci_get_drvdata(dev);
3300
3301 if (efx->type->sriov_configure) {
3302 rc = efx->type->sriov_configure(efx, num_vfs);
3303 if (rc)
3304 return rc;
3305 else
3306 return num_vfs;
3307 } else
3308 return -EOPNOTSUPP;
3309 }
3310 #endif
3311
3312 static int efx_pm_freeze(struct device *dev)
3313 {
3314 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3315
3316 rtnl_lock();
3317
3318 if (efx->state != STATE_DISABLED) {
3319 efx->state = STATE_UNINIT;
3320
3321 efx_device_detach_sync(efx);
3322
3323 efx_stop_all(efx);
3324 efx_disable_interrupts(efx);
3325 }
3326
3327 rtnl_unlock();
3328
3329 return 0;
3330 }
3331
3332 static int efx_pm_thaw(struct device *dev)
3333 {
3334 int rc;
3335 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3336
3337 rtnl_lock();
3338
3339 if (efx->state != STATE_DISABLED) {
3340 rc = efx_enable_interrupts(efx);
3341 if (rc)
3342 goto fail;
3343
3344 mutex_lock(&efx->mac_lock);
3345 efx->phy_op->reconfigure(efx);
3346 mutex_unlock(&efx->mac_lock);
3347
3348 efx_start_all(efx);
3349
3350 netif_device_attach(efx->net_dev);
3351
3352 efx->state = STATE_READY;
3353
3354 efx->type->resume_wol(efx);
3355 }
3356
3357 rtnl_unlock();
3358
3359 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3360 queue_work(reset_workqueue, &efx->reset_work);
3361
3362 return 0;
3363
3364 fail:
3365 rtnl_unlock();
3366
3367 return rc;
3368 }
3369
3370 static int efx_pm_poweroff(struct device *dev)
3371 {
3372 struct pci_dev *pci_dev = to_pci_dev(dev);
3373 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3374
3375 efx->type->fini(efx);
3376
3377 efx->reset_pending = 0;
3378
3379 pci_save_state(pci_dev);
3380 return pci_set_power_state(pci_dev, PCI_D3hot);
3381 }
3382
3383 /* Used for both resume and restore */
3384 static int efx_pm_resume(struct device *dev)
3385 {
3386 struct pci_dev *pci_dev = to_pci_dev(dev);
3387 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3388 int rc;
3389
3390 rc = pci_set_power_state(pci_dev, PCI_D0);
3391 if (rc)
3392 return rc;
3393 pci_restore_state(pci_dev);
3394 rc = pci_enable_device(pci_dev);
3395 if (rc)
3396 return rc;
3397 pci_set_master(efx->pci_dev);
3398 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3399 if (rc)
3400 return rc;
3401 rc = efx->type->init(efx);
3402 if (rc)
3403 return rc;
3404 rc = efx_pm_thaw(dev);
3405 return rc;
3406 }
3407
3408 static int efx_pm_suspend(struct device *dev)
3409 {
3410 int rc;
3411
3412 efx_pm_freeze(dev);
3413 rc = efx_pm_poweroff(dev);
3414 if (rc)
3415 efx_pm_resume(dev);
3416 return rc;
3417 }
3418
3419 static const struct dev_pm_ops efx_pm_ops = {
3420 .suspend = efx_pm_suspend,
3421 .resume = efx_pm_resume,
3422 .freeze = efx_pm_freeze,
3423 .thaw = efx_pm_thaw,
3424 .poweroff = efx_pm_poweroff,
3425 .restore = efx_pm_resume,
3426 };
3427
3428 /* A PCI error affecting this device was detected.
3429 * At this point MMIO and DMA may be disabled.
3430 * Stop the software path and request a slot reset.
3431 */
3432 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3433 enum pci_channel_state state)
3434 {
3435 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3436 struct efx_nic *efx = pci_get_drvdata(pdev);
3437
3438 if (state == pci_channel_io_perm_failure)
3439 return PCI_ERS_RESULT_DISCONNECT;
3440
3441 rtnl_lock();
3442
3443 if (efx->state != STATE_DISABLED) {
3444 efx->state = STATE_RECOVERY;
3445 efx->reset_pending = 0;
3446
3447 efx_device_detach_sync(efx);
3448
3449 efx_stop_all(efx);
3450 efx_disable_interrupts(efx);
3451
3452 status = PCI_ERS_RESULT_NEED_RESET;
3453 } else {
3454 /* If the interface is disabled we don't want to do anything
3455 * with it.
3456 */
3457 status = PCI_ERS_RESULT_RECOVERED;
3458 }
3459
3460 rtnl_unlock();
3461
3462 pci_disable_device(pdev);
3463
3464 return status;
3465 }
3466
3467 /* Fake a successful reset, which will be performed later in efx_io_resume. */
3468 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3469 {
3470 struct efx_nic *efx = pci_get_drvdata(pdev);
3471 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3472 int rc;
3473
3474 if (pci_enable_device(pdev)) {
3475 netif_err(efx, hw, efx->net_dev,
3476 "Cannot re-enable PCI device after reset.\n");
3477 status = PCI_ERS_RESULT_DISCONNECT;
3478 }
3479
3480 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3481 if (rc) {
3482 netif_err(efx, hw, efx->net_dev,
3483 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3484 /* Non-fatal error. Continue. */
3485 }
3486
3487 return status;
3488 }
3489
3490 /* Perform the actual reset and resume I/O operations. */
3491 static void efx_io_resume(struct pci_dev *pdev)
3492 {
3493 struct efx_nic *efx = pci_get_drvdata(pdev);
3494 int rc;
3495
3496 rtnl_lock();
3497
3498 if (efx->state == STATE_DISABLED)
3499 goto out;
3500
3501 rc = efx_reset(efx, RESET_TYPE_ALL);
3502 if (rc) {
3503 netif_err(efx, hw, efx->net_dev,
3504 "efx_reset failed after PCI error (%d)\n", rc);
3505 } else {
3506 efx->state = STATE_READY;
3507 netif_dbg(efx, hw, efx->net_dev,
3508 "Done resetting and resuming IO after PCI error.\n");
3509 }
3510
3511 out:
3512 rtnl_unlock();
3513 }
3514
3515 /* For simplicity and reliability, we always require a slot reset and try to
3516 * reset the hardware when a pci error affecting the device is detected.
3517 * We leave both the link_reset and mmio_enabled callback unimplemented:
3518 * with our request for slot reset the mmio_enabled callback will never be
3519 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3520 */
3521 static const struct pci_error_handlers efx_err_handlers = {
3522 .error_detected = efx_io_error_detected,
3523 .slot_reset = efx_io_slot_reset,
3524 .resume = efx_io_resume,
3525 };
3526
3527 static struct pci_driver efx_pci_driver = {
3528 .name = KBUILD_MODNAME,
3529 .id_table = efx_pci_table,
3530 .probe = efx_pci_probe,
3531 .remove = efx_pci_remove,
3532 .driver.pm = &efx_pm_ops,
3533 .err_handler = &efx_err_handlers,
3534 #ifdef CONFIG_SFC_SRIOV
3535 .sriov_configure = efx_pci_sriov_configure,
3536 #endif
3537 };
3538
3539 /**************************************************************************
3540 *
3541 * Kernel module interface
3542 *
3543 *************************************************************************/
3544
3545 module_param(interrupt_mode, uint, 0444);
3546 MODULE_PARM_DESC(interrupt_mode,
3547 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3548
3549 static int __init efx_init_module(void)
3550 {
3551 int rc;
3552
3553 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3554
3555 rc = register_netdevice_notifier(&efx_netdev_notifier);
3556 if (rc)
3557 goto err_notifier;
3558
3559 #ifdef CONFIG_SFC_SRIOV
3560 rc = efx_init_sriov();
3561 if (rc)
3562 goto err_sriov;
3563 #endif
3564
3565 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3566 if (!reset_workqueue) {
3567 rc = -ENOMEM;
3568 goto err_reset;
3569 }
3570
3571 rc = pci_register_driver(&efx_pci_driver);
3572 if (rc < 0)
3573 goto err_pci;
3574
3575 return 0;
3576
3577 err_pci:
3578 destroy_workqueue(reset_workqueue);
3579 err_reset:
3580 #ifdef CONFIG_SFC_SRIOV
3581 efx_fini_sriov();
3582 err_sriov:
3583 #endif
3584 unregister_netdevice_notifier(&efx_netdev_notifier);
3585 err_notifier:
3586 return rc;
3587 }
3588
3589 static void __exit efx_exit_module(void)
3590 {
3591 printk(KERN_INFO "Solarflare NET driver unloading\n");
3592
3593 pci_unregister_driver(&efx_pci_driver);
3594 destroy_workqueue(reset_workqueue);
3595 #ifdef CONFIG_SFC_SRIOV
3596 efx_fini_sriov();
3597 #endif
3598 unregister_netdevice_notifier(&efx_netdev_notifier);
3599
3600 }
3601
3602 module_init(efx_init_module);
3603 module_exit(efx_exit_module);
3604
3605 MODULE_AUTHOR("Solarflare Communications and "
3606 "Michael Brown <mbrown@fensystems.co.uk>");
3607 MODULE_DESCRIPTION("Solarflare network driver");
3608 MODULE_LICENSE("GPL");
3609 MODULE_DEVICE_TABLE(pci, efx_pci_table);
Linux kernel - Deliverables
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