projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
selinux: fix overflow and 0 length allocations
[deliverable/linux.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw.c
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 *
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
48 * distribution.
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *
65 *****************************************************************************/
66 #include <net/mac80211.h>
67 #include <linux/netdevice.h>
68 #include <linux/acpi.h>
69
70 #include "iwl-trans.h"
71 #include "iwl-op-mode.h"
72 #include "iwl-fw.h"
73 #include "iwl-debug.h"
74 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
75 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
76 #include "iwl-prph.h"
77 #include "iwl-eeprom-parse.h"
78
79 #include "mvm.h"
80 #include "fw-dbg.h"
81 #include "iwl-phy-db.h"
82
83 #define MVM_UCODE_ALIVE_TIMEOUT HZ
84 #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
85
86 #define UCODE_VALID_OK cpu_to_le32(0x1)
87
88 struct iwl_mvm_alive_data {
89 bool valid;
90 u32 scd_base_addr;
91 };
92
93 static inline const struct fw_img *
94 iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
95 {
96 if (ucode_type >= IWL_UCODE_TYPE_MAX)
97 return NULL;
98
99 return &mvm->fw->img[ucode_type];
100 }
101
102 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
103 {
104 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
105 .valid = cpu_to_le32(valid_tx_ant),
106 };
107
108 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
109 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
110 sizeof(tx_ant_cmd), &tx_ant_cmd);
111 }
112
113 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
114 {
115 int i;
116 struct iwl_rss_config_cmd cmd = {
117 .flags = cpu_to_le32(IWL_RSS_ENABLE),
118 .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
119 IWL_RSS_HASH_TYPE_IPV4_UDP |
120 IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
121 IWL_RSS_HASH_TYPE_IPV6_TCP |
122 IWL_RSS_HASH_TYPE_IPV6_UDP |
123 IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
124 };
125
126 if (mvm->trans->num_rx_queues == 1)
127 return 0;
128
129 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
130 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
131 cmd.indirection_table[i] =
132 1 + (i % (mvm->trans->num_rx_queues - 1));
133 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
134
135 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
136 }
137
138 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
139 {
140 struct iwl_dqa_enable_cmd dqa_cmd = {
141 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
142 };
143 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
144 int ret;
145
146 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
147 if (ret)
148 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
149 else
150 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
151
152 return ret;
153 }
154
155 void iwl_free_fw_paging(struct iwl_mvm *mvm)
156 {
157 int i;
158
159 if (!mvm->fw_paging_db[0].fw_paging_block)
160 return;
161
162 for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) {
163 struct iwl_fw_paging *paging = &mvm->fw_paging_db[i];
164
165 if (!paging->fw_paging_block) {
166 IWL_DEBUG_FW(mvm,
167 "Paging: block %d already freed, continue to next page\n",
168 i);
169
170 continue;
171 }
172 dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys,
173 paging->fw_paging_size, DMA_BIDIRECTIONAL);
174
175 __free_pages(paging->fw_paging_block,
176 get_order(paging->fw_paging_size));
177 paging->fw_paging_block = NULL;
178 }
179 kfree(mvm->trans->paging_download_buf);
180 mvm->trans->paging_download_buf = NULL;
181 mvm->trans->paging_db = NULL;
182
183 memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
184 }
185
186 static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image)
187 {
188 int sec_idx, idx;
189 u32 offset = 0;
190
191 /*
192 * find where is the paging image start point:
193 * if CPU2 exist and it's in paging format, then the image looks like:
194 * CPU1 sections (2 or more)
195 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
196 * CPU2 sections (not paged)
197 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
198 * non paged to CPU2 paging sec
199 * CPU2 paging CSS
200 * CPU2 paging image (including instruction and data)
201 */
202 for (sec_idx = 0; sec_idx < IWL_UCODE_SECTION_MAX; sec_idx++) {
203 if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) {
204 sec_idx++;
205 break;
206 }
207 }
208
209 /*
210 * If paging is enabled there should be at least 2 more sections left
211 * (one for CSS and one for Paging data)
212 */
213 if (sec_idx >= ARRAY_SIZE(image->sec) - 1) {
214 IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n");
215 iwl_free_fw_paging(mvm);
216 return -EINVAL;
217 }
218
219 /* copy the CSS block to the dram */
220 IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n",
221 sec_idx);
222
223 memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block),
224 image->sec[sec_idx].data,
225 mvm->fw_paging_db[0].fw_paging_size);
226
227 IWL_DEBUG_FW(mvm,
228 "Paging: copied %d CSS bytes to first block\n",
229 mvm->fw_paging_db[0].fw_paging_size);
230
231 sec_idx++;
232
233 /*
234 * copy the paging blocks to the dram
235 * loop index start from 1 since that CSS block already copied to dram
236 * and CSS index is 0.
237 * loop stop at num_of_paging_blk since that last block is not full.
238 */
239 for (idx = 1; idx < mvm->num_of_paging_blk; idx++) {
240 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
241 image->sec[sec_idx].data + offset,
242 mvm->fw_paging_db[idx].fw_paging_size);
243
244 IWL_DEBUG_FW(mvm,
245 "Paging: copied %d paging bytes to block %d\n",
246 mvm->fw_paging_db[idx].fw_paging_size,
247 idx);
248
249 offset += mvm->fw_paging_db[idx].fw_paging_size;
250 }
251
252 /* copy the last paging block */
253 if (mvm->num_of_pages_in_last_blk > 0) {
254 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
255 image->sec[sec_idx].data + offset,
256 FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk);
257
258 IWL_DEBUG_FW(mvm,
259 "Paging: copied %d pages in the last block %d\n",
260 mvm->num_of_pages_in_last_blk, idx);
261 }
262
263 return 0;
264 }
265
266 static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm,
267 const struct fw_img *image)
268 {
269 struct page *block;
270 dma_addr_t phys = 0;
271 int blk_idx = 0;
272 int order, num_of_pages;
273 int dma_enabled;
274
275 if (mvm->fw_paging_db[0].fw_paging_block)
276 return 0;
277
278 dma_enabled = is_device_dma_capable(mvm->trans->dev);
279
280 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
281 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE);
282
283 num_of_pages = image->paging_mem_size / FW_PAGING_SIZE;
284 mvm->num_of_paging_blk = ((num_of_pages - 1) /
285 NUM_OF_PAGE_PER_GROUP) + 1;
286
287 mvm->num_of_pages_in_last_blk =
288 num_of_pages -
289 NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1);
290
291 IWL_DEBUG_FW(mvm,
292 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
293 mvm->num_of_paging_blk,
294 mvm->num_of_pages_in_last_blk);
295
296 /* allocate block of 4Kbytes for paging CSS */
297 order = get_order(FW_PAGING_SIZE);
298 block = alloc_pages(GFP_KERNEL, order);
299 if (!block) {
300 /* free all the previous pages since we failed */
301 iwl_free_fw_paging(mvm);
302 return -ENOMEM;
303 }
304
305 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
306 mvm->fw_paging_db[blk_idx].fw_paging_size = FW_PAGING_SIZE;
307
308 if (dma_enabled) {
309 phys = dma_map_page(mvm->trans->dev, block, 0,
310 PAGE_SIZE << order, DMA_BIDIRECTIONAL);
311 if (dma_mapping_error(mvm->trans->dev, phys)) {
312 /*
313 * free the previous pages and the current one since
314 * we failed to map_page.
315 */
316 iwl_free_fw_paging(mvm);
317 return -ENOMEM;
318 }
319 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
320 } else {
321 mvm->fw_paging_db[blk_idx].fw_paging_phys = PAGING_ADDR_SIG |
322 blk_idx << BLOCK_2_EXP_SIZE;
323 }
324
325 IWL_DEBUG_FW(mvm,
326 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
327 order);
328
329 /*
330 * allocate blocks in dram.
331 * since that CSS allocated in fw_paging_db[0] loop start from index 1
332 */
333 for (blk_idx = 1; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
334 /* allocate block of PAGING_BLOCK_SIZE (32K) */
335 order = get_order(PAGING_BLOCK_SIZE);
336 block = alloc_pages(GFP_KERNEL, order);
337 if (!block) {
338 /* free all the previous pages since we failed */
339 iwl_free_fw_paging(mvm);
340 return -ENOMEM;
341 }
342
343 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
344 mvm->fw_paging_db[blk_idx].fw_paging_size = PAGING_BLOCK_SIZE;
345
346 if (dma_enabled) {
347 phys = dma_map_page(mvm->trans->dev, block, 0,
348 PAGE_SIZE << order,
349 DMA_BIDIRECTIONAL);
350 if (dma_mapping_error(mvm->trans->dev, phys)) {
351 /*
352 * free the previous pages and the current one
353 * since we failed to map_page.
354 */
355 iwl_free_fw_paging(mvm);
356 return -ENOMEM;
357 }
358 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
359 } else {
360 mvm->fw_paging_db[blk_idx].fw_paging_phys =
361 PAGING_ADDR_SIG |
362 blk_idx << BLOCK_2_EXP_SIZE;
363 }
364
365 IWL_DEBUG_FW(mvm,
366 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
367 order);
368 }
369
370 return 0;
371 }
372
373 static int iwl_save_fw_paging(struct iwl_mvm *mvm,
374 const struct fw_img *fw)
375 {
376 int ret;
377
378 ret = iwl_alloc_fw_paging_mem(mvm, fw);
379 if (ret)
380 return ret;
381
382 return iwl_fill_paging_mem(mvm, fw);
383 }
384
385 /* send paging cmd to FW in case CPU2 has paging image */
386 static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw)
387 {
388 int blk_idx;
389 __le32 dev_phy_addr;
390 struct iwl_fw_paging_cmd fw_paging_cmd = {
391 .flags =
392 cpu_to_le32(PAGING_CMD_IS_SECURED |
393 PAGING_CMD_IS_ENABLED |
394 (mvm->num_of_pages_in_last_blk <<
395 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
396 .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE),
397 .block_num = cpu_to_le32(mvm->num_of_paging_blk),
398 };
399
400 /* loop for for all paging blocks + CSS block */
401 for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
402 dev_phy_addr =
403 cpu_to_le32(mvm->fw_paging_db[blk_idx].fw_paging_phys >>
404 PAGE_2_EXP_SIZE);
405 fw_paging_cmd.device_phy_addr[blk_idx] = dev_phy_addr;
406 }
407
408 return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD,
409 IWL_ALWAYS_LONG_GROUP, 0),
410 0, sizeof(fw_paging_cmd), &fw_paging_cmd);
411 }
412
413 /*
414 * Send paging item cmd to FW in case CPU2 has paging image
415 */
416 static int iwl_trans_get_paging_item(struct iwl_mvm *mvm)
417 {
418 int ret;
419 struct iwl_fw_get_item_cmd fw_get_item_cmd = {
420 .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING),
421 };
422
423 struct iwl_fw_get_item_resp *item_resp;
424 struct iwl_host_cmd cmd = {
425 .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0),
426 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
427 .data = { &fw_get_item_cmd, },
428 };
429
430 cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd);
431
432 ret = iwl_mvm_send_cmd(mvm, &cmd);
433 if (ret) {
434 IWL_ERR(mvm,
435 "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
436 ret);
437 return ret;
438 }
439
440 item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data;
441 if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) {
442 IWL_ERR(mvm,
443 "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
444 le32_to_cpu(item_resp->item_id));
445 ret = -EIO;
446 goto exit;
447 }
448
449 /* Add an extra page for headers */
450 mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE +
451 FW_PAGING_SIZE,
452 GFP_KERNEL);
453 if (!mvm->trans->paging_download_buf) {
454 ret = -ENOMEM;
455 goto exit;
456 }
457 mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val);
458 mvm->trans->paging_db = mvm->fw_paging_db;
459 IWL_DEBUG_FW(mvm,
460 "Paging: got paging request address (paging_req_addr 0x%08x)\n",
461 mvm->trans->paging_req_addr);
462
463 exit:
464 iwl_free_resp(&cmd);
465
466 return ret;
467 }
468
469 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
470 struct iwl_rx_packet *pkt, void *data)
471 {
472 struct iwl_mvm *mvm =
473 container_of(notif_wait, struct iwl_mvm, notif_wait);
474 struct iwl_mvm_alive_data *alive_data = data;
475 struct mvm_alive_resp_ver1 *palive1;
476 struct mvm_alive_resp_ver2 *palive2;
477 struct mvm_alive_resp *palive;
478
479 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
480 palive1 = (void *)pkt->data;
481
482 mvm->support_umac_log = false;
483 mvm->error_event_table =
484 le32_to_cpu(palive1->error_event_table_ptr);
485 mvm->log_event_table =
486 le32_to_cpu(palive1->log_event_table_ptr);
487 alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr);
488
489 alive_data->valid = le16_to_cpu(palive1->status) ==
490 IWL_ALIVE_STATUS_OK;
491 IWL_DEBUG_FW(mvm,
492 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
493 le16_to_cpu(palive1->status), palive1->ver_type,
494 palive1->ver_subtype, palive1->flags);
495 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
496 palive2 = (void *)pkt->data;
497
498 mvm->error_event_table =
499 le32_to_cpu(palive2->error_event_table_ptr);
500 mvm->log_event_table =
501 le32_to_cpu(palive2->log_event_table_ptr);
502 alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
503 mvm->umac_error_event_table =
504 le32_to_cpu(palive2->error_info_addr);
505 mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
506 mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
507
508 alive_data->valid = le16_to_cpu(palive2->status) ==
509 IWL_ALIVE_STATUS_OK;
510 if (mvm->umac_error_event_table)
511 mvm->support_umac_log = true;
512
513 IWL_DEBUG_FW(mvm,
514 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
515 le16_to_cpu(palive2->status), palive2->ver_type,
516 palive2->ver_subtype, palive2->flags);
517
518 IWL_DEBUG_FW(mvm,
519 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
520 palive2->umac_major, palive2->umac_minor);
521 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
522 palive = (void *)pkt->data;
523
524 mvm->error_event_table =
525 le32_to_cpu(palive->error_event_table_ptr);
526 mvm->log_event_table =
527 le32_to_cpu(palive->log_event_table_ptr);
528 alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
529 mvm->umac_error_event_table =
530 le32_to_cpu(palive->error_info_addr);
531 mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr);
532 mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size);
533
534 alive_data->valid = le16_to_cpu(palive->status) ==
535 IWL_ALIVE_STATUS_OK;
536 if (mvm->umac_error_event_table)
537 mvm->support_umac_log = true;
538
539 IWL_DEBUG_FW(mvm,
540 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
541 le16_to_cpu(palive->status), palive->ver_type,
542 palive->ver_subtype, palive->flags);
543
544 IWL_DEBUG_FW(mvm,
545 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
546 le32_to_cpu(palive->umac_major),
547 le32_to_cpu(palive->umac_minor));
548 }
549
550 return true;
551 }
552
553 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
554 struct iwl_rx_packet *pkt, void *data)
555 {
556 struct iwl_phy_db *phy_db = data;
557
558 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
559 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
560 return true;
561 }
562
563 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
564
565 return false;
566 }
567
568 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
569 enum iwl_ucode_type ucode_type)
570 {
571 struct iwl_notification_wait alive_wait;
572 struct iwl_mvm_alive_data alive_data;
573 const struct fw_img *fw;
574 int ret, i;
575 enum iwl_ucode_type old_type = mvm->cur_ucode;
576 static const u16 alive_cmd[] = { MVM_ALIVE };
577 struct iwl_sf_region st_fwrd_space;
578
579 if (ucode_type == IWL_UCODE_REGULAR &&
580 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
581 !(fw_has_capa(&mvm->fw->ucode_capa,
582 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
583 fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER);
584 else
585 fw = iwl_get_ucode_image(mvm, ucode_type);
586 if (WARN_ON(!fw))
587 return -EINVAL;
588 mvm->cur_ucode = ucode_type;
589 mvm->ucode_loaded = false;
590
591 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
592 alive_cmd, ARRAY_SIZE(alive_cmd),
593 iwl_alive_fn, &alive_data);
594
595 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
596 if (ret) {
597 mvm->cur_ucode = old_type;
598 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
599 return ret;
600 }
601
602 /*
603 * Some things may run in the background now, but we
604 * just wait for the ALIVE notification here.
605 */
606 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
607 MVM_UCODE_ALIVE_TIMEOUT);
608 if (ret) {
609 if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
610 IWL_ERR(mvm,
611 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
612 iwl_read_prph(mvm->trans, SB_CPU_1_STATUS),
613 iwl_read_prph(mvm->trans, SB_CPU_2_STATUS));
614 mvm->cur_ucode = old_type;
615 return ret;
616 }
617
618 if (!alive_data.valid) {
619 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
620 mvm->cur_ucode = old_type;
621 return -EIO;
622 }
623
624 /*
625 * update the sdio allocation according to the pointer we get in the
626 * alive notification.
627 */
628 st_fwrd_space.addr = mvm->sf_space.addr;
629 st_fwrd_space.size = mvm->sf_space.size;
630 ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
631 if (ret) {
632 IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
633 return ret;
634 }
635
636 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
637
638 /*
639 * configure and operate fw paging mechanism.
640 * driver configures the paging flow only once, CPU2 paging image
641 * included in the IWL_UCODE_INIT image.
642 */
643 if (fw->paging_mem_size) {
644 /*
645 * When dma is not enabled, the driver needs to copy / write
646 * the downloaded / uploaded page to / from the smem.
647 * This gets the location of the place were the pages are
648 * stored.
649 */
650 if (!is_device_dma_capable(mvm->trans->dev)) {
651 ret = iwl_trans_get_paging_item(mvm);
652 if (ret) {
653 IWL_ERR(mvm, "failed to get FW paging item\n");
654 return ret;
655 }
656 }
657
658 ret = iwl_save_fw_paging(mvm, fw);
659 if (ret) {
660 IWL_ERR(mvm, "failed to save the FW paging image\n");
661 return ret;
662 }
663
664 ret = iwl_send_paging_cmd(mvm, fw);
665 if (ret) {
666 IWL_ERR(mvm, "failed to send the paging cmd\n");
667 iwl_free_fw_paging(mvm);
668 return ret;
669 }
670 }
671
672 /*
673 * Note: all the queues are enabled as part of the interface
674 * initialization, but in firmware restart scenarios they
675 * could be stopped, so wake them up. In firmware restart,
676 * mac80211 will have the queues stopped as well until the
677 * reconfiguration completes. During normal startup, they
678 * will be empty.
679 */
680
681 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
682 if (iwl_mvm_is_dqa_supported(mvm))
683 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
684 else
685 mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1;
686
687 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
688 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
689
690 mvm->ucode_loaded = true;
691
692 return 0;
693 }
694
695 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
696 {
697 struct iwl_phy_cfg_cmd phy_cfg_cmd;
698 enum iwl_ucode_type ucode_type = mvm->cur_ucode;
699
700 /* Set parameters */
701 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
702 phy_cfg_cmd.calib_control.event_trigger =
703 mvm->fw->default_calib[ucode_type].event_trigger;
704 phy_cfg_cmd.calib_control.flow_trigger =
705 mvm->fw->default_calib[ucode_type].flow_trigger;
706
707 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
708 phy_cfg_cmd.phy_cfg);
709
710 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
711 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
712 }
713
714 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
715 {
716 struct iwl_notification_wait calib_wait;
717 static const u16 init_complete[] = {
718 INIT_COMPLETE_NOTIF,
719 CALIB_RES_NOTIF_PHY_DB
720 };
721 int ret;
722
723 lockdep_assert_held(&mvm->mutex);
724
725 if (WARN_ON_ONCE(mvm->calibrating))
726 return 0;
727
728 iwl_init_notification_wait(&mvm->notif_wait,
729 &calib_wait,
730 init_complete,
731 ARRAY_SIZE(init_complete),
732 iwl_wait_phy_db_entry,
733 mvm->phy_db);
734
735 /* Will also start the device */
736 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
737 if (ret) {
738 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
739 goto error;
740 }
741
742 ret = iwl_send_bt_init_conf(mvm);
743 if (ret)
744 goto error;
745
746 /* Read the NVM only at driver load time, no need to do this twice */
747 if (read_nvm) {
748 /* Read nvm */
749 ret = iwl_nvm_init(mvm, true);
750 if (ret) {
751 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
752 goto error;
753 }
754 }
755
756 /* In case we read the NVM from external file, load it to the NIC */
757 if (mvm->nvm_file_name)
758 iwl_mvm_load_nvm_to_nic(mvm);
759
760 ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
761 WARN_ON(ret);
762
763 /*
764 * abort after reading the nvm in case RF Kill is on, we will complete
765 * the init seq later when RF kill will switch to off
766 */
767 if (iwl_mvm_is_radio_hw_killed(mvm)) {
768 IWL_DEBUG_RF_KILL(mvm,
769 "jump over all phy activities due to RF kill\n");
770 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
771 ret = 1;
772 goto out;
773 }
774
775 mvm->calibrating = true;
776
777 /* Send TX valid antennas before triggering calibrations */
778 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
779 if (ret)
780 goto error;
781
782 /*
783 * Send phy configurations command to init uCode
784 * to start the 16.0 uCode init image internal calibrations.
785 */
786 ret = iwl_send_phy_cfg_cmd(mvm);
787 if (ret) {
788 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
789 ret);
790 goto error;
791 }
792
793 /*
794 * Some things may run in the background now, but we
795 * just wait for the calibration complete notification.
796 */
797 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
798 MVM_UCODE_CALIB_TIMEOUT);
799
800 if (ret && iwl_mvm_is_radio_hw_killed(mvm)) {
801 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
802 ret = 1;
803 }
804 goto out;
805
806 error:
807 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
808 out:
809 mvm->calibrating = false;
810 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
811 /* we want to debug INIT and we have no NVM - fake */
812 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
813 sizeof(struct ieee80211_channel) +
814 sizeof(struct ieee80211_rate),
815 GFP_KERNEL);
816 if (!mvm->nvm_data)
817 return -ENOMEM;
818 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
819 mvm->nvm_data->bands[0].n_channels = 1;
820 mvm->nvm_data->bands[0].n_bitrates = 1;
821 mvm->nvm_data->bands[0].bitrates =
822 (void *)mvm->nvm_data->channels + 1;
823 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
824 }
825
826 return ret;
827 }
828
829 static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
830 {
831 struct iwl_host_cmd cmd = {
832 .flags = CMD_WANT_SKB,
833 .data = { NULL, },
834 .len = { 0, },
835 };
836 struct iwl_shared_mem_cfg *mem_cfg;
837 struct iwl_rx_packet *pkt;
838 u32 i;
839
840 lockdep_assert_held(&mvm->mutex);
841
842 if (fw_has_capa(&mvm->fw->ucode_capa,
843 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
844 cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0);
845 else
846 cmd.id = SHARED_MEM_CFG;
847
848 if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
849 return;
850
851 pkt = cmd.resp_pkt;
852 mem_cfg = (void *)pkt->data;
853
854 mvm->shared_mem_cfg.shared_mem_addr =
855 le32_to_cpu(mem_cfg->shared_mem_addr);
856 mvm->shared_mem_cfg.shared_mem_size =
857 le32_to_cpu(mem_cfg->shared_mem_size);
858 mvm->shared_mem_cfg.sample_buff_addr =
859 le32_to_cpu(mem_cfg->sample_buff_addr);
860 mvm->shared_mem_cfg.sample_buff_size =
861 le32_to_cpu(mem_cfg->sample_buff_size);
862 mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr);
863 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++)
864 mvm->shared_mem_cfg.txfifo_size[i] =
865 le32_to_cpu(mem_cfg->txfifo_size[i]);
866 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
867 mvm->shared_mem_cfg.rxfifo_size[i] =
868 le32_to_cpu(mem_cfg->rxfifo_size[i]);
869 mvm->shared_mem_cfg.page_buff_addr =
870 le32_to_cpu(mem_cfg->page_buff_addr);
871 mvm->shared_mem_cfg.page_buff_size =
872 le32_to_cpu(mem_cfg->page_buff_size);
873
874 /* new API has more data */
875 if (fw_has_capa(&mvm->fw->ucode_capa,
876 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
877 mvm->shared_mem_cfg.rxfifo_addr =
878 le32_to_cpu(mem_cfg->rxfifo_addr);
879 mvm->shared_mem_cfg.internal_txfifo_addr =
880 le32_to_cpu(mem_cfg->internal_txfifo_addr);
881
882 BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) !=
883 sizeof(mem_cfg->internal_txfifo_size));
884
885 for (i = 0;
886 i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size);
887 i++)
888 mvm->shared_mem_cfg.internal_txfifo_size[i] =
889 le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
890 }
891
892 IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
893
894 iwl_free_resp(&cmd);
895 }
896
897 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
898 {
899 struct iwl_ltr_config_cmd cmd = {
900 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
901 };
902
903 if (!mvm->trans->ltr_enabled)
904 return 0;
905
906 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
907 sizeof(cmd), &cmd);
908 }
909
910 #define ACPI_WRDS_METHOD "WRDS"
911 #define ACPI_WRDS_WIFI (0x07)
912 #define ACPI_WRDS_TABLE_SIZE 10
913
914 struct iwl_mvm_sar_table {
915 bool enabled;
916 u8 values[ACPI_WRDS_TABLE_SIZE];
917 };
918
919 #ifdef CONFIG_ACPI
920 static int iwl_mvm_sar_get_wrds(struct iwl_mvm *mvm, union acpi_object *wrds,
921 struct iwl_mvm_sar_table *sar_table)
922 {
923 union acpi_object *data_pkg;
924 u32 i;
925
926 /* We need at least two packages, one for the revision and one
927 * for the data itself. Also check that the revision is valid
928 * (i.e. it is an integer set to 0).
929 */
930 if (wrds->type != ACPI_TYPE_PACKAGE ||
931 wrds->package.count < 2 ||
932 wrds->package.elements[0].type != ACPI_TYPE_INTEGER ||
933 wrds->package.elements[0].integer.value != 0) {
934 IWL_DEBUG_RADIO(mvm, "Unsupported wrds structure\n");
935 return -EINVAL;
936 }
937
938 /* loop through all the packages to find the one for WiFi */
939 for (i = 1; i < wrds->package.count; i++) {
940 union acpi_object *domain;
941
942 data_pkg = &wrds->package.elements[i];
943
944 /* Skip anything that is not a package with the right
945 * amount of elements (i.e. domain_type,
946 * enabled/disabled plus the sar table size.
947 */
948 if (data_pkg->type != ACPI_TYPE_PACKAGE ||
949 data_pkg->package.count != ACPI_WRDS_TABLE_SIZE + 2)
950 continue;
951
952 domain = &data_pkg->package.elements[0];
953 if (domain->type == ACPI_TYPE_INTEGER &&
954 domain->integer.value == ACPI_WRDS_WIFI)
955 break;
956
957 data_pkg = NULL;
958 }
959
960 if (!data_pkg)
961 return -ENOENT;
962
963 if (data_pkg->package.elements[1].type != ACPI_TYPE_INTEGER)
964 return -EINVAL;
965
966 sar_table->enabled = !!(data_pkg->package.elements[1].integer.value);
967
968 for (i = 0; i < ACPI_WRDS_TABLE_SIZE; i++) {
969 union acpi_object *entry;
970
971 entry = &data_pkg->package.elements[i + 2];
972 if ((entry->type != ACPI_TYPE_INTEGER) ||
973 (entry->integer.value > U8_MAX))
974 return -EINVAL;
975
976 sar_table->values[i] = entry->integer.value;
977 }
978
979 return 0;
980 }
981
982 static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm,
983 struct iwl_mvm_sar_table *sar_table)
984 {
985 acpi_handle root_handle;
986 acpi_handle handle;
987 struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL};
988 acpi_status status;
989 int ret;
990
991 root_handle = ACPI_HANDLE(mvm->dev);
992 if (!root_handle) {
993 IWL_DEBUG_RADIO(mvm,
994 "Could not retrieve root port ACPI handle\n");
995 return -ENOENT;
996 }
997
998 /* Get the method's handle */
999 status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD,
1000 &handle);
1001 if (ACPI_FAILURE(status)) {
1002 IWL_DEBUG_RADIO(mvm, "WRDS method not found\n");
1003 return -ENOENT;
1004 }
1005
1006 /* Call WRDS with no arguments */
1007 status = acpi_evaluate_object(handle, NULL, NULL, &wrds);
1008 if (ACPI_FAILURE(status)) {
1009 IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status);
1010 return -ENOENT;
1011 }
1012
1013 ret = iwl_mvm_sar_get_wrds(mvm, wrds.pointer, sar_table);
1014 kfree(wrds.pointer);
1015
1016 return ret;
1017 }
1018 #else /* CONFIG_ACPI */
1019 static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm,
1020 struct iwl_mvm_sar_table *sar_table)
1021 {
1022 return -ENOENT;
1023 }
1024 #endif /* CONFIG_ACPI */
1025
1026 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1027 {
1028 struct iwl_mvm_sar_table sar_table;
1029 struct iwl_dev_tx_power_cmd cmd = {
1030 .v3.v2.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
1031 };
1032 int ret, i, j, idx;
1033 int len = sizeof(cmd);
1034
1035 /* we can't do anything with the table if the FW doesn't support it */
1036 if (!fw_has_api(&mvm->fw->ucode_capa,
1037 IWL_UCODE_TLV_API_TX_POWER_CHAIN)) {
1038 IWL_DEBUG_RADIO(mvm,
1039 "FW doesn't support per-chain TX power settings.\n");
1040 return 0;
1041 }
1042
1043 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
1044 len = sizeof(cmd.v3);
1045
1046 ret = iwl_mvm_sar_get_table(mvm, &sar_table);
1047 if (ret < 0) {
1048 IWL_DEBUG_RADIO(mvm,
1049 "SAR BIOS table invalid or unavailable. (%d)\n",
1050 ret);
1051 /* we don't fail if the table is not available */
1052 return 0;
1053 }
1054
1055 if (!sar_table.enabled)
1056 return 0;
1057
1058 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
1059
1060 BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS !=
1061 ACPI_WRDS_TABLE_SIZE);
1062
1063 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1064 IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
1065 for (j = 0; j < IWL_NUM_SUB_BANDS; j++) {
1066 idx = (i * IWL_NUM_SUB_BANDS) + j;
1067 cmd.v3.per_chain_restriction[i][j] =
1068 cpu_to_le16(sar_table.values[idx]);
1069 IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
1070 j, sar_table.values[idx]);
1071 }
1072 }
1073
1074 ret = iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
1075 if (ret)
1076 IWL_ERR(mvm, "failed to set per-chain TX power: %d\n", ret);
1077
1078 return ret;
1079 }
1080
1081 int iwl_mvm_up(struct iwl_mvm *mvm)
1082 {
1083 int ret, i;
1084 struct ieee80211_channel *chan;
1085 struct cfg80211_chan_def chandef;
1086
1087 lockdep_assert_held(&mvm->mutex);
1088
1089 ret = iwl_trans_start_hw(mvm->trans);
1090 if (ret)
1091 return ret;
1092
1093 /*
1094 * If we haven't completed the run of the init ucode during
1095 * module loading, load init ucode now
1096 * (for example, if we were in RFKILL)
1097 */
1098 ret = iwl_run_init_mvm_ucode(mvm, false);
1099 if (ret && !iwlmvm_mod_params.init_dbg) {
1100 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1101 /* this can't happen */
1102 if (WARN_ON(ret > 0))
1103 ret = -ERFKILL;
1104 goto error;
1105 }
1106 if (!iwlmvm_mod_params.init_dbg) {
1107 /*
1108 * Stop and start the transport without entering low power
1109 * mode. This will save the state of other components on the
1110 * device that are triggered by the INIT firwmare (MFUART).
1111 */
1112 _iwl_trans_stop_device(mvm->trans, false);
1113 ret = _iwl_trans_start_hw(mvm->trans, false);
1114 if (ret)
1115 goto error;
1116 }
1117
1118 if (iwlmvm_mod_params.init_dbg)
1119 return 0;
1120
1121 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1122 if (ret) {
1123 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1124 goto error;
1125 }
1126
1127 iwl_mvm_get_shared_mem_conf(mvm);
1128
1129 ret = iwl_mvm_sf_update(mvm, NULL, false);
1130 if (ret)
1131 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1132
1133 mvm->fw_dbg_conf = FW_DBG_INVALID;
1134 /* if we have a destination, assume EARLY START */
1135 if (mvm->fw->dbg_dest_tlv)
1136 mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
1137 iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
1138
1139 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1140 if (ret)
1141 goto error;
1142
1143 ret = iwl_send_bt_init_conf(mvm);
1144 if (ret)
1145 goto error;
1146
1147 /* Send phy db control command and then phy db calibration*/
1148 ret = iwl_send_phy_db_data(mvm->phy_db);
1149 if (ret)
1150 goto error;
1151
1152 ret = iwl_send_phy_cfg_cmd(mvm);
1153 if (ret)
1154 goto error;
1155
1156 /* Init RSS configuration */
1157 if (iwl_mvm_has_new_rx_api(mvm)) {
1158 ret = iwl_send_rss_cfg_cmd(mvm);
1159 if (ret) {
1160 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1161 ret);
1162 goto error;
1163 }
1164 }
1165
1166 /* init the fw <-> mac80211 STA mapping */
1167 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1168 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1169
1170 mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
1171
1172 /* reset quota debouncing buffer - 0xff will yield invalid data */
1173 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1174
1175 /* Enable DQA-mode if required */
1176 if (iwl_mvm_is_dqa_supported(mvm)) {
1177 ret = iwl_mvm_send_dqa_cmd(mvm);
1178 if (ret)
1179 goto error;
1180 } else {
1181 IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n");
1182 }
1183
1184 /* Add auxiliary station for scanning */
1185 ret = iwl_mvm_add_aux_sta(mvm);
1186 if (ret)
1187 goto error;
1188
1189 /* Add all the PHY contexts */
1190 chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
1191 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1192 for (i = 0; i < NUM_PHY_CTX; i++) {
1193 /*
1194 * The channel used here isn't relevant as it's
1195 * going to be overwritten in the other flows.
1196 * For now use the first channel we have.
1197 */
1198 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1199 &chandef, 1, 1);
1200 if (ret)
1201 goto error;
1202 }
1203
1204 #ifdef CONFIG_THERMAL
1205 if (iwl_mvm_is_tt_in_fw(mvm)) {
1206 /* in order to give the responsibility of ct-kill and
1207 * TX backoff to FW we need to send empty temperature reporting
1208 * cmd during init time
1209 */
1210 iwl_mvm_send_temp_report_ths_cmd(mvm);
1211 } else {
1212 /* Initialize tx backoffs to the minimal possible */
1213 iwl_mvm_tt_tx_backoff(mvm, 0);
1214 }
1215
1216 /* TODO: read the budget from BIOS / Platform NVM */
1217 if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0)
1218 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1219 mvm->cooling_dev.cur_state);
1220 #else
1221 /* Initialize tx backoffs to the minimal possible */
1222 iwl_mvm_tt_tx_backoff(mvm, 0);
1223 #endif
1224
1225 WARN_ON(iwl_mvm_config_ltr(mvm));
1226
1227 ret = iwl_mvm_power_update_device(mvm);
1228 if (ret)
1229 goto error;
1230
1231 /*
1232 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1233 * anyway, so don't init MCC.
1234 */
1235 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1236 ret = iwl_mvm_init_mcc(mvm);
1237 if (ret)
1238 goto error;
1239 }
1240
1241 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1242 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1243 ret = iwl_mvm_config_scan(mvm);
1244 if (ret)
1245 goto error;
1246 }
1247
1248 if (iwl_mvm_is_csum_supported(mvm) &&
1249 mvm->cfg->features & NETIF_F_RXCSUM)
1250 iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3);
1251
1252 /* allow FW/transport low power modes if not during restart */
1253 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1254 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1255
1256 ret = iwl_mvm_sar_init(mvm);
1257 if (ret)
1258 goto error;
1259
1260 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1261 return 0;
1262 error:
1263 iwl_mvm_stop_device(mvm);
1264 return ret;
1265 }
1266
1267 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1268 {
1269 int ret, i;
1270
1271 lockdep_assert_held(&mvm->mutex);
1272
1273 ret = iwl_trans_start_hw(mvm->trans);
1274 if (ret)
1275 return ret;
1276
1277 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1278 if (ret) {
1279 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1280 goto error;
1281 }
1282
1283 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1284 if (ret)
1285 goto error;
1286
1287 /* Send phy db control command and then phy db calibration*/
1288 ret = iwl_send_phy_db_data(mvm->phy_db);
1289 if (ret)
1290 goto error;
1291
1292 ret = iwl_send_phy_cfg_cmd(mvm);
1293 if (ret)
1294 goto error;
1295
1296 /* init the fw <-> mac80211 STA mapping */
1297 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1298 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1299
1300 /* Add auxiliary station for scanning */
1301 ret = iwl_mvm_add_aux_sta(mvm);
1302 if (ret)
1303 goto error;
1304
1305 return 0;
1306 error:
1307 iwl_mvm_stop_device(mvm);
1308 return ret;
1309 }
1310
1311 void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1312 struct iwl_rx_cmd_buffer *rxb)
1313 {
1314 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1315 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1316 u32 flags = le32_to_cpu(card_state_notif->flags);
1317
1318 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1319 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1320 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1321 (flags & CT_KILL_CARD_DISABLED) ?
1322 "Reached" : "Not reached");
1323 }
1324
1325 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1326 struct iwl_rx_cmd_buffer *rxb)
1327 {
1328 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1329 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1330
1331 IWL_DEBUG_INFO(mvm,
1332 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1333 le32_to_cpu(mfuart_notif->installed_ver),
1334 le32_to_cpu(mfuart_notif->external_ver),
1335 le32_to_cpu(mfuart_notif->status),
1336 le32_to_cpu(mfuart_notif->duration));
1337 }
Linux kernel - Deliverables
This page took 0.060931 seconds and 5 git commands to generate.