1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * All rights reserved.
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *****************************************************************************/
66 #include <net/mac80211.h>
68 #include "iwl-trans.h"
69 #include "iwl-op-mode.h"
71 #include "iwl-debug.h"
72 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
73 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
75 #include "iwl-eeprom-parse.h"
79 #include "iwl-phy-db.h"
81 #define MVM_UCODE_ALIVE_TIMEOUT HZ
82 #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
84 #define UCODE_VALID_OK cpu_to_le32(0x1)
86 struct iwl_mvm_alive_data
{
91 static inline const struct fw_img
*
92 iwl_get_ucode_image(struct iwl_mvm
*mvm
, enum iwl_ucode_type ucode_type
)
94 if (ucode_type
>= IWL_UCODE_TYPE_MAX
)
97 return &mvm
->fw
->img
[ucode_type
];
100 static int iwl_send_tx_ant_cfg(struct iwl_mvm
*mvm
, u8 valid_tx_ant
)
102 struct iwl_tx_ant_cfg_cmd tx_ant_cmd
= {
103 .valid
= cpu_to_le32(valid_tx_ant
),
106 IWL_DEBUG_FW(mvm
, "select valid tx ant: %u\n", valid_tx_ant
);
107 return iwl_mvm_send_cmd_pdu(mvm
, TX_ANT_CONFIGURATION_CMD
, 0,
108 sizeof(tx_ant_cmd
), &tx_ant_cmd
);
111 static int iwl_send_rss_cfg_cmd(struct iwl_mvm
*mvm
)
114 struct iwl_rss_config_cmd cmd
= {
115 .flags
= cpu_to_le32(IWL_RSS_ENABLE
),
116 .hash_mask
= IWL_RSS_HASH_TYPE_IPV4_TCP
|
117 IWL_RSS_HASH_TYPE_IPV4_PAYLOAD
|
118 IWL_RSS_HASH_TYPE_IPV6_TCP
|
119 IWL_RSS_HASH_TYPE_IPV6_PAYLOAD
,
122 for (i
= 0; i
< ARRAY_SIZE(cmd
.indirection_table
); i
++)
123 cmd
.indirection_table
[i
] = i
% mvm
->trans
->num_rx_queues
;
124 memcpy(cmd
.secret_key
, mvm
->secret_key
, sizeof(cmd
.secret_key
));
126 return iwl_mvm_send_cmd_pdu(mvm
, RSS_CONFIG_CMD
, 0, sizeof(cmd
), &cmd
);
129 void iwl_free_fw_paging(struct iwl_mvm
*mvm
)
133 if (!mvm
->fw_paging_db
[0].fw_paging_block
)
136 for (i
= 0; i
< NUM_OF_FW_PAGING_BLOCKS
; i
++) {
137 if (!mvm
->fw_paging_db
[i
].fw_paging_block
) {
139 "Paging: block %d already freed, continue to next page\n",
145 __free_pages(mvm
->fw_paging_db
[i
].fw_paging_block
,
146 get_order(mvm
->fw_paging_db
[i
].fw_paging_size
));
148 kfree(mvm
->trans
->paging_download_buf
);
149 mvm
->trans
->paging_download_buf
= NULL
;
151 memset(mvm
->fw_paging_db
, 0, sizeof(mvm
->fw_paging_db
));
154 static int iwl_fill_paging_mem(struct iwl_mvm
*mvm
, const struct fw_img
*image
)
160 * find where is the paging image start point:
161 * if CPU2 exist and it's in paging format, then the image looks like:
162 * CPU1 sections (2 or more)
163 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
164 * CPU2 sections (not paged)
165 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
166 * non paged to CPU2 paging sec
168 * CPU2 paging image (including instruction and data)
170 for (sec_idx
= 0; sec_idx
< IWL_UCODE_SECTION_MAX
; sec_idx
++) {
171 if (image
->sec
[sec_idx
].offset
== PAGING_SEPARATOR_SECTION
) {
177 if (sec_idx
>= IWL_UCODE_SECTION_MAX
) {
178 IWL_ERR(mvm
, "driver didn't find paging image\n");
179 iwl_free_fw_paging(mvm
);
183 /* copy the CSS block to the dram */
184 IWL_DEBUG_FW(mvm
, "Paging: load paging CSS to FW, sec = %d\n",
187 memcpy(page_address(mvm
->fw_paging_db
[0].fw_paging_block
),
188 image
->sec
[sec_idx
].data
,
189 mvm
->fw_paging_db
[0].fw_paging_size
);
192 "Paging: copied %d CSS bytes to first block\n",
193 mvm
->fw_paging_db
[0].fw_paging_size
);
198 * copy the paging blocks to the dram
199 * loop index start from 1 since that CSS block already copied to dram
200 * and CSS index is 0.
201 * loop stop at num_of_paging_blk since that last block is not full.
203 for (idx
= 1; idx
< mvm
->num_of_paging_blk
; idx
++) {
204 memcpy(page_address(mvm
->fw_paging_db
[idx
].fw_paging_block
),
205 image
->sec
[sec_idx
].data
+ offset
,
206 mvm
->fw_paging_db
[idx
].fw_paging_size
);
209 "Paging: copied %d paging bytes to block %d\n",
210 mvm
->fw_paging_db
[idx
].fw_paging_size
,
213 offset
+= mvm
->fw_paging_db
[idx
].fw_paging_size
;
216 /* copy the last paging block */
217 if (mvm
->num_of_pages_in_last_blk
> 0) {
218 memcpy(page_address(mvm
->fw_paging_db
[idx
].fw_paging_block
),
219 image
->sec
[sec_idx
].data
+ offset
,
220 FW_PAGING_SIZE
* mvm
->num_of_pages_in_last_blk
);
223 "Paging: copied %d pages in the last block %d\n",
224 mvm
->num_of_pages_in_last_blk
, idx
);
230 static int iwl_alloc_fw_paging_mem(struct iwl_mvm
*mvm
,
231 const struct fw_img
*image
)
236 int order
, num_of_pages
;
239 if (mvm
->fw_paging_db
[0].fw_paging_block
)
242 dma_enabled
= is_device_dma_capable(mvm
->trans
->dev
);
244 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
245 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE
) != PAGING_BLOCK_SIZE
);
247 num_of_pages
= image
->paging_mem_size
/ FW_PAGING_SIZE
;
248 mvm
->num_of_paging_blk
= ((num_of_pages
- 1) /
249 NUM_OF_PAGE_PER_GROUP
) + 1;
251 mvm
->num_of_pages_in_last_blk
=
253 NUM_OF_PAGE_PER_GROUP
* (mvm
->num_of_paging_blk
- 1);
256 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
257 mvm
->num_of_paging_blk
,
258 mvm
->num_of_pages_in_last_blk
);
260 /* allocate block of 4Kbytes for paging CSS */
261 order
= get_order(FW_PAGING_SIZE
);
262 block
= alloc_pages(GFP_KERNEL
, order
);
264 /* free all the previous pages since we failed */
265 iwl_free_fw_paging(mvm
);
269 mvm
->fw_paging_db
[blk_idx
].fw_paging_block
= block
;
270 mvm
->fw_paging_db
[blk_idx
].fw_paging_size
= FW_PAGING_SIZE
;
273 phys
= dma_map_page(mvm
->trans
->dev
, block
, 0,
274 PAGE_SIZE
<< order
, DMA_BIDIRECTIONAL
);
275 if (dma_mapping_error(mvm
->trans
->dev
, phys
)) {
277 * free the previous pages and the current one since
278 * we failed to map_page.
280 iwl_free_fw_paging(mvm
);
283 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
= phys
;
285 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
= PAGING_ADDR_SIG
|
286 blk_idx
<< BLOCK_2_EXP_SIZE
;
290 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
294 * allocate blocks in dram.
295 * since that CSS allocated in fw_paging_db[0] loop start from index 1
297 for (blk_idx
= 1; blk_idx
< mvm
->num_of_paging_blk
+ 1; blk_idx
++) {
298 /* allocate block of PAGING_BLOCK_SIZE (32K) */
299 order
= get_order(PAGING_BLOCK_SIZE
);
300 block
= alloc_pages(GFP_KERNEL
, order
);
302 /* free all the previous pages since we failed */
303 iwl_free_fw_paging(mvm
);
307 mvm
->fw_paging_db
[blk_idx
].fw_paging_block
= block
;
308 mvm
->fw_paging_db
[blk_idx
].fw_paging_size
= PAGING_BLOCK_SIZE
;
311 phys
= dma_map_page(mvm
->trans
->dev
, block
, 0,
314 if (dma_mapping_error(mvm
->trans
->dev
, phys
)) {
316 * free the previous pages and the current one
317 * since we failed to map_page.
319 iwl_free_fw_paging(mvm
);
322 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
= phys
;
324 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
=
326 blk_idx
<< BLOCK_2_EXP_SIZE
;
330 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
337 static int iwl_save_fw_paging(struct iwl_mvm
*mvm
,
338 const struct fw_img
*fw
)
342 ret
= iwl_alloc_fw_paging_mem(mvm
, fw
);
346 return iwl_fill_paging_mem(mvm
, fw
);
349 /* send paging cmd to FW in case CPU2 has paging image */
350 static int iwl_send_paging_cmd(struct iwl_mvm
*mvm
, const struct fw_img
*fw
)
354 struct iwl_fw_paging_cmd fw_paging_cmd
= {
356 cpu_to_le32(PAGING_CMD_IS_SECURED
|
357 PAGING_CMD_IS_ENABLED
|
358 (mvm
->num_of_pages_in_last_blk
<<
359 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS
)),
360 .block_size
= cpu_to_le32(BLOCK_2_EXP_SIZE
),
361 .block_num
= cpu_to_le32(mvm
->num_of_paging_blk
),
364 /* loop for for all paging blocks + CSS block */
365 for (blk_idx
= 0; blk_idx
< mvm
->num_of_paging_blk
+ 1; blk_idx
++) {
367 cpu_to_le32(mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
>>
369 fw_paging_cmd
.device_phy_addr
[blk_idx
] = dev_phy_addr
;
372 return iwl_mvm_send_cmd_pdu(mvm
, iwl_cmd_id(FW_PAGING_BLOCK_CMD
,
373 IWL_ALWAYS_LONG_GROUP
, 0),
374 0, sizeof(fw_paging_cmd
), &fw_paging_cmd
);
378 * Send paging item cmd to FW in case CPU2 has paging image
380 static int iwl_trans_get_paging_item(struct iwl_mvm
*mvm
)
383 struct iwl_fw_get_item_cmd fw_get_item_cmd
= {
384 .item_id
= cpu_to_le32(IWL_FW_ITEM_ID_PAGING
),
387 struct iwl_fw_get_item_resp
*item_resp
;
388 struct iwl_host_cmd cmd
= {
389 .id
= iwl_cmd_id(FW_GET_ITEM_CMD
, IWL_ALWAYS_LONG_GROUP
, 0),
390 .flags
= CMD_WANT_SKB
| CMD_SEND_IN_RFKILL
,
391 .data
= { &fw_get_item_cmd
, },
394 cmd
.len
[0] = sizeof(struct iwl_fw_get_item_cmd
);
396 ret
= iwl_mvm_send_cmd(mvm
, &cmd
);
399 "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
404 item_resp
= (void *)((struct iwl_rx_packet
*)cmd
.resp_pkt
)->data
;
405 if (item_resp
->item_id
!= cpu_to_le32(IWL_FW_ITEM_ID_PAGING
)) {
407 "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
408 le32_to_cpu(item_resp
->item_id
));
413 mvm
->trans
->paging_download_buf
= kzalloc(MAX_PAGING_IMAGE_SIZE
,
415 if (!mvm
->trans
->paging_download_buf
) {
419 mvm
->trans
->paging_req_addr
= le32_to_cpu(item_resp
->item_val
);
420 mvm
->trans
->paging_db
= mvm
->fw_paging_db
;
422 "Paging: got paging request address (paging_req_addr 0x%08x)\n",
423 mvm
->trans
->paging_req_addr
);
431 static bool iwl_alive_fn(struct iwl_notif_wait_data
*notif_wait
,
432 struct iwl_rx_packet
*pkt
, void *data
)
434 struct iwl_mvm
*mvm
=
435 container_of(notif_wait
, struct iwl_mvm
, notif_wait
);
436 struct iwl_mvm_alive_data
*alive_data
= data
;
437 struct mvm_alive_resp_ver1
*palive1
;
438 struct mvm_alive_resp_ver2
*palive2
;
439 struct mvm_alive_resp
*palive
;
441 if (iwl_rx_packet_payload_len(pkt
) == sizeof(*palive1
)) {
442 palive1
= (void *)pkt
->data
;
444 mvm
->support_umac_log
= false;
445 mvm
->error_event_table
=
446 le32_to_cpu(palive1
->error_event_table_ptr
);
447 mvm
->log_event_table
=
448 le32_to_cpu(palive1
->log_event_table_ptr
);
449 alive_data
->scd_base_addr
= le32_to_cpu(palive1
->scd_base_ptr
);
451 alive_data
->valid
= le16_to_cpu(palive1
->status
) ==
454 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
455 le16_to_cpu(palive1
->status
), palive1
->ver_type
,
456 palive1
->ver_subtype
, palive1
->flags
);
457 } else if (iwl_rx_packet_payload_len(pkt
) == sizeof(*palive2
)) {
458 palive2
= (void *)pkt
->data
;
460 mvm
->error_event_table
=
461 le32_to_cpu(palive2
->error_event_table_ptr
);
462 mvm
->log_event_table
=
463 le32_to_cpu(palive2
->log_event_table_ptr
);
464 alive_data
->scd_base_addr
= le32_to_cpu(palive2
->scd_base_ptr
);
465 mvm
->umac_error_event_table
=
466 le32_to_cpu(palive2
->error_info_addr
);
467 mvm
->sf_space
.addr
= le32_to_cpu(palive2
->st_fwrd_addr
);
468 mvm
->sf_space
.size
= le32_to_cpu(palive2
->st_fwrd_size
);
470 alive_data
->valid
= le16_to_cpu(palive2
->status
) ==
472 if (mvm
->umac_error_event_table
)
473 mvm
->support_umac_log
= true;
476 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
477 le16_to_cpu(palive2
->status
), palive2
->ver_type
,
478 palive2
->ver_subtype
, palive2
->flags
);
481 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
482 palive2
->umac_major
, palive2
->umac_minor
);
483 } else if (iwl_rx_packet_payload_len(pkt
) == sizeof(*palive
)) {
484 palive
= (void *)pkt
->data
;
486 mvm
->error_event_table
=
487 le32_to_cpu(palive
->error_event_table_ptr
);
488 mvm
->log_event_table
=
489 le32_to_cpu(palive
->log_event_table_ptr
);
490 alive_data
->scd_base_addr
= le32_to_cpu(palive
->scd_base_ptr
);
491 mvm
->umac_error_event_table
=
492 le32_to_cpu(palive
->error_info_addr
);
493 mvm
->sf_space
.addr
= le32_to_cpu(palive
->st_fwrd_addr
);
494 mvm
->sf_space
.size
= le32_to_cpu(palive
->st_fwrd_size
);
496 alive_data
->valid
= le16_to_cpu(palive
->status
) ==
498 if (mvm
->umac_error_event_table
)
499 mvm
->support_umac_log
= true;
502 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
503 le16_to_cpu(palive
->status
), palive
->ver_type
,
504 palive
->ver_subtype
, palive
->flags
);
507 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
508 le32_to_cpu(palive
->umac_major
),
509 le32_to_cpu(palive
->umac_minor
));
515 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data
*notif_wait
,
516 struct iwl_rx_packet
*pkt
, void *data
)
518 struct iwl_phy_db
*phy_db
= data
;
520 if (pkt
->hdr
.cmd
!= CALIB_RES_NOTIF_PHY_DB
) {
521 WARN_ON(pkt
->hdr
.cmd
!= INIT_COMPLETE_NOTIF
);
525 WARN_ON(iwl_phy_db_set_section(phy_db
, pkt
, GFP_ATOMIC
));
530 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm
*mvm
,
531 enum iwl_ucode_type ucode_type
)
533 struct iwl_notification_wait alive_wait
;
534 struct iwl_mvm_alive_data alive_data
;
535 const struct fw_img
*fw
;
537 enum iwl_ucode_type old_type
= mvm
->cur_ucode
;
538 static const u16 alive_cmd
[] = { MVM_ALIVE
};
539 struct iwl_sf_region st_fwrd_space
;
541 if (ucode_type
== IWL_UCODE_REGULAR
&&
542 iwl_fw_dbg_conf_usniffer(mvm
->fw
, FW_DBG_START_FROM_ALIVE
) &&
543 !(fw_has_capa(&mvm
->fw
->ucode_capa
,
544 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED
)))
545 fw
= iwl_get_ucode_image(mvm
, IWL_UCODE_REGULAR_USNIFFER
);
547 fw
= iwl_get_ucode_image(mvm
, ucode_type
);
550 mvm
->cur_ucode
= ucode_type
;
551 mvm
->ucode_loaded
= false;
553 iwl_init_notification_wait(&mvm
->notif_wait
, &alive_wait
,
554 alive_cmd
, ARRAY_SIZE(alive_cmd
),
555 iwl_alive_fn
, &alive_data
);
557 ret
= iwl_trans_start_fw(mvm
->trans
, fw
, ucode_type
== IWL_UCODE_INIT
);
559 mvm
->cur_ucode
= old_type
;
560 iwl_remove_notification(&mvm
->notif_wait
, &alive_wait
);
565 * Some things may run in the background now, but we
566 * just wait for the ALIVE notification here.
568 ret
= iwl_wait_notification(&mvm
->notif_wait
, &alive_wait
,
569 MVM_UCODE_ALIVE_TIMEOUT
);
571 if (mvm
->trans
->cfg
->device_family
== IWL_DEVICE_FAMILY_8000
)
573 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
574 iwl_read_prph(mvm
->trans
, SB_CPU_1_STATUS
),
575 iwl_read_prph(mvm
->trans
, SB_CPU_2_STATUS
));
576 mvm
->cur_ucode
= old_type
;
580 if (!alive_data
.valid
) {
581 IWL_ERR(mvm
, "Loaded ucode is not valid!\n");
582 mvm
->cur_ucode
= old_type
;
587 * update the sdio allocation according to the pointer we get in the
588 * alive notification.
590 st_fwrd_space
.addr
= mvm
->sf_space
.addr
;
591 st_fwrd_space
.size
= mvm
->sf_space
.size
;
592 ret
= iwl_trans_update_sf(mvm
->trans
, &st_fwrd_space
);
594 IWL_ERR(mvm
, "Failed to update SF size. ret %d\n", ret
);
598 iwl_trans_fw_alive(mvm
->trans
, alive_data
.scd_base_addr
);
601 * configure and operate fw paging mechanism.
602 * driver configures the paging flow only once, CPU2 paging image
603 * included in the IWL_UCODE_INIT image.
605 if (fw
->paging_mem_size
) {
607 * When dma is not enabled, the driver needs to copy / write
608 * the downloaded / uploaded page to / from the smem.
609 * This gets the location of the place were the pages are
612 if (!is_device_dma_capable(mvm
->trans
->dev
)) {
613 ret
= iwl_trans_get_paging_item(mvm
);
615 IWL_ERR(mvm
, "failed to get FW paging item\n");
620 ret
= iwl_save_fw_paging(mvm
, fw
);
622 IWL_ERR(mvm
, "failed to save the FW paging image\n");
626 ret
= iwl_send_paging_cmd(mvm
, fw
);
628 IWL_ERR(mvm
, "failed to send the paging cmd\n");
629 iwl_free_fw_paging(mvm
);
635 * Note: all the queues are enabled as part of the interface
636 * initialization, but in firmware restart scenarios they
637 * could be stopped, so wake them up. In firmware restart,
638 * mac80211 will have the queues stopped as well until the
639 * reconfiguration completes. During normal startup, they
643 memset(&mvm
->queue_info
, 0, sizeof(mvm
->queue_info
));
644 mvm
->queue_info
[IWL_MVM_CMD_QUEUE
].hw_queue_refcount
= 1;
646 for (i
= 0; i
< IEEE80211_MAX_QUEUES
; i
++)
647 atomic_set(&mvm
->mac80211_queue_stop_count
[i
], 0);
649 mvm
->ucode_loaded
= true;
654 static int iwl_send_phy_cfg_cmd(struct iwl_mvm
*mvm
)
656 struct iwl_phy_cfg_cmd phy_cfg_cmd
;
657 enum iwl_ucode_type ucode_type
= mvm
->cur_ucode
;
660 phy_cfg_cmd
.phy_cfg
= cpu_to_le32(iwl_mvm_get_phy_config(mvm
));
661 phy_cfg_cmd
.calib_control
.event_trigger
=
662 mvm
->fw
->default_calib
[ucode_type
].event_trigger
;
663 phy_cfg_cmd
.calib_control
.flow_trigger
=
664 mvm
->fw
->default_calib
[ucode_type
].flow_trigger
;
666 IWL_DEBUG_INFO(mvm
, "Sending Phy CFG command: 0x%x\n",
667 phy_cfg_cmd
.phy_cfg
);
669 return iwl_mvm_send_cmd_pdu(mvm
, PHY_CONFIGURATION_CMD
, 0,
670 sizeof(phy_cfg_cmd
), &phy_cfg_cmd
);
673 int iwl_run_init_mvm_ucode(struct iwl_mvm
*mvm
, bool read_nvm
)
675 struct iwl_notification_wait calib_wait
;
676 static const u16 init_complete
[] = {
678 CALIB_RES_NOTIF_PHY_DB
682 lockdep_assert_held(&mvm
->mutex
);
684 if (WARN_ON_ONCE(mvm
->calibrating
))
687 iwl_init_notification_wait(&mvm
->notif_wait
,
690 ARRAY_SIZE(init_complete
),
691 iwl_wait_phy_db_entry
,
694 /* Will also start the device */
695 ret
= iwl_mvm_load_ucode_wait_alive(mvm
, IWL_UCODE_INIT
);
697 IWL_ERR(mvm
, "Failed to start INIT ucode: %d\n", ret
);
701 ret
= iwl_send_bt_init_conf(mvm
);
705 /* Read the NVM only at driver load time, no need to do this twice */
708 ret
= iwl_nvm_init(mvm
, true);
710 IWL_ERR(mvm
, "Failed to read NVM: %d\n", ret
);
715 /* In case we read the NVM from external file, load it to the NIC */
716 if (mvm
->nvm_file_name
)
717 iwl_mvm_load_nvm_to_nic(mvm
);
719 ret
= iwl_nvm_check_version(mvm
->nvm_data
, mvm
->trans
);
723 * abort after reading the nvm in case RF Kill is on, we will complete
724 * the init seq later when RF kill will switch to off
726 if (iwl_mvm_is_radio_hw_killed(mvm
)) {
727 IWL_DEBUG_RF_KILL(mvm
,
728 "jump over all phy activities due to RF kill\n");
729 iwl_remove_notification(&mvm
->notif_wait
, &calib_wait
);
734 mvm
->calibrating
= true;
736 /* Send TX valid antennas before triggering calibrations */
737 ret
= iwl_send_tx_ant_cfg(mvm
, iwl_mvm_get_valid_tx_ant(mvm
));
742 * Send phy configurations command to init uCode
743 * to start the 16.0 uCode init image internal calibrations.
745 ret
= iwl_send_phy_cfg_cmd(mvm
);
747 IWL_ERR(mvm
, "Failed to run INIT calibrations: %d\n",
753 * Some things may run in the background now, but we
754 * just wait for the calibration complete notification.
756 ret
= iwl_wait_notification(&mvm
->notif_wait
, &calib_wait
,
757 MVM_UCODE_CALIB_TIMEOUT
);
759 if (ret
&& iwl_mvm_is_radio_hw_killed(mvm
)) {
760 IWL_DEBUG_RF_KILL(mvm
, "RFKILL while calibrating.\n");
766 iwl_remove_notification(&mvm
->notif_wait
, &calib_wait
);
768 mvm
->calibrating
= false;
769 if (iwlmvm_mod_params
.init_dbg
&& !mvm
->nvm_data
) {
770 /* we want to debug INIT and we have no NVM - fake */
771 mvm
->nvm_data
= kzalloc(sizeof(struct iwl_nvm_data
) +
772 sizeof(struct ieee80211_channel
) +
773 sizeof(struct ieee80211_rate
),
777 mvm
->nvm_data
->bands
[0].channels
= mvm
->nvm_data
->channels
;
778 mvm
->nvm_data
->bands
[0].n_channels
= 1;
779 mvm
->nvm_data
->bands
[0].n_bitrates
= 1;
780 mvm
->nvm_data
->bands
[0].bitrates
=
781 (void *)mvm
->nvm_data
->channels
+ 1;
782 mvm
->nvm_data
->bands
[0].bitrates
->hw_value
= 10;
788 static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm
*mvm
)
790 struct iwl_host_cmd cmd
= {
791 .id
= SHARED_MEM_CFG
,
792 .flags
= CMD_WANT_SKB
,
796 struct iwl_rx_packet
*pkt
;
797 struct iwl_shared_mem_cfg
*mem_cfg
;
800 lockdep_assert_held(&mvm
->mutex
);
802 if (WARN_ON(iwl_mvm_send_cmd(mvm
, &cmd
)))
806 mem_cfg
= (void *)pkt
->data
;
808 mvm
->shared_mem_cfg
.shared_mem_addr
=
809 le32_to_cpu(mem_cfg
->shared_mem_addr
);
810 mvm
->shared_mem_cfg
.shared_mem_size
=
811 le32_to_cpu(mem_cfg
->shared_mem_size
);
812 mvm
->shared_mem_cfg
.sample_buff_addr
=
813 le32_to_cpu(mem_cfg
->sample_buff_addr
);
814 mvm
->shared_mem_cfg
.sample_buff_size
=
815 le32_to_cpu(mem_cfg
->sample_buff_size
);
816 mvm
->shared_mem_cfg
.txfifo_addr
= le32_to_cpu(mem_cfg
->txfifo_addr
);
817 for (i
= 0; i
< ARRAY_SIZE(mvm
->shared_mem_cfg
.txfifo_size
); i
++)
818 mvm
->shared_mem_cfg
.txfifo_size
[i
] =
819 le32_to_cpu(mem_cfg
->txfifo_size
[i
]);
820 for (i
= 0; i
< ARRAY_SIZE(mvm
->shared_mem_cfg
.rxfifo_size
); i
++)
821 mvm
->shared_mem_cfg
.rxfifo_size
[i
] =
822 le32_to_cpu(mem_cfg
->rxfifo_size
[i
]);
823 mvm
->shared_mem_cfg
.page_buff_addr
=
824 le32_to_cpu(mem_cfg
->page_buff_addr
);
825 mvm
->shared_mem_cfg
.page_buff_size
=
826 le32_to_cpu(mem_cfg
->page_buff_size
);
827 IWL_DEBUG_INFO(mvm
, "SHARED MEM CFG: got memory offsets/sizes\n");
832 static int iwl_mvm_config_ltr(struct iwl_mvm
*mvm
)
834 struct iwl_ltr_config_cmd cmd
= {
835 .flags
= cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE
),
838 if (!mvm
->trans
->ltr_enabled
)
841 return iwl_mvm_send_cmd_pdu(mvm
, LTR_CONFIG
, 0,
845 int iwl_mvm_up(struct iwl_mvm
*mvm
)
848 struct ieee80211_channel
*chan
;
849 struct cfg80211_chan_def chandef
;
851 lockdep_assert_held(&mvm
->mutex
);
853 ret
= iwl_trans_start_hw(mvm
->trans
);
858 * If we haven't completed the run of the init ucode during
859 * module loading, load init ucode now
860 * (for example, if we were in RFKILL)
862 ret
= iwl_run_init_mvm_ucode(mvm
, false);
863 if (ret
&& !iwlmvm_mod_params
.init_dbg
) {
864 IWL_ERR(mvm
, "Failed to run INIT ucode: %d\n", ret
);
865 /* this can't happen */
866 if (WARN_ON(ret
> 0))
870 if (!iwlmvm_mod_params
.init_dbg
) {
872 * Stop and start the transport without entering low power
873 * mode. This will save the state of other components on the
874 * device that are triggered by the INIT firwmare (MFUART).
876 _iwl_trans_stop_device(mvm
->trans
, false);
877 ret
= _iwl_trans_start_hw(mvm
->trans
, false);
882 if (iwlmvm_mod_params
.init_dbg
)
885 ret
= iwl_mvm_load_ucode_wait_alive(mvm
, IWL_UCODE_REGULAR
);
887 IWL_ERR(mvm
, "Failed to start RT ucode: %d\n", ret
);
891 iwl_mvm_get_shared_mem_conf(mvm
);
893 ret
= iwl_mvm_sf_update(mvm
, NULL
, false);
895 IWL_ERR(mvm
, "Failed to initialize Smart Fifo\n");
897 mvm
->fw_dbg_conf
= FW_DBG_INVALID
;
898 /* if we have a destination, assume EARLY START */
899 if (mvm
->fw
->dbg_dest_tlv
)
900 mvm
->fw_dbg_conf
= FW_DBG_START_FROM_ALIVE
;
901 iwl_mvm_start_fw_dbg_conf(mvm
, FW_DBG_START_FROM_ALIVE
);
903 ret
= iwl_send_tx_ant_cfg(mvm
, iwl_mvm_get_valid_tx_ant(mvm
));
907 ret
= iwl_send_bt_init_conf(mvm
);
911 /* Send phy db control command and then phy db calibration*/
912 ret
= iwl_send_phy_db_data(mvm
->phy_db
);
916 ret
= iwl_send_phy_cfg_cmd(mvm
);
920 /* Init RSS configuration */
921 if (iwl_mvm_has_new_rx_api(mvm
)) {
922 ret
= iwl_send_rss_cfg_cmd(mvm
);
924 IWL_ERR(mvm
, "Failed to configure RSS queues: %d\n",
930 /* init the fw <-> mac80211 STA mapping */
931 for (i
= 0; i
< IWL_MVM_STATION_COUNT
; i
++)
932 RCU_INIT_POINTER(mvm
->fw_id_to_mac_id
[i
], NULL
);
934 mvm
->tdls_cs
.peer
.sta_id
= IWL_MVM_STATION_COUNT
;
936 /* reset quota debouncing buffer - 0xff will yield invalid data */
937 memset(&mvm
->last_quota_cmd
, 0xff, sizeof(mvm
->last_quota_cmd
));
939 /* Add auxiliary station for scanning */
940 ret
= iwl_mvm_add_aux_sta(mvm
);
944 /* Add all the PHY contexts */
945 chan
= &mvm
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
]->channels
[0];
946 cfg80211_chandef_create(&chandef
, chan
, NL80211_CHAN_NO_HT
);
947 for (i
= 0; i
< NUM_PHY_CTX
; i
++) {
949 * The channel used here isn't relevant as it's
950 * going to be overwritten in the other flows.
951 * For now use the first channel we have.
953 ret
= iwl_mvm_phy_ctxt_add(mvm
, &mvm
->phy_ctxts
[i
],
959 #ifdef CONFIG_THERMAL
960 if (iwl_mvm_is_tt_in_fw(mvm
)) {
961 /* in order to give the responsibility of ct-kill and
962 * TX backoff to FW we need to send empty temperature reporting
963 * cmd during init time
965 iwl_mvm_send_temp_report_ths_cmd(mvm
);
967 /* Initialize tx backoffs to the minimal possible */
968 iwl_mvm_tt_tx_backoff(mvm
, 0);
971 /* TODO: read the budget from BIOS / Platform NVM */
972 if (iwl_mvm_is_ctdp_supported(mvm
) && mvm
->cooling_dev
.cur_state
> 0)
973 ret
= iwl_mvm_ctdp_command(mvm
, CTDP_CMD_OPERATION_START
,
974 mvm
->cooling_dev
.cur_state
);
976 /* Initialize tx backoffs to the minimal possible */
977 iwl_mvm_tt_tx_backoff(mvm
, 0);
980 WARN_ON(iwl_mvm_config_ltr(mvm
));
982 ret
= iwl_mvm_power_update_device(mvm
);
987 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
988 * anyway, so don't init MCC.
990 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL
, &mvm
->status
)) {
991 ret
= iwl_mvm_init_mcc(mvm
);
996 if (fw_has_capa(&mvm
->fw
->ucode_capa
, IWL_UCODE_TLV_CAPA_UMAC_SCAN
)) {
997 mvm
->scan_type
= IWL_SCAN_TYPE_NOT_SET
;
998 ret
= iwl_mvm_config_scan(mvm
);
1003 if (iwl_mvm_is_csum_supported(mvm
) &&
1004 mvm
->cfg
->features
& NETIF_F_RXCSUM
)
1005 iwl_trans_write_prph(mvm
->trans
, RX_EN_CSUM
, 0x3);
1007 /* allow FW/transport low power modes if not during restart */
1008 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART
, &mvm
->status
))
1009 iwl_mvm_unref(mvm
, IWL_MVM_REF_UCODE_DOWN
);
1011 IWL_DEBUG_INFO(mvm
, "RT uCode started.\n");
1014 iwl_mvm_stop_device(mvm
);
1018 int iwl_mvm_load_d3_fw(struct iwl_mvm
*mvm
)
1022 lockdep_assert_held(&mvm
->mutex
);
1024 ret
= iwl_trans_start_hw(mvm
->trans
);
1028 ret
= iwl_mvm_load_ucode_wait_alive(mvm
, IWL_UCODE_WOWLAN
);
1030 IWL_ERR(mvm
, "Failed to start WoWLAN firmware: %d\n", ret
);
1034 ret
= iwl_send_tx_ant_cfg(mvm
, iwl_mvm_get_valid_tx_ant(mvm
));
1038 /* Send phy db control command and then phy db calibration*/
1039 ret
= iwl_send_phy_db_data(mvm
->phy_db
);
1043 ret
= iwl_send_phy_cfg_cmd(mvm
);
1047 /* init the fw <-> mac80211 STA mapping */
1048 for (i
= 0; i
< IWL_MVM_STATION_COUNT
; i
++)
1049 RCU_INIT_POINTER(mvm
->fw_id_to_mac_id
[i
], NULL
);
1051 /* Add auxiliary station for scanning */
1052 ret
= iwl_mvm_add_aux_sta(mvm
);
1058 iwl_mvm_stop_device(mvm
);
1062 void iwl_mvm_rx_card_state_notif(struct iwl_mvm
*mvm
,
1063 struct iwl_rx_cmd_buffer
*rxb
)
1065 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1066 struct iwl_card_state_notif
*card_state_notif
= (void *)pkt
->data
;
1067 u32 flags
= le32_to_cpu(card_state_notif
->flags
);
1069 IWL_DEBUG_RF_KILL(mvm
, "Card state received: HW:%s SW:%s CT:%s\n",
1070 (flags
& HW_CARD_DISABLED
) ? "Kill" : "On",
1071 (flags
& SW_CARD_DISABLED
) ? "Kill" : "On",
1072 (flags
& CT_KILL_CARD_DISABLED
) ?
1073 "Reached" : "Not reached");
1076 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm
*mvm
,
1077 struct iwl_rx_cmd_buffer
*rxb
)
1079 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1080 struct iwl_mfuart_load_notif
*mfuart_notif
= (void *)pkt
->data
;
1083 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1084 le32_to_cpu(mfuart_notif
->installed_ver
),
1085 le32_to_cpu(mfuart_notif
->external_ver
),
1086 le32_to_cpu(mfuart_notif
->status
),
1087 le32_to_cpu(mfuart_notif
->duration
));