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[deliverable/linux.git] / drivers / pci / pcie / pme.c
1 /*
2 * PCIe Native PME support
3 *
4 * Copyright (C) 2007 - 2009 Intel Corp
5 * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
6 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License V2. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13 #include <linux/pci.h>
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/device.h>
20 #include <linux/pcieport_if.h>
21 #include <linux/pm_runtime.h>
22
23 #include "../pci.h"
24 #include "portdrv.h"
25
26 /*
27 * If this switch is set, MSI will not be used for PCIe PME signaling. This
28 * causes the PCIe port driver to use INTx interrupts only, but it turns out
29 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
30 * wake-up from system sleep states.
31 */
32 bool pcie_pme_msi_disabled;
33
34 static int __init pcie_pme_setup(char *str)
35 {
36 if (!strncmp(str, "nomsi", 5))
37 pcie_pme_msi_disabled = true;
38
39 return 1;
40 }
41 __setup("pcie_pme=", pcie_pme_setup);
42
43 enum pme_suspend_level {
44 PME_SUSPEND_NONE = 0,
45 PME_SUSPEND_WAKEUP,
46 PME_SUSPEND_NOIRQ,
47 };
48
49 struct pcie_pme_service_data {
50 spinlock_t lock;
51 struct pcie_device *srv;
52 struct work_struct work;
53 enum pme_suspend_level suspend_level;
54 };
55
56 /**
57 * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
58 * @dev: PCIe root port or event collector.
59 * @enable: Enable or disable the interrupt.
60 */
61 void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
62 {
63 if (enable)
64 pcie_capability_set_word(dev, PCI_EXP_RTCTL,
65 PCI_EXP_RTCTL_PMEIE);
66 else
67 pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
68 PCI_EXP_RTCTL_PMEIE);
69 }
70
71 /**
72 * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
73 * @bus: PCI bus to scan.
74 *
75 * Scan given PCI bus and all buses under it for devices asserting PME#.
76 */
77 static bool pcie_pme_walk_bus(struct pci_bus *bus)
78 {
79 struct pci_dev *dev;
80 bool ret = false;
81
82 list_for_each_entry(dev, &bus->devices, bus_list) {
83 /* Skip PCIe devices in case we started from a root port. */
84 if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
85 if (dev->pme_poll)
86 dev->pme_poll = false;
87
88 pci_wakeup_event(dev);
89 pm_request_resume(&dev->dev);
90 ret = true;
91 }
92
93 if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
94 ret = true;
95 }
96
97 return ret;
98 }
99
100 /**
101 * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
102 * @bus: Secondary bus of the bridge.
103 * @devfn: Device/function number to check.
104 *
105 * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
106 * PCIe PME message. In such that case the bridge should use the Requester ID
107 * of device/function number 0 on its secondary bus.
108 */
109 static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
110 {
111 struct pci_dev *dev;
112 bool found = false;
113
114 if (devfn)
115 return false;
116
117 dev = pci_dev_get(bus->self);
118 if (!dev)
119 return false;
120
121 if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
122 down_read(&pci_bus_sem);
123 if (pcie_pme_walk_bus(bus))
124 found = true;
125 up_read(&pci_bus_sem);
126 }
127
128 pci_dev_put(dev);
129 return found;
130 }
131
132 /**
133 * pcie_pme_handle_request - Find device that generated PME and handle it.
134 * @port: Root port or event collector that generated the PME interrupt.
135 * @req_id: PCIe Requester ID of the device that generated the PME.
136 */
137 static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
138 {
139 u8 busnr = req_id >> 8, devfn = req_id & 0xff;
140 struct pci_bus *bus;
141 struct pci_dev *dev;
142 bool found = false;
143
144 /* First, check if the PME is from the root port itself. */
145 if (port->devfn == devfn && port->bus->number == busnr) {
146 if (port->pme_poll)
147 port->pme_poll = false;
148
149 if (pci_check_pme_status(port)) {
150 pm_request_resume(&port->dev);
151 found = true;
152 } else {
153 /*
154 * Apparently, the root port generated the PME on behalf
155 * of a non-PCIe device downstream. If this is done by
156 * a root port, the Requester ID field in its status
157 * register may contain either the root port's, or the
158 * source device's information (PCI Express Base
159 * Specification, Rev. 2.0, Section 6.1.9).
160 */
161 down_read(&pci_bus_sem);
162 found = pcie_pme_walk_bus(port->subordinate);
163 up_read(&pci_bus_sem);
164 }
165 goto out;
166 }
167
168 /* Second, find the bus the source device is on. */
169 bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
170 if (!bus)
171 goto out;
172
173 /* Next, check if the PME is from a PCIe-PCI bridge. */
174 found = pcie_pme_from_pci_bridge(bus, devfn);
175 if (found)
176 goto out;
177
178 /* Finally, try to find the PME source on the bus. */
179 down_read(&pci_bus_sem);
180 list_for_each_entry(dev, &bus->devices, bus_list) {
181 pci_dev_get(dev);
182 if (dev->devfn == devfn) {
183 found = true;
184 break;
185 }
186 pci_dev_put(dev);
187 }
188 up_read(&pci_bus_sem);
189
190 if (found) {
191 /* The device is there, but we have to check its PME status. */
192 found = pci_check_pme_status(dev);
193 if (found) {
194 if (dev->pme_poll)
195 dev->pme_poll = false;
196
197 pci_wakeup_event(dev);
198 pm_request_resume(&dev->dev);
199 }
200 pci_dev_put(dev);
201 } else if (devfn) {
202 /*
203 * The device is not there, but we can still try to recover by
204 * assuming that the PME was reported by a PCIe-PCI bridge that
205 * used devfn different from zero.
206 */
207 dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
208 busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
209 found = pcie_pme_from_pci_bridge(bus, 0);
210 }
211
212 out:
213 if (!found)
214 dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
215 }
216
217 /**
218 * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
219 * @work: Work structure giving access to service data.
220 */
221 static void pcie_pme_work_fn(struct work_struct *work)
222 {
223 struct pcie_pme_service_data *data =
224 container_of(work, struct pcie_pme_service_data, work);
225 struct pci_dev *port = data->srv->port;
226 u32 rtsta;
227
228 spin_lock_irq(&data->lock);
229
230 for (;;) {
231 if (data->suspend_level != PME_SUSPEND_NONE)
232 break;
233
234 pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
235 if (rtsta & PCI_EXP_RTSTA_PME) {
236 /*
237 * Clear PME status of the port. If there are other
238 * pending PMEs, the status will be set again.
239 */
240 pcie_clear_root_pme_status(port);
241
242 spin_unlock_irq(&data->lock);
243 pcie_pme_handle_request(port, rtsta & 0xffff);
244 spin_lock_irq(&data->lock);
245
246 continue;
247 }
248
249 /* No need to loop if there are no more PMEs pending. */
250 if (!(rtsta & PCI_EXP_RTSTA_PENDING))
251 break;
252
253 spin_unlock_irq(&data->lock);
254 cpu_relax();
255 spin_lock_irq(&data->lock);
256 }
257
258 if (data->suspend_level == PME_SUSPEND_NONE)
259 pcie_pme_interrupt_enable(port, true);
260
261 spin_unlock_irq(&data->lock);
262 }
263
264 /**
265 * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
266 * @irq: Interrupt vector.
267 * @context: Interrupt context pointer.
268 */
269 static irqreturn_t pcie_pme_irq(int irq, void *context)
270 {
271 struct pci_dev *port;
272 struct pcie_pme_service_data *data;
273 u32 rtsta;
274 unsigned long flags;
275
276 port = ((struct pcie_device *)context)->port;
277 data = get_service_data((struct pcie_device *)context);
278
279 spin_lock_irqsave(&data->lock, flags);
280 pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
281
282 if (!(rtsta & PCI_EXP_RTSTA_PME)) {
283 spin_unlock_irqrestore(&data->lock, flags);
284 return IRQ_NONE;
285 }
286
287 pcie_pme_interrupt_enable(port, false);
288 spin_unlock_irqrestore(&data->lock, flags);
289
290 /* We don't use pm_wq, because it's freezable. */
291 schedule_work(&data->work);
292
293 return IRQ_HANDLED;
294 }
295
296 /**
297 * pcie_pme_set_native - Set the PME interrupt flag for given device.
298 * @dev: PCI device to handle.
299 * @ign: Ignored.
300 */
301 static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
302 {
303 dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
304
305 device_set_run_wake(&dev->dev, true);
306 dev->pme_interrupt = true;
307 return 0;
308 }
309
310 /**
311 * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
312 * @port: PCIe root port or event collector to handle.
313 *
314 * For each device below given root port, including the port itself (or for each
315 * root complex integrated endpoint if @port is a root complex event collector)
316 * set the flag indicating that it can signal run-time wake-up events via PCIe
317 * PME interrupts.
318 */
319 static void pcie_pme_mark_devices(struct pci_dev *port)
320 {
321 pcie_pme_set_native(port, NULL);
322 if (port->subordinate) {
323 pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
324 } else {
325 struct pci_bus *bus = port->bus;
326 struct pci_dev *dev;
327
328 /* Check if this is a root port event collector. */
329 if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
330 return;
331
332 down_read(&pci_bus_sem);
333 list_for_each_entry(dev, &bus->devices, bus_list)
334 if (pci_is_pcie(dev)
335 && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
336 pcie_pme_set_native(dev, NULL);
337 up_read(&pci_bus_sem);
338 }
339 }
340
341 /**
342 * pcie_pme_probe - Initialize PCIe PME service for given root port.
343 * @srv: PCIe service to initialize.
344 */
345 static int pcie_pme_probe(struct pcie_device *srv)
346 {
347 struct pci_dev *port;
348 struct pcie_pme_service_data *data;
349 int ret;
350
351 data = kzalloc(sizeof(*data), GFP_KERNEL);
352 if (!data)
353 return -ENOMEM;
354
355 spin_lock_init(&data->lock);
356 INIT_WORK(&data->work, pcie_pme_work_fn);
357 data->srv = srv;
358 set_service_data(srv, data);
359
360 port = srv->port;
361 pcie_pme_interrupt_enable(port, false);
362 pcie_clear_root_pme_status(port);
363
364 ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
365 if (ret) {
366 kfree(data);
367 } else {
368 pcie_pme_mark_devices(port);
369 pcie_pme_interrupt_enable(port, true);
370 }
371
372 return ret;
373 }
374
375 static bool pcie_pme_check_wakeup(struct pci_bus *bus)
376 {
377 struct pci_dev *dev;
378
379 if (!bus)
380 return false;
381
382 list_for_each_entry(dev, &bus->devices, bus_list)
383 if (device_may_wakeup(&dev->dev)
384 || pcie_pme_check_wakeup(dev->subordinate))
385 return true;
386
387 return false;
388 }
389
390 /**
391 * pcie_pme_suspend - Suspend PCIe PME service device.
392 * @srv: PCIe service device to suspend.
393 */
394 static int pcie_pme_suspend(struct pcie_device *srv)
395 {
396 struct pcie_pme_service_data *data = get_service_data(srv);
397 struct pci_dev *port = srv->port;
398 bool wakeup, wake_irq_enabled = false;
399 int ret;
400
401 if (device_may_wakeup(&port->dev)) {
402 wakeup = true;
403 } else {
404 down_read(&pci_bus_sem);
405 wakeup = pcie_pme_check_wakeup(port->subordinate);
406 up_read(&pci_bus_sem);
407 }
408 spin_lock_irq(&data->lock);
409 if (wakeup) {
410 ret = enable_irq_wake(srv->irq);
411 if (ret == 0) {
412 data->suspend_level = PME_SUSPEND_WAKEUP;
413 wake_irq_enabled = true;
414 }
415 }
416 if (!wake_irq_enabled) {
417 pcie_pme_interrupt_enable(port, false);
418 pcie_clear_root_pme_status(port);
419 data->suspend_level = PME_SUSPEND_NOIRQ;
420 }
421 spin_unlock_irq(&data->lock);
422
423 synchronize_irq(srv->irq);
424
425 return 0;
426 }
427
428 /**
429 * pcie_pme_resume - Resume PCIe PME service device.
430 * @srv - PCIe service device to resume.
431 */
432 static int pcie_pme_resume(struct pcie_device *srv)
433 {
434 struct pcie_pme_service_data *data = get_service_data(srv);
435
436 spin_lock_irq(&data->lock);
437 if (data->suspend_level == PME_SUSPEND_NOIRQ) {
438 struct pci_dev *port = srv->port;
439
440 pcie_clear_root_pme_status(port);
441 pcie_pme_interrupt_enable(port, true);
442 } else {
443 disable_irq_wake(srv->irq);
444 }
445 data->suspend_level = PME_SUSPEND_NONE;
446 spin_unlock_irq(&data->lock);
447
448 return 0;
449 }
450
451 static struct pcie_port_service_driver pcie_pme_driver = {
452 .name = "pcie_pme",
453 .port_type = PCI_EXP_TYPE_ROOT_PORT,
454 .service = PCIE_PORT_SERVICE_PME,
455
456 .probe = pcie_pme_probe,
457 .suspend = pcie_pme_suspend,
458 .resume = pcie_pme_resume,
459 };
460
461 /**
462 * pcie_pme_service_init - Register the PCIe PME service driver.
463 */
464 static int __init pcie_pme_service_init(void)
465 {
466 return pcie_port_service_register(&pcie_pme_driver);
467 }
468 device_initcall(pcie_pme_service_init);
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