drivers/phy/phy-sun4i-usb.c

   1 /*
   2  * Allwinner sun4i USB phy driver
   3  *
   4  * Copyright (C) 2014 Hans de Goede <hdegoede@redhat.com>
   5  *
   6  * Based on code from
   7  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
   8  *
   9  * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
  10  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  11  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  */
  23
  24 #include <linux/clk.h>
  25 #include <linux/err.h>
  26 #include <linux/io.h>
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/mutex.h>
  30 #include <linux/of.h>
  31 #include <linux/of_address.h>
  32 #include <linux/phy/phy.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/regulator/consumer.h>
  35 #include <linux/reset.h>
  36
  37 #define REG_ISCR                        0x00
  38 #define REG_PHYCTL                      0x04
  39 #define REG_PHYBIST                     0x08
  40 #define REG_PHYTUNE                     0x0c
  41
  42 #define PHYCTL_DATA                     BIT(7)
  43
  44 #define SUNXI_AHB_ICHR8_EN              BIT(10)
  45 #define SUNXI_AHB_INCR4_BURST_EN        BIT(9)
  46 #define SUNXI_AHB_INCRX_ALIGN_EN        BIT(8)
  47 #define SUNXI_ULPI_BYPASS_EN            BIT(0)
  48
  49 /* Common Control Bits for Both PHYs */
  50 #define PHY_PLL_BW                      0x03
  51 #define PHY_RES45_CAL_EN                0x0c
  52
  53 /* Private Control Bits for Each PHY */
  54 #define PHY_TX_AMPLITUDE_TUNE           0x20
  55 #define PHY_TX_SLEWRATE_TUNE            0x22
  56 #define PHY_VBUSVALID_TH_SEL            0x25
  57 #define PHY_PULLUP_RES_SEL              0x27
  58 #define PHY_OTG_FUNC_EN                 0x28
  59 #define PHY_VBUS_DET_EN                 0x29
  60 #define PHY_DISCON_TH_SEL               0x2a
  61
  62 #define MAX_PHYS                        3
  63
  64 struct sun4i_usb_phy_data {
  65         void __iomem *base;
  66         struct mutex mutex;
  67         int num_phys;
  68         u32 disc_thresh;
  69         struct sun4i_usb_phy {
  70                 struct phy *phy;
  71                 void __iomem *pmu;
  72                 struct regulator *vbus;
  73                 struct reset_control *reset;
  74                 struct clk *clk;
  75                 int index;
  76         } phys[MAX_PHYS];
  77 };
  78
  79 #define to_sun4i_usb_phy_data(phy) \
  80         container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
  81
  82 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
  83                                 int len)
  84 {
  85         struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
  86         u32 temp, usbc_bit = BIT(phy->index * 2);
  87         int i;
  88
  89         mutex_lock(&phy_data->mutex);
  90
  91         for (i = 0; i < len; i++) {
  92                 temp = readl(phy_data->base + REG_PHYCTL);
  93
  94                 /* clear the address portion */
  95                 temp &= ~(0xff << 8);
  96
  97                 /* set the address */
  98                 temp |= ((addr + i) << 8);
  99                 writel(temp, phy_data->base + REG_PHYCTL);
 100
 101                 /* set the data bit and clear usbc bit*/
 102                 temp = readb(phy_data->base + REG_PHYCTL);
 103                 if (data & 0x1)
 104                         temp |= PHYCTL_DATA;
 105                 else
 106                         temp &= ~PHYCTL_DATA;
 107                 temp &= ~usbc_bit;
 108                 writeb(temp, phy_data->base + REG_PHYCTL);
 109
 110                 /* pulse usbc_bit */
 111                 temp = readb(phy_data->base + REG_PHYCTL);
 112                 temp |= usbc_bit;
 113                 writeb(temp, phy_data->base + REG_PHYCTL);
 114
 115                 temp = readb(phy_data->base + REG_PHYCTL);
 116                 temp &= ~usbc_bit;
 117                 writeb(temp, phy_data->base + REG_PHYCTL);
 118
 119                 data >>= 1;
 120         }
 121         mutex_unlock(&phy_data->mutex);
 122 }
 123
 124 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
 125 {
 126         u32 bits, reg_value;
 127
 128         if (!phy->pmu)
 129                 return;
 130
 131         bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
 132                 SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
 133
 134         reg_value = readl(phy->pmu);
 135
 136         if (enable)
 137                 reg_value |= bits;
 138         else
 139                 reg_value &= ~bits;
 140
 141         writel(reg_value, phy->pmu);
 142 }
 143
 144 static int sun4i_usb_phy_init(struct phy *_phy)
 145 {
 146         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 147         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
 148         int ret;
 149
 150         ret = clk_prepare_enable(phy->clk);
 151         if (ret)
 152                 return ret;
 153
 154         ret = reset_control_deassert(phy->reset);
 155         if (ret) {
 156                 clk_disable_unprepare(phy->clk);
 157                 return ret;
 158         }
 159
 160         /* Enable USB 45 Ohm resistor calibration */
 161         if (phy->index == 0)
 162                 sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
 163
 164         /* Adjust PHY's magnitude and rate */
 165         sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
 166
 167         /* Disconnect threshold adjustment */
 168         sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL, data->disc_thresh, 2);
 169
 170         sun4i_usb_phy_passby(phy, 1);
 171
 172         return 0;
 173 }
 174
 175 static int sun4i_usb_phy_exit(struct phy *_phy)
 176 {
 177         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 178
 179         sun4i_usb_phy_passby(phy, 0);
 180         reset_control_assert(phy->reset);
 181         clk_disable_unprepare(phy->clk);
 182
 183         return 0;
 184 }
 185
 186 static int sun4i_usb_phy_power_on(struct phy *_phy)
 187 {
 188         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 189         int ret = 0;
 190
 191         if (phy->vbus)
 192                 ret = regulator_enable(phy->vbus);
 193
 194         return ret;
 195 }
 196
 197 static int sun4i_usb_phy_power_off(struct phy *_phy)
 198 {
 199         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 200
 201         if (phy->vbus)
 202                 regulator_disable(phy->vbus);
 203
 204         return 0;
 205 }
 206
 207 static struct phy_ops sun4i_usb_phy_ops = {
 208         .init           = sun4i_usb_phy_init,
 209         .exit           = sun4i_usb_phy_exit,
 210         .power_on       = sun4i_usb_phy_power_on,
 211         .power_off      = sun4i_usb_phy_power_off,
 212         .owner          = THIS_MODULE,
 213 };
 214
 215 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
 216                                         struct of_phandle_args *args)
 217 {
 218         struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
 219
 220         if (args->args[0] >= data->num_phys)
 221                 return ERR_PTR(-ENODEV);
 222
 223         return data->phys[args->args[0]].phy;
 224 }
 225
 226 static int sun4i_usb_phy_probe(struct platform_device *pdev)
 227 {
 228         struct sun4i_usb_phy_data *data;
 229         struct device *dev = &pdev->dev;
 230         struct device_node *np = dev->of_node;
 231         struct phy_provider *phy_provider;
 232         bool dedicated_clocks;
 233         struct resource *res;
 234         int i;
 235
 236         data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
 237         if (!data)
 238                 return -ENOMEM;
 239
 240         mutex_init(&data->mutex);
 241
 242         if (of_device_is_compatible(np, "allwinner,sun5i-a13-usb-phy"))
 243                 data->num_phys = 2;
 244         else
 245                 data->num_phys = 3;
 246
 247         if (of_device_is_compatible(np, "allwinner,sun4i-a10-usb-phy") ||
 248             of_device_is_compatible(np, "allwinner,sun6i-a31-usb-phy"))
 249                 data->disc_thresh = 3;
 250         else
 251                 data->disc_thresh = 2;
 252
 253         if (of_device_is_compatible(np, "allwinner,sun6i-a31-usb-phy"))
 254                 dedicated_clocks = true;
 255         else
 256                 dedicated_clocks = false;
 257
 258         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
 259         data->base = devm_ioremap_resource(dev, res);
 260         if (IS_ERR(data->base))
 261                 return PTR_ERR(data->base);
 262
 263         for (i = 0; i < data->num_phys; i++) {
 264                 struct sun4i_usb_phy *phy = data->phys + i;
 265                 char name[16];
 266
 267                 snprintf(name, sizeof(name), "usb%d_vbus", i);
 268                 phy->vbus = devm_regulator_get_optional(dev, name);
 269                 if (IS_ERR(phy->vbus)) {
 270                         if (PTR_ERR(phy->vbus) == -EPROBE_DEFER)
 271                                 return -EPROBE_DEFER;
 272                         phy->vbus = NULL;
 273                 }
 274
 275                 if (dedicated_clocks)
 276                         snprintf(name, sizeof(name), "usb%d_phy", i);
 277                 else
 278                         strlcpy(name, "usb_phy", sizeof(name));
 279
 280                 phy->clk = devm_clk_get(dev, name);
 281                 if (IS_ERR(phy->clk)) {
 282                         dev_err(dev, "failed to get clock %s\n", name);
 283                         return PTR_ERR(phy->clk);
 284                 }
 285
 286                 snprintf(name, sizeof(name), "usb%d_reset", i);
 287                 phy->reset = devm_reset_control_get(dev, name);
 288                 if (IS_ERR(phy->reset)) {
 289                         dev_err(dev, "failed to get reset %s\n", name);
 290                         return PTR_ERR(phy->reset);
 291                 }
 292
 293                 if (i) { /* No pmu for usbc0 */
 294                         snprintf(name, sizeof(name), "pmu%d", i);
 295                         res = platform_get_resource_byname(pdev,
 296                                                         IORESOURCE_MEM, name);
 297                         phy->pmu = devm_ioremap_resource(dev, res);
 298                         if (IS_ERR(phy->pmu))
 299                                 return PTR_ERR(phy->pmu);
 300                 }
 301
 302                 phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
 303                 if (IS_ERR(phy->phy)) {
 304                         dev_err(dev, "failed to create PHY %d\n", i);
 305                         return PTR_ERR(phy->phy);
 306                 }
 307
 308                 phy->index = i;
 309                 phy_set_drvdata(phy->phy, &data->phys[i]);
 310         }
 311
 312         dev_set_drvdata(dev, data);
 313         phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
 314
 315         return PTR_ERR_OR_ZERO(phy_provider);
 316 }
 317
 318 static const struct of_device_id sun4i_usb_phy_of_match[] = {
 319         { .compatible = "allwinner,sun4i-a10-usb-phy" },
 320         { .compatible = "allwinner,sun5i-a13-usb-phy" },
 321         { .compatible = "allwinner,sun6i-a31-usb-phy" },
 322         { .compatible = "allwinner,sun7i-a20-usb-phy" },
 323         { },
 324 };
 325 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
 326
 327 static struct platform_driver sun4i_usb_phy_driver = {
 328         .probe  = sun4i_usb_phy_probe,
 329         .driver = {
 330                 .of_match_table = sun4i_usb_phy_of_match,
 331                 .name  = "sun4i-usb-phy",
 332         }
 333 };
 334 module_platform_driver(sun4i_usb_phy_driver);
 335
 336 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
 337 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
 338 MODULE_LICENSE("GPL v2");