2 * Intel Running Average Power Limit (RAPL) Driver
3 * Copyright (c) 2013, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/list.h>
23 #include <linux/types.h>
24 #include <linux/device.h>
25 #include <linux/slab.h>
26 #include <linux/log2.h>
27 #include <linux/bitmap.h>
28 #include <linux/delay.h>
29 #include <linux/sysfs.h>
30 #include <linux/cpu.h>
31 #include <linux/powercap.h>
32 #include <asm/iosf_mbi.h>
34 #include <asm/processor.h>
35 #include <asm/cpu_device_id.h>
36 #include <asm/intel-family.h>
39 #define MSR_PLATFORM_POWER_LIMIT 0x0000065C
41 /* bitmasks for RAPL MSRs, used by primitive access functions */
42 #define ENERGY_STATUS_MASK 0xffffffff
44 #define POWER_LIMIT1_MASK 0x7FFF
45 #define POWER_LIMIT1_ENABLE BIT(15)
46 #define POWER_LIMIT1_CLAMP BIT(16)
48 #define POWER_LIMIT2_MASK (0x7FFFULL<<32)
49 #define POWER_LIMIT2_ENABLE BIT_ULL(47)
50 #define POWER_LIMIT2_CLAMP BIT_ULL(48)
51 #define POWER_PACKAGE_LOCK BIT_ULL(63)
52 #define POWER_PP_LOCK BIT(31)
54 #define TIME_WINDOW1_MASK (0x7FULL<<17)
55 #define TIME_WINDOW2_MASK (0x7FULL<<49)
57 #define POWER_UNIT_OFFSET 0
58 #define POWER_UNIT_MASK 0x0F
60 #define ENERGY_UNIT_OFFSET 0x08
61 #define ENERGY_UNIT_MASK 0x1F00
63 #define TIME_UNIT_OFFSET 0x10
64 #define TIME_UNIT_MASK 0xF0000
66 #define POWER_INFO_MAX_MASK (0x7fffULL<<32)
67 #define POWER_INFO_MIN_MASK (0x7fffULL<<16)
68 #define POWER_INFO_MAX_TIME_WIN_MASK (0x3fULL<<48)
69 #define POWER_INFO_THERMAL_SPEC_MASK 0x7fff
71 #define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
72 #define PP_POLICY_MASK 0x1F
74 /* Non HW constants */
75 #define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
76 #define RAPL_PRIMITIVE_DUMMY BIT(2)
78 #define TIME_WINDOW_MAX_MSEC 40000
79 #define TIME_WINDOW_MIN_MSEC 250
80 #define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to powercap unit */
82 ARBITRARY_UNIT
, /* no translation */
88 enum rapl_domain_type
{
89 RAPL_DOMAIN_PACKAGE
, /* entire package/socket */
90 RAPL_DOMAIN_PP0
, /* core power plane */
91 RAPL_DOMAIN_PP1
, /* graphics uncore */
92 RAPL_DOMAIN_DRAM
,/* DRAM control_type */
93 RAPL_DOMAIN_PLATFORM
, /* PSys control_type */
97 enum rapl_domain_msr_id
{
98 RAPL_DOMAIN_MSR_LIMIT
,
99 RAPL_DOMAIN_MSR_STATUS
,
100 RAPL_DOMAIN_MSR_PERF
,
101 RAPL_DOMAIN_MSR_POLICY
,
102 RAPL_DOMAIN_MSR_INFO
,
106 /* per domain data, some are optional */
107 enum rapl_primitives
{
113 PL1_ENABLE
, /* power limit 1, aka long term */
114 PL1_CLAMP
, /* allow frequency to go below OS request */
115 PL2_ENABLE
, /* power limit 2, aka short term, instantaneous */
118 TIME_WINDOW1
, /* long term */
119 TIME_WINDOW2
, /* short term */
128 /* below are not raw primitive data */
133 #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
135 /* Can be expanded to include events, etc.*/
136 struct rapl_domain_data
{
137 u64 primitives
[NR_RAPL_PRIMITIVES
];
138 unsigned long timestamp
;
148 #define DOMAIN_STATE_INACTIVE BIT(0)
149 #define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
150 #define DOMAIN_STATE_BIOS_LOCKED BIT(2)
152 #define NR_POWER_LIMITS (2)
153 struct rapl_power_limit
{
154 struct powercap_zone_constraint
*constraint
;
155 int prim_id
; /* primitive ID used to enable */
156 struct rapl_domain
*domain
;
160 static const char pl1_name
[] = "long_term";
161 static const char pl2_name
[] = "short_term";
166 enum rapl_domain_type id
;
167 int msrs
[RAPL_DOMAIN_MSR_MAX
];
168 struct powercap_zone power_zone
;
169 struct rapl_domain_data rdd
;
170 struct rapl_power_limit rpl
[NR_POWER_LIMITS
];
171 u64 attr_map
; /* track capabilities */
173 unsigned int domain_energy_unit
;
174 struct rapl_package
*rp
;
176 #define power_zone_to_rapl_domain(_zone) \
177 container_of(_zone, struct rapl_domain, power_zone)
180 /* Each physical package contains multiple domains, these are the common
181 * data across RAPL domains within a package.
183 struct rapl_package
{
184 unsigned int id
; /* physical package/socket id */
185 unsigned int nr_domains
;
186 unsigned long domain_map
; /* bit map of active domains */
187 unsigned int power_unit
;
188 unsigned int energy_unit
;
189 unsigned int time_unit
;
190 struct rapl_domain
*domains
; /* array of domains, sized at runtime */
191 struct powercap_zone
*power_zone
; /* keep track of parent zone */
192 int nr_cpus
; /* active cpus on the package, topology info is lost during
193 * cpu hotplug. so we have to track ourselves.
195 unsigned long power_limit_irq
; /* keep track of package power limit
196 * notify interrupt enable status.
198 struct list_head plist
;
199 int lead_cpu
; /* one active cpu per package for access */
202 struct rapl_defaults
{
203 u8 floor_freq_reg_addr
;
204 int (*check_unit
)(struct rapl_package
*rp
, int cpu
);
205 void (*set_floor_freq
)(struct rapl_domain
*rd
, bool mode
);
206 u64 (*compute_time_window
)(struct rapl_package
*rp
, u64 val
,
208 unsigned int dram_domain_energy_unit
;
210 static struct rapl_defaults
*rapl_defaults
;
212 /* Sideband MBI registers */
213 #define IOSF_CPU_POWER_BUDGET_CTL_BYT (0x2)
214 #define IOSF_CPU_POWER_BUDGET_CTL_TNG (0xdf)
216 #define PACKAGE_PLN_INT_SAVED BIT(0)
217 #define MAX_PRIM_NAME (32)
219 /* per domain data. used to describe individual knobs such that access function
220 * can be consolidated into one instead of many inline functions.
222 struct rapl_primitive_info
{
226 enum rapl_domain_msr_id id
;
231 #define PRIMITIVE_INFO_INIT(p, m, s, i, u, f) { \
240 static void rapl_init_domains(struct rapl_package
*rp
);
241 static int rapl_read_data_raw(struct rapl_domain
*rd
,
242 enum rapl_primitives prim
,
243 bool xlate
, u64
*data
);
244 static int rapl_write_data_raw(struct rapl_domain
*rd
,
245 enum rapl_primitives prim
,
246 unsigned long long value
);
247 static u64
rapl_unit_xlate(struct rapl_domain
*rd
,
248 enum unit_type type
, u64 value
,
250 static void package_power_limit_irq_save(struct rapl_package
*rp
);
252 static LIST_HEAD(rapl_packages
); /* guarded by CPU hotplug lock */
254 static const char * const rapl_domain_names
[] = {
262 static struct powercap_control_type
*control_type
; /* PowerCap Controller */
263 static struct rapl_domain
*platform_rapl_domain
; /* Platform (PSys) domain */
265 /* caller to ensure CPU hotplug lock is held */
266 static struct rapl_package
*find_package_by_id(int id
)
268 struct rapl_package
*rp
;
270 list_for_each_entry(rp
, &rapl_packages
, plist
) {
278 /* caller must hold cpu hotplug lock */
279 static void rapl_cleanup_data(void)
281 struct rapl_package
*p
, *tmp
;
283 list_for_each_entry_safe(p
, tmp
, &rapl_packages
, plist
) {
290 static int get_energy_counter(struct powercap_zone
*power_zone
, u64
*energy_raw
)
292 struct rapl_domain
*rd
;
295 /* prevent CPU hotplug, make sure the RAPL domain does not go
296 * away while reading the counter.
299 rd
= power_zone_to_rapl_domain(power_zone
);
301 if (!rapl_read_data_raw(rd
, ENERGY_COUNTER
, true, &energy_now
)) {
302 *energy_raw
= energy_now
;
312 static int get_max_energy_counter(struct powercap_zone
*pcd_dev
, u64
*energy
)
314 struct rapl_domain
*rd
= power_zone_to_rapl_domain(pcd_dev
);
316 *energy
= rapl_unit_xlate(rd
, ENERGY_UNIT
, ENERGY_STATUS_MASK
, 0);
320 static int release_zone(struct powercap_zone
*power_zone
)
322 struct rapl_domain
*rd
= power_zone_to_rapl_domain(power_zone
);
323 struct rapl_package
*rp
= rd
->rp
;
325 /* package zone is the last zone of a package, we can free
326 * memory here since all children has been unregistered.
328 if (rd
->id
== RAPL_DOMAIN_PACKAGE
) {
337 static int find_nr_power_limit(struct rapl_domain
*rd
)
341 for (i
= 0; i
< NR_POWER_LIMITS
; i
++) {
342 if (rd
->rpl
[i
].name
== NULL
)
349 static int set_domain_enable(struct powercap_zone
*power_zone
, bool mode
)
351 struct rapl_domain
*rd
= power_zone_to_rapl_domain(power_zone
);
353 if (rd
->state
& DOMAIN_STATE_BIOS_LOCKED
)
357 rapl_write_data_raw(rd
, PL1_ENABLE
, mode
);
358 if (rapl_defaults
->set_floor_freq
)
359 rapl_defaults
->set_floor_freq(rd
, mode
);
365 static int get_domain_enable(struct powercap_zone
*power_zone
, bool *mode
)
367 struct rapl_domain
*rd
= power_zone_to_rapl_domain(power_zone
);
370 if (rd
->state
& DOMAIN_STATE_BIOS_LOCKED
) {
375 if (rapl_read_data_raw(rd
, PL1_ENABLE
, true, &val
)) {
385 /* per RAPL domain ops, in the order of rapl_domain_type */
386 static const struct powercap_zone_ops zone_ops
[] = {
387 /* RAPL_DOMAIN_PACKAGE */
389 .get_energy_uj
= get_energy_counter
,
390 .get_max_energy_range_uj
= get_max_energy_counter
,
391 .release
= release_zone
,
392 .set_enable
= set_domain_enable
,
393 .get_enable
= get_domain_enable
,
395 /* RAPL_DOMAIN_PP0 */
397 .get_energy_uj
= get_energy_counter
,
398 .get_max_energy_range_uj
= get_max_energy_counter
,
399 .release
= release_zone
,
400 .set_enable
= set_domain_enable
,
401 .get_enable
= get_domain_enable
,
403 /* RAPL_DOMAIN_PP1 */
405 .get_energy_uj
= get_energy_counter
,
406 .get_max_energy_range_uj
= get_max_energy_counter
,
407 .release
= release_zone
,
408 .set_enable
= set_domain_enable
,
409 .get_enable
= get_domain_enable
,
411 /* RAPL_DOMAIN_DRAM */
413 .get_energy_uj
= get_energy_counter
,
414 .get_max_energy_range_uj
= get_max_energy_counter
,
415 .release
= release_zone
,
416 .set_enable
= set_domain_enable
,
417 .get_enable
= get_domain_enable
,
419 /* RAPL_DOMAIN_PLATFORM */
421 .get_energy_uj
= get_energy_counter
,
422 .get_max_energy_range_uj
= get_max_energy_counter
,
423 .release
= release_zone
,
424 .set_enable
= set_domain_enable
,
425 .get_enable
= get_domain_enable
,
429 static int set_power_limit(struct powercap_zone
*power_zone
, int id
,
432 struct rapl_domain
*rd
;
433 struct rapl_package
*rp
;
437 rd
= power_zone_to_rapl_domain(power_zone
);
440 if (rd
->state
& DOMAIN_STATE_BIOS_LOCKED
) {
441 dev_warn(&power_zone
->dev
, "%s locked by BIOS, monitoring only\n",
447 switch (rd
->rpl
[id
].prim_id
) {
449 rapl_write_data_raw(rd
, POWER_LIMIT1
, power_limit
);
452 rapl_write_data_raw(rd
, POWER_LIMIT2
, power_limit
);
458 package_power_limit_irq_save(rp
);
464 static int get_current_power_limit(struct powercap_zone
*power_zone
, int id
,
467 struct rapl_domain
*rd
;
473 rd
= power_zone_to_rapl_domain(power_zone
);
474 switch (rd
->rpl
[id
].prim_id
) {
485 if (rapl_read_data_raw(rd
, prim
, true, &val
))
495 static int set_time_window(struct powercap_zone
*power_zone
, int id
,
498 struct rapl_domain
*rd
;
502 rd
= power_zone_to_rapl_domain(power_zone
);
503 switch (rd
->rpl
[id
].prim_id
) {
505 rapl_write_data_raw(rd
, TIME_WINDOW1
, window
);
508 rapl_write_data_raw(rd
, TIME_WINDOW2
, window
);
517 static int get_time_window(struct powercap_zone
*power_zone
, int id
, u64
*data
)
519 struct rapl_domain
*rd
;
524 rd
= power_zone_to_rapl_domain(power_zone
);
525 switch (rd
->rpl
[id
].prim_id
) {
527 ret
= rapl_read_data_raw(rd
, TIME_WINDOW1
, true, &val
);
530 ret
= rapl_read_data_raw(rd
, TIME_WINDOW2
, true, &val
);
543 static const char *get_constraint_name(struct powercap_zone
*power_zone
, int id
)
545 struct rapl_power_limit
*rpl
;
546 struct rapl_domain
*rd
;
548 rd
= power_zone_to_rapl_domain(power_zone
);
549 rpl
= (struct rapl_power_limit
*) &rd
->rpl
[id
];
555 static int get_max_power(struct powercap_zone
*power_zone
, int id
,
558 struct rapl_domain
*rd
;
564 rd
= power_zone_to_rapl_domain(power_zone
);
565 switch (rd
->rpl
[id
].prim_id
) {
567 prim
= THERMAL_SPEC_POWER
;
576 if (rapl_read_data_raw(rd
, prim
, true, &val
))
586 static const struct powercap_zone_constraint_ops constraint_ops
= {
587 .set_power_limit_uw
= set_power_limit
,
588 .get_power_limit_uw
= get_current_power_limit
,
589 .set_time_window_us
= set_time_window
,
590 .get_time_window_us
= get_time_window
,
591 .get_max_power_uw
= get_max_power
,
592 .get_name
= get_constraint_name
,
595 /* called after domain detection and package level data are set */
596 static void rapl_init_domains(struct rapl_package
*rp
)
599 struct rapl_domain
*rd
= rp
->domains
;
601 for (i
= 0; i
< RAPL_DOMAIN_MAX
; i
++) {
602 unsigned int mask
= rp
->domain_map
& (1 << i
);
604 case BIT(RAPL_DOMAIN_PACKAGE
):
605 rd
->name
= rapl_domain_names
[RAPL_DOMAIN_PACKAGE
];
606 rd
->id
= RAPL_DOMAIN_PACKAGE
;
607 rd
->msrs
[0] = MSR_PKG_POWER_LIMIT
;
608 rd
->msrs
[1] = MSR_PKG_ENERGY_STATUS
;
609 rd
->msrs
[2] = MSR_PKG_PERF_STATUS
;
611 rd
->msrs
[4] = MSR_PKG_POWER_INFO
;
612 rd
->rpl
[0].prim_id
= PL1_ENABLE
;
613 rd
->rpl
[0].name
= pl1_name
;
614 rd
->rpl
[1].prim_id
= PL2_ENABLE
;
615 rd
->rpl
[1].name
= pl2_name
;
617 case BIT(RAPL_DOMAIN_PP0
):
618 rd
->name
= rapl_domain_names
[RAPL_DOMAIN_PP0
];
619 rd
->id
= RAPL_DOMAIN_PP0
;
620 rd
->msrs
[0] = MSR_PP0_POWER_LIMIT
;
621 rd
->msrs
[1] = MSR_PP0_ENERGY_STATUS
;
623 rd
->msrs
[3] = MSR_PP0_POLICY
;
625 rd
->rpl
[0].prim_id
= PL1_ENABLE
;
626 rd
->rpl
[0].name
= pl1_name
;
628 case BIT(RAPL_DOMAIN_PP1
):
629 rd
->name
= rapl_domain_names
[RAPL_DOMAIN_PP1
];
630 rd
->id
= RAPL_DOMAIN_PP1
;
631 rd
->msrs
[0] = MSR_PP1_POWER_LIMIT
;
632 rd
->msrs
[1] = MSR_PP1_ENERGY_STATUS
;
634 rd
->msrs
[3] = MSR_PP1_POLICY
;
636 rd
->rpl
[0].prim_id
= PL1_ENABLE
;
637 rd
->rpl
[0].name
= pl1_name
;
639 case BIT(RAPL_DOMAIN_DRAM
):
640 rd
->name
= rapl_domain_names
[RAPL_DOMAIN_DRAM
];
641 rd
->id
= RAPL_DOMAIN_DRAM
;
642 rd
->msrs
[0] = MSR_DRAM_POWER_LIMIT
;
643 rd
->msrs
[1] = MSR_DRAM_ENERGY_STATUS
;
644 rd
->msrs
[2] = MSR_DRAM_PERF_STATUS
;
646 rd
->msrs
[4] = MSR_DRAM_POWER_INFO
;
647 rd
->rpl
[0].prim_id
= PL1_ENABLE
;
648 rd
->rpl
[0].name
= pl1_name
;
649 rd
->domain_energy_unit
=
650 rapl_defaults
->dram_domain_energy_unit
;
651 if (rd
->domain_energy_unit
)
652 pr_info("DRAM domain energy unit %dpj\n",
653 rd
->domain_energy_unit
);
663 static u64
rapl_unit_xlate(struct rapl_domain
*rd
, enum unit_type type
,
664 u64 value
, int to_raw
)
667 struct rapl_package
*rp
= rd
->rp
;
672 units
= rp
->power_unit
;
675 scale
= ENERGY_UNIT_SCALE
;
676 /* per domain unit takes precedence */
677 if (rd
&& rd
->domain_energy_unit
)
678 units
= rd
->domain_energy_unit
;
680 units
= rp
->energy_unit
;
683 return rapl_defaults
->compute_time_window(rp
, value
, to_raw
);
690 return div64_u64(value
, units
) * scale
;
694 return div64_u64(value
, scale
);
697 /* in the order of enum rapl_primitives */
698 static struct rapl_primitive_info rpi
[] = {
699 /* name, mask, shift, msr index, unit divisor */
700 PRIMITIVE_INFO_INIT(ENERGY_COUNTER
, ENERGY_STATUS_MASK
, 0,
701 RAPL_DOMAIN_MSR_STATUS
, ENERGY_UNIT
, 0),
702 PRIMITIVE_INFO_INIT(POWER_LIMIT1
, POWER_LIMIT1_MASK
, 0,
703 RAPL_DOMAIN_MSR_LIMIT
, POWER_UNIT
, 0),
704 PRIMITIVE_INFO_INIT(POWER_LIMIT2
, POWER_LIMIT2_MASK
, 32,
705 RAPL_DOMAIN_MSR_LIMIT
, POWER_UNIT
, 0),
706 PRIMITIVE_INFO_INIT(FW_LOCK
, POWER_PP_LOCK
, 31,
707 RAPL_DOMAIN_MSR_LIMIT
, ARBITRARY_UNIT
, 0),
708 PRIMITIVE_INFO_INIT(PL1_ENABLE
, POWER_LIMIT1_ENABLE
, 15,
709 RAPL_DOMAIN_MSR_LIMIT
, ARBITRARY_UNIT
, 0),
710 PRIMITIVE_INFO_INIT(PL1_CLAMP
, POWER_LIMIT1_CLAMP
, 16,
711 RAPL_DOMAIN_MSR_LIMIT
, ARBITRARY_UNIT
, 0),
712 PRIMITIVE_INFO_INIT(PL2_ENABLE
, POWER_LIMIT2_ENABLE
, 47,
713 RAPL_DOMAIN_MSR_LIMIT
, ARBITRARY_UNIT
, 0),
714 PRIMITIVE_INFO_INIT(PL2_CLAMP
, POWER_LIMIT2_CLAMP
, 48,
715 RAPL_DOMAIN_MSR_LIMIT
, ARBITRARY_UNIT
, 0),
716 PRIMITIVE_INFO_INIT(TIME_WINDOW1
, TIME_WINDOW1_MASK
, 17,
717 RAPL_DOMAIN_MSR_LIMIT
, TIME_UNIT
, 0),
718 PRIMITIVE_INFO_INIT(TIME_WINDOW2
, TIME_WINDOW2_MASK
, 49,
719 RAPL_DOMAIN_MSR_LIMIT
, TIME_UNIT
, 0),
720 PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER
, POWER_INFO_THERMAL_SPEC_MASK
,
721 0, RAPL_DOMAIN_MSR_INFO
, POWER_UNIT
, 0),
722 PRIMITIVE_INFO_INIT(MAX_POWER
, POWER_INFO_MAX_MASK
, 32,
723 RAPL_DOMAIN_MSR_INFO
, POWER_UNIT
, 0),
724 PRIMITIVE_INFO_INIT(MIN_POWER
, POWER_INFO_MIN_MASK
, 16,
725 RAPL_DOMAIN_MSR_INFO
, POWER_UNIT
, 0),
726 PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW
, POWER_INFO_MAX_TIME_WIN_MASK
, 48,
727 RAPL_DOMAIN_MSR_INFO
, TIME_UNIT
, 0),
728 PRIMITIVE_INFO_INIT(THROTTLED_TIME
, PERF_STATUS_THROTTLE_TIME_MASK
, 0,
729 RAPL_DOMAIN_MSR_PERF
, TIME_UNIT
, 0),
730 PRIMITIVE_INFO_INIT(PRIORITY_LEVEL
, PP_POLICY_MASK
, 0,
731 RAPL_DOMAIN_MSR_POLICY
, ARBITRARY_UNIT
, 0),
733 PRIMITIVE_INFO_INIT(AVERAGE_POWER
, 0, 0, 0, POWER_UNIT
,
734 RAPL_PRIMITIVE_DERIVED
),
738 /* Read primitive data based on its related struct rapl_primitive_info.
739 * if xlate flag is set, return translated data based on data units, i.e.
740 * time, energy, and power.
741 * RAPL MSRs are non-architectual and are laid out not consistently across
742 * domains. Here we use primitive info to allow writing consolidated access
744 * For a given primitive, it is processed by MSR mask and shift. Unit conversion
745 * is pre-assigned based on RAPL unit MSRs read at init time.
746 * 63-------------------------- 31--------------------------- 0
748 * | |<- shift ----------------|
749 * 63-------------------------- 31--------------------------- 0
751 static int rapl_read_data_raw(struct rapl_domain
*rd
,
752 enum rapl_primitives prim
,
753 bool xlate
, u64
*data
)
757 struct rapl_primitive_info
*rp
= &rpi
[prim
];
760 if (!rp
->name
|| rp
->flag
& RAPL_PRIMITIVE_DUMMY
)
763 msr
= rd
->msrs
[rp
->id
];
767 cpu
= rd
->rp
->lead_cpu
;
769 /* special-case package domain, which uses a different bit*/
770 if (prim
== FW_LOCK
&& rd
->id
== RAPL_DOMAIN_PACKAGE
) {
771 rp
->mask
= POWER_PACKAGE_LOCK
;
774 /* non-hardware data are collected by the polling thread */
775 if (rp
->flag
& RAPL_PRIMITIVE_DERIVED
) {
776 *data
= rd
->rdd
.primitives
[prim
];
780 if (rdmsrl_safe_on_cpu(cpu
, msr
, &value
)) {
781 pr_debug("failed to read msr 0x%x on cpu %d\n", msr
, cpu
);
785 final
= value
& rp
->mask
;
786 final
= final
>> rp
->shift
;
788 *data
= rapl_unit_xlate(rd
, rp
->unit
, final
, 0);
796 static int msrl_update_safe(u32 msr_no
, u64 clear_mask
, u64 set_mask
)
801 err
= rdmsrl_safe(msr_no
, &val
);
808 err
= wrmsrl_safe(msr_no
, val
);
814 static void msrl_update_func(void *info
)
816 struct msrl_action
*ma
= info
;
818 ma
->err
= msrl_update_safe(ma
->msr_no
, ma
->clear_mask
, ma
->set_mask
);
821 /* Similar use of primitive info in the read counterpart */
822 static int rapl_write_data_raw(struct rapl_domain
*rd
,
823 enum rapl_primitives prim
,
824 unsigned long long value
)
826 struct rapl_primitive_info
*rp
= &rpi
[prim
];
829 struct msrl_action ma
;
832 cpu
= rd
->rp
->lead_cpu
;
833 bits
= rapl_unit_xlate(rd
, rp
->unit
, value
, 1);
834 bits
|= bits
<< rp
->shift
;
835 memset(&ma
, 0, sizeof(ma
));
837 ma
.msr_no
= rd
->msrs
[rp
->id
];
838 ma
.clear_mask
= rp
->mask
;
841 ret
= smp_call_function_single(cpu
, msrl_update_func
, &ma
, 1);
851 * Raw RAPL data stored in MSRs are in certain scales. We need to
852 * convert them into standard units based on the units reported in
853 * the RAPL unit MSRs. This is specific to CPUs as the method to
854 * calculate units differ on different CPUs.
855 * We convert the units to below format based on CPUs.
857 * energy unit: picoJoules : Represented in picoJoules by default
858 * power unit : microWatts : Represented in milliWatts by default
859 * time unit : microseconds: Represented in seconds by default
861 static int rapl_check_unit_core(struct rapl_package
*rp
, int cpu
)
866 if (rdmsrl_safe_on_cpu(cpu
, MSR_RAPL_POWER_UNIT
, &msr_val
)) {
867 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
868 MSR_RAPL_POWER_UNIT
, cpu
);
872 value
= (msr_val
& ENERGY_UNIT_MASK
) >> ENERGY_UNIT_OFFSET
;
873 rp
->energy_unit
= ENERGY_UNIT_SCALE
* 1000000 / (1 << value
);
875 value
= (msr_val
& POWER_UNIT_MASK
) >> POWER_UNIT_OFFSET
;
876 rp
->power_unit
= 1000000 / (1 << value
);
878 value
= (msr_val
& TIME_UNIT_MASK
) >> TIME_UNIT_OFFSET
;
879 rp
->time_unit
= 1000000 / (1 << value
);
881 pr_debug("Core CPU package %d energy=%dpJ, time=%dus, power=%duW\n",
882 rp
->id
, rp
->energy_unit
, rp
->time_unit
, rp
->power_unit
);
887 static int rapl_check_unit_atom(struct rapl_package
*rp
, int cpu
)
892 if (rdmsrl_safe_on_cpu(cpu
, MSR_RAPL_POWER_UNIT
, &msr_val
)) {
893 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
894 MSR_RAPL_POWER_UNIT
, cpu
);
897 value
= (msr_val
& ENERGY_UNIT_MASK
) >> ENERGY_UNIT_OFFSET
;
898 rp
->energy_unit
= ENERGY_UNIT_SCALE
* 1 << value
;
900 value
= (msr_val
& POWER_UNIT_MASK
) >> POWER_UNIT_OFFSET
;
901 rp
->power_unit
= (1 << value
) * 1000;
903 value
= (msr_val
& TIME_UNIT_MASK
) >> TIME_UNIT_OFFSET
;
904 rp
->time_unit
= 1000000 / (1 << value
);
906 pr_debug("Atom package %d energy=%dpJ, time=%dus, power=%duW\n",
907 rp
->id
, rp
->energy_unit
, rp
->time_unit
, rp
->power_unit
);
912 static void power_limit_irq_save_cpu(void *info
)
915 struct rapl_package
*rp
= (struct rapl_package
*)info
;
917 /* save the state of PLN irq mask bit before disabling it */
918 rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT
, &l
, &h
);
919 if (!(rp
->power_limit_irq
& PACKAGE_PLN_INT_SAVED
)) {
920 rp
->power_limit_irq
= l
& PACKAGE_THERM_INT_PLN_ENABLE
;
921 rp
->power_limit_irq
|= PACKAGE_PLN_INT_SAVED
;
923 l
&= ~PACKAGE_THERM_INT_PLN_ENABLE
;
924 wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT
, l
, h
);
929 * When package power limit is set artificially low by RAPL, LVT
930 * thermal interrupt for package power limit should be ignored
931 * since we are not really exceeding the real limit. The intention
932 * is to avoid excessive interrupts while we are trying to save power.
933 * A useful feature might be routing the package_power_limit interrupt
934 * to userspace via eventfd. once we have a usecase, this is simple
935 * to do by adding an atomic notifier.
938 static void package_power_limit_irq_save(struct rapl_package
*rp
)
940 if (!boot_cpu_has(X86_FEATURE_PTS
) || !boot_cpu_has(X86_FEATURE_PLN
))
943 smp_call_function_single(rp
->lead_cpu
, power_limit_irq_save_cpu
, rp
, 1);
946 static void power_limit_irq_restore_cpu(void *info
)
949 struct rapl_package
*rp
= (struct rapl_package
*)info
;
951 rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT
, &l
, &h
);
953 if (rp
->power_limit_irq
& PACKAGE_THERM_INT_PLN_ENABLE
)
954 l
|= PACKAGE_THERM_INT_PLN_ENABLE
;
956 l
&= ~PACKAGE_THERM_INT_PLN_ENABLE
;
958 wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT
, l
, h
);
961 /* restore per package power limit interrupt enable state */
962 static void package_power_limit_irq_restore(struct rapl_package
*rp
)
964 if (!boot_cpu_has(X86_FEATURE_PTS
) || !boot_cpu_has(X86_FEATURE_PLN
))
967 /* irq enable state not saved, nothing to restore */
968 if (!(rp
->power_limit_irq
& PACKAGE_PLN_INT_SAVED
))
971 smp_call_function_single(rp
->lead_cpu
, power_limit_irq_restore_cpu
, rp
, 1);
974 static void set_floor_freq_default(struct rapl_domain
*rd
, bool mode
)
976 int nr_powerlimit
= find_nr_power_limit(rd
);
978 /* always enable clamp such that p-state can go below OS requested
979 * range. power capping priority over guranteed frequency.
981 rapl_write_data_raw(rd
, PL1_CLAMP
, mode
);
983 /* some domains have pl2 */
984 if (nr_powerlimit
> 1) {
985 rapl_write_data_raw(rd
, PL2_ENABLE
, mode
);
986 rapl_write_data_raw(rd
, PL2_CLAMP
, mode
);
990 static void set_floor_freq_atom(struct rapl_domain
*rd
, bool enable
)
992 static u32 power_ctrl_orig_val
;
995 if (!rapl_defaults
->floor_freq_reg_addr
) {
996 pr_err("Invalid floor frequency config register\n");
1000 if (!power_ctrl_orig_val
)
1001 iosf_mbi_read(BT_MBI_UNIT_PMC
, MBI_CR_READ
,
1002 rapl_defaults
->floor_freq_reg_addr
,
1003 &power_ctrl_orig_val
);
1004 mdata
= power_ctrl_orig_val
;
1006 mdata
&= ~(0x7f << 8);
1009 iosf_mbi_write(BT_MBI_UNIT_PMC
, MBI_CR_WRITE
,
1010 rapl_defaults
->floor_freq_reg_addr
, mdata
);
1013 static u64
rapl_compute_time_window_core(struct rapl_package
*rp
, u64 value
,
1016 u64 f
, y
; /* fraction and exp. used for time unit */
1019 * Special processing based on 2^Y*(1+F/4), refer
1020 * to Intel Software Developer's manual Vol.3B: CH 14.9.3.
1023 f
= (value
& 0x60) >> 5;
1025 value
= (1 << y
) * (4 + f
) * rp
->time_unit
/ 4;
1027 do_div(value
, rp
->time_unit
);
1029 f
= div64_u64(4 * (value
- (1 << y
)), 1 << y
);
1030 value
= (y
& 0x1f) | ((f
& 0x3) << 5);
1035 static u64
rapl_compute_time_window_atom(struct rapl_package
*rp
, u64 value
,
1039 * Atom time unit encoding is straight forward val * time_unit,
1040 * where time_unit is default to 1 sec. Never 0.
1043 return (value
) ? value
*= rp
->time_unit
: rp
->time_unit
;
1045 value
= div64_u64(value
, rp
->time_unit
);
1050 static const struct rapl_defaults rapl_defaults_core
= {
1051 .floor_freq_reg_addr
= 0,
1052 .check_unit
= rapl_check_unit_core
,
1053 .set_floor_freq
= set_floor_freq_default
,
1054 .compute_time_window
= rapl_compute_time_window_core
,
1057 static const struct rapl_defaults rapl_defaults_hsw_server
= {
1058 .check_unit
= rapl_check_unit_core
,
1059 .set_floor_freq
= set_floor_freq_default
,
1060 .compute_time_window
= rapl_compute_time_window_core
,
1061 .dram_domain_energy_unit
= 15300,
1064 static const struct rapl_defaults rapl_defaults_byt
= {
1065 .floor_freq_reg_addr
= IOSF_CPU_POWER_BUDGET_CTL_BYT
,
1066 .check_unit
= rapl_check_unit_atom
,
1067 .set_floor_freq
= set_floor_freq_atom
,
1068 .compute_time_window
= rapl_compute_time_window_atom
,
1071 static const struct rapl_defaults rapl_defaults_tng
= {
1072 .floor_freq_reg_addr
= IOSF_CPU_POWER_BUDGET_CTL_TNG
,
1073 .check_unit
= rapl_check_unit_atom
,
1074 .set_floor_freq
= set_floor_freq_atom
,
1075 .compute_time_window
= rapl_compute_time_window_atom
,
1078 static const struct rapl_defaults rapl_defaults_ann
= {
1079 .floor_freq_reg_addr
= 0,
1080 .check_unit
= rapl_check_unit_atom
,
1081 .set_floor_freq
= NULL
,
1082 .compute_time_window
= rapl_compute_time_window_atom
,
1085 static const struct rapl_defaults rapl_defaults_cht
= {
1086 .floor_freq_reg_addr
= 0,
1087 .check_unit
= rapl_check_unit_atom
,
1088 .set_floor_freq
= NULL
,
1089 .compute_time_window
= rapl_compute_time_window_atom
,
1092 #define RAPL_CPU(_model, _ops) { \
1093 .vendor = X86_VENDOR_INTEL, \
1096 .driver_data = (kernel_ulong_t)&_ops, \
1099 static const struct x86_cpu_id rapl_ids
[] __initconst
= {
1100 RAPL_CPU(INTEL_FAM6_SANDYBRIDGE
, rapl_defaults_core
),
1101 RAPL_CPU(INTEL_FAM6_SANDYBRIDGE_X
, rapl_defaults_core
),
1102 RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1
, rapl_defaults_byt
),
1103 RAPL_CPU(INTEL_FAM6_IVYBRIDGE
, rapl_defaults_core
),
1104 RAPL_CPU(INTEL_FAM6_HASWELL_CORE
, rapl_defaults_core
),
1105 RAPL_CPU(INTEL_FAM6_BROADWELL_CORE
, rapl_defaults_core
),
1106 RAPL_CPU(INTEL_FAM6_HASWELL_X
, rapl_defaults_hsw_server
),
1107 RAPL_CPU(INTEL_FAM6_BROADWELL_X
, rapl_defaults_hsw_server
),
1108 RAPL_CPU(INTEL_FAM6_HASWELL_ULT
, rapl_defaults_core
),
1109 RAPL_CPU(INTEL_FAM6_HASWELL_GT3E
, rapl_defaults_core
),
1110 RAPL_CPU(INTEL_FAM6_BROADWELL_GT3E
, rapl_defaults_core
),
1111 RAPL_CPU(INTEL_FAM6_SKYLAKE_MOBILE
, rapl_defaults_core
),
1112 RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT
, rapl_defaults_cht
),
1113 RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD1
, rapl_defaults_tng
),
1114 RAPL_CPU(INTEL_FAM6_BROADWELL_XEON_D
, rapl_defaults_core
),
1115 RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD2
, rapl_defaults_ann
),
1116 RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT
, rapl_defaults_core
),
1117 RAPL_CPU(INTEL_FAM6_SKYLAKE_DESKTOP
, rapl_defaults_core
),
1118 RAPL_CPU(INTEL_FAM6_XEON_PHI_KNL
, rapl_defaults_hsw_server
),
1119 RAPL_CPU(INTEL_FAM6_KABYLAKE_MOBILE
, rapl_defaults_core
),
1120 RAPL_CPU(INTEL_FAM6_KABYLAKE_DESKTOP
, rapl_defaults_core
),
1123 MODULE_DEVICE_TABLE(x86cpu
, rapl_ids
);
1125 /* read once for all raw primitive data for all packages, domains */
1126 static void rapl_update_domain_data(void)
1130 struct rapl_package
*rp
;
1132 list_for_each_entry(rp
, &rapl_packages
, plist
) {
1133 for (dmn
= 0; dmn
< rp
->nr_domains
; dmn
++) {
1134 pr_debug("update package %d domain %s data\n", rp
->id
,
1135 rp
->domains
[dmn
].name
);
1136 /* exclude non-raw primitives */
1137 for (prim
= 0; prim
< NR_RAW_PRIMITIVES
; prim
++)
1138 if (!rapl_read_data_raw(&rp
->domains
[dmn
], prim
,
1141 rp
->domains
[dmn
].rdd
.primitives
[prim
] =
1148 static int rapl_unregister_powercap(void)
1150 struct rapl_package
*rp
;
1151 struct rapl_domain
*rd
, *rd_package
= NULL
;
1153 /* unregister all active rapl packages from the powercap layer,
1156 list_for_each_entry(rp
, &rapl_packages
, plist
) {
1157 package_power_limit_irq_restore(rp
);
1159 for (rd
= rp
->domains
; rd
< rp
->domains
+ rp
->nr_domains
;
1161 pr_debug("remove package, undo power limit on %d: %s\n",
1163 rapl_write_data_raw(rd
, PL1_ENABLE
, 0);
1164 rapl_write_data_raw(rd
, PL1_CLAMP
, 0);
1165 if (find_nr_power_limit(rd
) > 1) {
1166 rapl_write_data_raw(rd
, PL2_ENABLE
, 0);
1167 rapl_write_data_raw(rd
, PL2_CLAMP
, 0);
1169 if (rd
->id
== RAPL_DOMAIN_PACKAGE
) {
1173 powercap_unregister_zone(control_type
, &rd
->power_zone
);
1175 /* do the package zone last */
1177 powercap_unregister_zone(control_type
,
1178 &rd_package
->power_zone
);
1181 if (platform_rapl_domain
) {
1182 powercap_unregister_zone(control_type
,
1183 &platform_rapl_domain
->power_zone
);
1184 kfree(platform_rapl_domain
);
1187 powercap_unregister_control_type(control_type
);
1192 static int rapl_package_register_powercap(struct rapl_package
*rp
)
1194 struct rapl_domain
*rd
;
1196 char dev_name
[17]; /* max domain name = 7 + 1 + 8 for int + 1 for null*/
1197 struct powercap_zone
*power_zone
= NULL
;
1200 /* first we register package domain as the parent zone*/
1201 for (rd
= rp
->domains
; rd
< rp
->domains
+ rp
->nr_domains
; rd
++) {
1202 if (rd
->id
== RAPL_DOMAIN_PACKAGE
) {
1203 nr_pl
= find_nr_power_limit(rd
);
1204 pr_debug("register socket %d package domain %s\n",
1206 memset(dev_name
, 0, sizeof(dev_name
));
1207 snprintf(dev_name
, sizeof(dev_name
), "%s-%d",
1209 power_zone
= powercap_register_zone(&rd
->power_zone
,
1215 if (IS_ERR(power_zone
)) {
1216 pr_debug("failed to register package, %d\n",
1218 ret
= PTR_ERR(power_zone
);
1221 /* track parent zone in per package/socket data */
1222 rp
->power_zone
= power_zone
;
1223 /* done, only one package domain per socket */
1228 pr_err("no package domain found, unknown topology!\n");
1232 /* now register domains as children of the socket/package*/
1233 for (rd
= rp
->domains
; rd
< rp
->domains
+ rp
->nr_domains
; rd
++) {
1234 if (rd
->id
== RAPL_DOMAIN_PACKAGE
)
1236 /* number of power limits per domain varies */
1237 nr_pl
= find_nr_power_limit(rd
);
1238 power_zone
= powercap_register_zone(&rd
->power_zone
,
1239 control_type
, rd
->name
,
1241 &zone_ops
[rd
->id
], nr_pl
,
1244 if (IS_ERR(power_zone
)) {
1245 pr_debug("failed to register power_zone, %d:%s:%s\n",
1246 rp
->id
, rd
->name
, dev_name
);
1247 ret
= PTR_ERR(power_zone
);
1255 /* clean up previously initialized domains within the package if we
1256 * failed after the first domain setup.
1258 while (--rd
>= rp
->domains
) {
1259 pr_debug("unregister package %d domain %s\n", rp
->id
, rd
->name
);
1260 powercap_unregister_zone(control_type
, &rd
->power_zone
);
1266 static int rapl_register_psys(void)
1268 struct rapl_domain
*rd
;
1269 struct powercap_zone
*power_zone
;
1272 if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_ENERGY_STATUS
, &val
) || !val
)
1275 if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_POWER_LIMIT
, &val
) || !val
)
1278 rd
= kzalloc(sizeof(*rd
), GFP_KERNEL
);
1282 rd
->name
= rapl_domain_names
[RAPL_DOMAIN_PLATFORM
];
1283 rd
->id
= RAPL_DOMAIN_PLATFORM
;
1284 rd
->msrs
[0] = MSR_PLATFORM_POWER_LIMIT
;
1285 rd
->msrs
[1] = MSR_PLATFORM_ENERGY_STATUS
;
1286 rd
->rpl
[0].prim_id
= PL1_ENABLE
;
1287 rd
->rpl
[0].name
= pl1_name
;
1288 rd
->rpl
[1].prim_id
= PL2_ENABLE
;
1289 rd
->rpl
[1].name
= pl2_name
;
1290 rd
->rp
= find_package_by_id(0);
1292 power_zone
= powercap_register_zone(&rd
->power_zone
, control_type
,
1294 &zone_ops
[RAPL_DOMAIN_PLATFORM
],
1295 2, &constraint_ops
);
1297 if (IS_ERR(power_zone
)) {
1299 return PTR_ERR(power_zone
);
1302 platform_rapl_domain
= rd
;
1307 static int rapl_register_powercap(void)
1309 struct rapl_domain
*rd
;
1310 struct rapl_package
*rp
;
1313 control_type
= powercap_register_control_type(NULL
, "intel-rapl", NULL
);
1314 if (IS_ERR(control_type
)) {
1315 pr_debug("failed to register powercap control_type.\n");
1316 return PTR_ERR(control_type
);
1318 /* read the initial data */
1319 rapl_update_domain_data();
1320 list_for_each_entry(rp
, &rapl_packages
, plist
)
1321 if (rapl_package_register_powercap(rp
))
1322 goto err_cleanup_package
;
1324 /* Don't bail out if PSys is not supported */
1325 rapl_register_psys();
1329 err_cleanup_package
:
1330 /* clean up previously initialized packages */
1331 list_for_each_entry_continue_reverse(rp
, &rapl_packages
, plist
) {
1332 for (rd
= rp
->domains
; rd
< rp
->domains
+ rp
->nr_domains
;
1334 pr_debug("unregister zone/package %d, %s domain\n",
1336 powercap_unregister_zone(control_type
, &rd
->power_zone
);
1343 static int rapl_check_domain(int cpu
, int domain
)
1349 case RAPL_DOMAIN_PACKAGE
:
1350 msr
= MSR_PKG_ENERGY_STATUS
;
1352 case RAPL_DOMAIN_PP0
:
1353 msr
= MSR_PP0_ENERGY_STATUS
;
1355 case RAPL_DOMAIN_PP1
:
1356 msr
= MSR_PP1_ENERGY_STATUS
;
1358 case RAPL_DOMAIN_DRAM
:
1359 msr
= MSR_DRAM_ENERGY_STATUS
;
1361 case RAPL_DOMAIN_PLATFORM
:
1362 /* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */
1365 pr_err("invalid domain id %d\n", domain
);
1368 /* make sure domain counters are available and contains non-zero
1369 * values, otherwise skip it.
1371 if (rdmsrl_safe_on_cpu(cpu
, msr
, &val
) || !val
)
1377 /* Detect active and valid domains for the given CPU, caller must
1378 * ensure the CPU belongs to the targeted package and CPU hotlug is disabled.
1380 static int rapl_detect_domains(struct rapl_package
*rp
, int cpu
)
1384 struct rapl_domain
*rd
;
1387 for (i
= 0; i
< RAPL_DOMAIN_MAX
; i
++) {
1388 /* use physical package id to read counters */
1389 if (!rapl_check_domain(cpu
, i
)) {
1390 rp
->domain_map
|= 1 << i
;
1391 pr_info("Found RAPL domain %s\n", rapl_domain_names
[i
]);
1394 rp
->nr_domains
= bitmap_weight(&rp
->domain_map
, RAPL_DOMAIN_MAX
);
1395 if (!rp
->nr_domains
) {
1396 pr_err("no valid rapl domains found in package %d\n", rp
->id
);
1400 pr_debug("found %d domains on package %d\n", rp
->nr_domains
, rp
->id
);
1402 rp
->domains
= kcalloc(rp
->nr_domains
+ 1, sizeof(struct rapl_domain
),
1408 rapl_init_domains(rp
);
1410 for (rd
= rp
->domains
; rd
< rp
->domains
+ rp
->nr_domains
; rd
++) {
1411 /* check if the domain is locked by BIOS */
1412 ret
= rapl_read_data_raw(rd
, FW_LOCK
, false, &locked
);
1416 pr_info("RAPL package %d domain %s locked by BIOS\n",
1418 rd
->state
|= DOMAIN_STATE_BIOS_LOCKED
;
1427 static bool is_package_new(int package
)
1429 struct rapl_package
*rp
;
1431 /* caller prevents cpu hotplug, there will be no new packages added
1432 * or deleted while traversing the package list, no need for locking.
1434 list_for_each_entry(rp
, &rapl_packages
, plist
)
1435 if (package
== rp
->id
)
1441 /* RAPL interface can be made of a two-level hierarchy: package level and domain
1442 * level. We first detect the number of packages then domains of each package.
1443 * We have to consider the possiblity of CPU online/offline due to hotplug and
1446 static int rapl_detect_topology(void)
1450 struct rapl_package
*new_package
, *rp
;
1452 for_each_online_cpu(i
) {
1453 phy_package_id
= topology_physical_package_id(i
);
1454 if (is_package_new(phy_package_id
)) {
1455 new_package
= kzalloc(sizeof(*rp
), GFP_KERNEL
);
1457 rapl_cleanup_data();
1460 /* add the new package to the list */
1461 new_package
->id
= phy_package_id
;
1462 new_package
->nr_cpus
= 1;
1463 /* use the first active cpu of the package to access */
1464 new_package
->lead_cpu
= i
;
1465 /* check if the package contains valid domains */
1466 if (rapl_detect_domains(new_package
, i
) ||
1467 rapl_defaults
->check_unit(new_package
, i
)) {
1468 kfree(new_package
->domains
);
1470 /* free up the packages already initialized */
1471 rapl_cleanup_data();
1474 INIT_LIST_HEAD(&new_package
->plist
);
1475 list_add(&new_package
->plist
, &rapl_packages
);
1477 rp
= find_package_by_id(phy_package_id
);
1486 /* called from CPU hotplug notifier, hotplug lock held */
1487 static void rapl_remove_package(struct rapl_package
*rp
)
1489 struct rapl_domain
*rd
, *rd_package
= NULL
;
1491 for (rd
= rp
->domains
; rd
< rp
->domains
+ rp
->nr_domains
; rd
++) {
1492 if (rd
->id
== RAPL_DOMAIN_PACKAGE
) {
1496 pr_debug("remove package %d, %s domain\n", rp
->id
, rd
->name
);
1497 powercap_unregister_zone(control_type
, &rd
->power_zone
);
1499 /* do parent zone last */
1500 powercap_unregister_zone(control_type
, &rd_package
->power_zone
);
1501 list_del(&rp
->plist
);
1505 /* called from CPU hotplug notifier, hotplug lock held */
1506 static int rapl_add_package(int cpu
)
1510 struct rapl_package
*rp
;
1512 phy_package_id
= topology_physical_package_id(cpu
);
1513 rp
= kzalloc(sizeof(struct rapl_package
), GFP_KERNEL
);
1517 /* add the new package to the list */
1518 rp
->id
= phy_package_id
;
1522 /* check if the package contains valid domains */
1523 if (rapl_detect_domains(rp
, cpu
) ||
1524 rapl_defaults
->check_unit(rp
, cpu
)) {
1526 goto err_free_package
;
1528 if (!rapl_package_register_powercap(rp
)) {
1529 INIT_LIST_HEAD(&rp
->plist
);
1530 list_add(&rp
->plist
, &rapl_packages
);
1541 /* Handles CPU hotplug on multi-socket systems.
1542 * If a CPU goes online as the first CPU of the physical package
1543 * we add the RAPL package to the system. Similarly, when the last
1544 * CPU of the package is removed, we remove the RAPL package and its
1545 * associated domains. Cooling devices are handled accordingly at
1548 static int rapl_cpu_callback(struct notifier_block
*nfb
,
1549 unsigned long action
, void *hcpu
)
1551 unsigned long cpu
= (unsigned long)hcpu
;
1553 struct rapl_package
*rp
;
1556 phy_package_id
= topology_physical_package_id(cpu
);
1559 case CPU_ONLINE_FROZEN
:
1560 case CPU_DOWN_FAILED
:
1561 case CPU_DOWN_FAILED_FROZEN
:
1562 rp
= find_package_by_id(phy_package_id
);
1566 rapl_add_package(cpu
);
1568 case CPU_DOWN_PREPARE
:
1569 case CPU_DOWN_PREPARE_FROZEN
:
1570 rp
= find_package_by_id(phy_package_id
);
1573 if (--rp
->nr_cpus
== 0)
1574 rapl_remove_package(rp
);
1575 else if (cpu
== rp
->lead_cpu
) {
1576 /* choose another active cpu in the package */
1577 lead_cpu
= cpumask_any_but(topology_core_cpumask(cpu
), cpu
);
1578 if (lead_cpu
< nr_cpu_ids
)
1579 rp
->lead_cpu
= lead_cpu
;
1580 else /* should never go here */
1581 pr_err("no active cpu available for package %d\n",
1589 static struct notifier_block rapl_cpu_notifier
= {
1590 .notifier_call
= rapl_cpu_callback
,
1593 static int __init
rapl_init(void)
1596 const struct x86_cpu_id
*id
;
1598 id
= x86_match_cpu(rapl_ids
);
1600 pr_err("driver does not support CPU family %d model %d\n",
1601 boot_cpu_data
.x86
, boot_cpu_data
.x86_model
);
1606 rapl_defaults
= (struct rapl_defaults
*)id
->driver_data
;
1608 cpu_notifier_register_begin();
1610 /* prevent CPU hotplug during detection */
1612 ret
= rapl_detect_topology();
1616 if (rapl_register_powercap()) {
1617 rapl_cleanup_data();
1621 __register_hotcpu_notifier(&rapl_cpu_notifier
);
1624 cpu_notifier_register_done();
1629 static void __exit
rapl_exit(void)
1631 cpu_notifier_register_begin();
1633 __unregister_hotcpu_notifier(&rapl_cpu_notifier
);
1634 rapl_unregister_powercap();
1635 rapl_cleanup_data();
1637 cpu_notifier_register_done();
1640 module_init(rapl_init
);
1641 module_exit(rapl_exit
);
1643 MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit)");
1644 MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
1645 MODULE_LICENSE("GPL v2");