2 * TI OMAP1 Real Time Clock interface for Linux
4 * Copyright (C) 2003 MontaVista Software, Inc.
5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
7 * Copyright (C) 2006 David Brownell (new RTC framework)
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/ioport.h>
19 #include <linux/delay.h>
20 #include <linux/rtc.h>
21 #include <linux/bcd.h>
22 #include <linux/platform_device.h>
24 #include <linux/of_device.h>
25 #include <linux/pm_runtime.h>
28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
29 * with century-range alarm matching, driven by the 32kHz clock.
31 * The main user-visible ways it differs from PC RTCs are by omitting
32 * "don't care" alarm fields and sub-second periodic IRQs, and having
33 * an autoadjust mechanism to calibrate to the true oscillator rate.
35 * Board-specific wiring options include using split power mode with
36 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
37 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
38 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
39 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
42 #define DRIVER_NAME "omap_rtc"
45 #define OMAP_RTC_SECONDS_REG 0x00
46 #define OMAP_RTC_MINUTES_REG 0x04
47 #define OMAP_RTC_HOURS_REG 0x08
48 #define OMAP_RTC_DAYS_REG 0x0C
49 #define OMAP_RTC_MONTHS_REG 0x10
50 #define OMAP_RTC_YEARS_REG 0x14
51 #define OMAP_RTC_WEEKS_REG 0x18
53 #define OMAP_RTC_ALARM_SECONDS_REG 0x20
54 #define OMAP_RTC_ALARM_MINUTES_REG 0x24
55 #define OMAP_RTC_ALARM_HOURS_REG 0x28
56 #define OMAP_RTC_ALARM_DAYS_REG 0x2c
57 #define OMAP_RTC_ALARM_MONTHS_REG 0x30
58 #define OMAP_RTC_ALARM_YEARS_REG 0x34
60 #define OMAP_RTC_CTRL_REG 0x40
61 #define OMAP_RTC_STATUS_REG 0x44
62 #define OMAP_RTC_INTERRUPTS_REG 0x48
64 #define OMAP_RTC_COMP_LSB_REG 0x4c
65 #define OMAP_RTC_COMP_MSB_REG 0x50
66 #define OMAP_RTC_OSC_REG 0x54
68 #define OMAP_RTC_KICK0_REG 0x6c
69 #define OMAP_RTC_KICK1_REG 0x70
71 #define OMAP_RTC_IRQWAKEEN 0x7c
73 /* OMAP_RTC_CTRL_REG bit fields: */
74 #define OMAP_RTC_CTRL_SPLIT BIT(7)
75 #define OMAP_RTC_CTRL_DISABLE BIT(6)
76 #define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5)
77 #define OMAP_RTC_CTRL_TEST BIT(4)
78 #define OMAP_RTC_CTRL_MODE_12_24 BIT(3)
79 #define OMAP_RTC_CTRL_AUTO_COMP BIT(2)
80 #define OMAP_RTC_CTRL_ROUND_30S BIT(1)
81 #define OMAP_RTC_CTRL_STOP BIT(0)
83 /* OMAP_RTC_STATUS_REG bit fields: */
84 #define OMAP_RTC_STATUS_POWER_UP BIT(7)
85 #define OMAP_RTC_STATUS_ALARM BIT(6)
86 #define OMAP_RTC_STATUS_1D_EVENT BIT(5)
87 #define OMAP_RTC_STATUS_1H_EVENT BIT(4)
88 #define OMAP_RTC_STATUS_1M_EVENT BIT(3)
89 #define OMAP_RTC_STATUS_1S_EVENT BIT(2)
90 #define OMAP_RTC_STATUS_RUN BIT(1)
91 #define OMAP_RTC_STATUS_BUSY BIT(0)
93 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
94 #define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
95 #define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
97 /* OMAP_RTC_OSC_REG bit fields: */
98 #define OMAP_RTC_OSC_32KCLK_EN BIT(6)
100 /* OMAP_RTC_IRQWAKEEN bit fields: */
101 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
103 /* OMAP_RTC_KICKER values */
104 #define KICK0_VALUE 0x83e70b13
105 #define KICK1_VALUE 0x95a4f1e0
107 #define OMAP_RTC_HAS_KICKER BIT(0)
110 * Few RTC IP revisions has special WAKE-EN Register to enable Wakeup
111 * generation for event Alarm.
113 #define OMAP_RTC_HAS_IRQWAKEEN BIT(1)
116 * Some RTC IP revisions (like those in AM335x and DRA7x) need
117 * the 32KHz clock to be explicitly enabled.
119 #define OMAP_RTC_HAS_32KCLK_EN BIT(2)
121 static void __iomem
*rtc_base
;
123 #define rtc_read(addr) readb(rtc_base + (addr))
124 #define rtc_write(val, addr) writeb(val, rtc_base + (addr))
126 #define rtc_writel(val, addr) writel(val, rtc_base + (addr))
129 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
130 * so the only other requirement is that register accesses which
131 * require BUSY to be clear are made with IRQs locally disabled
133 static void rtc_wait_not_busy(void)
138 /* BUSY may stay active for 1/32768 second (~30 usec) */
139 for (count
= 0; count
< 50; count
++) {
140 status
= rtc_read(OMAP_RTC_STATUS_REG
);
141 if ((status
& (u8
)OMAP_RTC_STATUS_BUSY
) == 0)
145 /* now we have ~15 usec to read/write various registers */
148 static irqreturn_t
rtc_irq(int irq
, void *rtc
)
150 unsigned long events
= 0;
153 irq_data
= rtc_read(OMAP_RTC_STATUS_REG
);
156 if (irq_data
& OMAP_RTC_STATUS_ALARM
) {
157 rtc_write(OMAP_RTC_STATUS_ALARM
, OMAP_RTC_STATUS_REG
);
158 events
|= RTC_IRQF
| RTC_AF
;
161 /* 1/sec periodic/update irq? */
162 if (irq_data
& OMAP_RTC_STATUS_1S_EVENT
)
163 events
|= RTC_IRQF
| RTC_UF
;
165 rtc_update_irq(rtc
, 1, events
);
170 static int omap_rtc_alarm_irq_enable(struct device
*dev
, unsigned int enabled
)
172 u8 reg
, irqwake_reg
= 0;
173 struct platform_device
*pdev
= to_platform_device(dev
);
174 const struct platform_device_id
*id_entry
=
175 platform_get_device_id(pdev
);
179 reg
= rtc_read(OMAP_RTC_INTERRUPTS_REG
);
180 if (id_entry
->driver_data
& OMAP_RTC_HAS_IRQWAKEEN
)
181 irqwake_reg
= rtc_read(OMAP_RTC_IRQWAKEEN
);
184 reg
|= OMAP_RTC_INTERRUPTS_IT_ALARM
;
185 irqwake_reg
|= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN
;
187 reg
&= ~OMAP_RTC_INTERRUPTS_IT_ALARM
;
188 irqwake_reg
&= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN
;
191 rtc_write(reg
, OMAP_RTC_INTERRUPTS_REG
);
192 if (id_entry
->driver_data
& OMAP_RTC_HAS_IRQWAKEEN
)
193 rtc_write(irqwake_reg
, OMAP_RTC_IRQWAKEEN
);
199 /* this hardware doesn't support "don't care" alarm fields */
200 static int tm2bcd(struct rtc_time
*tm
)
202 if (rtc_valid_tm(tm
) != 0)
205 tm
->tm_sec
= bin2bcd(tm
->tm_sec
);
206 tm
->tm_min
= bin2bcd(tm
->tm_min
);
207 tm
->tm_hour
= bin2bcd(tm
->tm_hour
);
208 tm
->tm_mday
= bin2bcd(tm
->tm_mday
);
210 tm
->tm_mon
= bin2bcd(tm
->tm_mon
+ 1);
213 if (tm
->tm_year
< 100 || tm
->tm_year
> 199)
215 tm
->tm_year
= bin2bcd(tm
->tm_year
- 100);
220 static void bcd2tm(struct rtc_time
*tm
)
222 tm
->tm_sec
= bcd2bin(tm
->tm_sec
);
223 tm
->tm_min
= bcd2bin(tm
->tm_min
);
224 tm
->tm_hour
= bcd2bin(tm
->tm_hour
);
225 tm
->tm_mday
= bcd2bin(tm
->tm_mday
);
226 tm
->tm_mon
= bcd2bin(tm
->tm_mon
) - 1;
228 tm
->tm_year
= bcd2bin(tm
->tm_year
) + 100;
232 static int omap_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
234 /* we don't report wday/yday/isdst ... */
238 tm
->tm_sec
= rtc_read(OMAP_RTC_SECONDS_REG
);
239 tm
->tm_min
= rtc_read(OMAP_RTC_MINUTES_REG
);
240 tm
->tm_hour
= rtc_read(OMAP_RTC_HOURS_REG
);
241 tm
->tm_mday
= rtc_read(OMAP_RTC_DAYS_REG
);
242 tm
->tm_mon
= rtc_read(OMAP_RTC_MONTHS_REG
);
243 tm
->tm_year
= rtc_read(OMAP_RTC_YEARS_REG
);
251 static int omap_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
258 rtc_write(tm
->tm_year
, OMAP_RTC_YEARS_REG
);
259 rtc_write(tm
->tm_mon
, OMAP_RTC_MONTHS_REG
);
260 rtc_write(tm
->tm_mday
, OMAP_RTC_DAYS_REG
);
261 rtc_write(tm
->tm_hour
, OMAP_RTC_HOURS_REG
);
262 rtc_write(tm
->tm_min
, OMAP_RTC_MINUTES_REG
);
263 rtc_write(tm
->tm_sec
, OMAP_RTC_SECONDS_REG
);
270 static int omap_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
275 alm
->time
.tm_sec
= rtc_read(OMAP_RTC_ALARM_SECONDS_REG
);
276 alm
->time
.tm_min
= rtc_read(OMAP_RTC_ALARM_MINUTES_REG
);
277 alm
->time
.tm_hour
= rtc_read(OMAP_RTC_ALARM_HOURS_REG
);
278 alm
->time
.tm_mday
= rtc_read(OMAP_RTC_ALARM_DAYS_REG
);
279 alm
->time
.tm_mon
= rtc_read(OMAP_RTC_ALARM_MONTHS_REG
);
280 alm
->time
.tm_year
= rtc_read(OMAP_RTC_ALARM_YEARS_REG
);
285 alm
->enabled
= !!(rtc_read(OMAP_RTC_INTERRUPTS_REG
)
286 & OMAP_RTC_INTERRUPTS_IT_ALARM
);
291 static int omap_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
293 u8 reg
, irqwake_reg
= 0;
294 struct platform_device
*pdev
= to_platform_device(dev
);
295 const struct platform_device_id
*id_entry
=
296 platform_get_device_id(pdev
);
298 if (tm2bcd(&alm
->time
) < 0)
304 rtc_write(alm
->time
.tm_year
, OMAP_RTC_ALARM_YEARS_REG
);
305 rtc_write(alm
->time
.tm_mon
, OMAP_RTC_ALARM_MONTHS_REG
);
306 rtc_write(alm
->time
.tm_mday
, OMAP_RTC_ALARM_DAYS_REG
);
307 rtc_write(alm
->time
.tm_hour
, OMAP_RTC_ALARM_HOURS_REG
);
308 rtc_write(alm
->time
.tm_min
, OMAP_RTC_ALARM_MINUTES_REG
);
309 rtc_write(alm
->time
.tm_sec
, OMAP_RTC_ALARM_SECONDS_REG
);
311 reg
= rtc_read(OMAP_RTC_INTERRUPTS_REG
);
312 if (id_entry
->driver_data
& OMAP_RTC_HAS_IRQWAKEEN
)
313 irqwake_reg
= rtc_read(OMAP_RTC_IRQWAKEEN
);
316 reg
|= OMAP_RTC_INTERRUPTS_IT_ALARM
;
317 irqwake_reg
|= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN
;
319 reg
&= ~OMAP_RTC_INTERRUPTS_IT_ALARM
;
320 irqwake_reg
&= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN
;
322 rtc_write(reg
, OMAP_RTC_INTERRUPTS_REG
);
323 if (id_entry
->driver_data
& OMAP_RTC_HAS_IRQWAKEEN
)
324 rtc_write(irqwake_reg
, OMAP_RTC_IRQWAKEEN
);
331 static struct rtc_class_ops omap_rtc_ops
= {
332 .read_time
= omap_rtc_read_time
,
333 .set_time
= omap_rtc_set_time
,
334 .read_alarm
= omap_rtc_read_alarm
,
335 .set_alarm
= omap_rtc_set_alarm
,
336 .alarm_irq_enable
= omap_rtc_alarm_irq_enable
,
339 static int omap_rtc_alarm
;
340 static int omap_rtc_timer
;
342 #define OMAP_RTC_DATA_AM3352_IDX 1
343 #define OMAP_RTC_DATA_DA830_IDX 2
345 static struct platform_device_id omap_rtc_devtype
[] = {
349 [OMAP_RTC_DATA_AM3352_IDX
] = {
350 .name
= "am3352-rtc",
351 .driver_data
= OMAP_RTC_HAS_KICKER
| OMAP_RTC_HAS_IRQWAKEEN
|
352 OMAP_RTC_HAS_32KCLK_EN
,
354 [OMAP_RTC_DATA_DA830_IDX
] = {
356 .driver_data
= OMAP_RTC_HAS_KICKER
,
360 MODULE_DEVICE_TABLE(platform
, omap_rtc_devtype
);
362 static const struct of_device_id omap_rtc_of_match
[] = {
363 { .compatible
= "ti,da830-rtc",
364 .data
= &omap_rtc_devtype
[OMAP_RTC_DATA_DA830_IDX
],
366 { .compatible
= "ti,am3352-rtc",
367 .data
= &omap_rtc_devtype
[OMAP_RTC_DATA_AM3352_IDX
],
371 MODULE_DEVICE_TABLE(of
, omap_rtc_of_match
);
373 static int __init
omap_rtc_probe(struct platform_device
*pdev
)
375 struct resource
*res
;
376 struct rtc_device
*rtc
;
378 const struct platform_device_id
*id_entry
;
379 const struct of_device_id
*of_id
;
382 of_id
= of_match_device(omap_rtc_of_match
, &pdev
->dev
);
384 pdev
->id_entry
= of_id
->data
;
386 id_entry
= platform_get_device_id(pdev
);
388 dev_err(&pdev
->dev
, "no matching device entry\n");
392 omap_rtc_timer
= platform_get_irq(pdev
, 0);
393 if (omap_rtc_timer
<= 0)
396 omap_rtc_alarm
= platform_get_irq(pdev
, 1);
397 if (omap_rtc_alarm
<= 0)
400 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
401 rtc_base
= devm_ioremap_resource(&pdev
->dev
, res
);
402 if (IS_ERR(rtc_base
))
403 return PTR_ERR(rtc_base
);
405 /* Enable the clock/module so that we can access the registers */
406 pm_runtime_enable(&pdev
->dev
);
407 pm_runtime_get_sync(&pdev
->dev
);
409 if (id_entry
->driver_data
& OMAP_RTC_HAS_KICKER
) {
410 rtc_writel(KICK0_VALUE
, OMAP_RTC_KICK0_REG
);
411 rtc_writel(KICK1_VALUE
, OMAP_RTC_KICK1_REG
);
417 * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
419 rtc_writel(0, OMAP_RTC_INTERRUPTS_REG
);
421 /* enable RTC functional clock */
422 if (id_entry
->driver_data
& OMAP_RTC_HAS_32KCLK_EN
) {
423 reg
= rtc_read(OMAP_RTC_OSC_REG
);
424 rtc_writel(reg
| OMAP_RTC_OSC_32KCLK_EN
, OMAP_RTC_OSC_REG
);
427 /* clear old status */
428 reg
= rtc_read(OMAP_RTC_STATUS_REG
);
429 if (reg
& (u8
) OMAP_RTC_STATUS_POWER_UP
) {
430 dev_info(&pdev
->dev
, "RTC power up reset detected\n");
431 rtc_write(OMAP_RTC_STATUS_POWER_UP
, OMAP_RTC_STATUS_REG
);
433 if (reg
& (u8
) OMAP_RTC_STATUS_ALARM
)
434 rtc_write(OMAP_RTC_STATUS_ALARM
, OMAP_RTC_STATUS_REG
);
436 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
437 reg
= rtc_read(OMAP_RTC_CTRL_REG
);
438 if (reg
& (u8
) OMAP_RTC_CTRL_STOP
)
439 dev_info(&pdev
->dev
, "already running\n");
441 /* force to 24 hour mode */
442 new_ctrl
= reg
& (OMAP_RTC_CTRL_SPLIT
|OMAP_RTC_CTRL_AUTO_COMP
);
443 new_ctrl
|= OMAP_RTC_CTRL_STOP
;
445 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
447 * - Device wake-up capability setting should come through chip
448 * init logic. OMAP1 boards should initialize the "wakeup capable"
449 * flag in the platform device if the board is wired right for
450 * being woken up by RTC alarm. For OMAP-L138, this capability
451 * is built into the SoC by the "Deep Sleep" capability.
453 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
454 * rather than nPWRON_RESET, should forcibly enable split
455 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
456 * is write-only, and always reads as zero...)
459 if (new_ctrl
& (u8
) OMAP_RTC_CTRL_SPLIT
)
460 dev_info(&pdev
->dev
, "split power mode\n");
463 rtc_write(new_ctrl
, OMAP_RTC_CTRL_REG
);
465 device_init_wakeup(&pdev
->dev
, true);
467 rtc
= devm_rtc_device_register(&pdev
->dev
, pdev
->name
,
468 &omap_rtc_ops
, THIS_MODULE
);
473 platform_set_drvdata(pdev
, rtc
);
475 /* handle periodic and alarm irqs */
476 ret
= devm_request_irq(&pdev
->dev
, omap_rtc_timer
, rtc_irq
, 0,
477 dev_name(&rtc
->dev
), rtc
);
481 if (omap_rtc_timer
!= omap_rtc_alarm
) {
482 ret
= devm_request_irq(&pdev
->dev
, omap_rtc_alarm
, rtc_irq
, 0,
483 dev_name(&rtc
->dev
), rtc
);
491 device_init_wakeup(&pdev
->dev
, false);
492 if (id_entry
->driver_data
& OMAP_RTC_HAS_KICKER
)
493 rtc_writel(0, OMAP_RTC_KICK0_REG
);
494 pm_runtime_put_sync(&pdev
->dev
);
495 pm_runtime_disable(&pdev
->dev
);
500 static int __exit
omap_rtc_remove(struct platform_device
*pdev
)
502 const struct platform_device_id
*id_entry
=
503 platform_get_device_id(pdev
);
505 device_init_wakeup(&pdev
->dev
, 0);
507 /* leave rtc running, but disable irqs */
508 rtc_write(0, OMAP_RTC_INTERRUPTS_REG
);
510 if (id_entry
->driver_data
& OMAP_RTC_HAS_KICKER
)
511 rtc_writel(0, OMAP_RTC_KICK0_REG
);
513 /* Disable the clock/module */
514 pm_runtime_put_sync(&pdev
->dev
);
515 pm_runtime_disable(&pdev
->dev
);
520 #ifdef CONFIG_PM_SLEEP
523 static int omap_rtc_suspend(struct device
*dev
)
525 irqstat
= rtc_read(OMAP_RTC_INTERRUPTS_REG
);
527 /* FIXME the RTC alarm is not currently acting as a wakeup event
528 * source on some platforms, and in fact this enable() call is just
529 * saving a flag that's never used...
531 if (device_may_wakeup(dev
))
532 enable_irq_wake(omap_rtc_alarm
);
534 rtc_write(0, OMAP_RTC_INTERRUPTS_REG
);
536 /* Disable the clock/module */
537 pm_runtime_put_sync(dev
);
542 static int omap_rtc_resume(struct device
*dev
)
544 /* Enable the clock/module so that we can access the registers */
545 pm_runtime_get_sync(dev
);
547 if (device_may_wakeup(dev
))
548 disable_irq_wake(omap_rtc_alarm
);
550 rtc_write(irqstat
, OMAP_RTC_INTERRUPTS_REG
);
556 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops
, omap_rtc_suspend
, omap_rtc_resume
);
558 static void omap_rtc_shutdown(struct platform_device
*pdev
)
560 rtc_write(0, OMAP_RTC_INTERRUPTS_REG
);
563 MODULE_ALIAS("platform:omap_rtc");
564 static struct platform_driver omap_rtc_driver
= {
565 .remove
= __exit_p(omap_rtc_remove
),
566 .shutdown
= omap_rtc_shutdown
,
569 .owner
= THIS_MODULE
,
570 .pm
= &omap_rtc_pm_ops
,
571 .of_match_table
= omap_rtc_of_match
,
573 .id_table
= omap_rtc_devtype
,
576 module_platform_driver_probe(omap_rtc_driver
, omap_rtc_probe
);
578 MODULE_AUTHOR("George G. Davis (and others)");
579 MODULE_LICENSE("GPL");