2 * TI OMAP4 ISS V4L2 Driver
4 * Copyright (C) 2012, Texas Instruments
6 * Author: Sergio Aguirre <sergio.a.aguirre@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/sched.h>
25 #include <linux/vmalloc.h>
27 #include <media/v4l2-common.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-ctrls.h>
34 #define ISS_PRINT_REGISTER(iss, name)\
35 dev_dbg(iss->dev, "###ISS " #name "=0x%08x\n", \
36 iss_reg_read(iss, OMAP4_ISS_MEM_TOP, ISS_##name))
38 static void iss_print_status(struct iss_device
*iss
)
40 dev_dbg(iss
->dev
, "-------------ISS HL Register dump-------------\n");
42 ISS_PRINT_REGISTER(iss
, HL_REVISION
);
43 ISS_PRINT_REGISTER(iss
, HL_SYSCONFIG
);
44 ISS_PRINT_REGISTER(iss
, HL_IRQSTATUS(5));
45 ISS_PRINT_REGISTER(iss
, HL_IRQENABLE_SET(5));
46 ISS_PRINT_REGISTER(iss
, HL_IRQENABLE_CLR(5));
47 ISS_PRINT_REGISTER(iss
, CTRL
);
48 ISS_PRINT_REGISTER(iss
, CLKCTRL
);
49 ISS_PRINT_REGISTER(iss
, CLKSTAT
);
51 dev_dbg(iss
->dev
, "-----------------------------------------------\n");
55 * omap4iss_flush - Post pending L3 bus writes by doing a register readback
56 * @iss: OMAP4 ISS device
58 * In order to force posting of pending writes, we need to write and
59 * readback the same register, in this case the revision register.
61 * See this link for reference:
62 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
64 void omap4iss_flush(struct iss_device
*iss
)
66 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_REVISION
, 0);
67 iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_REVISION
);
71 * iss_isp_enable_interrupts - Enable ISS ISP interrupts.
72 * @iss: OMAP4 ISS device
74 static void omap4iss_isp_enable_interrupts(struct iss_device
*iss
)
76 static const u32 isp_irq
= ISP5_IRQ_OCP_ERR
|
77 ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR
|
78 ISP5_IRQ_RSZ_FIFO_OVF
|
79 ISP5_IRQ_RSZ_INT_DMA
|
82 /* Enable ISP interrupts */
83 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQSTATUS(0), isp_irq
);
84 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQENABLE_SET(0),
89 * iss_isp_disable_interrupts - Disable ISS interrupts.
90 * @iss: OMAP4 ISS device
92 static void omap4iss_isp_disable_interrupts(struct iss_device
*iss
)
94 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQENABLE_CLR(0), ~0);
98 * iss_enable_interrupts - Enable ISS interrupts.
99 * @iss: OMAP4 ISS device
101 static void iss_enable_interrupts(struct iss_device
*iss
)
103 static const u32 hl_irq
= ISS_HL_IRQ_CSIA
| ISS_HL_IRQ_CSIB
106 /* Enable HL interrupts */
107 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQSTATUS(5), hl_irq
);
108 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQENABLE_SET(5), hl_irq
);
110 if (iss
->regs
[OMAP4_ISS_MEM_ISP_SYS1
])
111 omap4iss_isp_enable_interrupts(iss
);
115 * iss_disable_interrupts - Disable ISS interrupts.
116 * @iss: OMAP4 ISS device
118 static void iss_disable_interrupts(struct iss_device
*iss
)
120 if (iss
->regs
[OMAP4_ISS_MEM_ISP_SYS1
])
121 omap4iss_isp_disable_interrupts(iss
);
123 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQENABLE_CLR(5), ~0);
126 int omap4iss_get_external_info(struct iss_pipeline
*pipe
,
127 struct media_link
*link
)
129 struct iss_device
*iss
=
130 container_of(pipe
, struct iss_video
, pipe
)->iss
;
131 struct v4l2_subdev_format fmt
;
132 struct v4l2_ctrl
*ctrl
;
138 if (pipe
->external_rate
)
141 memset(&fmt
, 0, sizeof(fmt
));
143 fmt
.pad
= link
->source
->index
;
144 fmt
.which
= V4L2_SUBDEV_FORMAT_ACTIVE
;
145 ret
= v4l2_subdev_call(media_entity_to_v4l2_subdev(link
->sink
->entity
),
146 pad
, get_fmt
, NULL
, &fmt
);
150 pipe
->external_bpp
= omap4iss_video_format_info(fmt
.format
.code
)->bpp
;
152 ctrl
= v4l2_ctrl_find(pipe
->external
->ctrl_handler
,
153 V4L2_CID_PIXEL_RATE
);
155 dev_warn(iss
->dev
, "no pixel rate control in subdev %s\n",
156 pipe
->external
->name
);
160 pipe
->external_rate
= v4l2_ctrl_g_ctrl_int64(ctrl
);
166 * Configure the bridge. Valid inputs are
168 * IPIPEIF_INPUT_CSI2A: CSI2a receiver
169 * IPIPEIF_INPUT_CSI2B: CSI2b receiver
171 * The bridge and lane shifter are configured according to the selected input
172 * and the ISP platform data.
174 void omap4iss_configure_bridge(struct iss_device
*iss
,
175 enum ipipeif_input_entity input
)
180 issctrl_val
= iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_CTRL
);
181 issctrl_val
&= ~ISS_CTRL_INPUT_SEL_MASK
;
182 issctrl_val
&= ~ISS_CTRL_CLK_DIV_MASK
;
184 isp5ctrl_val
= iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
);
187 case IPIPEIF_INPUT_CSI2A
:
188 issctrl_val
|= ISS_CTRL_INPUT_SEL_CSI2A
;
191 case IPIPEIF_INPUT_CSI2B
:
192 issctrl_val
|= ISS_CTRL_INPUT_SEL_CSI2B
;
199 issctrl_val
|= ISS_CTRL_SYNC_DETECT_VS_RAISING
;
201 isp5ctrl_val
|= ISP5_CTRL_VD_PULSE_EXT
| ISP5_CTRL_PSYNC_CLK_SEL
|
202 ISP5_CTRL_SYNC_ENABLE
;
204 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_CTRL
, issctrl_val
);
205 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
, isp5ctrl_val
);
209 static void iss_isr_dbg(struct iss_device
*iss
, u32 irqstatus
)
211 static const char * const name
[] = {
247 dev_dbg(iss
->dev
, "ISS IRQ: ");
249 for (i
= 0; i
< ARRAY_SIZE(name
); i
++) {
250 if ((1 << i
) & irqstatus
)
251 pr_cont("%s ", name
[i
]);
256 static void iss_isp_isr_dbg(struct iss_device
*iss
, u32 irqstatus
)
258 static const char * const name
[] = {
278 "RSZ_FIFO_IN_BLK_ERR",
294 dev_dbg(iss
->dev
, "ISP IRQ: ");
296 for (i
= 0; i
< ARRAY_SIZE(name
); i
++) {
297 if ((1 << i
) & irqstatus
)
298 pr_cont("%s ", name
[i
]);
305 * iss_isr - Interrupt Service Routine for ISS module.
306 * @irq: Not used currently.
307 * @_iss: Pointer to the OMAP4 ISS device
309 * Handles the corresponding callback if plugged in.
311 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
312 * IRQ wasn't handled.
314 static irqreturn_t
iss_isr(int irq
, void *_iss
)
316 static const u32 ipipeif_events
= ISP5_IRQ_IPIPEIF_IRQ
|
317 ISP5_IRQ_ISIF_INT(0);
318 static const u32 resizer_events
= ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR
|
319 ISP5_IRQ_RSZ_FIFO_OVF
|
320 ISP5_IRQ_RSZ_INT_DMA
;
321 struct iss_device
*iss
= _iss
;
324 irqstatus
= iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQSTATUS(5));
325 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQSTATUS(5), irqstatus
);
327 if (irqstatus
& ISS_HL_IRQ_CSIA
)
328 omap4iss_csi2_isr(&iss
->csi2a
);
330 if (irqstatus
& ISS_HL_IRQ_CSIB
)
331 omap4iss_csi2_isr(&iss
->csi2b
);
333 if (irqstatus
& ISS_HL_IRQ_ISP(0)) {
334 u32 isp_irqstatus
= iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
,
336 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQSTATUS(0),
339 if (isp_irqstatus
& ISP5_IRQ_OCP_ERR
)
340 dev_dbg(iss
->dev
, "ISP5 OCP Error!\n");
342 if (isp_irqstatus
& ipipeif_events
) {
343 omap4iss_ipipeif_isr(&iss
->ipipeif
,
344 isp_irqstatus
& ipipeif_events
);
347 if (isp_irqstatus
& resizer_events
)
348 omap4iss_resizer_isr(&iss
->resizer
,
349 isp_irqstatus
& resizer_events
);
352 iss_isp_isr_dbg(iss
, isp_irqstatus
);
359 iss_isr_dbg(iss
, irqstatus
);
365 /* -----------------------------------------------------------------------------
366 * Pipeline stream management
370 * iss_pipeline_disable - Disable streaming on a pipeline
371 * @pipe: ISS pipeline
372 * @until: entity at which to stop pipeline walk
374 * Walk the entities chain starting at the pipeline output video node and stop
375 * all modules in the chain. Wait synchronously for the modules to be stopped if
378 * If the until argument isn't NULL, stop the pipeline walk when reaching the
379 * until entity. This is used to disable a partially started pipeline due to a
380 * subdev start error.
382 static int iss_pipeline_disable(struct iss_pipeline
*pipe
,
383 struct media_entity
*until
)
385 struct iss_device
*iss
= pipe
->output
->iss
;
386 struct media_entity
*entity
;
387 struct media_pad
*pad
;
388 struct v4l2_subdev
*subdev
;
392 entity
= &pipe
->output
->video
.entity
;
394 pad
= &entity
->pads
[0];
395 if (!(pad
->flags
& MEDIA_PAD_FL_SINK
))
398 pad
= media_entity_remote_pad(pad
);
399 if (!pad
|| !is_media_entity_v4l2_subdev(pad
->entity
))
402 entity
= pad
->entity
;
406 subdev
= media_entity_to_v4l2_subdev(entity
);
407 ret
= v4l2_subdev_call(subdev
, video
, s_stream
, 0);
409 dev_warn(iss
->dev
, "%s: module stop timeout.\n",
411 /* If the entity failed to stopped, assume it has
412 * crashed. Mark it as such, the ISS will be reset when
413 * applications will release it.
415 media_entity_enum_set(&iss
->crashed
, &subdev
->entity
);
416 failure
= -ETIMEDOUT
;
424 * iss_pipeline_enable - Enable streaming on a pipeline
425 * @pipe: ISS pipeline
426 * @mode: Stream mode (single shot or continuous)
428 * Walk the entities chain starting at the pipeline output video node and start
429 * all modules in the chain in the given mode.
431 * Return 0 if successful, or the return value of the failed video::s_stream
432 * operation otherwise.
434 static int iss_pipeline_enable(struct iss_pipeline
*pipe
,
435 enum iss_pipeline_stream_state mode
)
437 struct iss_device
*iss
= pipe
->output
->iss
;
438 struct media_entity
*entity
;
439 struct media_pad
*pad
;
440 struct v4l2_subdev
*subdev
;
444 /* If one of the entities in the pipeline has crashed it will not work
445 * properly. Refuse to start streaming in that case. This check must be
446 * performed before the loop below to avoid starting entities if the
447 * pipeline won't start anyway (those entities would then likely fail to
448 * stop, making the problem worse).
450 if (media_entity_enum_intersects(&pipe
->ent_enum
, &iss
->crashed
))
453 spin_lock_irqsave(&pipe
->lock
, flags
);
454 pipe
->state
&= ~(ISS_PIPELINE_IDLE_INPUT
| ISS_PIPELINE_IDLE_OUTPUT
);
455 spin_unlock_irqrestore(&pipe
->lock
, flags
);
457 pipe
->do_propagation
= false;
459 entity
= &pipe
->output
->video
.entity
;
461 pad
= &entity
->pads
[0];
462 if (!(pad
->flags
& MEDIA_PAD_FL_SINK
))
465 pad
= media_entity_remote_pad(pad
);
466 if (!pad
|| !is_media_entity_v4l2_subdev(pad
->entity
))
469 entity
= pad
->entity
;
470 subdev
= media_entity_to_v4l2_subdev(entity
);
472 ret
= v4l2_subdev_call(subdev
, video
, s_stream
, mode
);
473 if (ret
< 0 && ret
!= -ENOIOCTLCMD
) {
474 iss_pipeline_disable(pipe
, entity
);
478 if (subdev
== &iss
->csi2a
.subdev
||
479 subdev
== &iss
->csi2b
.subdev
)
480 pipe
->do_propagation
= true;
483 iss_print_status(pipe
->output
->iss
);
488 * omap4iss_pipeline_set_stream - Enable/disable streaming on a pipeline
489 * @pipe: ISS pipeline
490 * @state: Stream state (stopped, single shot or continuous)
492 * Set the pipeline to the given stream state. Pipelines can be started in
493 * single-shot or continuous mode.
495 * Return 0 if successful, or the return value of the failed video::s_stream
496 * operation otherwise. The pipeline state is not updated when the operation
497 * fails, except when stopping the pipeline.
499 int omap4iss_pipeline_set_stream(struct iss_pipeline
*pipe
,
500 enum iss_pipeline_stream_state state
)
504 if (state
== ISS_PIPELINE_STREAM_STOPPED
)
505 ret
= iss_pipeline_disable(pipe
, NULL
);
507 ret
= iss_pipeline_enable(pipe
, state
);
509 if (ret
== 0 || state
== ISS_PIPELINE_STREAM_STOPPED
)
510 pipe
->stream_state
= state
;
516 * omap4iss_pipeline_cancel_stream - Cancel stream on a pipeline
517 * @pipe: ISS pipeline
519 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
520 * erroneous and makes sure no new buffer can be queued. This function is called
521 * when a fatal error that prevents any further operation on the pipeline
524 void omap4iss_pipeline_cancel_stream(struct iss_pipeline
*pipe
)
527 omap4iss_video_cancel_stream(pipe
->input
);
529 omap4iss_video_cancel_stream(pipe
->output
);
533 * iss_pipeline_is_last - Verify if entity has an enabled link to the output
535 * @me: ISS module's media entity
537 * Returns 1 if the entity has an enabled link to the output video node or 0
538 * otherwise. It's true only while pipeline can have no more than one output
541 static int iss_pipeline_is_last(struct media_entity
*me
)
543 struct iss_pipeline
*pipe
;
544 struct media_pad
*pad
;
548 pipe
= to_iss_pipeline(me
);
549 if (pipe
->stream_state
== ISS_PIPELINE_STREAM_STOPPED
)
551 pad
= media_entity_remote_pad(&pipe
->output
->pad
);
552 return pad
->entity
== me
;
555 static int iss_reset(struct iss_device
*iss
)
557 unsigned int timeout
;
559 iss_reg_set(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_SYSCONFIG
,
560 ISS_HL_SYSCONFIG_SOFTRESET
);
562 timeout
= iss_poll_condition_timeout(
563 !(iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_SYSCONFIG
) &
564 ISS_HL_SYSCONFIG_SOFTRESET
), 1000, 10, 100);
566 dev_err(iss
->dev
, "ISS reset timeout\n");
570 media_entity_enum_zero(&iss
->crashed
);
575 static int iss_isp_reset(struct iss_device
*iss
)
577 unsigned int timeout
;
579 /* Fist, ensure that the ISP is IDLE (no transactions happening) */
580 iss_reg_update(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_SYSCONFIG
,
581 ISP5_SYSCONFIG_STANDBYMODE_MASK
,
582 ISP5_SYSCONFIG_STANDBYMODE_SMART
);
584 iss_reg_set(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
, ISP5_CTRL_MSTANDBY
);
586 timeout
= iss_poll_condition_timeout(
587 iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
) &
588 ISP5_CTRL_MSTANDBY_WAIT
, 1000000, 1000, 1500);
590 dev_err(iss
->dev
, "ISP5 standby timeout\n");
594 /* Now finally, do the reset */
595 iss_reg_set(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_SYSCONFIG
,
596 ISP5_SYSCONFIG_SOFTRESET
);
598 timeout
= iss_poll_condition_timeout(
599 !(iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_SYSCONFIG
) &
600 ISP5_SYSCONFIG_SOFTRESET
), 1000000, 1000, 1500);
602 dev_err(iss
->dev
, "ISP5 reset timeout\n");
610 * iss_module_sync_idle - Helper to sync module with its idle state
611 * @me: ISS submodule's media entity
612 * @wait: ISS submodule's wait queue for streamoff/interrupt synchronization
613 * @stopping: flag which tells module wants to stop
615 * This function checks if ISS submodule needs to wait for next interrupt. If
616 * yes, makes the caller to sleep while waiting for such event.
618 int omap4iss_module_sync_idle(struct media_entity
*me
, wait_queue_head_t
*wait
,
621 struct iss_pipeline
*pipe
= to_iss_pipeline(me
);
622 struct iss_video
*video
= pipe
->output
;
625 if (pipe
->stream_state
== ISS_PIPELINE_STREAM_STOPPED
||
626 (pipe
->stream_state
== ISS_PIPELINE_STREAM_SINGLESHOT
&&
627 !iss_pipeline_ready(pipe
)))
631 * atomic_set() doesn't include memory barrier on ARM platform for SMP
632 * scenario. We'll call it here to avoid race conditions.
634 atomic_set(stopping
, 1);
638 * If module is the last one, it's writing to memory. In this case,
639 * it's necessary to check if the module is already paused due to
640 * DMA queue underrun or if it has to wait for next interrupt to be
642 * If it isn't the last one, the function won't sleep but *stopping
643 * will still be set to warn next submodule caller's interrupt the
644 * module wants to be idle.
646 if (!iss_pipeline_is_last(me
))
649 spin_lock_irqsave(&video
->qlock
, flags
);
650 if (video
->dmaqueue_flags
& ISS_VIDEO_DMAQUEUE_UNDERRUN
) {
651 spin_unlock_irqrestore(&video
->qlock
, flags
);
652 atomic_set(stopping
, 0);
656 spin_unlock_irqrestore(&video
->qlock
, flags
);
657 if (!wait_event_timeout(*wait
, !atomic_read(stopping
),
658 msecs_to_jiffies(1000))) {
659 atomic_set(stopping
, 0);
668 * omap4iss_module_sync_is_stopped - Helper to verify if module was stopping
669 * @wait: ISS submodule's wait queue for streamoff/interrupt synchronization
670 * @stopping: flag which tells module wants to stop
672 * This function checks if ISS submodule was stopping. In case of yes, it
673 * notices the caller by setting stopping to 0 and waking up the wait queue.
674 * Returns 1 if it was stopping or 0 otherwise.
676 int omap4iss_module_sync_is_stopping(wait_queue_head_t
*wait
,
679 if (atomic_cmpxchg(stopping
, 1, 0)) {
687 /* --------------------------------------------------------------------------
691 #define ISS_CLKCTRL_MASK (ISS_CLKCTRL_CSI2_A |\
692 ISS_CLKCTRL_CSI2_B |\
695 static int __iss_subclk_update(struct iss_device
*iss
)
698 int ret
= 0, timeout
= 1000;
700 if (iss
->subclk_resources
& OMAP4_ISS_SUBCLK_CSI2_A
)
701 clk
|= ISS_CLKCTRL_CSI2_A
;
703 if (iss
->subclk_resources
& OMAP4_ISS_SUBCLK_CSI2_B
)
704 clk
|= ISS_CLKCTRL_CSI2_B
;
706 if (iss
->subclk_resources
& OMAP4_ISS_SUBCLK_ISP
)
707 clk
|= ISS_CLKCTRL_ISP
;
709 iss_reg_update(iss
, OMAP4_ISS_MEM_TOP
, ISS_CLKCTRL
,
710 ISS_CLKCTRL_MASK
, clk
);
712 /* Wait for HW assertion */
713 while (--timeout
> 0) {
715 if ((iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_CLKSTAT
) &
716 ISS_CLKCTRL_MASK
) == clk
)
726 int omap4iss_subclk_enable(struct iss_device
*iss
,
727 enum iss_subclk_resource res
)
729 iss
->subclk_resources
|= res
;
731 return __iss_subclk_update(iss
);
734 int omap4iss_subclk_disable(struct iss_device
*iss
,
735 enum iss_subclk_resource res
)
737 iss
->subclk_resources
&= ~res
;
739 return __iss_subclk_update(iss
);
742 #define ISS_ISP5_CLKCTRL_MASK (ISP5_CTRL_BL_CLK_ENABLE |\
743 ISP5_CTRL_ISIF_CLK_ENABLE |\
744 ISP5_CTRL_H3A_CLK_ENABLE |\
745 ISP5_CTRL_RSZ_CLK_ENABLE |\
746 ISP5_CTRL_IPIPE_CLK_ENABLE |\
747 ISP5_CTRL_IPIPEIF_CLK_ENABLE)
749 static void __iss_isp_subclk_update(struct iss_device
*iss
)
753 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_ISIF
)
754 clk
|= ISP5_CTRL_ISIF_CLK_ENABLE
;
756 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_H3A
)
757 clk
|= ISP5_CTRL_H3A_CLK_ENABLE
;
759 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_RSZ
)
760 clk
|= ISP5_CTRL_RSZ_CLK_ENABLE
;
762 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_IPIPE
)
763 clk
|= ISP5_CTRL_IPIPE_CLK_ENABLE
;
765 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_IPIPEIF
)
766 clk
|= ISP5_CTRL_IPIPEIF_CLK_ENABLE
;
769 clk
|= ISP5_CTRL_BL_CLK_ENABLE
;
771 iss_reg_update(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
,
772 ISS_ISP5_CLKCTRL_MASK
, clk
);
775 void omap4iss_isp_subclk_enable(struct iss_device
*iss
,
776 enum iss_isp_subclk_resource res
)
778 iss
->isp_subclk_resources
|= res
;
780 __iss_isp_subclk_update(iss
);
783 void omap4iss_isp_subclk_disable(struct iss_device
*iss
,
784 enum iss_isp_subclk_resource res
)
786 iss
->isp_subclk_resources
&= ~res
;
788 __iss_isp_subclk_update(iss
);
792 * iss_enable_clocks - Enable ISS clocks
793 * @iss: OMAP4 ISS device
795 * Return 0 if successful, or clk_enable return value if any of tthem fails.
797 static int iss_enable_clocks(struct iss_device
*iss
)
801 ret
= clk_enable(iss
->iss_fck
);
803 dev_err(iss
->dev
, "clk_enable iss_fck failed\n");
807 ret
= clk_enable(iss
->iss_ctrlclk
);
809 dev_err(iss
->dev
, "clk_enable iss_ctrlclk failed\n");
810 clk_disable(iss
->iss_fck
);
818 * iss_disable_clocks - Disable ISS clocks
819 * @iss: OMAP4 ISS device
821 static void iss_disable_clocks(struct iss_device
*iss
)
823 clk_disable(iss
->iss_ctrlclk
);
824 clk_disable(iss
->iss_fck
);
827 static int iss_get_clocks(struct iss_device
*iss
)
829 iss
->iss_fck
= devm_clk_get(iss
->dev
, "iss_fck");
830 if (IS_ERR(iss
->iss_fck
)) {
831 dev_err(iss
->dev
, "Unable to get iss_fck clock info\n");
832 return PTR_ERR(iss
->iss_fck
);
835 iss
->iss_ctrlclk
= devm_clk_get(iss
->dev
, "iss_ctrlclk");
836 if (IS_ERR(iss
->iss_ctrlclk
)) {
837 dev_err(iss
->dev
, "Unable to get iss_ctrlclk clock info\n");
838 return PTR_ERR(iss
->iss_ctrlclk
);
845 * omap4iss_get - Acquire the ISS resource.
847 * Initializes the clocks for the first acquire.
849 * Increment the reference count on the ISS. If the first reference is taken,
850 * enable clocks and power-up all submodules.
852 * Return a pointer to the ISS device structure, or NULL if an error occurred.
854 struct iss_device
*omap4iss_get(struct iss_device
*iss
)
856 struct iss_device
*__iss
= iss
;
861 mutex_lock(&iss
->iss_mutex
);
862 if (iss
->ref_count
> 0)
865 if (iss_enable_clocks(iss
) < 0) {
870 iss_enable_interrupts(iss
);
875 mutex_unlock(&iss
->iss_mutex
);
881 * omap4iss_put - Release the ISS
883 * Decrement the reference count on the ISS. If the last reference is released,
884 * power-down all submodules, disable clocks and free temporary buffers.
886 void omap4iss_put(struct iss_device
*iss
)
891 mutex_lock(&iss
->iss_mutex
);
892 BUG_ON(iss
->ref_count
== 0);
893 if (--iss
->ref_count
== 0) {
894 iss_disable_interrupts(iss
);
895 /* Reset the ISS if an entity has failed to stop. This is the
896 * only way to recover from such conditions, although it would
897 * be worth investigating whether resetting the ISP only can't
898 * fix the problem in some cases.
900 if (!media_entity_enum_empty(&iss
->crashed
))
902 iss_disable_clocks(iss
);
904 mutex_unlock(&iss
->iss_mutex
);
907 static int iss_map_mem_resource(struct platform_device
*pdev
,
908 struct iss_device
*iss
,
909 enum iss_mem_resources res
)
911 struct resource
*mem
;
913 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, res
);
915 iss
->regs
[res
] = devm_ioremap_resource(iss
->dev
, mem
);
917 return PTR_ERR_OR_ZERO(iss
->regs
[res
]);
920 static void iss_unregister_entities(struct iss_device
*iss
)
922 omap4iss_resizer_unregister_entities(&iss
->resizer
);
923 omap4iss_ipipe_unregister_entities(&iss
->ipipe
);
924 omap4iss_ipipeif_unregister_entities(&iss
->ipipeif
);
925 omap4iss_csi2_unregister_entities(&iss
->csi2a
);
926 omap4iss_csi2_unregister_entities(&iss
->csi2b
);
928 v4l2_device_unregister(&iss
->v4l2_dev
);
929 media_device_unregister(&iss
->media_dev
);
933 * iss_register_subdev_group - Register a group of subdevices
934 * @iss: OMAP4 ISS device
935 * @board_info: I2C subdevs board information array
937 * Register all I2C subdevices in the board_info array. The array must be
938 * terminated by a NULL entry, and the first entry must be the sensor.
940 * Return a pointer to the sensor media entity if it has been successfully
941 * registered, or NULL otherwise.
943 static struct v4l2_subdev
*
944 iss_register_subdev_group(struct iss_device
*iss
,
945 struct iss_subdev_i2c_board_info
*board_info
)
947 struct v4l2_subdev
*sensor
= NULL
;
950 if (!board_info
->board_info
)
953 for (first
= 1; board_info
->board_info
; ++board_info
, first
= 0) {
954 struct v4l2_subdev
*subdev
;
955 struct i2c_adapter
*adapter
;
957 adapter
= i2c_get_adapter(board_info
->i2c_adapter_id
);
960 "%s: Unable to get I2C adapter %d for device %s\n",
961 __func__
, board_info
->i2c_adapter_id
,
962 board_info
->board_info
->type
);
966 subdev
= v4l2_i2c_new_subdev_board(&iss
->v4l2_dev
, adapter
,
967 board_info
->board_info
, NULL
);
969 dev_err(iss
->dev
, "Unable to register subdev %s\n",
970 board_info
->board_info
->type
);
981 static int iss_register_entities(struct iss_device
*iss
)
983 struct iss_platform_data
*pdata
= iss
->pdata
;
984 struct iss_v4l2_subdevs_group
*subdevs
;
987 iss
->media_dev
.dev
= iss
->dev
;
988 strlcpy(iss
->media_dev
.model
, "TI OMAP4 ISS",
989 sizeof(iss
->media_dev
.model
));
990 iss
->media_dev
.hw_revision
= iss
->revision
;
991 iss
->media_dev
.link_notify
= v4l2_pipeline_link_notify
;
992 ret
= media_device_register(&iss
->media_dev
);
994 dev_err(iss
->dev
, "Media device registration failed (%d)\n",
999 iss
->v4l2_dev
.mdev
= &iss
->media_dev
;
1000 ret
= v4l2_device_register(iss
->dev
, &iss
->v4l2_dev
);
1002 dev_err(iss
->dev
, "V4L2 device registration failed (%d)\n",
1007 /* Register internal entities */
1008 ret
= omap4iss_csi2_register_entities(&iss
->csi2a
, &iss
->v4l2_dev
);
1012 ret
= omap4iss_csi2_register_entities(&iss
->csi2b
, &iss
->v4l2_dev
);
1016 ret
= omap4iss_ipipeif_register_entities(&iss
->ipipeif
, &iss
->v4l2_dev
);
1020 ret
= omap4iss_ipipe_register_entities(&iss
->ipipe
, &iss
->v4l2_dev
);
1024 ret
= omap4iss_resizer_register_entities(&iss
->resizer
, &iss
->v4l2_dev
);
1028 /* Register external entities */
1029 for (subdevs
= pdata
->subdevs
; subdevs
&& subdevs
->subdevs
; ++subdevs
) {
1030 struct v4l2_subdev
*sensor
;
1031 struct media_entity
*input
;
1035 sensor
= iss_register_subdev_group(iss
, subdevs
->subdevs
);
1039 sensor
->host_priv
= subdevs
;
1041 /* Connect the sensor to the correct interface module.
1042 * CSI2a receiver through CSIPHY1, or
1043 * CSI2b receiver through CSIPHY2
1045 switch (subdevs
->interface
) {
1046 case ISS_INTERFACE_CSI2A_PHY1
:
1047 input
= &iss
->csi2a
.subdev
.entity
;
1048 pad
= CSI2_PAD_SINK
;
1049 flags
= MEDIA_LNK_FL_IMMUTABLE
1050 | MEDIA_LNK_FL_ENABLED
;
1053 case ISS_INTERFACE_CSI2B_PHY2
:
1054 input
= &iss
->csi2b
.subdev
.entity
;
1055 pad
= CSI2_PAD_SINK
;
1056 flags
= MEDIA_LNK_FL_IMMUTABLE
1057 | MEDIA_LNK_FL_ENABLED
;
1061 dev_err(iss
->dev
, "invalid interface type %u\n",
1062 subdevs
->interface
);
1067 ret
= media_create_pad_link(&sensor
->entity
, 0, input
, pad
,
1073 ret
= v4l2_device_register_subdev_nodes(&iss
->v4l2_dev
);
1077 iss_unregister_entities(iss
);
1083 * iss_create_links() - Pads links creation for the subdevices
1084 * @iss : Pointer to ISS device
1086 * return negative error code or zero on success
1088 static int iss_create_links(struct iss_device
*iss
)
1092 ret
= omap4iss_csi2_create_links(iss
);
1094 dev_err(iss
->dev
, "CSI2 pads links creation failed\n");
1098 ret
= omap4iss_ipipeif_create_links(iss
);
1100 dev_err(iss
->dev
, "ISP IPIPEIF pads links creation failed\n");
1104 ret
= omap4iss_resizer_create_links(iss
);
1106 dev_err(iss
->dev
, "ISP RESIZER pads links creation failed\n");
1110 /* Connect the submodules. */
1111 ret
= media_create_pad_link(
1112 &iss
->csi2a
.subdev
.entity
, CSI2_PAD_SOURCE
,
1113 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SINK
, 0);
1117 ret
= media_create_pad_link(
1118 &iss
->csi2b
.subdev
.entity
, CSI2_PAD_SOURCE
,
1119 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SINK
, 0);
1123 ret
= media_create_pad_link(
1124 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SOURCE_VP
,
1125 &iss
->resizer
.subdev
.entity
, RESIZER_PAD_SINK
, 0);
1129 ret
= media_create_pad_link(
1130 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SOURCE_VP
,
1131 &iss
->ipipe
.subdev
.entity
, IPIPE_PAD_SINK
, 0);
1135 ret
= media_create_pad_link(
1136 &iss
->ipipe
.subdev
.entity
, IPIPE_PAD_SOURCE_VP
,
1137 &iss
->resizer
.subdev
.entity
, RESIZER_PAD_SINK
, 0);
1144 static void iss_cleanup_modules(struct iss_device
*iss
)
1146 omap4iss_csi2_cleanup(iss
);
1147 omap4iss_ipipeif_cleanup(iss
);
1148 omap4iss_ipipe_cleanup(iss
);
1149 omap4iss_resizer_cleanup(iss
);
1152 static int iss_initialize_modules(struct iss_device
*iss
)
1156 ret
= omap4iss_csiphy_init(iss
);
1158 dev_err(iss
->dev
, "CSI PHY initialization failed\n");
1162 ret
= omap4iss_csi2_init(iss
);
1164 dev_err(iss
->dev
, "CSI2 initialization failed\n");
1168 ret
= omap4iss_ipipeif_init(iss
);
1170 dev_err(iss
->dev
, "ISP IPIPEIF initialization failed\n");
1174 ret
= omap4iss_ipipe_init(iss
);
1176 dev_err(iss
->dev
, "ISP IPIPE initialization failed\n");
1180 ret
= omap4iss_resizer_init(iss
);
1182 dev_err(iss
->dev
, "ISP RESIZER initialization failed\n");
1189 omap4iss_ipipe_cleanup(iss
);
1191 omap4iss_ipipeif_cleanup(iss
);
1193 omap4iss_csi2_cleanup(iss
);
1199 static int iss_probe(struct platform_device
*pdev
)
1201 struct iss_platform_data
*pdata
= pdev
->dev
.platform_data
;
1202 struct iss_device
*iss
;
1209 iss
= devm_kzalloc(&pdev
->dev
, sizeof(*iss
), GFP_KERNEL
);
1213 mutex_init(&iss
->iss_mutex
);
1215 iss
->dev
= &pdev
->dev
;
1218 iss
->raw_dmamask
= DMA_BIT_MASK(32);
1219 iss
->dev
->dma_mask
= &iss
->raw_dmamask
;
1220 iss
->dev
->coherent_dma_mask
= DMA_BIT_MASK(32);
1222 platform_set_drvdata(pdev
, iss
);
1225 * TODO: When implementing DT support switch to syscon regmap lookup by
1228 iss
->syscon
= syscon_regmap_lookup_by_compatible("syscon");
1229 if (IS_ERR(iss
->syscon
)) {
1230 ret
= PTR_ERR(iss
->syscon
);
1235 ret
= iss_map_mem_resource(pdev
, iss
, OMAP4_ISS_MEM_TOP
);
1239 ret
= iss_get_clocks(iss
);
1243 if (!omap4iss_get(iss
))
1246 ret
= iss_reset(iss
);
1250 iss
->revision
= iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_REVISION
);
1251 dev_info(iss
->dev
, "Revision %08x found\n", iss
->revision
);
1253 for (i
= 1; i
< OMAP4_ISS_MEM_LAST
; i
++) {
1254 ret
= iss_map_mem_resource(pdev
, iss
, i
);
1259 /* Configure BTE BW_LIMITER field to max recommended value (1 GB) */
1260 iss_reg_update(iss
, OMAP4_ISS_MEM_BTE
, BTE_CTRL
,
1261 BTE_CTRL_BW_LIMITER_MASK
,
1262 18 << BTE_CTRL_BW_LIMITER_SHIFT
);
1264 /* Perform ISP reset */
1265 ret
= omap4iss_subclk_enable(iss
, OMAP4_ISS_SUBCLK_ISP
);
1269 ret
= iss_isp_reset(iss
);
1273 dev_info(iss
->dev
, "ISP Revision %08x found\n",
1274 iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_REVISION
));
1277 ret
= platform_get_irq(pdev
, 0);
1279 dev_err(iss
->dev
, "No IRQ resource\n");
1285 if (devm_request_irq(iss
->dev
, iss
->irq_num
, iss_isr
, IRQF_SHARED
,
1286 "OMAP4 ISS", iss
)) {
1287 dev_err(iss
->dev
, "Unable to request IRQ\n");
1293 ret
= iss_initialize_modules(iss
);
1297 ret
= iss_register_entities(iss
);
1301 ret
= media_entity_enum_init(&iss
->crashed
, &iss
->media_dev
);
1303 goto error_entities
;
1305 ret
= iss_create_links(iss
);
1307 goto error_entities
;
1314 iss_unregister_entities(iss
);
1315 media_entity_enum_cleanup(&iss
->crashed
);
1317 iss_cleanup_modules(iss
);
1321 mutex_destroy(&iss
->iss_mutex
);
1326 static int iss_remove(struct platform_device
*pdev
)
1328 struct iss_device
*iss
= platform_get_drvdata(pdev
);
1330 iss_unregister_entities(iss
);
1331 media_entity_enum_cleanup(&iss
->crashed
);
1332 iss_cleanup_modules(iss
);
1337 static const struct platform_device_id omap4iss_id_table
[] = {
1341 MODULE_DEVICE_TABLE(platform
, omap4iss_id_table
);
1343 static struct platform_driver iss_driver
= {
1345 .remove
= iss_remove
,
1346 .id_table
= omap4iss_id_table
,
1352 module_platform_driver(iss_driver
);
1354 MODULE_DESCRIPTION("TI OMAP4 ISS driver");
1355 MODULE_AUTHOR("Sergio Aguirre <sergio.a.aguirre@gmail.com>");
1356 MODULE_LICENSE("GPL");
1357 MODULE_VERSION(ISS_VIDEO_DRIVER_VERSION
);