2 * TI OMAP4 ISS V4L2 Driver
4 * Copyright (C) 2012, Texas Instruments
6 * Author: Sergio Aguirre <sergio.a.aguirre@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/sched.h>
25 #include <linux/vmalloc.h>
27 #include <media/v4l2-common.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-ctrls.h>
34 #define ISS_PRINT_REGISTER(iss, name)\
35 dev_dbg(iss->dev, "###ISS " #name "=0x%08x\n", \
36 iss_reg_read(iss, OMAP4_ISS_MEM_TOP, ISS_##name))
38 static void iss_print_status(struct iss_device
*iss
)
40 dev_dbg(iss
->dev
, "-------------ISS HL Register dump-------------\n");
42 ISS_PRINT_REGISTER(iss
, HL_REVISION
);
43 ISS_PRINT_REGISTER(iss
, HL_SYSCONFIG
);
44 ISS_PRINT_REGISTER(iss
, HL_IRQSTATUS(5));
45 ISS_PRINT_REGISTER(iss
, HL_IRQENABLE_SET(5));
46 ISS_PRINT_REGISTER(iss
, HL_IRQENABLE_CLR(5));
47 ISS_PRINT_REGISTER(iss
, CTRL
);
48 ISS_PRINT_REGISTER(iss
, CLKCTRL
);
49 ISS_PRINT_REGISTER(iss
, CLKSTAT
);
51 dev_dbg(iss
->dev
, "-----------------------------------------------\n");
55 * omap4iss_flush - Post pending L3 bus writes by doing a register readback
56 * @iss: OMAP4 ISS device
58 * In order to force posting of pending writes, we need to write and
59 * readback the same register, in this case the revision register.
61 * See this link for reference:
62 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
64 void omap4iss_flush(struct iss_device
*iss
)
66 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_REVISION
, 0);
67 iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_REVISION
);
71 * iss_isp_enable_interrupts - Enable ISS ISP interrupts.
72 * @iss: OMAP4 ISS device
74 static void omap4iss_isp_enable_interrupts(struct iss_device
*iss
)
76 static const u32 isp_irq
= ISP5_IRQ_OCP_ERR
|
77 ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR
|
78 ISP5_IRQ_RSZ_FIFO_OVF
|
79 ISP5_IRQ_RSZ_INT_DMA
|
82 /* Enable ISP interrupts */
83 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQSTATUS(0), isp_irq
);
84 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQENABLE_SET(0),
89 * iss_isp_disable_interrupts - Disable ISS interrupts.
90 * @iss: OMAP4 ISS device
92 static void omap4iss_isp_disable_interrupts(struct iss_device
*iss
)
94 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQENABLE_CLR(0), ~0);
98 * iss_enable_interrupts - Enable ISS interrupts.
99 * @iss: OMAP4 ISS device
101 static void iss_enable_interrupts(struct iss_device
*iss
)
103 static const u32 hl_irq
= ISS_HL_IRQ_CSIA
| ISS_HL_IRQ_CSIB
106 /* Enable HL interrupts */
107 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQSTATUS(5), hl_irq
);
108 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQENABLE_SET(5), hl_irq
);
110 if (iss
->regs
[OMAP4_ISS_MEM_ISP_SYS1
])
111 omap4iss_isp_enable_interrupts(iss
);
115 * iss_disable_interrupts - Disable ISS interrupts.
116 * @iss: OMAP4 ISS device
118 static void iss_disable_interrupts(struct iss_device
*iss
)
120 if (iss
->regs
[OMAP4_ISS_MEM_ISP_SYS1
])
121 omap4iss_isp_disable_interrupts(iss
);
123 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQENABLE_CLR(5), ~0);
126 int omap4iss_get_external_info(struct iss_pipeline
*pipe
,
127 struct media_link
*link
)
129 struct iss_device
*iss
=
130 container_of(pipe
, struct iss_video
, pipe
)->iss
;
131 struct v4l2_subdev_format fmt
;
132 struct v4l2_ctrl
*ctrl
;
138 if (pipe
->external_rate
)
141 memset(&fmt
, 0, sizeof(fmt
));
143 fmt
.pad
= link
->source
->index
;
144 fmt
.which
= V4L2_SUBDEV_FORMAT_ACTIVE
;
145 ret
= v4l2_subdev_call(media_entity_to_v4l2_subdev(link
->sink
->entity
),
146 pad
, get_fmt
, NULL
, &fmt
);
150 pipe
->external_bpp
= omap4iss_video_format_info(fmt
.format
.code
)->bpp
;
152 ctrl
= v4l2_ctrl_find(pipe
->external
->ctrl_handler
,
153 V4L2_CID_PIXEL_RATE
);
155 dev_warn(iss
->dev
, "no pixel rate control in subdev %s\n",
156 pipe
->external
->name
);
160 pipe
->external_rate
= v4l2_ctrl_g_ctrl_int64(ctrl
);
166 * Configure the bridge. Valid inputs are
168 * IPIPEIF_INPUT_CSI2A: CSI2a receiver
169 * IPIPEIF_INPUT_CSI2B: CSI2b receiver
171 * The bridge and lane shifter are configured according to the selected input
172 * and the ISP platform data.
174 void omap4iss_configure_bridge(struct iss_device
*iss
,
175 enum ipipeif_input_entity input
)
180 issctrl_val
= iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_CTRL
);
181 issctrl_val
&= ~ISS_CTRL_INPUT_SEL_MASK
;
182 issctrl_val
&= ~ISS_CTRL_CLK_DIV_MASK
;
184 isp5ctrl_val
= iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
);
187 case IPIPEIF_INPUT_CSI2A
:
188 issctrl_val
|= ISS_CTRL_INPUT_SEL_CSI2A
;
191 case IPIPEIF_INPUT_CSI2B
:
192 issctrl_val
|= ISS_CTRL_INPUT_SEL_CSI2B
;
199 issctrl_val
|= ISS_CTRL_SYNC_DETECT_VS_RAISING
;
201 isp5ctrl_val
|= ISP5_CTRL_VD_PULSE_EXT
| ISP5_CTRL_PSYNC_CLK_SEL
|
202 ISP5_CTRL_SYNC_ENABLE
;
204 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_CTRL
, issctrl_val
);
205 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
, isp5ctrl_val
);
209 static void iss_isr_dbg(struct iss_device
*iss
, u32 irqstatus
)
211 static const char * const name
[] = {
247 dev_dbg(iss
->dev
, "ISS IRQ: ");
249 for (i
= 0; i
< ARRAY_SIZE(name
); i
++) {
250 if ((1 << i
) & irqstatus
)
251 pr_cont("%s ", name
[i
]);
256 static void iss_isp_isr_dbg(struct iss_device
*iss
, u32 irqstatus
)
258 static const char * const name
[] = {
278 "RSZ_FIFO_IN_BLK_ERR",
294 dev_dbg(iss
->dev
, "ISP IRQ: ");
296 for (i
= 0; i
< ARRAY_SIZE(name
); i
++) {
297 if ((1 << i
) & irqstatus
)
298 pr_cont("%s ", name
[i
]);
305 * iss_isr - Interrupt Service Routine for ISS module.
306 * @irq: Not used currently.
307 * @_iss: Pointer to the OMAP4 ISS device
309 * Handles the corresponding callback if plugged in.
311 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
312 * IRQ wasn't handled.
314 static irqreturn_t
iss_isr(int irq
, void *_iss
)
316 static const u32 ipipeif_events
= ISP5_IRQ_IPIPEIF_IRQ
|
317 ISP5_IRQ_ISIF_INT(0);
318 static const u32 resizer_events
= ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR
|
319 ISP5_IRQ_RSZ_FIFO_OVF
|
320 ISP5_IRQ_RSZ_INT_DMA
;
321 struct iss_device
*iss
= _iss
;
324 irqstatus
= iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQSTATUS(5));
325 iss_reg_write(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_IRQSTATUS(5), irqstatus
);
327 if (irqstatus
& ISS_HL_IRQ_CSIA
)
328 omap4iss_csi2_isr(&iss
->csi2a
);
330 if (irqstatus
& ISS_HL_IRQ_CSIB
)
331 omap4iss_csi2_isr(&iss
->csi2b
);
333 if (irqstatus
& ISS_HL_IRQ_ISP(0)) {
334 u32 isp_irqstatus
= iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
,
336 iss_reg_write(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_IRQSTATUS(0),
339 if (isp_irqstatus
& ISP5_IRQ_OCP_ERR
)
340 dev_dbg(iss
->dev
, "ISP5 OCP Error!\n");
342 if (isp_irqstatus
& ipipeif_events
) {
343 omap4iss_ipipeif_isr(&iss
->ipipeif
,
344 isp_irqstatus
& ipipeif_events
);
347 if (isp_irqstatus
& resizer_events
)
348 omap4iss_resizer_isr(&iss
->resizer
,
349 isp_irqstatus
& resizer_events
);
352 iss_isp_isr_dbg(iss
, isp_irqstatus
);
359 iss_isr_dbg(iss
, irqstatus
);
365 static const struct media_device_ops iss_media_ops
= {
366 .link_notify
= v4l2_pipeline_link_notify
,
369 /* -----------------------------------------------------------------------------
370 * Pipeline stream management
374 * iss_pipeline_disable - Disable streaming on a pipeline
375 * @pipe: ISS pipeline
376 * @until: entity at which to stop pipeline walk
378 * Walk the entities chain starting at the pipeline output video node and stop
379 * all modules in the chain. Wait synchronously for the modules to be stopped if
382 * If the until argument isn't NULL, stop the pipeline walk when reaching the
383 * until entity. This is used to disable a partially started pipeline due to a
384 * subdev start error.
386 static int iss_pipeline_disable(struct iss_pipeline
*pipe
,
387 struct media_entity
*until
)
389 struct iss_device
*iss
= pipe
->output
->iss
;
390 struct media_entity
*entity
;
391 struct media_pad
*pad
;
392 struct v4l2_subdev
*subdev
;
396 entity
= &pipe
->output
->video
.entity
;
398 pad
= &entity
->pads
[0];
399 if (!(pad
->flags
& MEDIA_PAD_FL_SINK
))
402 pad
= media_entity_remote_pad(pad
);
403 if (!pad
|| !is_media_entity_v4l2_subdev(pad
->entity
))
406 entity
= pad
->entity
;
410 subdev
= media_entity_to_v4l2_subdev(entity
);
411 ret
= v4l2_subdev_call(subdev
, video
, s_stream
, 0);
413 dev_warn(iss
->dev
, "%s: module stop timeout.\n",
415 /* If the entity failed to stopped, assume it has
416 * crashed. Mark it as such, the ISS will be reset when
417 * applications will release it.
419 media_entity_enum_set(&iss
->crashed
, &subdev
->entity
);
420 failure
= -ETIMEDOUT
;
428 * iss_pipeline_enable - Enable streaming on a pipeline
429 * @pipe: ISS pipeline
430 * @mode: Stream mode (single shot or continuous)
432 * Walk the entities chain starting at the pipeline output video node and start
433 * all modules in the chain in the given mode.
435 * Return 0 if successful, or the return value of the failed video::s_stream
436 * operation otherwise.
438 static int iss_pipeline_enable(struct iss_pipeline
*pipe
,
439 enum iss_pipeline_stream_state mode
)
441 struct iss_device
*iss
= pipe
->output
->iss
;
442 struct media_entity
*entity
;
443 struct media_pad
*pad
;
444 struct v4l2_subdev
*subdev
;
448 /* If one of the entities in the pipeline has crashed it will not work
449 * properly. Refuse to start streaming in that case. This check must be
450 * performed before the loop below to avoid starting entities if the
451 * pipeline won't start anyway (those entities would then likely fail to
452 * stop, making the problem worse).
454 if (media_entity_enum_intersects(&pipe
->ent_enum
, &iss
->crashed
))
457 spin_lock_irqsave(&pipe
->lock
, flags
);
458 pipe
->state
&= ~(ISS_PIPELINE_IDLE_INPUT
| ISS_PIPELINE_IDLE_OUTPUT
);
459 spin_unlock_irqrestore(&pipe
->lock
, flags
);
461 pipe
->do_propagation
= false;
463 entity
= &pipe
->output
->video
.entity
;
465 pad
= &entity
->pads
[0];
466 if (!(pad
->flags
& MEDIA_PAD_FL_SINK
))
469 pad
= media_entity_remote_pad(pad
);
470 if (!pad
|| !is_media_entity_v4l2_subdev(pad
->entity
))
473 entity
= pad
->entity
;
474 subdev
= media_entity_to_v4l2_subdev(entity
);
476 ret
= v4l2_subdev_call(subdev
, video
, s_stream
, mode
);
477 if (ret
< 0 && ret
!= -ENOIOCTLCMD
) {
478 iss_pipeline_disable(pipe
, entity
);
482 if (subdev
== &iss
->csi2a
.subdev
||
483 subdev
== &iss
->csi2b
.subdev
)
484 pipe
->do_propagation
= true;
487 iss_print_status(pipe
->output
->iss
);
492 * omap4iss_pipeline_set_stream - Enable/disable streaming on a pipeline
493 * @pipe: ISS pipeline
494 * @state: Stream state (stopped, single shot or continuous)
496 * Set the pipeline to the given stream state. Pipelines can be started in
497 * single-shot or continuous mode.
499 * Return 0 if successful, or the return value of the failed video::s_stream
500 * operation otherwise. The pipeline state is not updated when the operation
501 * fails, except when stopping the pipeline.
503 int omap4iss_pipeline_set_stream(struct iss_pipeline
*pipe
,
504 enum iss_pipeline_stream_state state
)
508 if (state
== ISS_PIPELINE_STREAM_STOPPED
)
509 ret
= iss_pipeline_disable(pipe
, NULL
);
511 ret
= iss_pipeline_enable(pipe
, state
);
513 if (ret
== 0 || state
== ISS_PIPELINE_STREAM_STOPPED
)
514 pipe
->stream_state
= state
;
520 * omap4iss_pipeline_cancel_stream - Cancel stream on a pipeline
521 * @pipe: ISS pipeline
523 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
524 * erroneous and makes sure no new buffer can be queued. This function is called
525 * when a fatal error that prevents any further operation on the pipeline
528 void omap4iss_pipeline_cancel_stream(struct iss_pipeline
*pipe
)
531 omap4iss_video_cancel_stream(pipe
->input
);
533 omap4iss_video_cancel_stream(pipe
->output
);
537 * iss_pipeline_is_last - Verify if entity has an enabled link to the output
539 * @me: ISS module's media entity
541 * Returns 1 if the entity has an enabled link to the output video node or 0
542 * otherwise. It's true only while pipeline can have no more than one output
545 static int iss_pipeline_is_last(struct media_entity
*me
)
547 struct iss_pipeline
*pipe
;
548 struct media_pad
*pad
;
552 pipe
= to_iss_pipeline(me
);
553 if (pipe
->stream_state
== ISS_PIPELINE_STREAM_STOPPED
)
555 pad
= media_entity_remote_pad(&pipe
->output
->pad
);
556 return pad
->entity
== me
;
559 static int iss_reset(struct iss_device
*iss
)
561 unsigned int timeout
;
563 iss_reg_set(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_SYSCONFIG
,
564 ISS_HL_SYSCONFIG_SOFTRESET
);
566 timeout
= iss_poll_condition_timeout(
567 !(iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_SYSCONFIG
) &
568 ISS_HL_SYSCONFIG_SOFTRESET
), 1000, 10, 100);
570 dev_err(iss
->dev
, "ISS reset timeout\n");
574 media_entity_enum_zero(&iss
->crashed
);
579 static int iss_isp_reset(struct iss_device
*iss
)
581 unsigned int timeout
;
583 /* Fist, ensure that the ISP is IDLE (no transactions happening) */
584 iss_reg_update(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_SYSCONFIG
,
585 ISP5_SYSCONFIG_STANDBYMODE_MASK
,
586 ISP5_SYSCONFIG_STANDBYMODE_SMART
);
588 iss_reg_set(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
, ISP5_CTRL_MSTANDBY
);
590 timeout
= iss_poll_condition_timeout(
591 iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
) &
592 ISP5_CTRL_MSTANDBY_WAIT
, 1000000, 1000, 1500);
594 dev_err(iss
->dev
, "ISP5 standby timeout\n");
598 /* Now finally, do the reset */
599 iss_reg_set(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_SYSCONFIG
,
600 ISP5_SYSCONFIG_SOFTRESET
);
602 timeout
= iss_poll_condition_timeout(
603 !(iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_SYSCONFIG
) &
604 ISP5_SYSCONFIG_SOFTRESET
), 1000000, 1000, 1500);
606 dev_err(iss
->dev
, "ISP5 reset timeout\n");
614 * iss_module_sync_idle - Helper to sync module with its idle state
615 * @me: ISS submodule's media entity
616 * @wait: ISS submodule's wait queue for streamoff/interrupt synchronization
617 * @stopping: flag which tells module wants to stop
619 * This function checks if ISS submodule needs to wait for next interrupt. If
620 * yes, makes the caller to sleep while waiting for such event.
622 int omap4iss_module_sync_idle(struct media_entity
*me
, wait_queue_head_t
*wait
,
625 struct iss_pipeline
*pipe
= to_iss_pipeline(me
);
626 struct iss_video
*video
= pipe
->output
;
629 if (pipe
->stream_state
== ISS_PIPELINE_STREAM_STOPPED
||
630 (pipe
->stream_state
== ISS_PIPELINE_STREAM_SINGLESHOT
&&
631 !iss_pipeline_ready(pipe
)))
635 * atomic_set() doesn't include memory barrier on ARM platform for SMP
636 * scenario. We'll call it here to avoid race conditions.
638 atomic_set(stopping
, 1);
642 * If module is the last one, it's writing to memory. In this case,
643 * it's necessary to check if the module is already paused due to
644 * DMA queue underrun or if it has to wait for next interrupt to be
646 * If it isn't the last one, the function won't sleep but *stopping
647 * will still be set to warn next submodule caller's interrupt the
648 * module wants to be idle.
650 if (!iss_pipeline_is_last(me
))
653 spin_lock_irqsave(&video
->qlock
, flags
);
654 if (video
->dmaqueue_flags
& ISS_VIDEO_DMAQUEUE_UNDERRUN
) {
655 spin_unlock_irqrestore(&video
->qlock
, flags
);
656 atomic_set(stopping
, 0);
660 spin_unlock_irqrestore(&video
->qlock
, flags
);
661 if (!wait_event_timeout(*wait
, !atomic_read(stopping
),
662 msecs_to_jiffies(1000))) {
663 atomic_set(stopping
, 0);
672 * omap4iss_module_sync_is_stopped - Helper to verify if module was stopping
673 * @wait: ISS submodule's wait queue for streamoff/interrupt synchronization
674 * @stopping: flag which tells module wants to stop
676 * This function checks if ISS submodule was stopping. In case of yes, it
677 * notices the caller by setting stopping to 0 and waking up the wait queue.
678 * Returns 1 if it was stopping or 0 otherwise.
680 int omap4iss_module_sync_is_stopping(wait_queue_head_t
*wait
,
683 if (atomic_cmpxchg(stopping
, 1, 0)) {
691 /* --------------------------------------------------------------------------
695 #define ISS_CLKCTRL_MASK (ISS_CLKCTRL_CSI2_A |\
696 ISS_CLKCTRL_CSI2_B |\
699 static int __iss_subclk_update(struct iss_device
*iss
)
702 int ret
= 0, timeout
= 1000;
704 if (iss
->subclk_resources
& OMAP4_ISS_SUBCLK_CSI2_A
)
705 clk
|= ISS_CLKCTRL_CSI2_A
;
707 if (iss
->subclk_resources
& OMAP4_ISS_SUBCLK_CSI2_B
)
708 clk
|= ISS_CLKCTRL_CSI2_B
;
710 if (iss
->subclk_resources
& OMAP4_ISS_SUBCLK_ISP
)
711 clk
|= ISS_CLKCTRL_ISP
;
713 iss_reg_update(iss
, OMAP4_ISS_MEM_TOP
, ISS_CLKCTRL
,
714 ISS_CLKCTRL_MASK
, clk
);
716 /* Wait for HW assertion */
717 while (--timeout
> 0) {
719 if ((iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_CLKSTAT
) &
720 ISS_CLKCTRL_MASK
) == clk
)
730 int omap4iss_subclk_enable(struct iss_device
*iss
,
731 enum iss_subclk_resource res
)
733 iss
->subclk_resources
|= res
;
735 return __iss_subclk_update(iss
);
738 int omap4iss_subclk_disable(struct iss_device
*iss
,
739 enum iss_subclk_resource res
)
741 iss
->subclk_resources
&= ~res
;
743 return __iss_subclk_update(iss
);
746 #define ISS_ISP5_CLKCTRL_MASK (ISP5_CTRL_BL_CLK_ENABLE |\
747 ISP5_CTRL_ISIF_CLK_ENABLE |\
748 ISP5_CTRL_H3A_CLK_ENABLE |\
749 ISP5_CTRL_RSZ_CLK_ENABLE |\
750 ISP5_CTRL_IPIPE_CLK_ENABLE |\
751 ISP5_CTRL_IPIPEIF_CLK_ENABLE)
753 static void __iss_isp_subclk_update(struct iss_device
*iss
)
757 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_ISIF
)
758 clk
|= ISP5_CTRL_ISIF_CLK_ENABLE
;
760 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_H3A
)
761 clk
|= ISP5_CTRL_H3A_CLK_ENABLE
;
763 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_RSZ
)
764 clk
|= ISP5_CTRL_RSZ_CLK_ENABLE
;
766 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_IPIPE
)
767 clk
|= ISP5_CTRL_IPIPE_CLK_ENABLE
;
769 if (iss
->isp_subclk_resources
& OMAP4_ISS_ISP_SUBCLK_IPIPEIF
)
770 clk
|= ISP5_CTRL_IPIPEIF_CLK_ENABLE
;
773 clk
|= ISP5_CTRL_BL_CLK_ENABLE
;
775 iss_reg_update(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_CTRL
,
776 ISS_ISP5_CLKCTRL_MASK
, clk
);
779 void omap4iss_isp_subclk_enable(struct iss_device
*iss
,
780 enum iss_isp_subclk_resource res
)
782 iss
->isp_subclk_resources
|= res
;
784 __iss_isp_subclk_update(iss
);
787 void omap4iss_isp_subclk_disable(struct iss_device
*iss
,
788 enum iss_isp_subclk_resource res
)
790 iss
->isp_subclk_resources
&= ~res
;
792 __iss_isp_subclk_update(iss
);
796 * iss_enable_clocks - Enable ISS clocks
797 * @iss: OMAP4 ISS device
799 * Return 0 if successful, or clk_enable return value if any of tthem fails.
801 static int iss_enable_clocks(struct iss_device
*iss
)
805 ret
= clk_enable(iss
->iss_fck
);
807 dev_err(iss
->dev
, "clk_enable iss_fck failed\n");
811 ret
= clk_enable(iss
->iss_ctrlclk
);
813 dev_err(iss
->dev
, "clk_enable iss_ctrlclk failed\n");
814 clk_disable(iss
->iss_fck
);
822 * iss_disable_clocks - Disable ISS clocks
823 * @iss: OMAP4 ISS device
825 static void iss_disable_clocks(struct iss_device
*iss
)
827 clk_disable(iss
->iss_ctrlclk
);
828 clk_disable(iss
->iss_fck
);
831 static int iss_get_clocks(struct iss_device
*iss
)
833 iss
->iss_fck
= devm_clk_get(iss
->dev
, "iss_fck");
834 if (IS_ERR(iss
->iss_fck
)) {
835 dev_err(iss
->dev
, "Unable to get iss_fck clock info\n");
836 return PTR_ERR(iss
->iss_fck
);
839 iss
->iss_ctrlclk
= devm_clk_get(iss
->dev
, "iss_ctrlclk");
840 if (IS_ERR(iss
->iss_ctrlclk
)) {
841 dev_err(iss
->dev
, "Unable to get iss_ctrlclk clock info\n");
842 return PTR_ERR(iss
->iss_ctrlclk
);
849 * omap4iss_get - Acquire the ISS resource.
851 * Initializes the clocks for the first acquire.
853 * Increment the reference count on the ISS. If the first reference is taken,
854 * enable clocks and power-up all submodules.
856 * Return a pointer to the ISS device structure, or NULL if an error occurred.
858 struct iss_device
*omap4iss_get(struct iss_device
*iss
)
860 struct iss_device
*__iss
= iss
;
865 mutex_lock(&iss
->iss_mutex
);
866 if (iss
->ref_count
> 0)
869 if (iss_enable_clocks(iss
) < 0) {
874 iss_enable_interrupts(iss
);
879 mutex_unlock(&iss
->iss_mutex
);
885 * omap4iss_put - Release the ISS
887 * Decrement the reference count on the ISS. If the last reference is released,
888 * power-down all submodules, disable clocks and free temporary buffers.
890 void omap4iss_put(struct iss_device
*iss
)
895 mutex_lock(&iss
->iss_mutex
);
896 BUG_ON(iss
->ref_count
== 0);
897 if (--iss
->ref_count
== 0) {
898 iss_disable_interrupts(iss
);
899 /* Reset the ISS if an entity has failed to stop. This is the
900 * only way to recover from such conditions, although it would
901 * be worth investigating whether resetting the ISP only can't
902 * fix the problem in some cases.
904 if (!media_entity_enum_empty(&iss
->crashed
))
906 iss_disable_clocks(iss
);
908 mutex_unlock(&iss
->iss_mutex
);
911 static int iss_map_mem_resource(struct platform_device
*pdev
,
912 struct iss_device
*iss
,
913 enum iss_mem_resources res
)
915 struct resource
*mem
;
917 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, res
);
919 iss
->regs
[res
] = devm_ioremap_resource(iss
->dev
, mem
);
921 return PTR_ERR_OR_ZERO(iss
->regs
[res
]);
924 static void iss_unregister_entities(struct iss_device
*iss
)
926 omap4iss_resizer_unregister_entities(&iss
->resizer
);
927 omap4iss_ipipe_unregister_entities(&iss
->ipipe
);
928 omap4iss_ipipeif_unregister_entities(&iss
->ipipeif
);
929 omap4iss_csi2_unregister_entities(&iss
->csi2a
);
930 omap4iss_csi2_unregister_entities(&iss
->csi2b
);
932 v4l2_device_unregister(&iss
->v4l2_dev
);
933 media_device_unregister(&iss
->media_dev
);
937 * iss_register_subdev_group - Register a group of subdevices
938 * @iss: OMAP4 ISS device
939 * @board_info: I2C subdevs board information array
941 * Register all I2C subdevices in the board_info array. The array must be
942 * terminated by a NULL entry, and the first entry must be the sensor.
944 * Return a pointer to the sensor media entity if it has been successfully
945 * registered, or NULL otherwise.
947 static struct v4l2_subdev
*
948 iss_register_subdev_group(struct iss_device
*iss
,
949 struct iss_subdev_i2c_board_info
*board_info
)
951 struct v4l2_subdev
*sensor
= NULL
;
954 if (!board_info
->board_info
)
957 for (first
= 1; board_info
->board_info
; ++board_info
, first
= 0) {
958 struct v4l2_subdev
*subdev
;
959 struct i2c_adapter
*adapter
;
961 adapter
= i2c_get_adapter(board_info
->i2c_adapter_id
);
964 "%s: Unable to get I2C adapter %d for device %s\n",
965 __func__
, board_info
->i2c_adapter_id
,
966 board_info
->board_info
->type
);
970 subdev
= v4l2_i2c_new_subdev_board(&iss
->v4l2_dev
, adapter
,
971 board_info
->board_info
, NULL
);
973 dev_err(iss
->dev
, "Unable to register subdev %s\n",
974 board_info
->board_info
->type
);
985 static int iss_register_entities(struct iss_device
*iss
)
987 struct iss_platform_data
*pdata
= iss
->pdata
;
988 struct iss_v4l2_subdevs_group
*subdevs
;
991 iss
->media_dev
.dev
= iss
->dev
;
992 strlcpy(iss
->media_dev
.model
, "TI OMAP4 ISS",
993 sizeof(iss
->media_dev
.model
));
994 iss
->media_dev
.hw_revision
= iss
->revision
;
995 iss
->media_dev
.ops
= &iss_media_ops
;
996 ret
= media_device_register(&iss
->media_dev
);
998 dev_err(iss
->dev
, "Media device registration failed (%d)\n",
1003 iss
->v4l2_dev
.mdev
= &iss
->media_dev
;
1004 ret
= v4l2_device_register(iss
->dev
, &iss
->v4l2_dev
);
1006 dev_err(iss
->dev
, "V4L2 device registration failed (%d)\n",
1011 /* Register internal entities */
1012 ret
= omap4iss_csi2_register_entities(&iss
->csi2a
, &iss
->v4l2_dev
);
1016 ret
= omap4iss_csi2_register_entities(&iss
->csi2b
, &iss
->v4l2_dev
);
1020 ret
= omap4iss_ipipeif_register_entities(&iss
->ipipeif
, &iss
->v4l2_dev
);
1024 ret
= omap4iss_ipipe_register_entities(&iss
->ipipe
, &iss
->v4l2_dev
);
1028 ret
= omap4iss_resizer_register_entities(&iss
->resizer
, &iss
->v4l2_dev
);
1032 /* Register external entities */
1033 for (subdevs
= pdata
->subdevs
; subdevs
&& subdevs
->subdevs
; ++subdevs
) {
1034 struct v4l2_subdev
*sensor
;
1035 struct media_entity
*input
;
1039 sensor
= iss_register_subdev_group(iss
, subdevs
->subdevs
);
1043 sensor
->host_priv
= subdevs
;
1045 /* Connect the sensor to the correct interface module.
1046 * CSI2a receiver through CSIPHY1, or
1047 * CSI2b receiver through CSIPHY2
1049 switch (subdevs
->interface
) {
1050 case ISS_INTERFACE_CSI2A_PHY1
:
1051 input
= &iss
->csi2a
.subdev
.entity
;
1052 pad
= CSI2_PAD_SINK
;
1053 flags
= MEDIA_LNK_FL_IMMUTABLE
1054 | MEDIA_LNK_FL_ENABLED
;
1057 case ISS_INTERFACE_CSI2B_PHY2
:
1058 input
= &iss
->csi2b
.subdev
.entity
;
1059 pad
= CSI2_PAD_SINK
;
1060 flags
= MEDIA_LNK_FL_IMMUTABLE
1061 | MEDIA_LNK_FL_ENABLED
;
1065 dev_err(iss
->dev
, "invalid interface type %u\n",
1066 subdevs
->interface
);
1071 ret
= media_create_pad_link(&sensor
->entity
, 0, input
, pad
,
1077 ret
= v4l2_device_register_subdev_nodes(&iss
->v4l2_dev
);
1081 iss_unregister_entities(iss
);
1087 * iss_create_links() - Pads links creation for the subdevices
1088 * @iss : Pointer to ISS device
1090 * return negative error code or zero on success
1092 static int iss_create_links(struct iss_device
*iss
)
1096 ret
= omap4iss_csi2_create_links(iss
);
1098 dev_err(iss
->dev
, "CSI2 pads links creation failed\n");
1102 ret
= omap4iss_ipipeif_create_links(iss
);
1104 dev_err(iss
->dev
, "ISP IPIPEIF pads links creation failed\n");
1108 ret
= omap4iss_resizer_create_links(iss
);
1110 dev_err(iss
->dev
, "ISP RESIZER pads links creation failed\n");
1114 /* Connect the submodules. */
1115 ret
= media_create_pad_link(
1116 &iss
->csi2a
.subdev
.entity
, CSI2_PAD_SOURCE
,
1117 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SINK
, 0);
1121 ret
= media_create_pad_link(
1122 &iss
->csi2b
.subdev
.entity
, CSI2_PAD_SOURCE
,
1123 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SINK
, 0);
1127 ret
= media_create_pad_link(
1128 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SOURCE_VP
,
1129 &iss
->resizer
.subdev
.entity
, RESIZER_PAD_SINK
, 0);
1133 ret
= media_create_pad_link(
1134 &iss
->ipipeif
.subdev
.entity
, IPIPEIF_PAD_SOURCE_VP
,
1135 &iss
->ipipe
.subdev
.entity
, IPIPE_PAD_SINK
, 0);
1139 ret
= media_create_pad_link(
1140 &iss
->ipipe
.subdev
.entity
, IPIPE_PAD_SOURCE_VP
,
1141 &iss
->resizer
.subdev
.entity
, RESIZER_PAD_SINK
, 0);
1148 static void iss_cleanup_modules(struct iss_device
*iss
)
1150 omap4iss_csi2_cleanup(iss
);
1151 omap4iss_ipipeif_cleanup(iss
);
1152 omap4iss_ipipe_cleanup(iss
);
1153 omap4iss_resizer_cleanup(iss
);
1156 static int iss_initialize_modules(struct iss_device
*iss
)
1160 ret
= omap4iss_csiphy_init(iss
);
1162 dev_err(iss
->dev
, "CSI PHY initialization failed\n");
1166 ret
= omap4iss_csi2_init(iss
);
1168 dev_err(iss
->dev
, "CSI2 initialization failed\n");
1172 ret
= omap4iss_ipipeif_init(iss
);
1174 dev_err(iss
->dev
, "ISP IPIPEIF initialization failed\n");
1178 ret
= omap4iss_ipipe_init(iss
);
1180 dev_err(iss
->dev
, "ISP IPIPE initialization failed\n");
1184 ret
= omap4iss_resizer_init(iss
);
1186 dev_err(iss
->dev
, "ISP RESIZER initialization failed\n");
1193 omap4iss_ipipe_cleanup(iss
);
1195 omap4iss_ipipeif_cleanup(iss
);
1197 omap4iss_csi2_cleanup(iss
);
1203 static int iss_probe(struct platform_device
*pdev
)
1205 struct iss_platform_data
*pdata
= pdev
->dev
.platform_data
;
1206 struct iss_device
*iss
;
1213 iss
= devm_kzalloc(&pdev
->dev
, sizeof(*iss
), GFP_KERNEL
);
1217 mutex_init(&iss
->iss_mutex
);
1219 iss
->dev
= &pdev
->dev
;
1222 iss
->raw_dmamask
= DMA_BIT_MASK(32);
1223 iss
->dev
->dma_mask
= &iss
->raw_dmamask
;
1224 iss
->dev
->coherent_dma_mask
= DMA_BIT_MASK(32);
1226 platform_set_drvdata(pdev
, iss
);
1229 * TODO: When implementing DT support switch to syscon regmap lookup by
1232 iss
->syscon
= syscon_regmap_lookup_by_compatible("syscon");
1233 if (IS_ERR(iss
->syscon
)) {
1234 ret
= PTR_ERR(iss
->syscon
);
1239 ret
= iss_map_mem_resource(pdev
, iss
, OMAP4_ISS_MEM_TOP
);
1243 ret
= iss_get_clocks(iss
);
1247 if (!omap4iss_get(iss
))
1250 ret
= iss_reset(iss
);
1254 iss
->revision
= iss_reg_read(iss
, OMAP4_ISS_MEM_TOP
, ISS_HL_REVISION
);
1255 dev_info(iss
->dev
, "Revision %08x found\n", iss
->revision
);
1257 for (i
= 1; i
< OMAP4_ISS_MEM_LAST
; i
++) {
1258 ret
= iss_map_mem_resource(pdev
, iss
, i
);
1263 /* Configure BTE BW_LIMITER field to max recommended value (1 GB) */
1264 iss_reg_update(iss
, OMAP4_ISS_MEM_BTE
, BTE_CTRL
,
1265 BTE_CTRL_BW_LIMITER_MASK
,
1266 18 << BTE_CTRL_BW_LIMITER_SHIFT
);
1268 /* Perform ISP reset */
1269 ret
= omap4iss_subclk_enable(iss
, OMAP4_ISS_SUBCLK_ISP
);
1273 ret
= iss_isp_reset(iss
);
1277 dev_info(iss
->dev
, "ISP Revision %08x found\n",
1278 iss_reg_read(iss
, OMAP4_ISS_MEM_ISP_SYS1
, ISP5_REVISION
));
1281 ret
= platform_get_irq(pdev
, 0);
1283 dev_err(iss
->dev
, "No IRQ resource\n");
1289 if (devm_request_irq(iss
->dev
, iss
->irq_num
, iss_isr
, IRQF_SHARED
,
1290 "OMAP4 ISS", iss
)) {
1291 dev_err(iss
->dev
, "Unable to request IRQ\n");
1297 ret
= iss_initialize_modules(iss
);
1301 ret
= iss_register_entities(iss
);
1305 ret
= media_entity_enum_init(&iss
->crashed
, &iss
->media_dev
);
1307 goto error_entities
;
1309 ret
= iss_create_links(iss
);
1311 goto error_entities
;
1318 iss_unregister_entities(iss
);
1319 media_entity_enum_cleanup(&iss
->crashed
);
1321 iss_cleanup_modules(iss
);
1325 mutex_destroy(&iss
->iss_mutex
);
1330 static int iss_remove(struct platform_device
*pdev
)
1332 struct iss_device
*iss
= platform_get_drvdata(pdev
);
1334 iss_unregister_entities(iss
);
1335 media_entity_enum_cleanup(&iss
->crashed
);
1336 iss_cleanup_modules(iss
);
1341 static const struct platform_device_id omap4iss_id_table
[] = {
1345 MODULE_DEVICE_TABLE(platform
, omap4iss_id_table
);
1347 static struct platform_driver iss_driver
= {
1349 .remove
= iss_remove
,
1350 .id_table
= omap4iss_id_table
,
1356 module_platform_driver(iss_driver
);
1358 MODULE_DESCRIPTION("TI OMAP4 ISS driver");
1359 MODULE_AUTHOR("Sergio Aguirre <sergio.a.aguirre@gmail.com>");
1360 MODULE_LICENSE("GPL");
1361 MODULE_VERSION(ISS_VIDEO_DRIVER_VERSION
);