1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/workqueue.h>
27 #include <linux/kernel.h>
34 void do_remaining_work(struct rtsx_chip
*chip
)
36 struct sd_info
*sd_card
= &(chip
->sd_card
);
38 struct xd_info
*xd_card
= &(chip
->xd_card
);
40 struct ms_info
*ms_card
= &(chip
->ms_card
);
42 if (chip
->card_ready
& SD_CARD
) {
43 if (sd_card
->seq_mode
) {
44 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
45 sd_card
->cleanup_counter
++;
47 sd_card
->cleanup_counter
= 0;
52 if (chip
->card_ready
& XD_CARD
) {
53 if (xd_card
->delay_write
.delay_write_flag
) {
54 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
55 xd_card
->cleanup_counter
++;
57 xd_card
->cleanup_counter
= 0;
62 if (chip
->card_ready
& MS_CARD
) {
63 if (CHK_MSPRO(ms_card
)) {
64 if (ms_card
->seq_mode
) {
65 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
66 ms_card
->cleanup_counter
++;
68 ms_card
->cleanup_counter
= 0;
72 if (ms_card
->delay_write
.delay_write_flag
) {
73 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
74 ms_card
->cleanup_counter
++;
76 ms_card
->cleanup_counter
= 0;
82 if (sd_card
->cleanup_counter
> POLLING_WAIT_CNT
)
83 sd_cleanup_work(chip
);
85 if (xd_card
->cleanup_counter
> POLLING_WAIT_CNT
)
86 xd_cleanup_work(chip
);
88 if (ms_card
->cleanup_counter
> POLLING_WAIT_CNT
)
89 ms_cleanup_work(chip
);
92 void try_to_switch_sdio_ctrl(struct rtsx_chip
*chip
)
94 u8 reg1
= 0, reg2
= 0;
96 rtsx_read_register(chip
, 0xFF34, ®1
);
97 rtsx_read_register(chip
, 0xFF38, ®2
);
98 dev_dbg(rtsx_dev(chip
), "reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n",
100 if ((reg1
& 0xC0) && (reg2
& 0xC0)) {
102 rtsx_write_register(chip
, SDIO_CTRL
, 0xFF,
103 SDIO_BUS_CTRL
| SDIO_CD_CTRL
);
104 rtsx_write_register(chip
, PWR_GATE_CTRL
,
105 LDO3318_PWR_MASK
, LDO_ON
);
109 #ifdef SUPPORT_SDIO_ASPM
110 void dynamic_configure_sdio_aspm(struct rtsx_chip
*chip
)
115 for (i
= 0; i
< 12; i
++)
116 rtsx_read_register(chip
, 0xFF08 + i
, &buf
[i
]);
117 rtsx_read_register(chip
, 0xFF25, ®
);
118 if ((memcmp(buf
, chip
->sdio_raw_data
, 12) != 0) || (reg
& 0x03)) {
119 chip
->sdio_counter
= 0;
122 if (!chip
->sdio_idle
) {
123 chip
->sdio_counter
++;
124 if (chip
->sdio_counter
>= SDIO_IDLE_COUNT
) {
125 chip
->sdio_counter
= 0;
130 memcpy(chip
->sdio_raw_data
, buf
, 12);
132 if (chip
->sdio_idle
) {
133 if (!chip
->sdio_aspm
) {
134 dev_dbg(rtsx_dev(chip
), "SDIO enter ASPM!\n");
135 rtsx_write_register(chip
, ASPM_FORCE_CTL
, 0xFC,
136 0x30 | (chip
->aspm_level
[1] << 2));
140 if (chip
->sdio_aspm
) {
141 dev_dbg(rtsx_dev(chip
), "SDIO exit ASPM!\n");
142 rtsx_write_register(chip
, ASPM_FORCE_CTL
, 0xFC, 0x30);
149 void do_reset_sd_card(struct rtsx_chip
*chip
)
153 dev_dbg(rtsx_dev(chip
), "%s: %d, card2lun = 0x%x\n", __func__
,
154 chip
->sd_reset_counter
, chip
->card2lun
[SD_CARD
]);
156 if (chip
->card2lun
[SD_CARD
] >= MAX_ALLOWED_LUN_CNT
) {
157 clear_bit(SD_NR
, &(chip
->need_reset
));
158 chip
->sd_reset_counter
= 0;
159 chip
->sd_show_cnt
= 0;
163 chip
->rw_fail_cnt
[chip
->card2lun
[SD_CARD
]] = 0;
165 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
166 rtsx_write_register(chip
, SDIO_CTRL
, 0xFF, 0);
168 retval
= reset_sd_card(chip
);
169 if (chip
->need_release
& SD_CARD
)
171 if (retval
== STATUS_SUCCESS
) {
172 clear_bit(SD_NR
, &(chip
->need_reset
));
173 chip
->sd_reset_counter
= 0;
174 chip
->sd_show_cnt
= 0;
175 chip
->card_ready
|= SD_CARD
;
176 chip
->card_fail
&= ~SD_CARD
;
177 chip
->rw_card
[chip
->card2lun
[SD_CARD
]] = sd_rw
;
179 if (chip
->sd_io
|| (chip
->sd_reset_counter
>= MAX_RESET_CNT
)) {
180 clear_bit(SD_NR
, &(chip
->need_reset
));
181 chip
->sd_reset_counter
= 0;
182 chip
->sd_show_cnt
= 0;
184 chip
->sd_reset_counter
++;
186 chip
->card_ready
&= ~SD_CARD
;
187 chip
->card_fail
|= SD_CARD
;
188 chip
->capacity
[chip
->card2lun
[SD_CARD
]] = 0;
189 chip
->rw_card
[chip
->card2lun
[SD_CARD
]] = NULL
;
191 rtsx_write_register(chip
, CARD_OE
, SD_OUTPUT_EN
, 0);
192 if (!chip
->ft2_fast_mode
)
193 card_power_off(chip
, SD_CARD
);
196 try_to_switch_sdio_ctrl(chip
);
198 disable_card_clock(chip
, SD_CARD
);
203 void do_reset_xd_card(struct rtsx_chip
*chip
)
207 dev_dbg(rtsx_dev(chip
), "%s: %d, card2lun = 0x%x\n", __func__
,
208 chip
->xd_reset_counter
, chip
->card2lun
[XD_CARD
]);
210 if (chip
->card2lun
[XD_CARD
] >= MAX_ALLOWED_LUN_CNT
) {
211 clear_bit(XD_NR
, &(chip
->need_reset
));
212 chip
->xd_reset_counter
= 0;
213 chip
->xd_show_cnt
= 0;
217 chip
->rw_fail_cnt
[chip
->card2lun
[XD_CARD
]] = 0;
219 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
220 rtsx_write_register(chip
, SDIO_CTRL
, 0xFF, 0);
222 retval
= reset_xd_card(chip
);
223 if (chip
->need_release
& XD_CARD
)
225 if (retval
== STATUS_SUCCESS
) {
226 clear_bit(XD_NR
, &(chip
->need_reset
));
227 chip
->xd_reset_counter
= 0;
228 chip
->card_ready
|= XD_CARD
;
229 chip
->card_fail
&= ~XD_CARD
;
230 chip
->rw_card
[chip
->card2lun
[XD_CARD
]] = xd_rw
;
232 if (chip
->xd_reset_counter
>= MAX_RESET_CNT
) {
233 clear_bit(XD_NR
, &(chip
->need_reset
));
234 chip
->xd_reset_counter
= 0;
235 chip
->xd_show_cnt
= 0;
237 chip
->xd_reset_counter
++;
239 chip
->card_ready
&= ~XD_CARD
;
240 chip
->card_fail
|= XD_CARD
;
241 chip
->capacity
[chip
->card2lun
[XD_CARD
]] = 0;
242 chip
->rw_card
[chip
->card2lun
[XD_CARD
]] = NULL
;
244 rtsx_write_register(chip
, CARD_OE
, XD_OUTPUT_EN
, 0);
245 if (!chip
->ft2_fast_mode
)
246 card_power_off(chip
, XD_CARD
);
247 disable_card_clock(chip
, XD_CARD
);
251 void do_reset_ms_card(struct rtsx_chip
*chip
)
255 dev_dbg(rtsx_dev(chip
), "%s: %d, card2lun = 0x%x\n", __func__
,
256 chip
->ms_reset_counter
, chip
->card2lun
[MS_CARD
]);
258 if (chip
->card2lun
[MS_CARD
] >= MAX_ALLOWED_LUN_CNT
) {
259 clear_bit(MS_NR
, &(chip
->need_reset
));
260 chip
->ms_reset_counter
= 0;
261 chip
->ms_show_cnt
= 0;
265 chip
->rw_fail_cnt
[chip
->card2lun
[MS_CARD
]] = 0;
267 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
268 rtsx_write_register(chip
, SDIO_CTRL
, 0xFF, 0);
270 retval
= reset_ms_card(chip
);
271 if (chip
->need_release
& MS_CARD
)
273 if (retval
== STATUS_SUCCESS
) {
274 clear_bit(MS_NR
, &(chip
->need_reset
));
275 chip
->ms_reset_counter
= 0;
276 chip
->card_ready
|= MS_CARD
;
277 chip
->card_fail
&= ~MS_CARD
;
278 chip
->rw_card
[chip
->card2lun
[MS_CARD
]] = ms_rw
;
280 if (chip
->ms_reset_counter
>= MAX_RESET_CNT
) {
281 clear_bit(MS_NR
, &(chip
->need_reset
));
282 chip
->ms_reset_counter
= 0;
283 chip
->ms_show_cnt
= 0;
285 chip
->ms_reset_counter
++;
287 chip
->card_ready
&= ~MS_CARD
;
288 chip
->card_fail
|= MS_CARD
;
289 chip
->capacity
[chip
->card2lun
[MS_CARD
]] = 0;
290 chip
->rw_card
[chip
->card2lun
[MS_CARD
]] = NULL
;
292 rtsx_write_register(chip
, CARD_OE
, MS_OUTPUT_EN
, 0);
293 if (!chip
->ft2_fast_mode
)
294 card_power_off(chip
, MS_CARD
);
295 disable_card_clock(chip
, MS_CARD
);
299 static void release_sdio(struct rtsx_chip
*chip
)
302 rtsx_write_register(chip
, CARD_STOP
, SD_STOP
| SD_CLR_ERR
,
303 SD_STOP
| SD_CLR_ERR
);
305 if (chip
->chip_insert_with_sdio
) {
306 chip
->chip_insert_with_sdio
= 0;
308 if (CHECK_PID(chip
, 0x5288))
309 rtsx_write_register(chip
, 0xFE5A, 0x08, 0x00);
311 rtsx_write_register(chip
, 0xFE70, 0x80, 0x00);
314 rtsx_write_register(chip
, SDIO_CTRL
, SDIO_CD_CTRL
, 0);
319 void rtsx_power_off_card(struct rtsx_chip
*chip
)
321 if ((chip
->card_ready
& SD_CARD
) || chip
->sd_io
) {
322 sd_cleanup_work(chip
);
323 sd_power_off_card3v3(chip
);
326 if (chip
->card_ready
& XD_CARD
) {
327 xd_cleanup_work(chip
);
328 xd_power_off_card3v3(chip
);
331 if (chip
->card_ready
& MS_CARD
) {
332 ms_cleanup_work(chip
);
333 ms_power_off_card3v3(chip
);
337 void rtsx_release_cards(struct rtsx_chip
*chip
)
339 chip
->int_reg
= rtsx_readl(chip
, RTSX_BIPR
);
341 if ((chip
->card_ready
& SD_CARD
) || chip
->sd_io
) {
342 if (chip
->int_reg
& SD_EXIST
)
343 sd_cleanup_work(chip
);
344 release_sd_card(chip
);
347 if (chip
->card_ready
& XD_CARD
) {
348 if (chip
->int_reg
& XD_EXIST
)
349 xd_cleanup_work(chip
);
350 release_xd_card(chip
);
353 if (chip
->card_ready
& MS_CARD
) {
354 if (chip
->int_reg
& MS_EXIST
)
355 ms_cleanup_work(chip
);
356 release_ms_card(chip
);
360 void rtsx_reset_cards(struct rtsx_chip
*chip
)
362 if (!chip
->need_reset
)
365 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
367 rtsx_force_power_on(chip
, SSC_PDCTL
| OC_PDCTL
);
369 rtsx_disable_aspm(chip
);
371 if ((chip
->need_reset
& SD_CARD
) && chip
->chip_insert_with_sdio
)
372 clear_bit(SD_NR
, &(chip
->need_reset
));
374 if (chip
->need_reset
& XD_CARD
) {
375 chip
->card_exist
|= XD_CARD
;
377 if (chip
->xd_show_cnt
>= MAX_SHOW_CNT
)
378 do_reset_xd_card(chip
);
382 if (CHECK_PID(chip
, 0x5288) && CHECK_BARO_PKG(chip
, QFN
)) {
383 if (chip
->card_exist
& XD_CARD
) {
384 clear_bit(SD_NR
, &(chip
->need_reset
));
385 clear_bit(MS_NR
, &(chip
->need_reset
));
388 if (chip
->need_reset
& SD_CARD
) {
389 chip
->card_exist
|= SD_CARD
;
391 if (chip
->sd_show_cnt
>= MAX_SHOW_CNT
) {
392 rtsx_write_register(chip
, RBCTL
, RB_FLUSH
, RB_FLUSH
);
393 do_reset_sd_card(chip
);
398 if (chip
->need_reset
& MS_CARD
) {
399 chip
->card_exist
|= MS_CARD
;
401 if (chip
->ms_show_cnt
>= MAX_SHOW_CNT
)
402 do_reset_ms_card(chip
);
408 void rtsx_reinit_cards(struct rtsx_chip
*chip
, int reset_chip
)
410 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
412 rtsx_force_power_on(chip
, SSC_PDCTL
| OC_PDCTL
);
415 rtsx_reset_chip(chip
);
417 chip
->int_reg
= rtsx_readl(chip
, RTSX_BIPR
);
419 if ((chip
->int_reg
& SD_EXIST
) && (chip
->need_reinit
& SD_CARD
)) {
421 release_sd_card(chip
);
425 chip
->card_exist
|= SD_CARD
;
426 do_reset_sd_card(chip
);
429 if ((chip
->int_reg
& XD_EXIST
) && (chip
->need_reinit
& XD_CARD
)) {
430 release_xd_card(chip
);
434 chip
->card_exist
|= XD_CARD
;
435 do_reset_xd_card(chip
);
438 if ((chip
->int_reg
& MS_EXIST
) && (chip
->need_reinit
& MS_CARD
)) {
439 release_ms_card(chip
);
443 chip
->card_exist
|= MS_CARD
;
444 do_reset_ms_card(chip
);
447 chip
->need_reinit
= 0;
450 #ifdef DISABLE_CARD_INT
451 void card_cd_debounce(struct rtsx_chip
*chip
, unsigned long *need_reset
,
452 unsigned long *need_release
)
454 u8 release_map
= 0, reset_map
= 0;
456 chip
->int_reg
= rtsx_readl(chip
, RTSX_BIPR
);
458 if (chip
->card_exist
) {
459 if (chip
->card_exist
& XD_CARD
) {
460 if (!(chip
->int_reg
& XD_EXIST
))
461 release_map
|= XD_CARD
;
462 } else if (chip
->card_exist
& SD_CARD
) {
463 if (!(chip
->int_reg
& SD_EXIST
))
464 release_map
|= SD_CARD
;
465 } else if (chip
->card_exist
& MS_CARD
) {
466 if (!(chip
->int_reg
& MS_EXIST
))
467 release_map
|= MS_CARD
;
470 if (chip
->int_reg
& XD_EXIST
)
471 reset_map
|= XD_CARD
;
472 else if (chip
->int_reg
& SD_EXIST
)
473 reset_map
|= SD_CARD
;
474 else if (chip
->int_reg
& MS_EXIST
)
475 reset_map
|= MS_CARD
;
479 int xd_cnt
= 0, sd_cnt
= 0, ms_cnt
= 0;
482 for (i
= 0; i
< (DEBOUNCE_CNT
); i
++) {
483 chip
->int_reg
= rtsx_readl(chip
, RTSX_BIPR
);
485 if (chip
->int_reg
& XD_EXIST
)
490 if (chip
->int_reg
& SD_EXIST
)
495 if (chip
->int_reg
& MS_EXIST
)
504 if (!(chip
->card_exist
& XD_CARD
) &&
505 (xd_cnt
> (DEBOUNCE_CNT
-1)))
506 reset_map
|= XD_CARD
;
507 if (!(chip
->card_exist
& SD_CARD
) &&
508 (sd_cnt
> (DEBOUNCE_CNT
-1)))
509 reset_map
|= SD_CARD
;
510 if (!(chip
->card_exist
& MS_CARD
) &&
511 (ms_cnt
> (DEBOUNCE_CNT
-1)))
512 reset_map
|= MS_CARD
;
515 if (CHECK_PID(chip
, 0x5288) && CHECK_BARO_PKG(chip
, QFN
))
516 rtsx_write_register(chip
, HOST_SLEEP_STATE
, 0xC0, 0x00);
519 *need_reset
= reset_map
;
521 *need_release
= release_map
;
525 void rtsx_init_cards(struct rtsx_chip
*chip
)
527 if (RTSX_TST_DELINK(chip
) && (rtsx_get_stat(chip
) != RTSX_STAT_SS
)) {
528 dev_dbg(rtsx_dev(chip
), "Reset chip in polling thread!\n");
529 rtsx_reset_chip(chip
);
530 RTSX_CLR_DELINK(chip
);
533 #ifdef DISABLE_CARD_INT
534 card_cd_debounce(chip
, &(chip
->need_reset
), &(chip
->need_release
));
537 if (chip
->need_release
) {
538 if (CHECK_PID(chip
, 0x5288) && CHECK_BARO_PKG(chip
, QFN
)) {
539 if (chip
->int_reg
& XD_EXIST
) {
540 clear_bit(SD_NR
, &(chip
->need_release
));
541 clear_bit(MS_NR
, &(chip
->need_release
));
545 if (!(chip
->card_exist
& SD_CARD
) && !chip
->sd_io
)
546 clear_bit(SD_NR
, &(chip
->need_release
));
547 if (!(chip
->card_exist
& XD_CARD
))
548 clear_bit(XD_NR
, &(chip
->need_release
));
549 if (!(chip
->card_exist
& MS_CARD
))
550 clear_bit(MS_NR
, &(chip
->need_release
));
552 dev_dbg(rtsx_dev(chip
), "chip->need_release = 0x%x\n",
553 (unsigned int)(chip
->need_release
));
556 if (chip
->need_release
) {
557 if (chip
->ocp_stat
& (CARD_OC_NOW
| CARD_OC_EVER
))
558 rtsx_write_register(chip
, OCPCLR
,
559 CARD_OC_INT_CLR
| CARD_OC_CLR
,
560 CARD_OC_INT_CLR
| CARD_OC_CLR
);
564 if (chip
->need_release
) {
565 rtsx_set_stat(chip
, RTSX_STAT_RUN
);
566 rtsx_force_power_on(chip
, SSC_PDCTL
| OC_PDCTL
);
569 if (chip
->need_release
& SD_CARD
) {
570 clear_bit(SD_NR
, &(chip
->need_release
));
571 chip
->card_exist
&= ~SD_CARD
;
572 chip
->card_ejected
&= ~SD_CARD
;
573 chip
->card_fail
&= ~SD_CARD
;
574 CLR_BIT(chip
->lun_mc
, chip
->card2lun
[SD_CARD
]);
575 chip
->rw_fail_cnt
[chip
->card2lun
[SD_CARD
]] = 0;
576 rtsx_write_register(chip
, RBCTL
, RB_FLUSH
, RB_FLUSH
);
579 release_sd_card(chip
);
582 if (chip
->need_release
& XD_CARD
) {
583 clear_bit(XD_NR
, &(chip
->need_release
));
584 chip
->card_exist
&= ~XD_CARD
;
585 chip
->card_ejected
&= ~XD_CARD
;
586 chip
->card_fail
&= ~XD_CARD
;
587 CLR_BIT(chip
->lun_mc
, chip
->card2lun
[XD_CARD
]);
588 chip
->rw_fail_cnt
[chip
->card2lun
[XD_CARD
]] = 0;
590 release_xd_card(chip
);
592 if (CHECK_PID(chip
, 0x5288) &&
593 CHECK_BARO_PKG(chip
, QFN
))
594 rtsx_write_register(chip
, HOST_SLEEP_STATE
,
598 if (chip
->need_release
& MS_CARD
) {
599 clear_bit(MS_NR
, &(chip
->need_release
));
600 chip
->card_exist
&= ~MS_CARD
;
601 chip
->card_ejected
&= ~MS_CARD
;
602 chip
->card_fail
&= ~MS_CARD
;
603 CLR_BIT(chip
->lun_mc
, chip
->card2lun
[MS_CARD
]);
604 chip
->rw_fail_cnt
[chip
->card2lun
[MS_CARD
]] = 0;
606 release_ms_card(chip
);
609 dev_dbg(rtsx_dev(chip
), "chip->card_exist = 0x%x\n",
612 if (!chip
->card_exist
)
613 turn_off_led(chip
, LED_GPIO
);
616 if (chip
->need_reset
) {
617 dev_dbg(rtsx_dev(chip
), "chip->need_reset = 0x%x\n",
618 (unsigned int)(chip
->need_reset
));
620 rtsx_reset_cards(chip
);
623 if (chip
->need_reinit
) {
624 dev_dbg(rtsx_dev(chip
), "chip->need_reinit = 0x%x\n",
625 (unsigned int)(chip
->need_reinit
));
627 rtsx_reinit_cards(chip
, 0);
631 int switch_ssc_clock(struct rtsx_chip
*chip
, int clk
)
634 u8 N
= (u8
)(clk
- 2), min_N
, max_N
;
635 u8 mcu_cnt
, div
, max_div
, ssc_depth
, ssc_depth_mask
;
636 int sd_vpclk_phase_reset
= 0;
638 if (chip
->cur_clk
== clk
)
639 return STATUS_SUCCESS
;
645 dev_dbg(rtsx_dev(chip
), "Switch SSC clock to %dMHz (cur_clk = %d)\n",
648 if ((clk
<= 2) || (N
> max_N
)) {
653 mcu_cnt
= (u8
)(125/clk
+ 3);
658 while ((N
< min_N
) && (div
< max_div
)) {
662 dev_dbg(rtsx_dev(chip
), "N = %d, div = %d\n", N
, div
);
671 ssc_depth_mask
= 0x03;
673 dev_dbg(rtsx_dev(chip
), "ssc_depth = %d\n", ssc_depth
);
676 rtsx_add_cmd(chip
, WRITE_REG_CMD
, CLK_CTL
, CLK_LOW_FREQ
, CLK_LOW_FREQ
);
677 rtsx_add_cmd(chip
, WRITE_REG_CMD
, CLK_DIV
, 0xFF, (div
<< 4) | mcu_cnt
);
678 rtsx_add_cmd(chip
, WRITE_REG_CMD
, SSC_CTL1
, SSC_RSTB
, 0);
679 rtsx_add_cmd(chip
, WRITE_REG_CMD
, SSC_CTL2
, ssc_depth_mask
, ssc_depth
);
680 rtsx_add_cmd(chip
, WRITE_REG_CMD
, SSC_DIV_N_0
, 0xFF, N
);
681 rtsx_add_cmd(chip
, WRITE_REG_CMD
, SSC_CTL1
, SSC_RSTB
, SSC_RSTB
);
682 if (sd_vpclk_phase_reset
) {
683 rtsx_add_cmd(chip
, WRITE_REG_CMD
, SD_VPCLK0_CTL
,
685 rtsx_add_cmd(chip
, WRITE_REG_CMD
, SD_VPCLK0_CTL
,
686 PHASE_NOT_RESET
, PHASE_NOT_RESET
);
689 retval
= rtsx_send_cmd(chip
, 0, WAIT_TIME
);
696 retval
= rtsx_write_register(chip
, CLK_CTL
, CLK_LOW_FREQ
, 0);
704 return STATUS_SUCCESS
;
707 int switch_normal_clock(struct rtsx_chip
*chip
, int clk
)
710 u8 sel
, div
, mcu_cnt
;
711 int sd_vpclk_phase_reset
= 0;
713 if (chip
->cur_clk
== clk
)
714 return STATUS_SUCCESS
;
718 dev_dbg(rtsx_dev(chip
), "Switch clock to 20MHz\n");
725 dev_dbg(rtsx_dev(chip
), "Switch clock to 30MHz\n");
732 dev_dbg(rtsx_dev(chip
), "Switch clock to 40MHz\n");
739 dev_dbg(rtsx_dev(chip
), "Switch clock to 50MHz\n");
746 dev_dbg(rtsx_dev(chip
), "Switch clock to 60MHz\n");
753 dev_dbg(rtsx_dev(chip
), "Switch clock to 80MHz\n");
760 dev_dbg(rtsx_dev(chip
), "Switch clock to 100MHz\n");
767 dev_dbg(rtsx_dev(chip
), "Switch clock to 120MHz\n");
774 dev_dbg(rtsx_dev(chip
), "Switch clock to 150MHz\n");
781 dev_dbg(rtsx_dev(chip
), "Switch clock to 200MHz\n");
788 dev_dbg(rtsx_dev(chip
), "Try to switch to an illegal clock (%d)\n",
794 retval
= rtsx_write_register(chip
, CLK_CTL
, 0xFF, CLK_LOW_FREQ
);
799 if (sd_vpclk_phase_reset
) {
800 retval
= rtsx_write_register(chip
, SD_VPCLK0_CTL
,
806 retval
= rtsx_write_register(chip
, SD_VPCLK1_CTL
,
813 retval
= rtsx_write_register(chip
, CLK_DIV
, 0xFF,
814 (div
<< 4) | mcu_cnt
);
819 retval
= rtsx_write_register(chip
, CLK_SEL
, 0xFF, sel
);
825 if (sd_vpclk_phase_reset
) {
827 retval
= rtsx_write_register(chip
, SD_VPCLK0_CTL
,
828 PHASE_NOT_RESET
, PHASE_NOT_RESET
);
833 retval
= rtsx_write_register(chip
, SD_VPCLK1_CTL
,
834 PHASE_NOT_RESET
, PHASE_NOT_RESET
);
841 retval
= rtsx_write_register(chip
, CLK_CTL
, 0xFF, 0);
849 return STATUS_SUCCESS
;
852 void trans_dma_enable(enum dma_data_direction dir
, struct rtsx_chip
*chip
,
853 u32 byte_cnt
, u8 pack_size
)
855 if (pack_size
> DMA_1024
)
858 rtsx_add_cmd(chip
, WRITE_REG_CMD
, IRQSTAT0
, DMA_DONE_INT
, DMA_DONE_INT
);
860 rtsx_add_cmd(chip
, WRITE_REG_CMD
, DMATC3
, 0xFF, (u8
)(byte_cnt
>> 24));
861 rtsx_add_cmd(chip
, WRITE_REG_CMD
, DMATC2
, 0xFF, (u8
)(byte_cnt
>> 16));
862 rtsx_add_cmd(chip
, WRITE_REG_CMD
, DMATC1
, 0xFF, (u8
)(byte_cnt
>> 8));
863 rtsx_add_cmd(chip
, WRITE_REG_CMD
, DMATC0
, 0xFF, (u8
)byte_cnt
);
865 if (dir
== DMA_FROM_DEVICE
) {
866 rtsx_add_cmd(chip
, WRITE_REG_CMD
, DMACTL
,
867 0x03 | DMA_PACK_SIZE_MASK
,
868 DMA_DIR_FROM_CARD
| DMA_EN
| pack_size
);
870 rtsx_add_cmd(chip
, WRITE_REG_CMD
, DMACTL
,
871 0x03 | DMA_PACK_SIZE_MASK
,
872 DMA_DIR_TO_CARD
| DMA_EN
| pack_size
);
875 rtsx_add_cmd(chip
, WRITE_REG_CMD
, CARD_DATA_SOURCE
, 0x01, RING_BUFFER
);
878 int enable_card_clock(struct rtsx_chip
*chip
, u8 card
)
890 retval
= rtsx_write_register(chip
, CARD_CLK_EN
, clk_en
, clk_en
);
896 return STATUS_SUCCESS
;
899 int disable_card_clock(struct rtsx_chip
*chip
, u8 card
)
911 retval
= rtsx_write_register(chip
, CARD_CLK_EN
, clk_en
, 0);
917 return STATUS_SUCCESS
;
920 int card_power_on(struct rtsx_chip
*chip
, u8 card
)
925 if (CHECK_LUN_MODE(chip
, SD_MS_2LUN
) && (card
== MS_CARD
)) {
926 mask
= MS_POWER_MASK
;
927 val1
= MS_PARTIAL_POWER_ON
;
930 mask
= SD_POWER_MASK
;
931 val1
= SD_PARTIAL_POWER_ON
;
936 rtsx_add_cmd(chip
, WRITE_REG_CMD
, CARD_PWR_CTL
, mask
, val1
);
938 retval
= rtsx_send_cmd(chip
, 0, 100);
939 if (retval
!= STATUS_SUCCESS
) {
944 udelay(chip
->pmos_pwr_on_interval
);
947 rtsx_add_cmd(chip
, WRITE_REG_CMD
, CARD_PWR_CTL
, mask
, val2
);
949 retval
= rtsx_send_cmd(chip
, 0, 100);
950 if (retval
!= STATUS_SUCCESS
) {
955 return STATUS_SUCCESS
;
958 int card_power_off(struct rtsx_chip
*chip
, u8 card
)
963 if (CHECK_LUN_MODE(chip
, SD_MS_2LUN
) && (card
== MS_CARD
)) {
964 mask
= MS_POWER_MASK
;
967 mask
= SD_POWER_MASK
;
971 retval
= rtsx_write_register(chip
, CARD_PWR_CTL
, mask
, val
);
977 return STATUS_SUCCESS
;
980 int card_rw(struct scsi_cmnd
*srb
, struct rtsx_chip
*chip
,
981 u32 sec_addr
, u16 sec_cnt
)
984 unsigned int lun
= SCSI_LUN(srb
);
987 if (chip
->rw_card
[lun
] == NULL
) {
992 for (i
= 0; i
< 3; i
++) {
993 chip
->rw_need_retry
= 0;
995 retval
= chip
->rw_card
[lun
](srb
, chip
, sec_addr
, sec_cnt
);
996 if (retval
!= STATUS_SUCCESS
) {
997 if (rtsx_check_chip_exist(chip
) != STATUS_SUCCESS
) {
998 rtsx_release_chip(chip
);
1002 if (detect_card_cd(chip
, chip
->cur_card
) !=
1008 if (!chip
->rw_need_retry
) {
1009 dev_dbg(rtsx_dev(chip
), "RW fail, but no need to retry\n");
1013 chip
->rw_need_retry
= 0;
1017 dev_dbg(rtsx_dev(chip
), "Retry RW, (i = %d)\n", i
);
1023 int card_share_mode(struct rtsx_chip
*chip
, int card
)
1028 if (CHECK_PID(chip
, 0x5208)) {
1029 mask
= CARD_SHARE_MASK
;
1030 if (card
== SD_CARD
)
1031 value
= CARD_SHARE_48_SD
;
1032 else if (card
== MS_CARD
)
1033 value
= CARD_SHARE_48_MS
;
1034 else if (card
== XD_CARD
)
1035 value
= CARD_SHARE_48_XD
;
1041 } else if (CHECK_PID(chip
, 0x5288)) {
1043 if (card
== SD_CARD
)
1044 value
= CARD_SHARE_BAROSSA_SD
;
1045 else if (card
== MS_CARD
)
1046 value
= CARD_SHARE_BAROSSA_MS
;
1047 else if (card
== XD_CARD
)
1048 value
= CARD_SHARE_BAROSSA_XD
;
1059 retval
= rtsx_write_register(chip
, CARD_SHARE_MODE
, mask
, value
);
1065 return STATUS_SUCCESS
;
1069 int select_card(struct rtsx_chip
*chip
, int card
)
1073 if (chip
->cur_card
!= card
) {
1076 if (card
== SD_CARD
)
1078 else if (card
== MS_CARD
)
1080 else if (card
== XD_CARD
)
1082 else if (card
== SPI_CARD
)
1089 retval
= rtsx_write_register(chip
, CARD_SELECT
, 0x07, mod
);
1094 chip
->cur_card
= card
;
1096 retval
= card_share_mode(chip
, card
);
1097 if (retval
!= STATUS_SUCCESS
) {
1103 return STATUS_SUCCESS
;
1106 void toggle_gpio(struct rtsx_chip
*chip
, u8 gpio
)
1110 rtsx_read_register(chip
, CARD_GPIO
, &temp_reg
);
1111 temp_reg
^= (0x01 << gpio
);
1112 rtsx_write_register(chip
, CARD_GPIO
, 0xFF, temp_reg
);
1115 void turn_on_led(struct rtsx_chip
*chip
, u8 gpio
)
1117 if (CHECK_PID(chip
, 0x5288))
1118 rtsx_write_register(chip
, CARD_GPIO
, (u8
)(1 << gpio
),
1121 rtsx_write_register(chip
, CARD_GPIO
, (u8
)(1 << gpio
), 0);
1124 void turn_off_led(struct rtsx_chip
*chip
, u8 gpio
)
1126 if (CHECK_PID(chip
, 0x5288))
1127 rtsx_write_register(chip
, CARD_GPIO
, (u8
)(1 << gpio
), 0);
1129 rtsx_write_register(chip
, CARD_GPIO
, (u8
)(1 << gpio
),
1133 int detect_card_cd(struct rtsx_chip
*chip
, int card
)
1135 u32 card_cd
, status
;
1137 if (card
== SD_CARD
) {
1139 } else if (card
== MS_CARD
) {
1141 } else if (card
== XD_CARD
) {
1144 dev_dbg(rtsx_dev(chip
), "Wrong card type: 0x%x\n", card
);
1149 status
= rtsx_readl(chip
, RTSX_BIPR
);
1150 if (!(status
& card_cd
)) {
1155 return STATUS_SUCCESS
;
1158 int check_card_exist(struct rtsx_chip
*chip
, unsigned int lun
)
1160 if (chip
->card_exist
& chip
->lun2card
[lun
])
1166 int check_card_ready(struct rtsx_chip
*chip
, unsigned int lun
)
1168 if (chip
->card_ready
& chip
->lun2card
[lun
])
1174 int check_card_wp(struct rtsx_chip
*chip
, unsigned int lun
)
1176 if (chip
->card_wp
& chip
->lun2card
[lun
])
1182 u8
get_lun_card(struct rtsx_chip
*chip
, unsigned int lun
)
1184 if ((chip
->card_ready
& chip
->lun2card
[lun
]) == XD_CARD
)
1186 else if ((chip
->card_ready
& chip
->lun2card
[lun
]) == SD_CARD
)
1188 else if ((chip
->card_ready
& chip
->lun2card
[lun
]) == MS_CARD
)
1194 void eject_card(struct rtsx_chip
*chip
, unsigned int lun
)
1196 do_remaining_work(chip
);
1198 if ((chip
->card_ready
& chip
->lun2card
[lun
]) == SD_CARD
) {
1199 release_sd_card(chip
);
1200 chip
->card_ejected
|= SD_CARD
;
1201 chip
->card_ready
&= ~SD_CARD
;
1202 chip
->capacity
[lun
] = 0;
1203 } else if ((chip
->card_ready
& chip
->lun2card
[lun
]) == XD_CARD
) {
1204 release_xd_card(chip
);
1205 chip
->card_ejected
|= XD_CARD
;
1206 chip
->card_ready
&= ~XD_CARD
;
1207 chip
->capacity
[lun
] = 0;
1208 } else if ((chip
->card_ready
& chip
->lun2card
[lun
]) == MS_CARD
) {
1209 release_ms_card(chip
);
1210 chip
->card_ejected
|= MS_CARD
;
1211 chip
->card_ready
&= ~MS_CARD
;
1212 chip
->capacity
[lun
] = 0;
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