drivers/staging/slicoss/slic.h

   1 /**************************************************************************
   2  *
   3  * Copyright (c) 2000-2002 Alacritech, Inc.  All rights reserved.
   4  *
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above
  13  *    copyright notice, this list of conditions and the following
  14  *    disclaimer in the documentation and/or other materials provided
  15  *    with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
  18  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  20  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ALACRITECH, INC. OR
  21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  24  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  25  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  27  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * The views and conclusions contained in the software and documentation
  31  * are those of the authors and should not be interpreted as representing
  32  * official policies, either expressed or implied, of Alacritech, Inc.
  33  *
  34  **************************************************************************/
  35
  36 /*
  37  * FILENAME: slic.h
  38  *
  39  * This is the base set of header definitions for the SLICOSS driver.
  40  */
  41 #ifndef __SLIC_DRIVER_H__
  42 #define __SLIC_DRIVER_H__
  43
  44 /* firmware stuff */
  45 #define OASIS_UCODE_VERS_STRING "1.2"
  46 #define OASIS_UCODE_VERS_DATE   "2006/03/27 15:10:37"
  47 #define OASIS_UCODE_HOSTIF_ID   3
  48
  49 #define MOJAVE_UCODE_VERS_STRING        "1.2"
  50 #define MOJAVE_UCODE_VERS_DATE          "2006/03/27 15:12:22"
  51 #define MOJAVE_UCODE_HOSTIF_ID          3
  52
  53 #define GB_RCVUCODE_VERS_STRING "1.2"
  54 #define GB_RCVUCODE_VERS_DATE   "2006/03/27 15:12:15"
  55 static u32 OasisRcvUCodeLen = 512;
  56 static u32 GBRcvUCodeLen = 512;
  57 #define SECTION_SIZE 65536
  58
  59 #define SLIC_RSPQ_PAGES_GB        10
  60 #define SLIC_RSPQ_BUFSINPAGE      (PAGE_SIZE / SLIC_RSPBUF_SIZE)
  61
  62 struct slic_rspqueue {
  63         u32             offset;
  64         u32             pageindex;
  65         u32             num_pages;
  66         struct slic_rspbuf *rspbuf;
  67         u32 *vaddr[SLIC_RSPQ_PAGES_GB];
  68         dma_addr_t          paddr[SLIC_RSPQ_PAGES_GB];
  69 };
  70
  71 #define SLIC_RCVQ_EXPANSION         1
  72 #define SLIC_RCVQ_ENTRIES           (256 * SLIC_RCVQ_EXPANSION)
  73 #define SLIC_RCVQ_MINENTRIES        (SLIC_RCVQ_ENTRIES / 2)
  74 #define SLIC_RCVQ_MAX_PROCESS_ISR   ((SLIC_RCVQ_ENTRIES * 4))
  75 #define SLIC_RCVQ_RCVBUFSIZE        2048
  76 #define SLIC_RCVQ_FILLENTRIES       (16 * SLIC_RCVQ_EXPANSION)
  77 #define SLIC_RCVQ_FILLTHRESH        (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES)
  78
  79 struct slic_rcvqueue {
  80         struct sk_buff    *head;
  81         struct sk_buff    *tail;
  82         u32            count;
  83         u32            size;
  84         u32            errors;
  85 };
  86
  87 struct slic_rcvbuf_info {
  88         u32     id;
  89         u32     starttime;
  90         u32     stoptime;
  91         u32     slicworld;
  92         u32     lasttime;
  93         u32     lastid;
  94 };
  95 /*
  96  * SLIC Handle structure.  Used to restrict handle values to
  97  * 32 bits by using an index rather than an address.
  98  * Simplifies ucode in 64-bit systems
  99  */
 100 struct slic_handle_word {
 101         union {
 102                 struct {
 103                         ushort      index;
 104                         ushort      bottombits; /* to denote num bufs to card */
 105                 }  parts;
 106                 u32         whole;
 107         }  handle;
 108 };
 109
 110 struct slic_handle {
 111         struct slic_handle_word  token;  /* token passed between host and card*/
 112         ushort                      type;
 113         void *address;    /* actual address of the object*/
 114         ushort                      offset;
 115         struct slic_handle       *other_handle;
 116         struct slic_handle       *next;
 117 };
 118
 119 #define SLIC_HANDLE_FREE        0x0000
 120 #define SLIC_HANDLE_DATA        0x0001
 121 #define SLIC_HANDLE_CMD         0x0002
 122 #define SLIC_HANDLE_CONTEXT     0x0003
 123 #define SLIC_HANDLE_TEAM        0x0004
 124
 125 #define handle_index        handle.parts.index
 126 #define handle_bottom       handle.parts.bottombits
 127 #define handle_token        handle.whole
 128
 129 #define SLIC_HOSTCMD_SIZE    512
 130
 131 struct slic_hostcmd {
 132         struct slic_host64_cmd  cmd64;
 133         u32                    type;
 134         struct sk_buff            *skb;
 135         u32                    paddrl;
 136         u32                    paddrh;
 137         u32                    busy;
 138         u32                    cmdsize;
 139         ushort                     numbufs;
 140         struct slic_handle    *pslic_handle;/* handle associated with command */
 141         struct slic_hostcmd    *next;
 142         struct slic_hostcmd    *next_all;
 143 };
 144
 145 #define SLIC_CMDQ_CMDSINPAGE    (PAGE_SIZE / SLIC_HOSTCMD_SIZE)
 146 #define SLIC_CMD_DUMB            3
 147 #define SLIC_CMDQ_INITCMDS       256
 148 #define SLIC_CMDQ_MAXCMDS        256
 149 #define SLIC_CMDQ_MAXOUTSTAND    SLIC_CMDQ_MAXCMDS
 150 #define SLIC_CMDQ_MAXPAGES       (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE)
 151 #define SLIC_CMDQ_INITPAGES      (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE)
 152
 153 struct slic_cmdqmem {
 154         int pagecnt;
 155         u32 *pages[SLIC_CMDQ_MAXPAGES];
 156         dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES];
 157 };
 158
 159 struct slic_cmdqueue {
 160         struct slic_hostcmd *head;
 161         struct slic_hostcmd *tail;
 162         int count;
 163         spinlock_t lock;
 164 };
 165
 166 #define SLIC_MAX_CARDS              32
 167 #define SLIC_MAX_PORTS              4        /* Max # of ports per card   */
 168
 169 struct mcast_address {
 170         unsigned char address[6];
 171         struct mcast_address *next;
 172 };
 173
 174 #define CARD_DOWN        0x00000000
 175 #define CARD_UP          0x00000001
 176 #define CARD_FAIL        0x00000002
 177 #define CARD_DIAG        0x00000003
 178 #define CARD_SLEEP       0x00000004
 179
 180 #define ADAPT_DOWN             0x00
 181 #define ADAPT_UP               0x01
 182 #define ADAPT_FAIL             0x02
 183 #define ADAPT_RESET            0x03
 184 #define ADAPT_SLEEP            0x04
 185
 186 #define ADAPT_FLAGS_BOOTTIME            0x0001
 187 #define ADAPT_FLAGS_IS64BIT             0x0002
 188 #define ADAPT_FLAGS_PENDINGLINKDOWN     0x0004
 189 #define ADAPT_FLAGS_FIBERMEDIA          0x0008
 190 #define ADAPT_FLAGS_LOCKS_ALLOCED       0x0010
 191 #define ADAPT_FLAGS_INT_REGISTERED      0x0020
 192 #define ADAPT_FLAGS_LOAD_TIMER_SET      0x0040
 193 #define ADAPT_FLAGS_STATS_TIMER_SET     0x0080
 194 #define ADAPT_FLAGS_RESET_TIMER_SET     0x0100
 195
 196 #define LINK_DOWN              0x00
 197 #define LINK_CONFIG            0x01
 198 #define LINK_UP                0x02
 199
 200 #define LINK_10MB              0x00
 201 #define LINK_100MB             0x01
 202 #define LINK_AUTOSPEED         0x02
 203 #define LINK_1000MB            0x03
 204 #define LINK_10000MB           0x04
 205
 206 #define LINK_HALFD             0x00
 207 #define LINK_FULLD             0x01
 208 #define LINK_AUTOD             0x02
 209
 210 #define MAC_DIRECTED     0x00000001
 211 #define MAC_BCAST        0x00000002
 212 #define MAC_MCAST        0x00000004
 213 #define MAC_PROMISC      0x00000008
 214 #define MAC_LOOPBACK     0x00000010
 215 #define MAC_ALLMCAST     0x00000020
 216
 217 #define SLIC_DUPLEX(x)    ((x == LINK_FULLD) ? "FDX" : "HDX")
 218 #define SLIC_SPEED(x)     ((x == LINK_100MB) ? "100Mb" : ((x == LINK_1000MB) ?\
 219                                 "1000Mb" : " 10Mb"))
 220 #define SLIC_LINKSTATE(x) ((x == LINK_DOWN) ? "Down" : "Up  ")
 221 #define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down")
 222 #define SLIC_CARD_STATE(x)    ((x == CARD_UP) ? "UP" : "Down")
 223
 224 struct slic_iface_stats {
 225         /*
 226         * Stats
 227         */
 228         u64        xmt_bytes;
 229         u64        xmt_ucast;
 230         u64        xmt_mcast;
 231         u64        xmt_bcast;
 232         u64        xmt_errors;
 233         u64        xmt_discards;
 234         u64        xmit_collisions;
 235         u64        xmit_excess_xmit_collisions;
 236         u64        rcv_bytes;
 237         u64        rcv_ucast;
 238         u64        rcv_mcast;
 239         u64        rcv_bcast;
 240         u64        rcv_errors;
 241         u64        rcv_discards;
 242 };
 243
 244 struct sliccp_stats {
 245         u64        xmit_tcp_segs;
 246         u64        xmit_tcp_bytes;
 247         u64        rcv_tcp_segs;
 248         u64        rcv_tcp_bytes;
 249 };
 250
 251 struct slicnet_stats {
 252         struct sliccp_stats        tcp;
 253         struct slic_iface_stats      iface;
 254 };
 255
 256 #define SLIC_LOADTIMER_PERIOD     1
 257 #define SLIC_INTAGG_DEFAULT       200
 258 #define SLIC_LOAD_0               0
 259 #define SLIC_INTAGG_0             0
 260 #define SLIC_LOAD_1               8000
 261 #define SLIC_LOAD_2               10000
 262 #define SLIC_LOAD_3               12000
 263 #define SLIC_LOAD_4               14000
 264 #define SLIC_LOAD_5               16000
 265 #define SLIC_INTAGG_1             50
 266 #define SLIC_INTAGG_2             100
 267 #define SLIC_INTAGG_3             150
 268 #define SLIC_INTAGG_4             200
 269 #define SLIC_INTAGG_5             250
 270 #define SLIC_LOAD_1GB             3000
 271 #define SLIC_LOAD_2GB             6000
 272 #define SLIC_LOAD_3GB             12000
 273 #define SLIC_LOAD_4GB             24000
 274 #define SLIC_LOAD_5GB             48000
 275 #define SLIC_INTAGG_1GB           50
 276 #define SLIC_INTAGG_2GB           75
 277 #define SLIC_INTAGG_3GB           100
 278 #define SLIC_INTAGG_4GB           100
 279 #define SLIC_INTAGG_5GB           100
 280
 281 struct ether_header {
 282         unsigned char    ether_dhost[6];
 283         unsigned char    ether_shost[6];
 284         ushort   ether_type;
 285 };
 286
 287 struct sliccard {
 288         uint              busnumber;
 289         uint              slotnumber;
 290         uint              state;
 291         uint              cardnum;
 292         uint              card_size;
 293         uint              adapters_activated;
 294         uint              adapters_allocated;
 295         uint              adapters_sleeping;
 296         uint              gennumber;
 297         u32           events;
 298         u32           loadlevel_current;
 299         u32           load;
 300         uint              reset_in_progress;
 301         u32           pingstatus;
 302         u32           bad_pingstatus;
 303         struct timer_list loadtimer;
 304         u32           loadtimerset;
 305         uint              config_set;
 306         struct slic_config  config;
 307         struct adapter  *master;
 308         struct adapter  *adapter[SLIC_MAX_PORTS];
 309         struct sliccard *next;
 310         u32             error_interrupts;
 311         u32             error_rmiss_interrupts;
 312         u32             rcv_interrupts;
 313         u32             xmit_interrupts;
 314         u32             num_isrs;
 315         u32             false_interrupts;
 316         u32             max_isr_rcvs;
 317         u32             max_isr_xmits;
 318         u32             rcv_interrupt_yields;
 319         u32             tx_packets;
 320         u32             debug_ix;
 321         ushort              reg_type[32];
 322         ushort              reg_offset[32];
 323         u32             reg_value[32];
 324         u32             reg_valueh[32];
 325 };
 326
 327 #define NUM_CFG_SPACES      2
 328 #define NUM_CFG_REGS        64
 329 #define NUM_CFG_REG_ULONGS  (NUM_CFG_REGS / sizeof(u32))
 330
 331 struct physcard {
 332         struct adapter  *adapter[SLIC_MAX_PORTS];
 333         struct physcard *next;
 334         uint                adapters_allocd;
 335
 336 /*
 337  * the following is not currently needed
 338  *      u32              bridge_busnum;
 339  *      u32              bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
 340  */
 341 };
 342
 343 struct base_driver {
 344         spinlock_t       driver_lock;
 345         u32              num_slic_cards;
 346         u32              num_slic_ports;
 347         u32              num_slic_ports_active;
 348         u32              dynamic_intagg;
 349         struct sliccard  *slic_card;
 350         struct physcard  *phys_card;
 351         uint                 cardnuminuse[SLIC_MAX_CARDS];
 352 };
 353
 354 struct slic_stats {
 355         /* xmit stats */
 356         u64 xmit_tcp_bytes;
 357         u64 xmit_tcp_segs;
 358         u64 xmit_bytes;
 359         u64 xmit_collisions;
 360         u64 xmit_unicasts;
 361         u64 xmit_other_error;
 362         u64 xmit_excess_collisions;
 363         /* rcv stats */
 364         u64 rcv_tcp_bytes;
 365         u64 rcv_tcp_segs;
 366         u64 rcv_bytes;
 367         u64 rcv_unicasts;
 368         u64 rcv_other_error;
 369         u64 rcv_drops;
 370 };
 371
 372 struct slic_shmem_data {
 373         u32 isr;
 374         u32 lnkstatus;
 375         struct slic_stats stats;
 376 };
 377
 378 struct slic_shmemory {
 379         dma_addr_t isr_phaddr;
 380         dma_addr_t lnkstatus_phaddr;
 381         dma_addr_t stats_phaddr;
 382         struct slic_shmem_data __iomem *shmem_data;
 383 };
 384
 385 struct slic_upr {
 386         uint               adapter;
 387         u32            upr_request;
 388         u32            upr_data;
 389         u32            upr_data_h;
 390         u32            upr_buffer;
 391         u32            upr_buffer_h;
 392         struct slic_upr *next;
 393 };
 394
 395 struct slic_ifevents {
 396         uint        oflow802;
 397         uint        uflow802;
 398         uint        Tprtoflow;
 399         uint        rcvearly;
 400         uint        Bufov;
 401         uint        Carre;
 402         uint        Longe;
 403         uint        Invp;
 404         uint        Crc;
 405         uint        Drbl;
 406         uint        Code;
 407         uint        IpHlen;
 408         uint        IpLen;
 409         uint        IpCsum;
 410         uint        TpCsum;
 411         uint        TpHlen;
 412 };
 413
 414 struct adapter {
 415         void *ifp;
 416         struct sliccard *card;
 417         uint                port;
 418         struct physcard *physcard;
 419         uint                physport;
 420         uint                cardindex;
 421         uint                card_size;
 422         uint                chipid;
 423         struct net_device  *netdev;
 424         spinlock_t          adapter_lock;
 425         spinlock_t          reset_lock;
 426         struct pci_dev     *pcidev;
 427         uint                busnumber;
 428         uint                slotnumber;
 429         uint                functionnumber;
 430         ushort              vendid;
 431         ushort              devid;
 432         ushort              subsysid;
 433         u32             irq;
 434         u32             drambase;
 435         u32             dramlength;
 436         uint                queues_initialized;
 437         uint                allocated;
 438         uint                activated;
 439         u32             intrregistered;
 440         uint                isp_initialized;
 441         uint                gennumber;
 442         struct slic_shmemory shmem;
 443         dma_addr_t          phys_shmem;
 444         void __iomem *regs;
 445         unsigned char               state;
 446         unsigned char               linkstate;
 447         unsigned char               linkspeed;
 448         unsigned char               linkduplex;
 449         uint                flags;
 450         unsigned char               macaddr[6];
 451         unsigned char               currmacaddr[6];
 452         u32             macopts;
 453         ushort              devflags_prev;
 454         u64             mcastmask;
 455         struct mcast_address   *mcastaddrs;
 456         struct slic_upr   *upr_list;
 457         uint                upr_busy;
 458         struct timer_list   pingtimer;
 459         u32             pingtimerset;
 460         struct timer_list   loadtimer;
 461         u32             loadtimerset;
 462         spinlock_t               upr_lock;
 463         spinlock_t               bit64reglock;
 464         struct slic_rspqueue     rspqueue;
 465         struct slic_rcvqueue     rcvqueue;
 466         struct slic_cmdqueue     cmdq_free;
 467         struct slic_cmdqueue     cmdq_done;
 468         struct slic_cmdqueue     cmdq_all;
 469         struct slic_cmdqmem      cmdqmem;
 470         /*
 471         *  SLIC Handles
 472         */
 473         /* Object handles*/
 474         struct slic_handle slic_handles[SLIC_CMDQ_MAXCMDS + 1];
 475         /* Free object handles*/
 476         struct slic_handle *pfree_slic_handles;
 477         /* Object handle list lock*/
 478         spinlock_t          handle_lock;
 479         ushort              slic_handle_ix;
 480
 481         u32             xmitq_full;
 482         u32             all_reg_writes;
 483         u32             icr_reg_writes;
 484         u32             isr_reg_writes;
 485         u32             error_interrupts;
 486         u32             error_rmiss_interrupts;
 487         u32             rx_errors;
 488         u32             rcv_drops;
 489         u32             rcv_interrupts;
 490         u32             xmit_interrupts;
 491         u32             linkevent_interrupts;
 492         u32             upr_interrupts;
 493         u32             num_isrs;
 494         u32             false_interrupts;
 495         u32             tx_packets;
 496         u32             xmit_completes;
 497         u32             tx_drops;
 498         u32             rcv_broadcasts;
 499         u32             rcv_multicasts;
 500         u32             rcv_unicasts;
 501         u32             max_isr_rcvs;
 502         u32             max_isr_xmits;
 503         u32             rcv_interrupt_yields;
 504         u32             intagg_period;
 505         u32             intagg_delay;
 506         u32             dynamic_intagg;
 507         struct inicpm_state    *inicpm_info;
 508         void *pinicpm_info;
 509         struct slic_ifevents  if_events;
 510         struct slic_stats        inicstats_prev;
 511         struct slicnet_stats     slic_stats;
 512 };
 513
 514 static inline u32 slic_read32(struct adapter *adapter, unsigned int reg)
 515 {
 516         return ioread32(adapter->regs + reg);
 517 }
 518
 519 static inline void slic_write32(struct adapter *adapter, unsigned int reg,
 520                                 u32 val)
 521 {
 522         iowrite32(val, adapter->regs + reg);
 523 }
 524
 525 static inline void slic_write64(struct adapter *adapter, unsigned int reg,
 526                                 u32 val, u32 hiaddr)
 527 {
 528         unsigned long flags;
 529
 530         spin_lock_irqsave(&adapter->bit64reglock, flags);
 531         slic_write32(adapter, SLIC_REG_ADDR_UPPER, hiaddr);
 532         slic_write32(adapter, reg, val);
 533         mmiowb();
 534         spin_unlock_irqrestore(&adapter->bit64reglock, flags);
 535 }
 536
 537 static inline void slic_flush_write(struct adapter *adapter)
 538 {
 539         ioread32(adapter->regs + SLIC_REG_HOSTID);
 540 }
 541
 542 #define UPDATE_STATS(largestat, newstat, oldstat)                        \
 543 {                                                                        \
 544         if ((newstat) < (oldstat))                                       \
 545                 (largestat) += ((newstat) + (0xFFFFFFFF - oldstat + 1)); \
 546         else                                                             \
 547                 (largestat) += ((newstat) - (oldstat));                  \
 548 }
 549
 550 #define UPDATE_STATS_GB(largestat, newstat, oldstat)                     \
 551 {                                                                        \
 552         (largestat) += ((newstat) - (oldstat));                          \
 553 }
 554
 555 #if BITS_PER_LONG == 64
 556 #define   SLIC_GET_ADDR_LOW(_addr)  (u32)((u64)(_addr) & \
 557         0x00000000FFFFFFFF)
 558 #define   SLIC_GET_ADDR_HIGH(_addr)  (u32)(((u64)(_addr) >> 32) & \
 559         0x00000000FFFFFFFF)
 560 #elif BITS_PER_LONG == 32
 561 #define   SLIC_GET_ADDR_LOW(_addr)   (u32)(_addr)
 562 #define   SLIC_GET_ADDR_HIGH(_addr)  (u32)0
 563 #else
 564 #error BITS_PER_LONG must be 32 or 64
 565 #endif
 566
 567 #define FLUSH           true
 568 #define DONT_FLUSH      false
 569
 570 #define SIOCSLICSETINTAGG        (SIOCDEVPRIVATE + 10)
 571
 572 #endif /*  __SLIC_DRIVER_H__ */