Staging: emxx_udc: emxx_udc: fixed coding style issue
[deliverable/linux.git] / drivers / staging / vme / devices / vme_pio2_gpio.c
1 /*
2 * GE PIO2 GPIO Driver
3 *
4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * Copyright 2009 GE Intelligent Platforms Embedded Systems, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13 #include <linux/module.h>
14 #include <linux/types.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/ctype.h>
20 #include <linux/gpio.h>
21 #include <linux/slab.h>
22 #include <linux/vme.h>
23
24 #include "vme_pio2.h"
25
26 static const char driver_name[] = "pio2_gpio";
27
28 static struct pio2_card *gpio_to_pio2_card(struct gpio_chip *chip)
29 {
30 return container_of(chip, struct pio2_card, gc);
31 }
32
33 static int pio2_gpio_get(struct gpio_chip *chip, unsigned int offset)
34 {
35 u8 reg;
36 int retval;
37 struct pio2_card *card = gpio_to_pio2_card(chip);
38
39 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) |
40 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
41 dev_err(&card->vdev->dev, "Channel not available as input\n");
42 return 0;
43 }
44
45 retval = vme_master_read(card->window, &reg, 1,
46 PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
47 if (retval < 0) {
48 dev_err(&card->vdev->dev, "Unable to read from GPIO\n");
49 return 0;
50 }
51
52 /*
53 * Remember, input on channels configured as both input and output
54 * are inverted!
55 */
56 if (reg & PIO2_CHANNEL_BIT[offset]) {
57 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH)
58 return 0;
59
60 return 1;
61 }
62
63 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH)
64 return 1;
65
66 return 0;
67 }
68
69 static void pio2_gpio_set(struct gpio_chip *chip,
70 unsigned int offset, int value)
71 {
72 u8 reg;
73 int retval;
74 struct pio2_card *card = gpio_to_pio2_card(chip);
75
76 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) |
77 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
78 dev_err(&card->vdev->dev, "Channel not available as output\n");
79 return;
80 }
81
82 if (value)
83 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value |
84 PIO2_CHANNEL_BIT[offset];
85 else
86 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value &
87 ~PIO2_CHANNEL_BIT[offset];
88
89 retval = vme_master_write(card->window, &reg, 1,
90 PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
91 if (retval < 0) {
92 dev_err(&card->vdev->dev, "Unable to write to GPIO\n");
93 return;
94 }
95
96 card->bank[PIO2_CHANNEL_BANK[offset]].value = reg;
97 }
98
99 /* Directionality configured at board build - send appropriate response */
100 static int pio2_gpio_dir_in(struct gpio_chip *chip, unsigned int offset)
101 {
102 int data;
103 struct pio2_card *card = gpio_to_pio2_card(chip);
104
105 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) |
106 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
107 dev_err(&card->vdev->dev,
108 "Channel directionality not configurable at runtime\n");
109
110 data = -EINVAL;
111 } else {
112 data = 0;
113 }
114
115 return data;
116 }
117
118 /* Directionality configured at board build - send appropriate response */
119 static int pio2_gpio_dir_out(struct gpio_chip *chip,
120 unsigned int offset, int value)
121 {
122 int data;
123 struct pio2_card *card = gpio_to_pio2_card(chip);
124
125 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) |
126 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
127 dev_err(&card->vdev->dev,
128 "Channel directionality not configurable at runtime\n");
129
130 data = -EINVAL;
131 } else {
132 data = 0;
133 }
134
135 return data;
136 }
137
138 /*
139 * We return whether this has been successful - this is used in the probe to
140 * ensure we have a valid card.
141 */
142 int pio2_gpio_reset(struct pio2_card *card)
143 {
144 int retval = 0;
145 int i, j;
146
147 u8 data = 0;
148
149 /* Zero output registers */
150 for (i = 0; i < 4; i++) {
151 retval = vme_master_write(card->window, &data, 1,
152 PIO2_REGS_DATA[i]);
153 if (retval < 0)
154 return retval;
155 card->bank[i].value = 0;
156 }
157
158 /* Set input interrupt masks */
159 for (i = 0; i < 4; i++) {
160 retval = vme_master_write(card->window, &data, 1,
161 PIO2_REGS_INT_MASK[i * 2]);
162 if (retval < 0)
163 return retval;
164
165 retval = vme_master_write(card->window, &data, 1,
166 PIO2_REGS_INT_MASK[(i * 2) + 1]);
167 if (retval < 0)
168 return retval;
169
170 for (j = 0; j < 8; j++)
171 card->bank[i].irq[j] = NONE;
172 }
173
174 /* Ensure all I/O interrupts are cleared */
175 for (i = 0; i < 4; i++) {
176 do {
177 retval = vme_master_read(card->window, &data, 1,
178 PIO2_REGS_INT_STAT[i]);
179 if (retval < 0)
180 return retval;
181 } while (data != 0);
182 }
183
184 return 0;
185 }
186
187 int pio2_gpio_init(struct pio2_card *card)
188 {
189 int retval = 0;
190 char *label;
191
192 label = kasprintf(GFP_KERNEL,
193 "%s@%s", driver_name, dev_name(&card->vdev->dev));
194 if (!label)
195 return -ENOMEM;
196
197 card->gc.label = label;
198
199 card->gc.ngpio = PIO2_NUM_CHANNELS;
200 /* Dynamic allocation of base */
201 card->gc.base = -1;
202 /* Setup pointers to chip functions */
203 card->gc.direction_input = pio2_gpio_dir_in;
204 card->gc.direction_output = pio2_gpio_dir_out;
205 card->gc.get = pio2_gpio_get;
206 card->gc.set = pio2_gpio_set;
207
208 /* This function adds a memory mapped GPIO chip */
209 retval = gpiochip_add(&card->gc);
210 if (retval) {
211 dev_err(&card->vdev->dev, "Unable to register GPIO\n");
212 kfree(card->gc.label);
213 }
214
215 return retval;
216 };
217
218 void pio2_gpio_exit(struct pio2_card *card)
219 {
220 const char *label = card->gc.label;
221
222 gpiochip_remove(&card->gc);
223 kfree(label);
224 }
225
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