drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
   5  * Caesar Wang <wxt@rock-chips.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  */
  16
  17 #include <linux/clk.h>
  18 #include <linux/delay.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/io.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_address.h>
  24 #include <linux/of_irq.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/reset.h>
  27 #include <linux/thermal.h>
  28 #include <linux/pinctrl/consumer.h>
  29
  30 /**
  31  * If the temperature over a period of time High,
  32  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  33  * or via GPIO give PMIC.
  34  */
  35 enum tshut_mode {
  36         TSHUT_MODE_CRU = 0,
  37         TSHUT_MODE_GPIO,
  38 };
  39
  40 /**
  41  * The system Temperature Sensors tshut(tshut) polarity
  42  * the bit 8 is tshut polarity.
  43  * 0: low active, 1: high active
  44  */
  45 enum tshut_polarity {
  46         TSHUT_LOW_ACTIVE = 0,
  47         TSHUT_HIGH_ACTIVE,
  48 };
  49
  50 /**
  51  * The system has two Temperature Sensors.
  52  * sensor0 is for CPU, and sensor1 is for GPU.
  53  */
  54 enum sensor_id {
  55         SENSOR_CPU = 0,
  56         SENSOR_GPU,
  57 };
  58
  59 /**
  60  * The conversion table has the adc value and temperature.
  61  * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
  62  * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
  63  */
  64 enum adc_sort_mode {
  65         ADC_DECREMENT = 0,
  66         ADC_INCREMENT,
  67 };
  68
  69 /**
  70  * The max sensors is two in rockchip SoCs.
  71  * Two sensors: CPU and GPU sensor.
  72  */
  73 #define SOC_MAX_SENSORS 2
  74
  75 /**
  76  * struct chip_tsadc_table: hold information about chip-specific differences
  77  * @id: conversion table
  78  * @length: size of conversion table
  79  * @data_mask: mask to apply on data inputs
  80  * @mode: sort mode of this adc variant (incrementing or decrementing)
  81  */
  82 struct chip_tsadc_table {
  83         const struct tsadc_table *id;
  84         unsigned int length;
  85         u32 data_mask;
  86         enum adc_sort_mode mode;
  87 };
  88
  89 struct rockchip_tsadc_chip {
  90         /* The sensor id of chip correspond to the ADC channel */
  91         int chn_id[SOC_MAX_SENSORS];
  92         int chn_num;
  93
  94         /* The hardware-controlled tshut property */
  95         int tshut_temp;
  96         enum tshut_mode tshut_mode;
  97         enum tshut_polarity tshut_polarity;
  98
  99         /* Chip-wide methods */
 100         void (*initialize)(void __iomem *reg, enum tshut_polarity p);
 101         void (*irq_ack)(void __iomem *reg);
 102         void (*control)(void __iomem *reg, bool on);
 103
 104         /* Per-sensor methods */
 105         int (*get_temp)(struct chip_tsadc_table table,
 106                         int chn, void __iomem *reg, int *temp);
 107         void (*set_tshut_temp)(struct chip_tsadc_table table,
 108                                int chn, void __iomem *reg, int temp);
 109         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
 110
 111         /* Per-table methods */
 112         struct chip_tsadc_table table;
 113 };
 114
 115 struct rockchip_thermal_sensor {
 116         struct rockchip_thermal_data *thermal;
 117         struct thermal_zone_device *tzd;
 118         int id;
 119 };
 120
 121 struct rockchip_thermal_data {
 122         const struct rockchip_tsadc_chip *chip;
 123         struct platform_device *pdev;
 124         struct reset_control *reset;
 125
 126         struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 127
 128         struct clk *clk;
 129         struct clk *pclk;
 130
 131         void __iomem *regs;
 132
 133         int tshut_temp;
 134         enum tshut_mode tshut_mode;
 135         enum tshut_polarity tshut_polarity;
 136 };
 137
 138 /**
 139  * TSADC Sensor Register description:
 140  *
 141  * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
 142  * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
 143  *
 144  */
 145 #define TSADCV2_AUTO_CON                        0x04
 146 #define TSADCV2_INT_EN                          0x08
 147 #define TSADCV2_INT_PD                          0x0c
 148 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 149 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 150 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 151 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 152 #define TSADCV2_AUTO_PERIOD                     0x68
 153 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 154
 155 #define TSADCV2_AUTO_EN                         BIT(0)
 156 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 157 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 158 /**
 159  * TSADCV1_AUTO_Q_SEL_EN:
 160  * whether select (1024 - tsadc_q) as output
 161  * 1'b0:use tsadc_q as output(temperature-code is rising sequence)
 162  * 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
 163  */
 164 #define TSADCV3_AUTO_Q_SEL_EN                   BIT(1)
 165
 166 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 167 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 168 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 169
 170 #define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
 171 #define TSADCV3_INT_PD_CLEAR_MASK               ~BIT(16)
 172
 173 #define TSADCV2_DATA_MASK                       0xfff
 174 #define TSADCV3_DATA_MASK                       0x3ff
 175
 176 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 177 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 178 #define TSADCV2_AUTO_PERIOD_TIME                250 /* msec */
 179 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* msec */
 180
 181 struct tsadc_table {
 182         u32 code;
 183         int temp;
 184 };
 185
 186 /**
 187  * Note:
 188  * Code to Temperature mapping of the Temperature sensor is a piece wise linear
 189  * curve.Any temperature, code faling between to 2 give temperatures can be
 190  * linearly interpolated.
 191  * Code to Temperature mapping should be updated based on sillcon results.
 192  */
 193 static const struct tsadc_table rk3228_code_table[] = {
 194         {0, -40000},
 195         {588, -40000},
 196         {593, -35000},
 197         {598, -30000},
 198         {603, -25000},
 199         {608, -20000},
 200         {613, -15000},
 201         {618, -10000},
 202         {623, -5000},
 203         {629, 0},
 204         {634, 5000},
 205         {639, 10000},
 206         {644, 15000},
 207         {649, 20000},
 208         {654, 25000},
 209         {660, 30000},
 210         {665, 35000},
 211         {670, 40000},
 212         {675, 45000},
 213         {681, 50000},
 214         {686, 55000},
 215         {691, 60000},
 216         {696, 65000},
 217         {702, 70000},
 218         {707, 75000},
 219         {712, 80000},
 220         {717, 85000},
 221         {723, 90000},
 222         {728, 95000},
 223         {733, 100000},
 224         {738, 105000},
 225         {744, 110000},
 226         {749, 115000},
 227         {754, 120000},
 228         {760, 125000},
 229         {TSADCV2_DATA_MASK, 125000},
 230 };
 231
 232 static const struct tsadc_table rk3288_code_table[] = {
 233         {TSADCV2_DATA_MASK, -40000},
 234         {3800, -40000},
 235         {3792, -35000},
 236         {3783, -30000},
 237         {3774, -25000},
 238         {3765, -20000},
 239         {3756, -15000},
 240         {3747, -10000},
 241         {3737, -5000},
 242         {3728, 0},
 243         {3718, 5000},
 244         {3708, 10000},
 245         {3698, 15000},
 246         {3688, 20000},
 247         {3678, 25000},
 248         {3667, 30000},
 249         {3656, 35000},
 250         {3645, 40000},
 251         {3634, 45000},
 252         {3623, 50000},
 253         {3611, 55000},
 254         {3600, 60000},
 255         {3588, 65000},
 256         {3575, 70000},
 257         {3563, 75000},
 258         {3550, 80000},
 259         {3537, 85000},
 260         {3524, 90000},
 261         {3510, 95000},
 262         {3496, 100000},
 263         {3482, 105000},
 264         {3467, 110000},
 265         {3452, 115000},
 266         {3437, 120000},
 267         {3421, 125000},
 268 };
 269
 270 static const struct tsadc_table rk3368_code_table[] = {
 271         {0, -40000},
 272         {106, -40000},
 273         {108, -35000},
 274         {110, -30000},
 275         {112, -25000},
 276         {114, -20000},
 277         {116, -15000},
 278         {118, -10000},
 279         {120, -5000},
 280         {122, 0},
 281         {124, 5000},
 282         {126, 10000},
 283         {128, 15000},
 284         {130, 20000},
 285         {132, 25000},
 286         {134, 30000},
 287         {136, 35000},
 288         {138, 40000},
 289         {140, 45000},
 290         {142, 50000},
 291         {144, 55000},
 292         {146, 60000},
 293         {148, 65000},
 294         {150, 70000},
 295         {152, 75000},
 296         {154, 80000},
 297         {156, 85000},
 298         {158, 90000},
 299         {160, 95000},
 300         {162, 100000},
 301         {163, 105000},
 302         {165, 110000},
 303         {167, 115000},
 304         {169, 120000},
 305         {171, 125000},
 306         {TSADCV3_DATA_MASK, 125000},
 307 };
 308
 309 static const struct tsadc_table rk3399_code_table[] = {
 310         {0, -40000},
 311         {593, -40000},
 312         {598, -35000},
 313         {603, -30000},
 314         {609, -25000},
 315         {614, -20000},
 316         {619, -15000},
 317         {625, -10000},
 318         {630, -5000},
 319         {635, 0},
 320         {641, 5000},
 321         {646, 10000},
 322         {651, 15000},
 323         {657, 20000},
 324         {662, 25000},
 325         {667, 30000},
 326         {673, 35000},
 327         {678, 40000},
 328         {684, 45000},
 329         {689, 50000},
 330         {694, 55000},
 331         {700, 60000},
 332         {705, 65000},
 333         {711, 70000},
 334         {716, 75000},
 335         {722, 80000},
 336         {727, 85000},
 337         {733, 90000},
 338         {738, 95000},
 339         {743, 100000},
 340         {749, 105000},
 341         {754, 110000},
 342         {760, 115000},
 343         {765, 120000},
 344         {771, 125000},
 345         {TSADCV3_DATA_MASK, 125000},
 346 };
 347
 348 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 349                                    int temp)
 350 {
 351         int high, low, mid;
 352
 353         low = 0;
 354         high = table.length - 1;
 355         mid = (high + low) / 2;
 356
 357         if (temp < table.id[low].temp || temp > table.id[high].temp)
 358                 return 0;
 359
 360         while (low <= high) {
 361                 if (temp == table.id[mid].temp)
 362                         return table.id[mid].code;
 363                 else if (temp < table.id[mid].temp)
 364                         high = mid - 1;
 365                 else
 366                         low = mid + 1;
 367                 mid = (low + high) / 2;
 368         }
 369
 370         return 0;
 371 }
 372
 373 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 374                                    int *temp)
 375 {
 376         unsigned int low = 1;
 377         unsigned int high = table.length - 1;
 378         unsigned int mid = (low + high) / 2;
 379         unsigned int num;
 380         unsigned long denom;
 381
 382         WARN_ON(table.length < 2);
 383
 384         switch (table.mode) {
 385         case ADC_DECREMENT:
 386                 code &= table.data_mask;
 387                 if (code < table.id[high].code)
 388                         return -EAGAIN;         /* Incorrect reading */
 389
 390                 while (low <= high) {
 391                         if (code >= table.id[mid].code &&
 392                             code < table.id[mid - 1].code)
 393                                 break;
 394                         else if (code < table.id[mid].code)
 395                                 low = mid + 1;
 396                         else
 397                                 high = mid - 1;
 398
 399                         mid = (low + high) / 2;
 400                 }
 401                 break;
 402         case ADC_INCREMENT:
 403                 code &= table.data_mask;
 404                 if (code < table.id[low].code)
 405                         return -EAGAIN;         /* Incorrect reading */
 406
 407                 while (low <= high) {
 408                         if (code >= table.id[mid - 1].code &&
 409                             code < table.id[mid].code)
 410                                 break;
 411                         else if (code > table.id[mid].code)
 412                                 low = mid + 1;
 413                         else
 414                                 high = mid - 1;
 415
 416                         mid = (low + high) / 2;
 417                 }
 418                 break;
 419         default:
 420                 pr_err("Invalid the conversion table\n");
 421         }
 422
 423         /*
 424          * The 5C granularity provided by the table is too much. Let's
 425          * assume that the relationship between sensor readings and
 426          * temperature between 2 table entries is linear and interpolate
 427          * to produce less granular result.
 428          */
 429         num = table.id[mid].temp - table.id[mid - 1].temp;
 430         num *= abs(table.id[mid - 1].code - code);
 431         denom = abs(table.id[mid - 1].code - table.id[mid].code);
 432         *temp = table.id[mid - 1].temp + (num / denom);
 433
 434         return 0;
 435 }
 436
 437 /**
 438  * rk_tsadcv2_initialize - initialize TASDC Controller.
 439  *
 440  * (1) Set TSADC_V2_AUTO_PERIOD:
 441  *     Configure the interleave between every two accessing of
 442  *     TSADC in normal operation.
 443  *
 444  * (2) Set TSADCV2_AUTO_PERIOD_HT:
 445  *     Configure the interleave between every two accessing of
 446  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 447  *
 448  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 449  *     If the temperature is higher than COMP_INT or COMP_SHUT for
 450  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 451  */
 452 static void rk_tsadcv2_initialize(void __iomem *regs,
 453                                   enum tshut_polarity tshut_polarity)
 454 {
 455         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 456                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 457                                regs + TSADCV2_AUTO_CON);
 458         else
 459                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 460                                regs + TSADCV2_AUTO_CON);
 461
 462         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 463         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 464                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 465         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 466                        regs + TSADCV2_AUTO_PERIOD_HT);
 467         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 468                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 469 }
 470
 471 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 472 {
 473         u32 val;
 474
 475         val = readl_relaxed(regs + TSADCV2_INT_PD);
 476         writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 477 }
 478
 479 static void rk_tsadcv3_irq_ack(void __iomem *regs)
 480 {
 481         u32 val;
 482
 483         val = readl_relaxed(regs + TSADCV2_INT_PD);
 484         writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 485 }
 486
 487 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 488 {
 489         u32 val;
 490
 491         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 492         if (enable)
 493                 val |= TSADCV2_AUTO_EN;
 494         else
 495                 val &= ~TSADCV2_AUTO_EN;
 496
 497         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 498 }
 499
 500 /**
 501  * @rk_tsadcv3_control:
 502  * TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
 503  * bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
 504  * setting this bit to enable.
 505  */
 506 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
 507 {
 508         u32 val;
 509
 510         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 511         if (enable)
 512                 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
 513         else
 514                 val &= ~TSADCV2_AUTO_EN;
 515
 516         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 517 }
 518
 519 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
 520                                int chn, void __iomem *regs, int *temp)
 521 {
 522         u32 val;
 523
 524         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 525
 526         return rk_tsadcv2_code_to_temp(table, val, temp);
 527 }
 528
 529 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
 530                                   int chn, void __iomem *regs, int temp)
 531 {
 532         u32 tshut_value, val;
 533
 534         tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 535         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 536
 537         /* TSHUT will be valid */
 538         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 539         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 540 }
 541
 542 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 543                                   enum tshut_mode mode)
 544 {
 545         u32 val;
 546
 547         val = readl_relaxed(regs + TSADCV2_INT_EN);
 548         if (mode == TSHUT_MODE_GPIO) {
 549                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 550                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 551         } else {
 552                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 553                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 554         }
 555
 556         writel_relaxed(val, regs + TSADCV2_INT_EN);
 557 }
 558
 559 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 560         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 561         .chn_num = 1, /* one channel for tsadc */
 562
 563         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 564         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 565         .tshut_temp = 95000,
 566
 567         .initialize = rk_tsadcv2_initialize,
 568         .irq_ack = rk_tsadcv3_irq_ack,
 569         .control = rk_tsadcv3_control,
 570         .get_temp = rk_tsadcv2_get_temp,
 571         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 572         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 573
 574         .table = {
 575                 .id = rk3228_code_table,
 576                 .length = ARRAY_SIZE(rk3228_code_table),
 577                 .data_mask = TSADCV3_DATA_MASK,
 578                 .mode = ADC_INCREMENT,
 579         },
 580 };
 581
 582 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 583         .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
 584         .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
 585         .chn_num = 2, /* two channels for tsadc */
 586
 587         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 588         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 589         .tshut_temp = 95000,
 590
 591         .initialize = rk_tsadcv2_initialize,
 592         .irq_ack = rk_tsadcv2_irq_ack,
 593         .control = rk_tsadcv2_control,
 594         .get_temp = rk_tsadcv2_get_temp,
 595         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 596         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 597
 598         .table = {
 599                 .id = rk3288_code_table,
 600                 .length = ARRAY_SIZE(rk3288_code_table),
 601                 .data_mask = TSADCV2_DATA_MASK,
 602                 .mode = ADC_DECREMENT,
 603         },
 604 };
 605
 606 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 607         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 608         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 609         .chn_num = 2, /* two channels for tsadc */
 610
 611         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 612         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 613         .tshut_temp = 95000,
 614
 615         .initialize = rk_tsadcv2_initialize,
 616         .irq_ack = rk_tsadcv2_irq_ack,
 617         .control = rk_tsadcv2_control,
 618         .get_temp = rk_tsadcv2_get_temp,
 619         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 620         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 621
 622         .table = {
 623                 .id = rk3368_code_table,
 624                 .length = ARRAY_SIZE(rk3368_code_table),
 625                 .data_mask = TSADCV3_DATA_MASK,
 626                 .mode = ADC_INCREMENT,
 627         },
 628 };
 629
 630 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 631         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 632         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 633         .chn_num = 2, /* two channels for tsadc */
 634
 635         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 636         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 637         .tshut_temp = 95000,
 638
 639         .initialize = rk_tsadcv2_initialize,
 640         .irq_ack = rk_tsadcv3_irq_ack,
 641         .control = rk_tsadcv3_control,
 642         .get_temp = rk_tsadcv2_get_temp,
 643         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 644         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 645
 646         .table = {
 647                 .id = rk3399_code_table,
 648                 .length = ARRAY_SIZE(rk3399_code_table),
 649                 .data_mask = TSADCV3_DATA_MASK,
 650                 .mode = ADC_INCREMENT,
 651         },
 652 };
 653
 654 static const struct of_device_id of_rockchip_thermal_match[] = {
 655         {
 656                 .compatible = "rockchip,rk3228-tsadc",
 657                 .data = (void *)&rk3228_tsadc_data,
 658         },
 659         {
 660                 .compatible = "rockchip,rk3288-tsadc",
 661                 .data = (void *)&rk3288_tsadc_data,
 662         },
 663         {
 664                 .compatible = "rockchip,rk3368-tsadc",
 665                 .data = (void *)&rk3368_tsadc_data,
 666         },
 667         {
 668                 .compatible = "rockchip,rk3399-tsadc",
 669                 .data = (void *)&rk3399_tsadc_data,
 670         },
 671         { /* end */ },
 672 };
 673 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 674
 675 static void
 676 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
 677 {
 678         struct thermal_zone_device *tzd = sensor->tzd;
 679
 680         tzd->ops->set_mode(tzd,
 681                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 682 }
 683
 684 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 685 {
 686         struct rockchip_thermal_data *thermal = dev;
 687         int i;
 688
 689         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 690
 691         thermal->chip->irq_ack(thermal->regs);
 692
 693         for (i = 0; i < thermal->chip->chn_num; i++)
 694                 thermal_zone_device_update(thermal->sensors[i].tzd);
 695
 696         return IRQ_HANDLED;
 697 }
 698
 699 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 700 {
 701         struct rockchip_thermal_sensor *sensor = _sensor;
 702         struct rockchip_thermal_data *thermal = sensor->thermal;
 703         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 704         int retval;
 705
 706         retval = tsadc->get_temp(tsadc->table,
 707                                  sensor->id, thermal->regs, out_temp);
 708         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 709                 sensor->id, *out_temp, retval);
 710
 711         return retval;
 712 }
 713
 714 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
 715         .get_temp = rockchip_thermal_get_temp,
 716 };
 717
 718 static int rockchip_configure_from_dt(struct device *dev,
 719                                       struct device_node *np,
 720                                       struct rockchip_thermal_data *thermal)
 721 {
 722         u32 shut_temp, tshut_mode, tshut_polarity;
 723
 724         if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
 725                 dev_warn(dev,
 726                          "Missing tshut temp property, using default %d\n",
 727                          thermal->chip->tshut_temp);
 728                 thermal->tshut_temp = thermal->chip->tshut_temp;
 729         } else {
 730                 if (shut_temp > INT_MAX) {
 731                         dev_err(dev, "Invalid tshut temperature specified: %d\n",
 732                                 shut_temp);
 733                         return -ERANGE;
 734                 }
 735                 thermal->tshut_temp = shut_temp;
 736         }
 737
 738         if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
 739                 dev_warn(dev,
 740                          "Missing tshut mode property, using default (%s)\n",
 741                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 742                                 "gpio" : "cru");
 743                 thermal->tshut_mode = thermal->chip->tshut_mode;
 744         } else {
 745                 thermal->tshut_mode = tshut_mode;
 746         }
 747
 748         if (thermal->tshut_mode > 1) {
 749                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 750                         thermal->tshut_mode);
 751                 return -EINVAL;
 752         }
 753
 754         if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
 755                                  &tshut_polarity)) {
 756                 dev_warn(dev,
 757                          "Missing tshut-polarity property, using default (%s)\n",
 758                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 759                                 "low" : "high");
 760                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 761         } else {
 762                 thermal->tshut_polarity = tshut_polarity;
 763         }
 764
 765         if (thermal->tshut_polarity > 1) {
 766                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 767                         thermal->tshut_polarity);
 768                 return -EINVAL;
 769         }
 770
 771         return 0;
 772 }
 773
 774 static int
 775 rockchip_thermal_register_sensor(struct platform_device *pdev,
 776                                  struct rockchip_thermal_data *thermal,
 777                                  struct rockchip_thermal_sensor *sensor,
 778                                  int id)
 779 {
 780         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 781         int error;
 782
 783         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 784         tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
 785                               thermal->tshut_temp);
 786
 787         sensor->thermal = thermal;
 788         sensor->id = id;
 789         sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
 790                                                       &rockchip_of_thermal_ops);
 791         if (IS_ERR(sensor->tzd)) {
 792                 error = PTR_ERR(sensor->tzd);
 793                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 794                         id, error);
 795                 return error;
 796         }
 797
 798         return 0;
 799 }
 800
 801 /**
 802  * Reset TSADC Controller, reset all tsadc registers.
 803  */
 804 static void rockchip_thermal_reset_controller(struct reset_control *reset)
 805 {
 806         reset_control_assert(reset);
 807         usleep_range(10, 20);
 808         reset_control_deassert(reset);
 809 }
 810
 811 static int rockchip_thermal_probe(struct platform_device *pdev)
 812 {
 813         struct device_node *np = pdev->dev.of_node;
 814         struct rockchip_thermal_data *thermal;
 815         const struct of_device_id *match;
 816         struct resource *res;
 817         int irq;
 818         int i, j;
 819         int error;
 820
 821         match = of_match_node(of_rockchip_thermal_match, np);
 822         if (!match)
 823                 return -ENXIO;
 824
 825         irq = platform_get_irq(pdev, 0);
 826         if (irq < 0) {
 827                 dev_err(&pdev->dev, "no irq resource?\n");
 828                 return -EINVAL;
 829         }
 830
 831         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
 832                                GFP_KERNEL);
 833         if (!thermal)
 834                 return -ENOMEM;
 835
 836         thermal->pdev = pdev;
 837
 838         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
 839         if (!thermal->chip)
 840                 return -EINVAL;
 841
 842         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 843         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
 844         if (IS_ERR(thermal->regs))
 845                 return PTR_ERR(thermal->regs);
 846
 847         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
 848         if (IS_ERR(thermal->reset)) {
 849                 error = PTR_ERR(thermal->reset);
 850                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
 851                 return error;
 852         }
 853
 854         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
 855         if (IS_ERR(thermal->clk)) {
 856                 error = PTR_ERR(thermal->clk);
 857                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
 858                 return error;
 859         }
 860
 861         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
 862         if (IS_ERR(thermal->pclk)) {
 863                 error = PTR_ERR(thermal->pclk);
 864                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
 865                         error);
 866                 return error;
 867         }
 868
 869         error = clk_prepare_enable(thermal->clk);
 870         if (error) {
 871                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
 872                         error);
 873                 return error;
 874         }
 875
 876         error = clk_prepare_enable(thermal->pclk);
 877         if (error) {
 878                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
 879                 goto err_disable_clk;
 880         }
 881
 882         rockchip_thermal_reset_controller(thermal->reset);
 883
 884         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
 885         if (error) {
 886                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
 887                         error);
 888                 goto err_disable_pclk;
 889         }
 890
 891         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 892
 893         for (i = 0; i < thermal->chip->chn_num; i++) {
 894                 error = rockchip_thermal_register_sensor(pdev, thermal,
 895                                                 &thermal->sensors[i],
 896                                                 thermal->chip->chn_id[i]);
 897                 if (error) {
 898                         dev_err(&pdev->dev,
 899                                 "failed to register sensor[%d] : error = %d\n",
 900                                 i, error);
 901                         for (j = 0; j < i; j++)
 902                                 thermal_zone_of_sensor_unregister(&pdev->dev,
 903                                                 thermal->sensors[j].tzd);
 904                         goto err_disable_pclk;
 905                 }
 906         }
 907
 908         error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 909                                           &rockchip_thermal_alarm_irq_thread,
 910                                           IRQF_ONESHOT,
 911                                           "rockchip_thermal", thermal);
 912         if (error) {
 913                 dev_err(&pdev->dev,
 914                         "failed to request tsadc irq: %d\n", error);
 915                 goto err_unregister_sensor;
 916         }
 917
 918         thermal->chip->control(thermal->regs, true);
 919
 920         for (i = 0; i < thermal->chip->chn_num; i++)
 921                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 922
 923         platform_set_drvdata(pdev, thermal);
 924
 925         return 0;
 926
 927 err_unregister_sensor:
 928         while (i--)
 929                 thermal_zone_of_sensor_unregister(&pdev->dev,
 930                                                   thermal->sensors[i].tzd);
 931
 932 err_disable_pclk:
 933         clk_disable_unprepare(thermal->pclk);
 934 err_disable_clk:
 935         clk_disable_unprepare(thermal->clk);
 936
 937         return error;
 938 }
 939
 940 static int rockchip_thermal_remove(struct platform_device *pdev)
 941 {
 942         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 943         int i;
 944
 945         for (i = 0; i < thermal->chip->chn_num; i++) {
 946                 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
 947
 948                 rockchip_thermal_toggle_sensor(sensor, false);
 949                 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
 950         }
 951
 952         thermal->chip->control(thermal->regs, false);
 953
 954         clk_disable_unprepare(thermal->pclk);
 955         clk_disable_unprepare(thermal->clk);
 956
 957         return 0;
 958 }
 959
 960 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
 961 {
 962         struct platform_device *pdev = to_platform_device(dev);
 963         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 964         int i;
 965
 966         for (i = 0; i < thermal->chip->chn_num; i++)
 967                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
 968
 969         thermal->chip->control(thermal->regs, false);
 970
 971         clk_disable(thermal->pclk);
 972         clk_disable(thermal->clk);
 973
 974         pinctrl_pm_select_sleep_state(dev);
 975
 976         return 0;
 977 }
 978
 979 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 980 {
 981         struct platform_device *pdev = to_platform_device(dev);
 982         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 983         int i;
 984         int error;
 985
 986         error = clk_enable(thermal->clk);
 987         if (error)
 988                 return error;
 989
 990         error = clk_enable(thermal->pclk);
 991         if (error)
 992                 return error;
 993
 994         rockchip_thermal_reset_controller(thermal->reset);
 995
 996         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 997
 998         for (i = 0; i < thermal->chip->chn_num; i++) {
 999                 int id = thermal->sensors[i].id;
1000
1001                 thermal->chip->set_tshut_mode(id, thermal->regs,
1002                                               thermal->tshut_mode);
1003                 thermal->chip->set_tshut_temp(thermal->chip->table,
1004                                               id, thermal->regs,
1005                                               thermal->tshut_temp);
1006         }
1007
1008         thermal->chip->control(thermal->regs, true);
1009
1010         for (i = 0; i < thermal->chip->chn_num; i++)
1011                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1012
1013         pinctrl_pm_select_default_state(dev);
1014
1015         return 0;
1016 }
1017
1018 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1019                          rockchip_thermal_suspend, rockchip_thermal_resume);
1020
1021 static struct platform_driver rockchip_thermal_driver = {
1022         .driver = {
1023                 .name = "rockchip-thermal",
1024                 .pm = &rockchip_thermal_pm_ops,
1025                 .of_match_table = of_rockchip_thermal_match,
1026         },
1027         .probe = rockchip_thermal_probe,
1028         .remove = rockchip_thermal_remove,
1029 };
1030
1031 module_platform_driver(rockchip_thermal_driver);
1032
1033 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1034 MODULE_AUTHOR("Rockchip, Inc.");
1035 MODULE_LICENSE("GPL v2");
1036 MODULE_ALIAS("platform:rockchip-thermal");