2 * platform.c - DesignWare HS OTG Controller platform driver
4 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The names of the above-listed copyright holders may not be used
16 * to endorse or promote products derived from this software without
17 * specific prior written permission.
19 * ALTERNATIVELY, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") as published by the Free Software
21 * Foundation; either version 2 of the License, or (at your option) any
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/slab.h>
40 #include <linux/clk.h>
41 #include <linux/device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/of_device.h>
44 #include <linux/mutex.h>
45 #include <linux/platform_device.h>
46 #include <linux/phy/phy.h>
47 #include <linux/platform_data/s3c-hsotg.h>
49 #include <linux/usb/of.h>
55 static const char dwc2_driver_name
[] = "dwc2";
57 static const struct dwc2_core_params params_hi6220
= {
58 .otg_cap
= 2, /* No HNP/SRP capable */
59 .otg_ver
= 0, /* 1.3 */
62 .dma_desc_fs_enable
= 0,
63 .speed
= 0, /* High Speed */
64 .enable_dynamic_fifo
= 1,
65 .en_multiple_tx_fifo
= 1,
66 .host_rx_fifo_size
= 512,
67 .host_nperio_tx_fifo_size
= 512,
68 .host_perio_tx_fifo_size
= 512,
69 .max_transfer_size
= 65535,
70 .max_packet_count
= 511,
72 .phy_type
= 1, /* UTMI */
74 .phy_ulpi_ddr
= 0, /* Single */
75 .phy_ulpi_ext_vbus
= 0,
78 .host_support_fs_ls_low_power
= 0,
79 .host_ls_low_power_phy_clk
= 0, /* 48 MHz */
82 .ahbcfg
= GAHBCFG_HBSTLEN_INCR16
<<
83 GAHBCFG_HBSTLEN_SHIFT
,
85 .external_id_pin_ctl
= -1,
89 static const struct dwc2_core_params params_bcm2835
= {
90 .otg_cap
= 0, /* HNP/SRP capable */
91 .otg_ver
= 0, /* 1.3 */
94 .dma_desc_fs_enable
= 0,
95 .speed
= 0, /* High Speed */
96 .enable_dynamic_fifo
= 1,
97 .en_multiple_tx_fifo
= 1,
98 .host_rx_fifo_size
= 774, /* 774 DWORDs */
99 .host_nperio_tx_fifo_size
= 256, /* 256 DWORDs */
100 .host_perio_tx_fifo_size
= 512, /* 512 DWORDs */
101 .max_transfer_size
= 65535,
102 .max_packet_count
= 511,
104 .phy_type
= 1, /* UTMI */
105 .phy_utmi_width
= 8, /* 8 bits */
106 .phy_ulpi_ddr
= 0, /* Single */
107 .phy_ulpi_ext_vbus
= 0,
110 .host_support_fs_ls_low_power
= 0,
111 .host_ls_low_power_phy_clk
= 0, /* 48 MHz */
116 .external_id_pin_ctl
= -1,
120 static const struct dwc2_core_params params_rk3066
= {
121 .otg_cap
= 2, /* non-HNP/non-SRP */
124 .dma_desc_enable
= 0,
125 .dma_desc_fs_enable
= 0,
127 .enable_dynamic_fifo
= 1,
128 .en_multiple_tx_fifo
= -1,
129 .host_rx_fifo_size
= 520, /* 520 DWORDs */
130 .host_nperio_tx_fifo_size
= 128, /* 128 DWORDs */
131 .host_perio_tx_fifo_size
= 256, /* 256 DWORDs */
132 .max_transfer_size
= 65535,
133 .max_packet_count
= -1,
136 .phy_utmi_width
= -1,
138 .phy_ulpi_ext_vbus
= -1,
141 .host_support_fs_ls_low_power
= -1,
142 .host_ls_low_power_phy_clk
= -1,
145 .ahbcfg
= GAHBCFG_HBSTLEN_INCR16
<<
146 GAHBCFG_HBSTLEN_SHIFT
,
148 .external_id_pin_ctl
= -1,
153 * Check the dr_mode against the module configuration and hardware
156 * The hardware, module, and dr_mode, can each be set to host, device,
157 * or otg. Check that all these values are compatible and adjust the
158 * value of dr_mode if possible.
161 * HW MOD dr_mode dr_mode
162 * ------------------------------
173 * OTG OTG any : dr_mode
175 static int dwc2_get_dr_mode(struct dwc2_hsotg
*hsotg
)
177 enum usb_dr_mode mode
;
179 hsotg
->dr_mode
= usb_get_dr_mode(hsotg
->dev
);
180 if (hsotg
->dr_mode
== USB_DR_MODE_UNKNOWN
)
181 hsotg
->dr_mode
= USB_DR_MODE_OTG
;
183 mode
= hsotg
->dr_mode
;
185 if (dwc2_hw_is_device(hsotg
)) {
186 if (IS_ENABLED(CONFIG_USB_DWC2_HOST
)) {
188 "Controller does not support host mode.\n");
191 mode
= USB_DR_MODE_PERIPHERAL
;
192 } else if (dwc2_hw_is_host(hsotg
)) {
193 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL
)) {
195 "Controller does not support device mode.\n");
198 mode
= USB_DR_MODE_HOST
;
200 if (IS_ENABLED(CONFIG_USB_DWC2_HOST
))
201 mode
= USB_DR_MODE_HOST
;
202 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL
))
203 mode
= USB_DR_MODE_PERIPHERAL
;
206 if (mode
!= hsotg
->dr_mode
) {
208 "Configuration mismatch. dr_mode forced to %s\n",
209 mode
== USB_DR_MODE_HOST
? "host" : "device");
211 hsotg
->dr_mode
= mode
;
217 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg
*hsotg
)
219 struct platform_device
*pdev
= to_platform_device(hsotg
->dev
);
222 ret
= regulator_bulk_enable(ARRAY_SIZE(hsotg
->supplies
),
228 ret
= clk_prepare_enable(hsotg
->clk
);
234 ret
= usb_phy_init(hsotg
->uphy
);
235 else if (hsotg
->plat
&& hsotg
->plat
->phy_init
)
236 ret
= hsotg
->plat
->phy_init(pdev
, hsotg
->plat
->phy_type
);
238 ret
= phy_power_on(hsotg
->phy
);
240 ret
= phy_init(hsotg
->phy
);
247 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
248 * @hsotg: The driver state
250 * A wrapper for platform code responsible for controlling
251 * low-level USB platform resources (phy, clock, regulators)
253 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg
*hsotg
)
255 int ret
= __dwc2_lowlevel_hw_enable(hsotg
);
258 hsotg
->ll_hw_enabled
= true;
262 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg
*hsotg
)
264 struct platform_device
*pdev
= to_platform_device(hsotg
->dev
);
268 usb_phy_shutdown(hsotg
->uphy
);
269 else if (hsotg
->plat
&& hsotg
->plat
->phy_exit
)
270 ret
= hsotg
->plat
->phy_exit(pdev
, hsotg
->plat
->phy_type
);
272 ret
= phy_exit(hsotg
->phy
);
274 ret
= phy_power_off(hsotg
->phy
);
280 clk_disable_unprepare(hsotg
->clk
);
282 ret
= regulator_bulk_disable(ARRAY_SIZE(hsotg
->supplies
),
289 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
290 * @hsotg: The driver state
292 * A wrapper for platform code responsible for controlling
293 * low-level USB platform resources (phy, clock, regulators)
295 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg
*hsotg
)
297 int ret
= __dwc2_lowlevel_hw_disable(hsotg
);
300 hsotg
->ll_hw_enabled
= false;
304 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg
*hsotg
)
308 /* Set default UTMI width */
309 hsotg
->phyif
= GUSBCFG_PHYIF16
;
312 * Attempt to find a generic PHY, then look for an old style
313 * USB PHY and then fall back to pdata
315 hsotg
->phy
= devm_phy_get(hsotg
->dev
, "usb2-phy");
316 if (IS_ERR(hsotg
->phy
)) {
317 ret
= PTR_ERR(hsotg
->phy
);
326 dev_err(hsotg
->dev
, "error getting phy %d\n", ret
);
332 hsotg
->uphy
= devm_usb_get_phy(hsotg
->dev
, USB_PHY_TYPE_USB2
);
333 if (IS_ERR(hsotg
->uphy
)) {
334 ret
= PTR_ERR(hsotg
->uphy
);
343 dev_err(hsotg
->dev
, "error getting usb phy %d\n",
350 hsotg
->plat
= dev_get_platdata(hsotg
->dev
);
354 * If using the generic PHY framework, check if the PHY bus
355 * width is 8-bit and set the phyif appropriately.
357 if (phy_get_bus_width(hsotg
->phy
) == 8)
358 hsotg
->phyif
= GUSBCFG_PHYIF8
;
362 hsotg
->clk
= devm_clk_get(hsotg
->dev
, "otg");
363 if (IS_ERR(hsotg
->clk
)) {
365 dev_dbg(hsotg
->dev
, "cannot get otg clock\n");
369 for (i
= 0; i
< ARRAY_SIZE(hsotg
->supplies
); i
++)
370 hsotg
->supplies
[i
].supply
= dwc2_hsotg_supply_names
[i
];
372 ret
= devm_regulator_bulk_get(hsotg
->dev
, ARRAY_SIZE(hsotg
->supplies
),
375 dev_err(hsotg
->dev
, "failed to request supplies: %d\n", ret
);
382 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
385 * @dev: Platform device
387 * This routine is called, for example, when the rmmod command is executed. The
388 * device may or may not be electrically present. If it is present, the driver
389 * stops device processing. Any resources used on behalf of this device are
392 static int dwc2_driver_remove(struct platform_device
*dev
)
394 struct dwc2_hsotg
*hsotg
= platform_get_drvdata(dev
);
396 dwc2_debugfs_exit(hsotg
);
397 if (hsotg
->hcd_enabled
)
398 dwc2_hcd_remove(hsotg
);
399 if (hsotg
->gadget_enabled
)
400 dwc2_hsotg_remove(hsotg
);
402 if (hsotg
->ll_hw_enabled
)
403 dwc2_lowlevel_hw_disable(hsotg
);
409 * dwc2_driver_shutdown() - Called on device shutdown
411 * @dev: Platform device
413 * In specific conditions (involving usb hubs) dwc2 devices can create a
414 * lot of interrupts, even to the point of overwhelming devices running
415 * at low frequencies. Some devices need to do special clock handling
416 * at shutdown-time which may bring the system clock below the threshold
417 * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
418 * prevents reboots/poweroffs from getting stuck in such cases.
420 static void dwc2_driver_shutdown(struct platform_device
*dev
)
422 struct dwc2_hsotg
*hsotg
= platform_get_drvdata(dev
);
424 disable_irq(hsotg
->irq
);
427 static const struct of_device_id dwc2_of_match_table
[] = {
428 { .compatible
= "brcm,bcm2835-usb", .data
= ¶ms_bcm2835
},
429 { .compatible
= "hisilicon,hi6220-usb", .data
= ¶ms_hi6220
},
430 { .compatible
= "rockchip,rk3066-usb", .data
= ¶ms_rk3066
},
431 { .compatible
= "snps,dwc2", .data
= NULL
},
432 { .compatible
= "samsung,s3c6400-hsotg", .data
= NULL
},
435 MODULE_DEVICE_TABLE(of
, dwc2_of_match_table
);
438 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
441 * @dev: Platform device
443 * This routine creates the driver components required to control the device
444 * (core, HCD, and PCD) and initializes the device. The driver components are
445 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
446 * in the device private data. This allows the driver to access the dwc2_hsotg
447 * structure on subsequent calls to driver methods for this device.
449 static int dwc2_driver_probe(struct platform_device
*dev
)
451 const struct of_device_id
*match
;
452 const struct dwc2_core_params
*params
;
453 struct dwc2_core_params defparams
;
454 struct dwc2_hsotg
*hsotg
;
455 struct resource
*res
;
458 match
= of_match_device(dwc2_of_match_table
, &dev
->dev
);
459 if (match
&& match
->data
) {
460 params
= match
->data
;
462 /* Default all params to autodetect */
463 dwc2_set_all_params(&defparams
, -1);
467 * Disable descriptor dma mode by default as the HW can support
468 * it, but does not support it for SPLIT transactions.
469 * Disable it for FS devices as well.
471 defparams
.dma_desc_enable
= 0;
472 defparams
.dma_desc_fs_enable
= 0;
475 hsotg
= devm_kzalloc(&dev
->dev
, sizeof(*hsotg
), GFP_KERNEL
);
479 hsotg
->dev
= &dev
->dev
;
482 * Use reasonable defaults so platforms don't have to provide these.
484 if (!dev
->dev
.dma_mask
)
485 dev
->dev
.dma_mask
= &dev
->dev
.coherent_dma_mask
;
486 retval
= dma_set_coherent_mask(&dev
->dev
, DMA_BIT_MASK(32));
490 res
= platform_get_resource(dev
, IORESOURCE_MEM
, 0);
491 hsotg
->regs
= devm_ioremap_resource(&dev
->dev
, res
);
492 if (IS_ERR(hsotg
->regs
))
493 return PTR_ERR(hsotg
->regs
);
495 dev_dbg(&dev
->dev
, "mapped PA %08lx to VA %p\n",
496 (unsigned long)res
->start
, hsotg
->regs
);
498 retval
= dwc2_lowlevel_hw_init(hsotg
);
502 spin_lock_init(&hsotg
->lock
);
504 hsotg
->core_params
= devm_kzalloc(&dev
->dev
,
505 sizeof(*hsotg
->core_params
), GFP_KERNEL
);
506 if (!hsotg
->core_params
)
509 dwc2_set_all_params(hsotg
->core_params
, -1);
511 hsotg
->irq
= platform_get_irq(dev
, 0);
512 if (hsotg
->irq
< 0) {
513 dev_err(&dev
->dev
, "missing IRQ resource\n");
517 dev_dbg(hsotg
->dev
, "registering common handler for irq%d\n",
519 retval
= devm_request_irq(hsotg
->dev
, hsotg
->irq
,
520 dwc2_handle_common_intr
, IRQF_SHARED
,
521 dev_name(hsotg
->dev
), hsotg
);
525 retval
= dwc2_lowlevel_hw_enable(hsotg
);
529 retval
= dwc2_get_dr_mode(hsotg
);
533 /* Reset the controller and detect hardware config values */
534 retval
= dwc2_get_hwparams(hsotg
);
538 /* Validate parameter values */
539 dwc2_set_parameters(hsotg
, params
);
541 dwc2_force_dr_mode(hsotg
);
543 if (hsotg
->dr_mode
!= USB_DR_MODE_HOST
) {
544 retval
= dwc2_gadget_init(hsotg
, hsotg
->irq
);
547 hsotg
->gadget_enabled
= 1;
550 if (hsotg
->dr_mode
!= USB_DR_MODE_PERIPHERAL
) {
551 retval
= dwc2_hcd_init(hsotg
, hsotg
->irq
);
553 if (hsotg
->gadget_enabled
)
554 dwc2_hsotg_remove(hsotg
);
557 hsotg
->hcd_enabled
= 1;
560 platform_set_drvdata(dev
, hsotg
);
562 dwc2_debugfs_init(hsotg
);
564 /* Gadget code manages lowlevel hw on its own */
565 if (hsotg
->dr_mode
== USB_DR_MODE_PERIPHERAL
)
566 dwc2_lowlevel_hw_disable(hsotg
);
571 dwc2_lowlevel_hw_disable(hsotg
);
575 static int __maybe_unused
dwc2_suspend(struct device
*dev
)
577 struct dwc2_hsotg
*dwc2
= dev_get_drvdata(dev
);
580 if (dwc2_is_device_mode(dwc2
))
581 dwc2_hsotg_suspend(dwc2
);
583 if (dwc2
->ll_hw_enabled
)
584 ret
= __dwc2_lowlevel_hw_disable(dwc2
);
589 static int __maybe_unused
dwc2_resume(struct device
*dev
)
591 struct dwc2_hsotg
*dwc2
= dev_get_drvdata(dev
);
594 if (dwc2
->ll_hw_enabled
) {
595 ret
= __dwc2_lowlevel_hw_enable(dwc2
);
600 if (dwc2_is_device_mode(dwc2
))
601 ret
= dwc2_hsotg_resume(dwc2
);
606 static const struct dev_pm_ops dwc2_dev_pm_ops
= {
607 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend
, dwc2_resume
)
610 static struct platform_driver dwc2_platform_driver
= {
612 .name
= dwc2_driver_name
,
613 .of_match_table
= dwc2_of_match_table
,
614 .pm
= &dwc2_dev_pm_ops
,
616 .probe
= dwc2_driver_probe
,
617 .remove
= dwc2_driver_remove
,
618 .shutdown
= dwc2_driver_shutdown
,
621 module_platform_driver(dwc2_platform_driver
);
623 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
624 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
625 MODULE_LICENSE("Dual BSD/GPL");