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[deliverable/linux.git] / drivers / video / fbdev / imxfb.c
1 /*
2 * Freescale i.MX Frame Buffer device driver
3 *
4 * Copyright (C) 2004 Sascha Hauer, Pengutronix
5 * Based on acornfb.c Copyright (C) Russell King.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * Please direct your questions and comments on this driver to the following
12 * email address:
13 *
14 * linux-arm-kernel@lists.arm.linux.org.uk
15 */
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/string.h>
21 #include <linux/interrupt.h>
22 #include <linux/slab.h>
23 #include <linux/mm.h>
24 #include <linux/fb.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/ioport.h>
28 #include <linux/cpufreq.h>
29 #include <linux/clk.h>
30 #include <linux/platform_device.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/io.h>
33 #include <linux/lcd.h>
34 #include <linux/math64.h>
35 #include <linux/of.h>
36 #include <linux/of_device.h>
37
38 #include <linux/regulator/consumer.h>
39
40 #include <video/of_display_timing.h>
41 #include <video/of_videomode.h>
42 #include <video/videomode.h>
43
44 #include <linux/platform_data/video-imxfb.h>
45
46 /*
47 * Complain if VAR is out of range.
48 */
49 #define DEBUG_VAR 1
50
51 #define DRIVER_NAME "imx-fb"
52
53 #define LCDC_SSA 0x00
54
55 #define LCDC_SIZE 0x04
56 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
57
58 #define YMAX_MASK_IMX1 0x1ff
59 #define YMAX_MASK_IMX21 0x3ff
60
61 #define LCDC_VPW 0x08
62 #define VPW_VPW(x) ((x) & 0x3ff)
63
64 #define LCDC_CPOS 0x0C
65 #define CPOS_CC1 (1<<31)
66 #define CPOS_CC0 (1<<30)
67 #define CPOS_OP (1<<28)
68 #define CPOS_CXP(x) (((x) & 3ff) << 16)
69
70 #define LCDC_LCWHB 0x10
71 #define LCWHB_BK_EN (1<<31)
72 #define LCWHB_CW(w) (((w) & 0x1f) << 24)
73 #define LCWHB_CH(h) (((h) & 0x1f) << 16)
74 #define LCWHB_BD(x) ((x) & 0xff)
75
76 #define LCDC_LCHCC 0x14
77
78 #define LCDC_PCR 0x18
79
80 #define LCDC_HCR 0x1C
81 #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
82 #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
83 #define HCR_H_WAIT_2(x) ((x) & 0xff)
84
85 #define LCDC_VCR 0x20
86 #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
87 #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
88 #define VCR_V_WAIT_2(x) ((x) & 0xff)
89
90 #define LCDC_POS 0x24
91 #define POS_POS(x) ((x) & 1f)
92
93 #define LCDC_LSCR1 0x28
94 /* bit fields in imxfb.h */
95
96 #define LCDC_PWMR 0x2C
97 /* bit fields in imxfb.h */
98
99 #define LCDC_DMACR 0x30
100 /* bit fields in imxfb.h */
101
102 #define LCDC_RMCR 0x34
103
104 #define RMCR_LCDC_EN_MX1 (1<<1)
105
106 #define RMCR_SELF_REF (1<<0)
107
108 #define LCDC_LCDICR 0x38
109 #define LCDICR_INT_SYN (1<<2)
110 #define LCDICR_INT_CON (1)
111
112 #define LCDC_LCDISR 0x40
113 #define LCDISR_UDR_ERR (1<<3)
114 #define LCDISR_ERR_RES (1<<2)
115 #define LCDISR_EOF (1<<1)
116 #define LCDISR_BOF (1<<0)
117
118 #define IMXFB_LSCR1_DEFAULT 0x00120300
119
120 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */
121 static const char *fb_mode;
122
123 /*
124 * These are the bitfields for each
125 * display depth that we support.
126 */
127 struct imxfb_rgb {
128 struct fb_bitfield red;
129 struct fb_bitfield green;
130 struct fb_bitfield blue;
131 struct fb_bitfield transp;
132 };
133
134 enum imxfb_type {
135 IMX1_FB,
136 IMX21_FB,
137 };
138
139 struct imxfb_info {
140 struct platform_device *pdev;
141 void __iomem *regs;
142 struct clk *clk_ipg;
143 struct clk *clk_ahb;
144 struct clk *clk_per;
145 enum imxfb_type devtype;
146 bool enabled;
147
148 /*
149 * These are the addresses we mapped
150 * the framebuffer memory region to.
151 */
152 dma_addr_t map_dma;
153 u_int map_size;
154
155 u_int palette_size;
156
157 dma_addr_t dbar1;
158 dma_addr_t dbar2;
159
160 u_int pcr;
161 u_int pwmr;
162 u_int lscr1;
163 u_int dmacr;
164 bool cmap_inverse;
165 bool cmap_static;
166
167 struct imx_fb_videomode *mode;
168 int num_modes;
169
170 struct regulator *lcd_pwr;
171 };
172
173 static const struct platform_device_id imxfb_devtype[] = {
174 {
175 .name = "imx1-fb",
176 .driver_data = IMX1_FB,
177 }, {
178 .name = "imx21-fb",
179 .driver_data = IMX21_FB,
180 }, {
181 /* sentinel */
182 }
183 };
184 MODULE_DEVICE_TABLE(platform, imxfb_devtype);
185
186 static const struct of_device_id imxfb_of_dev_id[] = {
187 {
188 .compatible = "fsl,imx1-fb",
189 .data = &imxfb_devtype[IMX1_FB],
190 }, {
191 .compatible = "fsl,imx21-fb",
192 .data = &imxfb_devtype[IMX21_FB],
193 }, {
194 /* sentinel */
195 }
196 };
197 MODULE_DEVICE_TABLE(of, imxfb_of_dev_id);
198
199 static inline int is_imx1_fb(struct imxfb_info *fbi)
200 {
201 return fbi->devtype == IMX1_FB;
202 }
203
204 #define IMX_NAME "IMX"
205
206 /*
207 * Minimum X and Y resolutions
208 */
209 #define MIN_XRES 64
210 #define MIN_YRES 64
211
212 /* Actually this really is 18bit support, the lowest 2 bits of each colour
213 * are unused in hardware. We claim to have 24bit support to make software
214 * like X work, which does not support 18bit.
215 */
216 static struct imxfb_rgb def_rgb_18 = {
217 .red = {.offset = 16, .length = 8,},
218 .green = {.offset = 8, .length = 8,},
219 .blue = {.offset = 0, .length = 8,},
220 .transp = {.offset = 0, .length = 0,},
221 };
222
223 static struct imxfb_rgb def_rgb_16_tft = {
224 .red = {.offset = 11, .length = 5,},
225 .green = {.offset = 5, .length = 6,},
226 .blue = {.offset = 0, .length = 5,},
227 .transp = {.offset = 0, .length = 0,},
228 };
229
230 static struct imxfb_rgb def_rgb_16_stn = {
231 .red = {.offset = 8, .length = 4,},
232 .green = {.offset = 4, .length = 4,},
233 .blue = {.offset = 0, .length = 4,},
234 .transp = {.offset = 0, .length = 0,},
235 };
236
237 static struct imxfb_rgb def_rgb_8 = {
238 .red = {.offset = 0, .length = 8,},
239 .green = {.offset = 0, .length = 8,},
240 .blue = {.offset = 0, .length = 8,},
241 .transp = {.offset = 0, .length = 0,},
242 };
243
244 static int imxfb_activate_var(struct fb_var_screeninfo *var,
245 struct fb_info *info);
246
247 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
248 {
249 chan &= 0xffff;
250 chan >>= 16 - bf->length;
251 return chan << bf->offset;
252 }
253
254 static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
255 u_int trans, struct fb_info *info)
256 {
257 struct imxfb_info *fbi = info->par;
258 u_int val, ret = 1;
259
260 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
261 if (regno < fbi->palette_size) {
262 val = (CNVT_TOHW(red, 4) << 8) |
263 (CNVT_TOHW(green,4) << 4) |
264 CNVT_TOHW(blue, 4);
265
266 writel(val, fbi->regs + 0x800 + (regno << 2));
267 ret = 0;
268 }
269 return ret;
270 }
271
272 static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
273 u_int trans, struct fb_info *info)
274 {
275 struct imxfb_info *fbi = info->par;
276 unsigned int val;
277 int ret = 1;
278
279 /*
280 * If inverse mode was selected, invert all the colours
281 * rather than the register number. The register number
282 * is what you poke into the framebuffer to produce the
283 * colour you requested.
284 */
285 if (fbi->cmap_inverse) {
286 red = 0xffff - red;
287 green = 0xffff - green;
288 blue = 0xffff - blue;
289 }
290
291 /*
292 * If greyscale is true, then we convert the RGB value
293 * to greyscale no mater what visual we are using.
294 */
295 if (info->var.grayscale)
296 red = green = blue = (19595 * red + 38470 * green +
297 7471 * blue) >> 16;
298
299 switch (info->fix.visual) {
300 case FB_VISUAL_TRUECOLOR:
301 /*
302 * 12 or 16-bit True Colour. We encode the RGB value
303 * according to the RGB bitfield information.
304 */
305 if (regno < 16) {
306 u32 *pal = info->pseudo_palette;
307
308 val = chan_to_field(red, &info->var.red);
309 val |= chan_to_field(green, &info->var.green);
310 val |= chan_to_field(blue, &info->var.blue);
311
312 pal[regno] = val;
313 ret = 0;
314 }
315 break;
316
317 case FB_VISUAL_STATIC_PSEUDOCOLOR:
318 case FB_VISUAL_PSEUDOCOLOR:
319 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info);
320 break;
321 }
322
323 return ret;
324 }
325
326 static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi)
327 {
328 struct imx_fb_videomode *m;
329 int i;
330
331 if (!fb_mode)
332 return &fbi->mode[0];
333
334 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) {
335 if (!strcmp(m->mode.name, fb_mode))
336 return m;
337 }
338 return NULL;
339 }
340
341 /*
342 * imxfb_check_var():
343 * Round up in the following order: bits_per_pixel, xres,
344 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
345 * bitfields, horizontal timing, vertical timing.
346 */
347 static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
348 {
349 struct imxfb_info *fbi = info->par;
350 struct imxfb_rgb *rgb;
351 const struct imx_fb_videomode *imxfb_mode;
352 unsigned long lcd_clk;
353 unsigned long long tmp;
354 u32 pcr = 0;
355
356 if (var->xres < MIN_XRES)
357 var->xres = MIN_XRES;
358 if (var->yres < MIN_YRES)
359 var->yres = MIN_YRES;
360
361 imxfb_mode = imxfb_find_mode(fbi);
362 if (!imxfb_mode)
363 return -EINVAL;
364
365 var->xres = imxfb_mode->mode.xres;
366 var->yres = imxfb_mode->mode.yres;
367 var->bits_per_pixel = imxfb_mode->bpp;
368 var->pixclock = imxfb_mode->mode.pixclock;
369 var->hsync_len = imxfb_mode->mode.hsync_len;
370 var->left_margin = imxfb_mode->mode.left_margin;
371 var->right_margin = imxfb_mode->mode.right_margin;
372 var->vsync_len = imxfb_mode->mode.vsync_len;
373 var->upper_margin = imxfb_mode->mode.upper_margin;
374 var->lower_margin = imxfb_mode->mode.lower_margin;
375 var->sync = imxfb_mode->mode.sync;
376 var->xres_virtual = max(var->xres_virtual, var->xres);
377 var->yres_virtual = max(var->yres_virtual, var->yres);
378
379 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
380
381 lcd_clk = clk_get_rate(fbi->clk_per);
382
383 tmp = var->pixclock * (unsigned long long)lcd_clk;
384
385 do_div(tmp, 1000000);
386
387 if (do_div(tmp, 1000000) > 500000)
388 tmp++;
389
390 pcr = (unsigned int)tmp;
391
392 if (--pcr > 0x3F) {
393 pcr = 0x3F;
394 printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
395 lcd_clk / pcr);
396 }
397
398 switch (var->bits_per_pixel) {
399 case 32:
400 pcr |= PCR_BPIX_18;
401 rgb = &def_rgb_18;
402 break;
403 case 16:
404 default:
405 if (is_imx1_fb(fbi))
406 pcr |= PCR_BPIX_12;
407 else
408 pcr |= PCR_BPIX_16;
409
410 if (imxfb_mode->pcr & PCR_TFT)
411 rgb = &def_rgb_16_tft;
412 else
413 rgb = &def_rgb_16_stn;
414 break;
415 case 8:
416 pcr |= PCR_BPIX_8;
417 rgb = &def_rgb_8;
418 break;
419 }
420
421 /* add sync polarities */
422 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25));
423
424 fbi->pcr = pcr;
425
426 /*
427 * Copy the RGB parameters for this display
428 * from the machine specific parameters.
429 */
430 var->red = rgb->red;
431 var->green = rgb->green;
432 var->blue = rgb->blue;
433 var->transp = rgb->transp;
434
435 pr_debug("RGBT length = %d:%d:%d:%d\n",
436 var->red.length, var->green.length, var->blue.length,
437 var->transp.length);
438
439 pr_debug("RGBT offset = %d:%d:%d:%d\n",
440 var->red.offset, var->green.offset, var->blue.offset,
441 var->transp.offset);
442
443 return 0;
444 }
445
446 /*
447 * imxfb_set_par():
448 * Set the user defined part of the display for the specified console
449 */
450 static int imxfb_set_par(struct fb_info *info)
451 {
452 struct imxfb_info *fbi = info->par;
453 struct fb_var_screeninfo *var = &info->var;
454
455 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
456 info->fix.visual = FB_VISUAL_TRUECOLOR;
457 else if (!fbi->cmap_static)
458 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
459 else {
460 /*
461 * Some people have weird ideas about wanting static
462 * pseudocolor maps. I suspect their user space
463 * applications are broken.
464 */
465 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
466 }
467
468 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
469 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
470
471 imxfb_activate_var(var, info);
472
473 return 0;
474 }
475
476 static void imxfb_enable_controller(struct imxfb_info *fbi)
477 {
478
479 if (fbi->enabled)
480 return;
481
482 pr_debug("Enabling LCD controller\n");
483
484 writel(fbi->map_dma, fbi->regs + LCDC_SSA);
485
486 /* panning offset 0 (0 pixel offset) */
487 writel(0x00000000, fbi->regs + LCDC_POS);
488
489 /* disable hardware cursor */
490 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
491 fbi->regs + LCDC_CPOS);
492
493 /*
494 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
495 * on other SoCs
496 */
497 writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
498
499 clk_prepare_enable(fbi->clk_ipg);
500 clk_prepare_enable(fbi->clk_ahb);
501 clk_prepare_enable(fbi->clk_per);
502 fbi->enabled = true;
503 }
504
505 static void imxfb_disable_controller(struct imxfb_info *fbi)
506 {
507 if (!fbi->enabled)
508 return;
509
510 pr_debug("Disabling LCD controller\n");
511
512 clk_disable_unprepare(fbi->clk_per);
513 clk_disable_unprepare(fbi->clk_ipg);
514 clk_disable_unprepare(fbi->clk_ahb);
515 fbi->enabled = false;
516
517 writel(0, fbi->regs + LCDC_RMCR);
518 }
519
520 static int imxfb_blank(int blank, struct fb_info *info)
521 {
522 struct imxfb_info *fbi = info->par;
523
524 pr_debug("imxfb_blank: blank=%d\n", blank);
525
526 switch (blank) {
527 case FB_BLANK_POWERDOWN:
528 case FB_BLANK_VSYNC_SUSPEND:
529 case FB_BLANK_HSYNC_SUSPEND:
530 case FB_BLANK_NORMAL:
531 imxfb_disable_controller(fbi);
532 break;
533
534 case FB_BLANK_UNBLANK:
535 imxfb_enable_controller(fbi);
536 break;
537 }
538 return 0;
539 }
540
541 static struct fb_ops imxfb_ops = {
542 .owner = THIS_MODULE,
543 .fb_check_var = imxfb_check_var,
544 .fb_set_par = imxfb_set_par,
545 .fb_setcolreg = imxfb_setcolreg,
546 .fb_fillrect = cfb_fillrect,
547 .fb_copyarea = cfb_copyarea,
548 .fb_imageblit = cfb_imageblit,
549 .fb_blank = imxfb_blank,
550 };
551
552 /*
553 * imxfb_activate_var():
554 * Configures LCD Controller based on entries in var parameter. Settings are
555 * only written to the controller if changes were made.
556 */
557 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
558 {
559 struct imxfb_info *fbi = info->par;
560 u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
561
562 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
563 var->xres, var->hsync_len,
564 var->left_margin, var->right_margin);
565 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
566 var->yres, var->vsync_len,
567 var->upper_margin, var->lower_margin);
568
569 #if DEBUG_VAR
570 if (var->xres < 16 || var->xres > 1024)
571 printk(KERN_ERR "%s: invalid xres %d\n",
572 info->fix.id, var->xres);
573 if (var->hsync_len < 1 || var->hsync_len > 64)
574 printk(KERN_ERR "%s: invalid hsync_len %d\n",
575 info->fix.id, var->hsync_len);
576 if (var->left_margin > 255)
577 printk(KERN_ERR "%s: invalid left_margin %d\n",
578 info->fix.id, var->left_margin);
579 if (var->right_margin > 255)
580 printk(KERN_ERR "%s: invalid right_margin %d\n",
581 info->fix.id, var->right_margin);
582 if (var->yres < 1 || var->yres > ymax_mask)
583 printk(KERN_ERR "%s: invalid yres %d\n",
584 info->fix.id, var->yres);
585 if (var->vsync_len > 100)
586 printk(KERN_ERR "%s: invalid vsync_len %d\n",
587 info->fix.id, var->vsync_len);
588 if (var->upper_margin > 63)
589 printk(KERN_ERR "%s: invalid upper_margin %d\n",
590 info->fix.id, var->upper_margin);
591 if (var->lower_margin > 255)
592 printk(KERN_ERR "%s: invalid lower_margin %d\n",
593 info->fix.id, var->lower_margin);
594 #endif
595
596 /* physical screen start address */
597 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
598 fbi->regs + LCDC_VPW);
599
600 writel(HCR_H_WIDTH(var->hsync_len - 1) |
601 HCR_H_WAIT_1(var->right_margin - 1) |
602 HCR_H_WAIT_2(var->left_margin - 3),
603 fbi->regs + LCDC_HCR);
604
605 writel(VCR_V_WIDTH(var->vsync_len) |
606 VCR_V_WAIT_1(var->lower_margin) |
607 VCR_V_WAIT_2(var->upper_margin),
608 fbi->regs + LCDC_VCR);
609
610 writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
611 fbi->regs + LCDC_SIZE);
612
613 writel(fbi->pcr, fbi->regs + LCDC_PCR);
614 if (fbi->pwmr)
615 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
616 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
617
618 /* dmacr = 0 is no valid value, as we need DMA control marks. */
619 if (fbi->dmacr)
620 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
621
622 return 0;
623 }
624
625 static int imxfb_init_fbinfo(struct platform_device *pdev)
626 {
627 struct imx_fb_platform_data *pdata = dev_get_platdata(&pdev->dev);
628 struct fb_info *info = dev_get_drvdata(&pdev->dev);
629 struct imxfb_info *fbi = info->par;
630 struct device_node *np;
631
632 pr_debug("%s\n",__func__);
633
634 info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
635 if (!info->pseudo_palette)
636 return -ENOMEM;
637
638 memset(fbi, 0, sizeof(struct imxfb_info));
639
640 fbi->devtype = pdev->id_entry->driver_data;
641
642 strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
643
644 info->fix.type = FB_TYPE_PACKED_PIXELS;
645 info->fix.type_aux = 0;
646 info->fix.xpanstep = 0;
647 info->fix.ypanstep = 0;
648 info->fix.ywrapstep = 0;
649 info->fix.accel = FB_ACCEL_NONE;
650
651 info->var.nonstd = 0;
652 info->var.activate = FB_ACTIVATE_NOW;
653 info->var.height = -1;
654 info->var.width = -1;
655 info->var.accel_flags = 0;
656 info->var.vmode = FB_VMODE_NONINTERLACED;
657
658 info->fbops = &imxfb_ops;
659 info->flags = FBINFO_FLAG_DEFAULT |
660 FBINFO_READS_FAST;
661 if (pdata) {
662 fbi->lscr1 = pdata->lscr1;
663 fbi->dmacr = pdata->dmacr;
664 fbi->pwmr = pdata->pwmr;
665 } else {
666 np = pdev->dev.of_node;
667 info->var.grayscale = of_property_read_bool(np,
668 "cmap-greyscale");
669 fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse");
670 fbi->cmap_static = of_property_read_bool(np, "cmap-static");
671
672 fbi->lscr1 = IMXFB_LSCR1_DEFAULT;
673
674 of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr);
675
676 of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1);
677
678 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr);
679 }
680
681 return 0;
682 }
683
684 static int imxfb_of_read_mode(struct device *dev, struct device_node *np,
685 struct imx_fb_videomode *imxfb_mode)
686 {
687 int ret;
688 struct fb_videomode *of_mode = &imxfb_mode->mode;
689 u32 bpp;
690 u32 pcr;
691
692 ret = of_property_read_string(np, "model", &of_mode->name);
693 if (ret)
694 of_mode->name = NULL;
695
696 ret = of_get_fb_videomode(np, of_mode, OF_USE_NATIVE_MODE);
697 if (ret) {
698 dev_err(dev, "Failed to get videomode from DT\n");
699 return ret;
700 }
701
702 ret = of_property_read_u32(np, "bits-per-pixel", &bpp);
703 ret |= of_property_read_u32(np, "fsl,pcr", &pcr);
704
705 if (ret) {
706 dev_err(dev, "Failed to read bpp and pcr from DT\n");
707 return -EINVAL;
708 }
709
710 if (bpp < 1 || bpp > 255) {
711 dev_err(dev, "Bits per pixel have to be between 1 and 255\n");
712 return -EINVAL;
713 }
714
715 imxfb_mode->bpp = bpp;
716 imxfb_mode->pcr = pcr;
717
718 return 0;
719 }
720
721 static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi)
722 {
723 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
724
725 if (!fi || fi->par == fbi)
726 return 1;
727
728 return 0;
729 }
730
731 static int imxfb_lcd_get_contrast(struct lcd_device *lcddev)
732 {
733 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
734
735 return fbi->pwmr & 0xff;
736 }
737
738 static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast)
739 {
740 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
741
742 if (fbi->pwmr && fbi->enabled) {
743 if (contrast > 255)
744 contrast = 255;
745 else if (contrast < 0)
746 contrast = 0;
747
748 fbi->pwmr &= ~0xff;
749 fbi->pwmr |= contrast;
750
751 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
752 }
753
754 return 0;
755 }
756
757 static int imxfb_lcd_get_power(struct lcd_device *lcddev)
758 {
759 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
760
761 if (!IS_ERR(fbi->lcd_pwr))
762 return regulator_is_enabled(fbi->lcd_pwr);
763
764 return 1;
765 }
766
767 static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power)
768 {
769 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
770
771 if (!IS_ERR(fbi->lcd_pwr)) {
772 if (power)
773 return regulator_enable(fbi->lcd_pwr);
774 else
775 return regulator_disable(fbi->lcd_pwr);
776 }
777
778 return 0;
779 }
780
781 static struct lcd_ops imxfb_lcd_ops = {
782 .check_fb = imxfb_lcd_check_fb,
783 .get_contrast = imxfb_lcd_get_contrast,
784 .set_contrast = imxfb_lcd_set_contrast,
785 .get_power = imxfb_lcd_get_power,
786 .set_power = imxfb_lcd_set_power,
787 };
788
789 static int imxfb_setup(void)
790 {
791 char *opt, *options = NULL;
792
793 if (fb_get_options("imxfb", &options))
794 return -ENODEV;
795
796 if (!options || !*options)
797 return 0;
798
799 while ((opt = strsep(&options, ",")) != NULL) {
800 if (!*opt)
801 continue;
802 else
803 fb_mode = opt;
804 }
805
806 return 0;
807 }
808
809 static int imxfb_probe(struct platform_device *pdev)
810 {
811 struct imxfb_info *fbi;
812 struct lcd_device *lcd;
813 struct fb_info *info;
814 struct imx_fb_platform_data *pdata;
815 struct resource *res;
816 struct imx_fb_videomode *m;
817 const struct of_device_id *of_id;
818 int ret, i;
819 int bytes_per_pixel;
820
821 dev_info(&pdev->dev, "i.MX Framebuffer driver\n");
822
823 ret = imxfb_setup();
824 if (ret < 0)
825 return ret;
826
827 of_id = of_match_device(imxfb_of_dev_id, &pdev->dev);
828 if (of_id)
829 pdev->id_entry = of_id->data;
830
831 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
832 if (!res)
833 return -ENODEV;
834
835 pdata = dev_get_platdata(&pdev->dev);
836
837 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
838 if (!info)
839 return -ENOMEM;
840
841 fbi = info->par;
842
843 platform_set_drvdata(pdev, info);
844
845 ret = imxfb_init_fbinfo(pdev);
846 if (ret < 0)
847 goto failed_init;
848
849 if (pdata) {
850 if (!fb_mode)
851 fb_mode = pdata->mode[0].mode.name;
852
853 fbi->mode = pdata->mode;
854 fbi->num_modes = pdata->num_modes;
855 } else {
856 struct device_node *display_np;
857 fb_mode = NULL;
858
859 display_np = of_parse_phandle(pdev->dev.of_node, "display", 0);
860 if (!display_np) {
861 dev_err(&pdev->dev, "No display defined in devicetree\n");
862 ret = -EINVAL;
863 goto failed_of_parse;
864 }
865
866 /*
867 * imxfb does not support more modes, we choose only the native
868 * mode.
869 */
870 fbi->num_modes = 1;
871
872 fbi->mode = devm_kzalloc(&pdev->dev,
873 sizeof(struct imx_fb_videomode), GFP_KERNEL);
874 if (!fbi->mode) {
875 ret = -ENOMEM;
876 goto failed_of_parse;
877 }
878
879 ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode);
880 if (ret)
881 goto failed_of_parse;
882 }
883
884 /* Calculate maximum bytes used per pixel. In most cases this should
885 * be the same as m->bpp/8 */
886 m = &fbi->mode[0];
887 bytes_per_pixel = (m->bpp + 7) / 8;
888 for (i = 0; i < fbi->num_modes; i++, m++)
889 info->fix.smem_len = max_t(size_t, info->fix.smem_len,
890 m->mode.xres * m->mode.yres * bytes_per_pixel);
891
892 res = request_mem_region(res->start, resource_size(res),
893 DRIVER_NAME);
894 if (!res) {
895 ret = -EBUSY;
896 goto failed_req;
897 }
898
899 fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
900 if (IS_ERR(fbi->clk_ipg)) {
901 ret = PTR_ERR(fbi->clk_ipg);
902 goto failed_getclock;
903 }
904
905 /*
906 * The LCDC controller does not have an enable bit. The
907 * controller starts directly when the clocks are enabled.
908 * If the clocks are enabled when the controller is not yet
909 * programmed with proper register values (enabled at the
910 * bootloader, for example) then it just goes into some undefined
911 * state.
912 * To avoid this issue, let's enable and disable LCDC IPG clock
913 * so that we force some kind of 'reset' to the LCDC block.
914 */
915 ret = clk_prepare_enable(fbi->clk_ipg);
916 if (ret)
917 goto failed_getclock;
918 clk_disable_unprepare(fbi->clk_ipg);
919
920 fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
921 if (IS_ERR(fbi->clk_ahb)) {
922 ret = PTR_ERR(fbi->clk_ahb);
923 goto failed_getclock;
924 }
925
926 fbi->clk_per = devm_clk_get(&pdev->dev, "per");
927 if (IS_ERR(fbi->clk_per)) {
928 ret = PTR_ERR(fbi->clk_per);
929 goto failed_getclock;
930 }
931
932 fbi->regs = ioremap(res->start, resource_size(res));
933 if (fbi->regs == NULL) {
934 dev_err(&pdev->dev, "Cannot map frame buffer registers\n");
935 ret = -ENOMEM;
936 goto failed_ioremap;
937 }
938
939 fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
940 info->screen_base = dma_alloc_wc(&pdev->dev, fbi->map_size,
941 &fbi->map_dma, GFP_KERNEL);
942
943 if (!info->screen_base) {
944 dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret);
945 ret = -ENOMEM;
946 goto failed_map;
947 }
948
949 info->fix.smem_start = fbi->map_dma;
950
951 if (pdata && pdata->init) {
952 ret = pdata->init(fbi->pdev);
953 if (ret)
954 goto failed_platform_init;
955 }
956
957
958 INIT_LIST_HEAD(&info->modelist);
959 for (i = 0; i < fbi->num_modes; i++)
960 fb_add_videomode(&fbi->mode[i].mode, &info->modelist);
961
962 /*
963 * This makes sure that our colour bitfield
964 * descriptors are correctly initialised.
965 */
966 imxfb_check_var(&info->var, info);
967
968 ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0);
969 if (ret < 0)
970 goto failed_cmap;
971
972 imxfb_set_par(info);
973 ret = register_framebuffer(info);
974 if (ret < 0) {
975 dev_err(&pdev->dev, "failed to register framebuffer\n");
976 goto failed_register;
977 }
978
979 fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd");
980 if (IS_ERR(fbi->lcd_pwr) && (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER)) {
981 ret = -EPROBE_DEFER;
982 goto failed_lcd;
983 }
984
985 lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi,
986 &imxfb_lcd_ops);
987 if (IS_ERR(lcd)) {
988 ret = PTR_ERR(lcd);
989 goto failed_lcd;
990 }
991
992 lcd->props.max_contrast = 0xff;
993
994 imxfb_enable_controller(fbi);
995 fbi->pdev = pdev;
996
997 return 0;
998
999 failed_lcd:
1000 unregister_framebuffer(info);
1001
1002 failed_register:
1003 fb_dealloc_cmap(&info->cmap);
1004 failed_cmap:
1005 if (pdata && pdata->exit)
1006 pdata->exit(fbi->pdev);
1007 failed_platform_init:
1008 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base,
1009 fbi->map_dma);
1010 failed_map:
1011 iounmap(fbi->regs);
1012 failed_ioremap:
1013 failed_getclock:
1014 release_mem_region(res->start, resource_size(res));
1015 failed_req:
1016 failed_of_parse:
1017 kfree(info->pseudo_palette);
1018 failed_init:
1019 framebuffer_release(info);
1020 return ret;
1021 }
1022
1023 static int imxfb_remove(struct platform_device *pdev)
1024 {
1025 struct imx_fb_platform_data *pdata;
1026 struct fb_info *info = platform_get_drvdata(pdev);
1027 struct imxfb_info *fbi = info->par;
1028 struct resource *res;
1029
1030 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1031
1032 imxfb_disable_controller(fbi);
1033
1034 unregister_framebuffer(info);
1035
1036 pdata = dev_get_platdata(&pdev->dev);
1037 if (pdata && pdata->exit)
1038 pdata->exit(fbi->pdev);
1039
1040 fb_dealloc_cmap(&info->cmap);
1041 kfree(info->pseudo_palette);
1042 framebuffer_release(info);
1043
1044 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base,
1045 fbi->map_dma);
1046
1047 iounmap(fbi->regs);
1048 release_mem_region(res->start, resource_size(res));
1049
1050 return 0;
1051 }
1052
1053 static int __maybe_unused imxfb_suspend(struct device *dev)
1054 {
1055 struct fb_info *info = dev_get_drvdata(dev);
1056 struct imxfb_info *fbi = info->par;
1057
1058 imxfb_disable_controller(fbi);
1059
1060 return 0;
1061 }
1062
1063 static int __maybe_unused imxfb_resume(struct device *dev)
1064 {
1065 struct fb_info *info = dev_get_drvdata(dev);
1066 struct imxfb_info *fbi = info->par;
1067
1068 imxfb_enable_controller(fbi);
1069
1070 return 0;
1071 }
1072
1073 static SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume);
1074
1075 static struct platform_driver imxfb_driver = {
1076 .driver = {
1077 .name = DRIVER_NAME,
1078 .of_match_table = imxfb_of_dev_id,
1079 .pm = &imxfb_pm_ops,
1080 },
1081 .probe = imxfb_probe,
1082 .remove = imxfb_remove,
1083 .id_table = imxfb_devtype,
1084 };
1085 module_platform_driver(imxfb_driver);
1086
1087 MODULE_DESCRIPTION("Freescale i.MX framebuffer driver");
1088 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1089 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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