elfcpp/mips.h

   1 // mips.h -- ELF definitions specific to EM_MIPS  -*- C++ -*-
   2
   3 // Copyright (C) 2012-2015 Free Software Foundation, Inc.
   4 // Written by Sasa Stankovic <sasa.stankovic@imgtec.com>
   5 //        and Aleksandar Simeonov <aleksandar.simeonov@rt-rk.com>.
   6
   7 // This file is part of elfcpp.
   8
   9 // This program is free software; you can redistribute it and/or
  10 // modify it under the terms of the GNU Library General Public License
  11 // as published by the Free Software Foundation; either version 2, or
  12 // (at your option) any later version.
  13
  14 // In addition to the permissions in the GNU Library General Public
  15 // License, the Free Software Foundation gives you unlimited
  16 // permission to link the compiled version of this file into
  17 // combinations with other programs, and to distribute those
  18 // combinations without any restriction coming from the use of this
  19 // file.  (The Library Public License restrictions do apply in other
  20 // respects; for example, they cover modification of the file, and
  21 /// distribution when not linked into a combined executable.)
  22
  23 // This program is distributed in the hope that it will be useful, but
  24 // WITHOUT ANY WARRANTY; without even the implied warranty of
  25 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  26 // Library General Public License for more details.
  27
  28 // You should have received a copy of the GNU Library General Public
  29 // License along with this program; if not, write to the Free Software
  30 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
  31 // 02110-1301, USA.
  32
  33 #ifndef ELFCPP_MIPS_H
  34 #define ELFCPP_MIPS_H
  35
  36 // Documentation for the MIPS relocs is taken from
  37 //   http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf
  38
  39 namespace elfcpp
  40 {
  41
  42 //
  43 // MIPS Relocation Codes
  44 //
  45
  46 enum
  47 {
  48   R_MIPS_NONE = 0,
  49   R_MIPS_16 = 1,
  50   R_MIPS_32 = 2,                   // In Elf 64: alias R_MIPS_ADD
  51   R_MIPS_REL32 = 3,                // In Elf 64: alias R_MIPS_REL
  52   R_MIPS_26 = 4,
  53   R_MIPS_HI16 = 5,
  54   R_MIPS_LO16 = 6,
  55   R_MIPS_GPREL16 = 7,              // In Elf 64: alias R_MIPS_GPREL
  56   R_MIPS_LITERAL = 8,
  57   R_MIPS_GOT16 = 9,                // In Elf 64: alias R_MIPS_GOT
  58   R_MIPS_PC16 = 10,
  59   R_MIPS_CALL16 = 11,              // In Elf 64: alias R_MIPS_CALL
  60   R_MIPS_GPREL32 = 12,
  61   R_MIPS_UNUSED1 = 13,
  62   R_MIPS_UNUSED2 = 14,
  63   R_MIPS_UNUSED3 = 15,
  64   R_MIPS_SHIFT5 = 16,
  65   R_MIPS_SHIFT6 = 17,
  66   R_MIPS_64 = 18,
  67   R_MIPS_GOT_DISP = 19,
  68   R_MIPS_GOT_PAGE = 20,
  69   R_MIPS_GOT_OFST = 21,
  70   R_MIPS_GOT_HI16 = 22,
  71   R_MIPS_GOT_LO16 = 23,
  72   R_MIPS_SUB = 24,
  73   R_MIPS_INSERT_A = 25,
  74   R_MIPS_INSERT_B = 26,
  75   R_MIPS_DELETE = 27,
  76   R_MIPS_HIGHER = 28,
  77   R_MIPS_HIGHEST = 29,
  78   R_MIPS_CALL_HI16 = 30,
  79   R_MIPS_CALL_LO16 = 31,
  80   R_MIPS_SCN_DISP = 32,
  81   R_MIPS_REL16 = 33,
  82   R_MIPS_ADD_IMMEDIATE = 34,
  83   R_MIPS_PJUMP = 35,
  84   R_MIPS_RELGOT = 36,
  85   R_MIPS_JALR = 37,
  86   // TLS relocations.
  87   R_MIPS_TLS_DTPMOD32 = 38,
  88   R_MIPS_TLS_DTPREL32 = 39,
  89   R_MIPS_TLS_DTPMOD64 = 40,
  90   R_MIPS_TLS_DTPREL64 = 41,
  91   R_MIPS_TLS_GD = 42,
  92   R_MIPS_TLS_LDM = 43,
  93   R_MIPS_TLS_DTPREL_HI16 = 44,
  94   R_MIPS_TLS_DTPREL_LO16 = 45,
  95   R_MIPS_TLS_GOTTPREL = 46,
  96   R_MIPS_TLS_TPREL32 = 47,
  97   R_MIPS_TLS_TPREL64 = 48,
  98   R_MIPS_TLS_TPREL_HI16 = 49,
  99   R_MIPS_TLS_TPREL_LO16 = 50,
 100   R_MIPS_GLOB_DAT = 51,
 101   // These relocs are used for the mips16.
 102   R_MIPS16_26 = 100,
 103   R_MIPS16_GPREL = 101,
 104   R_MIPS16_GOT16 = 102,
 105   R_MIPS16_CALL16 = 103,
 106   R_MIPS16_HI16 = 104,
 107   R_MIPS16_LO16 = 105,
 108   R_MIPS16_TLS_GD = 106,
 109   R_MIPS16_TLS_LDM = 107,
 110   R_MIPS16_TLS_DTPREL_HI16 = 108,
 111   R_MIPS16_TLS_DTPREL_LO16 = 109,
 112   R_MIPS16_TLS_GOTTPREL = 110,
 113   R_MIPS16_TLS_TPREL_HI16 = 111,
 114   R_MIPS16_TLS_TPREL_LO16 = 112,
 115
 116   R_MIPS_COPY = 126,
 117   R_MIPS_JUMP_SLOT = 127,
 118
 119   // These relocations are specific to microMIPS.
 120   R_MICROMIPS_26_S1 = 133,
 121   R_MICROMIPS_HI16 = 134,
 122   R_MICROMIPS_LO16 = 135,
 123   R_MICROMIPS_GPREL16 = 136,       // In Elf 64: alias R_MICROMIPS_GPREL
 124   R_MICROMIPS_LITERAL = 137,
 125   R_MICROMIPS_GOT16 = 138,         // In Elf 64: alias R_MICROMIPS_GOT
 126   R_MICROMIPS_PC7_S1 = 139,
 127   R_MICROMIPS_PC10_S1 = 140,
 128   R_MICROMIPS_PC16_S1 = 141,
 129   R_MICROMIPS_CALL16 = 142,        // In Elf 64: alias R_MICROMIPS_CALL
 130   R_MICROMIPS_GOT_DISP = 145,
 131   R_MICROMIPS_GOT_PAGE = 146,
 132   R_MICROMIPS_GOT_OFST = 147,
 133   R_MICROMIPS_GOT_HI16 = 148,
 134   R_MICROMIPS_GOT_LO16 = 149,
 135   R_MICROMIPS_SUB = 150,
 136   R_MICROMIPS_HIGHER = 151,
 137   R_MICROMIPS_HIGHEST = 152,
 138   R_MICROMIPS_CALL_HI16 = 153,
 139   R_MICROMIPS_CALL_LO16 = 154,
 140   R_MICROMIPS_SCN_DISP = 155,
 141   R_MICROMIPS_JALR = 156,
 142   R_MICROMIPS_HI0_LO16 = 157,
 143   // TLS relocations.
 144   R_MICROMIPS_TLS_GD = 162,
 145   R_MICROMIPS_TLS_LDM = 163,
 146   R_MICROMIPS_TLS_DTPREL_HI16 = 164,
 147   R_MICROMIPS_TLS_DTPREL_LO16 = 165,
 148   R_MICROMIPS_TLS_GOTTPREL = 166,
 149   R_MICROMIPS_TLS_TPREL_HI16 = 169,
 150   R_MICROMIPS_TLS_TPREL_LO16 = 170,
 151   // microMIPS GP- and PC-relative relocations.
 152   R_MICROMIPS_GPREL7_S2 = 172,
 153   R_MICROMIPS_PC23_S2 = 173,
 154
 155   // This was a GNU extension used by embedded-PIC.  It was co-opted by
 156   // mips-linux for exception-handling data.  GCC stopped using it in
 157   // May, 2004, then started using it again for compact unwind tables.
 158   R_MIPS_PC32 = 248,
 159   R_MIPS_EH = 249,
 160   // This relocation is used internally by gas.
 161   R_MIPS_GNU_REL16_S2 = 250,
 162   // These are GNU extensions to enable C++ vtable garbage collection.
 163   R_MIPS_GNU_VTINHERIT = 253,
 164   R_MIPS_GNU_VTENTRY = 254
 165 };
 166
 167 // Processor specific flags for the ELF header e_flags field.
 168 enum
 169 {
 170   // At least one .noreorder directive appears in the source.
 171   EF_MIPS_NOREORDER = 0x00000001,
 172   // File contains position independent code.
 173   EF_MIPS_PIC = 0x00000002,
 174   // Code in file uses the standard calling sequence for calling
 175   // position independent code.
 176   EF_MIPS_CPIC = 0x00000004,
 177   // ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.
 178   EF_MIPS_XGOT = 0x00000008,
 179   // Code in file uses UCODE (obsolete)
 180   EF_MIPS_UCODE = 0x00000010,
 181   // Code in file uses new ABI (-n32 on Irix 6).
 182   EF_MIPS_ABI2 = 0x00000020,
 183   // Process the .MIPS.options section first by ld
 184   EF_MIPS_OPTIONS_FIRST = 0x00000080,
 185   // Architectural Extensions used by this file
 186   EF_MIPS_ARCH_ASE = 0x0f000000,
 187   // Use MDMX multimedia extensions
 188   EF_MIPS_ARCH_ASE_MDMX = 0x08000000,
 189   // Use MIPS-16 ISA extensions
 190   EF_MIPS_ARCH_ASE_M16 = 0x04000000,
 191   // Use MICROMIPS ISA extensions.
 192   EF_MIPS_ARCH_ASE_MICROMIPS = 0x02000000,
 193   // Indicates code compiled for a 64-bit machine in 32-bit mode.
 194   // (regs are 32-bits wide.)
 195   EF_MIPS_32BITMODE = 0x00000100,
 196   // MIPS dynamic
 197   EF_MIPS_DYNAMIC = 0x40
 198 };
 199
 200 // Machine variant if we know it.  This field was invented at Cygnus,
 201 // but it is hoped that other vendors will adopt it.  If some standard
 202 // is developed, this code should be changed to follow it.
 203 enum
 204 {
 205   EF_MIPS_MACH = 0x00FF0000,
 206
 207 // Cygnus is choosing values between 80 and 9F;
 208 // 00 - 7F should be left for a future standard;
 209 // the rest are open.
 210
 211   E_MIPS_MACH_3900 = 0x00810000,
 212   E_MIPS_MACH_4010 = 0x00820000,
 213   E_MIPS_MACH_4100 = 0x00830000,
 214   E_MIPS_MACH_4650 = 0x00850000,
 215   E_MIPS_MACH_4120 = 0x00870000,
 216   E_MIPS_MACH_4111 = 0x00880000,
 217   E_MIPS_MACH_SB1 = 0x008a0000,
 218   E_MIPS_MACH_OCTEON = 0x008b0000,
 219   E_MIPS_MACH_XLR = 0x008c0000,
 220   E_MIPS_MACH_OCTEON2 = 0x008d0000,
 221   E_MIPS_MACH_OCTEON3 = 0x008e0000,
 222   E_MIPS_MACH_5400 = 0x00910000,
 223   E_MIPS_MACH_5500 = 0x00980000,
 224   E_MIPS_MACH_9000 = 0x00990000,
 225   E_MIPS_MACH_LS2E = 0x00A00000,
 226   E_MIPS_MACH_LS2F = 0x00A10000,
 227   E_MIPS_MACH_LS3A = 0x00A20000,
 228 };
 229
 230 // MIPS architecture
 231 enum
 232 {
 233   // Four bit MIPS architecture field.
 234   EF_MIPS_ARCH = 0xf0000000,
 235   // -mips1 code.
 236   E_MIPS_ARCH_1 = 0x00000000,
 237   // -mips2 code.
 238   E_MIPS_ARCH_2 = 0x10000000,
 239   // -mips3 code.
 240   E_MIPS_ARCH_3 = 0x20000000,
 241   // -mips4 code.
 242   E_MIPS_ARCH_4 = 0x30000000,
 243   // -mips5 code.
 244   E_MIPS_ARCH_5 = 0x40000000,
 245   // -mips32 code.
 246   E_MIPS_ARCH_32 = 0x50000000,
 247   // -mips64 code.
 248   E_MIPS_ARCH_64 = 0x60000000,
 249   // -mips32r2 code.
 250   E_MIPS_ARCH_32R2 = 0x70000000,
 251   // -mips64r2 code.
 252   E_MIPS_ARCH_64R2 = 0x80000000,
 253   // -mips32r6 code.
 254   E_MIPS_ARCH_32R6 = 0x90000000,
 255   // -mips64r6 code.
 256   E_MIPS_ARCH_64R6 = 0xa0000000,
 257 };
 258
 259 enum
 260 {
 261   // Mask to extract ABI version, not really a flag value.
 262   EF_MIPS_ABI = 0x0000F000,
 263
 264   // The original o32 abi.
 265   E_MIPS_ABI_O32 = 0x00001000,
 266   // O32 extended to work on 64 bit architectures
 267   E_MIPS_ABI_O64 = 0x00002000,
 268   // EABI in 32 bit mode
 269   E_MIPS_ABI_EABI32 = 0x00003000,
 270   // EABI in 64 bit mode
 271   E_MIPS_ABI_EABI64 = 0x00004000,
 272 };
 273
 274 // Dynamic section MIPS flags
 275 enum
 276 {
 277   // None
 278   RHF_NONE = 0x00000000,
 279   // Use shortcut pointers
 280   RHF_QUICKSTART = 0x00000001,
 281   // Hash size not power of two
 282   RHF_NOTPOT = 0x00000002,
 283   // Ignore LD_LIBRARY_PATH
 284   RHF_NO_LIBRARY_REPLACEMENT = 0x00000004
 285 };
 286
 287 // Special values for the st_other field in the symbol table.
 288 enum
 289 {
 290   // Two topmost bits denote the MIPS ISA for .text symbols:
 291   // + 00 -- standard MIPS code,
 292   // + 10 -- microMIPS code,
 293   // + 11 -- MIPS16 code; requires the following two bits to be set too.
 294   // Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.
 295   STO_MIPS_ISA = 0xc0,
 296
 297   // The mask spanning the rest of MIPS psABI flags.  At most one is expected
 298   // to be set except for STO_MIPS16.
 299   STO_MIPS_FLAGS = ~(STO_MIPS_ISA | 0x3),
 300
 301   // The MIPS psABI was updated in 2008 with support for PLTs and copy
 302   // relocs.  There are therefore two types of nonzero SHN_UNDEF functions:
 303   // PLT entries and traditional MIPS lazy binding stubs.  We mark the former
 304   // with STO_MIPS_PLT to distinguish them from the latter.
 305   STO_MIPS_PLT = 0x8,
 306
 307   // This value is used to mark PIC functions in an object that mixes
 308   // PIC and non-PIC.  Note that this bit overlaps with STO_MIPS16,
 309   // although MIPS16 symbols are never considered to be MIPS_PIC.
 310   STO_MIPS_PIC = 0x20,
 311
 312   // This value is used for a mips16 .text symbol.
 313   STO_MIPS16 = 0xf0,
 314
 315   // This value is used for a microMIPS .text symbol.  To distinguish from
 316   // STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS.  The
 317   // mask is STO_MIPS_ISA.
 318   STO_MICROMIPS  = 0x80
 319 };
 320
 321 // Values for base offsets for thread-local storage
 322 enum
 323 {
 324   TP_OFFSET = 0x7000,
 325   DTP_OFFSET = 0x8000
 326 };
 327
 328
 329 bool
 330 elf_st_is_mips16(unsigned char st_other)
 331 { return (st_other & elfcpp::STO_MIPS16) == elfcpp::STO_MIPS16; }
 332
 333 bool
 334 elf_st_is_micromips(unsigned char st_other)
 335 { return (st_other & elfcpp::STO_MIPS_ISA) == elfcpp::STO_MICROMIPS; }
 336
 337 // Whether the ABI is N32.
 338 bool
 339 abi_n32(elfcpp::Elf_Word e_flags)
 340 { return (e_flags & elfcpp::EF_MIPS_ABI2) != 0; }
 341
 342 // Whether the ABI is N64.
 343 bool
 344 abi_64(unsigned char ei_class)
 345 { return ei_class == elfcpp::ELFCLASS64; }
 346
 347 // Whether the file has microMIPS code.
 348 bool
 349 is_micromips(elfcpp::Elf_Word e_flags)
 350 { return (e_flags & elfcpp::EF_MIPS_ARCH_ASE_MICROMIPS) != 0; }
 351
 352 // Values which may appear in the kind field of an Elf_Options structure.
 353 enum
 354 {
 355   // Undefined.
 356   ODK_NULL = 0,
 357   // Register usage and GP value.
 358   ODK_REGINFO = 1,
 359   // Exception processing information.
 360   ODK_EXCEPTIONS = 2,
 361   // Section padding information.
 362   ODK_PAD = 3,
 363   // Hardware workarounds performed.
 364   ODK_HWPATCH = 4,
 365   // Fill value used by the linker.
 366   ODK_FILL = 5,
 367   // Reserved space for desktop tools.
 368   ODK_TAGS = 6,
 369   // Hardware workarounds, AND bits when merging.
 370   ODK_HWAND = 7,
 371   // Hardware workarounds, OR bits when merging.
 372   ODK_HWOR = 8,
 373   // GP group to use for text/data sections.
 374   ODK_GP_GROUP = 9,
 375   // ID information.
 376   ODK_IDENT = 10
 377 };
 378
 379 } // End namespace elfcpp.
 380
 381 #endif // !defined(ELFCPP_MIPS_H)