1 2013-12-03 Tristan Gingold <gingold@adacore.com>
3 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
6 2013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
10 2013-11-19 Nick Clifton <nickc@redhat.com>
12 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
13 for deprecated system registers when parsing pstate fields.
15 2013-11-19 Nick Clifton <nickc@redhat.com>
17 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
18 for deprecated system registers when parsing pstate fields.
20 2013-11-19 Catherine Moore <clm@codesourcery.com>
22 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
23 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
24 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
26 (INSN_DMULTU): Define.
27 (insns_between): Detect PMC RM7000 errata.
28 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
29 OPTION_NO_FIX_PMC_RM7000.
30 * doc/as.texinfo: Document new options.
31 * doc/c-mips.texi: Likewise.
33 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
36 * app.c (do_scrub_chars): Only insert a newline character if
37 end-of-file has been reached.
39 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
41 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
44 2013-11-18 Renlin Li <Renlin.Li@arm.com>
46 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
47 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
48 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
49 (cpu_arch_ver): Likewise.
50 * doc/c-arm.texi: Document armv7ve.
52 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
54 * config/tc-aarch64.c (parse_sys_reg): Support
55 S2_<op1>_<Cn>_<Cm>_<op2>.
57 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
61 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
63 * config/tc-aarch64.c (set_other_error): New function.
64 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
65 the variable to which it points with 'o'.
66 (parse_operands): Update; check for write to read-only system
67 registers or read from write-only ones.
69 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
71 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
72 indicate if instruction has the BND prefix. Return
73 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
74 bnd_prefix isn't zero.
75 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
77 (output_jump): Update reloc call.
78 (output_interseg_jump): Likewise.
79 (output_disp): Likewise.
80 (output_imm): Likewise.
81 (x86_cons_fix_new): Likewise.
82 (lex_got): Add an argument, bnd_prefix, to indicate if
83 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
85 (x86_cons): Update lex_got call.
86 (i386_immediate): Likewise.
87 (i386_displacement): Likewise.
88 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
89 BFD_RELOC_X86_64_PLT32_BND.
90 (tc_gen_reloc): Likewise.
91 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
93 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
95 * config/tc-aarch64.c (set_other_error): New function.
96 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
97 the variable to which it points with 'o'.
98 (parse_operands): Update; check for write to read-only system
99 registers or read from write-only ones.
101 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
103 * config/tc-i386.c (check_VecOperands): Reorder checks.
105 2013-11-11 Catherine Moore <clm@codesourcery.com>
107 * config/mips/tc-mips.c (convert_reg_type): Use
108 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
109 (reg_needs_delay): Likewise.
110 (insns_between): Likewise.
112 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
114 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
116 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
118 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
119 call aarch64_sys_reg_deprecated_p and warn about the deprecated
122 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
124 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
126 2013-11-05 Will Newton <will.newton@linaro.org>
129 * config/tc-aarch64.c (parse_operands): Avoid trying to
130 parse a vector register as an immediate.
132 2013-11-04 Jan Beulich <jbeulich@suse.com>
134 * config/tc-i386.c (check_long_reg): Correct comment indentation.
135 (check_qword_reg): Correct comment and its indentation.
136 (check_word_reg): Extend comment and correct its indentation. Also
137 check for 64-bit register.
139 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
141 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
142 (ppc_elf_localentry): New function.
143 (ppc_force_relocation): Force relocs on all branches to localenty
145 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
147 2013-10-30 Alan Modra <amodra@gmail.com>
149 * config/tc-ppc.c: Include elf/ppc64.h.
150 (ppc_abiversion): New variable.
151 (md_pseudo_table): Add .abiversion.
152 (ppc_elf_abiversion, ppc_elf_end): New functions.
153 * config/tc-ppc.h (md_end): Define.
155 2013-10-30 Alan Modra <amodra@gmail.com>
157 * config/tc-ppc.c (SEX16): Don't mask.
158 (REPORT_OVERFLOW_HI): Define as zero.
159 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
160 @tprel@high, and @tprel@higha modifiers.
161 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
162 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
164 (md_apply_fix): Similarly.
166 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
168 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
169 (fpr_write_mask): Test MSA registers.
170 (can_swap_branch_p): Check fpr write followed by fpr read.
172 2013-10-18 Nick Clifton <nickc@redhat.com>
174 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
176 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
177 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
179 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
180 (md_longopts): Add mmsa and mno-msa.
181 (mips_ases): Add msa.
182 (RTYPE_MASK): Update.
183 (RTYPE_MSA): New define.
184 (OT_REG_ELEMENT): Replace with...
185 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
186 (mips_operand_token): Replace reg_element with index.
187 (mips_parse_argument_token): Treat vector indices as separate tokens.
188 Handle register indices.
189 (md_begin): Add MSA register names.
190 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
191 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
192 (match_mdmx_imm_reg_operand): Update accordingly.
193 (match_imm_index_operand): New function.
194 (match_reg_index_operand): New function.
195 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
196 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
197 (md_show_usage): Print -mmsa and -mno-msa.
198 * doc/as.texinfo: Document -mmsa and -mno-msa.
199 * doc/c-mips.texi: Document -mmsa and -mno-msa.
200 Document .set msa and .set nomsa.
202 2013-10-14 Nick Clifton <nickc@redhat.com>
204 * read.c (add_include_dir): Use xrealloc.
205 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
206 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
208 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
210 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
211 also test/refer to "sstatus". Reformat the warning message.
213 2013-10-10 Sean Keys <skeys@ipdatasys.com>
215 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
217 2013-10-10 Jan Beulich <jbeulich@suse.com>
219 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
220 swapping for bndmk, bndldx, and bndstx.
222 2013-10-09 Nick Clifton <nickc@redhat.com>
225 * config/tc-epiphany.c (md_convert_frag): Add missing break
229 * config/tc-mn10200.c (md_convert_frag): Add missing break
232 2013-10-08 Jan Beulich <jbeulich@suse.com>
234 * tc-i386.c (check_word_reg): Remove misplaced "else".
235 (check_long_reg): Restore symmetry with check_word_reg.
237 2013-10-08 Jan Beulich <jbeulich@suse.com>
239 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
242 2013-10-08 Nick Clifton <nickc@redhat.com>
244 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
245 for "<foo>a". Issue error messages for unrecognised or corrrupt
248 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
250 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
253 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
255 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
256 * doc/c-i386.texi: Add -march=bdver4 option.
258 2013-09-20 Alan Modra <amodra@gmail.com>
260 * configure: Regenerate.
262 2013-09-18 Tristan Gingold <gingold@adacore.com>
264 * NEWS: Add marker for 2.24.
266 2013-09-18 Nick Clifton <nickc@redhat.com>
268 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
269 (move_data): New variable.
270 (md_parse_option): Parse -md.
271 (msp430_section): New function. Catch references to the .bss or
272 .data sections and generate a special symbol for use by the libcrt
274 (md_pseudo_table): Intercept .section directives.
275 (md_longopt): Add -md
276 (md_show_usage): Likewise.
277 (msp430_operands): Generate a warning message if a NOP is inserted
278 into the instruction stream.
279 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
281 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
283 * config/tc-mips.c (mips_elf_final_processing): Set
284 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
286 2013-09-16 Will Newton <will.newton@linaro.org>
288 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
289 disallowing element size 64 with interleave other than 1.
291 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
293 * config/tc-mips.c (match_insn): Set error when $31 is used for
296 2013-09-04 Tristan Gingold <gingold@adacore.com>
298 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
301 2013-09-04 Roland McGrath <mcgrathr@google.com>
304 * config/tc-arm.c (T16_32_TAB): Add _udf.
305 (do_t_udf): New function.
308 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
310 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
311 assembler errors at correct position.
313 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
316 * config/tc-ia64.c: Fix typos.
317 * config/tc-sparc.c: Likewise.
318 * config/tc-z80.c: Likewise.
319 * doc/c-i386.texi: Likewise.
320 * doc/c-m32r.texi: Likewise.
322 2013-08-23 Will Newton <will.newton@linaro.org>
324 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
325 for pre-indexed addressing modes.
327 2013-08-21 Alan Modra <amodra@gmail.com>
329 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
330 range check label number for use with fb_low_counter array.
332 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
334 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
335 (mips_parse_argument_token, validate_micromips_insn, md_begin)
336 (check_regno, match_float_constant, check_completed_insn, append_insn)
337 (match_insn, match_mips16_insn, match_insns, macro_start)
338 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
339 (mips16_ip, mips_set_option_string, md_parse_option)
340 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
341 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
342 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
343 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
344 Start error messages with a lower-case letter. Do not end error
345 messages with a period. Wrap long messages to 80 character-lines.
346 Use "cannot" instead of "can't" and "can not".
348 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
350 * config/tc-mips.c (imm_expr): Expand comment.
351 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
354 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
356 * config/tc-mips.c (imm2_expr): Delete.
357 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
359 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
361 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
362 (macro): Remove M_DEXT and M_DINS handling.
364 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
366 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
367 lax_max with lax_match.
368 (match_int_operand): Update accordingly. Don't report an error
369 for !lax_match-only cases.
370 (match_insn): Replace more_alts with lax_match and use it to
371 initialize the mips_arg_info field. Add a complete_p parameter.
372 Handle implicit VU0 suffixes here.
373 (match_invalid_for_isa, match_insns, match_mips16_insns): New
375 (mips_ip, mips16_ip): Use them.
377 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
379 * config/tc-mips.c (match_expression): Report uses of registers here.
380 Add a "must be an immediate expression" error. Handle elided offsets
382 (match_int_operand): ...here.
384 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
386 * config/tc-mips.c (mips_arg_info): Remove soft_match.
387 (match_out_of_range, match_not_constant): New functions.
388 (match_const_int): Remove fallback parameter and check for soft_match.
389 Use match_not_constant.
390 (match_mapped_int_operand, match_addiusp_operand)
391 (match_perf_reg_operand, match_save_restore_list_operand)
392 (match_mdmx_imm_reg_operand): Update accordingly. Use
393 match_out_of_range and set_insn_error* instead of as_bad.
394 (match_int_operand): Likewise. Use match_not_constant in the
395 !allows_nonconst case.
396 (match_float_constant): Report invalid float constants.
397 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
398 match_float_constant to check for invalid constants. Fail the
399 match if match_const_int or match_float_constant return false.
400 (mips_ip): Update accordingly.
401 (mips16_ip): Likewise. Undo null termination of instruction name
402 once lookup is complete.
404 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
406 * config/tc-mips.c (mips_insn_error_format): New enum.
407 (mips_insn_error): New struct.
408 (insn_error): Change to a mips_insn_error.
409 (clear_insn_error, set_insn_error_format, set_insn_error)
410 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
412 (mips_parse_argument_token, md_assemble, match_insn)
413 (match_mips16_insn): Use them instead of manipulating insn_error
415 (mips_ip, mips16_ip): Likewise. Simplify control flow.
417 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
419 * config/tc-mips.c (normalize_constant_expr): Move further up file.
420 (normalize_address_expr): Likewise.
421 (match_insn, match_mips16_insn): New functions, split out from...
422 (mips_ip, mips16_ip): ...here.
424 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
426 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
428 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
429 for optional operands.
431 2013-08-16 Alan Modra <amodra@gmail.com>
433 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
436 2013-08-16 Alan Modra <amodra@gmail.com>
438 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
440 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
442 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
443 argument as alignment.
445 2013-08-09 Nick Clifton <nickc@redhat.com>
447 * config/tc-rl78.c (elf_flags): New variable.
448 (enum options): Add OPTION_G10.
449 (md_longopts): Add mg10.
450 (md_parse_option): Parse -mg10.
451 (rl78_elf_final_processing): New function.
452 * config/tc-rl78.c (tc_final_processing): Define.
453 * doc/c-rl78.texi: Document -mg10 option.
455 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
457 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
458 suffixes to be elided too.
459 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
460 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
463 2013-08-05 John Tytgat <john@bass-software.com>
465 * po/POTFILES.in: Regenerate.
467 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
468 Konrad Eisele <konrad@gaisler.com>
470 * config/tc-sparc.c (sparc_arch_types): Add leon.
471 (sparc_arch): Move sparc4 around and add leon.
472 (sparc_target_format): Document -Aleon.
473 * doc/c-sparc.texi: Likewise.
475 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
477 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
479 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
480 Richard Sandiford <rdsandiford@googlemail.com>
482 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
483 (RWARN): Bump to 0x8000000.
484 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
485 (RTYPE_R5900_ACC): New register types.
486 (RTYPE_MASK): Include them.
487 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
489 (reg_names): Include them.
490 (mips_parse_register_1): New function, split out from...
491 (mips_parse_register): ...here. Add a channels_ptr parameter.
492 Look for VU0 channel suffixes when nonnull.
493 (reg_lookup): Update the call to mips_parse_register.
494 (mips_parse_vu0_channels): New function.
495 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
496 (mips_operand_token): Add a "channels" field to the union.
497 Extend the comment above "ch" to OT_DOUBLE_CHAR.
498 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
499 (mips_parse_argument_token): Handle channel suffixes here too.
500 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
501 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
503 (md_begin): Register $vfN and $vfI registers.
504 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
505 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
506 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
507 (match_vu0_suffix_operand): New function.
508 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
509 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
510 (mips_lookup_insn): New function.
511 (mips_ip): Use it. Allow "+K" operands to be elided at the end
512 of an instruction. Handle '#' sequences.
514 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
516 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
517 values and use it instead of sreg, treg, xreg, etc.
519 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
521 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
522 and mips_int_operand_max.
523 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
525 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
526 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
527 instead of mips16_immed_operand.
529 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
531 * config/tc-mips.c (mips16_macro): Don't use move_register.
532 (mips16_ip): Allow macros to use 'p'.
534 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
536 * config/tc-mips.c (MAX_OPERANDS): New macro.
537 (mips_operand_array): New structure.
538 (mips_operands, mips16_operands, micromips_operands): New arrays.
539 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
540 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
541 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
542 (micromips_to_32_reg_q_map): Delete.
543 (insn_operands, insn_opno, insn_extract_operand): New functions.
544 (validate_mips_insn): Take a mips_operand_array as argument and
545 use it to build up a list of operands. Extend to handle INSN_MACRO
547 (validate_mips16_insn): New function.
548 (validate_micromips_insn): Take a mips_operand_array as argument.
550 (md_begin): Initialize mips_operands, mips16_operands and
551 micromips_operands. Call validate_mips_insn and
552 validate_micromips_insn for macro instructions too.
553 Call validate_mips16_insn for MIPS16 instructions.
554 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
556 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
557 them. Handle INSN_UDI.
558 (get_append_method): Use gpr_read_mask.
560 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
562 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
563 flags for MIPS16 and non-MIPS16 instructions.
564 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
565 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
566 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
567 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
568 and non-MIPS16 instructions. Fix formatting.
570 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
572 * config/tc-mips.c (reg_needs_delay): Move later in file.
574 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
576 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
577 Alexander Ivchenko <alexander.ivchenko@intel.com>
578 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
579 Sergey Lega <sergey.s.lega@intel.com>
580 Anna Tikhonova <anna.tikhonova@intel.com>
581 Ilya Tocar <ilya.tocar@intel.com>
582 Andrey Turetskiy <andrey.turetskiy@intel.com>
583 Ilya Verbin <ilya.verbin@intel.com>
584 Kirill Yukhin <kirill.yukhin@intel.com>
585 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
587 * config/tc-i386-intel.c (O_zmmword_ptr): New.
588 (i386_types): Add zmmword.
589 (i386_intel_simplify_register): Allow regzmm.
590 (i386_intel_simplify): Handle zmmwords.
591 (i386_intel_operand): Handle RC/SAE, vector operations and
593 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
594 (struct RC_Operation): New.
595 (struct Mask_Operation): New.
596 (struct Broadcast_Operation): New.
597 (vex_prefix): Size of bytes increased to 4 to support EVEX
599 (enum i386_error): Add new error codes: unsupported_broadcast,
600 broadcast_not_on_src_operand, broadcast_needed,
601 unsupported_masking, mask_not_on_destination, no_default_mask,
602 unsupported_rc_sae, rc_sae_operand_not_last_imm,
603 invalid_register_operand, try_vector_disp8.
604 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
605 rounding, broadcast, memshift.
606 (struct RC_name): New.
607 (RC_NamesTable): New.
610 (extra_symbol_chars): Add '{'.
611 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
612 (i386_operand_type): Add regzmm, regmask and vec_disp8.
613 (match_mem_size): Handle zmmwords.
614 (operand_type_match): Handle zmm-registers.
615 (mode_from_disp_size): Handle vec_disp8.
616 (fits_in_vec_disp8): New.
617 (md_begin): Handle {} properly.
618 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
619 (build_vex_prefix): Handle vrex.
620 (build_evex_prefix): New.
621 (process_immext): Adjust to properly handle EVEX.
622 (md_assemble): Add EVEX encoding support.
623 (swap_2_operands): Correctly handle operands with masking,
624 broadcasting or RC/SAE.
625 (check_VecOperands): Support EVEX features.
626 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
627 (match_template): Support regzmm and handle new error codes.
628 (process_suffix): Handle zmmwords and zmm-registers.
629 (check_byte_reg): Extend to zmm-registers.
630 (process_operands): Extend to zmm-registers.
631 (build_modrm_byte): Handle EVEX.
632 (output_insn): Adjust to properly handle EVEX case.
633 (disp_size): Handle vec_disp8.
634 (output_disp): Support compressed disp8*N evex feature.
635 (output_imm): Handle RC/SAE immediates properly.
636 (check_VecOperations): New.
637 (i386_immediate): Handle EVEX features.
638 (i386_index_check): Handle zmmwords and zmm-registers.
639 (RC_SAE_immediate): New.
640 (i386_att_operand): Handle EVEX features.
641 (parse_real_register): Add a check for ZMM/Mask registers.
642 (OPTION_MEVEXLIG): New.
643 (OPTION_MEVEXWIG): New.
644 (md_longopts): Add mevexlig and mevexwig.
645 (md_parse_option): Handle mevexlig and mevexwig options.
646 (md_show_usage): Add description for mevexlig and mevexwig.
647 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
648 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
650 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
652 * config/tc-i386.c (cpu_arch): Add .sha.
653 * doc/c-i386.texi: Document sha/.sha.
655 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
656 Kirill Yukhin <kirill.yukhin@intel.com>
657 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
659 * config/tc-i386.c (BND_PREFIX): New.
660 (struct _i386_insn): Add new field bnd_prefix.
661 (add_bnd_prefix): New.
663 (i386_operand_type): Add regbnd.
664 (md_assemble): Handle BND prefixes.
665 (parse_insn): Likewise.
666 (output_branch): Likewise.
667 (output_jump): Likewise.
668 (build_modrm_byte): Handle regbnd.
669 (OPTION_MADD_BND_PREFIX): New.
670 (md_longopts): Add entry for 'madd-bnd-prefix'.
671 (md_parse_option): Handle madd-bnd-prefix option.
672 (md_show_usage): Add description for madd-bnd-prefix
674 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
676 2013-07-24 Tristan Gingold <gingold@adacore.com>
678 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
681 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
683 * config/tc-s390.c (s390_machine): Don't force the .machine
684 argument to lower case.
686 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
688 * config/tc-arm.c (s_arm_arch_extension): Improve error message
689 for invalid extension.
691 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
693 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
694 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
695 (aarch64_abi): New variable.
696 (ilp32_p): Change to be a macro.
697 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
698 (struct aarch64_option_abi_value_table): New struct.
699 (aarch64_abis): New table.
700 (aarch64_parse_abi): New function.
701 (aarch64_long_opts): Add entry for -mabi=.
702 * doc/as.texinfo (Target AArch64 options): Document -mabi.
703 * doc/c-aarch64.texi: Likewise.
705 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
707 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
710 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
712 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
714 * config/rx-parse.y: (rx_check_float_support): Add function to
715 check floating point operation support for target RX100 and
717 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
718 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
719 RX200, RX600, and RX610
721 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
723 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
725 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
727 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
728 * doc/c-avr.texi: Likewise.
730 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
732 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
733 error with older GCCs.
734 (mips16_macro_build): Dereference args.
736 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
738 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
739 New functions, split out from...
740 (reg_lookup): ...here. Remove itbl support.
741 (reglist_lookup): Delete.
742 (mips_operand_token_type): New enum.
743 (mips_operand_token): New structure.
744 (mips_operand_tokens): New variable.
745 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
746 (mips_parse_arguments): New functions.
747 (md_begin): Initialize mips_operand_tokens.
748 (mips_arg_info): Add a token field. Remove optional_reg field.
749 (match_char, match_expression): New functions.
750 (match_const_int): Use match_expression. Remove "s" argument
751 and return a boolean result. Remove O_register handling.
752 (match_regno, match_reg, match_reg_range): New functions.
753 (match_int_operand, match_mapped_int_operand, match_msb_operand)
754 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
755 (match_addiusp_operand, match_clo_clz_dest_operand)
756 (match_lwm_swm_list_operand, match_entry_exit_operand)
757 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
758 (match_tied_reg_operand): Remove "s" argument and return a boolean
759 result. Match tokens rather than text. Update calls to
760 match_const_int. Rely on match_regno to call check_regno.
761 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
762 "arg" argument. Return a boolean result.
763 (parse_float_constant): Replace with...
764 (match_float_constant): ...this new function.
765 (match_operand): Remove "s" argument and return a boolean result.
766 Update calls to subfunctions.
767 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
768 rather than string-parsing routines. Update handling of optional
769 registers for token scheme.
771 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
773 * config/tc-mips.c (parse_float_constant): Split out from...
776 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
778 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
781 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
783 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
784 (match_entry_exit_operand): New function.
785 (match_save_restore_list_operand): Likewise.
786 (match_operand): Use them.
787 (check_absolute_expr): Delete.
788 (mips16_ip): Rewrite main parsing loop to use mips_operands.
790 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
792 * config/tc-mips.c: Enable functions commented out in previous patch.
793 (SKIP_SPACE_TABS): Move further up file.
794 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
795 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
796 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
797 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
798 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
799 (micromips_imm_b_map, micromips_imm_c_map): Delete.
800 (mips_lookup_reg_pair): Delete.
801 (macro): Use report_bad_range and report_bad_field.
802 (mips_immed, expr_const_in_range): Delete.
803 (mips_ip): Rewrite main parsing loop to use new functions.
805 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
807 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
808 Change return type to bfd_boolean.
809 (report_bad_range, report_bad_field): New functions.
810 (mips_arg_info): New structure.
811 (match_const_int, convert_reg_type, check_regno, match_int_operand)
812 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
813 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
814 (match_addiusp_operand, match_clo_clz_dest_operand)
815 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
816 (match_pc_operand, match_tied_reg_operand, match_operand)
817 (check_completed_insn): New functions, commented out for now.
819 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
821 * config/tc-mips.c (insn_insert_operand): New function.
822 (macro_build, mips16_macro_build): Put null character check
823 in the for loop and convert continues to breaks. Use operand
824 structures to handle constant operands.
826 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
828 * config/tc-mips.c (validate_mips_insn): Move further up file.
829 Add insn_bits and decode_operand arguments. Use the mips_operand
830 fields to work out which bits an operand occupies. Detect double
832 (validate_micromips_insn): Move further up file. Call into
835 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
837 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
839 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
841 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
843 (macro): Update accordingly.
845 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
847 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
849 (md_assemble): Remove imm_reloc handling.
850 (mips_ip): Update commentary. Use offset_expr and offset_reloc
851 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
852 Use a temporary array rather than imm_reloc when parsing
853 constant expressions. Remove imm_reloc initialization.
854 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
855 for the relaxable field. Use a relax_char variable to track the
856 type of this field. Remove imm_reloc initialization.
858 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
860 * config/tc-mips.c (mips16_ip): Handle "I".
862 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
864 * config/tc-mips.c (mips_flag_nan2008): New variable.
865 (options): Add OPTION_NAN enum value.
866 (md_longopts): Handle it.
867 (md_parse_option): Likewise.
868 (s_nan): New function.
869 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
870 (md_show_usage): Add -mnan.
872 * doc/as.texinfo (Overview): Add -mnan.
873 * doc/c-mips.texi (MIPS Opts): Document -mnan.
874 (MIPS NaN Encodings): New node. Document .nan directive.
875 (MIPS-Dependent): List the new node.
877 2013-07-09 Tristan Gingold <gingold@adacore.com>
879 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
881 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
883 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
884 for 'A' and assume that the constant has been elided if the result
887 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
889 * config/tc-mips.c (gprel16_reloc_p): New function.
890 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
892 (offset_high_part, small_offset_p): New functions.
893 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
894 register load and store macros, handle the 16-bit offset case first.
895 If a 16-bit offset is not suitable for the instruction we're
896 generating, load it into the temporary register using
897 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
898 M_L_DAB code once the address has been constructed. For double load
899 and store macros, again handle the 16-bit offset case first.
900 If the second register cannot be accessed from the same high
901 part as the first, load it into AT using ADDRESS_ADDI_INSN.
902 Fix the handling of LD in cases where the first register is the
903 same as the base. Also handle the case where the offset is
904 not 16 bits and the second register cannot be accessed from the
905 same high part as the first. For unaligned loads and stores,
906 fuse the offbits == 12 and old "ab" handling. Apply this handling
907 whenever the second offset needs a different high part from the first.
908 Construct the offset using ADDRESS_ADDI_INSN where possible,
909 for offbits == 16 as well as offbits == 12. Use offset_reloc
910 when constructing the individual loads and stores.
911 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
912 and offset_reloc before matching against a particular opcode.
913 Handle elided 'A' constants. Allow 'A' constants to use
914 relocation operators.
916 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
918 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
919 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
920 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
922 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
924 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
925 Require the msb to be <= 31 for "+s". Check that the size is <= 31
926 for both "+s" and "+S".
928 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
930 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
931 (mips_ip, mips16_ip): Handle "+i".
933 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
935 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
936 (micromips_to_32_reg_h_map): Rename to...
937 (micromips_to_32_reg_h_map1): ...this.
938 (micromips_to_32_reg_i_map): Rename to...
939 (micromips_to_32_reg_h_map2): ...this.
940 (mips_lookup_reg_pair): New function.
941 (gpr_write_mask, macro): Adjust after above renaming.
942 (validate_micromips_insn): Remove "mi" handling.
943 (mips_ip): Likewise. Parse both registers in a pair for "mh".
945 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
947 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
948 (mips_ip): Remove "+D" and "+T" handling.
950 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
952 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
955 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
957 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
959 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
961 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
962 (aarch64_force_relocation): Likewise.
964 2013-07-02 Alan Modra <amodra@gmail.com>
966 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
968 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
970 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
971 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
972 Replace @sc{mips16} with literal `MIPS16'.
973 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
975 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
977 * config/tc-aarch64.c (reloc_table): Replace
978 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
979 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
980 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
981 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
982 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
983 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
984 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
985 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
986 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
987 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
988 (aarch64_force_relocation): Likewise.
990 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
992 * config/tc-aarch64.c (ilp32_p): New static variable.
993 (elf64_aarch64_target_format): Return the target according to the
995 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
996 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
997 (aarch64_dwarf2_addr_size): New function.
998 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
999 (DWARF2_ADDR_SIZE): New define.
1001 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1003 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1005 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1007 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1009 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1011 * config/tc-mips.c (mips_set_options): Add insn32 member.
1012 (mips_opts): Initialize it.
1013 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1014 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1015 (md_longopts): Add "minsn32" and "mno-insn32" options.
1016 (is_size_valid): Handle insn32 mode.
1017 (md_assemble): Pass instruction string down to macro.
1018 (brk_fmt): Add second dimension and insn32 mode initializers.
1019 (mfhl_fmt): Likewise.
1020 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1021 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1022 (macro_build_jalr, move_register): Handle insn32 mode.
1023 (macro_build_branch_rs): Likewise.
1024 (macro): Handle insn32 mode.
1025 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1026 (mips_ip): Handle insn32 mode.
1027 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1028 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1029 (mips_handle_align): Handle insn32 mode.
1030 (md_show_usage): Add -minsn32 and -mno-insn32.
1032 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1033 -mno-insn32 options.
1034 (-minsn32, -mno-insn32): New options.
1035 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1037 (MIPS assembly options): New node. Document .set insn32 and
1039 (MIPS-Dependent): List the new node.
1041 2013-06-25 Nick Clifton <nickc@redhat.com>
1043 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1044 the PC in indirect addressing on 430xv2 parts.
1045 (msp430_operands): Add version test to hardware bug encoding
1048 2013-06-24 Roland McGrath <mcgrathr@google.com>
1050 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1051 so it skips whitespace before it.
1052 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1054 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1055 (arm_reg_parse_multi): Skip whitespace first.
1056 (parse_reg_list): Likewise.
1057 (parse_vfp_reg_list): Likewise.
1058 (s_arm_unwind_save_mmxwcg): Likewise.
1060 2013-06-24 Nick Clifton <nickc@redhat.com>
1063 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1065 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1067 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1069 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1071 * config/tc-mips.c: Assert that offsetT and valueT are at least
1073 (GPR_SMIN, GPR_SMAX): New macros.
1074 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1076 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1078 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1079 conditions. Remove any code deselected by them.
1080 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1082 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1084 * NEWS: Note removal of ECOFF support.
1085 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1086 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1087 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1088 * Makefile.in: Regenerate.
1089 * configure.in: Remove MIPS ECOFF references.
1090 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1092 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1093 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1094 (mips-*-*): ...this single case.
1095 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1096 MIPS emulations to be e-mipself*.
1097 * configure: Regenerate.
1098 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1099 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1100 (mips-*-sysv*): Remove coff and ecoff cases.
1101 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1102 * ecoff.c: Remove reference to MIPS ECOFF.
1103 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1104 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1105 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1106 (mips_hi_fixup): Tweak comment.
1107 (append_insn): Require a howto.
1108 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1110 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1112 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1113 Use "CPU" instead of "cpu".
1114 * doc/c-mips.texi: Likewise.
1115 (MIPS Opts): Rename to MIPS Options.
1116 (MIPS option stack): Rename to MIPS Option Stack.
1117 (MIPS ASE instruction generation overrides): Rename to
1118 MIPS ASE Instruction Generation Overrides (for now).
1119 (MIPS floating-point): Rename to MIPS Floating-Point.
1121 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1123 * doc/c-mips.texi (MIPS Macros): New section.
1124 (MIPS Object): Replace with...
1125 (MIPS Small Data): ...this new section.
1127 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1129 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1130 Capitalize name. Use @kindex instead of @cindex for .set entries.
1132 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1134 * doc/c-mips.texi (MIPS Stabs): Remove section.
1136 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1138 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1139 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1140 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1141 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1142 (mips_ase): New structure.
1143 (mips_ases): New table.
1144 (FP64_ASES): New macro.
1145 (mips_ase_groups): New array.
1146 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1147 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1149 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1150 (md_parse_option): Use mips_ases and mips_set_ase instead of
1151 separate case statements for each ASE option.
1152 (mips_after_parse_args): Use FP64_ASES. Use
1153 mips_check_isa_supports_ases to check the ASEs against
1155 (s_mipsset): Use mips_ases and mips_set_ase instead of
1156 separate if statements for each ASE option. Use
1157 mips_check_isa_supports_ases, even when a non-ASE option
1160 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1162 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1164 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1166 * config/tc-mips.c (md_shortopts, options, md_longopts)
1167 (md_longopts_size): Move earlier in file.
1169 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1171 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1172 with a single "ase" bitmask.
1173 (mips_opts): Update accordingly.
1174 (file_ase, file_ase_explicit): New variables.
1175 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1176 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1177 (ISA_HAS_ROR): Adjust for mips_set_options change.
1178 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1179 (mips_ip): Adjust for mips_set_options change.
1180 (md_parse_option): Likewise. Update file_ase_explicit.
1181 (mips_after_parse_args): Adjust for mips_set_options change.
1182 Use bitmask operations to select the default ASEs. Set file_ase
1183 rather than individual per-ASE variables.
1184 (s_mipsset): Adjust for mips_set_options change.
1185 (mips_elf_final_processing): Test file_ase rather than
1186 file_ase_mdmx. Remove commented-out code.
1188 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1190 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1191 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1192 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1193 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1194 (mips_after_parse_args): Use the new "ase" field to choose
1196 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1199 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1201 * config/tc-arm.c (symbol_preemptible): New function.
1202 (relax_branch): Use it.
1204 2013-06-17 Catherine Moore <clm@codesourcery.com>
1205 Maciej W. Rozycki <macro@codesourcery.com>
1206 Chao-Ying Fu <fu@mips.com>
1208 * config/tc-mips.c (mips_set_options): Add ase_eva.
1209 (mips_set_options mips_opts): Add ase_eva.
1210 (file_ase_eva): Declare.
1211 (ISA_SUPPORTS_EVA_ASE): Define.
1212 (IS_SEXT_9BIT_NUM): Define.
1213 (MIPS_CPU_ASE_EVA): Define.
1214 (is_opcode_valid): Add support for ase_eva.
1215 (macro_build): Likewise.
1217 (validate_mips_insn): Likewise.
1218 (validate_micromips_insn): Likewise.
1219 (mips_ip): Likewise.
1220 (options): Add OPTION_EVA and OPTION_NO_EVA.
1221 (md_longopts): Add -meva and -mno-eva.
1222 (md_parse_option): Process new options.
1223 (mips_after_parse_args): Check for valid EVA combinations.
1224 (s_mipsset): Likewise.
1226 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1228 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1229 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1230 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1231 (dwarf2_gen_line_info_1): Update call accordingly.
1232 (dwarf2_move_insn): New function.
1233 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1235 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1239 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1242 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1243 (dwarf2_gen_line_info_1): Delete.
1244 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1245 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1246 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1247 (dwarf2_directive_loc): Push previous .locs instead of generating
1250 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1252 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1253 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1255 2013-06-13 Nick Clifton <nickc@redhat.com>
1258 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1259 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1260 function. Generates an error if the adjusted offset is out of a
1263 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1265 * config/tc-nios2.c (md_apply_fix): Mask constant
1266 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1268 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1270 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1271 MIPS-3D instructions either.
1272 (md_convert_frag): Update the COPx branch mask accordingly.
1274 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1276 * doc/as.texinfo (Overview): Add --relax-branch and
1278 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1281 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1283 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1286 2013-06-08 Catherine Moore <clm@codesourcery.com>
1288 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1289 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1290 (append_insn): Change INSN_xxxx to ASE_xxxx.
1292 2013-06-01 George Thomas <george.thomas@atmel.com>
1294 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1297 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1299 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1302 2013-05-31 Paul Brook <paul@codesourcery.com>
1304 * config/tc-mips.c (s_ehword): New.
1306 2013-05-30 Paul Brook <paul@codesourcery.com>
1308 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1310 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1312 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1313 convert relocs who have no relocatable field either. Rephrase
1314 the conditional so that the PC-relative check is only applied
1317 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1319 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1322 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1324 * config/tc-aarch64.c (reloc_table): Update to use
1325 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1326 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1327 (md_apply_fix): Likewise.
1328 (aarch64_force_relocation): Likewise.
1330 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1332 * config/tc-arm.c (it_fsm_post_encode): Improve
1333 warning messages about deprecated IT block formats.
1335 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1337 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1338 inside fx_done condition.
1340 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1342 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1344 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1346 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1347 and clean up warning when using PRINT_OPCODE_TABLE.
1349 2013-05-20 Alan Modra <amodra@gmail.com>
1351 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1352 and data fixups performing shift/high adjust/sign extension on
1353 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1354 when writing data fixups rather than recalculating size.
1356 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1358 * doc/c-msp430.texi: Fix typo.
1360 2013-05-16 Tristan Gingold <gingold@adacore.com>
1362 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1363 are also TOC symbols.
1365 2013-05-16 Nick Clifton <nickc@redhat.com>
1367 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1368 Add -mcpu command to specify core type.
1369 * doc/c-msp430.texi: Update documentation.
1371 2013-05-09 Andrew Pinski <apinski@cavium.com>
1373 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1374 (mips_opts): Update for the new field.
1375 (file_ase_virt): New variable.
1376 (ISA_SUPPORTS_VIRT_ASE): New macro.
1377 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1378 (MIPS_CPU_ASE_VIRT): New define.
1379 (is_opcode_valid): Handle ase_virt.
1380 (macro_build): Handle "+J".
1381 (validate_mips_insn): Likewise.
1382 (mips_ip): Likewise.
1383 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1384 (md_longopts): Add mvirt and mnovirt
1385 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1386 (mips_after_parse_args): Handle ase_virt field.
1387 (s_mipsset): Handle "virt" and "novirt".
1388 (mips_elf_final_processing): Add a comment about virt ASE might need
1390 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1391 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1392 Document ".set virt" and ".set novirt".
1394 2013-05-09 Alan Modra <amodra@gmail.com>
1396 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1397 control of operand flag bits.
1399 2013-05-07 Alan Modra <amodra@gmail.com>
1401 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1402 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1403 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1404 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1405 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1406 Shift and sign-extend fieldval for use by some VLE reloc
1407 operand->insert functions.
1409 2013-05-06 Paul Brook <paul@codesourcery.com>
1410 Catherine Moore <clm@codesourcery.com>
1412 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1413 (limited_pcrel_reloc_p): Likewise.
1414 (md_apply_fix): Likewise.
1415 (tc_gen_reloc): Likewise.
1417 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1419 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1420 (mips_fix_adjustable): Adjust pc-relative check to use
1423 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1425 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1426 (s_mips_stab): Do not restrict to stabn only.
1428 2013-05-02 Nick Clifton <nickc@redhat.com>
1430 * config/tc-msp430.c: Add support for the MSP430X architecture.
1431 Add code to insert a NOP instruction after any instruction that
1432 might change the interrupt state.
1433 Add support for the LARGE memory model.
1434 Add code to initialise the .MSP430.attributes section.
1435 * config/tc-msp430.h: Add support for the MSP430X architecture.
1436 * doc/c-msp430.texi: Document the new -mL and -mN command line
1438 * NEWS: Mention support for the MSP430X architecture.
1440 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1442 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1443 alpha*-*-linux*ecoff*.
1445 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1447 * config/tc-mips.c (mips_ip): Add sizelo.
1448 For "+C", "+G", and "+H", set sizelo and compare against it.
1450 2013-04-29 Nick Clifton <nickc@redhat.com>
1452 * as.c (Options): Add -gdwarf-sections.
1453 (parse_args): Likewise.
1454 * as.h (flag_dwarf_sections): Declare.
1455 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1456 (process_entries): When -gdwarf-sections is enabled generate
1457 fragmentary .debug_line sections.
1458 (out_debug_line): Set the section for the .debug_line section end
1460 * doc/as.texinfo: Document -gdwarf-sections.
1461 * NEWS: Mention -gdwarf-sections.
1463 2013-04-26 Christian Groessler <chris@groessler.org>
1465 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1466 according to the target parameter. Don't call s_segm since s_segm
1467 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1469 (md_begin): Call s_segm according to target parameter from command
1472 2013-04-25 Alan Modra <amodra@gmail.com>
1474 * configure.in: Allow little-endian linux.
1475 * configure: Regenerate.
1477 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1479 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1480 "fstatus" control register to "eccinj".
1482 2013-04-19 Kai Tietz <ktietz@redhat.com>
1484 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1486 2013-04-15 Julian Brown <julian@codesourcery.com>
1488 * expr.c (add_to_result, subtract_from_result): Make global.
1489 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1490 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1491 subtract_from_result to handle extra bit of precision for .sleb128
1494 2013-04-10 Julian Brown <julian@codesourcery.com>
1496 * read.c (convert_to_bignum): Add sign parameter. Use it
1497 instead of X_unsigned to determine sign of resulting bignum.
1498 (emit_expr): Pass extra argument to convert_to_bignum.
1499 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1500 X_extrabit to convert_to_bignum.
1501 (parse_bitfield_cons): Set X_extrabit.
1502 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1503 Initialise X_extrabit field as appropriate.
1504 (add_to_result): New.
1505 (subtract_from_result): New.
1507 * expr.h (expressionS): Add X_extrabit field.
1509 2013-04-10 Jan Beulich <jbeulich@suse.com>
1511 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1512 register being PC when is_t or writeback, and use distinct
1513 diagnostic for the latter case.
1515 2013-04-10 Jan Beulich <jbeulich@suse.com>
1517 * gas/config/tc-arm.c (parse_operands): Re-write
1518 po_barrier_or_imm().
1519 (do_barrier): Remove bogus constraint().
1520 (do_t_barrier): Remove.
1522 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1524 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1525 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1527 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1529 2013-04-09 Jan Beulich <jbeulich@suse.com>
1531 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1532 Use local variable Rt in more places.
1533 (do_vmsr): Accept all control registers.
1535 2013-04-09 Jan Beulich <jbeulich@suse.com>
1537 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1538 if there was none specified for moves between scalar and core
1541 2013-04-09 Jan Beulich <jbeulich@suse.com>
1543 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1544 NEON_ALL_LANES case.
1546 2013-04-08 Jan Beulich <jbeulich@suse.com>
1548 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1551 2013-04-08 Jan Beulich <jbeulich@suse.com>
1553 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1556 2013-04-03 Alan Modra <amodra@gmail.com>
1558 * doc/as.texinfo: Add support to generate man options for h8300.
1559 * doc/c-h8300.texi: Likewise.
1561 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1563 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1566 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1569 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1571 2013-03-26 Nick Clifton <nickc@redhat.com>
1574 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1575 start of the file each time.
1578 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1581 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1583 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1586 2013-03-21 Will Newton <will.newton@linaro.org>
1588 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1589 pc-relative str instructions in Thumb mode.
1591 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1593 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1594 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1596 * config/tc-h8300.h: Remove duplicated defines.
1598 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1601 * tc-avr.c (mcu_has_3_byte_pc): New function.
1602 (tc_cfi_frame_initial_instructions): Call it to find return
1605 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1608 * config/tc-tic6x.c (tic6x_try_encode): Handle
1609 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1610 encode register pair numbers when required.
1612 2013-03-15 Will Newton <will.newton@linaro.org>
1614 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1615 in vstr in Thumb mode for pre-ARMv7 cores.
1617 2013-03-14 Andreas Schwab <schwab@suse.de>
1619 * doc/c-arc.texi (ARC Directives): Revert last change and use
1620 @itemize instead of @table.
1621 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1623 2013-03-14 Nick Clifton <nickc@redhat.com>
1626 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1627 NULL message, instead just check ARM_CPU_IS_ANY directly.
1629 2013-03-14 Nick Clifton <nickc@redhat.com>
1632 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1634 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1635 to the @item directives.
1636 (ARM-Neon-Alignment): Move to correct place in the document.
1637 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1639 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1642 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1644 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1645 case. Add default BAD_CASE to switch.
1647 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1649 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1650 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1652 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1654 * config/tc-arm.c (crc_ext_armv8): New feature set.
1655 (UNPRED_REG): New macro.
1656 (do_crc32_1): New function.
1657 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1658 do_crc32ch, do_crc32cw): Likewise.
1660 (insns): Add entries for crc32 mnemonics.
1661 (arm_extensions): Add entry for crc.
1663 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1665 * write.h (struct fix): Add fx_dot_frag field.
1666 (dot_frag): Declare.
1667 * write.c (dot_frag): New variable.
1668 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1669 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1670 * expr.c (expr): Save value of frag_now in dot_frag when setting
1672 * read.c (emit_expr): Likewise. Delete comments.
1674 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1676 * config/tc-i386.c (flag_code_names): Removed.
1677 (i386_index_check): Rewrote.
1679 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1681 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1683 (aarch64_double_precision_fmovable): New function.
1684 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1685 function; handle hexadecimal representation of IEEE754 encoding.
1686 (parse_operands): Update the call to parse_aarch64_imm_float.
1688 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1690 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1691 (check_hle): Updated.
1692 (md_assemble): Likewise.
1693 (parse_insn): Likewise.
1695 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1697 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1698 (md_assemble): Check if REP prefix is OK.
1699 (parse_insn): Remove expecting_string_instruction. Set
1702 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1704 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1706 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1708 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1709 for system registers.
1711 2013-02-27 DJ Delorie <dj@redhat.com>
1713 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1714 (rl78_op): Handle %code().
1715 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1716 (tc_gen_reloc): Likwise; convert to a computed reloc.
1717 (md_apply_fix): Likewise.
1719 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1721 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1723 2013-02-25 Terry Guo <terry.guo@arm.com>
1725 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1726 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1727 list of accepted CPUs.
1729 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1732 * config/tc-i386.c (cpu_arch): Add ".smap".
1734 * doc/c-i386.texi: Document smap.
1736 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1738 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1739 mips_assembling_insn appropriately.
1740 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1742 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1744 * config/tc-mips.c (append_insn): Correct indentation, remove
1747 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1749 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1751 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1753 * configure.tgt: Add nios2-*-rtems*.
1755 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1757 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1760 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1762 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1763 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1765 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1767 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1770 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1771 Andrew Jenner <andrew@codesourcery.com>
1773 Based on patches from Altera Corporation.
1775 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1776 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1777 * Makefile.in: Regenerated.
1778 * configure.tgt: Add case for nios2*-linux*.
1779 * config/obj-elf.c: Conditionally include elf/nios2.h.
1780 * config/tc-nios2.c: New file.
1781 * config/tc-nios2.h: New file.
1782 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1783 * doc/Makefile.in: Regenerated.
1784 * doc/all.texi: Set NIOSII.
1785 * doc/as.texinfo (Overview): Add Nios II options.
1786 (Machine Dependencies): Include c-nios2.texi.
1787 * doc/c-nios2.texi: New file.
1788 * NEWS: Note Altera Nios II support.
1790 2013-02-06 Alan Modra <amodra@gmail.com>
1793 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1794 Don't skip fixups with fx_subsy non-NULL.
1795 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1796 with fx_subsy non-NULL.
1798 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1800 * doc/c-metag.texi: Add "@c man" markers.
1802 2013-02-04 Alan Modra <amodra@gmail.com>
1804 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1806 (TC_ADJUST_RELOC_COUNT): Delete.
1807 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1809 2013-02-04 Alan Modra <amodra@gmail.com>
1811 * po/POTFILES.in: Regenerate.
1813 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1815 * config/tc-metag.c: Make SWAP instruction less permissive with
1818 2013-01-29 DJ Delorie <dj@redhat.com>
1820 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1821 relocs in .word/.etc statements.
1823 2013-01-29 Roland McGrath <mcgrathr@google.com>
1825 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1826 immediate value for 8-bit offset" error so it shows line info.
1828 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1830 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1833 2013-01-24 Nick Clifton <nickc@redhat.com>
1835 * config/tc-v850.c: Add support for e3v5 architecture.
1836 * doc/c-v850.texi: Mention new support.
1838 2013-01-23 Nick Clifton <nickc@redhat.com>
1841 * config/tc-avr.c: Include dwarf2dbg.h.
1843 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1845 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1846 (tc_i386_fix_adjustable): Likewise.
1847 (lex_got): Likewise.
1848 (tc_gen_reloc): Likewise.
1850 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1852 * config/tc-aarch64.c (output_operand_error_record): Change to output
1853 the out-of-range error message as value-expected message if there is
1854 only one single value in the expected range.
1855 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1856 LSL #0 as a programmer-friendly feature.
1858 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1860 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1861 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1862 BFD_RELOC_64_SIZE relocations.
1863 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1865 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1866 relocations against local symbols.
1868 2013-01-16 Alan Modra <amodra@gmail.com>
1870 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1871 finding some sort of toc syntax error, and break to avoid
1872 compiler uninit warning.
1874 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1877 * config/tc-i386.c (lex_got): Increment length by 1 if the
1878 relocation token is removed.
1880 2013-01-15 Nick Clifton <nickc@redhat.com>
1882 * config/tc-v850.c (md_assemble): Allow signed values for
1885 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1887 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1890 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1892 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1893 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1894 * config/tc-ppc.c (md_show_usage): Likewise.
1895 (ppc_handle_align): Handle power8's group ending nop.
1897 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1899 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1900 that the assember exits after the opcodes have been printed.
1902 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1904 * app.c: Remove trailing white spaces.
1908 * dw2gencfi.c: Likewise.
1909 * dwarf2dbg.h: Likewise.
1910 * ecoff.c: Likewise.
1911 * input-file.c: Likewise.
1912 * itbl-lex.h: Likewise.
1913 * output-file.c: Likewise.
1916 * subsegs.c: Likewise.
1917 * symbols.c: Likewise.
1918 * write.c: Likewise.
1919 * config/tc-i386.c: Likewise.
1920 * doc/Makefile.am: Likewise.
1921 * doc/Makefile.in: Likewise.
1922 * doc/c-aarch64.texi: Likewise.
1923 * doc/c-alpha.texi: Likewise.
1924 * doc/c-arc.texi: Likewise.
1925 * doc/c-arm.texi: Likewise.
1926 * doc/c-avr.texi: Likewise.
1927 * doc/c-bfin.texi: Likewise.
1928 * doc/c-cr16.texi: Likewise.
1929 * doc/c-d10v.texi: Likewise.
1930 * doc/c-d30v.texi: Likewise.
1931 * doc/c-h8300.texi: Likewise.
1932 * doc/c-hppa.texi: Likewise.
1933 * doc/c-i370.texi: Likewise.
1934 * doc/c-i386.texi: Likewise.
1935 * doc/c-i860.texi: Likewise.
1936 * doc/c-m32c.texi: Likewise.
1937 * doc/c-m32r.texi: Likewise.
1938 * doc/c-m68hc11.texi: Likewise.
1939 * doc/c-m68k.texi: Likewise.
1940 * doc/c-microblaze.texi: Likewise.
1941 * doc/c-mips.texi: Likewise.
1942 * doc/c-msp430.texi: Likewise.
1943 * doc/c-mt.texi: Likewise.
1944 * doc/c-s390.texi: Likewise.
1945 * doc/c-score.texi: Likewise.
1946 * doc/c-sh.texi: Likewise.
1947 * doc/c-sh64.texi: Likewise.
1948 * doc/c-tic54x.texi: Likewise.
1949 * doc/c-tic6x.texi: Likewise.
1950 * doc/c-v850.texi: Likewise.
1951 * doc/c-xc16x.texi: Likewise.
1952 * doc/c-xgate.texi: Likewise.
1953 * doc/c-xtensa.texi: Likewise.
1954 * doc/c-z80.texi: Likewise.
1955 * doc/internals.texi: Likewise.
1957 2013-01-10 Roland McGrath <mcgrathr@google.com>
1959 * hash.c (hash_new_sized): Make it global.
1960 * hash.h: Declare it.
1961 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1964 2013-01-10 Will Newton <will.newton@imgtec.com>
1966 * Makefile.am: Add Meta.
1967 * Makefile.in: Regenerate.
1968 * config/tc-metag.c: New file.
1969 * config/tc-metag.h: New file.
1970 * configure.tgt: Add Meta.
1971 * doc/Makefile.am: Add Meta.
1972 * doc/Makefile.in: Regenerate.
1973 * doc/all.texi: Add Meta.
1974 * doc/as.texiinfo: Document Meta options.
1975 * doc/c-metag.texi: New file.
1977 2013-01-09 Steve Ellcey <sellcey@mips.com>
1979 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1981 * config/tc-mips.c (internalError): Remove, replace with abort.
1983 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1985 * config/tc-aarch64.c (parse_operands): Change to compare the result
1986 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1988 2013-01-07 Nick Clifton <nickc@redhat.com>
1991 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1992 anticipated character.
1993 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1994 here as it is no longer needed.
1996 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1998 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1999 * doc/c-score.texi (SCORE-Opts): Likewise.
2000 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2002 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2004 * config/tc-mips.c: Add support for MIPS r5900.
2005 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2007 (can_swap_branch_p, get_append_method): Detect some conditional
2008 short loops to fix a bug on the r5900 by NOP in the branch delay
2010 (M_MUL): Support 3 operands in multu on r5900.
2011 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2012 (s_mipsset): Force 32 bit floating point on r5900.
2013 (mips_ip): Check parameter range of instructions mfps and mtps on
2015 * configure.in: Detect CPU type when target string contains r5900
2016 (e.g. mips64r5900el-linux-gnu).
2018 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2020 * as.c (parse_args): Update copyright year to 2013.
2022 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2024 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2027 2013-01-02 Nick Clifton <nickc@redhat.com>
2030 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2033 For older changes see ChangeLog-2012
2035 Copyright (C) 2013 Free Software Foundation, Inc.
2037 Copying and distribution of this file, with or without modification,
2038 are permitted in any medium without royalty provided the copyright
2039 notice and this notice are preserved.
2045 version-control: never