gas/ChangeLog

   1 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
   2
   3         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
   4         (TEXI2POD): Use AM_MAKEINFOFLAGS.
   5         (asconfig.texi): Don't set top_srcdir.
   6         * doc/as.texinfo: Don't use top_srcdir.
   7         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
   8
   9 2006-05-02  Paul Brook  <paul@codesourcery.com>
  10
  11         * config/tc-arm.c (arm_optimize_expr): New function.
  12         * config/tc-arm.h (md_optimize_expr): Define
  13         (arm_optimize_expr): Add prototype.
  14         (TC_FORCE_RELOCATION_SUB_SAME): Define.
  15
  16 2006-05-02  Ben Elliston  <bje@au.ibm.com>
  17
  18         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
  19         field unsigned.
  20
  21         * sb.h (sb_list_vector): Move to sb.c.
  22         * sb.c (free_list): Use type of sb_list_vector directly.
  23         (sb_build): Fix off-by-one error in assertion about `size'.
  24
  25 2006-05-01  Ben Elliston  <bje@au.ibm.com>
  26
  27         * listing.c (listing_listing): Remove useless loop.
  28         * macro.c (macro_expand): Remove is_positional local variable.
  29         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
  30         and simplify surrounding expressions, where possible.
  31         (assign_symbol): Likewise.
  32         (s_weakref): Likewise.
  33         * symbols.c (colon): Likewise.
  34
  35 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
  36
  37         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
  38
  39 2006-04-30  Thiemo Seufer  <ths@mips.com>
  40             David Ung  <davidu@mips.com>
  41
  42         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
  43         (mips_immed): New table that records various handling of udi
  44         instruction patterns.
  45         (mips_ip): Adds udi handling.
  46
  47 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
  48
  49         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
  50         of list rather than beginning.
  51
  52 2006-04-26  Julian Brown  <julian@codesourcery.com>
  53
  54         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
  55         (is_quarter_float): Rename from above. Simplify slightly.
  56         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
  57         number.
  58         (parse_neon_mov): Parse floating-point constants.
  59         (neon_qfloat_bits): Fix encoding.
  60         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  61         preference to integer encoding when using the F32 type.
  62
  63 2006-04-26  Julian Brown  <julian@codesourcery.com>
  64
  65         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  66         zero-initialising structures containing it will lead to invalid types).
  67         (arm_it): Add vectype to each operand.
  68         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  69         defined field.
  70         (neon_typed_alias): New structure. Extra information for typed
  71         register aliases.
  72         (reg_entry): Add neon type info field.
  73         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
  74         Break out alternative syntax for coprocessor registers, etc. into...
  75         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
  76         out from arm_reg_parse.
  77         (parse_neon_type): Move. Return SUCCESS/FAIL.
  78         (first_error): New function. Call to ensure first error which occurs is
  79         reported.
  80         (parse_neon_operand_type): Parse exactly one type.
  81         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
  82         (parse_typed_reg_or_scalar): New function. Handle core of both
  83         arm_typed_reg_parse and parse_scalar.
  84         (arm_typed_reg_parse): Parse a register with an optional type.
  85         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
  86         result.
  87         (parse_scalar): Parse a Neon scalar with optional type.
  88         (parse_reg_list): Use first_error.
  89         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
  90         (neon_alias_types_same): New function. Return true if two (alias) types
  91         are the same.
  92         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
  93         of elements.
  94         (insert_reg_alias): Return new reg_entry not void.
  95         (insert_neon_reg_alias): New function. Insert type/index information as
  96         well as register for alias.
  97         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
  98         make typed register aliases accordingly.
  99         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 100         of line.
 101         (s_unreq): Delete type information if present.
 102         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 103         (s_arm_unwind_save_mmxwcg): Likewise.
 104         (s_arm_unwind_movsp): Likewise.
 105         (s_arm_unwind_setfp): Likewise.
 106         (parse_shift): Likewise.
 107         (parse_shifter_operand): Likewise.
 108         (parse_address): Likewise.
 109         (parse_tb): Likewise.
 110         (tc_arm_regname_to_dw2regnum): Likewise.
 111         (md_pseudo_table): Add dn, qn.
 112         (parse_neon_mov): Handle typed operands.
 113         (parse_operands): Likewise.
 114         (neon_type_mask): Add N_SIZ.
 115         (N_ALLMODS): New macro.
 116         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 117         (el_type_of_type_chk): Add some safeguards.
 118         (modify_types_allowed): Fix logic bug.
 119         (neon_check_type): Handle operands with types.
 120         (neon_three_same): Remove redundant optional arg handling.
 121         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 122         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 123         (do_neon_step): Adjust accordingly.
 124         (neon_cmode_for_logic_imm): Use first_error.
 125         (do_neon_bitfield): Call neon_check_type.
 126         (neon_dyadic): Rename to...
 127         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 128         to allow modification of type of the destination.
 129         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 130         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 131         (do_neon_compare): Make destination be an untyped bitfield.
 132         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 133         (neon_mul_mac): Return early in case of errors.
 134         (neon_move_immediate): Use first_error.
 135         (neon_mac_reg_scalar_long): Fix type to include scalar.
 136         (do_neon_dup): Likewise.
 137         (do_neon_mov): Likewise (in several places).
 138         (do_neon_tbl_tbx): Fix type.
 139         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 140         (do_neon_ld_dup): Exit early in case of errors and/or use
 141         first_error.
 142         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 143         Handle .dn/.qn directives.
 144         (REGDEF): Add zero for reg_entry neon field.
 145
 146 2006-04-26  Julian Brown  <julian@codesourcery.com>
 147
 148         * config/tc-arm.c (limits.h): Include.
 149         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 150         (fpu_vfp_v3_or_neon_ext): Declare constants.
 151         (neon_el_type): New enumeration of types for Neon vector elements.
 152         (neon_type_el): New struct. Define type and size of a vector element.
 153         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 154         instruction.
 155         (neon_type): Define struct. The type of an instruction.
 156         (arm_it): Add 'vectype' for the current instruction.
 157         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 158         (vfp_sp_reg_pos): Rename to...
 159         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 160         tags.
 161         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 162         (Neon D or Q register).
 163         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 164         register.
 165         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 166         (my_get_expression): Allow above constant as argument to accept
 167         64-bit constants with optional prefix.
 168         (arm_reg_parse): Add extra argument to return the specific type of
 169         register in when either a D or Q register (REG_TYPE_NDQ) is
 170         requested. Can be NULL.
 171         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 172         (parse_reg_list): Update for new arm_reg_parse args.
 173         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 174         (parse_neon_el_struct_list): New function. Parse element/structure
 175         register lists for VLD<n>/VST<n> instructions.
 176         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 177         (s_arm_unwind_save_mmxwr): Likewise.
 178         (s_arm_unwind_save_mmxwcg): Likewise.
 179         (s_arm_unwind_movsp): Likewise.
 180         (s_arm_unwind_setfp): Likewise.
 181         (parse_big_immediate): New function. Parse an immediate, which may be
 182         64 bits wide. Put results in inst.operands[i].
 183         (parse_shift): Update for new arm_reg_parse args.
 184         (parse_address): Likewise. Add parsing of alignment specifiers.
 185         (parse_neon_mov): Parse the operands of a VMOV instruction.
 186         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 187         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 188         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 189         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 190         (parse_operands): Handle new codes above.
 191         (encode_arm_vfp_sp_reg): Rename to...
 192         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 193         selected VFP version only supports D0-D15.
 194         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 195         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 196         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 197         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 198         encode_arm_vfp_reg name, and allow 32 D regs.
 199         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 200         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 201         regs.
 202         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 203         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 204         constant-load and conversion insns introduced with VFPv3.
 205         (neon_tab_entry): New struct.
 206         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 207         those which are the targets of pseudo-instructions.
 208         (neon_opc): Enumerate opcodes, use as indices into...
 209         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 210         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 211         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 212         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 213         neon_enc_tab.
 214         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 215         Neon instructions.
 216         (neon_type_mask): New. Compact type representation for type checking.
 217         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 218         permitted type combinations.
 219         (N_IGNORE_TYPE): New macro.
 220         (neon_check_shape): New function. Check an instruction shape for
 221         multiple alternatives. Return the specific shape for the current
 222         instruction.
 223         (neon_modify_type_size): New function. Modify a vector type and size,
 224         depending on the bit mask in argument 1.
 225         (neon_type_promote): New function. Convert a given "key" type (of an
 226         operand) into the correct type for a different operand, based on a bit
 227         mask.
 228         (type_chk_of_el_type): New function. Convert a type and size into the
 229         compact representation used for type checking.
 230         (el_type_of_type_ckh): New function. Reverse of above (only when a
 231         single bit is set in the bit mask).
 232         (modify_types_allowed): New function. Alter a mask of allowed types
 233         based on a bit mask of modifications.
 234         (neon_check_type): New function. Check the type of the current
 235         instruction against the variable argument list. The "key" type of the
 236         instruction is returned.
 237         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 238         a Neon data-processing instruction depending on whether we're in ARM
 239         mode or Thumb-2 mode.
 240         (neon_logbits): New function.
 241         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 242         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 243         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 244         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 245         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 246         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 247         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 248         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 249         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 250         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 251         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 252         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 253         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 254         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 255         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 256         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 257         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 258         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 259         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 260         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 261         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 262         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 263         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 264         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 265         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 266         helpers.
 267         (parse_neon_type): New function. Parse Neon type specifier.
 268         (opcode_lookup): Allow parsing of Neon type specifiers.
 269         (REGNUM2, REGSETH, REGSET2): New macros.
 270         (reg_names): Add new VFPv3 and Neon registers.
 271         (NUF, nUF, NCE, nCE): New macros for opcode table.
 272         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 273         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 274         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 275         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 276         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 277         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 278         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 279         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 280         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 281         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 282         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 283         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 284         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 285         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 286         fto[us][lh][sd].
 287         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 288         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 289         (arm_option_cpu_value): Add vfp3 and neon.
 290         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 291         VFPv1 attribute.
 292
 293 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 294
 295         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 296         syntax instead of hardcoded opcodes with ".w18" suffixes.
 297         (wide_branch_opcode): New.
 298         (build_transition): Use it to check for wide branch opcodes with
 299         either ".w18" or ".w15" suffixes.
 300
 301 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 302
 303         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 304         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 305         frag's is_literal flag.
 306
 307 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 308
 309         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 310
 311 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 312
 313         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 314         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 315         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 316         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 317         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 318
 319 2005-04-20  Paul Brook  <paul@codesourcery.com>
 320
 321         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 322         all targets.
 323         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 324
 325 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 326
 327         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 328         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 329         Make some cpus unsupported on ELF.  Run "make dep-am".
 330         * Makefile.in: Regenerate.
 331
 332 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 333
 334         * configure.in (--enable-targets): Indent help message.
 335         * configure: Regenerate.
 336
 337 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 338
 339         PR gas/2533
 340         * config/tc-i386.c (i386_immediate): Check illegal immediate
 341         register operand.
 342
 343 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 344
 345         * config/tc-i386.c: Formatting.
 346         (output_disp, output_imm): ISO C90 params.
 347
 348         * frags.c (frag_offset_fixed_p): Constify args.
 349         * frags.h (frag_offset_fixed_p): Ditto.
 350
 351         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 352         (COFF_MAGIC): Delete.
 353
 354         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 355
 356 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 357
 358         * po/POTFILES.in: Regenerated.
 359
 360 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 361
 362         * doc/as.texinfo: Mention that some .type syntaxes are not
 363         supported on all architectures.
 364
 365 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 366
 367         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 368         instructions when such transformations have been disabled.
 369
 370 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 371
 372         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 373         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 374         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 375         decoding the loop instructions.  Remove current_offset variable.
 376         (xtensa_fix_short_loop_frags): Likewise.
 377         (min_bytes_to_other_loop_end): Remove current_offset argument.
 378
 379 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 380
 381         * config/tc-z80.c (z80_optimize_expr): Removed.
 382         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 383
 384 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 385
 386         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 387         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 388         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 389         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 390         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 391         at90can64, at90usb646, at90usb647, at90usb1286 and
 392         at90usb1287.
 393         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 394
 395 2006-04-07  Paul Brook  <paul@codesourcery.com>
 396
 397         * config/tc-arm.c (parse_operands): Set default error message.
 398
 399 2006-04-07  Paul Brook  <paul@codesourcery.com>
 400
 401         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 402
 403 2006-04-07  Paul Brook  <paul@codesourcery.com>
 404
 405         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 406
 407 2006-04-07  Paul Brook  <paul@codesourcery.com>
 408
 409         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 410         (move_or_literal_pool): Handle Thumb-2 instructions.
 411         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 412
 413 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 414
 415         PR 2512.
 416         * config/tc-i386.c (match_template): Move 64-bit operand tests
 417         inside loop.
 418
 419 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 420
 421         * po/Make-in: Add install-html target.
 422         * Makefile.am: Add install-html and install-html-recursive targets.
 423         * Makefile.in: Regenerate.
 424         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 425         * configure: Regenerate.
 426         * doc/Makefile.am: Add install-html and install-html-am targets.
 427         * doc/Makefile.in: Regenerate.
 428
 429 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 430
 431         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 432         second scan.
 433
 434 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 435             Daniel Jacobowitz  <dan@codesourcery.com>
 436
 437         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 438         (GOTT_BASE, GOTT_INDEX): New.
 439         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 440         GOTT_INDEX when generating VxWorks PIC.
 441         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 442         use the generic *-*-vxworks* stanza instead.
 443
 444 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 445
 446         PR 997
 447         * frags.c (frag_offset_fixed_p): New function.
 448         * frags.h (frag_offset_fixed_p): Declare.
 449         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 450         (resolve_expression): Likewise.
 451
 452 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 453
 454         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 455         of the same length but different numbers of slots.
 456
 457 2006-03-30  Andreas Schwab  <schwab@suse.de>
 458
 459         * configure.in: Fix help string for --enable-targets option.
 460         * configure: Regenerate.
 461
 462 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 463
 464         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 465         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 466         overrun and avoid excessive copying.
 467
 468         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 469         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 470         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 471         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 472         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 473         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 474         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 475         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 476         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 477         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 478         (struct m68k_cpu): Change chip field to control_regs.
 479         (current_chip): Remove.
 480         (control_regs): New.
 481         (m68k_archs, m68k_extensions): Adjust.
 482         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 483         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 484         (find_cf_chip): Reimplement for new organization of cpu table.
 485         (select_control_regs): Remove.
 486         (mri_chip): Adjust.
 487         (struct save_opts): Save control regs, not chip.
 488         (s_save, s_restore): Adjust.
 489         (m68k_lookup_cpu): Give deprecated warning when necessary.
 490         (m68k_init_arch): Adjust.
 491         (md_show_usage): Adjust for new cpu table organization.
 492
 493 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 494
 495         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 496         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 497         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 498         "elf/bfin.h".
 499         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 500         (any_gotrel): New rule.
 501         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 502         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 503         "elf/bfin.h".
 504         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 505         (bfin_pic_ptr): New function.
 506         (md_pseudo_table): Add it for ".picptr".
 507         (OPTION_FDPIC): New macro.
 508         (md_longopts): Add -mfdpic.
 509         (md_parse_option): Handle it.
 510         (md_begin): Set BFD flags.
 511         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 512         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 513         us for GOT relocs.
 514         * Makefile.am (bfin-parse.o): Update dependencies.
 515         (DEPTC_bfin_elf): Likewise.
 516         * Makefile.in: Regenerate.
 517
 518 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 519
 520         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 521         mcfemac instead of mcfmac.
 522
 523 2006-03-23  Michael Matz  <matz@suse.de>
 524
 525         * config/tc-i386.c (type_names): Correct placement of 'static'.
 526         (reloc): Map some more relocs to their 64 bit counterpart when
 527         size is 8.
 528         (output_insn): Work around breakage if DEBUG386 is defined.
 529         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 530         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 531         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 532         different from i386.
 533         (output_imm): Ditto.
 534         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 535         Imm64.
 536         (md_convert_frag): Jumps can now be larger than 2GB away, error
 537         out in that case.
 538         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 539         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 540
 541 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 542             Daniel Jacobowitz  <dan@codesourcery.com>
 543             Phil Edwards  <phil@codesourcery.com>
 544             Zack Weinberg  <zack@codesourcery.com>
 545             Mark Mitchell  <mark@codesourcery.com>
 546             Nathan Sidwell  <nathan@codesourcery.com>
 547
 548         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 549         (md_begin): Complain about -G being used for PIC.  Don't change
 550         the text, data and bss alignments on VxWorks.
 551         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 552         generating VxWorks PIC.
 553         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 554         (macro): Likewise, but do not treat la $25 specially for
 555         VxWorks PIC, and do not handle jal.
 556         (OPTION_MVXWORKS_PIC): New macro.
 557         (md_longopts): Add -mvxworks-pic.
 558         (md_parse_option): Don't complain about using PIC and -G together here.
 559         Handle OPTION_MVXWORKS_PIC.
 560         (md_estimate_size_before_relax): Always use the first relaxation
 561         sequence on VxWorks.
 562         * config/tc-mips.h (VXWORKS_PIC): New.
 563
 564 2006-03-21  Paul Brook  <paul@codesourcery.com>
 565
 566         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 567
 568 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 569
 570         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 571         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 572         (get_loop_align_size): New.
 573         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 574         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 575         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 576         (get_noop_aligned_address): Use get_loop_align_size.
 577         (get_aligned_diff): Likewise.
 578
 579 2006-03-21  Paul Brook  <paul@codesourcery.com>
 580
 581         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 582
 583 2006-03-20  Paul Brook  <paul@codesourcery.com>
 584
 585         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 586         (do_t_branch): Encode branches inside IT blocks as unconditional.
 587         (do_t_cps): New function.
 588         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 589         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 590         (opcode_lookup): Allow conditional suffixes on all instructions in
 591         Thumb mode.
 592         (md_assemble): Advance condexec state before checking for errors.
 593         (insns): Use do_t_cps.
 594
 595 2006-03-20  Paul Brook  <paul@codesourcery.com>
 596
 597         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 598         outputting the insn.
 599
 600 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 601
 602         * config/tc-vax.c: Update copyright year.
 603         * config/tc-vax.h: Likewise.
 604
 605 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 606
 607         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 608         make it static.
 609         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 610
 611 2006-03-17  Paul Brook  <paul@codesourcery.com>
 612
 613         * config/tc-arm.c (insns): Add ldm and stm.
 614
 615 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 616
 617         PR gas/2446
 618         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 619
 620 2006-03-16  Paul Brook  <paul@codesourcery.com>
 621
 622         * config/tc-arm.c (insns): Add "svc".
 623
 624 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 625
 626         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 627         flag and avoid double underscore prefixes.
 628
 629 2006-03-10  Paul Brook  <paul@codesourcery.com>
 630
 631         * config/tc-arm.c (md_begin): Handle EABIv5.
 632         (arm_eabis): Add EF_ARM_EABI_VER5.
 633         * doc/c-arm.texi: Document -meabi=5.
 634
 635 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 636
 637         * app.c (do_scrub_chars): Simplify string handling.
 638
 639 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 640             Daniel Jacobowitz  <dan@codesourcery.com>
 641             Zack Weinberg  <zack@codesourcery.com>
 642             Nathan Sidwell  <nathan@codesourcery.com>
 643             Paul Brook  <paul@codesourcery.com>
 644             Ricardo Anguiano  <anguiano@codesourcery.com>
 645             Phil Edwards  <phil@codesourcery.com>
 646
 647         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 648         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 649         R_ARM_ABS12 reloc.
 650         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 651         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 652         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 653
 654 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 655
 656         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 657         even when using the text-section-literals option.
 658
 659 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 660
 661         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 662         and cf.
 663         (m68k_ip): <case 'J'> Check we have some control regs.
 664         (md_parse_option): Allow raw arch switch.
 665         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 666         whether 68881 or cfloat was meant by -mfloat.
 667         (md_show_usage): Adjust extension display.
 668         (m68k_elf_final_processing): Adjust.
 669
 670 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 671
 672         * config/tc-avr.c (avr_mod_hash_value): New function.
 673         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 674         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 675         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 676         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 677         of (int).
 678         (tc_gen_reloc): Handle substractions of symbols, if possible do
 679         fixups, abort otherwise.
 680         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 681         tc_fix_adjustable): Define.
 682
 683 2006-03-02  James E Wilson  <wilson@specifix.com>
 684
 685         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 686         change the template, then clear md.slot[curr].end_of_insn_group.
 687
 688 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 689
 690         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 691
 692 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 693
 694         PR/1070
 695         * macro.c (getstring): Don't treat parentheses special anymore.
 696         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 697         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 698         characters.
 699
 700 2006-02-28  Mat <mat@csail.mit.edu>
 701
 702         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 703
 704 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 705
 706         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 707         field.
 708         (CFI_signal_frame): Define.
 709         (cfi_pseudo_table): Add .cfi_signal_frame.
 710         (dot_cfi): Handle CFI_signal_frame.
 711         (output_cie): Handle cie->signal_frame.
 712         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 713         different.  Copy signal_frame from FDE to newly created CIE.
 714         * doc/as.texinfo: Document .cfi_signal_frame.
 715
 716 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 717
 718         * doc/Makefile.am: Add html target.
 719         * doc/Makefile.in: Regenerate.
 720         * po/Make-in: Add html target.
 721
 722 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 723
 724         * config/tc-i386.c (output_insn): Support Intel Merom New
 725         Instructions.
 726
 727         * config/tc-i386.h (CpuMNI): New.
 728         (CpuUnknownFlags): Add CpuMNI.
 729
 730 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 731
 732         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 733         (hpriv_reg_table): New table for hyperprivileged registers.
 734         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 735         register encoding.
 736
 737 2006-02-24  DJ Delorie  <dj@redhat.com>
 738
 739         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 740         (tc_gen_reloc): Don't define.
 741         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 742         (OPTION_LINKRELAX): New.
 743         (md_longopts): Add it.
 744         (m32c_relax): New.
 745         (md_parse_options): Set it.
 746         (md_assemble): Emit relaxation relocs as needed.
 747         (md_convert_frag): Emit relaxation relocs as needed.
 748         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 749         (m32c_apply_fix): New.
 750         (tc_gen_reloc): New.
 751         (m32c_force_relocation): Force out jump relocs when relaxing.
 752         (m32c_fix_adjustable): Return false if relaxing.
 753
 754 2006-02-24  Paul Brook  <paul@codesourcery.com>
 755
 756         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 757         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 758         (struct asm_barrier_opt): Define.
 759         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 760         (parse_psr): Accept V7M psr names.
 761         (parse_barrier): New function.
 762         (enum operand_parse_code): Add OP_oBARRIER.
 763         (parse_operands): Implement OP_oBARRIER.
 764         (do_barrier): New function.
 765         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 766         (do_t_cpsi): Add V7M restrictions.
 767         (do_t_mrs, do_t_msr): Validate V7M variants.
 768         (md_assemble): Check for NULL variants.
 769         (v7m_psrs, barrier_opt_names): New tables.
 770         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 771         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 772         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 773         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 774         (struct cpu_arch_ver_table): Define.
 775         (cpu_arch_ver): New.
 776         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 777         Tag_CPU_arch_profile.
 778         * doc/c-arm.texi: Document new cpu and arch options.
 779
 780 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 781
 782         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 783
 784 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 785
 786         * config/tc-ia64.c: Update copyright years.
 787
 788 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 789
 790         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 791         SDM 2.2.
 792
 793 2005-02-22  Paul Brook  <paul@codesourcery.com>
 794
 795         * config/tc-arm.c (do_pld): Remove incorrect write to
 796         inst.instruction.
 797         (encode_thumb32_addr_mode): Use correct operand.
 798
 799 2006-02-21  Paul Brook  <paul@codesourcery.com>
 800
 801         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 802
 803 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 804             Anil Paranjape   <anilp1@kpitcummins.com>
 805             Shilin Shakti    <shilins@kpitcummins.com>
 806
 807         * Makefile.am: Add xc16x related entry.
 808         * Makefile.in: Regenerate.
 809         * configure.in: Added xc16x related entry.
 810         * configure: Regenerate.
 811         * config/tc-xc16x.h: New file
 812         * config/tc-xc16x.c: New file
 813         * doc/c-xc16x.texi: New file for xc16x
 814         * doc/all.texi: Entry for xc16x
 815         * doc/Makefile.texi: Added c-xc16x.texi
 816         * NEWS: Announce the support for the new target.
 817
 818 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 819
 820         * configure.tgt: set emulation for mips-*-netbsd*
 821
 822 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 823
 824         * config.in: Rebuilt.
 825
 826 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 827
 828         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 829         from 1, not 0, in error messages.
 830         (md_assemble): Simplify special-case check for ENTRY instructions.
 831         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 832         operand in error message.
 833
 834 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 835
 836         * configure.tgt (arm-*-linux-gnueabi*): Change to
 837         arm-*-linux-*eabi*.
 838
 839 2006-02-10  Nick Clifton  <nickc@redhat.com>
 840
 841         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 842         32-bit value is propagated into the upper bits of a 64-bit long.
 843
 844         * config/tc-arc.c (init_opcode_tables): Fix cast.
 845         (arc_extoper, md_operand): Likewise.
 846
 847 2006-02-09  David Heine  <dlheine@tensilica.com>
 848
 849         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 850         each relaxation step.
 851
 852 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 853
 854         * configure.in (CHECK_DECLS): Add vsnprintf.
 855         * configure: Regenerate.
 856         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 857         include/declare here, but...
 858         * as.h: Move code detecting VARARGS idiom to the top.
 859         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 860         (vsnprintf): Declare if not already declared.
 861
 862 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 863
 864         * as.c (close_output_file): New.
 865         (main): Register close_output_file with xatexit before
 866         dump_statistics. Don't call output_file_close.
 867
 868 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 869
 870         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 871         mcf5329_control_regs): New.
 872         (not_current_architecture, selected_arch, selected_cpu): New.
 873         (m68k_archs, m68k_extensions): New.
 874         (archs): Renamed to ...
 875         (m68k_cpus): ... here.  Adjust.
 876         (n_arches): Remove.
 877         (md_pseudo_table): Add arch and cpu directives.
 878         (find_cf_chip, m68k_ip): Adjust table scanning.
 879         (no_68851, no_68881): Remove.
 880         (md_assemble): Lazily initialize.
 881         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 882         (md_init_after_args): Move functionality to m68k_init_arch.
 883         (mri_chip): Adjust table scanning.
 884         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 885         options with saner parsing.
 886         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 887         m68k_init_arch): New.
 888         (s_m68k_cpu, s_m68k_arch): New.
 889         (md_show_usage): Adjust.
 890         (m68k_elf_final_processing): Set CF EF flags.
 891         * config/tc-m68k.h (m68k_init_after_args): Remove.
 892         (tc_init_after_args): Remove.
 893         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 894         (M68k-Directives): Document .arch and .cpu directives.
 895
 896 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 897
 898         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 899         synonyms for equ and defl.
 900         (z80_cons_fix_new): New function.
 901         (emit_byte): Disallow relative jumps to absolute locations.
 902         (emit_data): Only handle defb, prototype changed, because defb is
 903         now handled as pseudo-op rather than an instruction.
 904         (instab): Entries for defb,defw,db,dw moved from here...
 905         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 906         Add entries for def24,def32,d24,d32.
 907         (md_assemble): Improved error handling.
 908         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 909         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 910         (z80_cons_fix_new): Declare.
 911         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 912         (def24,d24,def32,d32): New pseudo-ops.
 913
 914 2006-02-02  Paul Brook  <paul@codesourcery.com>
 915
 916         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 917
 918 2005-02-02  Paul Brook  <paul@codesourcery.com>
 919
 920         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 921         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 922         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 923         T2_OPCODE_RSB): Define.
 924         (thumb32_negate_data_op): New function.
 925         (md_apply_fix): Use it.
 926
 927 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 928
 929         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 930         fields.
 931         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 932         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 933         subtracted symbols.
 934         (relaxation_requirements): Add pfinish_frag argument and use it to
 935         replace setting tinsn->record_fix fields.
 936         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 937         and vinsn_to_insnbuf.  Remove references to record_fix and
 938         slot_sub_symbols fields.
 939         (xtensa_mark_narrow_branches): Delete unused code.
 940         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 941         a symbol.
 942         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 943         record_fix fields.
 944         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 945         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 946         of the record_fix field.  Simplify error messages for unexpected
 947         symbolic operands.
 948         (set_expr_symbol_offset_diff): Delete.
 949
 950 2006-01-31  Paul Brook  <paul@codesourcery.com>
 951
 952         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 953
 954 2006-01-31  Paul Brook  <paul@codesourcery.com>
 955         Richard Earnshaw <rearnsha@arm.com>
 956
 957         * config/tc-arm.c: Use arm_feature_set.
 958         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 959         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 960         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 961         New variables.
 962         (insns): Use them.
 963         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 964         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 965         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 966         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 967         feature flags.
 968         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 969         (arm_opts): Move old cpu/arch options from here...
 970         (arm_legacy_opts): ... to here.
 971         (md_parse_option): Search arm_legacy_opts.
 972         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
 973         (arm_float_abis, arm_eabis): Make const.
 974
 975 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
 976
 977         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
 978
 979 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 980
 981         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
 982         in load immediate intruction.
 983
 984 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 985
 986         * config/bfin-parse.y (value_match): Use correct conversion
 987         specifications in template string for __FILE__ and __LINE__.
 988         (binary): Ditto.
 989         (unary): Ditto.
 990
 991 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
 992
 993         Introduce TLS descriptors for i386 and x86_64.
 994         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
 995         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
 996         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
 997         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
 998         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
 999         displacement bits.
1000         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1001         (lex_got): Handle @tlsdesc and @tlscall.
1002         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1003
1004 2006-01-11  Nick Clifton  <nickc@redhat.com>
1005
1006         Fixes for building on 64-bit hosts:
1007         * config/tc-avr.c (mod_index): New union to allow conversion
1008         between pointers and integers.
1009         (md_begin, avr_ldi_expression): Use it.
1010         * config/tc-i370.c (md_assemble): Add cast for argument to print
1011         statement.
1012         * config/tc-tic54x.c (subsym_substitute): Likewise.
1013         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1014         opindex field of fr_cgen structure into a pointer so that it can
1015         be stored in a frag.
1016         * config/tc-mn10300.c (md_assemble): Likewise.
1017         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1018         types.
1019         * config/tc-v850.c: Replace uses of (int) casts with correct
1020         types.
1021
1022 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1023
1024         PR gas/2117
1025         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1026
1027 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1028
1029         PR gas/2101
1030         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1031         a local-label reference.
1032
1033 For older changes see ChangeLog-2005
1034 \f
1035 Local Variables:
1036 mode: change-log
1037 left-margin: 8
1038 fill-column: 74
1039 version-control: never
1040 End: