[PATCH 4/4]: Add generic prototype for md_pcrel_from_section
[deliverable/binutils-gdb.git] / gas / NEWS
1 -*- text -*-
2
3 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
4
5 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
6 -mlfence-before-ret= options to x86 assembler to help mitigate
7 CVE-2020-0551.
8
9 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
10 (if such output is being generated). Added the ability to generate
11 version 5 .debug_line sections.
12
13 Changes in 2.34:
14
15 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
16 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
17 options to x86 assembler to align branches within a fixed boundary
18 with segment prefixes or NOPs.
19
20 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
21
22 * Add support for z80-elf target.
23
24 * Add support for relocation of each byte or word of multibyte value to Z80
25 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
26 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
27
28 * Add SDCC support for Z80 targets.
29
30 Changes in 2.33:
31
32 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
33 instructions.
34
35 * Add support for the Arm Transactional Memory Extension (TME)
36 instructions.
37
38 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
39 instructions.
40
41 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
42 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
43 time option to set the default behavior. Set the default if the configure
44 option is not used to "no".
45
46 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
47 processors.
48
49 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
50 Cortex-A76AE, and Cortex-A77 processors.
51
52 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
53 floating point literals. Add .float16_format directive and
54 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
55 encoding.
56
57 * Add --gdwarf-cie-version command line flag. This allows control over which
58 version of DWARF CIE the assembler creates.
59
60 Changes in 2.32:
61
62 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
63 VEX.W-ignored (WIG) VEX instructions.
64
65 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
66 notes. Add a --enable-x86-used-note configure time option to set the
67 default behavior. Set the default if the configure option is not used
68 to "no".
69
70 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
71
72 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
73
74 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
75
76 * Add support for the C-SKY processor series.
77
78 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
79 ASE.
80
81 Changes in 2.31:
82
83 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
84 now only set the bottom bit of the address of thumb function symbols
85 if the -mthumb-interwork command line option is active.
86
87 * Add support for the MIPS Global INValidate (GINV) ASE.
88
89 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
90
91 * Add support for the Freescale S12Z architecture.
92
93 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
94 Build Attribute notes if none are present in the input sources. Add a
95 --enable-generate-build-notes=[yes|no] configure time option to set the
96 default behaviour. Set the default if the configure option is not used
97 to "no".
98
99 * Remove -mold-gcc command-line option for x86 targets.
100
101 * Add -O[2|s] command-line options to x86 assembler to enable alternate
102 shorter instruction encoding.
103
104 * Add support for .nops directive. It is currently supported only for
105 x86 targets.
106
107 Changes in 2.30:
108
109 * Add support for loaction views in DWARF debug line information.
110
111 Changes in 2.29:
112
113 * Add support for ELF SHF_GNU_MBIND.
114
115 * Add support for the WebAssembly file format and wasm32 ELF conversion.
116
117 * PowerPC gas now checks that the correct register class is used in
118 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
119 that the registers are invalid.
120
121 * Add support for the Texas Instruments PRU processor.
122
123 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
124 added to the ARM port.
125
126 Changes in 2.28:
127
128 * Add support for the RISC-V architecture.
129
130 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
131
132 Changes in 2.27:
133
134 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
135
136 * Add --no-pad-sections to stop the assembler from padding the end of output
137 sections up to their alignment boundary.
138
139 * Support for the ARMv8-M architecture has been added to the ARM port. Support
140 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
141 port.
142
143 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
144 .extCoreRegister pseudo-ops that allow an user to define custom
145 instructions, conditional codes, auxiliary and core registers.
146
147 * Add a configure option --enable-elf-stt-common to decide whether ELF
148 assembler should generate common symbols with the STT_COMMON type by
149 default. Default to no.
150
151 * New command-line option --elf-stt-common= for ELF targets to control
152 whether to generate common symbols with the STT_COMMON type.
153
154 * Add ability to set section flags and types via numeric values for ELF
155 based targets.
156
157 * Add a configure option --enable-x86-relax-relocations to decide whether
158 x86 assembler should generate relax relocations by default. Default to
159 yes, except for x86 Solaris targets older than Solaris 12.
160
161 * New command-line option -mrelax-relocations= for x86 target to control
162 whether to generate relax relocations.
163
164 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
165 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
166
167 * Add assembly-time relaxation option for ARC cpus.
168
169 * Add --with-cpu=TYPE configure option for ARC gas. This allows the default
170 cpu type to be adjusted at configure time.
171
172 Changes in 2.26:
173
174 * Add a configure option --enable-compressed-debug-sections={all,gas} to
175 decide whether DWARF debug sections should be compressed by default.
176
177 * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
178 assembler support for Argonaut RISC architectures.
179
180 * Symbol and label names can now be enclosed in double quotes (") which allows
181 them to contain characters that are not part of valid symbol names in high
182 level languages.
183
184 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
185 previous spelling, -march=armv6zk, is still accepted.
186
187 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
188 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
189 extensions has also been added to the Aarch64 port.
190
191 * Support for the ARMv8.1 architecture has been added to the ARM port. Support
192 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
193 been added to the ARM port.
194
195 * Extend --compress-debug-sections option to support
196 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
197 targets.
198
199 * --compress-debug-sections is turned on for Linux/x86 by default.
200
201 Changes in 2.25:
202
203 * Add support for the AVR Tiny microcontrollers.
204
205 * Replace support for openrisc and or32 with support for or1k.
206
207 * Enhanced the ARM port to accept the assembler output from the CodeComposer
208 Studio tool. Support is enabled via the new command-line option -mccs.
209
210 * Add support for the Andes NDS32.
211
212 Changes in 2.24:
213
214 * Add support for the Texas Instruments MSP430X processor.
215
216 * Add -gdwarf-sections command-line option to enable per-code-section
217 generation of DWARF .debug_line sections.
218
219 * Add support for Altera Nios II.
220
221 * Add support for the Imagination Technologies Meta processor.
222
223 * Add support for the v850e3v5.
224
225 * Remove assembler support for MIPS ECOFF targets.
226
227 Changes in 2.23:
228
229 * Add support for the 64-bit ARM architecture: AArch64.
230
231 * Add support for S12X processor.
232
233 * Add support for the VLE extension to the PowerPC architecture.
234
235 * Add support for the Freescale XGATE architecture.
236
237 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
238 directives. These are currently available only for x86 and ARM targets.
239
240 * Add support for the Renesas RL78 architecture.
241
242 * Add support for the Adapteva EPIPHANY architecture.
243
244 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
245
246 Changes in 2.22:
247
248 * Add support for the Tilera TILEPro and TILE-Gx architectures.
249
250 Changes in 2.21:
251
252 * Gas no longer requires doubling of ampersands in macros.
253
254 * Add support for the TMS320C6000 (TI C6X) processor family.
255
256 * GAS now understands an extended syntax in the .section directive flags
257 for COFF targets that allows the section's alignment to be specified. This
258 feature has also been backported to the 2.20 release series, starting with
259 2.20.1.
260
261 * Add support for the Renesas RX processor.
262
263 * New command-line option, --compress-debug-sections, which requests
264 compression of DWARF debug information sections in the relocatable output
265 file. Compressed debug sections are supported by readelf, objdump, and
266 gold, but not currently by Gnu ld.
267
268 Changes in 2.20:
269
270 * Added support for v850e2 and v850e2v3.
271
272 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
273 pseudo op. It marks the symbol as being globally unique in the entire
274 process.
275
276 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
277 in binary rather than text.
278
279 * Add support for common symbol alignment to PE formats.
280
281 * Add support for the new discriminator column in the DWARF line table,
282 with a discriminator operand for the .loc directive.
283
284 * Add support for Sunplus score architecture.
285
286 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
287 indicate that if the symbol is the target of a relocation, its value should
288 not be use. Instead the function should be invoked and its result used as
289 the value.
290
291 * Add support for Lattice Mico32 (lm32) architecture.
292
293 * Add support for Xilinx MicroBlaze architecture.
294
295 Changes in 2.19:
296
297 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
298 tables without runtime relocation.
299
300 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
301 adds compatibility with H'00 style hex constants.
302
303 * New command-line option, -msse-check=[none|error|warning], for x86
304 targets.
305
306 * New sub-option added to the assembler's -a command-line switch to
307 generate a listing output. The 'g' sub-option will insert into the listing
308 various information about the assembly, such as assembler version, the
309 command-line options used, and a time stamp.
310
311 * New command-line option -msse2avx for x86 target to encode SSE
312 instructions with VEX prefix.
313
314 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
315
316 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
317 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
318 -mnaked-reg and -mold-gcc, for x86 targets.
319
320 * Support for generating wide character strings has been added via the new
321 pseudo ops: .string16, .string32 and .string64.
322
323 * Support for SSE5 has been added to the i386 port.
324
325 Changes in 2.18:
326
327 * The GAS sources are now released under the GPLv3.
328
329 * Support for the National Semiconductor CR16 target has been added.
330
331 * Added gas .reloc pseudo. This is a low-level interface for creating
332 relocations.
333
334 * Add support for x86_64 PE+ target.
335
336 * Add support for Score target.
337
338 Changes in 2.17:
339
340 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
341
342 * Support for ms2 architecture has been added.
343
344 * Support for the Z80 processor family has been added.
345
346 * Add support for the "@<file>" syntax to the command line, so that extra
347 switches can be read from <file>.
348
349 * The SH target supports a new command-line switch --enable-reg-prefix which,
350 if enabled, will allow register names to be optionally prefixed with a $
351 character. This allows register names to be distinguished from label names.
352
353 * Macros with a variable number of arguments are now supported. See the
354 documentation for how this works.
355
356 * Added --reduce-memory-overheads switch to reduce the size of the hash
357 tables used, at the expense of longer assembly times, and
358 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
359
360 * Macro names and macro parameter names can now be any identifier that would
361 also be legal as a symbol elsewhere. For macro parameter names, this is
362 known to cause problems in certain sources when the respective target uses
363 characters inconsistently, and thus macro parameter references may no longer
364 be recognized as such (see the documentation for details).
365
366 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
367 for the VAX target in order to be more compatible with the VAX MACRO
368 assembler.
369
370 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
371
372 Changes in 2.16:
373
374 * Redefinition of macros now results in an error.
375
376 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
377
378 * New command-line option -munwind-check=[warning|error] for IA64
379 targets.
380
381 * The IA64 port now uses automatic dependency violation removal as its default
382 mode.
383
384 * Port to MAXQ processor contributed by HCL Tech.
385
386 * Added support for generating unwind tables for ARM ELF targets.
387
388 * Add a -g command-line option to generate debug information in the target's
389 preferred debug format.
390
391 * Support for the crx-elf target added.
392
393 * Support for the sh-symbianelf target added.
394
395 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
396 on pe[i]-i386; required for this target's DWARF 2 support.
397
398 * Support for Motorola MCF521x/5249/547x/548x added.
399
400 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
401 instrucitons.
402
403 * New command-line option -mno-shared for MIPS ELF targets.
404
405 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
406 added to enter (and leave) alternate macro syntax mode.
407
408 Changes in 2.15:
409
410 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
411 deprecated and will be removed in a future release.
412
413 * Added PIC m32r Linux (ELF) and support to M32R assembler.
414
415 * Added support for ARM V6.
416
417 * Added support for sh4a and variants.
418
419 * Support for Renesas M32R2 added.
420
421 * Limited support for Mapping Symbols as specified in the ARM ELF
422 specification has been added to the arm assembler.
423
424 * On ARM architectures, added a new gas directive ".unreq" that undoes
425 definitions created by ".req".
426
427 * Support for Motorola ColdFire MCF528x added.
428
429 * Added --gstabs+ switch to enable the generation of STABS debug format
430 information with GNU extensions.
431
432 * Added support for MIPS64 Release 2.
433
434 * Added support for v850e1.
435
436 * Added -n switch for x86 assembler. By default, x86 GAS replaces
437 multiple nop instructions used for alignment within code sections
438 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
439 switch disables the optimization.
440
441 * Removed -n option from MIPS assembler. It was not useful, and confused the
442 existing -non_shared option.
443
444 Changes in 2.14:
445
446 * Added support for MIPS32 Release 2.
447
448 * Added support for Xtensa architecture.
449
450 * Support for Intel's iWMMXt processor (an ARM variant) added.
451
452 * An assembler test generator has been contributed and an example file that
453 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
454
455 * Support for SH2E added.
456
457 * GASP has now been removed.
458
459 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
460 DSP's contributed by Michael Hayes and Svein E. Seldal.
461
462 * Support for the Ubicom IP2xxx microcontroller added.
463
464 Changes in 2.13:
465
466 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
467 and FR500 included.
468
469 * Support for DLX processor added.
470
471 * GASP has now been deprecated and will be removed in a future release. Use
472 the macro facilities in GAS instead.
473
474 * GASP now correctly parses floating point numbers. Unless the base is
475 explicitly specified, they are interpreted as decimal numbers regardless of
476 the currently specified base.
477
478 Changes in 2.12:
479
480 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
481
482 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
483
484 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
485 specifying the target instruction set. The old method of specifying the
486 target processor has been deprecated, but is still accepted for
487 compatibility.
488
489 * Support for the VFP floating-point instruction set has been added to
490 the ARM assembler.
491
492 * New psuedo op: .incbin to include a set of binary data at a given point
493 in the assembly. Contributed by Anders Norlander.
494
495 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
496 but still works for compatability.
497
498 * The MIPS assembler no longer issues a warning by default when it
499 generates a nop instruction from a macro. The new command-line option
500 -n will turn on the warning.
501
502 Changes in 2.11:
503
504 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
505
506 * x86 gas now supports the full Pentium4 instruction set.
507
508 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
509
510 * Support for Motorola 68HC11 and 68HC12.
511
512 * Support for Texas Instruments TMS320C54x (tic54x).
513
514 * Support for IA-64.
515
516 * Support for i860, by Jason Eckhardt.
517
518 * Support for CRIS (Axis Communications ETRAX series).
519
520 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
521
522 * x86 gas -q command-line option quietens warnings about register size changes
523 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
524 translating various deprecated floating point instructions.
525
526 Changes in 2.10:
527
528 * Support for the ARM msr instruction was changed to only allow an immediate
529 operand when altering the flags field.
530
531 * Support for ATMEL AVR.
532
533 * Support for IBM 370 ELF. Somewhat experimental.
534
535 * Support for numbers with suffixes.
536
537 * Added support for breaking to the end of repeat loops.
538
539 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
540
541 * New .elseif pseudo-op added.
542
543 * New --fatal-warnings option.
544
545 * picoJava architecture support added.
546
547 * Motorola MCore 210 processor support added.
548
549 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
550 assembly programs with intel syntax.
551
552 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
553
554 * Added -gdwarf2 option to generate DWARF 2 debugging information.
555
556 * Full 16-bit mode support for i386.
557
558 * Greatly improved instruction operand checking for i386. This change will
559 produce errors or warnings on incorrect assembly code that previous versions
560 of gas accepted. If you get unexpected messages from code that worked with
561 older versions of gas, please double check the code before reporting a bug.
562
563 * Weak symbol support added for COFF targets.
564
565 * Mitsubishi D30V support added.
566
567 * Texas Instruments c80 (tms320c80) support added.
568
569 * i960 ELF support added.
570
571 * ARM ELF support added.
572
573 Changes in 2.9:
574
575 * Texas Instruments c30 (tms320c30) support added.
576
577 * The assembler now optimizes the exception frame information generated by egcs
578 and gcc 2.8. The new --traditional-format option disables this optimization.
579
580 * Added --gstabs option to generate stabs debugging information.
581
582 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
583 listing.
584
585 * Added -MD option to print dependencies.
586
587 Changes in 2.8:
588
589 * BeOS support added.
590
591 * MIPS16 support added.
592
593 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
594
595 * Alpha/VMS support added.
596
597 * m68k options --base-size-default-16, --base-size-default-32,
598 --disp-size-default-16, and --disp-size-default-32 added.
599
600 * The alignment directives now take an optional third argument, which is the
601 maximum number of bytes to skip. If doing the alignment would require
602 skipping more than the given number of bytes, the alignment is not done at
603 all.
604
605 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
606
607 * The -a option takes a new suboption, c (e.g., -alc), to skip false
608 conditionals in listings.
609
610 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
611 the symbol is already defined.
612
613 Changes in 2.7:
614
615 * The PowerPC assembler now allows the use of symbolic register names (r0,
616 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
617 can be used any time. PowerPC 860 move to/from SPR instructions have been
618 added.
619
620 * Alpha Linux (ELF) support added.
621
622 * PowerPC ELF support added.
623
624 * m68k Linux (ELF) support added.
625
626 * i960 Hx/Jx support added.
627
628 * i386/PowerPC gnu-win32 support added.
629
630 * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
631 default is to build COFF-only support. To get a set of tools that generate
632 ELF (they'll understand both COFF and ELF), you must configure with
633 target=i386-unknown-sco3.2v5elf.
634
635 * m88k-motorola-sysv3* support added.
636
637 Changes in 2.6:
638
639 * Gas now directly supports macros, without requiring GASP.
640
641 * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
642 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
643 ``.mri 0'' is seen; this can be convenient for inline assembler code.
644
645 * Added --defsym SYM=VALUE option.
646
647 * Added -mips4 support to MIPS assembler.
648
649 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
650
651 Changes in 2.4:
652
653 * Converted this directory to use an autoconf-generated configure script.
654
655 * ARM support, from Richard Earnshaw.
656
657 * Updated VMS support, from Pat Rankin, including considerably improved
658 debugging support.
659
660 * Support for the control registers in the 68060.
661
662 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
663 provide for possible future gcc changes, for targets where gas provides some
664 features not available in the native assembler. If the native assembler is
665 used, it should become obvious pretty quickly what the problem is.
666
667 * Usage message is available with "--help".
668
669 * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
670 also, but didn't get into the NEWS file.)
671
672 * Weak symbol support for a.out.
673
674 * A bug in the listing code which could cause an infinite loop has been fixed.
675 Bugs in listings when generating a COFF object file have also been fixed.
676
677 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
678 Paul Kranenburg.
679
680 * Improved Alpha support. Immediate constants can have a much larger range
681 now. Support for the 21164 has been contributed by Digital.
682
683 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
684
685 Changes in 2.3:
686
687 * Mach i386 support, by David Mackenzie and Ken Raeburn.
688
689 * RS/6000 and PowerPC support by Ian Taylor.
690
691 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
692 based on mail received from various people. The `-h#' option should work
693 again too.
694
695 * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
696 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
697 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
698 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
699 in the "dist" directory.
700
701 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
702 simple tests okay. I haven't put it through extensive testing. (GNU make is
703 currently required for BSD 4.3 builds.)
704
705 * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
706 based on code donated by CMU, which used an a.out-based format. I'm afraid
707 the alpha-a.out support is pretty badly mangled, and much of it removed;
708 making it work will require rewriting it as BFD support for the format anyways.
709
710 * Irix 5 support.
711
712 * The test suites have been fixed up a bit, so that they should work with a
713 couple different versions of expect and dejagnu.
714
715 * Symbols' values are now handled internally as expressions, permitting more
716 flexibility in evaluating them in some cases. Some details of relocation
717 handling have also changed, and simple constant pool management has been
718 added, to make the Alpha port easier.
719
720 * New option "--statistics" for printing out program run times. This is
721 intended to be used with the gcc "-Q" option, which prints out times spent in
722 various phases of compilation. (You should be able to get all of them
723 printed out with "gcc -Q -Wa,--statistics", I think.)
724
725 Changes in 2.2:
726
727 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
728
729 * Configurations that are still in development (and therefore are convenient to
730 have listed in configure.in) still get rejected without a minor change to
731 gas/Makefile.in, so people not doing development work shouldn't get the
732 impression that support for such configurations is actually believed to be
733 reliable.
734
735 * The program name (usually "as") is printed when a fatal error message is
736 displayed. This should prevent some confusion about the source of occasional
737 messages about "internal errors".
738
739 * ELF support is falling into place. Support for the 386 should be working.
740 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
741
742 * Symbol values are maintained as expressions instead of being immediately
743 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
744 more complex calculations involving symbols whose values are not alreadey
745 known.
746
747 * DBX-style debugging info ("stabs") is now supported for COFF formats.
748 If any stabs directives are seen in the source, GAS will create two new
749 sections: a ".stab" and a ".stabstr" section. The format of the .stab
750 section is nearly identical to the a.out symbol format, and .stabstr is
751 its string table. For this to be useful, you must have configured GCC
752 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
753 that can use the stab sections (4.11 or later).
754
755 * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
756 support is in progress.
757
758 Changes in 2.1:
759
760 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
761 incorporated, but not well tested yet.
762
763 * Altered the opcode table split for m68k; it should require less VM to compile
764 with gcc now.
765
766 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
767 suggested by Ronald Cole.
768
769 * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
770 includes improved ELF support, which I've started adapting for SPARC Solaris
771 2.x. Integration isn't completely, so it probably won't work.
772
773 * HP9000/300 support, donated by HP, has been merged in.
774
775 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
776
777 * Better error messages for unsupported configurations (e.g., hppa-hpux).
778
779 * Test suite framework is starting to become reasonable.
780
781 Changes in 2.0:
782
783 * Mostly bug fixes.
784
785 * Some more merging of BFD and ELF code, but ELF still doesn't work.
786
787 Changes in 1.94:
788
789 * BFD merge is partly done. Adventurous souls may try giving configure the
790 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
791 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
792 or "solaris". (ELF isn't really supported yet. It needs work. I've got
793 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
794 fully merged yet.)
795
796 * The 68K opcode table has been split in half. It should now compile under gcc
797 without consuming ridiculous amounts of memory.
798
799 * A couple data structures have been reduced in size. This should result in
800 saving a little bit of space at runtime.
801
802 * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
803 code provided ROSE format support, which I haven't merged in yet. (I can
804 make it available, if anyone wants to try it out.) Ralph's code, for BSD
805 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
806 coming.
807
808 * Support for the Hitachi H8/500 has been added.
809
810 * VMS host and target support should be working now, thanks chiefly to Eric
811 Youngdale.
812
813 Changes in 1.93.01:
814
815 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
816
817 * For i386, .align is now power-of-two; was number-of-bytes.
818
819 * For m68k, "%" is now accepted before register names. For COFF format, which
820 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
821 can be distinguished from the register.
822
823 * Last public release was 1.38. Lots of configuration changes since then, lots
824 of new CPUs and formats, lots of bugs fixed.
825
826 \f
827 Copyright (C) 2012-2020 Free Software Foundation, Inc.
828
829 Copying and distribution of this file, with or without modification,
830 are permitted in any medium without royalty provided the copyright
831 notice and this notice are preserved.
832
833 Local variables:
834 fill-column: 79
835 End:
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