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gas: Update fr_literal access in frag for GCC 10
[deliverable/binutils-gdb.git] / gas / config / tc-csky.c
1 /* tc-csky.c -- Assembler for C-SKY
2 Copyright (C) 1989-2020 Free Software Foundation, Inc.
3 Created by Lifang Xia (lifang_xia@c-sky.com)
4 Contributed by C-SKY Microsystems and Mentor Graphics.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23 #include "as.h"
24 #include <limits.h>
25 #include <stdint.h>
26 #include <stdarg.h>
27 #include <ctype.h>
28 #include "safe-ctype.h"
29 #include "subsegs.h"
30 #include "obstack.h"
31 #include "libiberty.h"
32
33 #ifdef OBJ_ELF
34 #include "elf/csky.h"
35 #include "dw2gencfi.h"
36 #endif
37 #include "tc-csky.h"
38 #include "dwarf2dbg.h"
39
40 #define BUILD_AS 1
41
42 #define OPCODE_MAX_LEN 20
43 #define HAS_SUB_OPERAND 0xfffffffful
44
45 /* This value is just for lrw to distinguish "[]" label. */
46 #define NEED_OUTPUT_LITERAL 1
47
48 #define IS_EXTERNAL_SYM(sym, sec) (S_GET_SEGMENT (sym) != sec)
49 #define IS_SUPPORT_OPCODE16(opcode) (opcode->isa_flag16 | isa_flag)
50 #define IS_SUPPORT_OPCODE32(opcode) (opcode->isa_flag32 | isa_flag)
51
52
53 #define KB * 1024
54 #define MB KB * 1024
55 #define GB MB * 1024
56
57 /* Define DSP version flags. For different CPU, the version of DSP
58 instructions may be different. */
59 #define CSKY_DSP_FLAG_V1 (1 << 0) /* Normal DSP instructions. */
60 #define CSKY_DSP_FLAG_V2 (1 << 1) /* CK803S enhanced DSP. */
61
62 /* Literal pool related macros. */
63 /* 1024 - 1 entry - 2 byte rounding. */
64 #define v1_SPANPANIC (998)
65 #define v1_SPANCLOSE (900)
66 #define v1_SPANEXIT (600)
67 #define v2_SPANPANIC (1024 - 4)
68
69 /* 1024 is flrw offset.
70 24 is the biggest size for single instruction.
71 for lrw16 (3+7, 512 bytes). */
72 #define v2_SPANCLOSE (512 - 24)
73
74 /* For lrw16, 112 average size for a function. */
75 #define v2_SPANEXIT (512 - 112)
76
77 /* For lrw16 (3+7, 512 bytes). */
78 #define v2_SPANCLOSE_ELRW (1016 - 24)
79
80 /* For lrw16, 112 average size for a function. */
81 #define v2_SPANEXIT_ELRW (1016 - 112)
82 #define MAX_POOL_SIZE (1024 / 4)
83 #define POOL_END_LABEL ".LE"
84 #define POOL_START_LABEL ".LS"
85
86 /* Used in v1_relax_table. */
87 /* These are the two types of relaxable instruction. */
88 #define COND_JUMP 1
89 #define UNCD_JUMP 2
90 #define COND_JUMP_PIC 3
91 #define UNCD_JUMP_PIC 4
92
93 #define UNDEF_DISP 0
94 #define DISP12 1
95 #define DISP32 2
96 #define UNDEF_WORD_DISP 3
97
98 #define C12_LEN 2
99 /* Allow for align: bt/jmpi/.long + align. */
100 #define C32_LEN 10
101 /* Allow for align: bt/subi/stw/bsr/lrw/add/ld/addi/jmp/.long + align. */
102 #define C32_LEN_PIC 24
103 #define U12_LEN 2
104 /* Allow for align: jmpi/.long + align. */
105 #define U32_LEN 8
106 /* Allow for align: subi/stw/bsr/lrw/add/ld/addi/jmp/.long + align. */
107 #define U32_LEN_PIC 22
108
109 #define C(what,length) (((what) << 2) + (length))
110 #define UNCD_JUMP_S (do_pic ? UNCD_JUMP_PIC : UNCD_JUMP)
111 #define COND_JUMP_S (do_pic ? COND_JUMP_PIC : COND_JUMP)
112 #define U32_LEN_S (do_pic ? U32_LEN_PIC : U32_LEN)
113 #define C32_LEN_S (do_pic ? C32_LEN_PIC : C32_LEN)
114
115 /* Used in v2_relax_table. */
116 #define COND_DISP10_LEN 2 /* bt/bf_16. */
117 #define COND_DISP16_LEN 4 /* bt/bf_32. */
118
119 #define SCOND_DISP10_LEN 2 /* bt/bf_16, for CK801 only. */
120 #define SCOND_DISP16_LEN 6 /* !(bt/bf_16) + br_32. */
121
122 #define UNCD_DISP10_LEN 2 /* br_16. */
123 #define UNCD_DISP16_LEN 4 /* br_32. */
124 #define UNCD_DISP26_LEN 4 /* br32_old. */
125
126 #define JCOND_DISP10_LEN 2 /* bt/bf_16. */
127 #define JCOND_DISP16_LEN 4 /* bt/bf_32. */
128 #define JCOND_DISP32_LEN 12 /* !(bt/bf_16)/jmpi 32/.align 2/literal 4. */
129 #define JCOND_DISP26_LEN 8 /* bt/bf_32/br_32 old. */
130
131 #define JUNCD_DISP26_LEN 4 /* bt/bf_32 old. */
132 #define JUNCD_DISP10_LEN 2 /* br_16. */
133 #define JUNCD_DISP16_LEN 4 /* bt/bf_32. */
134 #define JUNCD_DISP32_LEN 10 /* jmpi_32/.align 2/literal 4/ CHANGED!. */
135 #define JCOMP_DISP26_LEN 8 /* bne_32/br_32 old. */
136
137 #define JCOMP_DISP16_LEN 4 /* bne_32 old. */
138 #define JCOMPZ_DISP16_LEN 4 /* bhlz_32. */
139 #define JCOMPZ_DISP32_LEN 14 /* bsz_32/jmpi 32/.align 2/literal 4. */
140 #define JCOMPZ_DISP26_LEN 8 /* bsz_32/br_32 old. */
141 #define JCOMP_DISP32_LEN 14 /* be_32/jmpi_32/.align 2/literal old. */
142
143 #define BSR_DISP10_LEN 2 /* bsr_16. */
144 #define BSR_DISP26_LEN 4 /* bsr_32. */
145 #define LRW_DISP7_LEN 2 /* lrw16. */
146 #define LRW_DISP16_LEN 4 /* lrw32. */
147
148 /* Declare worker functions. */
149 bfd_boolean v1_work_lrw (void);
150 bfd_boolean v1_work_jbsr (void);
151 bfd_boolean v1_work_fpu_fo (void);
152 bfd_boolean v1_work_fpu_fo_fc (void);
153 bfd_boolean v1_work_fpu_write (void);
154 bfd_boolean v1_work_fpu_read (void);
155 bfd_boolean v1_work_fpu_writed (void);
156 bfd_boolean v1_work_fpu_readd (void);
157 bfd_boolean v2_work_istack (void);
158 bfd_boolean v2_work_btsti (void);
159 bfd_boolean v2_work_addi (void);
160 bfd_boolean v2_work_subi (void);
161 bfd_boolean v2_work_add_sub (void);
162 bfd_boolean v2_work_rotlc (void);
163 bfd_boolean v2_work_bgeni (void);
164 bfd_boolean v2_work_not (void);
165 bfd_boolean v2_work_jbtf (void);
166 bfd_boolean v2_work_jbr (void);
167 bfd_boolean v2_work_lrw (void);
168 bfd_boolean v2_work_lrsrsw (void);
169 bfd_boolean v2_work_jbsr (void);
170 bfd_boolean v2_work_jsri (void);
171 bfd_boolean v2_work_movih (void);
172 bfd_boolean v2_work_ori (void);
173 bfd_boolean float_work_fmovi (void);
174 bfd_boolean dsp_work_bloop (void);
175
176 /* csky-opc.h must be included after workers are declared. */
177 #include "opcodes/csky-opc.h"
178 #include "opcode/csky.h"
179
180 enum
181 {
182 RELAX_NONE = 0,
183 RELAX_OVERFLOW,
184
185 COND_DISP10 = 20, /* bt/bf_16. */
186 COND_DISP16, /* bt/bf_32. */
187
188 SCOND_DISP10, /* br_16 */
189 SCOND_DISP16, /* !(bt/bf_32) + br_32. */
190
191 UNCD_DISP10, /* br_16. */
192 UNCD_DISP16, /* br_32. */
193
194 JCOND_DISP10, /* bt/bf_16. */
195 JCOND_DISP16, /* bt/bf_32. */
196 JCOND_DISP32, /* !(bt/bf_32)/jmpi + literal. */
197
198 JUNCD_DISP10, /* br_16. */
199 JUNCD_DISP16, /* br_32. */
200 JUNCD_DISP32, /* jmpi + literal. */
201
202 JCOMPZ_DISP16, /* bez/bnez/bhz/blsz/blz/bhsz. */
203 JCOMPZ_DISP32, /* !(jbez/jbnez/jblsz/jblz/jbhsz) + jmpi + literal. */
204
205 BSR_DISP26, /* bsr_32. */
206
207 LRW_DISP7, /* lrw16. */
208 LRW2_DISP8, /* lrw16, -mno-bsr16,8 bit offset. */
209 LRW_DISP16, /* lrw32. */
210 };
211
212 unsigned int mach_flag = 0;
213 unsigned int arch_flag = 0;
214 unsigned int other_flag = 0;
215 unsigned int isa_flag = 0;
216 unsigned int dsp_flag = 0;
217
218 typedef struct stack_size_entry
219 {
220 struct stack_size_entry *next;
221 symbolS *function;
222 unsigned int stack_size;
223 } stack_size_entry;
224
225 struct csky_arch_info
226 {
227 const char *name;
228 unsigned int arch_flag;
229 unsigned int bfd_mach_flag;
230 };
231
232 struct csky_cpu_info
233 {
234 const char *name;
235 unsigned int mach_flag;
236 unsigned int isa_flag;
237 };
238
239 typedef enum
240 {
241 INSN_OPCODE,
242 INSN_OPCODE16F,
243 INSN_OPCODE32F,
244 } inst_flag;
245
246 /* Macro information. */
247 struct csky_macro_info
248 {
249 const char *name;
250 /* How many operands : if operands == 5, all of 1,2,3,4 are ok. */
251 long oprnd_num;
252 int isa_flag;
253 /* Do the work. */
254 void (*handle_func)(void);
255 };
256
257 struct csky_insn_info
258 {
259 /* Name of the opcode. */
260 char *name;
261 /* Output instruction. */
262 unsigned int inst;
263 /* Pointer for frag. */
264 char *output;
265 /* End of instruction. */
266 char *opcode_end;
267 /* Flag for INSN_OPCODE16F, INSN_OPCODE32F, INSN_OPCODE, INSN_MACRO. */
268 inst_flag flag_force;
269 /* Operand number. */
270 int number;
271 struct csky_opcode *opcode;
272 struct csky_macro_info *macro;
273 /* Insn size for check_literal. */
274 unsigned int isize;
275 /* Max size of insn for relax frag_var. */
276 unsigned int max;
277 /* Indicates which element is in csky_opcode_info op[] array. */
278 int opcode_idx;
279 /* The value of each operand in instruction when layout. */
280 int idx;
281 int val[MAX_OPRND_NUM];
282 struct relax_info
283 {
284 int max;
285 int var;
286 int subtype;
287 } relax;
288 /* The following are used for constant expressions. */
289 expressionS e1;
290 expressionS e2;
291 };
292
293 /* Literal pool data structures. */
294 struct literal
295 {
296 unsigned short refcnt;
297 unsigned char ispcrel;
298 unsigned char unused;
299 bfd_reloc_code_real_type r_type;
300 expressionS e;
301 struct tls_addend tls_addend;
302 unsigned char isdouble;
303 uint64_t dbnum;
304 };
305
306 static void csky_idly (void);
307 static void csky_rolc (void);
308 static void csky_sxtrb (void);
309 static void csky_movtf (void);
310 static void csky_addc64 (void);
311 static void csky_subc64 (void);
312 static void csky_or64 (void);
313 static void csky_xor64 (void);
314 static void csky_neg (void);
315 static void csky_rsubi (void);
316 static void csky_arith (void);
317 static void csky_decne (void);
318 static void csky_lrw (void);
319
320 static enum bfd_reloc_code_real insn_reloc;
321
322 /* Assembler operand parse errors use these identifiers. */
323
324 enum error_number
325 {
326 /* The following are errors. */
327 ERROR_CREG_ILLEGAL = 0,
328 ERROR_REG_OVER_RANGE,
329 ERROR_GREG_ILLEGAL,
330 ERROR_802J_REG_OVER_RANGE,
331 ERROR_REG_FORMAT,
332 ERROR_REG_LIST,
333 ERROR_IMM_ILLEGAL,
334 ERROR_IMM_OVERFLOW, /* 5 */
335 ERROR_IMM_POWER,
336 ERROR_JMPIX_OVER_RANGE,
337 ERROR_EXP_CREG,
338 ERROR_EXP_GREG,
339 ERROR_EXP_CONSTANT,
340 ERROR_EXP_EVEN_FREG,
341 ERROR_RELOC_ILLEGAL,
342 ERROR_MISSING_OPERAND, /* 10 */
343 ERROR_MISSING_COMMA,
344 ERROR_MISSING_LBRACKET,
345 ERROR_MISSING_RBRACKET,
346 ERROR_MISSING_LSQUARE_BRACKETS,
347 ERROR_MISSING_RSQUARE_BRACKETS, /* 15 */
348 ERROR_MISSING_LANGLE_BRACKETS,
349 ERROR_MISSING_RANGLE_BRACKETS,
350 ERROR_OFFSET_UNALIGNED,
351 ERROR_BAD_END,
352 ERROR_UNDEFINE,
353 ERROR_CPREG_ILLEGAL, /* 20 */
354 ERROR_OPCODE_PSRBIT,
355 ERROR_OPERANDS_ILLEGAL,
356 ERROR_OPERANDS_NUMBER,
357 ERROR_OPCODE_ILLEGAL,
358
359 /* The following are warnings. */
360 WARNING_OPTIONS,
361 WARNING_IDLY,
362
363 /* Error and warning end. */
364 ERROR_NONE,
365 };
366
367 /* Global error state. ARG1 and ARG2 are opaque data interpreted
368 as appropriate for the error code. */
369
370 struct csky_error_state
371 {
372 enum error_number err_num;
373 int opnum;
374 const void *arg1;
375 const void *arg2;
376 } error_state;
377
378 /* This macro is used to set error number and arg1 in the global state. */
379
380 #define SET_ERROR_NUMBER(err, msg) \
381 do { \
382 if (error_state.err_num > err) \
383 { \
384 error_state.err_num = err; \
385 error_state.arg1 = (void *)msg; \
386 } \
387 } while (0)
388
389
390 /* Map error identifiers onto a format string, which will use
391 arg1 and arg2 from the global error state. */
392 struct csky_error_format_map
393 {
394 enum error_number num;
395 const char *fmt;
396 };
397
398 static const struct csky_error_format_map err_formats[] =
399 {
400 {ERROR_CREG_ILLEGAL, "Operand %d error: control register is illegal."},
401 {ERROR_REG_OVER_RANGE, "Operand %d error: r%d register is over range."},
402 {ERROR_GREG_ILLEGAL, "Operand %d error: general register is illegal."},
403 {ERROR_802J_REG_OVER_RANGE, "Operand %d register %s out of range (802j only has registers:0-15,23,24,25,30)"},
404 {ERROR_REG_FORMAT, "Operand %d error: %s."},
405 {ERROR_REG_LIST, "Register list format is illegal."},
406 {ERROR_IMM_ILLEGAL, "Operand %d is not an immediate."},
407 {ERROR_IMM_OVERFLOW, "Operand %d immediate is overflow."},
408 {ERROR_IMM_POWER, "immediate %d is not a power of two"},
409 {ERROR_JMPIX_OVER_RANGE, "The second operand must be 16/24/32/40"},
410 {ERROR_EXP_CREG, "Operand %d error: control register is expected."},
411 {ERROR_EXP_GREG, "Operand %d error: general register is expected."},
412 {ERROR_EXP_CONSTANT, "Operand %d error: constant is expected."},
413 {ERROR_EXP_EVEN_FREG, "Operand %d error: even float register is expected."},
414 {ERROR_RELOC_ILLEGAL, "@%s reloc is not supported"},
415 {ERROR_MISSING_OPERAND, "Operand %d is missing."},
416 {ERROR_MISSING_COMMA, "Missing ','"},
417 {ERROR_MISSING_LBRACKET, "Missing '('"},
418 {ERROR_MISSING_RBRACKET, "Missing ')'"},
419 {ERROR_MISSING_LSQUARE_BRACKETS, "Missing '['"},
420 {ERROR_MISSING_RSQUARE_BRACKETS, "Missing ']'"},
421 {ERROR_MISSING_LANGLE_BRACKETS, "Missing '<'"},
422 {ERROR_MISSING_RANGLE_BRACKETS, "Missing '>'"},
423 {ERROR_OFFSET_UNALIGNED, "Operand %d is unaligned. It must be %d aligned!"},
424 {ERROR_BAD_END, "Operands mismatch, it has a bad end: %s"},
425 {ERROR_UNDEFINE, NULL},
426 {ERROR_CPREG_ILLEGAL, "Operand %d illegal, expect a cpreg(cpr0-cpr63)."},
427 {ERROR_OPCODE_PSRBIT, "The operands must be 'ie'/'ee'/'fe'."},
428 {ERROR_OPERANDS_ILLEGAL, "Operands mismatch: %s."},
429 {ERROR_OPERANDS_NUMBER, "Operands number mismatch, %d operands expected."},
430 {ERROR_OPCODE_ILLEGAL, "The instruction is not recognized."},
431 {WARNING_OPTIONS, "Option %s is not support in %s."},
432 {WARNING_IDLY, "idly %d is encoded to: idly 4 "},
433 {ERROR_NONE, "There is no error."},
434 };
435
436 static int do_pic = 0; /* for jbr/jbf/jbt relax jmpi reloc. */
437 static int do_pff = -1; /* for insert two br ahead of literals. */
438 static int do_force2bsr = -1; /* for jbsr->bsr. */
439 static int do_jsri2bsr = 1; /* for jsri->bsr. */
440 static int do_nolrw = 0; /* lrw to movih & ori, only for V2. */
441 static int do_long_jump = -1; /* control if jbf,jbt,jbr relax to jmpi. */
442 static int do_extend_lrw = -1; /* delete bsr16 in both two options,
443 add btesti16, lrw offset +1 in -melrw. */
444 static int do_func_dump = 0; /* dump literals after every function. */
445 static int do_br_dump = 1; /* work for -mabr/-mno-abr, control the literals dump. */
446 static int do_intr_stack = -1; /* control interrupt stack module, 801&802&803
447 default on, 807&810, default off. */
448
449 #ifdef INCLUDE_BRANCH_STUB
450 static int do_use_branchstub = -1;
451 #else
452 static int do_use_branchstub = 0;
453 #endif
454
455 /* These are only used for options parsing. Values are bitmasks and are
456 OR'ed into the processor flag bits in md_begin. */
457 static int do_opt_mmp = 0;
458 static int do_opt_mcp = 0;
459 static int do_opt_mcache = 0;
460 static int do_opt_msecurity = 0;
461 static int do_opt_mhard_float = 0;
462 static int do_opt_mtrust = 0;
463 static int do_opt_mdsp = 0;
464 static int do_opt_medsp = 0;
465 static int do_opt_mvdsp = 0;
466
467 const relax_typeS *md_relax_table = NULL;
468 struct literal *literal_insn_offset;
469 static struct literal litpool[MAX_POOL_SIZE];
470 static unsigned poolsize = 0;
471 static unsigned poolnumber = 0;
472 static unsigned long poolspan = 0;
473 static unsigned int SPANPANIC;
474 static unsigned int SPANCLOSE;
475 static unsigned int SPANEXIT;
476
477 static stack_size_entry *all_stack_size_data = NULL;
478 static stack_size_entry **last_stack_size_data = &all_stack_size_data;
479
480 /* Control by ".no_literal_dump N"
481 * 1 : don't dump literal pool between insn1 and insnN+1
482 * 0 : do nothing. */
483 static int do_noliteraldump = 0;
484
485 /* Label for current pool. */
486 static symbolS * poolsym;
487 static char poolname[8];
488
489 static bfd_boolean mov_r1_before;
490 static bfd_boolean mov_r1_after;
491
492 const relax_typeS csky_relax_table [] =
493 {
494 /* C-SKY V1 relax table. */
495 {0, 0, 0, 0}, /* RELAX_NONE */
496 {0, 0, 0, 0}, /* RELAX_OVERFLOW */
497 {0, 0, 0, 0},
498 {0, 0, 0, 0},
499
500 /* COND_JUMP */
501 { 0, 0, 0, 0 }, /* UNDEF_DISP */
502 { 2048, -2046, C12_LEN, C (COND_JUMP, DISP32) }, /* DISP12 */
503 { 0, 0, C32_LEN, 0 }, /* DISP32 */
504 { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */
505
506 /* UNCD_JUMP */
507 { 0, 0, 0, 0 }, /* UNDEF_DISP */
508 { 2048, -2046, U12_LEN, C (UNCD_JUMP, DISP32) }, /* DISP12 */
509 { 0, 0, U32_LEN, 0 }, /* DISP32 */
510 { 0, 0, U32_LEN, 0 }, /* UNDEF_WORD_DISP */
511
512 /* COND_JUMP_PIC */
513 { 0, 0, 0, 0 }, /* UNDEF_DISP */
514 { 2048, -2046, C12_LEN, C (COND_JUMP_PIC, DISP32) }, /* DISP12 */
515 { 0, 0, C32_LEN_PIC, 0 }, /* DISP32 */
516 { 0, 0, C32_LEN_PIC, 0 }, /* UNDEF_WORD_DISP */
517
518 /* UNCD_JUMP_PIC */
519 { 0, 0, 0, 0 }, /* UNDEF_DISP */
520 { 2048, -2046, U12_LEN, C (UNCD_JUMP_PIC, DISP32) }, /* DISP12 */
521 { 0, 0, U32_LEN_PIC, 0 }, /* DISP32 */
522 { 0, 0, U32_LEN_PIC, 0 }, /* UNDEF_WORD_DISP */
523
524 /* C-SKY V2 relax table. */
525 /* forward backward length more */
526 { 1 KB - 2, -1 KB, COND_DISP10_LEN, COND_DISP16 }, /* COND_DISP10 */
527 { 64 KB - 2, -64 KB, COND_DISP16_LEN, RELAX_OVERFLOW }, /* COND_DISP16 */
528
529 { 1 KB - 2, -1 KB, SCOND_DISP10_LEN, SCOND_DISP16 }, /* SCOND_DISP10 */
530 { 64 KB - 2, -64 KB, SCOND_DISP16_LEN, RELAX_OVERFLOW }, /* SCOND_DISP16 */
531
532 { 1 KB - 2, -1 KB, UNCD_DISP10_LEN, UNCD_DISP16 }, /* UNCD_DISP10 */
533 { 64 KB - 2, -64 KB, UNCD_DISP16_LEN, RELAX_OVERFLOW }, /* UNCD_DISP16 */
534
535 { 1 KB - 2, -1 KB, JCOND_DISP10_LEN, JCOND_DISP16 }, /* JCOND_DISP10 */
536 { 64 KB - 2, -64 KB, JCOND_DISP16_LEN, JCOND_DISP32 }, /* JCOND_DISP16 */
537 { 0, 0, JCOND_DISP32_LEN, RELAX_NONE }, /* JCOND_DISP32 */
538
539 { 1 KB - 2, -1 KB, JUNCD_DISP10_LEN, JUNCD_DISP16 }, /* JUNCD_DISP10 */
540 { 64 KB - 2, -64 KB, JUNCD_DISP16_LEN, JUNCD_DISP32 }, /* JUNCD_DISP16 */
541 { 0, 0, JUNCD_DISP32_LEN, RELAX_NONE }, /* JUNCD_DISP32 */
542
543 { 64 KB - 2, -64 KB, JCOMPZ_DISP16_LEN, JCOMPZ_DISP32 }, /* JCOMPZ_DISP16 */
544 { 0, 0, JCOMPZ_DISP32_LEN, RELAX_NONE }, /* JCOMPZ_DISP32 */
545
546 { 64 MB - 2, -64 MB, BSR_DISP26_LEN, RELAX_OVERFLOW }, /* BSR_DISP26 */
547
548 { 508, 0, LRW_DISP7_LEN, LRW_DISP16 }, /* LRW_DISP7 */
549 { 1016, 0, LRW_DISP7_LEN, LRW_DISP16 }, /* LRW2_DISP8 */
550 { 64 KB, 0, LRW_DISP16_LEN, RELAX_OVERFLOW }, /* LRW_DISP16 */
551
552 };
553
554 static void csky_write_insn (char *ptr, valueT use, int nbytes);
555 void md_number_to_chars (char * buf, valueT val, int n);
556 long md_pcrel_from_section (fixS * fixP, segT seg);
557
558 /* C-SKY architecture table. */
559 const struct csky_arch_info csky_archs[] =
560 {
561 {"ck510", CSKY_ARCH_510, bfd_mach_ck510},
562 {"ck610", CSKY_ARCH_610, bfd_mach_ck610},
563 {"ck801", CSKY_ARCH_801, bfd_mach_ck801},
564 {"ck802", CSKY_ARCH_802, bfd_mach_ck802},
565 {"ck803", CSKY_ARCH_803, bfd_mach_ck803},
566 #define CSKY_ARCH_807_BASE CSKY_ARCH_807 | CSKY_ARCH_DSP
567 #define CSKY_ARCH_810_BASE CSKY_ARCH_810 | CSKY_ARCH_DSP
568 {"ck807", CSKY_ARCH_807_BASE, bfd_mach_ck807},
569 {"ck810", CSKY_ARCH_810_BASE, bfd_mach_ck810},
570 {NULL, 0, 0}
571 };
572
573 /* C-SKY cpus table. */
574 const struct csky_cpu_info csky_cpus[] =
575 {
576 /* CK510 series. */
577 #define CSKYV1_ISA_DSP CSKY_ISA_DSP | CSKY_ISA_MAC_DSP
578 {"ck510", CSKY_ARCH_510, CSKYV1_ISA_E1},
579 {"ck510e", CSKY_ARCH_510 | CSKY_ARCH_DSP, CSKYV1_ISA_E1 | CSKYV1_ISA_DSP},
580 {"ck520", CSKY_ARCH_510 | CSKY_ARCH_MAC, CSKYV1_ISA_E1 | CSKY_ISA_MAC | CSKY_ISA_MAC_DSP},
581
582 #define CSKY_ISA_610 CSKYV1_ISA_E1 | CSKY_ISA_CP
583 /* CK610 series. */
584 {"ck610", CSKY_ARCH_610, CSKY_ISA_610},
585 {"ck610e", CSKY_ARCH_610 | CSKY_ARCH_DSP, CSKY_ISA_610 | CSKYV1_ISA_DSP},
586 {"ck610f", CSKY_ARCH_610 | CSKY_ARCH_FLOAT, CSKY_ISA_610 | CSKY_ISA_FLOAT_E1},
587 {"ck610ef", CSKY_ARCH_610 | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP, CSKY_ISA_610 | CSKY_ISA_FLOAT_E1 | CSKYV1_ISA_DSP},
588 {"ck610fe", CSKY_ARCH_610 | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP, CSKY_ISA_610 | CSKY_ISA_FLOAT_E1 | CSKYV1_ISA_DSP},
589 {"ck620", CSKY_ARCH_610 | CSKY_ARCH_MAC, CSKY_ISA_610 | CSKY_ISA_MAC | CSKY_ISA_MAC_DSP},
590
591 /* CK801 series. */
592 #define CSKY_ISA_801 CSKYV2_ISA_E1
593 #define CSKYV2_ISA_DSP (CSKY_ISA_DSP | CSKY_ISA_DSP_1E2)
594 {"ck801", CSKY_ARCH_801, CSKY_ISA_801},
595 {"ck801t", CSKY_ARCH_801, CSKY_ISA_801 | CSKY_ISA_TRUST},
596
597 /* CK802 series. */
598 #define CSKY_ISA_802 (CSKY_ISA_801 | CSKYV2_ISA_1E2 | CSKY_ISA_NVIC)
599 {"ck802", CSKY_ARCH_802, CSKY_ISA_802},
600 {"ck802j", CSKY_ARCH_802 | CSKY_ARCH_JAVA, CSKY_ISA_802 | CSKY_ISA_JAVA},
601 {"ck802t", CSKY_ARCH_802, CSKY_ISA_802 | CSKY_ISA_TRUST},
602
603 /* CK803 series. */
604 #define CSKY_ISA_803 (CSKY_ISA_802 | CSKYV2_ISA_2E3 | CSKY_ISA_MP)
605 #define CSKY_ISA_803R1 (CSKY_ISA_803 | CSKYV2_ISA_3E3R1)
606 #define CSKY_ISA_FLOAT_803 (CSKY_ISA_FLOAT_E1 | CSKY_ISA_FLOAT_1E3)
607 {"ck803", CSKY_ARCH_803, CSKY_ISA_803 },
608 {"ck803h", CSKY_ARCH_803, CSKY_ISA_803 },
609 {"ck803t", CSKY_ARCH_803, CSKY_ISA_803 | CSKY_ISA_TRUST},
610 {"ck803ht", CSKY_ARCH_803, CSKY_ISA_803 | CSKY_ISA_TRUST},
611 {"ck803f", CSKY_ARCH_803 | CSKY_ARCH_FLOAT, CSKY_ISA_803 | CSKY_ISA_FLOAT_803},
612 {"ck803fh", CSKY_ARCH_803 | CSKY_ARCH_FLOAT, CSKY_ISA_803 | CSKY_ISA_FLOAT_803},
613 {"ck803e", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803 | CSKYV2_ISA_DSP},
614 {"ck803eh", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803 | CSKYV2_ISA_DSP},
615 {"ck803et", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803 | CSKYV2_ISA_DSP | CSKY_ISA_TRUST},
616 {"ck803eht", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803 | CSKYV2_ISA_DSP | CSKY_ISA_TRUST},
617 {"ck803ef", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_803},
618 {"ck803efh", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_803},
619 {"ck803ft", CSKY_ARCH_803 | CSKY_ARCH_FLOAT, CSKY_ISA_803 | CSKY_ISA_FLOAT_803 | CSKY_ISA_TRUST},
620 {"ck803eft", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_803 | CSKY_ISA_TRUST},
621 {"ck803efht", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_803 | CSKY_ISA_TRUST},
622 {"ck803r1", CSKY_ARCH_803, CSKY_ISA_803R1 },
623 {"ck803hr1", CSKY_ARCH_803, CSKY_ISA_803R1 },
624 {"ck803tr1", CSKY_ARCH_803, CSKY_ISA_803R1 | CSKY_ISA_TRUST},
625 {"ck803htr1", CSKY_ARCH_803, CSKY_ISA_803R1 | CSKY_ISA_TRUST},
626 {"ck803fr1", CSKY_ARCH_803 | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_FLOAT_803},
627 {"ck803fhr1", CSKY_ARCH_803 | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_FLOAT_803},
628 {"ck803er1", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE},
629 {"ck803ehr1", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE},
630 {"ck803etr1", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE | CSKY_ISA_TRUST},
631 {"ck803ehtr1", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE | CSKY_ISA_TRUST},
632 {"ck803efr1", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE | CSKY_ISA_FLOAT_803},
633 {"ck803efhr1", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE | CSKY_ISA_FLOAT_803},
634 {"ck803ftr1", CSKY_ARCH_803 | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_FLOAT_803 | CSKY_ISA_TRUST},
635 {"ck803eftr1", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE | CSKY_ISA_FLOAT_803 | CSKY_ISA_TRUST},
636 {"ck803ehftr1", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_DSP_ENHANCE | CSKY_ISA_FLOAT_803 | CSKY_ISA_TRUST},
637
638 {"ck803s", CSKY_ARCH_803, CSKY_ISA_803R1 },
639 {"ck803se", CSKY_ARCH_803 | CSKY_ARCH_DSP, CSKY_ISA_803R1 | CSKYV2_ISA_DSP},
640 {"ck803sj", CSKY_ARCH_803 | CSKY_ARCH_JAVA, CSKY_ISA_803R1 | CSKY_ISA_JAVA},
641 {"ck803sf", CSKY_ARCH_803 | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKY_ISA_FLOAT_803},
642 {"ck803sef", CSKY_ARCH_803 | CSKY_ARCH_DSP | CSKY_ARCH_FLOAT, CSKY_ISA_803R1 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_803},
643 {"ck803st", CSKY_ARCH_803, CSKY_ISA_803R1 | CSKY_ISA_TRUST},
644
645 /* CK807 series. */
646 #define CSKY_ISA_807 (CSKY_ISA_803 | CSKYV2_ISA_3E7 | CSKY_ISA_DSP | CSKY_ISA_MP_1E2 | CSKY_ISA_CACHE)
647 #define CSKY_ISA_FLOAT_807 (CSKY_ISA_FLOAT_803 | CSKY_ISA_FLOAT_3E4 | CSKY_ISA_FLOAT_1E2)
648 {"ck807e", CSKY_ARCH_807_BASE, CSKY_ISA_807 | CSKYV2_ISA_DSP},
649 {"ck807ef", CSKY_ARCH_807_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_807 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_807},
650 {"ck807", CSKY_ARCH_807_BASE, CSKY_ISA_807 | CSKYV2_ISA_DSP},
651 {"ck807f", CSKY_ARCH_807_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_807 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_807},
652
653 /* CK810 series. */
654 #define CSKY_ISA_810 (CSKY_ISA_807 | CSKYV2_ISA_7E10)
655 #define CSKY_ISA_FLOAT_810 (CSKY_ISA_FLOAT_E1 | CSKY_ISA_FLOAT_1E2)
656 {"ck810e", CSKY_ARCH_810_BASE, CSKY_ISA_810 | CSKYV2_ISA_DSP},
657 {"ck810et", CSKY_ARCH_810_BASE, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_TRUST},
658 {"ck810ef", CSKY_ARCH_810_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_810},
659 {"ck810eft", CSKY_ARCH_810_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_810 | CSKY_ISA_TRUST},
660 {"ck810", CSKY_ARCH_810_BASE, CSKY_ISA_810 | CSKYV2_ISA_DSP},
661 {"ck810v", CSKY_ARCH_810_BASE, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_VDSP},
662 {"ck810f", CSKY_ARCH_810_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_FLOAT_810},
663 {"ck810t", CSKY_ARCH_810_BASE, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_TRUST},
664 {"ck810tv", CSKY_ARCH_810_BASE, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_TRUST},
665 {"ck810ft", CSKY_ARCH_810_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_VDSP | CSKY_ISA_FLOAT_810 | CSKY_ISA_TRUST},
666 {"ck810ftv", CSKY_ARCH_810_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_VDSP | CSKY_ISA_FLOAT_810 | CSKY_ISA_TRUST},
667
668 {NULL, 0, 0}
669 };
670
671 int md_short_jump_size = 2;
672 int md_long_jump_size = 4;
673
674 /* This array holds the chars that always start a comment. If the
675 pre-processor is disabled, these aren't very useful. */
676 const char comment_chars[] = "#";
677
678 /* This array holds the chars that only start a comment at the beginning of
679 a line. If the line seems to have the form '# 123 filename'
680 .line and .file directives will appear in the pre-processed output. */
681 /* Note that input_file.c hand checks for '#' at the beginning of the
682 first line of the input file. This is because the compiler outputs
683 #NO_APP at the beginning of its output. */
684 /* Also note that comments like this one will always work. */
685 const char line_comment_chars[] = "#";
686
687 const char line_separator_chars[] = ";";
688
689 /* Chars that can be used to separate mant
690 from exp in floating point numbers. */
691 const char EXP_CHARS[] = "eE";
692
693 /* Chars that mean this number is a floating point constant.
694 As in 0f12.456
695 or 0d1.2345e12 */
696
697 const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
698
699 const char *md_shortopts = "";
700
701 struct option md_longopts[] = {
702 #define OPTION_MARCH (OPTION_MD_BASE + 0)
703 {"march", required_argument, NULL, OPTION_MARCH},
704 #define OPTION_MCPU (OPTION_MD_BASE + 1)
705 {"mcpu", required_argument, NULL, OPTION_MCPU},
706
707 /* Remaining options just set boolean flags. */
708 {"EL", no_argument, &target_big_endian, 0},
709 {"mlittle-endian", no_argument, &target_big_endian, 0},
710 {"EB", no_argument, &target_big_endian, 1},
711 {"mbig-endian", no_argument, &target_big_endian, 1},
712 {"fpic", no_argument, &do_pic, 1},
713 {"pic", no_argument, &do_pic, 1},
714 {"mljump", no_argument, &do_long_jump, 1},
715 {"mno-ljump", no_argument, &do_long_jump, 0},
716 {"force2bsr", no_argument, &do_force2bsr, 1},
717 {"mforce2bsr", no_argument, &do_force2bsr, 1},
718 {"no-force2bsr", no_argument, &do_force2bsr, 0},
719 {"mno-force2bsr", no_argument, &do_force2bsr, 0},
720 {"jsri2bsr", no_argument, &do_jsri2bsr, 1},
721 {"mjsri2bsr", no_argument, &do_jsri2bsr, 1},
722 {"no-jsri2bsr", no_argument, &do_jsri2bsr, 0},
723 {"mno-jsri2bsr", no_argument, &do_jsri2bsr, 0},
724 {"mnolrw", no_argument, &do_nolrw, 1},
725 {"mno-lrw", no_argument, &do_nolrw, 1},
726 {"melrw", no_argument, &do_extend_lrw, 1},
727 {"mno-elrw", no_argument, &do_extend_lrw, 0},
728 {"mlaf", no_argument, &do_func_dump, 1},
729 {"mliterals-after-func", no_argument, &do_func_dump, 1},
730 {"mno-laf", no_argument, &do_func_dump, 0},
731 {"mno-literals-after-func", no_argument, &do_func_dump, 0},
732 {"mlabr", no_argument, &do_br_dump, 1},
733 {"mliterals-after-br", no_argument, &do_br_dump, 1},
734 {"mno-labr", no_argument, &do_br_dump, 0},
735 {"mnoliterals-after-br", no_argument, &do_br_dump, 0},
736 {"mistack", no_argument, &do_intr_stack, 1},
737 {"mno-istack", no_argument, &do_intr_stack, 0},
738 #ifdef INCLUDE_BRANCH_STUB
739 {"mbranch-stub", no_argument, &do_use_branchstub, 1},
740 {"mno-branch-stub", no_argument, &do_use_branchstub, 0},
741 #endif
742 {"mhard-float", no_argument, &do_opt_mhard_float, CSKY_ARCH_FLOAT},
743 {"mmp", no_argument, &do_opt_mmp, CSKY_ARCH_MP},
744 {"mcp", no_argument, &do_opt_mcp, CSKY_ARCH_CP},
745 {"mcache", no_argument, &do_opt_mcache, CSKY_ARCH_CACHE},
746 {"msecurity", no_argument, &do_opt_msecurity, CSKY_ARCH_MAC},
747 {"mtrust", no_argument, &do_opt_mtrust, CSKY_ISA_TRUST},
748 {"mdsp", no_argument, &do_opt_mdsp, CSKY_DSP_FLAG_V1},
749 {"medsp", no_argument, &do_opt_medsp, CSKY_DSP_FLAG_V2},
750 {"mvdsp", no_argument, &do_opt_mvdsp, CSKY_ISA_VDSP},
751 };
752
753 size_t md_longopts_size = sizeof (md_longopts);
754
755 static struct csky_insn_info csky_insn;
756
757 static struct hash_control *csky_opcodes_hash;
758 static struct hash_control *csky_macros_hash;
759
760 static struct csky_macro_info v1_macros_table[] =
761 {
762 {"idly", 1, CSKYV1_ISA_E1, csky_idly},
763 {"rolc", 2, CSKYV1_ISA_E1, csky_rolc},
764 {"rotlc", 2, CSKYV1_ISA_E1, csky_rolc},
765 {"sxtrb0", 2, CSKYV1_ISA_E1, csky_sxtrb},
766 {"sxtrb1", 2, CSKYV1_ISA_E1, csky_sxtrb},
767 {"sxtrb2", 2, CSKYV1_ISA_E1, csky_sxtrb},
768 {"movtf", 3, CSKYV1_ISA_E1, csky_movtf},
769 {"addc64", 3, CSKYV1_ISA_E1, csky_addc64},
770 {"subc64", 3, CSKYV1_ISA_E1, csky_subc64},
771 {"or64", 3, CSKYV1_ISA_E1, csky_or64},
772 {"xor64", 3, CSKYV1_ISA_E1, csky_xor64},
773 {NULL,0,0,0}
774 };
775
776 static struct csky_macro_info v2_macros_table[] =
777 {
778 {"neg", 1, CSKYV2_ISA_E1, csky_neg},
779 {"rsubi", 2, CSKYV2_ISA_1E2, csky_rsubi},
780 {"incf", 1, CSKYV2_ISA_1E2, csky_arith},
781 {"inct", 1, CSKYV2_ISA_1E2, csky_arith},
782 {"decf", 1, CSKYV2_ISA_2E3, csky_arith},
783 {"decgt", 1, CSKYV2_ISA_2E3, csky_arith},
784 {"declt", 1, CSKYV2_ISA_2E3, csky_arith},
785 {"decne", 1, CSKYV2_ISA_1E2, csky_decne},
786 {"dect", 1, CSKYV2_ISA_1E2, csky_arith},
787 {"lslc", 1, CSKYV2_ISA_1E2, csky_arith},
788 {"lsrc", 1, CSKYV2_ISA_1E2, csky_arith},
789 {"xsr", 1, CSKYV2_ISA_1E2, csky_arith},
790 {NULL,0,0,0}
791 };
792
793 /* For option -mnolrw, replace lrw by movih & ori. */
794 static struct csky_macro_info v2_lrw_macro_opcode =
795 {"lrw", 2, CSKYV2_ISA_1E2, csky_lrw};
796
797 /* This function is used to show errors or warnings. */
798
799 static void
800 csky_show_error (enum error_number err, int idx, void *arg1, void *arg2)
801 {
802 if (err == ERROR_NONE)
803 return;
804
805 switch (err)
806 {
807 case ERROR_REG_LIST:
808 case ERROR_OPCODE_PSRBIT:
809 case ERROR_OPCODE_ILLEGAL:
810 case ERROR_JMPIX_OVER_RANGE:
811 case ERROR_MISSING_COMMA:
812 case ERROR_MISSING_LBRACKET:
813 case ERROR_MISSING_RBRACKET:
814 case ERROR_MISSING_LSQUARE_BRACKETS:
815 case ERROR_MISSING_RSQUARE_BRACKETS:
816 case ERROR_MISSING_LANGLE_BRACKETS:
817 case ERROR_MISSING_RANGLE_BRACKETS:
818 /* Add NULL to fix warnings. */
819 as_bad (_(err_formats[err].fmt), NULL);
820 break;
821 case ERROR_CREG_ILLEGAL:
822 case ERROR_GREG_ILLEGAL:
823 case ERROR_IMM_ILLEGAL:
824 case ERROR_IMM_OVERFLOW:
825 case ERROR_EXP_CREG:
826 case ERROR_EXP_GREG:
827 case ERROR_EXP_CONSTANT:
828 case ERROR_EXP_EVEN_FREG:
829 case ERROR_MISSING_OPERAND:
830 case ERROR_CPREG_ILLEGAL:
831 as_bad (_(err_formats[err].fmt), idx);
832 break;
833 case ERROR_OPERANDS_NUMBER:
834 case ERROR_IMM_POWER:
835 as_bad (_(err_formats[err].fmt), (long)arg1);
836 break;
837
838 case ERROR_OFFSET_UNALIGNED:
839 as_bad (_(err_formats[err].fmt), idx, (long)arg1);
840 break;
841 case ERROR_RELOC_ILLEGAL:
842 case ERROR_BAD_END:
843 case ERROR_OPERANDS_ILLEGAL:
844 as_bad (_(err_formats[err].fmt), (char *)arg1);
845 break;
846 case ERROR_REG_OVER_RANGE:
847 as_bad (_(err_formats[err].fmt), idx, (long) arg1);
848 break;
849 case ERROR_802J_REG_OVER_RANGE:
850 case ERROR_REG_FORMAT:
851 as_bad (_(err_formats[err].fmt), idx, (char *)arg1);
852 break;
853 case ERROR_UNDEFINE:
854 /* Add NULL to fix warnings. */
855 as_bad ((char *)arg1, NULL);
856 break;
857 case WARNING_IDLY:
858 as_warn (_(err_formats[err].fmt), (long)arg1);
859 break;
860 case WARNING_OPTIONS:
861 as_warn (_(err_formats[err].fmt), (char *)arg1, (char *)arg2);
862 break;
863 default:
864 break;
865 }
866 }
867
868 /* Handle errors in branch relaxation. */
869
870 static void
871 csky_branch_report_error (const char* file, unsigned int line,
872 symbolS* sym, offsetT val)
873 {
874 as_bad_where (file ? file : _("unknown"),
875 line,
876 _("pcrel offset for branch to %s too far (0x%lx)"),
877 sym ? S_GET_NAME (sym) : _("<unknown>"),
878 (long) val);
879 }
880
881 /* Set appropriate flags for the cpu matching STR. */
882
883 static void
884 parse_cpu (const char *str)
885 {
886 int i = 0;
887
888 for (; csky_cpus[i].name != NULL; i++)
889 if (strcasecmp (str, csky_cpus[i].name) == 0)
890 {
891 mach_flag |= csky_cpus[i].mach_flag;
892 isa_flag = csky_cpus[i].isa_flag;
893 other_flag |= (csky_cpus[i].mach_flag & ~CSKY_ARCH_MASK);
894 return;
895 }
896 as_bad (_("unknown cpu `%s'"), str);
897 }
898
899 /* Set appropriate flags for the arch matching STR. */
900
901 static void
902 parse_arch (const char *str)
903 {
904 int i = 0;
905 for (; csky_archs[i].name != NULL; i++)
906 if (strcasecmp (str, csky_archs[i].name) == 0)
907 {
908 arch_flag |= csky_archs[i].arch_flag;
909 return;
910 }
911 as_bad (_("unknown architecture `%s'"), str);
912 }
913
914
915 #ifdef OBJ_ELF
916 /* Implement the TARGET_FORMAT macro. */
917
918 const char *
919 elf32_csky_target_format (void)
920 {
921 return (target_big_endian
922 ? "elf32-csky-big"
923 : "elf32-csky-little");
924 }
925 #endif
926
927 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
928 for use in the a.out file, and stores them in the array pointed to by buf.
929 This knows about the endian-ness of the target machine and does
930 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
931 2 (short) and 4 (long) Floating numbers are put out as a series of
932 LITTLENUMS (shorts, here at least). */
933
934 void
935 md_number_to_chars (char * buf, valueT val, int n)
936 {
937 if (target_big_endian)
938 number_to_chars_bigendian (buf, val, n);
939 else
940 number_to_chars_littleendian (buf, val, n);
941 }
942
943 /* Get a log2(val). */
944
945 static int
946 csky_log_2 (unsigned int val)
947 {
948 int log = -1;
949 if ((val & (val - 1)) == 0)
950 for (; val; val >>= 1)
951 log ++;
952 else
953 csky_show_error (ERROR_IMM_POWER, 0, (void *)(long)val, NULL);
954 return log;
955 }
956
957 /* Output one instruction to the buffer at PTR. */
958
959 static void
960 csky_write_insn (char *ptr, valueT use, int nbytes)
961 {
962 if (nbytes == 2)
963 md_number_to_chars (ptr, use, nbytes);
964 else /* 32-bit instruction. */
965 {
966 /* Significant figures are in low bits. */
967 md_number_to_chars (ptr, use >> 16, 2);
968 md_number_to_chars (ptr + 2, use & 0xFFFF, 2);
969 }
970 }
971
972 /* Read an NBYTES instruction from the buffer at PTR. NBYTES should
973 be either 2 or 4. This function is used in branch relaxation. */
974
975 static valueT
976 csky_read_insn (char *ptr, int nbytes)
977 {
978 unsigned char *uptr = (unsigned char *)ptr;
979 valueT v = 0;
980 int lo, hi; /* hi/lo byte index in binary stream. */
981
982 if (target_big_endian)
983 {
984 hi = 0;
985 lo = 1;
986 }
987 else
988 {
989 hi = 1;
990 lo = 0;
991 }
992 v = uptr[lo] | (uptr[hi] << 8);
993 if (nbytes == 4)
994 {
995 v <<= 16;
996 v |= uptr[lo + 2] | (uptr[hi + 2] << 8);
997 }
998 return v;
999 }
1000
1001 /* Construct a label name into S from the 3-character prefix P and
1002 number N formatted as a 4-digit hex number. */
1003
1004 static void
1005 make_internal_label (char *s, const char *p, int n)
1006 {
1007 static const char hex[] = "0123456789ABCDEF";
1008
1009 s[0] = p[0];
1010 s[1] = p[1];
1011 s[2] = p[2];
1012 s[3] = hex[(n >> 12) & 0xF];
1013 s[4] = hex[(n >> 8) & 0xF];
1014 s[5] = hex[(n >> 4) & 0xF];
1015 s[6] = hex[(n) & 0xF];
1016 s[7] = 0;
1017 }
1018
1019 /* md_operand is a no-op on C-SKY; we do everything elsewhere. */
1020
1021 void
1022 md_operand (expressionS *expressionP ATTRIBUTE_UNUSED)
1023 {
1024 return;
1025 }
1026
1027 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE.
1028 Otherwise we have no need to default values of symbols. */
1029
1030 symbolS *
1031 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1032 {
1033 #ifdef OBJ_ELF
1034 /* TODO: */
1035 #endif
1036 return NULL;
1037 }
1038
1039 /* Use IEEE format for floating-point constants. */
1040
1041 const char *
1042 md_atof (int type, char *litP, int *sizeP)
1043 {
1044 return ieee_md_atof (type, litP, sizeP, target_big_endian);
1045 }
1046
1047 /* Print option help to FP. */
1048
1049 void
1050 md_show_usage (FILE *fp)
1051 {
1052 int i, n;
1053 const int margin = 48;
1054
1055 fprintf (fp, _("C-SKY assembler options:\n"));
1056
1057 fprintf (fp, _("\
1058 -march=ARCH select architecture ARCH:"));
1059 for (i = 0, n = margin; csky_archs[i].name != NULL; i++)
1060 {
1061 int l = strlen (csky_archs[i].name);
1062 if (n + l >= margin)
1063 {
1064 fprintf (fp, "\n\t\t\t\t");
1065 n = l;
1066 }
1067 else
1068 {
1069 fprintf (fp, " ");
1070 n += l + 1;
1071 }
1072 fprintf (fp, "%s", csky_archs[i].name);
1073 }
1074 fprintf (fp, "\n");
1075
1076 fprintf (fp, _("\
1077 -mcpu=CPU select processor CPU:"));
1078 for (i = 0, n = margin; csky_cpus[i].name != NULL; i++)
1079 {
1080 int l = strlen (csky_cpus[i].name);
1081 if (n + l >= margin)
1082 {
1083 fprintf (fp, "\n\t\t\t\t");
1084 n = l;
1085 }
1086 else
1087 {
1088 fprintf (fp, " ");
1089 n += l + 1;
1090 }
1091 fprintf (fp, "%s", csky_cpus[i].name);
1092 }
1093 fprintf (fp, "\n");
1094
1095 fprintf (fp, _("\
1096 -EL -mlittle-endian generate little-endian output\n"));
1097 fprintf (fp, _("\
1098 -EB -mbig-endian generate big-endian output\n"));
1099 fprintf (fp, _("\
1100 -fpic -pic generate position-independent code\n"));
1101
1102 fprintf (fp, _("\
1103 -mljump transform jbf, jbt, jbr to jmpi (CK800 only)\n"));
1104 fprintf (fp, _("\
1105 -mno-ljump\n"));
1106
1107 #ifdef INCLUDE_BRANCH_STUB
1108 fprintf (fp, _("\
1109 -mbranch-stub enable branch stubs for PC-relative calls\n"));
1110 fprintf (fp, _("\
1111 -mno-branch-stub\n"));
1112 #endif
1113
1114 fprintf (fp, _("\
1115 -force2bsr -mforce2bsr transform jbsr to bsr\n"));
1116 fprintf (fp, _("\
1117 -no-force2bsr -mno-force2bsr\n"));
1118 fprintf (fp, _("\
1119 -jsri2bsr -mjsri2bsr transform jsri to bsr\n"));
1120 fprintf (fp, _("\
1121 -no-jsri2bsr -mno-jsri2bsr\n"));
1122
1123 fprintf (fp, _("\
1124 -mnolrw -mno-lrw implement lrw as movih + ori\n"));
1125 fprintf (fp, _("\
1126 -melrw enable extended lrw (CK800 only)\n"));
1127 fprintf (fp, _("\
1128 -mno-elrw\n"));
1129
1130 fprintf (fp, _("\
1131 -mlaf -mliterals-after-func emit literals after each function\n"));
1132 fprintf (fp, _("\
1133 -mno-laf -mno-literals-after-func\n"));
1134 fprintf (fp, _("\
1135 -mlabr -mliterals-after-br emit literals after branch instructions\n"));
1136 fprintf (fp, _("\
1137 -mno-labr -mnoliterals-after-br\n"));
1138
1139 fprintf (fp, _("\
1140 -mistack enable interrupt stack instructions\n"));
1141 fprintf (fp, _("\
1142 -mno-istack\n"));
1143
1144 fprintf (fp, _("\
1145 -mhard-float enable hard float instructions\n"));
1146 fprintf (fp, _("\
1147 -mmp enable multiprocessor instructions\n"));
1148 fprintf (fp, _("\
1149 -mcp enable coprocessor instructions\n"));
1150 fprintf (fp, _("\
1151 -mcache enable cache prefetch instruction\n"));
1152 fprintf (fp, _("\
1153 -msecurity enable security instructions\n"));
1154 fprintf (fp, _("\
1155 -mtrust enable trust instructions\n"));
1156 fprintf (fp, _("\
1157 -mdsp enable DSP instructions\n"));
1158 fprintf (fp, _("\
1159 -medsp enable enhanced DSP instructions\n"));
1160 fprintf (fp, _("\
1161 -mvdsp enable vector DSP instructions\n"));
1162 }
1163
1164 /* Target-specific initialization and option handling. */
1165
1166 void
1167 md_begin (void)
1168 {
1169 unsigned int bfd_mach_flag = 0;
1170 struct csky_opcode const *opcode;
1171 struct csky_macro_info const *macro;
1172 struct csky_arch_info const *p_arch;
1173 struct csky_cpu_info const *p_cpu;
1174 unsigned int flags = (other_flag | do_opt_mmp | do_opt_mcp | do_opt_mcache
1175 | do_opt_msecurity | do_opt_mhard_float);
1176 dsp_flag |= do_opt_mdsp | do_opt_medsp;
1177 isa_flag |= do_opt_mtrust | do_opt_mvdsp;
1178
1179 if (dsp_flag)
1180 flags |= CSKY_ARCH_DSP;
1181
1182 if (mach_flag != 0)
1183 {
1184 if ((mach_flag & CSKY_ARCH_MASK) != arch_flag && arch_flag != 0)
1185 as_warn (_("-mcpu conflict with -march option, using -mcpu"));
1186 if ((mach_flag & ~CSKY_ARCH_MASK) != flags && flags != 0)
1187 as_warn (_("-mcpu conflict with other model parameters, using -mcpu"));
1188 }
1189 else if (arch_flag != 0)
1190 mach_flag |= arch_flag | flags;
1191 else
1192 {
1193 #ifdef TARGET_WITH_CPU
1194 int i = 0;
1195 for (; csky_cpus[i].name != NULL; i++)
1196 {
1197 if (strcmp (TARGET_WITH_CPU, csky_cpus[i].name) == 0)
1198 {
1199 mach_flag |= csky_cpus[i].mach_flag;
1200 isa_flag = csky_cpus[i].isa_flag;
1201 break;
1202 }
1203 }
1204 #else
1205 #if _CSKY_ABI==1
1206 mach_flag |= CSKY_ARCH_610 | flags;
1207 #else
1208 mach_flag |= CSKY_ARCH_810_BASE | flags;
1209 #endif
1210 #endif
1211 }
1212
1213 if (IS_CSKY_ARCH_610 (mach_flag) || IS_CSKY_ARCH_510 (mach_flag))
1214 {
1215 if ((mach_flag & CSKY_ARCH_MP) && (mach_flag & CSKY_ARCH_MAC))
1216 as_fatal ("520/620 conflicts with -mmp option");
1217 else if ((mach_flag & CSKY_ARCH_MP) && (mach_flag & CSKY_ARCH_DSP))
1218 as_fatal ("510e/610e conflicts with -mmp option");
1219 else if ((mach_flag & CSKY_ARCH_DSP) && (mach_flag & CSKY_ARCH_MAC))
1220 as_fatal ("520/620 conflicts with 510e/610e or -mdsp option");
1221 }
1222 if (IS_CSKY_ARCH_510 (mach_flag) && (mach_flag & CSKY_ARCH_FLOAT))
1223 {
1224 mach_flag = (mach_flag & (~CSKY_ARCH_MASK));
1225 mach_flag |= CSKY_ARCH_610;
1226 }
1227
1228 /* Find bfd_mach_flag, it will set to bfd backend data. */
1229 for (p_arch = csky_archs; p_arch->arch_flag != 0; p_arch++)
1230 if ((mach_flag & CSKY_ARCH_MASK) == (p_arch->arch_flag & CSKY_ARCH_MASK))
1231 {
1232 bfd_mach_flag = p_arch->bfd_mach_flag;
1233 break;
1234 }
1235
1236 /* Find isa_flag. */
1237 for (p_cpu = csky_cpus; p_cpu->mach_flag != 0; p_cpu++)
1238 if ((mach_flag & CPU_ARCH_MASK) == p_cpu->mach_flag)
1239 {
1240 isa_flag |= p_cpu->isa_flag;
1241 break;
1242 }
1243
1244 /* Check if -mdsp and -medsp conflict. If cpu is ck803, we will
1245 use enhanced dsp instruction. Otherwise, we will use normal dsp. */
1246 if (dsp_flag)
1247 {
1248 if (IS_CSKY_ARCH_803 (mach_flag))
1249 {
1250 /* In 803, dspv1 is conflict with dspv2. We keep dspv2. */
1251 if ((dsp_flag & CSKY_DSP_FLAG_V1) && (dsp_flag & CSKY_DSP_FLAG_V2))
1252 as_warn (_("option -mdsp conflicts with -medsp, only enabling -medsp"));
1253 isa_flag &= ~(CSKY_ISA_MAC_DSP | CSKY_ISA_DSP);
1254 isa_flag |= CSKY_ISA_DSP_ENHANCE;
1255 }
1256 else
1257 {
1258 isa_flag &= ~CSKY_ISA_DSP_ENHANCE;
1259 as_warn (_("-medsp option is only supported by ck803s, ignoring -medsp"));
1260 }
1261 ;
1262 }
1263
1264 if (do_use_branchstub == -1)
1265 do_use_branchstub = !IS_CSKY_ARCH_V1 (mach_flag);
1266 else if (do_use_branchstub == 1)
1267 {
1268 if (IS_CSKY_ARCH_V1 (mach_flag))
1269 {
1270 as_warn (_("C-SKY ABI v1 (ck510/ck610) does not support -mbranch-stub"));
1271 do_use_branchstub = 0;
1272 }
1273 else if (do_force2bsr == 0)
1274 {
1275 as_warn (_("-mno-force2bsr is ignored with -mbranch-stub"));
1276 do_force2bsr = 1;
1277 }
1278 }
1279
1280 if (IS_CSKY_ARCH_801 (mach_flag) || IS_CSKY_ARCH_802 (mach_flag))
1281 {
1282 if (!do_force2bsr)
1283 as_warn (_("-mno-force2bsr is ignored for ck801/ck802"));
1284 do_force2bsr = 1;
1285 }
1286 else if (do_force2bsr == -1)
1287 do_force2bsr = do_use_branchstub;
1288
1289 if (do_pff == -1)
1290 {
1291 if (IS_CSKY_ARCH_V1 (mach_flag))
1292 do_pff = 1;
1293 else
1294 do_pff = 0;
1295 }
1296
1297 if (do_extend_lrw == -1)
1298 {
1299 if (IS_CSKY_ARCH_801 (mach_flag))
1300 do_extend_lrw = 1;
1301 else
1302 do_extend_lrw = 0;
1303 }
1304 if (IS_CSKY_ARCH_801 (mach_flag) || IS_CSKY_ARCH_802 (mach_flag))
1305 {
1306 if (do_long_jump > 0)
1307 as_warn (_("-mljump is ignored for ck801/ck802"));
1308 do_long_jump = 0;
1309 }
1310 else if (do_long_jump == -1)
1311 do_long_jump = 1;
1312 if (do_intr_stack == -1)
1313 {
1314 /* control interrupt stack module, 801&802&803 default on
1315 807&810, default off. */
1316 if (IS_CSKY_ARCH_807 (mach_flag) || IS_CSKY_ARCH_810 (mach_flag))
1317 do_intr_stack = 0;
1318 else
1319 do_intr_stack = 1;
1320 }
1321 /* TODO: add isa_flag(SIMP/CACHE/APS). */
1322 isa_flag |= (mach_flag & CSKY_ARCH_MAC) ? CSKY_ISA_MAC : 0;
1323 isa_flag |= (mach_flag & CSKY_ARCH_MP) ? CSKY_ISA_MP : 0;
1324 isa_flag |= (mach_flag & CSKY_ARCH_CP) ? CSKY_ISA_CP : 0;
1325
1326 /* Set abi flag and get table address. */
1327 if (IS_CSKY_ARCH_V1 (mach_flag))
1328 {
1329 mach_flag = mach_flag | CSKY_ABI_V1;
1330 opcode = csky_v1_opcodes;
1331 macro = v1_macros_table;
1332 SPANPANIC = v1_SPANPANIC;
1333 SPANCLOSE = v1_SPANCLOSE;
1334 SPANEXIT = v1_SPANEXIT;
1335 md_relax_table = csky_relax_table;
1336 }
1337 else
1338 {
1339 mach_flag = mach_flag | CSKY_ABI_V2;
1340 opcode = csky_v2_opcodes;
1341 macro = v2_macros_table;
1342 SPANPANIC = v2_SPANPANIC;
1343 if (do_extend_lrw)
1344 {
1345 SPANCLOSE = v2_SPANCLOSE_ELRW;
1346 SPANEXIT = v2_SPANEXIT_ELRW;
1347 }
1348 else
1349 {
1350 SPANCLOSE = v2_SPANCLOSE;
1351 SPANEXIT = v2_SPANEXIT;
1352 }
1353 md_relax_table = csky_relax_table;
1354 }
1355
1356 /* Establish hash table for opcodes and macros. */
1357 csky_macros_hash = hash_new ();
1358 csky_opcodes_hash = hash_new ();
1359 for ( ; opcode->mnemonic != NULL; opcode++)
1360 if ((isa_flag & (opcode->isa_flag16 | opcode->isa_flag32)) != 0)
1361 hash_insert (csky_opcodes_hash, opcode->mnemonic, (char *)opcode);
1362 for ( ; macro->name != NULL; macro++)
1363 if ((isa_flag & macro->isa_flag) != 0)
1364 hash_insert (csky_macros_hash, macro->name, (char *)macro);
1365 if (do_nolrw && (isa_flag & CSKYV2_ISA_1E2) != 0)
1366 hash_insert (csky_macros_hash,
1367 v2_lrw_macro_opcode.name,
1368 (char *)&v2_lrw_macro_opcode);
1369 /* Set e_flag to ELF Head. */
1370 bfd_set_private_flags (stdoutput, mach_flag);
1371 /* Set bfd_mach to bfd backend data. */
1372 bfd_set_arch_mach (stdoutput, bfd_arch_csky, bfd_mach_flag);
1373 }
1374
1375 /* The C-SKY assembler emits mapping symbols $t and $d to mark the
1376 beginning of a sequence of instructions and data (such as a constant pool),
1377 respectively. This is similar to what ARM does. */
1378
1379 static void
1380 make_mapping_symbol (map_state state, valueT value, fragS *frag)
1381 {
1382 symbolS * symbolP;
1383 const char * symname;
1384 int type;
1385 switch (state)
1386 {
1387 case MAP_DATA:
1388 symname = "$d";
1389 type = BSF_NO_FLAGS;
1390 break;
1391 case MAP_TEXT:
1392 symname = "$t";
1393 type = BSF_NO_FLAGS;
1394 break;
1395 default:
1396 abort ();
1397 }
1398
1399 symbolP = symbol_new (symname, now_seg, value, frag);
1400 symbol_get_bfdsym (symbolP)->flags |= type | BSF_LOCAL;
1401 }
1402
1403 /* We need to keep track of whether we are emitting code or data; this
1404 function switches state and emits a mapping symbol if necessary. */
1405
1406 static void
1407 mapping_state (map_state state)
1408 {
1409 map_state current_state
1410 = seg_info (now_seg)->tc_segment_info_data.current_state;
1411
1412 if (current_state == state)
1413 return;
1414 else if (current_state == MAP_UNDEFINED && state == MAP_DATA)
1415 return;
1416 else if (current_state == MAP_UNDEFINED && state == MAP_TEXT)
1417 {
1418 struct frag * const frag_first = seg_info (now_seg)->frchainP->frch_root;
1419 if (frag_now != frag_first || frag_now_fix () > 0)
1420 make_mapping_symbol (MAP_DATA, (valueT) 0, frag_first);
1421 }
1422
1423 seg_info (now_seg)->tc_segment_info_data.current_state = state;
1424 make_mapping_symbol (state, (valueT) frag_now_fix (), frag_now);
1425 }
1426
1427 /* Dump the literal pool. */
1428
1429 static void
1430 dump_literals (int isforce)
1431 {
1432 #define CSKYV1_BR_INSN 0xF000
1433 #define CSKYV2_BR_INSN 0x0400
1434 unsigned int i;
1435 struct literal * p;
1436 symbolS * brarsym = NULL;
1437
1438 /* V1 nop encoding: 0x1200 : mov r0, r0. */
1439 static char v1_nop_insn_big[2] = {0x12, 0x00};
1440 static char v1_nop_insn_little[2] = {0x00, 0x12};
1441
1442 if (poolsize == 0)
1443 return;
1444
1445 /* Must we branch around the literal table? */
1446 if (isforce)
1447 {
1448 char brarname[8];
1449 make_internal_label (brarname, POOL_END_LABEL, poolnumber);
1450 brarsym = symbol_make (brarname);
1451 symbol_table_insert (brarsym);
1452 mapping_state (MAP_TEXT);
1453 if (IS_CSKY_ARCH_V1 (mach_flag))
1454 {
1455 csky_insn.output
1456 = frag_var (rs_machine_dependent,
1457 csky_relax_table[C (UNCD_JUMP_S, DISP32)].rlx_length,
1458 csky_relax_table[C (UNCD_JUMP_S, DISP12)].rlx_length,
1459 C (UNCD_JUMP_S, 0), brarsym, 0, 0);
1460 md_number_to_chars (csky_insn.output, CSKYV1_BR_INSN, 2);
1461 }
1462 else
1463 {
1464 csky_insn.output
1465 = frag_var (rs_machine_dependent,
1466 UNCD_DISP16_LEN,
1467 UNCD_DISP10_LEN,
1468 UNCD_DISP10,
1469 brarsym, 0, 0);
1470 md_number_to_chars (csky_insn.output, CSKYV2_BR_INSN, 2);
1471 }
1472 }
1473 /* Make sure that the section is sufficiently aligned and that
1474 the literal table is aligned within it. */
1475 if (do_pff)
1476 {
1477 valueT br_self;
1478 csky_insn.output = frag_more (2);
1479 /* .Lxx: br .Lxx */
1480 if (IS_CSKY_V1 (mach_flag))
1481 br_self = CSKYV1_BR_INSN | 0x7ff;
1482 else
1483 br_self = CSKYV2_BR_INSN;
1484 md_number_to_chars (csky_insn.output, br_self, 2);
1485 if (!isforce)
1486 {
1487 csky_insn.output = frag_more (2);
1488 /* .Lxx: br .Lxx */
1489 md_number_to_chars (csky_insn.output, br_self, 2);
1490 }
1491 }
1492 mapping_state (MAP_DATA);
1493
1494 record_alignment (now_seg, 2);
1495 if (IS_CSKY_ARCH_V1 (mach_flag))
1496 frag_align_pattern (2,
1497 (target_big_endian
1498 ? v1_nop_insn_big : v1_nop_insn_little),
1499 2, 0);
1500 else
1501 frag_align (2, 0, 3);
1502
1503 colon (S_GET_NAME (poolsym));
1504
1505 for (i = 0, p = litpool; i < poolsize; i += (p->isdouble ? 2 : 1), p++)
1506 {
1507 insn_reloc = p->r_type;
1508 if (insn_reloc == BFD_RELOC_CKCORE_TLS_IE32
1509 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
1510 || insn_reloc == BFD_RELOC_CKCORE_TLS_GD32)
1511 literal_insn_offset = p;
1512 if (p->isdouble)
1513 {
1514 if (target_big_endian)
1515 {
1516 p->e.X_add_number = p->dbnum >> 32;
1517 emit_expr (& p->e, 4);
1518 p->e.X_add_number = p->dbnum & 0xffffffff;
1519 emit_expr (& p->e, 4);
1520 }
1521 else
1522 {
1523 p->e.X_add_number = p->dbnum & 0xffffffff;
1524 emit_expr (& p->e, 4);
1525 p->e.X_add_number = p->dbnum >> 32;
1526 emit_expr (& p->e, 4);
1527 }
1528 }
1529 else
1530 emit_expr (& p->e, 4);
1531 }
1532
1533 if (isforce && IS_CSKY_ARCH_V2 (mach_flag))
1534 {
1535 /* Add one nop insn at end of literal for disassembler. */
1536 mapping_state (MAP_TEXT);
1537 csky_insn.output = frag_more (2);
1538 md_number_to_chars (csky_insn.output, CSKYV2_INST_NOP, 2);
1539 }
1540
1541 insn_reloc = BFD_RELOC_NONE;
1542
1543 if (brarsym != NULL)
1544 colon (S_GET_NAME (brarsym));
1545 poolsize = 0;
1546 }
1547
1548 static int
1549 enter_literal (expressionS *e,
1550 int ispcrel,
1551 unsigned char isdouble,
1552 uint64_t dbnum)
1553 {
1554 unsigned int i;
1555 struct literal * p;
1556 if (poolsize >= MAX_POOL_SIZE - 2)
1557 {
1558 /* The literal pool is as full as we can handle. We have
1559 to be 2 entries shy of the 1024/4=256 entries because we
1560 have to allow for the branch (2 bytes) and the alignment
1561 (2 bytes before the first insn referencing the pool and
1562 2 bytes before the pool itself) == 6 bytes, rounds up
1563 to 2 entries. */
1564
1565 /* Save the parsed symbol's reloc. */
1566 enum bfd_reloc_code_real last_reloc_before_dump = insn_reloc;
1567 dump_literals (1);
1568 insn_reloc = last_reloc_before_dump;
1569 }
1570
1571 if (poolsize == 0)
1572 {
1573 /* Create new literal pool. */
1574 if (++ poolnumber > 0xFFFF)
1575 as_fatal (_("more than 65K literal pools"));
1576
1577 make_internal_label (poolname, POOL_START_LABEL, poolnumber);
1578 poolsym = symbol_make (poolname);
1579 symbol_table_insert (poolsym);
1580 poolspan = 0;
1581 }
1582
1583 /* Search pool for value so we don't have duplicates. */
1584 for (p = litpool, i = 0; i < poolsize; i += (p->isdouble ? 2 : 1), p++)
1585 {
1586 if (e->X_op == p->e.X_op
1587 && e->X_add_symbol == p->e.X_add_symbol
1588 && e->X_add_number == p->e.X_add_number
1589 && ispcrel == p->ispcrel
1590 && insn_reloc == p->r_type
1591 && isdouble == p->isdouble
1592 && insn_reloc != BFD_RELOC_CKCORE_TLS_GD32
1593 && insn_reloc != BFD_RELOC_CKCORE_TLS_LDM32
1594 && insn_reloc != BFD_RELOC_CKCORE_TLS_LDO32
1595 && insn_reloc != BFD_RELOC_CKCORE_TLS_IE32
1596 && insn_reloc != BFD_RELOC_CKCORE_TLS_LE32)
1597 {
1598 p->refcnt ++;
1599 return i;
1600 }
1601 }
1602 p->refcnt = 1;
1603 p->ispcrel = ispcrel;
1604 p->e = *e;
1605 p->r_type = insn_reloc;
1606 p->isdouble = isdouble;
1607 if (isdouble)
1608 p->dbnum = dbnum;
1609
1610 if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
1611 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
1612 || insn_reloc == BFD_RELOC_CKCORE_TLS_IE32)
1613 {
1614 p->tls_addend.frag = frag_now;
1615 p->tls_addend.offset = csky_insn.output - frag_now->fr_literal;
1616 literal_insn_offset = p;
1617 }
1618 poolsize += (p->isdouble ? 2 : 1);
1619 return i;
1620 }
1621
1622 /* Check whether we must dump the literal pool here.
1623 kind == 0 is any old instruction.
1624 kind > 0 means we just had a control transfer instruction.
1625 kind == 1 means within a function.
1626 kind == 2 means we just left a function.
1627
1628 OFFSET is the length of the insn being processed.
1629
1630 SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC.
1631 SPANPANIC means that we must dump now.
1632 The dump_literals (1) call inserts a branch around the table, so
1633 we first look to see if its a situation where we won't have to
1634 insert a branch (e.g., the previous instruction was an unconditional
1635 branch).
1636
1637 SPANPANIC is the point where we must dump a single-entry pool.
1638 it accounts for alignments and an inserted branch.
1639 the 'poolsize*2' accounts for the scenario where we do:
1640 lrw r1,lit1; lrw r2,lit2; lrw r3,lit3
1641 Note that the 'lit2' reference is 2 bytes further along
1642 but the literal it references will be 4 bytes further along,
1643 so we must consider the poolsize into this equation.
1644 This is slightly over-cautious, but guarantees that we won't
1645 panic because a relocation is too distant. */
1646
1647 static void
1648 check_literals (int kind, int offset)
1649 {
1650 poolspan += offset;
1651
1652 if ((poolspan > SPANEXIT || do_func_dump)
1653 && kind > 1
1654 && (do_br_dump || do_func_dump))
1655 dump_literals (0);
1656 else if (poolspan > SPANCLOSE && (kind > 0) && do_br_dump)
1657 dump_literals (0);
1658 else if (poolspan
1659 >= (SPANPANIC - (IS_CSKY_ARCH_V1 (mach_flag) ? poolsize * 2 : 0)))
1660 dump_literals (1);
1661 /* We have not dumped literal pool before insn1,
1662 and will not dump literal pool between insn1 and insnN+1,
1663 so reset poolspan to original length. */
1664 else if (do_noliteraldump == 1)
1665 poolspan -= offset;
1666
1667 if (do_noliteraldump == 1)
1668 do_noliteraldump = 0;
1669 }
1670
1671 /* The next group of functions are helpers for parsing various kinds
1672 of instruction operand syntax. */
1673
1674 /* Parse operands of the form
1675 <symbol>@GOTOFF+<nnn>
1676 and similar .plt or .got references.
1677
1678 If we find one, set up the correct relocation in RELOC and copy the
1679 input string, minus the `@GOTOFF' into a malloc'd buffer for
1680 parsing by the calling routine. Return this buffer, and if ADJUST
1681 is non-null set it to the length of the string we removed from the
1682 input line. Otherwise return NULL. */
1683
1684 static char *
1685 lex_got (enum bfd_reloc_code_real *reloc,
1686 int *adjust)
1687 {
1688 struct _gotrel
1689 {
1690 const char *str;
1691 const enum bfd_reloc_code_real rel;
1692 };
1693 static const struct _gotrel gotrel[] =
1694 {
1695 { "GOTOFF", BFD_RELOC_CKCORE_GOTOFF },
1696 { "GOTPC", BFD_RELOC_CKCORE_GOTPC },
1697 { "GOTTPOFF", BFD_RELOC_CKCORE_TLS_IE32 },
1698 { "GOT", BFD_RELOC_CKCORE_GOT32 },
1699 { "PLT", BFD_RELOC_CKCORE_PLT32 },
1700 { "BTEXT", BFD_RELOC_CKCORE_TOFFSET_LO16},
1701 { "BDATA", BFD_RELOC_CKCORE_DOFFSET_LO16},
1702 { "TLSGD32", BFD_RELOC_CKCORE_TLS_GD32 },
1703 { "TLSLDM32", BFD_RELOC_CKCORE_TLS_LDM32 },
1704 { "TLSLDO32", BFD_RELOC_CKCORE_TLS_LDO32 },
1705 { "TPOFF", BFD_RELOC_CKCORE_TLS_LE32 }
1706 };
1707
1708 char *cp;
1709 unsigned int j;
1710
1711 for (cp = input_line_pointer; *cp != '@'; cp++)
1712 if (is_end_of_line[(unsigned char) *cp])
1713 return NULL;
1714
1715 for (j = 0; j < sizeof (gotrel) / sizeof (gotrel[0]); j++)
1716 {
1717 int len = strlen (gotrel[j].str);
1718
1719 if (strncasecmp (cp + 1, gotrel[j].str, len) == 0)
1720 {
1721 if (gotrel[j].rel != 0)
1722 {
1723 *reloc = gotrel[j].rel;
1724 if (adjust)
1725 *adjust = len;
1726
1727 /* input_line_pointer is the str pointer after relocation
1728 token like @GOTOFF. */
1729 input_line_pointer += len + 1;
1730 return input_line_pointer;
1731 }
1732
1733 csky_show_error (ERROR_RELOC_ILLEGAL, 0,
1734 (void *)gotrel[j].str, NULL);
1735 return NULL;
1736 }
1737 }
1738
1739 /* Might be a symbol version string. Don't as_bad here. */
1740 return NULL;
1741 }
1742
1743 /* Parse an expression, returning it in E. */
1744
1745 static char *
1746 parse_exp (char *s, expressionS *e)
1747 {
1748 char *save;
1749 char *new;
1750
1751 /* Skip whitespace. */
1752 while (ISSPACE (*s))
1753 ++s;
1754
1755 save = input_line_pointer;
1756 input_line_pointer = s;
1757
1758 insn_reloc = BFD_RELOC_NONE;
1759 expression (e);
1760 lex_got (&insn_reloc, NULL);
1761
1762 if (e->X_op == O_absent)
1763 SET_ERROR_NUMBER (ERROR_MISSING_OPERAND, NULL);
1764
1765 new = input_line_pointer;
1766 input_line_pointer = save;
1767
1768 return new;
1769 }
1770
1771 /* Parse a floating-point number from S into its target representation.
1772 If ISDOUBLE is true, return the result in *DBNUM; otherwise
1773 it's returned in E->X_add_number. Returns the result of advancing
1774 S past the constant. */
1775
1776 static char *
1777 parse_fexp (char *s, expressionS *e, unsigned char isdouble, uint64_t *dbnum)
1778 {
1779 int length; /* Number of chars in an object. */
1780 const char *err = NULL; /* Error from scanning float literal. */
1781 unsigned char temp[8];
1782
1783 /* input_line_pointer->1st char of a flonum (we hope!). */
1784 input_line_pointer = s;
1785
1786 if (input_line_pointer[0] == '0'
1787 && ISALPHA (input_line_pointer[1]))
1788 input_line_pointer += 2;
1789
1790 if (isdouble)
1791 err = md_atof ('d', (char *) temp, &length);
1792 else
1793 err = md_atof ('f', (char *) temp, &length);
1794 know (length <= 8);
1795 know (err != NULL || length > 0);
1796
1797 if (!is_end_of_line[(unsigned char) *input_line_pointer])
1798 as_bad (_("immediate operand required"));
1799 while (!is_end_of_line[(unsigned char) *input_line_pointer])
1800 input_line_pointer++;
1801
1802 if (err)
1803 {
1804 as_bad (_("bad floating literal: %s"), err);
1805 while (!is_end_of_line[(unsigned char) *input_line_pointer])
1806 input_line_pointer++;
1807 know (is_end_of_line[(unsigned char) input_line_pointer[-1]]);
1808 return input_line_pointer;
1809 }
1810
1811 e->X_add_symbol = 0x0;
1812 e->X_op_symbol = 0x0;
1813 e->X_op = O_constant;
1814 e->X_unsigned = 1;
1815 e->X_md = 0x0;
1816
1817 if (!isdouble)
1818 {
1819 uint32_t fnum;
1820 if (target_big_endian)
1821 fnum = (((uint32_t) temp[0] << 24)
1822 | (temp[1] << 16)
1823 | (temp[2] << 8)
1824 | temp[3]);
1825 else
1826 fnum = (((uint32_t) temp[3] << 24)
1827 | (temp[2] << 16)
1828 | (temp[1] << 8)
1829 | temp[0]);
1830 e->X_add_number = fnum;
1831 }
1832 else
1833 {
1834 if (target_big_endian)
1835 {
1836 *dbnum = (((uint32_t) temp[0] << 24)
1837 | (temp[1] << 16)
1838 | (temp[2] << 8)
1839 | temp[3]);
1840 *dbnum <<= 32;
1841 *dbnum |= (((uint32_t) temp[4] << 24)
1842 | (temp[5] << 16)
1843 | (temp[6] << 8)
1844 | temp[7]);
1845 }
1846 else
1847 {
1848 *dbnum = (((uint32_t) temp[7] << 24)
1849 | (temp[6] << 16)
1850 | (temp[5] << 8)
1851 | temp[4]);
1852 *dbnum <<= 32;
1853 *dbnum |= (((uint32_t) temp[3] << 24)
1854 | (temp[2] << 16)
1855 | (temp[1] << 8)
1856 | temp[0]);
1857 }
1858 }
1859 return input_line_pointer;
1860 }
1861
1862 static char *
1863 parse_rt (char *s,
1864 int ispcrel,
1865 expressionS *ep,
1866 long reg ATTRIBUTE_UNUSED)
1867 {
1868 expressionS e;
1869 int n;
1870
1871 if (ep)
1872 /* Indicate nothing there. */
1873 ep->X_op = O_absent;
1874
1875 if (*s == '[')
1876 {
1877 s = parse_exp (s + 1, &e);
1878
1879 if (*s == ']')
1880 s++;
1881 else
1882 SET_ERROR_NUMBER (ERROR_MISSING_RSQUARE_BRACKETS, NULL);
1883
1884 if (ep)
1885 *ep = e;
1886 }
1887 else
1888 {
1889 s = parse_exp (s, &e);
1890 if (BFD_RELOC_CKCORE_DOFFSET_LO16 == insn_reloc
1891 || BFD_RELOC_CKCORE_TOFFSET_LO16 == insn_reloc)
1892 {
1893 if (ep)
1894 *ep = e;
1895 return s;
1896 }
1897 if (ep)
1898 *ep = e;
1899 /* If the instruction has work, literal handling is in the work. */
1900 if (!csky_insn.opcode->work)
1901 {
1902 n = enter_literal (&e, ispcrel, 0, 0);
1903 if (ep)
1904 *ep = e;
1905
1906 /* Create a reference to pool entry. */
1907 ep->X_op = O_symbol;
1908 ep->X_add_symbol = poolsym;
1909 ep->X_add_number = n << 2;
1910 }
1911 }
1912 return s;
1913 }
1914
1915 static char *
1916 parse_rtf (char *s, int ispcrel, expressionS *ep)
1917 {
1918 expressionS e;
1919 int n = 0;
1920
1921 if (ep)
1922 /* Indicate nothing there. */
1923 ep->X_op = O_absent;
1924
1925 if (*s == '[')
1926 {
1927 s = parse_exp (s + 1, & e);
1928
1929 if (*s == ']')
1930 s++;
1931 else
1932 as_bad (_("missing ']'"));
1933
1934 if (ep)
1935 *ep = e;
1936 }
1937 else
1938 {
1939 uint64_t dbnum;
1940 if (strstr (csky_insn.opcode->mnemonic, "flrws"))
1941 {
1942 s = parse_fexp (s, &e, 0, &dbnum);
1943 n = enter_literal (&e, ispcrel, 0, dbnum);
1944 }
1945 else if (strstr (csky_insn.opcode->mnemonic, "flrwd"))
1946 {
1947 s = parse_fexp (s, &e, 1, &dbnum);
1948 n = enter_literal (&e, ispcrel, 1, dbnum);
1949 }
1950 else
1951 as_bad (_("unrecognized opcode"));
1952
1953 if (ep)
1954 *ep = e;
1955
1956 /* Create a reference to pool entry. */
1957 ep->X_op = O_symbol;
1958 ep->X_add_symbol = poolsym;
1959 ep->X_add_number = n << 2;
1960 }
1961 return s;
1962 }
1963
1964 static bfd_boolean
1965 parse_type_ctrlreg (char** oper)
1966 {
1967 int i = -1;
1968 int len = 0;
1969
1970 if (TOLOWER (*(*oper + 0)) == 'c'
1971 && TOLOWER (*(*oper + 1)) == 'r'
1972 && ISDIGIT (*(*oper + 2)))
1973 {
1974 /* The control registers are named crxx. */
1975 i = *(*oper + 2) - 0x30;
1976 i = ISDIGIT (*(*oper + 3)) ? (*(*oper + 3) - 0x30) + 10 * i : i;
1977 len = ISDIGIT (*(*oper + 3)) ? 4 : 3;
1978 *oper += len;
1979 }
1980 else if (!(TOLOWER (*(*oper + 0)) == 'c'
1981 && TOLOWER (*(*oper + 1)) == 'r'))
1982 {
1983 /* The control registers are aliased. */
1984 struct csky_reg *reg = &csky_ctrl_regs[0];
1985 while (reg->name)
1986 {
1987 if (memcmp (*oper, reg->name, strlen (reg->name)) == 0
1988 && (!reg->flag || (isa_flag & reg->flag)))
1989 {
1990 i = reg->index;
1991 len = strlen (reg->name);
1992 *oper += len;
1993 break;
1994 }
1995 reg++;
1996 }
1997 }
1998
1999 if (IS_CSKY_V2 (mach_flag))
2000 {
2001 char *s = *oper;
2002 int crx;
2003 int sel;
2004 if (i != -1)
2005 {
2006 crx = i;
2007 sel = 0;
2008 }
2009 else
2010 {
2011 if (s[0] == 'c' && s[1] == 'r')
2012 {
2013 s += 2;
2014 if (*s == '<')
2015 {
2016 s++;
2017 if (s[0] == '3' && s[1] >= '0' && s[1] <= '1')
2018 {
2019 crx = 30 + s[1] - '0';
2020 s += 2;
2021 }
2022 else if (s[0] == '2' && s[1] >= '0' && s[1] <= '9')
2023 {
2024 crx = 20 + s[1] - '0';
2025 s += 2;
2026 }
2027 else if (s[0] == '1' && s[1] >= '0' && s[1] <= '9')
2028 {
2029 crx = 10 + s[1] - '0';
2030 s += 2;
2031 }
2032 else if (s[0] >= '0' && s[0] <= '9')
2033 {
2034 crx = s[0] - '0';
2035 s += 1;
2036 }
2037 else
2038 {
2039 SET_ERROR_NUMBER (ERROR_REG_OVER_RANGE, "control");
2040 return FALSE;
2041 }
2042 if (*s == ',')
2043 s++;
2044 else
2045 {
2046 SET_ERROR_NUMBER (ERROR_CREG_ILLEGAL, NULL);
2047 return FALSE;
2048 }
2049 char *pS = s;
2050 while (*pS != '>' && !is_end_of_line[(unsigned char) *pS])
2051 pS++;
2052 if (*pS == '>')
2053 *pS = '\0';
2054 else
2055 {
2056 /* Error. Missing '>'. */
2057 SET_ERROR_NUMBER (ERROR_MISSING_RANGLE_BRACKETS, NULL);
2058 return FALSE;
2059 }
2060 expressionS e;
2061 s = parse_exp (s, &e);
2062 if (e.X_op == O_constant
2063 && e.X_add_number >= 0
2064 && e.X_add_number <= 31)
2065 {
2066 *oper = s;
2067 sel = e.X_add_number;
2068 }
2069 else
2070 return FALSE;
2071 }
2072 else
2073 {
2074 /* Error. Missing '<'. */
2075 SET_ERROR_NUMBER (ERROR_MISSING_LANGLE_BRACKETS, NULL);
2076 return FALSE;
2077 }
2078 }
2079 else
2080 {
2081 SET_ERROR_NUMBER (ERROR_CREG_ILLEGAL, NULL);
2082 return FALSE;
2083 }
2084 }
2085 i = (sel << 5) | crx;
2086 }
2087 csky_insn.val[csky_insn.idx++] = i;
2088 return TRUE;
2089 }
2090
2091 static bfd_boolean
2092 is_reg_sp_with_bracket (char **oper)
2093 {
2094 const char **regs;
2095 int sp_idx;
2096 int len;
2097
2098 if (IS_CSKY_V1 (mach_flag))
2099 sp_idx = 0;
2100 else
2101 sp_idx = 14;
2102
2103 if (**oper != '(')
2104 return FALSE;
2105 *oper += 1;
2106 regs = csky_general_reg;
2107 len = strlen (regs[sp_idx]);
2108 if (memcmp (*oper, regs[sp_idx], len) == 0)
2109 {
2110 *oper += len;
2111 if (**oper != ')')
2112 return FALSE;
2113 *oper += 1;
2114 csky_insn.val[csky_insn.idx++] = sp_idx;
2115 return TRUE;
2116 }
2117 else
2118 {
2119 if (IS_CSKY_V1 (mach_flag))
2120 regs = cskyv1_general_alias_reg;
2121 else
2122 regs = cskyv2_general_alias_reg;
2123 len = strlen (regs[sp_idx]);
2124 if (memcmp (*oper, regs[sp_idx], len) == 0)
2125 {
2126 *oper += len;
2127 if (**oper != ')')
2128 return FALSE;
2129 *oper += 1;
2130 return TRUE;
2131 }
2132 }
2133 return FALSE;
2134 }
2135
2136 static bfd_boolean
2137 is_reg_sp (char **oper)
2138 {
2139 const char **regs;
2140 int sp_idx;
2141 int len;
2142 if (IS_CSKY_V1 (mach_flag))
2143 sp_idx = 0;
2144 else
2145 sp_idx = 14;
2146
2147 regs = csky_general_reg;
2148 len = strlen (regs[sp_idx]);
2149 if (memcmp (*oper, regs[sp_idx], len) == 0)
2150 {
2151 *oper += len;
2152 csky_insn.val[csky_insn.idx++] = sp_idx;
2153 return TRUE;
2154 }
2155 else
2156 {
2157 if (IS_CSKY_V1 (mach_flag))
2158 regs = cskyv1_general_alias_reg;
2159 else
2160 regs = cskyv2_general_alias_reg;
2161 len = strlen (regs[sp_idx]);
2162 if (memcmp (*oper, regs[sp_idx], len) == 0)
2163 {
2164 *oper += len;
2165 csky_insn.val[csky_insn.idx++] = sp_idx;
2166 return TRUE;
2167 }
2168 }
2169 return FALSE;
2170 }
2171
2172 static int
2173 csky_get_reg_val (char *str, int *len)
2174 {
2175 long reg = 0;
2176 if (TOLOWER (str[0]) == 'r' && ISDIGIT (str[1]))
2177 {
2178 if (ISDIGIT (str[1]) && ISDIGIT (str[2]))
2179 {
2180 reg = (str[1] - '0') * 10 + str[2] - '0';
2181 *len = 3;
2182 }
2183 else if (ISDIGIT (str[1]))
2184 {
2185 reg = str[1] - '0';
2186 *len = 2;
2187 }
2188 else
2189 return -1;
2190 }
2191 else if (TOLOWER (str[0]) == 's' && TOLOWER (str[1]) == 'p'
2192 && !ISDIGIT (str[2]))
2193 {
2194 /* sp. */
2195 if (IS_CSKY_V1 (mach_flag))
2196 reg = 0;
2197 else
2198 reg = 14;
2199 *len = 2;
2200 }
2201 else if (TOLOWER (str[0]) == 'g' && TOLOWER (str[1]) == 'b'
2202 && !ISDIGIT (str[2]))
2203 {
2204 /* gb. */
2205 if (IS_CSKY_V1 (mach_flag))
2206 reg = 14;
2207 else
2208 reg = 28;
2209 *len = 2;
2210 }
2211 else if (TOLOWER (str[0]) == 'l' && TOLOWER (str[1]) == 'r'
2212 && !ISDIGIT (str[2]))
2213 {
2214 /* lr. */
2215 reg = 15;
2216 *len = 2;
2217 }
2218 else if (TOLOWER (str[0]) == 't' && TOLOWER (str[1]) == 'l'
2219 && TOLOWER (str[2]) == 's' && !ISDIGIT (str[3]))
2220 {
2221 /* tls. */
2222 if (IS_CSKY_V2 (mach_flag))
2223 reg = 31;
2224 else
2225 return -1;
2226 *len = 3;
2227 }
2228 else if (TOLOWER (str[0]) == 's' && TOLOWER (str[1]) == 'v'
2229 && TOLOWER (str[2]) == 'b' && TOLOWER (str[3]) == 'r')
2230 {
2231 if (IS_CSKY_V2 (mach_flag))
2232 reg = 30;
2233 else
2234 return -1;
2235 *len = 4;
2236 }
2237 else if (TOLOWER (str[0]) == 'a')
2238 {
2239 if (ISDIGIT (str[1]) && !ISDIGIT (str[2]))
2240 {
2241 if (IS_CSKY_V1 (mach_flag) && (str[1] - '0') <= 5)
2242 /* a0 - a5. */
2243 reg = 2 + str[1] - '0';
2244 else if (IS_CSKY_V2 (mach_flag) && (str[1] - '0') <= 3)
2245 /* a0 - a3. */
2246 reg = str[1] - '0';
2247 else
2248 return -1;
2249 *len = 2;
2250 }
2251 }
2252 else if (TOLOWER (str[0]) == 't')
2253 {
2254 if (IS_CSKY_V2 (mach_flag))
2255 {
2256 reg = atoi (str + 1);
2257 if (reg > 9)
2258 return -1;
2259
2260 if (reg > 1)
2261 /* t2 - t9. */
2262 reg = reg + 16;
2263 else
2264 /* t0 - t1. */
2265 reg = reg + 12;
2266 *len = 2;
2267 }
2268 }
2269 else if (TOLOWER (str[0]) == 'l')
2270 {
2271 if (str[1] < '0' || str[1] > '9')
2272 return -1;
2273 if (IS_CSKY_V2 (mach_flag))
2274 {
2275 reg = atoi (str + 1);
2276 if (reg > 9)
2277 return -1;
2278 if (reg > 7)
2279 /* l8 - l9. */
2280 reg = reg + 8;
2281 else
2282 /* l0 - l7. */
2283 reg = reg + 4;
2284 }
2285 else
2286 {
2287 reg = atoi (str + 1);
2288 if (reg > 5)
2289 return -1;
2290 /* l0 - l6 -> r8 - r13. */
2291 reg = reg + 8;
2292 }
2293 *len = 2;
2294 }
2295 else
2296 return -1;
2297
2298 /* Is register available? */
2299 if (IS_CSKY_ARCH_801 (mach_flag))
2300 {
2301 /* CK801 register range is r0-r8 & r13-r15. */
2302 if ((reg > 8 && reg < 13) || reg > 15)
2303 {
2304 SET_ERROR_NUMBER (ERROR_REG_OVER_RANGE, reg);
2305 return -1;
2306 }
2307 }
2308 else if (IS_CSKY_ARCH_802 (mach_flag))
2309 {
2310 /* CK802 register range is r0-r15 & r23-r25 & r30. */
2311 if ((reg > 15 && reg < 23) || (reg > 25 && reg != 30))
2312 {
2313 SET_ERROR_NUMBER (ERROR_REG_OVER_RANGE, reg);
2314 return -1;
2315 }
2316 }
2317 else if (reg > 31 || reg < 0)
2318 {
2319 SET_ERROR_NUMBER (ERROR_REG_OVER_RANGE, reg);
2320 return -1;
2321 }
2322
2323 return reg;
2324 }
2325
2326 static int
2327 csky_get_freg_val (char *str, int *len)
2328 {
2329 int reg = 0;
2330 char *s = NULL;
2331 if ((str[0] == 'v' || str[0] == 'f') && (str[1] == 'r'))
2332 {
2333 /* It is fpu register. */
2334 s = &str[2];
2335 while (ISDIGIT (*s))
2336 {
2337 reg = reg * 10 + (*s) - '0';
2338 s++;
2339 }
2340 if (reg > 31)
2341 return -1;
2342 }
2343 else
2344 return -1;
2345 *len = s - str;
2346 return reg;
2347 }
2348
2349 static bfd_boolean
2350 is_reglist_legal (char **oper)
2351 {
2352 int reg1 = -1;
2353 int reg2 = -1;
2354 int len = 0;
2355 reg1 = csky_get_reg_val (*oper, &len);
2356 *oper += len;
2357
2358 if (reg1 == -1 || (IS_CSKY_V1 (mach_flag) && (reg1 == 0 || reg1 == 15)))
2359 {
2360 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2361 "The first reg must not be r0/r15");
2362 return FALSE;
2363 }
2364
2365 if (**oper != '-')
2366 {
2367 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2368 "The operand format must be rx-ry");
2369 return FALSE;
2370 }
2371 *oper += 1;
2372
2373 reg2 = csky_get_reg_val (*oper, &len);
2374 *oper += len;
2375
2376 if (reg2 == -1 || (IS_CSKY_V1 (mach_flag) && reg1 == 15))
2377 {
2378 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2379 "The operand format must be r15 in C-SKY V1");
2380 return FALSE;
2381 }
2382 if (IS_CSKY_V2 (mach_flag))
2383 {
2384 if (reg2 < reg1)
2385 {
2386 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2387 "The operand format must be rx-ry (rx < ry)");
2388 return FALSE;
2389 }
2390 reg2 = reg2 - reg1;
2391 reg1 <<= 5;
2392 reg1 |= reg2;
2393 }
2394 csky_insn.val[csky_insn.idx++] = reg1;
2395 return TRUE;
2396 }
2397
2398 static bfd_boolean
2399 is_freglist_legal (char **oper)
2400 {
2401 int reg1 = -1;
2402 int reg2 = -1;
2403 int len = 0;
2404 reg1 = csky_get_freg_val (*oper, &len);
2405 *oper += len;
2406
2407 if (reg1 == -1)
2408 {
2409 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2410 "The fpu register format is not recognized.");
2411 return FALSE;
2412 }
2413
2414 if (**oper != '-')
2415 {
2416 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2417 "The operand format must be vrx-vry/frx-fry.");
2418 return FALSE;
2419 }
2420 *oper += 1;
2421
2422 reg2 = csky_get_freg_val (*oper, &len);
2423 *oper += len;
2424
2425 if (reg2 == -1)
2426 {
2427 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2428 "The fpu register format is not recognized.");
2429 return FALSE;
2430 }
2431 if (reg2 < reg1)
2432 {
2433 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2434 "The operand format must be rx-ry(rx < ry)");
2435 return FALSE;
2436 }
2437 reg2 = reg2 - reg1;
2438 reg2 <<= 4;
2439 reg1 |= reg2;
2440 csky_insn.val[csky_insn.idx++] = reg1;
2441 return TRUE;
2442 }
2443
2444 static bfd_boolean
2445 is_reglist_dash_comma_legal (char **oper, struct operand *oprnd)
2446 {
2447 int reg1 = -1;
2448 int reg2 = -1;
2449 int len = 0;
2450 int list = 0;
2451 int flag = 0;
2452 int temp = 0;
2453 while (**oper != '\n' && **oper != '\0')
2454 {
2455 reg1 = csky_get_reg_val (*oper, &len);
2456 if (reg1 == -1)
2457 {
2458 SET_ERROR_NUMBER (ERROR_REG_LIST, NULL);
2459 return FALSE;
2460 }
2461 flag |= (1 << reg1);
2462 *oper += len;
2463 if (**oper == '-')
2464 {
2465 *oper += 1;
2466 reg2 = csky_get_reg_val (*oper, &len);
2467 if (reg2 == -1)
2468 {
2469 SET_ERROR_NUMBER (ERROR_REG_LIST, NULL);
2470 return FALSE;
2471 }
2472 *oper += len;
2473 if (reg1 > reg2)
2474 {
2475 SET_ERROR_NUMBER (ERROR_REG_LIST, NULL);
2476 return FALSE;
2477 }
2478 while (reg2 >= reg1)
2479 {
2480 flag |= (1 << reg2);
2481 reg2--;
2482 }
2483 }
2484 if (**oper == ',')
2485 *oper += 1;
2486 }
2487 /* The reglist: r4-r11, r15, r16-r17, r28. */
2488 #define REGLIST_BITS 0x10038ff0
2489 if (flag & ~(REGLIST_BITS))
2490 {
2491 SET_ERROR_NUMBER (ERROR_REG_LIST, NULL);
2492 return FALSE;
2493 }
2494 /* Check r4-r11. */
2495 int i = 4;
2496 while (i <= 11)
2497 {
2498 if (flag & (1 << i))
2499 temp = i - 4 + 1;
2500 i++;
2501 }
2502 list |= temp;
2503
2504 /* Check r15. */
2505 if (flag & (1 << 15))
2506 list |= (1 << 4);
2507
2508 /* Check r16-r17. */
2509 i = 16;
2510 temp = 0;
2511 while (i <= 17)
2512 {
2513 if (flag & (1 << i))
2514 temp = i - 16 + 1;
2515 i++;
2516 }
2517 list |= (temp << 5);
2518
2519 /* Check r28. */
2520 if (flag & (1 << 28))
2521 list |= (1 << 8);
2522 if (oprnd->mask == OPRND_MASK_0_4 && (list & ~OPRND_MASK_0_4))
2523 {
2524 SET_ERROR_NUMBER (ERROR_REG_LIST, NULL);
2525 return FALSE;
2526 }
2527 csky_insn.val[csky_insn.idx++] = list;
2528 return TRUE;
2529 }
2530
2531 static bfd_boolean
2532 is_reg_lshift_illegal (char **oper, int is_float)
2533 {
2534 int value;
2535 int len;
2536 int reg;
2537 reg = csky_get_reg_val (*oper, &len);
2538 if (reg == -1)
2539 {
2540 SET_ERROR_NUMBER (ERROR_REG_FORMAT, "The register must be r0-r31.");
2541 return FALSE;
2542 }
2543
2544 *oper += len;
2545 if ((*oper)[0] != '<' || (*oper)[1] != '<')
2546 {
2547 SET_ERROR_NUMBER (ERROR_UNDEFINE,
2548 "Operand format error; should be (rx, ry << n)");
2549 return FALSE;
2550 }
2551 *oper += 2;
2552
2553 expressionS e;
2554 char *new_oper = parse_exp (*oper, &e);
2555 if (e.X_op == O_constant)
2556 {
2557 *oper = new_oper;
2558 /* The immediate must be in [0, 3]. */
2559 if (e.X_add_number < 0 || e.X_add_number > 3)
2560 {
2561 SET_ERROR_NUMBER (ERROR_IMM_OVERFLOW, NULL);
2562 return FALSE;
2563 }
2564 }
2565 else
2566 {
2567 SET_ERROR_NUMBER (ERROR_EXP_CONSTANT, NULL);
2568 return FALSE;
2569 }
2570 if (is_float)
2571 value = (reg << 2) | e.X_add_number;
2572 else
2573 value = (reg << 5) | (1 << e.X_add_number);
2574 csky_insn.val[csky_insn.idx++] = value;
2575
2576 return TRUE;
2577 }
2578
2579 static bfd_boolean
2580 is_imm_over_range (char **oper, int min, int max, int ext)
2581 {
2582 expressionS e;
2583 bfd_boolean ret = FALSE;
2584 char *new_oper = parse_exp (*oper, &e);
2585 if (e.X_op == O_constant)
2586 {
2587 ret = TRUE;
2588 *oper = new_oper;
2589 if ((int)e.X_add_number != ext
2590 && (e.X_add_number < min || e.X_add_number > max))
2591 {
2592 ret = FALSE;
2593 SET_ERROR_NUMBER (ERROR_IMM_OVERFLOW, NULL);
2594 }
2595 csky_insn.val[csky_insn.idx++] = e.X_add_number;
2596 }
2597
2598 return ret;
2599 }
2600
2601 static bfd_boolean
2602 is_oimm_over_range (char **oper, int min, int max)
2603 {
2604 expressionS e;
2605 bfd_boolean ret = FALSE;
2606 char *new_oper = parse_exp (*oper, &e);
2607 if (e.X_op == O_constant)
2608 {
2609 ret = TRUE;
2610 *oper = new_oper;
2611 if (e.X_add_number < min || e.X_add_number > max)
2612 {
2613 ret = FALSE;
2614 SET_ERROR_NUMBER (ERROR_IMM_OVERFLOW, NULL);
2615 }
2616 csky_insn.val[csky_insn.idx++] = e.X_add_number - 1;
2617 }
2618
2619 return ret;
2620 }
2621
2622 static bfd_boolean
2623 is_psr_bit (char **oper)
2624 {
2625 const struct psrbit *bits;
2626 int i = 0;
2627
2628 if (IS_CSKY_V1 (mach_flag))
2629 bits = cskyv1_psr_bits;
2630 else
2631 bits = cskyv2_psr_bits;
2632
2633 while (bits[i].name != NULL)
2634 {
2635 if (bits[i].isa && !(bits[i].isa & isa_flag))
2636 {
2637 i++;
2638 continue;
2639 }
2640 if (strncasecmp (*oper, bits[i].name, strlen (bits[i].name)) == 0)
2641 {
2642 *oper += strlen (bits[i].name);
2643 csky_insn.val[csky_insn.idx] |= bits[i].value;
2644 return TRUE;
2645 }
2646 i++;
2647 }
2648 SET_ERROR_NUMBER (ERROR_OPCODE_PSRBIT, NULL);
2649 return FALSE;
2650 }
2651
2652 static bfd_boolean
2653 parse_type_cpidx (char** oper)
2654 {
2655 char *s = *oper;
2656 int idx;
2657 if (s[0] == 'c' && s[1] == 'p')
2658 {
2659 if (ISDIGIT (s[2]) && ISDIGIT (s[3]) && ! ISDIGIT (s[4]))
2660 {
2661 idx = (s[2] - '0') * 10 + s[3] - '0';
2662 *oper += 4;
2663 }
2664 else if (ISDIGIT (s[2]) && !ISDIGIT (s[3]))
2665 {
2666 idx = s[2] - '0';
2667 *oper += 3;
2668 }
2669 else
2670 return FALSE;
2671 }
2672 else
2673 {
2674 expressionS e;
2675 *oper = parse_exp (*oper, &e);
2676 if (e.X_op != O_constant)
2677 {
2678 /* Can not recognize the operand. */
2679 return FALSE;
2680 }
2681 idx = e.X_add_number;
2682 }
2683
2684 csky_insn.val[csky_insn.idx++] = idx;
2685
2686 return TRUE;
2687 }
2688
2689 static bfd_boolean
2690 parse_type_cpreg (char** oper)
2691 {
2692 const char **regs = csky_cp_reg;
2693 int i;
2694 int len;
2695
2696 for (i = 0; i < (int)(sizeof (csky_cp_reg) / sizeof (char *)); i++)
2697 {
2698 len = strlen (regs[i]);
2699 if (memcmp (*oper, regs[i], len) == 0 && !ISDIGIT (*(*oper + len)))
2700 {
2701 *oper += len;
2702 csky_insn.val[csky_insn.idx++] = i;
2703 return TRUE;
2704 }
2705 }
2706 SET_ERROR_NUMBER (ERROR_CPREG_ILLEGAL, *oper);
2707 return FALSE;
2708 }
2709
2710 static bfd_boolean
2711 parse_type_cpcreg (char** oper)
2712 {
2713 const char **regs;
2714 int i;
2715 int len;
2716 regs = csky_cp_creg;
2717 for (i = 0; i < (int)(sizeof (csky_cp_creg) / sizeof (char *)); i++)
2718 {
2719 len = strlen (regs[i]);
2720 if (memcmp (*oper, regs[i], len) == 0 && !ISDIGIT (*(*oper + len)))
2721 {
2722 *oper += len;
2723 csky_insn.val[csky_insn.idx++] = i;
2724 return TRUE;
2725 }
2726 }
2727 SET_ERROR_NUMBER (ERROR_CPREG_ILLEGAL, *oper);
2728 return FALSE;
2729 }
2730
2731 static bfd_boolean
2732 parse_type_areg (char** oper)
2733 {
2734 int i = 0;
2735 int len = 0;
2736 i = csky_get_reg_val (*oper, &len);
2737 if (i == -1)
2738 {
2739 SET_ERROR_NUMBER (ERROR_GREG_ILLEGAL, NULL);
2740 return FALSE;
2741 }
2742 *oper += len;
2743 csky_insn.val[csky_insn.idx++] = i;
2744
2745 return TRUE;
2746 }
2747
2748 static bfd_boolean
2749 parse_type_freg (char** oper, int even)
2750 {
2751 int reg;
2752 int len;
2753 reg = csky_get_freg_val (*oper, &len);
2754 if (reg == -1)
2755 {
2756 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
2757 "The fpu register format is not recognized.");
2758 return FALSE;
2759 }
2760 *oper += len;
2761 csky_insn.opcode_end = *oper;
2762 if (even && reg & 0x1)
2763 {
2764 SET_ERROR_NUMBER (ERROR_EXP_EVEN_FREG, NULL);
2765 return FALSE;
2766 }
2767 csky_insn.val[csky_insn.idx++] = reg;
2768 return TRUE;
2769 }
2770
2771 static bfd_boolean
2772 parse_ldst_imm (char **oper, struct csky_opcode_info *op ATTRIBUTE_UNUSED,
2773 struct operand *oprnd)
2774 {
2775 unsigned int mask = oprnd->mask;
2776 int max = 1;
2777 int shift = 0;
2778
2779 shift = oprnd->shift;
2780
2781 while (mask)
2782 {
2783 if (mask & 1)
2784 max <<= 1;
2785 mask >>= 1;
2786 }
2787 max = max << shift;
2788
2789 if (**oper == '\0' || **oper == ')')
2790 {
2791 csky_insn.val[csky_insn.idx++] = 0;
2792 return TRUE;
2793 }
2794
2795 expressionS e;
2796 *oper = parse_exp (*oper, &e);
2797 if (e.X_op != O_constant)
2798 /* Not a constant. */
2799 return FALSE;
2800 else if (e.X_add_number < 0 || e.X_add_number >= max)
2801 {
2802 /* Out of range. */
2803 SET_ERROR_NUMBER (ERROR_IMM_OVERFLOW, NULL);
2804 return FALSE;
2805 }
2806 if ((e.X_add_number % (1 << shift)) != 0)
2807 {
2808 /* Not aligned. */
2809 SET_ERROR_NUMBER (ERROR_OFFSET_UNALIGNED, ((unsigned long)1 << shift));
2810 return FALSE;
2811 }
2812
2813 csky_insn.val[csky_insn.idx++] = e.X_add_number >> shift;
2814
2815 return TRUE;
2816
2817 }
2818
2819 static unsigned int
2820 csky_count_operands (char *str)
2821 {
2822 char *oper_end = str;
2823 unsigned int oprnd_num;
2824 int bracket_cnt = 0;
2825
2826 if (is_end_of_line[(unsigned char) *oper_end])
2827 oprnd_num = 0;
2828 else
2829 oprnd_num = 1;
2830
2831 /* Count how many operands. */
2832 if (oprnd_num)
2833 while (!is_end_of_line[(unsigned char) *oper_end])
2834 {
2835 if (*oper_end == '(' || *oper_end == '<')
2836 {
2837 bracket_cnt++;
2838 oper_end++;
2839 continue;
2840 }
2841 if (*oper_end == ')' || *oper_end == '>')
2842 {
2843 bracket_cnt--;
2844 oper_end++;
2845 continue;
2846 }
2847 if (!bracket_cnt && *oper_end == ',')
2848 oprnd_num++;
2849 oper_end++;
2850 }
2851 return oprnd_num;
2852 }
2853
2854 /* End of the operand parsing helper functions. */
2855
2856 /* Parse the opcode part of an instruction. Fill in the csky_insn
2857 state and return true on success, false otherwise. */
2858
2859 static bfd_boolean
2860 parse_opcode (char *str)
2861 {
2862 #define IS_OPCODE32F(a) (*(a - 2) == '3' && *(a - 1) == '2')
2863 #define IS_OPCODE16F(a) (*(a - 2) == '1' && *(a - 1) == '6')
2864
2865 /* TRUE if this opcode has a suffix, like 'lrw.h'. */
2866 unsigned int has_suffix = FALSE;
2867 unsigned int nlen = 0;
2868 char *opcode_end;
2869 char name[OPCODE_MAX_LEN + 1];
2870 char macro_name[OPCODE_MAX_LEN + 1];
2871
2872 /* Remove space ahead of string. */
2873 while (ISSPACE (*str))
2874 str++;
2875 opcode_end = str;
2876
2877 /* Find the opcode end. */
2878 while (nlen < OPCODE_MAX_LEN
2879 && !is_end_of_line [(unsigned char) *opcode_end]
2880 && *opcode_end != ' ')
2881 {
2882 /* Is csky force 32 or 16 instruction? */
2883 if (IS_CSKY_V2 (mach_flag)
2884 && *opcode_end == '.' && has_suffix == FALSE)
2885 {
2886 has_suffix = TRUE;
2887 if (IS_OPCODE32F (opcode_end))
2888 {
2889 csky_insn.flag_force = INSN_OPCODE32F;
2890 nlen -= 2;
2891 }
2892 else if (IS_OPCODE16F (opcode_end))
2893 {
2894 csky_insn.flag_force = INSN_OPCODE16F;
2895 nlen -= 2;
2896 }
2897 }
2898 name[nlen] = *opcode_end;
2899 nlen++;
2900 opcode_end++;
2901 }
2902
2903 /* Is csky force 32 or 16 instruction? */
2904 if (has_suffix == FALSE)
2905 {
2906 if (IS_CSKY_V2 (mach_flag) && IS_OPCODE32F (opcode_end))
2907 {
2908 csky_insn.flag_force = INSN_OPCODE32F;
2909 nlen -= 2;
2910 }
2911 else if (IS_OPCODE16F (opcode_end))
2912 {
2913 csky_insn.flag_force = INSN_OPCODE16F;
2914 nlen -= 2;
2915 }
2916 }
2917 name[nlen] = '\0';
2918
2919 /* Generate macro_name for finding hash in macro hash_table. */
2920 if (has_suffix == TRUE)
2921 nlen += 2;
2922 strncpy (macro_name, str, nlen);
2923 macro_name[nlen] = '\0';
2924
2925 /* Get csky_insn.opcode_end. */
2926 while (ISSPACE (*opcode_end))
2927 opcode_end++;
2928 csky_insn.opcode_end = opcode_end;
2929
2930 /* Count the operands. */
2931 csky_insn.number = csky_count_operands (opcode_end);
2932
2933 /* Find hash by name in csky_macros_hash and csky_opcodes_hash. */
2934 csky_insn.macro = (struct csky_macro_info *) hash_find (csky_macros_hash,
2935 macro_name);
2936 csky_insn.opcode = (struct csky_opcode *) hash_find (csky_opcodes_hash,
2937 name);
2938
2939 if (csky_insn.macro == NULL && csky_insn.opcode == NULL)
2940 return FALSE;
2941 return TRUE;
2942 }
2943
2944 /* Main dispatch routine to parse operand OPRND for opcode OP from string
2945 *OPER. */
2946
2947 static bfd_boolean
2948 get_operand_value (struct csky_opcode_info *op,
2949 char **oper, struct operand *oprnd)
2950 {
2951 struct soperand *soprnd = NULL;
2952 if (oprnd->mask == HAS_SUB_OPERAND)
2953 {
2954 /* It has sub operand, it must be like:
2955 (oprnd1, oprnd2)
2956 or
2957 <oprnd1, oprnd2>
2958 We will check the format here. */
2959 soprnd = (struct soperand *) oprnd;
2960 char lc = 0;
2961 char rc = 0;
2962 char *s = *oper;
2963 int bracket_cnt = 0;
2964 if (oprnd->type == OPRND_TYPE_BRACKET)
2965 {
2966 lc = '(';
2967 rc = ')';
2968 }
2969 else if (oprnd->type == OPRND_TYPE_ABRACKET)
2970 {
2971 lc = '<';
2972 rc = '>';
2973 }
2974
2975 if (**oper == lc)
2976 {
2977 *oper += 1;
2978 s += 1;
2979 }
2980 else
2981 {
2982 SET_ERROR_NUMBER ((oprnd->type == OPRND_TYPE_BRACKET
2983 ? ERROR_MISSING_LBRACKET
2984 : ERROR_MISSING_LANGLE_BRACKETS), NULL);
2985 return FALSE;
2986 }
2987
2988 /* If the oprnd2 is an immediate, it can not be parsed
2989 that end with ')'/'>'. Modify ')'/'>' to '\0'. */
2990 while ((*s != rc || bracket_cnt != 0) && (*s != '\n' && *s != '\0'))
2991 {
2992 if (*s == lc)
2993 bracket_cnt++;
2994 else if (*s == rc)
2995 bracket_cnt--;
2996 s++;
2997 }
2998
2999 if (*s == rc)
3000 *s = '\0';
3001 else
3002 {
3003 SET_ERROR_NUMBER ((oprnd->type == OPRND_TYPE_BRACKET
3004 ? ERROR_MISSING_RBRACKET
3005 : ERROR_MISSING_RANGLE_BRACKETS), NULL);
3006 return FALSE;
3007 }
3008
3009 if (get_operand_value (op, oper, &soprnd->subs[0]) == FALSE)
3010 {
3011 *s = rc;
3012 return FALSE;
3013 }
3014 if (**oper == ',')
3015 *oper += 1;
3016 if (get_operand_value (op, oper, &soprnd->subs[1]) == FALSE)
3017 {
3018 *s = rc;
3019 return FALSE;
3020 }
3021
3022 *s = rc;
3023 *oper += 1;
3024 return TRUE;
3025 }
3026
3027 switch (oprnd->type)
3028 {
3029 /* TODO: add opcode type here, log errors in the function.
3030 If REGLIST, then j = csky_insn.number - 1.
3031 If there is needed to parse expressions, it will be
3032 handled here. */
3033 case OPRND_TYPE_CTRLREG:
3034 /* some parse. */
3035 return parse_type_ctrlreg (oper);
3036 case OPRND_TYPE_AREG:
3037 return parse_type_areg (oper);
3038 case OPRND_TYPE_FREG:
3039 case OPRND_TYPE_VREG:
3040 return parse_type_freg (oper, 0);
3041 case OPRND_TYPE_FEREG:
3042 return parse_type_freg (oper, 1);
3043 case OPRND_TYPE_CPCREG:
3044 return parse_type_cpcreg (oper);
3045 case OPRND_TYPE_CPREG:
3046 return parse_type_cpreg (oper);
3047 case OPRND_TYPE_CPIDX:
3048 return parse_type_cpidx (oper);
3049 case OPRND_TYPE_GREG0_7:
3050 case OPRND_TYPE_GREG0_15:
3051 {
3052 int len;
3053 long reg;
3054 reg = csky_get_reg_val (*oper, &len);
3055
3056 if (reg == -1)
3057 {
3058 SET_ERROR_NUMBER (ERROR_GREG_ILLEGAL, NULL);
3059 return FALSE;
3060 }
3061 else if ((oprnd->type == OPRND_TYPE_GREG0_7 && reg > 7)
3062 || (oprnd->type == OPRND_TYPE_GREG0_15 && reg > 15))
3063 {
3064 SET_ERROR_NUMBER (ERROR_REG_OVER_RANGE, reg);
3065 return FALSE;
3066 }
3067 *oper += len;
3068 csky_insn.val[csky_insn.idx++] = reg;
3069 return TRUE;
3070 }
3071 case OPRND_TYPE_REGnsplr:
3072 {
3073 int len;
3074 long reg;
3075 reg = csky_get_reg_val (*oper, &len);
3076
3077 if (reg == -1
3078 || (IS_CSKY_V1 (mach_flag)
3079 && (reg == V1_REG_SP || reg == V1_REG_LR)))
3080 {
3081 SET_ERROR_NUMBER (ERROR_REG_OVER_RANGE, reg);
3082 return FALSE;
3083 }
3084 csky_insn.val[csky_insn.idx++] = reg;
3085 *oper += len;
3086 return TRUE;;
3087 }
3088 case OPRND_TYPE_REGnr4_r7:
3089 {
3090 int len;
3091 int reg;
3092 if (**oper == '(')
3093 *oper += 1;
3094 reg = csky_get_reg_val (*oper, &len);
3095 if (reg == -1 || (reg <= 7 && reg >= 4))
3096 return FALSE;
3097
3098 csky_insn.val[csky_insn.idx++] = reg;
3099 *oper += len;
3100
3101 if (**oper == ')')
3102 *oper += 1;
3103 return TRUE;;
3104 }
3105 case OPRND_TYPE_REGr4_r7:
3106 if (memcmp (*oper, "r4-r7", sizeof ("r4-r7") - 1) == 0)
3107 {
3108 *oper += sizeof ("r4-r7") - 1;
3109 csky_insn.val[csky_insn.idx++] = 0;
3110 return TRUE;
3111 }
3112 SET_ERROR_NUMBER (ERROR_OPCODE_ILLEGAL, NULL);
3113 return FALSE;
3114 case OPRND_TYPE_IMM_LDST:
3115 return parse_ldst_imm (oper, op, oprnd);
3116 case OPRND_TYPE_IMM_FLDST:
3117 return parse_ldst_imm (oper, op, oprnd);
3118 case OPRND_TYPE_IMM1b:
3119 return is_imm_over_range (oper, 0, 1, -1);
3120 case OPRND_TYPE_IMM2b:
3121 return is_imm_over_range (oper, 0, 3, -1);
3122 case OPRND_TYPE_IMM2b_JMPIX:
3123 /* ck802j support jmpix16, but not support jmpix32. */
3124 if (IS_CSKY_ARCH_802 (mach_flag)
3125 && (op->opcode & 0xffff0000) != 0)
3126 {
3127 SET_ERROR_NUMBER (ERROR_OPCODE_ILLEGAL, NULL);
3128 return FALSE;
3129 }
3130 *oper = parse_exp (*oper, &csky_insn.e1);
3131 if (csky_insn.e1.X_op == O_constant)
3132 {
3133 csky_insn.opcode_end = *oper;
3134 if (csky_insn.e1.X_add_number & 0x7)
3135 {
3136 SET_ERROR_NUMBER (ERROR_JMPIX_OVER_RANGE, NULL);
3137 return FALSE;
3138 }
3139 csky_insn.val[csky_insn.idx++]
3140 = (csky_insn.e1.X_add_number >> 3) - 2;
3141 }
3142 return TRUE;
3143 case OPRND_TYPE_IMM4b:
3144 return is_imm_over_range (oper, 0, 15, -1);
3145 break;
3146 case OPRND_TYPE_IMM5b:
3147 return is_imm_over_range (oper, 0, 31, -1);
3148 /* This type for "bgeni" in csky v1 ISA. */
3149 case OPRND_TYPE_IMM5b_7_31:
3150 if (is_imm_over_range (oper, 0, 31, -1))
3151 {
3152 int val = csky_insn.val[csky_insn.idx - 1];
3153 /* immediate values of 0 -> 6 translate to movi. */
3154 if (val <= 6)
3155 {
3156 const char *name = "movi";
3157 csky_insn.opcode = (struct csky_opcode *)
3158 hash_find (csky_opcodes_hash, name);
3159 csky_insn.val[csky_insn.idx - 1] = 1 << val;
3160 }
3161 return TRUE;
3162 }
3163 else
3164 return FALSE;
3165
3166 case OPRND_TYPE_IMM5b_1_31:
3167 return is_imm_over_range (oper, 1, 31, -1);
3168 case OPRND_TYPE_IMM5b_POWER:
3169 if (is_imm_over_range (oper, 1, (1u << 31) - 1, 1u << 31))
3170 {
3171 int log;
3172 int val = csky_insn.val[csky_insn.idx - 1];
3173 log = csky_log_2 (val);
3174 csky_insn.val[csky_insn.idx - 1] = log;
3175 return (log == -1 ? FALSE : TRUE);
3176 }
3177 else
3178 return FALSE;
3179
3180 /* This type for "mgeni" in csky v1 ISA. */
3181 case OPRND_TYPE_IMM5b_7_31_POWER:
3182 if (is_imm_over_range (oper, 1, (1u << 31) - 1, 1u << 31))
3183 {
3184 int log;
3185 int val = csky_insn.val[csky_insn.idx - 1];
3186 log = csky_log_2 (val);
3187 /* Immediate values of 0 -> 6 translate to movi. */
3188 if (log <= 6)
3189 {
3190 const char *name = "movi";
3191 csky_insn.opcode = (struct csky_opcode *)
3192 hash_find (csky_opcodes_hash, name);
3193 as_warn (_("translating mgeni to movi"));
3194 }
3195 else
3196 csky_insn.val[csky_insn.idx - 1] = log;
3197 return (log == -1 ? FALSE : TRUE);
3198 }
3199 else
3200 return FALSE;
3201
3202 case OPRND_TYPE_IMM5b_RORI:
3203 {
3204 unsigned max_shift = IS_CSKY_V1 (mach_flag) ? 31 : 32;
3205
3206 if (is_imm_over_range (oper, 1, max_shift, -1))
3207 {
3208 int i = csky_insn.idx - 1;
3209 csky_insn.val[i] = 32 - csky_insn.val[i];
3210 return TRUE;
3211 }
3212 else
3213 return FALSE;
3214 }
3215
3216 case OPRND_TYPE_IMM5b_BMASKI:
3217 /* For csky v1 bmask inst. */
3218
3219 if (!is_imm_over_range (oper, 8, 31, 0))
3220 {
3221 unsigned int mask_val = csky_insn.val[csky_insn.idx - 1];
3222 if (mask_val > 0 && mask_val < 8)
3223 {
3224 const char *op_movi = "movi";
3225 csky_insn.opcode = (struct csky_opcode *)
3226 hash_find (csky_opcodes_hash, op_movi);
3227 if (csky_insn.opcode == NULL)
3228 return FALSE;
3229 csky_insn.val[csky_insn.idx - 1] = (1 << mask_val) - 1;
3230 return TRUE;
3231 }
3232 }
3233 return TRUE;
3234
3235 case OPRND_TYPE_IMM8b_BMASKI:
3236 /* For csky v2 bmask, which will transfer to 16bits movi. */
3237 if (is_imm_over_range (oper, 1, 8, -1))
3238 {
3239 unsigned int mask_val = csky_insn.val[csky_insn.idx - 1];
3240 csky_insn.val[csky_insn.idx - 1] = (1 << mask_val) - 1;
3241 return TRUE;
3242 }
3243 return FALSE;
3244 case OPRND_TYPE_OIMM4b:
3245 return is_oimm_over_range (oper, 1, 16);
3246 case OPRND_TYPE_OIMM5b:
3247 return is_oimm_over_range (oper, 1, 32);
3248 case OPRND_TYPE_OIMM5b_IDLY:
3249 if (is_imm_over_range (oper, 0, 32, -1))
3250 {
3251 /* imm5b for idly n: 0<=n<4, imm5b=3; 4<=n<=32, imm5b=n-1. */
3252 unsigned long imm = csky_insn.val[csky_insn.idx - 1];
3253 if (imm < 4)
3254 {
3255 csky_show_error (WARNING_IDLY, 0, (void *)imm, NULL);
3256 imm = 3;
3257 }
3258 else imm--;
3259 csky_insn.val[csky_insn.idx - 1] = imm;
3260 return TRUE;
3261 }
3262 else
3263 return FALSE;
3264
3265 /* For csky v2 bmask inst. */
3266 case OPRND_TYPE_OIMM5b_BMASKI:
3267 if (!is_oimm_over_range (oper, 17, 32))
3268 {
3269 int mask_val = csky_insn.val[csky_insn.idx - 1];
3270 if (mask_val + 1 == 0)
3271 return TRUE;
3272 if (mask_val > 0 && mask_val < 16)
3273 {
3274 const char *op_movi = "movi";
3275 csky_insn.opcode = (struct csky_opcode *)
3276 hash_find (csky_opcodes_hash, op_movi);
3277 if (csky_insn.opcode == NULL)
3278 return FALSE;
3279 csky_insn.val[csky_insn.idx - 1] = (1 << (mask_val + 1)) - 1;
3280 return TRUE;
3281 }
3282 }
3283 return TRUE;
3284 case OPRND_TYPE_IMM7b:
3285 return is_imm_over_range (oper, 0, 127, -1);
3286 case OPRND_TYPE_IMM8b:
3287 return is_imm_over_range (oper, 0, 255, -1);
3288 case OPRND_TYPE_IMM12b:
3289 return is_imm_over_range (oper, 0, 4095, -1);
3290 case OPRND_TYPE_IMM15b:
3291 return is_imm_over_range (oper, 0, 0xfffff, -1);
3292 case OPRND_TYPE_IMM16b:
3293 return is_imm_over_range (oper, 0, 65535, -1);
3294 case OPRND_TYPE_OIMM16b:
3295 return is_oimm_over_range (oper, 1, 65536);
3296 case OPRND_TYPE_IMM32b:
3297 {
3298 expressionS e;
3299 char *new_oper = parse_exp (*oper, &e);
3300 if (e.X_op == O_constant)
3301 {
3302 *oper = new_oper;
3303 csky_insn.val[csky_insn.idx++] = e.X_add_number;
3304 return TRUE;
3305 }
3306 return FALSE;
3307 }
3308 case OPRND_TYPE_IMM16b_MOVIH:
3309 case OPRND_TYPE_IMM16b_ORI:
3310 {
3311 bfd_reloc_code_real_type r = BFD_RELOC_NONE;
3312 int len;
3313 char *curr = *oper;
3314 char * save = input_line_pointer;
3315 /* get the reloc type, and set "@GOTxxx" as ' ' */
3316 while (**oper != '@' && **oper != '\0')
3317 *oper += 1;
3318 if (**oper != '\0')
3319 {
3320 input_line_pointer = *oper;
3321 lex_got (&r, &len);
3322 while (*(*oper + len + 1) != '\0')
3323 {
3324 **oper = *(*oper + len + 1);
3325 *(*oper + len + 1) = '\0';
3326 *oper += 1;
3327 }
3328 **oper = '\0';
3329 }
3330 input_line_pointer = save;
3331 *oper = parse_exp (curr, &csky_insn.e1);
3332 return TRUE;
3333 }
3334 case OPRND_TYPE_PSR_BITS_LIST:
3335 {
3336 int ret = TRUE;
3337 if (csky_insn.number == 0)
3338 ret = FALSE;
3339 else
3340 {
3341 csky_insn.val[csky_insn.idx] = 0;
3342 if (is_psr_bit (oper) != FALSE)
3343 while (**oper == ',')
3344 {
3345 *oper += 1;
3346 if (is_psr_bit (oper) == FALSE)
3347 {
3348 ret = FALSE;
3349 break;
3350 }
3351 }
3352 else
3353 ret = FALSE;
3354 if (ret == TRUE && IS_CSKY_V1 (mach_flag)
3355 && csky_insn.val[csky_insn.idx] > 8)
3356 ret = FALSE;
3357 }
3358 if (!ret)
3359 SET_ERROR_NUMBER (ERROR_OPERANDS_ILLEGAL, csky_insn.opcode_end);
3360 return ret;
3361 }
3362 case OPRND_TYPE_RM:
3363 {
3364 /* FPU round mode. */
3365 static const char *round_mode[] =
3366 {
3367 "rm_nearest",
3368 "rm_zero",
3369 "rm_posinf",
3370 "rm_neginf",
3371 NULL
3372 };
3373 int i;
3374 for (i = 0; round_mode[i]; i++)
3375 if (strncasecmp (*oper, round_mode[i], strlen (round_mode[i])) == 0)
3376 {
3377 *oper += strlen (round_mode[i]);
3378 csky_insn.val[csky_insn.idx++] = i;
3379 return TRUE;
3380 }
3381 return FALSE;
3382 }
3383
3384 case OPRND_TYPE_REGLIST_COMMA:
3385 case OPRND_TYPE_BRACKET:
3386 /* TODO: using sub operand union. */
3387 case OPRND_TYPE_ABRACKET:
3388 /* TODO: using sub operand union. */
3389 case OPRND_TYPE_REGLIST_DASH:
3390 return is_reglist_legal (oper);
3391 case OPRND_TYPE_FREGLIST_DASH:
3392 return is_freglist_legal (oper);
3393 case OPRND_TYPE_AREG_WITH_BRACKET:
3394 {
3395 int len;
3396 int reg;
3397 if (**oper != '(')
3398 {
3399 SET_ERROR_NUMBER (ERROR_MISSING_LBRACKET, NULL);
3400 return FALSE;
3401 }
3402 *oper += 1;
3403 reg = csky_get_reg_val (*oper, &len);
3404 if (reg == -1)
3405 {
3406 SET_ERROR_NUMBER (ERROR_EXP_GREG, NULL);
3407 return FALSE;
3408 }
3409 *oper += len;
3410 if (**oper != ')')
3411 {
3412 SET_ERROR_NUMBER (ERROR_MISSING_RBRACKET, NULL);
3413 return FALSE;
3414 }
3415 *oper += 1;
3416 csky_insn.val[csky_insn.idx++] = reg;
3417 return TRUE;
3418 }
3419 case OPRND_TYPE_REGsp:
3420 return is_reg_sp (oper);
3421 case OPRND_TYPE_REGbsp:
3422 return is_reg_sp_with_bracket (oper);
3423 /* For jmpi. */
3424 case OPRND_TYPE_OFF8b:
3425 case OPRND_TYPE_OFF16b:
3426 *oper = parse_rt (*oper, 1, &csky_insn.e1, -1);
3427 csky_insn.val[csky_insn.idx++] = 0;
3428 return TRUE;
3429 case OPRND_TYPE_LABEL_WITH_BRACKET:
3430 case OPRND_TYPE_CONSTANT:
3431 case OPRND_TYPE_ELRW_CONSTANT:
3432 if (**oper == '[')
3433 csky_insn.val[csky_insn.idx++] = 0;
3434 else
3435 csky_insn.val[csky_insn.idx++] = NEED_OUTPUT_LITERAL;
3436 *oper = parse_rt (*oper, 0, &csky_insn.e1, -1);
3437 return TRUE;
3438 case OPRND_TYPE_FCONSTANT:
3439 *oper = parse_rtf (*oper, 0, &csky_insn.e1);
3440 return TRUE;
3441
3442 case OPRND_TYPE_SFLOAT:
3443 case OPRND_TYPE_DFLOAT:
3444 /* For fmovis and fmovid, which accept a constant float with
3445 a limited range. */
3446 {
3447 uint64_t dbnum;
3448 int imm4, imm8;
3449
3450 *oper = parse_fexp (*oper, &csky_insn.e1, 1, &dbnum);
3451 if (csky_insn.e1.X_op == O_absent)
3452 return FALSE;
3453
3454 /* Convert the representation from IEEE double to the 13-bit
3455 encoding used internally for fmovis and fmovid. */
3456 imm4 = 11 - (((dbnum & 0x7ff0000000000000ULL) >> 52) - 1023);
3457 /* Check float range. */
3458 if ((dbnum & 0x00000fffffffffffULL) || imm4 < 0 || imm4 > 15)
3459 {
3460 csky_show_error (ERROR_IMM_OVERFLOW, 2, NULL, NULL);
3461 return FALSE;
3462 }
3463 imm8 = (dbnum & 0x000ff00000000000ULL) >> 44;
3464 csky_insn.e1.X_add_number
3465 = (((imm8 & 0xf) << 4)
3466 | ((imm8 & 0xf0) << 17)
3467 | ((imm4 & 0xf) << 16)
3468 | ((dbnum & 0x8000000000000000ULL) >> 43));
3469 return TRUE;
3470 }
3471
3472 /* For grs v2. */
3473 case OPRND_TYPE_IMM_OFF18b:
3474 *oper = parse_exp (*oper, &csky_insn.e1);
3475 return TRUE;
3476
3477 case OPRND_TYPE_BLOOP_OFF4b:
3478 *oper = parse_exp (*oper, &csky_insn.e2);
3479 if (csky_insn.e2.X_op == O_symbol)
3480 {
3481 csky_insn.opcode_end = *oper;
3482 return TRUE;
3483 }
3484 else
3485 return FALSE;
3486
3487 case OPRND_TYPE_BLOOP_OFF12b:
3488 case OPRND_TYPE_OFF10b:
3489 case OPRND_TYPE_OFF11b:
3490 case OPRND_TYPE_OFF16b_LSL1:
3491 case OPRND_TYPE_OFF26b:
3492 *oper = parse_exp (*oper, &csky_insn.e1);
3493 if (csky_insn.e1.X_op == O_symbol)
3494 {
3495 csky_insn.opcode_end = *oper;
3496 return TRUE;
3497 }
3498 else
3499 return FALSE;
3500 /* For xtrb0(1)(2)(3) and div in csky v1 ISA. */
3501 case OPRND_TYPE_REG_r1a:
3502 {
3503 int reg = 0;
3504 int len = 0;
3505 reg = csky_get_reg_val (*oper, &len);
3506 if (reg == -1)
3507 {
3508 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
3509 "The first operand must be register r1.");
3510 return FALSE;
3511 }
3512 if (reg != 1)
3513 mov_r1_after = TRUE;
3514 *oper += len;
3515 csky_insn.opcode_end = *oper;
3516 csky_insn.val[csky_insn.idx++] = reg;
3517 return TRUE;
3518 }
3519 case OPRND_TYPE_REG_r1b:
3520 {
3521 int reg = 0;
3522 int len = 0;
3523 reg = csky_get_reg_val (*oper, &len);
3524 if (reg == -1)
3525 {
3526 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
3527 "The second operand must be register r1.");
3528 return FALSE;
3529 }
3530 if (reg != 1)
3531 {
3532 unsigned int mov_insn = CSKYV1_INST_MOV_R1_RX;
3533 mov_insn |= reg << 4;
3534 mov_r1_before = TRUE;
3535 csky_insn.output = frag_more (2);
3536 dwarf2_emit_insn (0);
3537 md_number_to_chars (csky_insn.output, mov_insn, 2);
3538 }
3539 *oper += len;
3540 csky_insn.opcode_end = *oper;
3541 csky_insn.val[csky_insn.idx++] = reg;
3542 return TRUE;
3543 }
3544 case OPRND_TYPE_DUMMY_REG:
3545 {
3546 int reg = 0;
3547 int len = 0;
3548 reg = csky_get_reg_val (*oper, &len);
3549 if (reg == -1)
3550 {
3551 SET_ERROR_NUMBER (ERROR_GREG_ILLEGAL, NULL);
3552 return FALSE;
3553 }
3554 if (reg != csky_insn.val[0])
3555 {
3556 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
3557 "The second register must be the same as the first.");
3558 return FALSE;
3559 }
3560 *oper += len;
3561 csky_insn.opcode_end = *oper;
3562 csky_insn.val[csky_insn.idx++] = reg;
3563 return TRUE;
3564 }
3565 case OPRND_TYPE_2IN1_DUMMY:
3566 {
3567 int reg = 0;
3568 int len = 0;
3569 int max = 0;
3570 int min = 0;
3571 reg = csky_get_reg_val (*oper, &len);
3572 if (reg == -1)
3573 {
3574 SET_ERROR_NUMBER (ERROR_GREG_ILLEGAL, NULL);
3575 return FALSE;
3576 }
3577 /* dummy reg's real type should be same with first operand. */
3578 if (op->oprnd.oprnds[0].type == OPRND_TYPE_GREG0_15)
3579 max = 15;
3580 else if (op->oprnd.oprnds[0].type == OPRND_TYPE_GREG0_7)
3581 max = 7;
3582 else
3583 return FALSE;
3584 if (reg < min || reg > max)
3585 return FALSE;
3586 csky_insn.val[csky_insn.idx++] = reg;
3587 /* if it is the last operands. */
3588 if (csky_insn.idx > 2)
3589 {
3590 /* For "insn rz, rx, ry", if rx or ry is equal to rz,
3591 we can output the insn like "insn rz, rx". */
3592 if (csky_insn.val[0] == csky_insn.val[1])
3593 csky_insn.val[1] = 0;
3594 else if (csky_insn.val[0] == csky_insn.val[2])
3595 csky_insn.val[2] = 0;
3596 else
3597 return FALSE;
3598 }
3599 *oper += len;
3600 csky_insn.opcode_end = *oper;
3601 return TRUE;
3602 }
3603 case OPRND_TYPE_DUP_GREG0_7:
3604 case OPRND_TYPE_DUP_GREG0_15:
3605 case OPRND_TYPE_DUP_AREG:
3606 {
3607 long reg = 0;
3608 int len = 0;
3609 long max_reg;
3610 unsigned int shift_num;
3611 if (oprnd->type == OPRND_TYPE_DUP_GREG0_7)
3612 {
3613 max_reg = 7;
3614 shift_num = 3;
3615 }
3616 else if (oprnd->type == OPRND_TYPE_DUP_GREG0_15)
3617 {
3618 max_reg = 15;
3619 shift_num = 4;
3620 }
3621 else
3622 {
3623 max_reg = 31;
3624 shift_num = 5;
3625 }
3626 reg = csky_get_reg_val (*oper, &len);
3627 if (reg == -1)
3628 {
3629 if (max_reg == 31)
3630 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
3631 "The register must be r0-r31");
3632 else
3633 SET_ERROR_NUMBER (ERROR_REG_FORMAT,
3634 "The register must be r0-r15");
3635 return FALSE;
3636 }
3637 if (reg > max_reg)
3638 {
3639 SET_ERROR_NUMBER (ERROR_REG_OVER_RANGE, reg);
3640 return FALSE;
3641 }
3642 reg |= reg << shift_num;
3643 *oper += len;
3644 csky_insn.opcode_end = *oper;
3645 csky_insn.val[csky_insn.idx++] = reg;
3646 return TRUE;
3647 }
3648 case OPRND_TYPE_CONST1:
3649 *oper = parse_exp (*oper, &csky_insn.e1);
3650 if (csky_insn.e1.X_op == O_constant)
3651 {
3652 csky_insn.opcode_end = *oper;
3653 if (csky_insn.e1.X_add_number != 1)
3654 return FALSE;
3655 csky_insn.val[csky_insn.idx++] = 1;
3656 return TRUE;
3657 }
3658 return FALSE;
3659 case OPRND_TYPE_UNCOND10b:
3660 case OPRND_TYPE_UNCOND16b:
3661 *oper = parse_exp (*oper, &csky_insn.e1);
3662 if (csky_insn.e1.X_op == O_constant)
3663 return FALSE;
3664 input_line_pointer = *oper;
3665 csky_insn.opcode_end = *oper;
3666 csky_insn.relax.max = UNCD_DISP16_LEN;
3667 csky_insn.relax.var = UNCD_DISP10_LEN;
3668 csky_insn.relax.subtype = UNCD_DISP10;
3669 csky_insn.val[csky_insn.idx++] = 0;
3670 return TRUE;
3671 case OPRND_TYPE_COND10b:
3672 case OPRND_TYPE_COND16b:
3673 *oper = parse_exp (*oper, &csky_insn.e1);
3674 if (csky_insn.e1.X_op == O_constant)
3675 return FALSE;
3676 input_line_pointer = *oper;
3677 csky_insn.opcode_end = *oper;
3678 /* CK801 doesn't have 32-bit bt/bf insns; relax to a short
3679 jump around a 32-bit unconditional branch instead. */
3680 if (IS_CSKY_ARCH_801 (mach_flag))
3681 {
3682 csky_insn.relax.max = SCOND_DISP16_LEN;
3683 csky_insn.relax.var = SCOND_DISP10_LEN;
3684 csky_insn.relax.subtype = SCOND_DISP10;
3685 }
3686 else
3687 {
3688 csky_insn.relax.max = COND_DISP16_LEN;
3689 csky_insn.relax.var = COND_DISP10_LEN;
3690 csky_insn.relax.subtype = COND_DISP10;
3691 }
3692 csky_insn.val[csky_insn.idx++] = 0;
3693 return TRUE;
3694 case OPRND_TYPE_JCOMPZ:
3695 *oper = parse_exp (*oper, &csky_insn.e1);
3696 if (csky_insn.e1.X_op == O_constant)
3697 return FALSE;
3698 input_line_pointer = *oper;
3699 csky_insn.opcode_end = *oper;
3700 csky_insn.relax.max = JCOMPZ_DISP32_LEN;
3701 csky_insn.relax.var = JCOMPZ_DISP16_LEN;
3702 csky_insn.relax.subtype = JCOMPZ_DISP16;
3703 csky_insn.max = JCOMPZ_DISP32_LEN;
3704 csky_insn.val[csky_insn.idx++] = 0;
3705 return TRUE;
3706 case OPRND_TYPE_JBTF:
3707 *oper = parse_exp (*oper, &csky_insn.e1);
3708 input_line_pointer = *oper;
3709 csky_insn.opcode_end = *oper;
3710 csky_insn.relax.max = csky_relax_table[C (COND_JUMP_S, DISP32)].rlx_length;
3711 csky_insn.relax.var = csky_relax_table[C (COND_JUMP_S, DISP12)].rlx_length;
3712 csky_insn.relax.subtype = C (COND_JUMP_S, 0);
3713 csky_insn.val[csky_insn.idx++] = 0;
3714 csky_insn.max = C32_LEN_S + 2;
3715 return TRUE;
3716 case OPRND_TYPE_JBR:
3717 *oper = parse_exp (*oper, &csky_insn.e1);
3718 input_line_pointer = *oper;
3719 csky_insn.opcode_end = *oper;
3720 csky_insn.relax.max = csky_relax_table[C (UNCD_JUMP_S, DISP32)].rlx_length;
3721 csky_insn.relax.var = csky_relax_table[C (UNCD_JUMP_S, DISP12)].rlx_length;
3722 csky_insn.relax.subtype = C (UNCD_JUMP_S, 0);
3723 csky_insn.val[csky_insn.idx++] = 0;
3724 csky_insn.max = U32_LEN_S + 2;
3725 return TRUE;
3726 case OPRND_TYPE_JBSR:
3727 if (do_force2bsr)
3728 *oper = parse_exp (*oper, &csky_insn.e1);
3729 else
3730 *oper = parse_rt (*oper, 1, &csky_insn.e1, -1);
3731 input_line_pointer = *oper;
3732 csky_insn.opcode_end = *oper;
3733 csky_insn.val[csky_insn.idx++] = 0;
3734 return TRUE;
3735 case OPRND_TYPE_REGLIST_DASH_COMMA:
3736 return is_reglist_dash_comma_legal (oper, oprnd);
3737
3738 case OPRND_TYPE_MSB2SIZE:
3739 case OPRND_TYPE_LSB2SIZE:
3740 {
3741 expressionS e;
3742 char *new_oper = parse_exp (*oper, &e);
3743 if (e.X_op == O_constant)
3744 {
3745 *oper = new_oper;
3746 if (e.X_add_number > 31)
3747 {
3748 SET_ERROR_NUMBER (ERROR_IMM_OVERFLOW, NULL);
3749 return FALSE;
3750 }
3751 csky_insn.val[csky_insn.idx++] = e.X_add_number;
3752 if (oprnd->type == OPRND_TYPE_LSB2SIZE)
3753 {
3754 if (csky_insn.val[csky_insn.idx - 1] > csky_insn.val[csky_insn.idx - 2])
3755 {
3756 SET_ERROR_NUMBER (ERROR_IMM_OVERFLOW, NULL);
3757 return FALSE;
3758 }
3759 csky_insn.val[csky_insn.idx - 2] -= e.X_add_number;
3760 }
3761 return TRUE;
3762 }
3763 return FALSE;
3764 }
3765 case OPRND_TYPE_AREG_WITH_LSHIFT:
3766 return is_reg_lshift_illegal (oper, 0);
3767 case OPRND_TYPE_AREG_WITH_LSHIFT_FPU:
3768 return is_reg_lshift_illegal (oper, 1);
3769 case OPRND_TYPE_FREG_WITH_INDEX:
3770 if (parse_type_freg (oper, 0))
3771 {
3772 if (**oper == '[')
3773 {
3774 (*oper)++;
3775 if (is_imm_over_range (oper, 0, 0xf, -1))
3776 {
3777 if (**oper == ']')
3778 {
3779 unsigned int idx = --csky_insn.idx;
3780 unsigned int val = csky_insn.val[idx];
3781 (*oper)++;
3782 csky_insn.val[idx - 1] |= val << 4;
3783 return TRUE;
3784 }
3785 else
3786 SET_ERROR_NUMBER (ERROR_MISSING_RSQUARE_BRACKETS, NULL);
3787 }
3788 }
3789 else
3790 SET_ERROR_NUMBER (ERROR_MISSING_LSQUARE_BRACKETS, NULL);
3791 }
3792 return FALSE;
3793
3794 default:
3795 break;
3796 /* error code. */
3797 }
3798 return FALSE;
3799 }
3800
3801 /* Subroutine of parse_operands. */
3802
3803 static bfd_boolean
3804 parse_operands_op (char *str, struct csky_opcode_info *op)
3805 {
3806 int i;
3807 int j;
3808 char *oper = str;
3809 int flag_pass;
3810
3811 for (i = 0; i < OP_TABLE_NUM && op[i].operand_num != -2; i++)
3812 {
3813 flag_pass = TRUE;
3814 csky_insn.idx = 0;
3815 oper = str;
3816 /* if operand_num = -1, it is a insn with a REGLIST type operand.i. */
3817 if (!(op[i].operand_num == csky_insn.number
3818 || (op[i].operand_num == -1 && csky_insn.number != 0)))
3819 {
3820 /* The smaller err_num is more serious. */
3821 SET_ERROR_NUMBER (ERROR_OPERANDS_NUMBER, op[i].operand_num);
3822 flag_pass = FALSE;
3823 continue;
3824 }
3825
3826 for (j = 0; j < csky_insn.number; j++)
3827 {
3828 while (ISSPACE (*oper))
3829 oper++;
3830 flag_pass = get_operand_value (&op[i], &oper,
3831 &op[i].oprnd.oprnds[j]);
3832 if (flag_pass == FALSE)
3833 break;
3834 while (ISSPACE (*oper))
3835 oper++;
3836 /* Skip the ','. */
3837 if (j < csky_insn.number - 1 && op[i].operand_num != -1)
3838 {
3839 if (*oper == ',')
3840 oper++;
3841 else
3842 {
3843 SET_ERROR_NUMBER (ERROR_MISSING_COMMA, NULL);
3844 flag_pass = FALSE;
3845 break;
3846 }
3847 }
3848 else if (!is_end_of_line[(unsigned char) *oper])
3849 {
3850 SET_ERROR_NUMBER (ERROR_BAD_END, NULL);
3851 flag_pass = FALSE;
3852 break;
3853 }
3854 else
3855 break;
3856 }
3857 /* Parse operands in one table end. */
3858
3859 if (flag_pass == TRUE)
3860 {
3861 /* Parse operands success, set opcode_idx. */
3862 csky_insn.opcode_idx = i;
3863 return TRUE;
3864 }
3865 else
3866 error_state.opnum = j + 1;
3867 }
3868 /* Parse operands in ALL tables end. */
3869 return FALSE;
3870 }
3871
3872 /* Parse the operands according to operand type. */
3873
3874 static bfd_boolean
3875 parse_operands (char *str)
3876 {
3877 char *oper = str;
3878
3879 /* Parse operands according to flag_force. */
3880 if (csky_insn.flag_force == INSN_OPCODE16F
3881 && (csky_insn.opcode->isa_flag16 & isa_flag) != 0)
3882 {
3883 if (parse_operands_op (oper, csky_insn.opcode->op16) == TRUE)
3884 {
3885 csky_insn.isize = 2;
3886 return TRUE;
3887 }
3888 return FALSE;
3889 }
3890 else if (csky_insn.flag_force == INSN_OPCODE32F
3891 && (csky_insn.opcode->isa_flag32 & isa_flag) != 0)
3892 {
3893 if (parse_operands_op (oper, csky_insn.opcode->op32) == TRUE)
3894 {
3895 csky_insn.isize = 4;
3896 return TRUE;
3897 }
3898 return FALSE;
3899 }
3900 else
3901 {
3902 if ((csky_insn.opcode->isa_flag16 & isa_flag) != 0
3903 && parse_operands_op (oper, csky_insn.opcode->op16) == TRUE)
3904 {
3905 csky_insn.isize = 2;
3906 return TRUE;
3907 }
3908 if ((csky_insn.opcode->isa_flag32 & isa_flag) != 0
3909 && parse_operands_op (oper, csky_insn.opcode->op32) == TRUE)
3910 {
3911 csky_insn.isize = 4;
3912 return TRUE;
3913 }
3914 return FALSE;
3915 }
3916 }
3917
3918 static bfd_boolean
3919 csky_generate_frags (void)
3920 {
3921 /* frag more relax reloc. */
3922 if (csky_insn.flag_force == INSN_OPCODE16F
3923 || !IS_SUPPORT_OPCODE32 (csky_insn.opcode))
3924 {
3925 csky_insn.output = frag_more (csky_insn.isize);
3926 if (csky_insn.opcode->reloc16)
3927 {
3928 /* 16 bits opcode force, should generate fixup. */
3929 reloc_howto_type *howto;
3930 howto = bfd_reloc_type_lookup (stdoutput,
3931 csky_insn.opcode->reloc16);
3932 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
3933 2, &csky_insn.e1, howto->pc_relative,
3934 csky_insn.opcode->reloc16);
3935 }
3936 }
3937 else if (csky_insn.flag_force == INSN_OPCODE32F)
3938 {
3939 csky_insn.output = frag_more (csky_insn.isize);
3940 if (csky_insn.opcode->reloc32)
3941 {
3942 reloc_howto_type *howto;
3943 howto = bfd_reloc_type_lookup (stdoutput,
3944 csky_insn.opcode->reloc32);
3945 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
3946 4, &csky_insn.e1, howto->pc_relative,
3947 csky_insn.opcode->reloc32);
3948 }
3949 }
3950 else if (csky_insn.opcode->relax)
3951 /* Generate the relax information. */
3952 csky_insn.output = frag_var (rs_machine_dependent,
3953 csky_insn.relax.max,
3954 csky_insn.relax.var,
3955 csky_insn.relax.subtype,
3956 csky_insn.e1.X_add_symbol,
3957 csky_insn.e1.X_add_number, 0);
3958 else
3959 {
3960 csky_insn.output = frag_more (csky_insn.isize);
3961 if (csky_insn.opcode->reloc16 && csky_insn.isize == 2)
3962 {
3963 reloc_howto_type *howto;
3964 howto = bfd_reloc_type_lookup (stdoutput,
3965 csky_insn.opcode->reloc16);
3966 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
3967 2, &csky_insn.e1, howto->pc_relative,
3968 csky_insn.opcode->reloc16);
3969 }
3970 else if (csky_insn.opcode->reloc32 && csky_insn.isize == 4)
3971 {
3972 reloc_howto_type *howto;
3973 howto = bfd_reloc_type_lookup (stdoutput,
3974 csky_insn.opcode->reloc32);
3975 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
3976 4, &csky_insn.e1, howto->pc_relative,
3977 csky_insn.opcode->reloc32);
3978 }
3979 }
3980 return TRUE;
3981 }
3982
3983 /* Return the bits of VAL shifted according to MASK. The bits of MASK
3984 need not be contiguous. */
3985
3986 static int
3987 generate_masked_value (int mask, int val)
3988 {
3989 int ret = 0;
3990 int bit;
3991
3992 for (bit = 1; mask; bit = bit << 1)
3993 if (mask & bit)
3994 {
3995 if (val & 0x1)
3996 ret |= bit;
3997 val = val >> 1;
3998 mask &= ~bit;
3999 }
4000 return ret;
4001 }
4002
4003 /* Return the result of masking operand number OPRND_IDX into the
4004 instruction word according to the information in OPRND. */
4005
4006 static int
4007 generate_masked_operand (struct operand *oprnd, int *oprnd_idx)
4008 {
4009 struct soperand *soprnd = NULL;
4010 int mask;
4011 int val;
4012 if ((unsigned int)oprnd->mask == HAS_SUB_OPERAND)
4013 {
4014 soprnd = (struct soperand *) oprnd;
4015 generate_masked_operand (&soprnd->subs[0], oprnd_idx);
4016 generate_masked_operand (&soprnd->subs[1], oprnd_idx);
4017 return 0;
4018 }
4019 mask = oprnd->mask;
4020 val = csky_insn.val[*oprnd_idx];
4021 (*oprnd_idx)++;
4022 val = generate_masked_value (mask, val);
4023 csky_insn.inst |= val;
4024
4025 return 0;
4026 }
4027
4028 static bfd_boolean
4029 csky_generate_insn (void)
4030 {
4031 int i = 0;
4032 struct csky_opcode_info *opinfo = NULL;
4033
4034 if (csky_insn.isize == 4)
4035 opinfo = &csky_insn.opcode->op32[csky_insn.opcode_idx];
4036 else if (csky_insn.isize == 2)
4037 opinfo = &csky_insn.opcode->op16[csky_insn.opcode_idx];
4038
4039 int sidx = 0;
4040 csky_insn.inst = opinfo->opcode;
4041 if (opinfo->operand_num == -1)
4042 {
4043 generate_masked_operand (&opinfo->oprnd.oprnds[i], &sidx);
4044 return 0;
4045 }
4046 else
4047 for (i = 0; i < opinfo->operand_num; i++)
4048 generate_masked_operand (&opinfo->oprnd.oprnds[i], &sidx);
4049 return 0;
4050 }
4051
4052 /* Main entry point for assembling a single instruction. */
4053
4054 void
4055 md_assemble (char *str)
4056 {
4057 bfd_boolean must_check_literals = TRUE;
4058 csky_insn.isize = 0;
4059 csky_insn.idx = 0;
4060 csky_insn.max = 0;
4061 csky_insn.flag_force = INSN_OPCODE;
4062 csky_insn.macro = NULL;
4063 csky_insn.opcode = NULL;
4064 memset (csky_insn.val, 0, sizeof (int) * MAX_OPRND_NUM);
4065 /* Initialize err_num. */
4066 error_state.err_num = ERROR_NONE;
4067 mov_r1_before = FALSE;
4068 mov_r1_after = FALSE;
4069
4070 mapping_state (MAP_TEXT);
4071 /* Tie dwarf2 debug info to every insn if set option --gdwarf2. */
4072 dwarf2_emit_insn (0);
4073 while (ISSPACE (* str))
4074 str++;
4075 /* Get opcode from str. */
4076 if (parse_opcode (str) == FALSE)
4077 {
4078 csky_show_error (ERROR_OPCODE_ILLEGAL, 0, NULL, NULL);
4079 return;
4080 }
4081
4082 /* If it is a macro instruction, handle it. */
4083 if (csky_insn.macro != NULL)
4084 {
4085 if (csky_insn.number == csky_insn.macro->oprnd_num)
4086 {
4087 csky_insn.macro->handle_func ();
4088 return;
4089 }
4090 else if (error_state.err_num > ERROR_OPERANDS_NUMBER)
4091 SET_ERROR_NUMBER (ERROR_OPERANDS_NUMBER, csky_insn.macro->oprnd_num);
4092 }
4093
4094 if (csky_insn.opcode == NULL)
4095 {
4096 SET_ERROR_NUMBER (ERROR_OPCODE_ILLEGAL, NULL);
4097 csky_show_error (error_state.err_num, error_state.opnum,
4098 (void *)error_state.arg1, (void *)error_state.arg1);
4099 return;
4100 }
4101
4102 /* Parse the operands according to operand type. */
4103 if (parse_operands (csky_insn.opcode_end) == FALSE)
4104 {
4105 csky_show_error (error_state.err_num, error_state.opnum,
4106 (void *)error_state.arg1, (void *)error_state.arg1);
4107 return;
4108 }
4109
4110 /* if this insn has work in opcode table, then do it. */
4111 if (csky_insn.opcode->work != NULL)
4112 must_check_literals = csky_insn.opcode->work ();
4113 else
4114 {
4115 /* Generate relax or reloc if necessary. */
4116 csky_generate_frags ();
4117 /* Generate the insn by mask. */
4118 csky_generate_insn ();
4119 /* Write inst to frag. */
4120 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
4121 }
4122
4123 /* Adjust for xtrb0/xtrb1/xtrb2/xtrb3/divs/divu in csky v1 ISA. */
4124 if (mov_r1_after == TRUE)
4125 {
4126 unsigned int mov_insn = CSKYV1_INST_MOV_RX_R1;
4127 mov_insn |= csky_insn.val[0];
4128 mov_r1_before = TRUE;
4129 csky_insn.output = frag_more (2);
4130 dwarf2_emit_insn (0);
4131 md_number_to_chars (csky_insn.output, mov_insn, 2);
4132 csky_insn.isize += 2;
4133 }
4134 if (mov_r1_before == TRUE)
4135 csky_insn.isize += 2;
4136
4137 /* Check literal. */
4138 if (must_check_literals)
4139 {
4140 if (csky_insn.max == 0)
4141 check_literals (csky_insn.opcode->transfer, csky_insn.isize);
4142 else
4143 check_literals (csky_insn.opcode->transfer, csky_insn.max);
4144 }
4145
4146 insn_reloc = BFD_RELOC_NONE;
4147 }
4148
4149 /* Attempt to handle option with value C, returning non-zero on success. */
4150
4151 int
4152 md_parse_option (int c, const char *arg)
4153 {
4154 switch (c)
4155 {
4156 case 0:
4157 break;
4158 case OPTION_MARCH:
4159 parse_arch (arg);
4160 break;
4161 case OPTION_MCPU:
4162 parse_cpu (arg);
4163 break;
4164 default:
4165 return 0;
4166 }
4167 return 1;
4168 }
4169
4170 /* Convert a machine dependent frag. */
4171 #define PAD_LITERAL_LENGTH 6
4172 #define opposite_of_stored_comp(insn) (insn ^ 0x04000000)
4173 #define opposite_of_stored_compz(insn) (insn ^ 0x00200000)
4174 #define make_insn(total_length, opcode, operand, operand_length) \
4175 do { \
4176 if (total_length > 0) \
4177 { \
4178 csky_write_insn (buf, \
4179 opcode | (operand & ((1 << operand_length) - 1)), \
4180 total_length); \
4181 buf += total_length; \
4182 fragp->fr_fix += total_length; \
4183 } \
4184 } while (0)
4185
4186 #define make_literal(fragp, literal_offset) \
4187 do { \
4188 make_insn (literal_offset, PAD_FILL_CONTENT, 0, 0); \
4189 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, \
4190 fragp->fr_offset, 0, BFD_RELOC_CKCORE_ADDR32); \
4191 make_insn (4, 0, 0, 0); \
4192 make_insn (2 - literal_offset, PAD_FILL_CONTENT, 0, 0); \
4193 } while (0)
4194
4195 void
4196 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
4197 {
4198 offsetT disp;
4199 char *buf = fragp->fr_fix + &fragp->fr_literal[0];
4200
4201 gas_assert (fragp->fr_symbol);
4202 if (IS_EXTERNAL_SYM (fragp->fr_symbol, asec))
4203 disp = 0;
4204 else
4205 disp = (S_GET_VALUE (fragp->fr_symbol)
4206 + fragp->fr_offset
4207 - fragp->fr_address
4208 - fragp->fr_fix);
4209
4210 switch (fragp->fr_subtype)
4211 {
4212 /* generate new insn. */
4213 case C (COND_JUMP, DISP12):
4214 case C (UNCD_JUMP, DISP12):
4215 case C (COND_JUMP_PIC, DISP12):
4216 case C (UNCD_JUMP_PIC, DISP12):
4217 {
4218 #define CSKY_V1_B_MASK 0xf8
4219 unsigned char t0;
4220 disp -= 2;
4221 if (disp & 1)
4222 {
4223 /* Error. odd displacement at %x, next_inst-2. */
4224 ;
4225 }
4226 disp >>= 1;
4227
4228 if (!target_big_endian)
4229 {
4230 t0 = buf[1] & CSKY_V1_B_MASK;
4231 md_number_to_chars (buf, disp, 2);
4232 buf[1] = (buf[1] & ~CSKY_V1_B_MASK) | t0;
4233 }
4234 else
4235 {
4236 t0 = buf[0] & CSKY_V1_B_MASK;
4237 md_number_to_chars (buf, disp, 2);
4238 buf[0] = (buf[0] & ~CSKY_V1_B_MASK) | t0;
4239 }
4240 fragp->fr_fix += 2;
4241 break;
4242 }
4243 case C (COND_JUMP, DISP32):
4244 case C (COND_JUMP, UNDEF_WORD_DISP):
4245 {
4246 /* A conditional branch wont fit into 12 bits:
4247 b!cond 1f
4248 jmpi 0f
4249 .align 2
4250 0: .long disp
4251 1:
4252 */
4253 int first_inst = fragp->fr_fix + fragp->fr_address;
4254 int is_unaligned = (first_inst & 3);
4255
4256 if (!target_big_endian)
4257 {
4258 /* b!cond instruction. */
4259 buf[1] ^= 0x08;
4260 /* jmpi instruction. */
4261 buf[2] = CSKYV1_INST_JMPI & 0xff;
4262 buf[3] = CSKYV1_INST_JMPI >> 8;
4263 }
4264 else
4265 {
4266 /* b!cond instruction. */
4267 buf[0] ^= 0x08;
4268 /* jmpi instruction. */
4269 buf[2] = CSKYV1_INST_JMPI >> 8;
4270 buf[3] = CSKYV1_INST_JMPI & 0xff;
4271 }
4272
4273 if (is_unaligned)
4274 {
4275 if (!target_big_endian)
4276 {
4277 /* bt/bf: jump to pc + 2 + (4 << 1). */
4278 buf[0] = 4;
4279 /* jmpi: jump to MEM (pc + 2 + (1 << 2)). */
4280 buf[2] = 1;
4281 }
4282 else
4283 {
4284 /* bt/bf: jump to pc + 2 + (4 << 1). */
4285 buf[1] = 4;
4286 /* jmpi: jump to MEM (pc + 2 + (1 << 2)). */
4287 buf[3] = 1;
4288 }
4289 /* Aligned 4 bytes. */
4290 buf[4] = 0;
4291 buf[5] = 0;
4292 /* .long */
4293 buf[6] = 0;
4294 buf[7] = 0;
4295 buf[8] = 0;
4296 buf[9] = 0;
4297
4298 /* Make reloc for the long disp. */
4299 fix_new (fragp, fragp->fr_fix + 6, 4,
4300 fragp->fr_symbol, fragp->fr_offset, 0, BFD_RELOC_32);
4301 fragp->fr_fix += C32_LEN;
4302 }
4303 else
4304 {
4305 if (!target_big_endian)
4306 {
4307 /* bt/bf: jump to pc + 2 + (3 << 1). */
4308 buf[0] = 3;
4309 /* jmpi: jump to MEM (pc + 2 + (0 << 2)). */
4310 buf[2] = 0;
4311 }
4312 else
4313 {
4314 /* bt/bf: jump to pc + 2 + (3 << 1). */
4315 buf[1] = 3;
4316 /* jmpi: jump to MEM (pc + 2 + (0 << 2)). */
4317 buf[3] = 0;
4318 }
4319 /* .long */
4320 buf[4] = 0;
4321 buf[5] = 0;
4322 buf[6] = 0;
4323 buf[7] = 0;
4324
4325 /* Make reloc for the long disp. */
4326 fix_new (fragp, fragp->fr_fix + 4, 4,
4327 fragp->fr_symbol, fragp->fr_offset, 0, BFD_RELOC_32);
4328 fragp->fr_fix += C32_LEN;
4329
4330 /* Frag is actually shorter (see the other side of this ifdef)
4331 but gas isn't prepared for that. We have to re-adjust
4332 the branch displacement so that it goes beyond the
4333 full length of the fragment, not just what we actually
4334 filled in. */
4335 if (!target_big_endian)
4336 buf[0] = 4;
4337 else
4338 buf[1] = 4;
4339 }
4340 }
4341 break;
4342
4343 case C (COND_JUMP_PIC, DISP32):
4344 case C (COND_JUMP_PIC, UNDEF_WORD_DISP):
4345 {
4346 #define BYTE_1(a) (target_big_endian ? ((a) & 0xff) : ((a) >> 8))
4347 #define BYTE_0(a) (target_big_endian ? ((a) >> 8) : ((a) & 0xff))
4348 /* b!cond 1f
4349 subi sp, 8
4350 stw r15, (sp, 0)
4351 bsr .L0
4352 .L0:
4353 lrw r1, 0f
4354 add r1, r15
4355 addi sp, 8
4356 jmp r1
4357 .align 2
4358 0: .long (tar_addr - pc)
4359 1:
4360 */
4361 int first_inst = fragp->fr_fix + fragp->fr_address;
4362 int is_unaligned = (first_inst & 3);
4363 disp -= 8;
4364 /* Toggle T/F bit. */
4365 if (! target_big_endian)
4366 buf[1] ^= 0x08;
4367 else
4368 buf[0] ^= 0x08;
4369 buf[2] = BYTE_0 (CSKYV1_INST_SUBI | (7 << 4)); /* subi r0, 8. */
4370 buf[3] = BYTE_1 (CSKYV1_INST_SUBI | (7 << 4));
4371 buf[4] = BYTE_0 (CSKYV1_INST_STW | (15 << 8)); /* stw r15, r0. */
4372 buf[5] = BYTE_1 (CSKYV1_INST_STW | (15 << 8));
4373 buf[6] = BYTE_0 (CSKYV1_INST_BSR); /* bsr pc + 2. */
4374 buf[7] = BYTE_1 (CSKYV1_INST_BSR);
4375 buf[8] = BYTE_0 (CSKYV1_INST_LRW | (1 << 8)); /* lrw r1, (tar_addr - pc). */
4376 buf[9] = BYTE_1 (CSKYV1_INST_LRW | (1 << 8));
4377 buf[10] = BYTE_0 (CSKYV1_INST_ADDU | (15 << 4) | 1); /* add r1, r15. */
4378 buf[11] = BYTE_1 (CSKYV1_INST_ADDU | (15 << 4) | 1);
4379 buf[12] = BYTE_0 (CSKYV1_INST_LDW | (15 << 8)); /* ldw r15, r0. */
4380 buf[13] = BYTE_1 (CSKYV1_INST_LDW | (15 << 8));
4381 buf[14] = BYTE_0 (CSKYV1_INST_ADDI | (7 << 4)); /* addi r0, 8. */
4382 buf[15] = BYTE_1 (CSKYV1_INST_ADDI | (7 << 4));
4383 buf[16] = BYTE_0 (CSKYV1_INST_JMP | 1); /* jmp r1. */
4384 buf[17] = BYTE_1 (CSKYV1_INST_JMP | 1);
4385
4386 if (!is_unaligned)
4387 {
4388 if (!target_big_endian)
4389 {
4390 buf[0] = 11;
4391 buf[8] = 3;
4392 buf[20] = disp & 0xff;
4393 buf[21] = (disp >> 8) & 0xff;
4394 buf[22] = (disp >> 16) & 0xff;
4395 buf[23] = (disp >> 24) & 0xff;
4396 }
4397 else /* if !target_big_endian. */
4398 {
4399 buf[1] = 11;
4400 buf[9] = 3;
4401 buf[20] = (disp >> 24) & 0xff;
4402 buf[21] = (disp >> 16) & 0xff;
4403 buf[22] = (disp >> 8) & 0xff;
4404 buf[23] = disp & 0xff;
4405 }
4406 buf[18] = 0; /* alignment. */
4407 buf[19] = 0;
4408 fragp->fr_fix += C32_LEN_PIC;
4409 }
4410 else /* if !is_unaligned. */
4411 {
4412 if (!target_big_endian)
4413 {
4414 buf[0] = 11;
4415 buf[8] = 2;
4416 buf[18] = disp & 0xff;
4417 buf[19] = (disp >> 8) & 0xff;
4418 buf[20] = (disp >> 16) & 0xff;
4419 buf[21] = (disp >> 24) & 0xff;
4420 }
4421 else /* if !target_big_endian. */
4422 {
4423 buf[1] = 11;
4424 buf[9] = 2;
4425 buf[18] = (disp >> 24) & 0xff;
4426 buf[19] = (disp >> 16) & 0xff;
4427 buf[20] = (disp >> 8) & 0xff;
4428 buf[21] = disp & 0xff;
4429 }
4430 buf[22] = 0; /* initialise. */
4431 buf[23] = 0;
4432 fragp->fr_fix += C32_LEN_PIC;
4433
4434 } /* end if is_unaligned. */
4435 } /* end case C (COND_JUMP_PIC, DISP32)/C (COND_JUMP_PIC, UNDEF_WORD_DISP). */
4436 break;
4437 case C (UNCD_JUMP, DISP32):
4438 case C (UNCD_JUMP, UNDEF_WORD_DISP):
4439 {
4440 /* jmpi 0f
4441 .align 2
4442 0: .long disp. */
4443 int first_inst = fragp->fr_fix + fragp->fr_address;
4444 int is_unaligned = (first_inst & 3);
4445 /* Build jmpi. */
4446 buf[0] = BYTE_0 (CSKYV1_INST_JMPI);
4447 buf[1] = BYTE_1 (CSKYV1_INST_JMPI);
4448 if (!is_unaligned)
4449 {
4450 if (!target_big_endian)
4451 buf[0] = 1;
4452 else
4453 buf[1] = 1;
4454 /* Alignment. */
4455 buf[2] = 0;
4456 buf[3] = 0;
4457 /* .long */
4458 buf[4] = 0;
4459 buf[5] = 0;
4460 buf[6] = 0;
4461 buf[7] = 0;
4462 fix_new (fragp, fragp->fr_fix + 4, 4,
4463 fragp->fr_symbol, fragp->fr_offset, 0, BFD_RELOC_32);
4464 fragp->fr_fix += U32_LEN;
4465 }
4466 else /* if is_unaligned. */
4467 {
4468 if (!target_big_endian)
4469 buf[0] = 0;
4470 else
4471 buf[1] = 0;
4472 /* .long */
4473 buf[2] = 0;
4474 buf[3] = 0;
4475 buf[4] = 0;
4476 buf[5] = 0;
4477 fix_new (fragp, fragp->fr_fix + 2, 4,
4478 fragp->fr_symbol, fragp->fr_offset, 0, BFD_RELOC_32);
4479 fragp->fr_fix += U32_LEN;
4480
4481 }
4482 }
4483 break;
4484 case C (UNCD_JUMP_PIC, DISP32):
4485 case C (UNCD_JUMP_PIC, UNDEF_WORD_DISP):
4486 {
4487 /* subi sp, 8
4488 stw r15, (sp)
4489 bsr .L0
4490 .L0:
4491 lrw r1, 0f
4492 add r1, r15
4493 ldw r15, (sp)
4494 addi sp, 8
4495 jmp r1
4496 .align 2
4497 0: .long (tar_add - pc)
4498 1:
4499 */
4500 /* If the b!cond is 4 byte aligned, the literal which would
4501 go at x+4 will also be aligned. */
4502 int first_inst = fragp->fr_fix + fragp->fr_address;
4503 int is_unaligned = (first_inst & 3);
4504 disp -= 6;
4505
4506 buf[0] = BYTE_0 (CSKYV1_INST_SUBI | (7 << 4)); /* subi r0, 8. */
4507 buf[1] = BYTE_1 (CSKYV1_INST_SUBI | (7 << 4));
4508 buf[2] = BYTE_0 (CSKYV1_INST_STW | (15 << 8)); /* stw r15, r0. */
4509 buf[3] = BYTE_1 (CSKYV1_INST_STW | (15 << 8));
4510 buf[4] = BYTE_0 (CSKYV1_INST_BSR); /* bsr pc + 2. */
4511 buf[5] = BYTE_1 (CSKYV1_INST_BSR);
4512 buf[6] = BYTE_0 (CSKYV1_INST_LRW | (1 << 8)); /* lrw r1, (tar_addr - pc). */
4513 buf[7] = BYTE_1 (CSKYV1_INST_LRW | (1 << 8));
4514 buf[8] = BYTE_0 (CSKYV1_INST_ADDU | (15 << 4) | 1); /* add r1, r15. */
4515 buf[9] = BYTE_1 (CSKYV1_INST_ADDU | (15 << 4) | 1);
4516 buf[10] = BYTE_0 (CSKYV1_INST_LDW | (15 << 8)); /* ldw r15, r0. */
4517 buf[11] = BYTE_1 (CSKYV1_INST_LDW | (15 << 8));
4518 buf[12] = BYTE_0 (CSKYV1_INST_ADDI | (7 << 4)); /* addi r0, 8. */
4519 buf[13] = BYTE_1 (CSKYV1_INST_ADDI | (7 << 4));
4520 buf[14] = BYTE_0 (CSKYV1_INST_JMP | 1); /* jmp r1. */
4521 buf[15] = BYTE_1 (CSKYV1_INST_JMP | 1);
4522
4523 if (is_unaligned)
4524 {
4525 if (!target_big_endian)
4526 {
4527 buf[6] = 3;
4528 buf[18] = disp & 0xff;
4529 buf[19] = (disp >> 8) & 0xff;
4530 buf[20] = (disp >> 16) & 0xff;
4531 buf[21] = (disp >> 24) & 0xff;
4532 }
4533 else
4534 {
4535 buf[7] = 3;
4536 buf[18] = (disp >> 24) & 0xff;
4537 buf[19] = (disp >> 16) & 0xff;
4538 buf[20] = (disp >> 8) & 0xff;
4539 buf[21] = disp & 0xff;
4540 }
4541 buf[16] = 0;
4542 buf[17] = 0;
4543 fragp->fr_fix += U32_LEN_PIC;
4544 }
4545 else
4546 {
4547 if (!target_big_endian)
4548 {
4549 buf[6] = 2;
4550 buf[16] = disp & 0xff;
4551 buf[17] = (disp >> 8) & 0xff;
4552 buf[18] = (disp >> 16) & 0xff;
4553 buf[19] = (disp >> 24) & 0xff;
4554 }
4555 else
4556 {
4557 buf[7] = 2;
4558 buf[16] = (disp >> 24) & 0xff;
4559 buf[17] = (disp >> 16) & 0xff;
4560 buf[18] = (disp >> 8) & 0xff;
4561 buf[19] = disp & 0xff;
4562 }
4563 fragp->fr_fix += U32_LEN_PIC;
4564 }
4565 }
4566 break;
4567 case COND_DISP10:
4568 case SCOND_DISP10:
4569 case UNCD_DISP10:
4570 case JCOND_DISP10:
4571 case JUNCD_DISP10:
4572 {
4573 unsigned int inst = csky_read_insn (buf, 2);
4574 inst |= (disp >> 1) & ((1 << 10) - 1);
4575 csky_write_insn (buf, inst, 2);
4576 fragp->fr_fix += 2;
4577 break;
4578 }
4579 case SCOND_DISP16:
4580 {
4581 unsigned int inst = csky_read_insn (buf, 2);
4582
4583 if (inst == CSKYV2_INST_BT16)
4584 inst = CSKYV2_INST_BF16;
4585 else
4586 inst = CSKYV2_INST_BT16;
4587 make_insn (2, inst, (2 + 4) >> 1, 10);
4588 if (IS_EXTERNAL_SYM (fragp->fr_symbol, asec))
4589 fix_new (fragp, fragp->fr_fix, 4,
4590 fragp->fr_symbol, fragp->fr_offset, 1,
4591 BFD_RELOC_CKCORE_PCREL_IMM16BY2);
4592 disp -= 2;
4593 inst = CSKYV2_INST_BR32 | ((disp >> 1) & ((1 << 16) - 1));
4594 csky_write_insn (buf, inst, 4);
4595 fragp->fr_fix += 4;
4596 break;
4597 }
4598 case COND_DISP16:
4599 case JCOND_DISP16:
4600 {
4601 unsigned int inst = csky_read_insn (buf, 2);
4602
4603 if (inst == CSKYV2_INST_BT16)
4604 inst = CSKYV2_INST_BT32;
4605 else
4606 inst = CSKYV2_INST_BF32;
4607 if (IS_EXTERNAL_SYM (fragp->fr_symbol, asec))
4608 fix_new (fragp, fragp->fr_fix, 4,
4609 fragp->fr_symbol, fragp->fr_offset, 1,
4610 BFD_RELOC_CKCORE_PCREL_IMM16BY2);
4611 inst |= (disp >> 1) & ((1 << 16) - 1);
4612 csky_write_insn (buf, inst, 4);
4613 fragp->fr_fix += 4;
4614 break;
4615 }
4616 case LRW_DISP7:
4617 {
4618 unsigned int inst = csky_read_insn (buf, 2);
4619 int imm;
4620 imm = (disp + 2) >> 2;
4621 inst |= (imm >> 5) << 8;
4622 make_insn (2, inst, (imm & 0x1f), 5);
4623 break;
4624 }
4625 case LRW2_DISP8:
4626 {
4627 unsigned int inst = csky_read_insn (buf, 2);
4628 int imm = (disp + 2) >> 2;
4629 if (imm >= 0x80)
4630 {
4631 inst &= 0xe0;
4632 inst |= (~((imm >> 5) << 8)) & 0x300;
4633 make_insn (2, inst, (~imm & 0x1f), 5);
4634 }
4635 else
4636 {
4637 inst |= (imm >> 5) << 8;
4638 make_insn (2, inst, (imm & 0x1f), 5);
4639 }
4640 break;
4641 }
4642 case LRW_DISP16:
4643 {
4644 unsigned int inst = csky_read_insn (buf, 2);
4645 inst = CSKYV2_INST_LRW32 | (((inst & 0xe0) >> 5) << 16);
4646 if (IS_EXTERNAL_SYM (fragp->fr_symbol, asec))
4647 fix_new (fragp, fragp->fr_fix, 4,
4648 fragp->fr_symbol, fragp->fr_offset, 1,
4649 BFD_RELOC_CKCORE_PCREL_IMM16BY4);
4650 make_insn (4, inst, ((disp + 2) >> 2), 16);
4651 break;
4652 }
4653 case JCOMPZ_DISP16:
4654 {
4655 unsigned int inst = csky_read_insn (buf, 4);
4656 make_insn (4, inst, disp >> 1, 16);
4657 }
4658 break;
4659 case JCOMPZ_DISP32:
4660 {
4661 unsigned int inst = csky_read_insn (buf, 4);
4662 int literal_offset;
4663 make_insn (4, opposite_of_stored_compz (inst),
4664 (4 + 4 + PAD_LITERAL_LENGTH) >> 1, 16);
4665 literal_offset = ((fragp->fr_address + fragp->fr_fix) % 4 == 0
4666 ? 0 : 2);
4667 make_insn (4, CSKYV2_INST_JMPI32, (4 + literal_offset + 2) >> 2, 10);
4668 make_literal (fragp, literal_offset);
4669 }
4670 break;
4671 case JUNCD_DISP16:
4672 case UNCD_DISP16:
4673 {
4674 if (IS_EXTERNAL_SYM (fragp->fr_symbol, asec))
4675 fix_new (fragp, fragp->fr_fix, 4,
4676 fragp->fr_symbol, fragp->fr_offset, 1,
4677 BFD_RELOC_CKCORE_PCREL_IMM16BY2);
4678 make_insn (4, CSKYV2_INST_BR32, disp >> 1, 16);
4679 }
4680 break;
4681 case JCOND_DISP32:
4682 {
4683 /* 'jbt'/'jbf'-> <bf16/bt16>; jmpi32; [pad16]+literal32 */
4684 unsigned int inst = csky_read_insn (buf, 2);
4685 int literal_offset;
4686
4687 if (inst == CSKYV2_INST_BT16)
4688 inst = CSKYV2_INST_BF16;
4689 else
4690 inst = CSKYV2_INST_BT16;
4691 make_insn (2, inst, (2 + 4 + PAD_LITERAL_LENGTH) >> 1, 10);
4692 literal_offset = ((fragp->fr_address + fragp->fr_fix) % 4 == 0
4693 ? 0 : 2);
4694 make_insn (4, CSKYV2_INST_JMPI32, (4 + literal_offset + 2) >> 2, 10);
4695 make_literal (fragp, literal_offset);
4696 break;
4697 }
4698 case JUNCD_DISP32:
4699 {
4700 int literal_offset;
4701 literal_offset = ((fragp->fr_address + fragp->fr_fix) % 4 == 0
4702 ? 0 : 2);
4703 make_insn (4, CSKYV2_INST_JMPI32, (4 + literal_offset + 2) >> 2, 10);
4704 make_literal (fragp, literal_offset);
4705 }
4706 break;
4707 case RELAX_OVERFLOW:
4708 csky_branch_report_error (fragp->fr_file, fragp->fr_line,
4709 fragp->fr_symbol, disp);
4710 break;
4711 default:
4712 abort ();
4713 break;
4714 }
4715 }
4716
4717 /* Round up a section size to the appropriate boundary. */
4718
4719 valueT
4720 md_section_align (segT segment ATTRIBUTE_UNUSED,
4721 valueT size)
4722 {
4723 return size;
4724 }
4725
4726 /* MD interface: Symbol and relocation handling. */
4727
4728 void md_csky_end (void)
4729 {
4730 dump_literals (0);
4731 }
4732
4733 /* Return the address within the segment that a PC-relative fixup is
4734 relative to. */
4735
4736 long
4737 md_pcrel_from_section (fixS * fixP, segT seg)
4738 {
4739 /* If the symbol is undefined or defined in another section
4740 we leave the add number alone for the linker to fix it later. */
4741 if (fixP->fx_addsy != (symbolS *) NULL
4742 && (! S_IS_DEFINED (fixP->fx_addsy)
4743 || S_GET_SEGMENT (fixP->fx_addsy) != seg))
4744 return fixP->fx_size;
4745
4746 /* The case where we are going to resolve things. */
4747 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
4748 }
4749
4750 /* csky_cons_fix_new is called via the expression parsing code when a
4751 reloc is needed. We use this hook to get the correct .got reloc. */
4752
4753 void
4754 csky_cons_fix_new (fragS *frag,
4755 unsigned int off,
4756 unsigned int len,
4757 expressionS *exp,
4758 bfd_reloc_code_real_type reloc)
4759 {
4760 fixS *fixP;
4761
4762 if (BFD_RELOC_CKCORE_GOTOFF == insn_reloc
4763 || BFD_RELOC_CKCORE_GOTPC == insn_reloc
4764 || BFD_RELOC_CKCORE_GOT32 == insn_reloc
4765 || BFD_RELOC_CKCORE_PLT32 == insn_reloc
4766 || BFD_RELOC_CKCORE_TLS_LE32 == insn_reloc
4767 || BFD_RELOC_CKCORE_TLS_GD32 == insn_reloc
4768 || BFD_RELOC_CKCORE_TLS_LDM32 == insn_reloc
4769 || BFD_RELOC_CKCORE_TLS_LDO32 == insn_reloc
4770 || BFD_RELOC_CKCORE_TLS_IE32 == insn_reloc)
4771 reloc = insn_reloc;
4772 else
4773 switch (len)
4774 {
4775 case 1:
4776 reloc = BFD_RELOC_8;
4777 break;
4778 case 2:
4779 reloc = BFD_RELOC_16;
4780 break;
4781 case 4:
4782 reloc = BFD_RELOC_32;
4783 break;
4784 case 8:
4785 reloc = BFD_RELOC_64;
4786 break;
4787 default:
4788 as_bad (_("unsupported BFD relocation size %d"), len);
4789 reloc = BFD_RELOC_32;
4790 break;
4791 }
4792 fixP = fix_new_exp (frag, off, (int) len, exp, 0, reloc);
4793 if (BFD_RELOC_CKCORE_TLS_IE32 == insn_reloc
4794 || BFD_RELOC_CKCORE_TLS_GD32 == insn_reloc
4795 || BFD_RELOC_CKCORE_TLS_LDM32 == insn_reloc)
4796 {
4797 fixP->tc_fix_data.frag = literal_insn_offset->tls_addend.frag;
4798 fixP->tc_fix_data.offset = literal_insn_offset->tls_addend.offset;
4799 }
4800 }
4801
4802 /* See whether we need to force a relocation into the output file.
4803 This is used to force out switch and PC relative relocations when
4804 relaxing. */
4805
4806 int
4807 csky_force_relocation (fixS * fix)
4808 {
4809 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
4810 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY
4811 || fix->fx_r_type == BFD_RELOC_RVA
4812 || fix->fx_r_type == BFD_RELOC_CKCORE_ADDR_HI16
4813 || fix->fx_r_type == BFD_RELOC_CKCORE_ADDR_LO16
4814 || fix->fx_r_type == BFD_RELOC_CKCORE_TOFFSET_LO16
4815 || fix->fx_r_type == BFD_RELOC_CKCORE_DOFFSET_LO16)
4816 return 1;
4817
4818 if (fix->fx_addsy == NULL)
4819 return 0;
4820
4821 if (do_use_branchstub
4822 && fix->fx_r_type == BFD_RELOC_CKCORE_PCREL_IMM26BY2
4823 && (symbol_get_bfdsym (fix->fx_addsy)->flags & BSF_FUNCTION))
4824 return 1;
4825 return S_FORCE_RELOC (fix->fx_addsy, fix->fx_subsy == NULL);
4826 }
4827
4828 /* Return true if the fix can be handled by GAS, false if it must
4829 be passed through to the linker. */
4830
4831 bfd_boolean
4832 csky_fix_adjustable (fixS * fixP)
4833 {
4834 if (fixP->fx_addsy == NULL)
4835 return 1;
4836
4837 /* We need the symbol name for the VTABLE entries. */
4838 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
4839 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
4840 || fixP->fx_r_type == BFD_RELOC_CKCORE_PLT32
4841 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOT32
4842 || fixP->fx_r_type == BFD_RELOC_CKCORE_PLT12
4843 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOT12
4844 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOT_HI16
4845 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOT_LO16
4846 || fixP->fx_r_type == BFD_RELOC_CKCORE_PLT_HI16
4847 || fixP->fx_r_type == BFD_RELOC_CKCORE_PLT_LO16
4848 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOTOFF
4849 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOTOFF_HI16
4850 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOTOFF_LO16
4851 || fixP->fx_r_type == BFD_RELOC_CKCORE_ADDR_HI16
4852 || fixP->fx_r_type == BFD_RELOC_CKCORE_ADDR_LO16
4853 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOT_IMM18BY4
4854 || fixP->fx_r_type == BFD_RELOC_CKCORE_PLT_IMM18BY4
4855 || fixP->fx_r_type == BFD_RELOC_CKCORE_GOTOFF_IMM18
4856 || fixP->fx_r_type == BFD_RELOC_CKCORE_TLS_LE32
4857 || fixP->fx_r_type == BFD_RELOC_CKCORE_TLS_IE32
4858 || fixP->fx_r_type == BFD_RELOC_CKCORE_TLS_GD32
4859 || fixP->fx_r_type == BFD_RELOC_CKCORE_TLS_LDM32
4860 || fixP->fx_r_type == BFD_RELOC_CKCORE_TLS_LDO32)
4861 return 0;
4862
4863 if (do_use_branchstub
4864 && fixP->fx_r_type == BFD_RELOC_CKCORE_PCREL_IMM26BY2
4865 && (symbol_get_bfdsym (fixP->fx_addsy)->flags & BSF_FUNCTION))
4866 return 0;
4867
4868 return 1;
4869 }
4870
4871 void
4872 md_apply_fix (fixS *fixP,
4873 valueT *valP,
4874 segT seg)
4875 {
4876 reloc_howto_type *howto;
4877 /* Note: use offsetT because it is signed, valueT is unsigned. */
4878 offsetT val = *valP;
4879 char *buf = fixP->fx_frag->fr_literal + fixP->fx_where;
4880
4881 /* if fx_done = 0, fixup will also be processed in
4882 * tc_gen_reloc() after md_apply_fix(). */
4883 fixP->fx_done = 0;
4884
4885 /* If the fix is relative to a symbol which is not defined, or not
4886 in the same segment as the fix, we cannot resolve it here. */
4887 if (IS_CSKY_V1 (mach_flag) && fixP->fx_addsy != NULL
4888 && (! S_IS_DEFINED (fixP->fx_addsy)
4889 || S_GET_SEGMENT (fixP->fx_addsy) != seg))
4890 {
4891 switch (fixP->fx_r_type)
4892 {
4893 /* Data fx_addnumber is greater than 16 bits,
4894 so fx_addnumber is assigned zero. */
4895 case BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2:
4896 *valP = 0;
4897 break;
4898 case BFD_RELOC_CKCORE_TLS_IE32:
4899 case BFD_RELOC_CKCORE_TLS_LDM32:
4900 case BFD_RELOC_CKCORE_TLS_GD32:
4901 {
4902 struct tls_addend *ta = &(fixP->tc_fix_data);
4903 fixP->fx_offset = (fixP->fx_frag->fr_address + fixP->fx_where
4904 - (ta->frag->fr_address + ta->offset));
4905 }
4906 /* Fall through. */
4907 case BFD_RELOC_CKCORE_TLS_LE32:
4908 case BFD_RELOC_CKCORE_TLS_LDO32:
4909 S_SET_THREAD_LOCAL (fixP->fx_addsy);
4910 break;
4911 default:
4912 break;
4913 }
4914 #ifdef OBJ_ELF
4915 /* For ELF we can just return and let the reloc that will be generated
4916 take care of everything. For COFF we still have to insert 'val'
4917 into the insn since the addend field will be ignored. */
4918 return;
4919 #endif
4920 }
4921
4922 /* We can handle these relocs. */
4923 switch (fixP->fx_r_type)
4924 {
4925 case BFD_RELOC_32_PCREL:
4926 case BFD_RELOC_CKCORE_PCREL32:
4927 fixP->fx_r_type = BFD_RELOC_CKCORE_PCREL32;
4928 break;
4929 case BFD_RELOC_VTABLE_INHERIT:
4930 fixP->fx_r_type = BFD_RELOC_CKCORE_GNU_VTINHERIT;
4931 if (fixP->fx_addsy && !S_IS_DEFINED (fixP->fx_addsy)
4932 && !S_IS_WEAK (fixP->fx_addsy))
4933 S_SET_WEAK (fixP->fx_addsy);
4934 break;
4935 case BFD_RELOC_VTABLE_ENTRY:
4936 fixP->fx_r_type = BFD_RELOC_CKCORE_GNU_VTENTRY;
4937 break;
4938 case BFD_RELOC_CKCORE_GOT12:
4939 case BFD_RELOC_CKCORE_PLT12:
4940 case BFD_RELOC_CKCORE_ADDR_HI16:
4941 case BFD_RELOC_CKCORE_ADDR_LO16:
4942 case BFD_RELOC_CKCORE_TOFFSET_LO16:
4943 case BFD_RELOC_CKCORE_DOFFSET_LO16:
4944 case BFD_RELOC_CKCORE_GOT_HI16:
4945 case BFD_RELOC_CKCORE_GOT_LO16:
4946 case BFD_RELOC_CKCORE_PLT_HI16:
4947 case BFD_RELOC_CKCORE_PLT_LO16:
4948 case BFD_RELOC_CKCORE_GOTPC_HI16:
4949 case BFD_RELOC_CKCORE_GOTPC_LO16:
4950 case BFD_RELOC_CKCORE_GOTOFF_HI16:
4951 case BFD_RELOC_CKCORE_GOTOFF_LO16:
4952 case BFD_RELOC_CKCORE_DOFFSET_IMM18:
4953 case BFD_RELOC_CKCORE_DOFFSET_IMM18BY2:
4954 case BFD_RELOC_CKCORE_DOFFSET_IMM18BY4:
4955 case BFD_RELOC_CKCORE_GOTOFF_IMM18:
4956 case BFD_RELOC_CKCORE_GOT_IMM18BY4:
4957 case BFD_RELOC_CKCORE_PLT_IMM18BY4:
4958 break;
4959 case BFD_RELOC_CKCORE_TLS_IE32:
4960 case BFD_RELOC_CKCORE_TLS_LDM32:
4961 case BFD_RELOC_CKCORE_TLS_GD32:
4962 {
4963 struct tls_addend *ta = &(fixP->tc_fix_data);
4964 fixP->fx_offset = (fixP->fx_frag->fr_address + fixP->fx_where
4965 - (ta->frag->fr_address + ta->offset));
4966 }
4967 /* Fall through. */
4968 case BFD_RELOC_CKCORE_TLS_LE32:
4969 case BFD_RELOC_CKCORE_TLS_LDO32:
4970 S_SET_THREAD_LOCAL (fixP->fx_addsy);
4971 break;
4972 case BFD_RELOC_32:
4973 fixP->fx_r_type = BFD_RELOC_CKCORE_ADDR32;
4974 /* Fall through. */
4975 case BFD_RELOC_16:
4976 case BFD_RELOC_8:
4977 if (fixP->fx_addsy == NULL)
4978 {
4979 if (fixP->fx_size == 4)
4980 ;
4981 else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767)
4982 ;
4983 else if (fixP->fx_size == 1 && val >= -256 && val <= 255)
4984 ;
4985 else
4986 abort ();
4987 md_number_to_chars (buf, val, fixP->fx_size);
4988 fixP->fx_done = 1;
4989 }
4990 break;
4991 case BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2:
4992 if (fixP->fx_addsy == 0 && val > -2 KB && val < 2 KB)
4993 {
4994 long nval = (val >> 1) & 0x7ff;
4995 nval |= CSKYV1_INST_BSR;
4996 csky_write_insn (buf, nval, 2);
4997 fixP->fx_done = 1;
4998 }
4999 else
5000 *valP = 0;
5001 break;
5002 case BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2:
5003 if (fixP->fx_addsy == 0)
5004 {
5005 if (val >= -(1 << 26) && val < (1 << 26))
5006 {
5007 unsigned int nval = ((val + fixP->fx_size) >> 1) & 0x3ffffff;
5008 nval |= CSKYV2_INST_BSR32;
5009
5010 csky_write_insn (buf, nval, 4);
5011 }
5012 /* If bsr32 cannot reach,
5013 generate 'lrw r25,label;jsr r25' instead of 'jsri label'. */
5014 else if (IS_CSKY_ARCH_810 (mach_flag))
5015 {
5016 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
5017 valueT opcode = csky_read_insn (buf, 4);
5018 opcode = (opcode & howto->dst_mask) | CSKYV2_INST_JSRI_TO_LRW;
5019 csky_write_insn (buf, opcode, 4);
5020 opcode = CSKYV2_INST_JSR_R26;
5021 csky_write_insn (buf + 4, opcode, 4);
5022 }
5023 fixP->fx_done = 1;
5024 }
5025 break;
5026
5027 default:
5028 {
5029 valueT opcode;
5030 offsetT min, max;
5031 unsigned int issigned = 0;
5032
5033 if (fixP->fx_addsy)
5034 break;
5035
5036 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
5037 if (howto == NULL)
5038 {
5039 if (fixP->fx_size == 4
5040 || (fixP->fx_size == 2 && val >= -32768 && val <= 32767)
5041 || (fixP->fx_size == 1 && val >= -256 && val <= 255))
5042 {
5043 md_number_to_chars (buf, val, fixP->fx_size);
5044 fixP->fx_done = 1;
5045 break;
5046 }
5047 else
5048 abort ();
5049 }
5050
5051 if (IS_CSKY_V2 (mach_flag))
5052 val += fixP->fx_size;
5053
5054 if (howto->rightshift == 2)
5055 val += 2;
5056
5057 val >>= howto->rightshift;
5058
5059 switch (fixP->fx_r_type)
5060 {
5061 /* Offset is unsigned. */
5062 case BFD_RELOC_CKCORE_PCREL_IMM8BY4:
5063 case BFD_RELOC_CKCORE_PCREL_IMM10BY4:
5064 case BFD_RELOC_CKCORE_PCREL_IMM16BY4:
5065 max = (offsetT) howto->dst_mask;
5066 min = 0;
5067 break;
5068 /* lrw16. */
5069 case BFD_RELOC_CKCORE_PCREL_IMM7BY4:
5070 if (do_extend_lrw)
5071 max = (offsetT)((1 << (howto->bitsize + 1)) - 2);
5072 else
5073 max = (offsetT)((1 << howto->bitsize) - 1);
5074 min = 0;
5075 break;
5076 /* flrws, flrwd: the offset bits are divided in two parts. */
5077 case BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4:
5078 max = (offsetT)((1 << howto->bitsize) - 1);
5079 min = 0;
5080 break;
5081 /* Offset is signed. */
5082 default:
5083 max = (offsetT)(howto->dst_mask >> 1);
5084 min = - max - 1;
5085 issigned = 1;
5086 }
5087 if (val < min || val > max)
5088 {
5089 csky_branch_report_error (fixP->fx_file, fixP->fx_line,
5090 fixP->fx_addsy, val);
5091 return;
5092 }
5093 opcode = csky_read_insn (buf, fixP->fx_size);
5094 /* Clear redundant bits brought from the last
5095 operation if there is any. */
5096 if (do_extend_lrw && (opcode & 0xfc00) == CSKYV2_INST_LRW16)
5097 val &= 0xff;
5098 else
5099 val &= issigned ? (offsetT)(howto->dst_mask) : max;
5100
5101 if (fixP->fx_r_type == BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4)
5102 val = (val & 0xf) << 12;
5103
5104 if (fixP->fx_size == 2 && (opcode & 0xfc00) == CSKYV2_INST_LRW16)
5105 {
5106 /* 8 bit offset lrw16. */
5107 if (val >= 0x80)
5108 csky_write_insn (buf,
5109 ((~val & 0x1f)
5110 | ((~val & 0x60) << 3) | (opcode & 0xe0)),
5111 fixP->fx_size);
5112 /* 7 bit offset lrw16. */
5113 else
5114 csky_write_insn (buf,
5115 (val & 0x1f) | ((val & 0x60) << 3) | opcode,
5116 fixP->fx_size);
5117 }
5118 else if (fixP->fx_size == 4
5119 && (opcode & 0xfe1ffe00) == CSKYV2_INST_FLRW)
5120 csky_write_insn (buf,
5121 ((val & 0xf) << 4) | ((val & 0xf0) << 17) | opcode,
5122 fixP->fx_size);
5123 else
5124 csky_write_insn (buf, val | opcode, fixP->fx_size);
5125 fixP->fx_done = 1;
5126 break;
5127 }
5128 }
5129 fixP->fx_addnumber = val;
5130 }
5131
5132 /* Translate internal representation of relocation info to BFD target
5133 format. */
5134
5135 arelent *
5136 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixP)
5137 {
5138 arelent *rel;
5139
5140 if (fixP->fx_pcrel
5141 && fixP->fx_r_type == BFD_RELOC_CKCORE_ADDR32)
5142 fixP->fx_r_type = BFD_RELOC_CKCORE_PCREL32;
5143
5144 rel = xmalloc (sizeof (arelent));
5145 rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
5146 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
5147 rel->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
5148 rel->addend = fixP->fx_offset;
5149 if (rel->howto == NULL)
5150 {
5151 as_bad_where (fixP->fx_file, fixP->fx_line,
5152 _("cannot represent `%s' relocation in object file"),
5153 bfd_get_reloc_code_name (fixP->fx_r_type));
5154
5155 /* Set howto to a garbage value so that we can keep going. */
5156 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
5157 }
5158 gas_assert (rel->howto != NULL);
5159 rel->address = fixP->fx_frag->fr_address + fixP->fx_where;
5160 return rel;
5161 }
5162
5163 /* Relax a fragment by scanning TC_GENERIC_RELAX_TABLE. */
5164
5165 long
5166 csky_relax_frag (segT segment, fragS *fragP, long stretch)
5167 {
5168 const relax_typeS *this_type;
5169 const relax_typeS *start_type;
5170 relax_substateT next_state;
5171 relax_substateT this_state;
5172 offsetT growth;
5173 offsetT aim;
5174 addressT target;
5175 addressT address;
5176 symbolS *symbolP;
5177 const relax_typeS *table;
5178
5179 target = fragP->fr_offset;
5180 address = fragP->fr_address;
5181 table = TC_GENERIC_RELAX_TABLE;
5182 this_state = fragP->fr_subtype;
5183 start_type = this_type = table + this_state;
5184 symbolP = fragP->fr_symbol;
5185
5186 if (symbolP)
5187 {
5188 fragS *sym_frag;
5189
5190 sym_frag = symbol_get_frag (symbolP);
5191
5192 #ifndef DIFF_EXPR_OK
5193 know (sym_frag != NULL);
5194 #endif
5195 know (S_GET_SEGMENT (symbolP) != absolute_section
5196 || sym_frag == &zero_address_frag);
5197 target += S_GET_VALUE (symbolP);
5198
5199 /* If SYM_FRAG has yet to be reached on this pass, assume it
5200 will move by STRETCH just as we did, unless there is an
5201 alignment frag between here and SYM_FRAG. An alignment may
5202 well absorb any STRETCH, and we don't want to choose a larger
5203 branch insn by overestimating the needed reach of this
5204 branch. It isn't critical to calculate TARGET exactly; We
5205 know we'll be doing another pass if STRETCH is non-zero. */
5206
5207 if (stretch != 0
5208 && sym_frag->relax_marker != fragP->relax_marker
5209 && S_GET_SEGMENT (symbolP) == segment)
5210 {
5211 fragS *f;
5212
5213 /* Adjust stretch for any alignment frag. Note that if have
5214 been expanding the earlier code, the symbol may be
5215 defined in what appears to be an earlier frag. FIXME:
5216 This doesn't handle the fr_subtype field, which specifies
5217 a maximum number of bytes to skip when doing an
5218 alignment. */
5219 for (f = fragP; f != NULL && f != sym_frag; f = f->fr_next)
5220 {
5221 if (f->fr_type == rs_align || f->fr_type == rs_align_code)
5222 {
5223 if (stretch < 0)
5224 stretch = -((-stretch)
5225 & ~((1 << (int) f->fr_offset) - 1));
5226 else
5227 stretch &= ~((1 << (int) f->fr_offset) - 1);
5228 }
5229 if (stretch == 0)
5230 break;
5231 }
5232 if (f != 0)
5233 target += stretch;
5234 }
5235 }
5236
5237 aim = target - address - fragP->fr_fix;
5238
5239 /* If the fragP->fr_symbol is extern symbol, aim should be 0. */
5240 if (fragP->fr_symbol && S_GET_SEGMENT (symbolP) != segment)
5241 aim = 0;
5242
5243 if (aim < 0)
5244 {
5245 /* Look backwards. */
5246 for (next_state = this_type->rlx_more; next_state;)
5247 if (aim >= this_type->rlx_backward)
5248 next_state = 0;
5249 else
5250 {
5251 /* Grow to next state. */
5252 this_state = next_state;
5253 this_type = table + this_state;
5254 next_state = this_type->rlx_more;
5255 }
5256 }
5257 else
5258 {
5259 /* Look forwards. */
5260 for (next_state = this_type->rlx_more; next_state;)
5261 if (aim <= this_type->rlx_forward)
5262 next_state = 0;
5263 else
5264 {
5265 /* Grow to next state. */
5266 this_state = next_state;
5267 this_type = table + this_state;
5268 next_state = this_type->rlx_more;
5269 }
5270 }
5271
5272 growth = this_type->rlx_length - start_type->rlx_length;
5273 if (growth != 0)
5274 fragP->fr_subtype = this_state;
5275 return growth;
5276 }
5277
5278 int
5279 md_estimate_size_before_relax (fragS * fragp,
5280 segT segtype)
5281 {
5282 switch (fragp->fr_subtype)
5283 {
5284 case COND_DISP10:
5285 case COND_DISP16:
5286 case SCOND_DISP10:
5287 case SCOND_DISP16:
5288 case UNCD_DISP10:
5289 case UNCD_DISP16:
5290 case JCOND_DISP10:
5291 case JCOND_DISP16:
5292 case JCOND_DISP32:
5293 case JUNCD_DISP10:
5294 case JUNCD_DISP16:
5295 case JUNCD_DISP32:
5296 case JCOMPZ_DISP16:
5297 case JCOMPZ_DISP32:
5298 case BSR_DISP26:
5299 case LRW_DISP7:
5300 case LRW2_DISP8:
5301 case LRW_DISP16:
5302 gas_assert (fragp->fr_symbol);
5303 if (IS_EXTERNAL_SYM (fragp->fr_symbol, segtype))
5304 while (csky_relax_table[fragp->fr_subtype].rlx_more > RELAX_OVERFLOW)
5305 fragp->fr_subtype = csky_relax_table[fragp->fr_subtype].rlx_more;
5306 return csky_relax_table[fragp->fr_subtype].rlx_length;
5307
5308 /* C-SKY V1 relaxes. */
5309 case C (UNCD_JUMP, UNDEF_DISP):
5310 case C (UNCD_JUMP_PIC, UNDEF_DISP):
5311 if (!fragp->fr_symbol)
5312 fragp->fr_subtype = C (UNCD_JUMP_S, DISP12);
5313 else if (S_GET_SEGMENT (fragp->fr_symbol) == segtype)
5314 fragp->fr_subtype = C (UNCD_JUMP_S, DISP12);
5315 else
5316 fragp->fr_subtype = C (UNCD_JUMP_S, UNDEF_WORD_DISP);
5317 break;
5318
5319 case C (COND_JUMP, UNDEF_DISP):
5320 case C (COND_JUMP_PIC, UNDEF_DISP):
5321 if (fragp->fr_symbol
5322 && S_GET_SEGMENT (fragp->fr_symbol) == segtype)
5323 /* Got a symbol and it's defined in this segment, become byte
5324 sized. Maybe it will fix up. */
5325 fragp->fr_subtype = C (COND_JUMP_S, DISP12);
5326 else if (fragp->fr_symbol)
5327 /* It's got a segment, but it's not ours, so it will always be
5328 long. */
5329 fragp->fr_subtype = C (COND_JUMP_S, UNDEF_WORD_DISP);
5330 else
5331 /* We know the abs value. */
5332 fragp->fr_subtype = C (COND_JUMP_S, DISP12);
5333 break;
5334
5335 case C (UNCD_JUMP, DISP12):
5336 case C (UNCD_JUMP, DISP32):
5337 case C (UNCD_JUMP, UNDEF_WORD_DISP):
5338 case C (COND_JUMP, DISP12):
5339 case C (COND_JUMP, DISP32):
5340 case C (COND_JUMP, UNDEF_WORD_DISP):
5341 case C (UNCD_JUMP_PIC, DISP12):
5342 case C (UNCD_JUMP_PIC, DISP32):
5343 case C (UNCD_JUMP_PIC, UNDEF_WORD_DISP):
5344 case C (COND_JUMP_PIC, DISP12):
5345 case C (COND_JUMP_PIC, DISP32):
5346 case C (COND_JUMP_PIC, UNDEF_WORD_DISP):
5347 case RELAX_OVERFLOW:
5348 break;
5349
5350 default:
5351 abort ();
5352 }
5353 return csky_relax_table[fragp->fr_subtype].rlx_length;
5354 }
5355
5356 /* Parse opcode like: "op oprnd1, oprnd2, oprnd3". */
5357
5358 static void
5359 csky_macro_md_assemble (const char *op,
5360 const char *oprnd1,
5361 const char *oprnd2,
5362 const char *oprnd3)
5363 {
5364 char str[80];
5365 str[0] = '\0';
5366 strcat (str, op);
5367 if (oprnd1 != NULL)
5368 {
5369 strcat (str, " ");
5370 strcat (str, oprnd1);
5371 if (oprnd2 != NULL)
5372 {
5373 strcat (str, ",");
5374 strcat (str, oprnd2);
5375 if (oprnd3 != NULL)
5376 {
5377 strcat (str, ",");
5378 strcat (str, oprnd3);
5379 }
5380 }
5381 }
5382 md_assemble (str);
5383 return;
5384 }
5385
5386 /* Get the string of operand. */
5387
5388 static int
5389 csky_get_macro_operand (char *src_s, char *dst_s, char end_sym)
5390 {
5391 int nlen = 0;
5392 while (ISSPACE (*src_s))
5393 ++src_s;
5394 while (*src_s != end_sym)
5395 dst_s[nlen++] = *(src_s++);
5396 dst_s[nlen] = '\0';
5397 return nlen;
5398 }
5399
5400 /* idly 4 -> idly4. */
5401
5402 static void
5403 csky_idly (void)
5404 {
5405 char *s = csky_insn.opcode_end;
5406 if (!is_imm_over_range (&s, 4, 4, -1))
5407 {
5408 as_bad (_("second operand must be 4"));
5409 return;
5410 }
5411 csky_macro_md_assemble ("idly4", NULL, NULL, NULL);
5412 return;
5413 }
5414
5415 /* rolc rd, 1 or roltc rd, 1 -> addc rd, rd. */
5416
5417 static void
5418 csky_rolc (void)
5419 {
5420 char reg[10];
5421 char *s = csky_insn.opcode_end;
5422
5423 s += csky_get_macro_operand (s, reg, ',');
5424 ++s;
5425
5426 if (is_imm_over_range (&s, 1, 1, -1))
5427 {
5428 csky_macro_md_assemble ("addc", reg, reg, NULL);
5429 return;
5430 }
5431 else
5432 as_bad (_("second operand must be 1"));
5433 }
5434
5435 /* sxtrb0(1)(2) r1, rx -> xtbr0(1)(2) r1,rx; sextb r1. */
5436
5437 static void
5438 csky_sxtrb (void)
5439 {
5440 char reg1[10];
5441 char reg2[10];
5442
5443 char *s = csky_insn.opcode_end;
5444 s += csky_get_macro_operand (s, reg1, ',');
5445 ++s;
5446 csky_get_macro_operand (s, reg2, '\0');
5447
5448 csky_macro_md_assemble (csky_insn.macro->name + 1, reg1, reg2, NULL);
5449 csky_macro_md_assemble ("sextb", reg1, NULL, NULL);
5450 return;
5451 }
5452
5453 static void
5454 csky_movtf (void)
5455 {
5456 char reg1[10];
5457 char reg2[10];
5458 char reg3[10];
5459
5460 char *s = csky_insn.opcode_end;
5461 s += csky_get_macro_operand (s, reg1, ',');
5462 ++s;
5463
5464 s += csky_get_macro_operand (s, reg2, ',');
5465 ++s;
5466
5467 s += csky_get_macro_operand (s, reg3, '\0');
5468 ++s;
5469 csky_macro_md_assemble ("movt", reg1, reg2, NULL);
5470 csky_macro_md_assemble ("movf", reg1, reg3, NULL);
5471 return;
5472 }
5473
5474 static bfd_boolean
5475 get_macro_reg_vals (int *reg1, int *reg2, int *reg3)
5476 {
5477 int nlen;
5478 char *s = csky_insn.opcode_end;
5479
5480 *reg1 = csky_get_reg_val (s, &nlen);
5481 s += nlen;
5482 if (*s != ',')
5483 {
5484 csky_show_error (ERROR_MISSING_COMMA, 0, NULL, NULL);
5485 return FALSE;
5486 }
5487 s++;
5488 *reg2 = csky_get_reg_val (s, &nlen);
5489 s += nlen;
5490 if (*s != ',')
5491 {
5492 csky_show_error (ERROR_MISSING_COMMA, 0, NULL, NULL);
5493 return FALSE;
5494 }
5495 s++;
5496 *reg3 = csky_get_reg_val (s, &nlen);
5497 s += nlen;
5498 if (*s != '\0')
5499 {
5500 csky_show_error (ERROR_BAD_END, 0, s, NULL);
5501 return FALSE;
5502 }
5503 if (*reg1 == -1 || *reg2 == -1 || *reg3 == -1)
5504 {
5505 as_bad (_("register number out of range"));
5506 return FALSE;
5507 }
5508 if (*reg1 != *reg2)
5509 {
5510 as_bad (_("dest and source1 must be the same register"));
5511 return FALSE;
5512 }
5513 if (*reg1 >= 15 || *reg3 >= 15)
5514 {
5515 as_bad (_("64-bit operator src/dst register must be less than 15"));
5516 return FALSE;
5517 }
5518 return TRUE;
5519 }
5520
5521 /* addc64 rx, rx, ry -> cmplt rx, rx, addc rx, ry, addc rx+1, ry+1. */
5522
5523 static void
5524 csky_addc64 (void)
5525 {
5526 int reg1;
5527 int reg2;
5528 int reg3;
5529
5530 if (!get_macro_reg_vals (&reg1, &reg2, &reg3))
5531 return;
5532 csky_macro_md_assemble ("cmplt",
5533 csky_general_reg[reg1],
5534 csky_general_reg[reg1],
5535 NULL);
5536 csky_macro_md_assemble ("addc",
5537 csky_general_reg[reg1 + (target_big_endian ? 1 : 0)],
5538 csky_general_reg[reg3 + (target_big_endian ? 1 : 0)],
5539 NULL);
5540 csky_macro_md_assemble ("addc",
5541 csky_general_reg[reg1 + (target_big_endian ? 0 : 1)],
5542 csky_general_reg[reg3 + (target_big_endian ? 0 : 1)],
5543 NULL);
5544 return;
5545 }
5546
5547 /* subc64 rx, rx, ry -> cmphs rx, rx, subc rx, ry, subc rx+1, ry+1. */
5548
5549 static void
5550 csky_subc64 (void)
5551 {
5552 int reg1;
5553 int reg2;
5554 int reg3;
5555
5556 if (!get_macro_reg_vals (&reg1, &reg2, &reg3))
5557 return;
5558 csky_macro_md_assemble ("cmphs",
5559 csky_general_reg[reg1],
5560 csky_general_reg[reg1],
5561 NULL);
5562 csky_macro_md_assemble ("subc",
5563 csky_general_reg[reg1 + (target_big_endian ? 1 : 0)],
5564 csky_general_reg[reg3 + (target_big_endian ? 1 : 0)],
5565 NULL);
5566 csky_macro_md_assemble ("subc",
5567 csky_general_reg[reg1 + (target_big_endian ? 0 : 1)],
5568 csky_general_reg[reg3 + (target_big_endian ? 0 : 1)],
5569 NULL);
5570 return;
5571 }
5572
5573 /* or64 rx, rx, ry -> or rx, ry, or rx+1, ry+1. */
5574
5575 static void
5576 csky_or64 (void)
5577 {
5578 int reg1;
5579 int reg2;
5580 int reg3;
5581
5582 if (!get_macro_reg_vals (&reg1, &reg2, &reg3))
5583 return;
5584 csky_macro_md_assemble ("or",
5585 csky_general_reg[reg1 + (target_big_endian ? 1 : 0)],
5586 csky_general_reg[reg3 + (target_big_endian ? 1 : 0)],
5587 NULL);
5588 csky_macro_md_assemble ("or",
5589 csky_general_reg[reg1 + (target_big_endian ? 0 : 1)],
5590 csky_general_reg[reg3 + (target_big_endian ? 0 : 1)],
5591 NULL);
5592 return;
5593 }
5594
5595 /* xor64 rx, rx, ry -> xor rx, ry, xor rx+1, ry+1. */
5596
5597 static void
5598 csky_xor64 (void)
5599 {
5600 int reg1;
5601 int reg2;
5602 int reg3;
5603
5604 if (!get_macro_reg_vals (&reg1, &reg2, &reg3))
5605 return;
5606 csky_macro_md_assemble ("xor",
5607 csky_general_reg[reg1 + (target_big_endian ? 1 : 0)],
5608 csky_general_reg[reg3 + (target_big_endian ? 1 : 0)],
5609 NULL);
5610 csky_macro_md_assemble ("xor",
5611 csky_general_reg[reg1 + (target_big_endian ? 0 : 1)],
5612 csky_general_reg[reg3 + (target_big_endian ? 0 : 1)],
5613 NULL);
5614 return;
5615 }
5616
5617 /* The following are V2 macro instructions. */
5618
5619 /* neg rd -> not rd, rd; addi rd, 1. */
5620
5621 static void
5622 csky_neg (void)
5623 {
5624 char reg1[10];
5625
5626 char *s = csky_insn.opcode_end;
5627 s += csky_get_macro_operand (s, reg1, '\0');
5628 ++s;
5629
5630 csky_macro_md_assemble ("not", reg1, reg1, NULL);
5631 csky_macro_md_assemble ("addi", reg1, "1", NULL);
5632 return;
5633 }
5634
5635 /* rsubi rd, imm16 -> not rd; addi rd, imm16 + 1 */
5636
5637 static void
5638 csky_rsubi (void)
5639 {
5640 char reg1[10];
5641 char str_imm16[20];
5642 unsigned int imm16 = 0;
5643 expressionS e;
5644 char *s = csky_insn.opcode_end;
5645 s += csky_get_macro_operand (s, reg1, ',');
5646 ++s;
5647
5648 s = parse_exp (s, &e);
5649 if (e.X_op == O_constant)
5650 imm16 = e.X_add_number;
5651 else
5652 csky_show_error (ERROR_IMM_ILLEGAL, 2, NULL, NULL);
5653
5654 sprintf (str_imm16, "%d", imm16 + 1);
5655
5656 csky_macro_md_assemble ("not", reg1, reg1, NULL);
5657 csky_macro_md_assemble ("addi", reg1, str_imm16, NULL);
5658 return;
5659 }
5660
5661 /* Such as: asrc rd -> asrc rd, rd, 1. */
5662
5663 static void
5664 csky_arith (void)
5665 {
5666 char reg1[10];
5667 char *s = csky_insn.opcode_end;
5668 s += csky_get_macro_operand (s, reg1, '\0');
5669 ++s;
5670 csky_macro_md_assemble (csky_insn.macro->name, reg1, reg1, "1");
5671 return;
5672 }
5673
5674 /* decne rd -> if ck802: subi rd, 1; cmpnei rd, 0.
5675 else: decne rd, rd, 1 */
5676
5677 static void
5678 csky_decne (void)
5679 {
5680 char reg1[10];
5681 char *s = csky_insn.opcode_end;
5682 s += csky_get_macro_operand (s, reg1, '\0');
5683 ++s;
5684 if (IS_CSKY_ARCH_802 (mach_flag))
5685 {
5686 csky_macro_md_assemble ("subi", reg1, "1", NULL);
5687 csky_macro_md_assemble ("cmpnei", reg1, "0", NULL);
5688 }
5689 else
5690 csky_macro_md_assemble ("decne", reg1, reg1, "1");
5691 return;
5692 }
5693
5694 /* If -mnolrw, lrw rd, imm -> movih rd, imm_hi16; ori rd, imm_lo16. */
5695
5696 static void
5697 csky_lrw (void)
5698 {
5699 char reg1[10];
5700 char imm[40];
5701 char imm_hi16[40];
5702 char imm_lo16[40];
5703
5704 char *s = csky_insn.opcode_end;
5705 s += csky_get_macro_operand (s, reg1, ',');
5706 ++s;
5707 s += csky_get_macro_operand (s, imm, '\0');
5708 ++s;
5709
5710 imm_hi16[0] = '\0';
5711 strcat (imm_hi16, "(");
5712 strcat (imm_hi16, imm);
5713 strcat (imm_hi16, ") >> 16");
5714 imm_lo16[0] = '\0';
5715 strcat (imm_lo16, "(");
5716 strcat (imm_lo16, imm);
5717 strcat (imm_lo16, ") & 0xffff");
5718
5719 csky_macro_md_assemble ("movih", reg1, imm_hi16, NULL);
5720 csky_macro_md_assemble ("ori", reg1, reg1, imm_lo16);
5721
5722 return;
5723 }
5724
5725 /* The following are worker functions for C-SKY v1. */
5726
5727 bfd_boolean
5728 v1_work_lrw (void)
5729 {
5730 int reg;
5731 int output_literal = csky_insn.val[1];
5732
5733 reg = csky_insn.val[0];
5734 csky_insn.isize = 2;
5735 csky_insn.output = frag_more (2);
5736 if (csky_insn.e1.X_op == O_constant
5737 && csky_insn.e1.X_add_number <= 0x7f
5738 && csky_insn.e1.X_add_number >= 0)
5739 /* lrw to movi. */
5740 csky_insn.inst = 0x6000 | reg | (csky_insn.e1.X_add_number << 4);
5741 else
5742 {
5743 csky_insn.inst = csky_insn.opcode->op16[0].opcode;
5744 csky_insn.inst |= reg << 8;
5745 if (output_literal)
5746 {
5747 int n = enter_literal (&csky_insn.e1, 0, 0, 0);
5748
5749 /* Create a reference to pool entry. */
5750 csky_insn.e1.X_op = O_symbol;
5751 csky_insn.e1.X_add_symbol = poolsym;
5752 csky_insn.e1.X_add_number = n << 2;
5753 }
5754
5755 if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
5756 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
5757 || insn_reloc == BFD_RELOC_CKCORE_TLS_IE32)
5758 {
5759 literal_insn_offset->tls_addend.frag = frag_now;
5760 literal_insn_offset->tls_addend.offset
5761 = (csky_insn.output
5762 - literal_insn_offset->tls_addend.frag->fr_literal);
5763 }
5764 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal, 2,
5765 &csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM8BY4);
5766 }
5767 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
5768
5769 return TRUE;
5770 }
5771
5772 bfd_boolean
5773 v1_work_fpu_fo (void)
5774 {
5775 int i = 0;
5776 int inst;
5777 int greg = -1;
5778 char buff[50];
5779 struct csky_opcode_info *opinfo = NULL;
5780
5781 if (csky_insn.isize == 4)
5782 opinfo = &csky_insn.opcode->op32[csky_insn.opcode_idx];
5783 else if (csky_insn.isize == 2)
5784 opinfo = &csky_insn.opcode->op16[csky_insn.opcode_idx];
5785
5786 /* Firstly, get general reg. */
5787 for (i = 0;i < opinfo->operand_num; i++)
5788 if (opinfo->oprnd.oprnds[i].type == OPRND_TYPE_GREG0_15)
5789 greg = csky_insn.val[i];
5790 gas_assert (greg != -1);
5791
5792 /* Secondly, get float inst. */
5793 csky_generate_insn ();
5794 inst = csky_insn.inst;
5795
5796 /* Now get greg and inst, we can write instruction to floating unit. */
5797 sprintf (buff, "lrw %s,0x%x", csky_general_reg[greg], inst);
5798 md_assemble (buff);
5799 sprintf (buff, "cpwir %s", csky_general_reg[greg]);
5800 md_assemble (buff);
5801
5802 return FALSE;
5803 }
5804
5805 bfd_boolean
5806 v1_work_fpu_fo_fc (void)
5807 {
5808 int i = 0;
5809 int inst;
5810 int greg = -1;
5811 char buff[50];
5812 struct csky_opcode_info *opinfo = NULL;
5813
5814 if (csky_insn.isize == 4)
5815 opinfo = &csky_insn.opcode->op32[csky_insn.opcode_idx];
5816 else if (csky_insn.isize == 2)
5817 opinfo = &csky_insn.opcode->op16[csky_insn.opcode_idx];
5818
5819 /* Firstly, get general reg. */
5820 for (i = 0;i < opinfo->operand_num; i++)
5821 if (opinfo->oprnd.oprnds[i].type == OPRND_TYPE_GREG0_15)
5822 greg = csky_insn.val[i];
5823 gas_assert (greg != -1);
5824
5825 /* Secondly, get float inst. */
5826 csky_generate_insn ();
5827 inst = csky_insn.inst;
5828
5829 /* Now get greg and inst, we can write instruction to floating unit. */
5830 sprintf (buff, "lrw %s,0x%x", csky_general_reg[greg], inst);
5831 md_assemble (buff);
5832 sprintf (buff, "cpwir %s", csky_general_reg[greg]);
5833 md_assemble (buff);
5834 sprintf (buff, "cprc");
5835 md_assemble (buff);
5836
5837 return FALSE;
5838 }
5839
5840 bfd_boolean
5841 v1_work_fpu_write (void)
5842 {
5843 int greg;
5844 int freg;
5845 char buff[50];
5846
5847 greg = csky_insn.val[0];
5848 freg = csky_insn.val[1];
5849
5850 /* Now get greg and freg, we can write instruction to floating unit. */
5851 sprintf (buff, "cpwgr %s,%s", csky_general_reg[greg], csky_cp_reg[freg]);
5852 md_assemble (buff);
5853
5854 return FALSE;
5855 }
5856
5857 bfd_boolean
5858 v1_work_fpu_read (void)
5859 {
5860 int greg;
5861 int freg;
5862 char buff[50];
5863
5864 greg = csky_insn.val[0];
5865 freg = csky_insn.val[1];
5866 /* Now get greg and freg, we can write instruction to floating unit. */
5867 sprintf (buff, "cprgr %s,%s", csky_general_reg[greg], csky_cp_reg[freg]);
5868 md_assemble (buff);
5869
5870 return FALSE;
5871 }
5872
5873 bfd_boolean
5874 v1_work_fpu_writed (void)
5875 {
5876 int greg;
5877 int freg;
5878 char buff[50];
5879
5880 greg = csky_insn.val[0];
5881 freg = csky_insn.val[1];
5882
5883 if (greg & 0x1)
5884 {
5885 as_bad (_("even register number required"));
5886 return FALSE;
5887 }
5888 /* Now get greg and freg, we can write instruction to floating unit. */
5889 if (target_big_endian)
5890 sprintf (buff, "cpwgr %s,%s",
5891 csky_general_reg[greg + 1], csky_cp_reg[freg]);
5892 else
5893 sprintf (buff, "cpwgr %s,%s",
5894 csky_general_reg[greg], csky_cp_reg[freg]);
5895 md_assemble (buff);
5896 if (target_big_endian)
5897 sprintf (buff, "cpwgr %s,%s",
5898 csky_general_reg[greg], csky_cp_reg[freg + 1]);
5899 else
5900 sprintf (buff, "cpwgr %s,%s",
5901 csky_general_reg[greg + 1], csky_cp_reg[freg + 1]);
5902 md_assemble (buff);
5903
5904 return FALSE;
5905 }
5906
5907 bfd_boolean
5908 v1_work_fpu_readd (void)
5909 {
5910 int greg;
5911 int freg;
5912 char buff[50];
5913
5914 greg = csky_insn.val[0];
5915 freg = csky_insn.val[1];
5916
5917 if (greg & 0x1)
5918 {
5919 as_bad (_("even register number required"));
5920 return FALSE;
5921 }
5922 /* Now get greg and freg, we can write instruction to floating unit. */
5923 if (target_big_endian)
5924 sprintf (buff, "cprgr %s,%s",
5925 csky_general_reg[greg + 1], csky_cp_reg[freg]);
5926 else
5927 sprintf (buff, "cprgr %s,%s",
5928 csky_general_reg[greg], csky_cp_reg[freg]);
5929 md_assemble (buff);
5930 if (target_big_endian)
5931 sprintf (buff, "cprgr %s,%s",
5932 csky_general_reg[greg], csky_cp_reg[freg + 1]);
5933 else
5934 sprintf (buff, "cprgr %s,%s",
5935 csky_general_reg[greg + 1], csky_cp_reg[freg + 1]);
5936 md_assemble (buff);
5937
5938 return FALSE;
5939 }
5940
5941 /* The following are for csky pseudo handling. */
5942
5943 bfd_boolean
5944 v1_work_jbsr (void)
5945 {
5946 csky_insn.output = frag_more (2);
5947 if (do_force2bsr)
5948 /* Generate fixup BFD_RELOC_CKCORE_PCREL_IMM11BY2. */
5949 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
5950 2, & csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM11BY2);
5951 else
5952 {
5953 /* Using jsri instruction. */
5954 const char *name = "jsri";
5955 csky_insn.opcode = (struct csky_opcode *)
5956 hash_find (csky_opcodes_hash, name);
5957 csky_insn.opcode_idx = 0;
5958 csky_insn.isize = 2;
5959
5960 int n = enter_literal (&csky_insn.e1, 1, 0, 0);
5961
5962 /* Create a reference to pool entry. */
5963 csky_insn.e1.X_op = O_symbol;
5964 csky_insn.e1.X_add_symbol = poolsym;
5965 csky_insn.e1.X_add_number = n << 2;
5966
5967 /* Generate fixup BFD_RELOC_CKCORE_PCREL_IMM8BY4. */
5968 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
5969 2, & csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM8BY4);
5970
5971 if (csky_insn.e1.X_op != O_absent && do_jsri2bsr)
5972 /* Generate fixup BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2. */
5973 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
5974 2, & (litpool + (csky_insn.e1.X_add_number >> 2))->e,
5975 1, BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2);
5976 }
5977 csky_generate_insn ();
5978
5979 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
5980
5981 return TRUE;
5982 }
5983
5984 /* The following are worker functions for csky v2 instruction handling. */
5985
5986 /* For nie/nir/ipush/ipop. */
5987
5988 bfd_boolean
5989 v2_work_istack (void)
5990 {
5991 if (!do_intr_stack)
5992 {
5993 csky_show_error (ERROR_OPCODE_ILLEGAL, 0, NULL, NULL);
5994 return FALSE;
5995 }
5996 csky_insn.output = frag_more (csky_insn.isize);
5997 csky_insn.inst = csky_insn.opcode->op16[0].opcode;
5998 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
5999 return TRUE;
6000 }
6001
6002 bfd_boolean
6003 v2_work_btsti (void)
6004 {
6005 if (!do_extend_lrw
6006 && (csky_insn.flag_force == INSN_OPCODE16F
6007 || IS_CSKY_ARCH_801 (mach_flag)))
6008 {
6009 csky_show_error (ERROR_OPCODE_ILLEGAL, 0, NULL, NULL);
6010 return FALSE;
6011 }
6012 if (!do_extend_lrw && csky_insn.isize == 2)
6013 csky_insn.isize = 4;
6014 /* Generate relax or reloc if necessary. */
6015 csky_generate_frags ();
6016 /* Generate the insn by mask. */
6017 csky_generate_insn ();
6018 /* Write inst to frag. */
6019 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6020 return TRUE;
6021 }
6022
6023 bfd_boolean
6024 v2_work_addi (void)
6025 {
6026 csky_insn.isize = 2;
6027 if (csky_insn.number == 2)
6028 {
6029 if (csky_insn.val[0] == 14
6030 && csky_insn.val[1] >= 0 && csky_insn.val[1] <= 0x1fc
6031 && (csky_insn.val[1] & 0x3) == 0
6032 && csky_insn.flag_force != INSN_OPCODE32F)
6033 {
6034 /* addi sp, sp, imm. */
6035 csky_insn.inst = 0x1400 | ((csky_insn.val[1] >> 2) & 0x1f);
6036 csky_insn.inst |= (csky_insn.val[1] << 1) & 0x300;
6037 csky_insn.output = frag_more (2);
6038 }
6039 else if (csky_insn.val[0] < 8
6040 && csky_insn.val[1] >= 1 && csky_insn.val[1] <= 0x100
6041 && csky_insn.flag_force != INSN_OPCODE32F)
6042 {
6043 csky_insn.inst = 0x2000 | (csky_insn.val[0] << 8);
6044 csky_insn.inst |= (csky_insn.val[1] - 1);
6045 csky_insn.output = frag_more (2);
6046 }
6047 else if (csky_insn.val[1] >= 1 && csky_insn.val[1] <= 0x10000
6048 && csky_insn.flag_force != INSN_OPCODE16F
6049 && !IS_CSKY_ARCH_801 (mach_flag))
6050 {
6051 csky_insn.inst = 0xe4000000 | (csky_insn.val[0] << 21);
6052 csky_insn.inst |= csky_insn.val[0] << 16;
6053 csky_insn.inst |= (csky_insn.val[1] - 1);
6054 csky_insn.isize = 4;
6055 csky_insn.output = frag_more (4);
6056 }
6057 else
6058 {
6059 csky_show_error (ERROR_OPERANDS_ILLEGAL, 0,
6060 csky_insn.opcode_end, NULL);
6061 return FALSE;
6062 }
6063 }
6064 else if (csky_insn.number == 3)
6065 {
6066 if (csky_insn.val[0] == 14
6067 && csky_insn.val[1] == 14
6068 && csky_insn.val[2] >= 0 && csky_insn.val[2] <= 0x1fc
6069 && (csky_insn.val[2] & 0x3) == 0
6070 && csky_insn.flag_force != INSN_OPCODE32F)
6071 {
6072 csky_insn.inst = 0x1400 | ((csky_insn.val[2] >> 2) & 0x1f);
6073 csky_insn.inst |= (csky_insn.val[2] << 1) & 0x300;
6074 csky_insn.output = frag_more (2);
6075 }
6076 else if (csky_insn.val[0] < 8
6077 && csky_insn.val[1] == 14
6078 && csky_insn.val[2] >= 0 && csky_insn.val[2] <= 0x3fc
6079 && (csky_insn.val[2] & 0x3) == 0
6080 && csky_insn.flag_force != INSN_OPCODE32F)
6081 {
6082 csky_insn.inst = 0x1800 | (csky_insn.val[0] << 8);
6083 csky_insn.inst |= csky_insn.val[2] >> 2;
6084 csky_insn.output = frag_more (2);
6085 }
6086 else if (csky_insn.val[0] < 8
6087 && csky_insn.val[0] == csky_insn.val[1]
6088 && csky_insn.val[2] >= 1 && csky_insn.val[2] <= 0x100
6089 && csky_insn.flag_force != INSN_OPCODE32F)
6090 {
6091 csky_insn.inst = 0x2000 | (csky_insn.val[0] << 8);
6092 csky_insn.inst |= (csky_insn.val[2] - 1);
6093 csky_insn.output = frag_more (2);
6094 }
6095 else if (csky_insn.val[0] < 8
6096 && csky_insn.val[1] < 8
6097 && csky_insn.val[2] >= 1 && csky_insn.val[2] <= 0x8
6098 && csky_insn.flag_force != INSN_OPCODE32F)
6099 {
6100 csky_insn.inst = 0x5802 | (csky_insn.val[0] << 5);
6101 csky_insn.inst |= csky_insn.val[1] << 8;
6102 csky_insn.inst |= (csky_insn.val[2] - 1) << 2;
6103 csky_insn.output = frag_more (2);
6104 }
6105 else if (csky_insn.val[1] == 28
6106 && csky_insn.val[2] >= 1 && csky_insn.val[2] <= 0x40000
6107 && csky_insn.flag_force != INSN_OPCODE16F
6108 && !IS_CSKY_ARCH_801 (mach_flag))
6109 {
6110 csky_insn.inst = 0xcc1c0000 | (csky_insn.val[0] << 21);
6111 csky_insn.isize = 4;
6112 csky_insn.output = frag_more (4);
6113 if (insn_reloc == BFD_RELOC_CKCORE_GOTOFF)
6114 {
6115 fix_new_exp (frag_now, csky_insn.output-frag_now->fr_literal,
6116 4, &csky_insn.e1, 0, BFD_RELOC_CKCORE_GOTOFF_IMM18);
6117 }
6118 else
6119 csky_insn.inst |= (csky_insn.val[2] - 1);
6120 }
6121 else if (csky_insn.val[2] >= 1 && csky_insn.val[2] <= 0x1000
6122 && csky_insn.flag_force != INSN_OPCODE16F
6123 && !IS_CSKY_ARCH_801 (mach_flag))
6124 {
6125 csky_insn.inst = 0xe4000000 | (csky_insn.val[0] << 21);
6126 csky_insn.inst |= csky_insn.val[1] << 16;
6127 csky_insn.inst |= (csky_insn.val[2] - 1);
6128 csky_insn.isize = 4;
6129 csky_insn.output = frag_more (4);
6130 }
6131 else
6132 {
6133 csky_show_error (ERROR_OPERANDS_ILLEGAL, 0,
6134 (char *)csky_insn.opcode_end, NULL);
6135 return FALSE;
6136 }
6137 }
6138 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6139
6140 return TRUE;
6141 }
6142
6143 bfd_boolean
6144 v2_work_subi (void)
6145 {
6146 csky_insn.isize = 2;
6147 if (csky_insn.number == 2)
6148 {
6149 if (csky_insn.val[0] == 14
6150 && csky_insn.val[1] >= 0 && csky_insn.val[2] <= 0x1fc
6151 && (csky_insn.val[1] & 0x3) == 0
6152 && csky_insn.flag_force != INSN_OPCODE32F)
6153 {
6154 csky_insn.inst = 0x1420 | ((csky_insn.val[1] >> 2) & 0x1f);
6155 csky_insn.inst |= (csky_insn.val[1] << 1) & 0x300;
6156 }
6157 else if (csky_insn.val[0] < 8
6158 && csky_insn.val[1] >= 1 && csky_insn.val[1] <= 0x100
6159 && csky_insn.flag_force != INSN_OPCODE32F)
6160 {
6161 csky_insn.inst = 0x2800 | (csky_insn.val[0] << 8);
6162 csky_insn.inst |= (csky_insn.val[1] - 1);
6163 }
6164 else if (csky_insn.val[1] >= 1 && csky_insn.val[1] <= 0x10000
6165 && csky_insn.flag_force != INSN_OPCODE16F
6166 && !IS_CSKY_ARCH_801 (mach_flag))
6167 {
6168 csky_insn.inst = 0xe4001000 | (csky_insn.val[0] << 21);
6169 csky_insn.inst |= csky_insn.val[0] << 16;
6170 csky_insn.inst |= (csky_insn.val[1] - 1);
6171 csky_insn.isize = 4;
6172 }
6173 else
6174 {
6175 csky_show_error (ERROR_OPERANDS_ILLEGAL, 0,
6176 (char *)csky_insn.opcode_end, NULL);
6177 return FALSE;
6178 }
6179 }
6180 else if (csky_insn.number == 3)
6181 {
6182 if (csky_insn.val[0] == 14
6183 && csky_insn.val[1] == 14
6184 && csky_insn.val[2] >= 0 && csky_insn.val[2] <= 0x1fc
6185 && (csky_insn.val[2] & 0x3) == 0
6186 && csky_insn.flag_force != INSN_OPCODE32F)
6187 {
6188 csky_insn.inst = 0x1420 | ((csky_insn.val[2] >> 2) & 0x1f);
6189 csky_insn.inst |= (csky_insn.val[2] << 1) & 0x300;
6190 }
6191
6192 else if (csky_insn.val[0] < 8
6193 && csky_insn.val[0] == csky_insn.val[1]
6194 && csky_insn.val[2] >= 1 && csky_insn.val[2] <= 0x100
6195 && csky_insn.flag_force != INSN_OPCODE32F)
6196 {
6197 csky_insn.inst = 0x2800 | (csky_insn.val[0] << 8);
6198 csky_insn.inst |= (csky_insn.val[2] - 1);
6199 }
6200 else if (csky_insn.val[0] < 8
6201 && csky_insn.val[1] < 8
6202 && csky_insn.val[2] >= 1 && csky_insn.val[2] <= 0x8
6203 && csky_insn.flag_force != INSN_OPCODE32F)
6204 {
6205 csky_insn.inst = 0x5803 | (csky_insn.val[0] << 5);
6206 csky_insn.inst |= csky_insn.val[1] << 8;
6207 csky_insn.inst |= (csky_insn.val[2] - 1) << 2;
6208 }
6209 else if (csky_insn.val[2] >= 1 && csky_insn.val[2] <= 0x1000
6210 && csky_insn.flag_force != INSN_OPCODE16F
6211 && !IS_CSKY_ARCH_801 (mach_flag))
6212 {
6213 csky_insn.inst = 0xe4001000 | (csky_insn.val[0] << 21);
6214 csky_insn.inst |= csky_insn.val[1] << 16;
6215 csky_insn.inst |= (csky_insn.val[2] - 1);
6216 csky_insn.isize = 4;
6217 }
6218 else
6219 {
6220 csky_show_error (ERROR_OPERANDS_ILLEGAL, 0,
6221 (char *)csky_insn.opcode_end, NULL);
6222 return FALSE;
6223 }
6224 }
6225 csky_insn.output = frag_more (csky_insn.isize);
6226 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6227
6228 return TRUE;
6229 }
6230
6231 bfd_boolean
6232 v2_work_add_sub (void)
6233 {
6234 if (csky_insn.number == 3
6235 && (csky_insn.val[0] == csky_insn.val[1]
6236 || csky_insn.val[0] == csky_insn.val[2])
6237 && csky_insn.val[0] <= 15
6238 && csky_insn.val[1] <= 15
6239 && csky_insn.val[2] <= 15)
6240 {
6241 if (!strstr (csky_insn.opcode->mnemonic, "sub")
6242 || csky_insn.val[0] == csky_insn.val[1])
6243 {
6244 csky_insn.opcode_idx = 0;
6245 csky_insn.isize = 2;
6246 if (csky_insn.val[0] == csky_insn.val[1])
6247 csky_insn.val[1] = csky_insn.val[2];
6248
6249 csky_insn.number = 2;
6250
6251 }
6252 }
6253 if (csky_insn.isize == 4
6254 && IS_CSKY_ARCH_801 (mach_flag))
6255 {
6256 if (csky_insn.number == 3)
6257 {
6258 if (csky_insn.val[0] > 7)
6259 csky_show_error (ERROR_REG_OVER_RANGE, 1,
6260 (void *)(long)csky_insn.val[0], NULL);
6261 if (csky_insn.val[1] > 7)
6262 csky_show_error (ERROR_REG_OVER_RANGE, 2,
6263 (void *)(long)csky_insn.val[1], NULL);
6264 if (csky_insn.val[2] > 7)
6265 csky_show_error (ERROR_REG_OVER_RANGE, 3,
6266 (void *)(long)csky_insn.val[2], NULL);
6267 }
6268 else
6269 {
6270 if (csky_insn.val[0] > 15)
6271 csky_show_error (ERROR_REG_OVER_RANGE, 1,
6272 (void *)(long)csky_insn.val[0], NULL);
6273 if (csky_insn.val[1] > 15)
6274 csky_show_error (ERROR_REG_OVER_RANGE, 2,
6275 (void *)(long)csky_insn.val[1], NULL);
6276 }
6277 return FALSE;
6278 }
6279 /* sub rz, rx. */
6280 /* Generate relax or reloc if necessary. */
6281 csky_generate_frags ();
6282 /* Generate the insn by mask. */
6283 csky_generate_insn ();
6284 /* Write inst to frag. */
6285 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6286 return TRUE;
6287 }
6288
6289 bfd_boolean
6290 v2_work_rotlc (void)
6291 {
6292 const char *name = "addc";
6293 csky_insn.opcode
6294 = (struct csky_opcode *) hash_find (csky_opcodes_hash, name);
6295 csky_insn.opcode_idx = 0;
6296 if (csky_insn.isize == 2)
6297 {
6298 /* addc rz, rx. */
6299 csky_insn.number = 2;
6300 csky_insn.val[1] = csky_insn.val[0];
6301 }
6302 else
6303 {
6304 csky_insn.number = 3;
6305 /* addc rz, rx, ry. */
6306 csky_insn.val[1] = csky_insn.val[0];
6307 csky_insn.val[2] = csky_insn.val[0];
6308 }
6309 /* Generate relax or reloc if necessary. */
6310 csky_generate_frags ();
6311 /* Generate the insn by mask. */
6312 csky_generate_insn ();
6313 /* Write inst to frag. */
6314 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6315 return TRUE;
6316 }
6317
6318 bfd_boolean
6319 v2_work_bgeni (void)
6320 {
6321 const char *name = NULL;
6322 int imm = csky_insn.val[1];
6323 int val = 1 << imm;
6324 if (imm < 16)
6325 name = "movi";
6326 else
6327 {
6328 name = "movih";
6329 val >>= 16;
6330 }
6331 csky_insn.opcode
6332 = (struct csky_opcode *) hash_find (csky_opcodes_hash, name);
6333 csky_insn.opcode_idx = 0;
6334 csky_insn.val[1] = val;
6335
6336 /* Generate relax or reloc if necessary. */
6337 csky_generate_frags ();
6338 /* Generate the insn by mask. */
6339 csky_generate_insn ();
6340 /* Write inst to frag. */
6341 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6342 return TRUE;
6343 }
6344
6345 bfd_boolean
6346 v2_work_not (void)
6347 {
6348 const char *name = "nor";
6349 csky_insn.opcode
6350 = (struct csky_opcode *) hash_find (csky_opcodes_hash, name);
6351 csky_insn.opcode_idx = 0;
6352 if (csky_insn.number == 1)
6353 {
6354 csky_insn.val[1] = csky_insn.val[0];
6355 if (csky_insn.val[0] < 16)
6356 {
6357 /* 16 bits nor rz, rz. */
6358 csky_insn.number = 2;
6359 csky_insn.isize = 2;
6360 }
6361 else
6362 {
6363 csky_insn.val[2] = csky_insn.val[0];
6364 csky_insn.number = 3;
6365 csky_insn.isize = 4;
6366 }
6367 }
6368 if (csky_insn.number == 2)
6369 {
6370 if (csky_insn.val[0] == csky_insn.val[1]
6371 && csky_insn.val[0] < 16)
6372 {
6373 /* 16 bits nor rz, rz. */
6374 csky_insn.number = 2;
6375 csky_insn.isize = 2;
6376 }
6377 else
6378 {
6379 csky_insn.val[2] = csky_insn.val[1];
6380 csky_insn.number = 3;
6381 csky_insn.isize = 4;
6382 }
6383 }
6384
6385 /* Generate relax or reloc if necessary. */
6386 csky_generate_frags ();
6387 /* Generate the insn by mask. */
6388 csky_generate_insn ();
6389 /* Write inst to frag. */
6390 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6391 return TRUE;
6392 }
6393
6394 bfd_boolean
6395 v2_work_jbtf (void)
6396 {
6397 if (csky_insn.e1.X_add_symbol == NULL || csky_insn.e1.X_op == O_constant)
6398 {
6399 csky_show_error (ERROR_UNDEFINE, 0, (void *)"operand is invalid", NULL);
6400 return FALSE;
6401 }
6402
6403 if (IS_CSKY_ARCH_801 (mach_flag))
6404 {
6405 /* CK801 doesn't have 32-bit bt/bf insns or a jump insn with a
6406 range larger than SCOND_DISP16. Relax to a short jump around
6407 an unconditional branch, and give up if that overflows too. */
6408 csky_insn.output = frag_var (rs_machine_dependent,
6409 SCOND_DISP16_LEN,
6410 SCOND_DISP10_LEN,
6411 SCOND_DISP10,
6412 csky_insn.e1.X_add_symbol,
6413 csky_insn.e1.X_add_number,
6414 0);
6415 csky_insn.isize = 2;
6416 csky_insn.max = SCOND_DISP16_LEN;
6417 csky_insn.inst = csky_insn.opcode->op16[0].opcode;
6418 }
6419 else if (do_long_jump && !IS_CSKY_ARCH_802 (mach_flag))
6420 {
6421 /* Generate relax with jcondition.
6422 Note that CK802 doesn't support the JMPI instruction so
6423 we cannot relax to a jump with a 32-bit offset. */
6424 csky_insn.output = frag_var (rs_machine_dependent,
6425 JCOND_DISP32_LEN,
6426 JCOND_DISP10_LEN,
6427 JCOND_DISP10,
6428 csky_insn.e1.X_add_symbol,
6429 csky_insn.e1.X_add_number,
6430 0);
6431 csky_insn.isize = 2;
6432 csky_insn.max = JCOND_DISP32_LEN;
6433 csky_insn.inst = csky_insn.opcode->op16[0].opcode;
6434 }
6435 else
6436 {
6437 /* Generate relax with condition. */
6438 csky_insn.output = frag_var (rs_machine_dependent,
6439 COND_DISP16_LEN,
6440 COND_DISP10_LEN,
6441 COND_DISP10,
6442 csky_insn.e1.X_add_symbol,
6443 csky_insn.e1.X_add_number,
6444 0);
6445 csky_insn.isize = 2;
6446 csky_insn.max = COND_DISP16_LEN;
6447 csky_insn.inst = csky_insn.opcode->op16[0].opcode;
6448 }
6449 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6450
6451 return TRUE;
6452 }
6453
6454 bfd_boolean
6455 v2_work_jbr (void)
6456 {
6457 if (csky_insn.e1.X_add_symbol == NULL || csky_insn.e1.X_op == O_constant)
6458 {
6459 csky_show_error (ERROR_UNDEFINE, 0, (void *)"operand is invalid", NULL);
6460 return FALSE;
6461 }
6462
6463 if (do_long_jump
6464 && !IS_CSKY_ARCH_801 (mach_flag)
6465 && !IS_CSKY_ARCH_802 (mach_flag))
6466 {
6467 csky_insn.output = frag_var (rs_machine_dependent,
6468 JUNCD_DISP32_LEN,
6469 JUNCD_DISP10_LEN,
6470 JUNCD_DISP10,
6471 csky_insn.e1.X_add_symbol,
6472 csky_insn.e1.X_add_number,
6473 0);
6474
6475 csky_insn.inst = csky_insn.opcode->op16[0].opcode;
6476 csky_insn.max = JUNCD_DISP32_LEN;
6477 csky_insn.isize = 2;
6478 }
6479 else
6480 {
6481 /* Generate relax with condition. */
6482 csky_insn.output = frag_var (rs_machine_dependent,
6483 UNCD_DISP16_LEN,
6484 UNCD_DISP10_LEN,
6485 UNCD_DISP10,
6486 csky_insn.e1.X_add_symbol,
6487 csky_insn.e1.X_add_number,
6488 0);
6489 csky_insn.isize = 2;
6490 csky_insn.max = UNCD_DISP16_LEN;
6491 csky_insn.inst = csky_insn.opcode->op16[0].opcode;
6492
6493 }
6494 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6495 return TRUE;
6496 }
6497
6498 #define SIZE_V2_MOVI16(x) ((addressT)x <= 0xff)
6499 #define SIZE_V2_MOVI32(x) ((addressT)x <= 0xffff)
6500 #define SIZE_V2_MOVIH(x) ((addressT)x <= 0xffffffff && (((addressT)x & 0xffff) == 0))
6501
6502 bfd_boolean
6503 v2_work_lrw (void)
6504 {
6505 int reg = csky_insn.val[0];
6506 int output_literal = csky_insn.val[1];
6507 int is_done = 0;
6508
6509 /* If the second operand is O_constant, We can use movi/movih
6510 instead of lrw. */
6511 if (csky_insn.e1.X_op == O_constant)
6512 {
6513 /* 801 only has movi16. */
6514 if (SIZE_V2_MOVI16 (csky_insn.e1.X_add_number) && reg < 8)
6515 {
6516 /* movi16 instead. */
6517 csky_insn.output = frag_more (2);
6518 csky_insn.inst = (CSKYV2_INST_MOVI16 | (reg << 8)
6519 | (csky_insn.e1.X_add_number));
6520 csky_insn.isize = 2;
6521 is_done = 1;
6522 }
6523 else if (SIZE_V2_MOVI32 (csky_insn.e1.X_add_number)
6524 && !IS_CSKY_ARCH_801 (mach_flag))
6525 {
6526 /* movi32 instead. */
6527 csky_insn.output = frag_more (4);
6528 csky_insn.inst = (CSKYV2_INST_MOVI32 | (reg << 16)
6529 | (csky_insn.e1.X_add_number));
6530 csky_insn.isize = 4;
6531 is_done = 1;
6532 }
6533 else if (SIZE_V2_MOVIH (csky_insn.e1.X_add_number)
6534 && !IS_CSKY_ARCH_801 (mach_flag))
6535 {
6536 /* movih instead. */
6537 csky_insn.output = frag_more (4);
6538 csky_insn.inst = (CSKYV2_INST_MOVIH | (reg << 16)
6539 | ((csky_insn.e1.X_add_number >> 16) & 0xffff));
6540 csky_insn.isize = 4;
6541 is_done = 1;
6542 }
6543 }
6544
6545 if (is_done)
6546 {
6547 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6548 return TRUE;
6549 }
6550
6551 if (output_literal)
6552 {
6553 int n = enter_literal (&csky_insn.e1, 0, 0, 0);
6554 /* Create a reference to pool entry. */
6555 csky_insn.e1.X_op = O_symbol;
6556 csky_insn.e1.X_add_symbol = poolsym;
6557 csky_insn.e1.X_add_number = n << 2;
6558 }
6559 /* If 16bit force. */
6560 if (csky_insn.flag_force == INSN_OPCODE16F)
6561 {
6562 /* Generate fixup. */
6563 if (reg > 7)
6564 {
6565 csky_show_error (ERROR_UNDEFINE, 0,
6566 (void *)"The register is out of range.", NULL);
6567 return FALSE;
6568 }
6569 csky_insn.isize = 2;
6570 csky_insn.output = frag_more (2);
6571
6572 if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
6573 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
6574 || insn_reloc == BFD_RELOC_CKCORE_TLS_IE32)
6575 {
6576 literal_insn_offset->tls_addend.frag = frag_now;
6577 literal_insn_offset->tls_addend.offset
6578 = csky_insn.output - frag_now->fr_literal;
6579 }
6580 csky_insn.inst = csky_insn.opcode->op16[0].opcode | (reg << 5);
6581 csky_insn.max = 4;
6582 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6583 2, &csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM7BY4);
6584 }
6585 else if (csky_insn.flag_force == INSN_OPCODE32F)
6586 {
6587 csky_insn.isize = 4;
6588 csky_insn.output = frag_more (4);
6589 if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
6590 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
6591 || insn_reloc == BFD_RELOC_CKCORE_TLS_IE32)
6592 {
6593 literal_insn_offset->tls_addend.frag = frag_now;
6594 literal_insn_offset->tls_addend.offset
6595 = csky_insn.output - frag_now->fr_literal;
6596 }
6597 csky_insn.inst = csky_insn.opcode->op32[0].opcode | (reg << 16);
6598 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6599 4, &csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM16BY4);
6600 }
6601 else if (!is_done)
6602 {
6603 if (reg < 8)
6604 {
6605 csky_insn.isize = 2;
6606
6607 if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
6608 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
6609 || insn_reloc == BFD_RELOC_CKCORE_TLS_IE32)
6610 literal_insn_offset->tls_addend.frag = frag_now;
6611
6612 csky_insn.output = frag_var (rs_machine_dependent,
6613 LRW_DISP16_LEN,
6614 LRW_DISP7_LEN,
6615 (do_extend_lrw
6616 ? LRW2_DISP8 : LRW_DISP7),
6617 csky_insn.e1.X_add_symbol,
6618 csky_insn.e1.X_add_number, 0);
6619 if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
6620 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
6621 || insn_reloc == BFD_RELOC_CKCORE_TLS_IE32)
6622 {
6623 if (literal_insn_offset->tls_addend.frag->fr_next != frag_now)
6624 literal_insn_offset->tls_addend.frag
6625 = literal_insn_offset->tls_addend.frag->fr_next;
6626 literal_insn_offset->tls_addend.offset
6627 = (csky_insn.output
6628 - literal_insn_offset->tls_addend.frag->fr_literal);
6629 }
6630 csky_insn.inst = csky_insn.opcode->op16[0].opcode | (reg << 5);
6631 csky_insn.max = LRW_DISP16_LEN;
6632 csky_insn.isize = 2;
6633 }
6634 else
6635 {
6636 csky_insn.isize = 4;
6637 csky_insn.output = frag_more (4);
6638 if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
6639 || insn_reloc == BFD_RELOC_CKCORE_TLS_LDM32
6640 || insn_reloc == BFD_RELOC_CKCORE_TLS_IE32)
6641 {
6642 literal_insn_offset->tls_addend.frag = frag_now;
6643 literal_insn_offset->tls_addend.offset
6644 = csky_insn.output - frag_now->fr_literal;
6645 }
6646 csky_insn.inst = csky_insn.opcode->op32[0].opcode | (reg << 16);
6647 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6648 4, &csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM16BY4);
6649 }
6650 }
6651
6652 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6653 return TRUE;
6654 }
6655
6656 bfd_boolean
6657 v2_work_lrsrsw (void)
6658 {
6659 int reg = csky_insn.val[0];
6660 csky_insn.output = frag_more (4);
6661 csky_insn.inst = csky_insn.opcode->op32[0].opcode | (reg << 21);
6662 csky_insn.isize = 4;
6663
6664 switch (insn_reloc)
6665 {
6666 case BFD_RELOC_CKCORE_GOT32:
6667 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6668 4, &csky_insn.e1, 0, BFD_RELOC_CKCORE_GOT_IMM18BY4);
6669 break;
6670 case BFD_RELOC_CKCORE_PLT32:
6671 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6672 4, &csky_insn.e1, 0, BFD_RELOC_CKCORE_PLT_IMM18BY4);
6673 break;
6674 default:
6675 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6676 4, &csky_insn.e1, 1, BFD_RELOC_CKCORE_DOFFSET_IMM18BY4);
6677 break;
6678 }
6679 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6680 return TRUE;
6681 }
6682
6683 bfd_boolean
6684 v2_work_jbsr (void)
6685 {
6686 if (do_force2bsr
6687 || IS_CSKY_ARCH_801 (mach_flag)
6688 || IS_CSKY_ARCH_802 (mach_flag))
6689 {
6690 csky_insn.output = frag_more (4);
6691 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6692 4, &csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM26BY2);
6693 csky_insn.isize = 4;
6694 csky_insn.inst = CSKYV2_INST_BSR32;
6695 }
6696 else
6697 {
6698 int n = enter_literal (&csky_insn.e1, 0, 0, 0);
6699 csky_insn.output = frag_more (4);
6700 csky_insn.e1.X_op = O_symbol;
6701 csky_insn.e1.X_add_symbol = poolsym;
6702 csky_insn.e1.X_add_number = n << 2;
6703 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6704 4, &csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM16BY4);
6705 if (do_jsri2bsr || IS_CSKY_ARCH_810 (mach_flag))
6706 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6707 4,
6708 &(litpool + (csky_insn.e1.X_add_number >> 2))->e,
6709 1,
6710 BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2);
6711 csky_insn.inst = CSKYV2_INST_JSRI32;
6712 csky_insn.isize = 4;
6713 if (IS_CSKY_ARCH_810 (mach_flag))
6714 {
6715 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6716 csky_insn.output = frag_more (4);
6717 dwarf2_emit_insn (0);
6718 /* Insert "mov r0, r0". */
6719 csky_insn.inst = CSKYV2_INST_MOV_R0_R0;
6720 csky_insn.max = 8;
6721 }
6722 }
6723 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6724
6725 return TRUE;
6726 }
6727
6728 bfd_boolean
6729 v2_work_jsri (void)
6730 {
6731 /* dump literal. */
6732 int n = enter_literal (&csky_insn.e1, 1, 0, 0);
6733 csky_insn.e1.X_op = O_symbol;
6734 csky_insn.e1.X_add_symbol = poolsym;
6735 csky_insn.e1.X_add_number = n << 2;
6736
6737 /* Generate relax or reloc if necessary. */
6738 csky_generate_frags ();
6739 /* Generate the insn by mask. */
6740 csky_generate_insn ();
6741 /* Write inst to frag. */
6742 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6743 /* Control 810 not to generate jsri. */
6744 if (IS_CSKY_ARCH_810 (mach_flag))
6745 {
6746 /* Look at adding the R_PCREL_JSRIMM26BY2.
6747 For 'jbsr .L1', this reloc type's symbol
6748 is bound to '.L1', isn't bound to literal pool. */
6749 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6750 4, &(litpool + (csky_insn.e1.X_add_number >> 2))->e, 1,
6751 BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2);
6752 csky_insn.output = frag_more (4);
6753 dwarf2_emit_insn (0);
6754 /* The opcode of "mov32 r0,r0". */
6755 csky_insn.inst = CSKYV2_INST_MOV_R0_R0;
6756 /* The effect of this value is to check literal. */
6757 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6758 csky_insn.max = 8;
6759 }
6760 return TRUE;
6761 }
6762
6763 bfd_boolean
6764 v2_work_movih (void)
6765 {
6766 int rz = csky_insn.val[0];
6767 csky_insn.output = frag_more (4);
6768 csky_insn.inst = csky_insn.opcode->op32[0].opcode | (rz << 16);
6769 if (csky_insn.e1.X_op == O_constant)
6770 {
6771 if (csky_insn.e1.X_unsigned == 1 && csky_insn.e1.X_add_number > 0xffff)
6772 {
6773 csky_show_error (ERROR_IMM_OVERFLOW, 2, NULL, NULL);
6774 return FALSE;
6775 }
6776 else if (csky_insn.e1.X_unsigned == 0 && csky_insn.e1.X_add_number < 0)
6777 {
6778 csky_show_error (ERROR_IMM_OVERFLOW, 2, NULL, NULL);
6779 return FALSE;
6780 }
6781 else
6782 csky_insn.inst |= (csky_insn.e1.X_add_number & 0xffff);
6783 }
6784 else if (csky_insn.e1.X_op == O_right_shift
6785 || (csky_insn.e1.X_op == O_symbol && insn_reloc != BFD_RELOC_NONE))
6786 {
6787 if (csky_insn.e1.X_op_symbol != 0
6788 && symbol_constant_p (csky_insn.e1.X_op_symbol)
6789 && S_GET_SEGMENT (csky_insn.e1.X_op_symbol) == absolute_section
6790 && 16 == S_GET_VALUE (csky_insn.e1.X_op_symbol))
6791 {
6792 csky_insn.e1.X_op = O_symbol;
6793 if (insn_reloc == BFD_RELOC_CKCORE_GOT32)
6794 insn_reloc = BFD_RELOC_CKCORE_GOT_HI16;
6795 else if (insn_reloc == BFD_RELOC_CKCORE_PLT32)
6796 insn_reloc = BFD_RELOC_CKCORE_PLT_HI16;
6797 else if (insn_reloc == BFD_RELOC_CKCORE_GOTPC)
6798 insn_reloc = BFD_RELOC_CKCORE_GOTPC_HI16;
6799 else if (insn_reloc == BFD_RELOC_CKCORE_GOTOFF)
6800 insn_reloc = BFD_RELOC_CKCORE_GOTOFF_HI16;
6801 else
6802 insn_reloc = BFD_RELOC_CKCORE_ADDR_HI16;
6803 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6804 4, &csky_insn.e1, 0, insn_reloc);
6805 }
6806 else
6807 {
6808 void *arg = (void *)"the second operand must be \"SYMBOL >> 16\"";
6809 csky_show_error (ERROR_UNDEFINE, 0, arg, NULL);
6810 return FALSE;
6811 }
6812 }
6813 csky_insn.isize = 4;
6814 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6815
6816 return TRUE;
6817 }
6818
6819 bfd_boolean
6820 v2_work_ori (void)
6821 {
6822 int rz = csky_insn.val[0];
6823 int rx = csky_insn.val[1];
6824 csky_insn.output = frag_more (4);
6825 csky_insn.inst = csky_insn.opcode->op32[0].opcode | (rz << 21) | (rx << 16);
6826 if (csky_insn.e1.X_op == O_constant)
6827 {
6828 if (csky_insn.e1.X_add_number <= 0xffff
6829 && csky_insn.e1.X_add_number >= 0)
6830 csky_insn.inst |= csky_insn.e1.X_add_number;
6831 else
6832 {
6833 csky_show_error (ERROR_IMM_OVERFLOW, 3, NULL, NULL);
6834 return FALSE;
6835 }
6836 }
6837 else if (csky_insn.e1.X_op == O_bit_and)
6838 {
6839 if (symbol_constant_p (csky_insn.e1.X_op_symbol)
6840 && S_GET_SEGMENT (csky_insn.e1.X_op_symbol) == absolute_section
6841 && 0xffff == S_GET_VALUE (csky_insn.e1.X_op_symbol))
6842 {
6843 csky_insn.e1.X_op = O_symbol;
6844 if (insn_reloc == BFD_RELOC_CKCORE_GOT32)
6845 insn_reloc = BFD_RELOC_CKCORE_GOT_LO16;
6846 else if (insn_reloc == BFD_RELOC_CKCORE_PLT32)
6847 insn_reloc = BFD_RELOC_CKCORE_PLT_LO16;
6848 else if (insn_reloc == BFD_RELOC_CKCORE_GOTPC)
6849 insn_reloc = BFD_RELOC_CKCORE_GOTPC_LO16;
6850 else if (insn_reloc == BFD_RELOC_CKCORE_GOTOFF)
6851 insn_reloc = BFD_RELOC_CKCORE_GOTOFF_LO16;
6852 else
6853 insn_reloc = BFD_RELOC_CKCORE_ADDR_LO16;
6854 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6855 4, &csky_insn.e1, 0, insn_reloc);
6856 }
6857 else
6858 {
6859 void *arg = (void *)"the third operand must be \"SYMBOL & 0xffff\"";
6860 csky_show_error (ERROR_UNDEFINE, 0, arg, NULL);
6861 return FALSE;
6862 }
6863 }
6864 csky_insn.isize = 4;
6865 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6866 return TRUE;
6867 }
6868
6869 /* Helper function to encode a single/double floating point constant
6870 into the instruction word for fmovis and fmovid instructions.
6871 The constant is in its IEEE single/double precision representation
6872 and is repacked into the internal 13-bit representation for these
6873 instructions with a diagnostic for overflow. Note that there is no
6874 rounding when converting to the smaller format, just an error if there
6875 is excess precision or the number is too small/large to be represented. */
6876
6877 bfd_boolean
6878 float_work_fmovi (void)
6879 {
6880 int rx = csky_insn.val[0];
6881
6882 /* We already converted the float constant to the internal 13-bit
6883 representation so we just need to OR it in here. */
6884 csky_insn.inst = csky_insn.opcode->op32[0].opcode | rx;
6885 csky_insn.inst |= (uint32_t) csky_insn.e1.X_add_number;
6886
6887 csky_insn.output = frag_more (4);
6888 csky_insn.isize = 4;
6889 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6890 return TRUE;
6891 }
6892
6893 bfd_boolean
6894 dsp_work_bloop (void)
6895 {
6896 int reg = csky_insn.val[0];
6897 csky_insn.output = frag_more (4);
6898 csky_insn.inst = csky_insn.opcode->op32[0].opcode | (reg << 16);
6899 csky_insn.isize = 4;
6900
6901 if (csky_insn.e1.X_op == O_symbol
6902 && csky_insn.e2.X_op == O_symbol)
6903 {
6904 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6905 4, &csky_insn.e1, 1,
6906 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4);
6907 fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
6908 4, &csky_insn.e2, 1,
6909 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4);
6910 }
6911
6912 csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
6913 return TRUE;
6914 }
6915
6916
6917 /* The following are for assembler directive handling. */
6918
6919 /* Helper function to adjust constant pool counts when we emit a
6920 data directive in the text section. FUNC is one of the standard
6921 gas functions to handle these directives, like "stringer" for the
6922 .string directive, and ARG is the argument to FUNC. csky_pool_count
6923 essentially wraps the call with the constant pool magic. */
6924
6925 static void
6926 csky_pool_count (void (*func) (int), int arg)
6927 {
6928 const fragS *curr_frag = frag_now;
6929 offsetT added = -frag_now_fix_octets ();
6930
6931 (*func) (arg);
6932
6933 while (curr_frag != frag_now)
6934 {
6935 added += curr_frag->fr_fix;
6936 curr_frag = curr_frag->fr_next;
6937 }
6938
6939 added += frag_now_fix_octets ();
6940 poolspan += added;
6941 }
6942
6943 /* Support the .literals directive. */
6944 static void
6945 csky_s_literals (int ignore ATTRIBUTE_UNUSED)
6946 {
6947 dump_literals (0);
6948 demand_empty_rest_of_line ();
6949 }
6950
6951 /* Support the .string, etc directives. */
6952 static void
6953 csky_stringer (int append_zero)
6954 {
6955 if (now_seg == text_section)
6956 csky_pool_count (stringer, append_zero);
6957 else
6958 stringer (append_zero);
6959
6960 /* We call check_literals here in case a large number of strings are
6961 being placed into the text section with a sequence of stringer
6962 directives. In theory we could be upsetting something if these
6963 strings are actually in an indexed table instead of referenced by
6964 individual labels. Let us hope that that never happens. */
6965 check_literals (2, 0);
6966 }
6967
6968 /* Support integer-mode constructors like .word, .byte, etc. */
6969
6970 static void
6971 csky_cons (int nbytes)
6972 {
6973 mapping_state (MAP_DATA);
6974 if (nbytes == 4) /* @GOT. */
6975 {
6976 do
6977 {
6978 bfd_reloc_code_real_type reloc;
6979 expressionS exp;
6980
6981 reloc = BFD_RELOC_NONE;
6982 expression (&exp);
6983 lex_got (&reloc, NULL);
6984
6985 if (exp.X_op == O_symbol && reloc != BFD_RELOC_NONE)
6986 {
6987 reloc_howto_type *howto
6988 = bfd_reloc_type_lookup (stdoutput, reloc);
6989 int size = bfd_get_reloc_size (howto);
6990
6991 if (size > nbytes)
6992 as_bad (ngettext ("%s relocations do not fit in %d byte",
6993 "%s relocations do not fit in %d bytes",
6994 nbytes),
6995 howto->name, nbytes);
6996 else
6997 {
6998 register char *p = frag_more ((int) nbytes);
6999 int offset = nbytes - size;
7000
7001 fix_new_exp (frag_now,
7002 p - frag_now->fr_literal + offset,
7003 size, &exp, 0, reloc);
7004 }
7005 }
7006 else
7007 emit_expr (&exp, (unsigned int) nbytes);
7008 if (now_seg == text_section)
7009 poolspan += nbytes;
7010 }
7011 while (*input_line_pointer++ == ',');
7012
7013 /* Put terminator back into stream. */
7014 input_line_pointer --;
7015 demand_empty_rest_of_line ();
7016
7017 return;
7018 }
7019
7020 if (now_seg == text_section)
7021 csky_pool_count (cons, nbytes);
7022 else
7023 cons (nbytes);
7024
7025 /* In theory we ought to call check_literals (2,0) here in case
7026 we need to dump the literal table. We cannot do this however,
7027 as the directives that we are intercepting may be being used
7028 to build a switch table, and we must not interfere with its
7029 contents. Instead we cross our fingers and pray... */
7030 }
7031
7032 /* Support floating-mode constant directives like .float and .double. */
7033
7034 static void
7035 csky_float_cons (int float_type)
7036 {
7037 mapping_state (MAP_DATA);
7038 if (now_seg == text_section)
7039 csky_pool_count (float_cons, float_type);
7040 else
7041 float_cons (float_type);
7042
7043 /* See the comment in csky_cons () about calling check_literals.
7044 It is unlikely that a switch table will be constructed using
7045 floating point values, but it is still likely that an indexed
7046 table of floating point constants is being created by these
7047 directives, so again we must not interfere with their placement. */
7048 }
7049
7050 /* Support the .fill directive. */
7051
7052 static void
7053 csky_fill (int ignore)
7054 {
7055 if (now_seg == text_section)
7056 csky_pool_count (s_fill, ignore);
7057 else
7058 s_fill (ignore);
7059
7060 check_literals (2, 0);
7061 }
7062
7063 /* Handle the section changing pseudo-ops. These call through to the
7064 normal implementations, but they dump the literal pool first. */
7065
7066 static void
7067 csky_s_text (int ignore)
7068 {
7069 dump_literals (0);
7070
7071 #ifdef OBJ_ELF
7072 obj_elf_text (ignore);
7073 #else
7074 s_text (ignore);
7075 #endif
7076 }
7077
7078 static void
7079 csky_s_data (int ignore)
7080 {
7081 dump_literals (0);
7082
7083 #ifdef OBJ_ELF
7084 obj_elf_data (ignore);
7085 #else
7086 s_data (ignore);
7087 #endif
7088 }
7089
7090 static void
7091 csky_s_section (int ignore)
7092 {
7093 /* Scan forwards to find the name of the section. If the section
7094 being switched to is ".line" then this is a DWARF1 debug section
7095 which is arbitrarily placed inside generated code. In this case
7096 do not dump the literal pool because it is a) inefficient and
7097 b) would require the generation of extra code to jump around the
7098 pool. */
7099 char * ilp = input_line_pointer;
7100
7101 while (*ilp != 0 && ISSPACE (*ilp))
7102 ++ ilp;
7103
7104 if (strncmp (ilp, ".line", 5) == 0
7105 && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r'))
7106 ;
7107 else
7108 dump_literals (0);
7109
7110 #ifdef OBJ_ELF
7111 obj_elf_section (ignore);
7112 #endif
7113 #ifdef OBJ_COFF
7114 obj_coff_section (ignore);
7115 #endif
7116 }
7117
7118 static void
7119 csky_s_bss (int needs_align)
7120 {
7121 dump_literals (0);
7122 s_lcomm_bytes (needs_align);
7123 }
7124
7125 #ifdef OBJ_ELF
7126 static void
7127 csky_s_comm (int needs_align)
7128 {
7129 dump_literals (0);
7130 obj_elf_common (needs_align);
7131 }
7132 #endif
7133
7134 /* Handle the .no_literal_dump directive. */
7135
7136 static void
7137 csky_noliteraldump (int ignore ATTRIBUTE_UNUSED)
7138 {
7139 do_noliteraldump = 1;
7140 int insn_num = get_absolute_expression ();
7141 /* The insn after '.no_literal_dump insn_num' is insn1,
7142 Don't dump literal pool between insn1 and insn(insn_num+1)
7143 The insn cannot be the insn generate literal, like lrw & jsri. */
7144 check_literals (0, insn_num * 2);
7145 }
7146
7147 /* Handle the .align directive.
7148 We must check literals before doing alignment. For example, if
7149 '.align n', add (2^n-1) to poolspan and check literals. */
7150
7151 static void
7152 csky_s_align_ptwo (int arg)
7153 {
7154 /* Get the .align's first absolute number. */
7155 char * temp_pointer = input_line_pointer;
7156 int align = get_absolute_expression ();
7157 check_literals (0, (1 << align) - 1);
7158 input_line_pointer = temp_pointer;
7159
7160 /* Do alignment. */
7161 s_align_ptwo (arg);
7162 }
7163
7164 /* Handle the .stack_size directive. */
7165
7166 static void
7167 csky_stack_size (int arg ATTRIBUTE_UNUSED)
7168 {
7169 expressionS exp;
7170 stack_size_entry *sse
7171 = (stack_size_entry *) xcalloc (1, sizeof (stack_size_entry));
7172
7173 expression (&exp);
7174 if (exp.X_op == O_symbol)
7175 sse->function = exp.X_add_symbol;
7176 else
7177 {
7178 as_bad (_("the first operand must be a symbol"));
7179 ignore_rest_of_line ();
7180 free (sse);
7181 return;
7182 }
7183
7184 SKIP_WHITESPACE ();
7185 if (*input_line_pointer != ',')
7186 {
7187 as_bad (_("missing stack size"));
7188 ignore_rest_of_line ();
7189 free (sse);
7190 return;
7191 }
7192
7193 ++input_line_pointer;
7194 expression (&exp);
7195 if (exp.X_op == O_constant)
7196 {
7197 if (exp.X_add_number < 0 || exp.X_add_number > (offsetT)0xffffffff)
7198 {
7199
7200 as_bad (_("value not in range [0, 0xffffffff]"));
7201 ignore_rest_of_line ();
7202 free (sse);
7203 return;
7204 }
7205 else
7206 sse->stack_size = exp.X_add_number;
7207 }
7208 else
7209 {
7210 as_bad (_("operand must be a constant"));
7211 ignore_rest_of_line ();
7212 free (sse);
7213 return;
7214 }
7215
7216 if (*last_stack_size_data != NULL)
7217 last_stack_size_data = &((*last_stack_size_data)->next);
7218
7219 *last_stack_size_data = sse;
7220 }
7221
7222 /* This table describes all the machine specific pseudo-ops the assembler
7223 has to support. The fields are:
7224 pseudo-op name without dot
7225 function to call to execute this pseudo-op
7226 Integer arg to pass to the function. */
7227
7228 const pseudo_typeS md_pseudo_table[] =
7229 {
7230 { "export", s_globl, 0 },
7231 { "import", s_ignore, 0 },
7232 { "literals", csky_s_literals, 0 },
7233 { "page", listing_eject, 0 },
7234
7235 /* The following are to intercept the placement of data into the text
7236 section (eg addresses for a switch table), so that the space they
7237 occupy can be taken into account when deciding whether or not to
7238 dump the current literal pool.
7239 XXX - currently we do not cope with the .space and .dcb.d directives. */
7240 { "ascii", csky_stringer, 8 + 0 },
7241 { "asciz", csky_stringer, 8 + 1 },
7242 { "byte", csky_cons, 1 },
7243 { "dc", csky_cons, 2 },
7244 { "dc.b", csky_cons, 1 },
7245 { "dc.d", csky_float_cons, 'd'},
7246 { "dc.l", csky_cons, 4 },
7247 { "dc.s", csky_float_cons, 'f'},
7248 { "dc.w", csky_cons, 2 },
7249 { "dc.x", csky_float_cons, 'x'},
7250 { "double", csky_float_cons, 'd'},
7251 { "float", csky_float_cons, 'f'},
7252 { "hword", csky_cons, 2 },
7253 { "int", csky_cons, 4 },
7254 { "long", csky_cons, 4 },
7255 { "octa", csky_cons, 16 },
7256 { "quad", csky_cons, 8 },
7257 { "short", csky_cons, 2 },
7258 { "single", csky_float_cons, 'f'},
7259 { "string", csky_stringer, 8 + 1 },
7260 { "word", csky_cons, 4 },
7261 { "fill", csky_fill, 0 },
7262
7263 /* Allow for the effect of section changes. */
7264 { "text", csky_s_text, 0 },
7265 { "data", csky_s_data, 0 },
7266 { "bss", csky_s_bss, 1 },
7267 #ifdef OBJ_ELF
7268 { "comm", csky_s_comm, 0 },
7269 #endif
7270 { "section", csky_s_section, 0 },
7271 { "section.s", csky_s_section, 0 },
7272 { "sect", csky_s_section, 0 },
7273 { "sect.s", csky_s_section, 0 },
7274 /* When ".no_literal_dump N" is in front of insn1,
7275 and instruction sequence is:
7276 insn1
7277 insn2
7278 ......
7279 insnN+1
7280 it means literals will not dump between insn1 and insnN+1
7281 The insn cannot itself generate literal, like lrw & jsri. */
7282 { "no_literal_dump", csky_noliteraldump, 0 },
7283 { "align", csky_s_align_ptwo, 0 },
7284 { "stack_size", csky_stack_size, 0 },
7285 {0, 0, 0}
7286 };
7287
7288 /* Implement tc_cfi_frame_initial_instructions. */
7289
7290 void
7291 csky_cfi_frame_initial_instructions (void)
7292 {
7293 int sp_reg = IS_CSKY_V1 (mach_flag) ? 0 : 14;
7294 cfi_add_CFA_def_cfa_register (sp_reg);
7295 }
7296
7297 /* Implement tc_regname_to_dw2regnum. */
7298
7299 int
7300 tc_csky_regname_to_dw2regnum (char *regname)
7301 {
7302 int reg_num = -1;
7303 int len;
7304
7305 /* FIXME the reg should be parsed according to
7306 the abi version. */
7307 reg_num = csky_get_reg_val (regname, &len);
7308 return reg_num;
7309 }
GDB Binutils - Deliverables
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