19990502 sourceware import
[deliverable/binutils-gdb.git] / gas / config / tc-i860.c
1 /* tc-i860.c -- Assemble for the I860
2 Copyright (C) 1989, 92, 93, 94, 95, 1998 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License along
17 with GAS; see the file COPYING. If not, write to the Free Software
18 Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "as.h"
21
22 #include "opcode/i860.h"
23
24 void md_begin ();
25 void md_number_to_chars ();
26 void md_assemble ();
27 char *md_atof ();
28 void md_convert_frag ();
29 int md_estimate_size_before_relax ();
30 void md_number_to_imm ();
31 void md_number_to_disp ();
32 void md_number_to_field ();
33 void md_ri_to_chars ();
34 static void i860_ip ();
35 /* void emit_machine_reloc(); */
36
37 const int md_reloc_size = sizeof (struct relocation_info);
38
39 /* void (*md_emit_relocations)() = emit_machine_reloc; */
40
41 /* handle of the OPCODE hash table */
42 static struct hash_control *op_hash = NULL;
43
44 static void s_dual (), s_enddual ();
45 static void s_atmp ();
46
47 const pseudo_typeS
48 md_pseudo_table[] =
49 {
50 {"dual", s_dual, 4},
51 {"enddual", s_enddual, 4},
52 {"atmp", s_atmp, 4},
53 {NULL, 0, 0},
54 };
55
56 /* This array holds the chars that always start a comment. If the
57 pre-processor is disabled, these aren't very useful */
58 const char comment_chars[] = "!/"; /* JF removed '|' from comment_chars */
59
60 /* This array holds the chars that only start a comment at the beginning of
61 a line. If the line seems to have the form '# 123 filename'
62 .line and .file directives will appear in the pre-processed output */
63 /* Note that input_file.c hand checks for '#' at the beginning of the
64 first line of the input file. This is because the compiler outputs
65 #NO_APP at the beginning of its output. */
66 /* Also note that comments like this one will always work. */
67 const char line_comment_chars[] = "#/";
68
69 const char line_separator_chars[] = "";
70
71 /* Chars that can be used to separate mant from exp in floating point nums */
72 const char EXP_CHARS[] = "eE";
73
74 /* Chars that mean this number is a floating point constant */
75 /* As in 0f12.456 */
76 /* or 0d1.2345e12 */
77 const char FLT_CHARS[] = "rRsSfFdDxXpP";
78
79 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
80 changed in read.c . Ideally it shouldn't have to know about it at all,
81 but nothing is ideal around here.
82 */
83 int size_reloc_info = sizeof (struct relocation_info);
84
85 static unsigned char octal[256];
86 #define isoctal(c) octal[c]
87 static unsigned char toHex[256];
88
89 struct i860_it
90 {
91 char *error;
92 unsigned long opcode;
93 struct nlist *nlistp;
94 expressionS exp;
95 int pcrel;
96 enum expand_type expand;
97 enum highlow_type highlow;
98 enum reloc_type reloc;
99 } the_insn;
100
101 #if __STDC__ == 1
102
103 static void print_insn (struct i860_it *insn);
104 static int getExpression (char *str);
105
106 #else /* not __STDC__ */
107
108 static void print_insn ();
109 static int getExpression ();
110
111 #endif /* not __STDC__ */
112
113 static char *expr_end;
114 static char last_expand; /* error if expansion after branch */
115
116 enum dual
117 {
118 DUAL_OFF = 0, DUAL_ON, DUAL_DDOT, DUAL_ONDDOT,
119 };
120 static enum dual dual_mode = DUAL_OFF; /* dual-instruction mode */
121
122 static void
123 s_dual () /* floating point instructions have dual set */
124 {
125 dual_mode = DUAL_ON;
126 }
127
128 static void
129 s_enddual () /* floating point instructions have dual set */
130 {
131 dual_mode = DUAL_OFF;
132 }
133
134 static int atmp = 31; /* temporary register for pseudo's */
135
136 static void
137 s_atmp ()
138 {
139 register int temp;
140 if (strncmp (input_line_pointer, "sp", 2) == 0)
141 {
142 input_line_pointer += 2;
143 atmp = 2;
144 }
145 else if (strncmp (input_line_pointer, "fp", 2) == 0)
146 {
147 input_line_pointer += 2;
148 atmp = 3;
149 }
150 else if (strncmp (input_line_pointer, "r", 1) == 0)
151 {
152 input_line_pointer += 1;
153 temp = get_absolute_expression ();
154 if (temp >= 0 && temp <= 31)
155 atmp = temp;
156 else
157 as_bad (_("Unknown temporary pseudo register"));
158 }
159 else
160 {
161 as_bad (_("Unknown temporary pseudo register"));
162 }
163 demand_empty_rest_of_line ();
164 }
165
166 /* This function is called once, at assembler startup time. It should
167 set up all the tables, etc. that the MD part of the assembler will need. */
168 void
169 md_begin ()
170 {
171 register char *retval = NULL;
172 int lose = 0;
173 register unsigned int i = 0;
174
175 op_hash = hash_new ();
176
177 while (i < NUMOPCODES)
178 {
179 const char *name = i860_opcodes[i].name;
180 retval = hash_insert (op_hash, name, &i860_opcodes[i]);
181 if (retval != NULL)
182 {
183 fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
184 i860_opcodes[i].name, retval);
185 lose = 1;
186 }
187 do
188 {
189 if (i860_opcodes[i].match & i860_opcodes[i].lose)
190 {
191 fprintf (stderr, _("internal error: losing opcode: `%s' \"%s\"\n"),
192 i860_opcodes[i].name, i860_opcodes[i].args);
193 lose = 1;
194 }
195 ++i;
196 }
197 while (i < NUMOPCODES
198 && !strcmp (i860_opcodes[i].name, name));
199 }
200
201 if (lose)
202 as_fatal (_("Broken assembler. No assembly attempted."));
203
204 for (i = '0'; i < '8'; ++i)
205 octal[i] = 1;
206 for (i = '0'; i <= '9'; ++i)
207 toHex[i] = i - '0';
208 for (i = 'a'; i <= 'f'; ++i)
209 toHex[i] = i + 10 - 'a';
210 for (i = 'A'; i <= 'F'; ++i)
211 toHex[i] = i + 10 - 'A';
212 }
213
214 void
215 md_assemble (str)
216 char *str;
217 {
218 char *toP;
219 int rsd;
220 int no_opcodes = 1;
221 int i;
222 struct i860_it pseudo[3];
223
224 assert (str);
225 i860_ip (str);
226
227 /* check for expandable flag to produce pseudo-instructions */
228 if (the_insn.expand != 0 && the_insn.highlow == NO_SPEC)
229 {
230 for (i = 0; i < 3; i++)
231 pseudo[i] = the_insn;
232
233 switch (the_insn.expand)
234 {
235
236 case E_DELAY:
237 no_opcodes = 1;
238 break;
239
240 case E_MOV:
241 if (the_insn.exp.X_add_symbol == NULL &&
242 the_insn.exp.X_op_symbol == NULL &&
243 (the_insn.exp.X_add_number < (1 << 15) &&
244 the_insn.exp.X_add_number >= -(1 << 15)))
245 break;
246 /* or l%const,r0,ireg_dest */
247 pseudo[0].opcode = (the_insn.opcode & 0x001f0000) | 0xe4000000;
248 pseudo[0].highlow = PAIR;
249 /* orh h%const,ireg_dest,ireg_dest */
250 pseudo[1].opcode = (the_insn.opcode & 0x03ffffff) | 0xec000000 |
251 ((the_insn.opcode & 0x001f0000) << 5);
252 pseudo[1].highlow = HIGH;
253 no_opcodes = 2;
254 break;
255
256 case E_ADDR:
257 if (the_insn.exp.X_add_symbol == NULL &&
258 the_insn.exp.X_op_symbol == NULL)
259 break;
260 /* orh ha%addr_expr,r0,r31 */
261 pseudo[0].opcode = 0xec000000 | (atmp << 16);
262 pseudo[0].highlow = HIGHADJ;
263 pseudo[0].reloc = LOW0; /* must overwrite */
264 /* l%addr_expr(r31),ireg_dest */
265 pseudo[1].opcode = (the_insn.opcode & ~0x003e0000) | (atmp << 21);
266 pseudo[1].highlow = PAIR;
267 no_opcodes = 2;
268 break;
269
270 case E_U32: /* 2nd version emulates Intel as, not doc. */
271 if (the_insn.exp.X_add_symbol == NULL &&
272 the_insn.exp.X_op_symbol == NULL &&
273 (the_insn.exp.X_add_number < (1 << 16) &&
274 the_insn.exp.X_add_number >= 0))
275 break;
276 /* $(opcode)h h%const,ireg_src2,ireg_dest
277 pseudo[0].opcode = (the_insn.opcode & 0xf3ffffff) | 0x0c000000; */
278 /* $(opcode)h h%const,ireg_src2,r31 */
279 pseudo[0].opcode = (the_insn.opcode & 0xf3e0ffff) | 0x0c000000 |
280 (atmp << 16);
281 pseudo[0].highlow = HIGH;
282 /* $(opcode) l%const,ireg_dest,ireg_dest
283 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
284 ((the_insn.opcode & 0x001f0000) << 5); */
285 /* $(opcode) l%const,r31,ireg_dest */
286 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
287 (atmp << 21);
288 pseudo[1].highlow = PAIR;
289 no_opcodes = 2;
290 break;
291
292 case E_AND: /* 2nd version emulates Intel as, not doc. */
293 if (the_insn.exp.X_add_symbol == NULL &&
294 the_insn.exp.X_op_symbol == NULL &&
295 (the_insn.exp.X_add_number < (1 << 16) &&
296 the_insn.exp.X_add_number >= 0))
297 break;
298 /* andnot h%const,ireg_src2,ireg_dest
299 pseudo[0].opcode = (the_insn.opcode & 0x03ffffff) | 0xd4000000; */
300 /* andnot h%const,ireg_src2,r31 */
301 pseudo[0].opcode = (the_insn.opcode & 0x03e0ffff) | 0xd4000000 |
302 (atmp << 16);
303 pseudo[0].highlow = HIGH;
304 pseudo[0].exp.X_add_number = -1 - the_insn.exp.X_add_number;
305 /* andnot l%const,ireg_dest,ireg_dest
306 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
307 ((the_insn.opcode & 0x001f0000) << 5); */
308 /* andnot l%const,r31,ireg_dest */
309 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
310 (atmp << 21);
311 pseudo[1].highlow = PAIR;
312 pseudo[1].exp.X_add_number = -1 - the_insn.exp.X_add_number;
313 no_opcodes = 2;
314 break;
315
316 case E_S32:
317 if (the_insn.exp.X_add_symbol == NULL &&
318 the_insn.exp.X_op_symbol == NULL &&
319 (the_insn.exp.X_add_number < (1 << 15) &&
320 the_insn.exp.X_add_number >= -(1 << 15)))
321 break;
322 /* orh h%const,r0,r31 */
323 pseudo[0].opcode = 0xec000000 | (atmp << 16);
324 pseudo[0].highlow = HIGH;
325 /* or l%const,r31,r31 */
326 pseudo[1].opcode = 0xe4000000 | (atmp << 21) | (atmp << 16);
327 pseudo[1].highlow = PAIR;
328 /* r31,ireg_src2,ireg_dest */
329 pseudo[2].opcode = (the_insn.opcode & ~0x0400ffff) | (atmp << 11);
330 pseudo[2].reloc = NO_RELOC;
331 no_opcodes = 3;
332 break;
333
334 default:
335 as_fatal (_("failed sanity check."));
336 }
337
338 the_insn = pseudo[0];
339 /* check for expanded opcode after branch or in dual */
340 if (no_opcodes > 1 && last_expand == 1)
341 as_warn (_("Expanded opcode after delayed branch: `%s'"), str);
342 if (no_opcodes > 1 && dual_mode != DUAL_OFF)
343 as_warn (_("Expanded opcode in dual mode: `%s'"), str);
344 }
345
346 i = 0;
347 do
348 { /* always produce at least one opcode */
349 toP = frag_more (4);
350 /* put out the opcode */
351 md_number_to_chars (toP, the_insn.opcode, 4);
352
353 /* check for expanded opcode after branch or in dual */
354 last_expand = the_insn.pcrel;
355
356 /* put out the symbol-dependent stuff */
357 if (the_insn.reloc != NO_RELOC)
358 {
359 fix_new (frag_now, /* which frag */
360 (toP - frag_now->fr_literal), /* where */
361 4, /* size */
362 &the_insn.exp,
363 the_insn.pcrel,
364 /* merge bit fields into one argument */
365 (int) (((the_insn.highlow & 0x3) << 4) | (the_insn.reloc & 0xf)));
366 }
367 the_insn = pseudo[++i];
368 }
369 while (--no_opcodes > 0);
370
371 }
372
373 static void
374 i860_ip (str)
375 char *str;
376 {
377 char *s;
378 const char *args;
379 char c;
380 unsigned long i;
381 struct i860_opcode *insn;
382 char *argsStart;
383 unsigned long opcode;
384 unsigned int mask;
385 int match = 0;
386 int comma = 0;
387
388
389 for (s = str; islower (*s) || *s == '.' || *s == '3'; ++s)
390 ;
391 switch (*s)
392 {
393
394 case '\0':
395 break;
396
397 case ',':
398 comma = 1;
399
400 /*FALLTHROUGH*/
401
402 case ' ':
403 *s++ = '\0';
404 break;
405
406 default:
407 as_fatal (_("Unknown opcode: `%s'"), str);
408 }
409
410 if (strncmp (str, "d.", 2) == 0)
411 { /* check for d. opcode prefix */
412 if (dual_mode == DUAL_ON)
413 dual_mode = DUAL_ONDDOT;
414 else
415 dual_mode = DUAL_DDOT;
416 str += 2;
417 }
418
419 if ((insn = (struct i860_opcode *) hash_find (op_hash, str)) == NULL)
420 {
421 if (dual_mode == DUAL_DDOT || dual_mode == DUAL_ONDDOT)
422 str -= 2;
423 as_bad (_("Unknown opcode: `%s'"), str);
424 return;
425 }
426 if (comma)
427 {
428 *--s = ',';
429 }
430 argsStart = s;
431 for (;;)
432 {
433 opcode = insn->match;
434 memset (&the_insn, '\0', sizeof (the_insn));
435 the_insn.reloc = NO_RELOC;
436
437 /*
438 * Build the opcode, checking as we go to make
439 * sure that the operands match
440 */
441 for (args = insn->args;; ++args)
442 {
443 switch (*args)
444 {
445
446 case '\0': /* end of args */
447 if (*s == '\0')
448 {
449 match = 1;
450 }
451 break;
452
453 case '+':
454 case '(': /* these must match exactly */
455 case ')':
456 case ',':
457 case ' ':
458 if (*s++ == *args)
459 continue;
460 break;
461
462 case '#': /* must be at least one digit */
463 if (isdigit (*s++))
464 {
465 while (isdigit (*s))
466 {
467 ++s;
468 }
469 continue;
470 }
471 break;
472
473 case '1': /* next operand must be a register */
474 case '2':
475 case 'd':
476 switch (*s)
477 {
478
479 case 'f': /* frame pointer */
480 s++;
481 if (*s++ == 'p')
482 {
483 mask = 0x3;
484 break;
485 }
486 goto error;
487
488 case 's': /* stack pointer */
489 s++;
490 if (*s++ == 'p')
491 {
492 mask = 0x2;
493 break;
494 }
495 goto error;
496
497 case 'r': /* any register */
498 s++;
499 if (!isdigit (c = *s++))
500 {
501 goto error;
502 }
503 if (isdigit (*s))
504 {
505 if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
506 {
507 goto error;
508 }
509 }
510 else
511 {
512 c -= '0';
513 }
514 mask = c;
515 break;
516
517 default: /* not this opcode */
518 goto error;
519 }
520 /*
521 * Got the register, now figure out where
522 * it goes in the opcode.
523 */
524 switch (*args)
525 {
526
527 case '1':
528 opcode |= mask << 11;
529 continue;
530
531 case '2':
532 opcode |= mask << 21;
533 continue;
534
535 case 'd':
536 opcode |= mask << 16;
537 continue;
538
539 }
540 break;
541
542 case 'e': /* next operand is a floating point register */
543 case 'f':
544 case 'g':
545 if (*s++ == 'f' && isdigit (*s))
546 {
547 mask = *s++;
548 if (isdigit (*s))
549 {
550 mask = 10 * (mask - '0') + (*s++ - '0');
551 if (mask >= 32)
552 {
553 break;
554 }
555 }
556 else
557 {
558 mask -= '0';
559 }
560 switch (*args)
561 {
562
563 case 'e':
564 opcode |= mask << 11;
565 continue;
566
567 case 'f':
568 opcode |= mask << 21;
569 continue;
570
571 case 'g':
572 opcode |= mask << 16;
573 if (dual_mode != DUAL_OFF)
574 opcode |= (1 << 9); /* dual mode instruction */
575 if (dual_mode == DUAL_DDOT)
576 dual_mode = DUAL_OFF;
577 if (dual_mode == DUAL_ONDDOT)
578 dual_mode = DUAL_ON;
579 if ((opcode & (1 << 10)) && (mask == ((opcode >> 11) & 0x1f)))
580 as_warn (_("Fsr1 equals fdest with Pipelining"));
581 continue;
582 }
583 }
584 break;
585
586 case 'c': /* next operand must be a control register */
587 if (strncmp (s, "fir", 3) == 0)
588 {
589 opcode |= 0x0 << 21;
590 s += 3;
591 continue;
592 }
593 if (strncmp (s, "psr", 3) == 0)
594 {
595 opcode |= 0x1 << 21;
596 s += 3;
597 continue;
598 }
599 if (strncmp (s, "dirbase", 7) == 0)
600 {
601 opcode |= 0x2 << 21;
602 s += 7;
603 continue;
604 }
605 if (strncmp (s, "db", 2) == 0)
606 {
607 opcode |= 0x3 << 21;
608 s += 2;
609 continue;
610 }
611 if (strncmp (s, "fsr", 3) == 0)
612 {
613 opcode |= 0x4 << 21;
614 s += 3;
615 continue;
616 }
617 if (strncmp (s, "epsr", 4) == 0)
618 {
619 opcode |= 0x5 << 21;
620 s += 4;
621 continue;
622 }
623 break;
624
625 case '5': /* 5 bit immediate in src1 */
626 memset (&the_insn, '\0', sizeof (the_insn));
627 if (!getExpression (s))
628 {
629 s = expr_end;
630 if (the_insn.exp.X_add_number & ~0x1f)
631 as_bad (_("5-bit immediate too large"));
632 opcode |= (the_insn.exp.X_add_number & 0x1f) << 11;
633 memset (&the_insn, '\0', sizeof (the_insn));
634 the_insn.reloc = NO_RELOC;
635 continue;
636 }
637 break;
638
639 case 'l': /* 26 bit immediate, relative branch */
640 the_insn.reloc = BRADDR;
641 the_insn.pcrel = 1;
642 goto immediate;
643
644 case 's': /* 16 bit immediate, split relative branch */
645 /* upper 5 bits of offset in dest field */
646 the_insn.pcrel = 1;
647 the_insn.reloc = SPLIT0;
648 goto immediate;
649
650 case 'S': /* 16 bit immediate, split (st), aligned */
651 if (opcode & (1 << 28))
652 if (opcode & 0x1)
653 the_insn.reloc = SPLIT2;
654 else
655 the_insn.reloc = SPLIT1;
656 else
657 the_insn.reloc = SPLIT0;
658 goto immediate;
659
660 case 'I': /* 16 bit immediate, aligned */
661 if (opcode & (1 << 28))
662 if (opcode & 0x1)
663 the_insn.reloc = LOW2;
664 else
665 the_insn.reloc = LOW1;
666 else
667 the_insn.reloc = LOW0;
668 goto immediate;
669
670 case 'i': /* 16 bit immediate */
671 the_insn.reloc = LOW0;
672
673 /*FALLTHROUGH*/
674
675 immediate:
676 if (*s == ' ')
677 s++;
678 if (strncmp (s, "ha%", 3) == 0)
679 {
680 the_insn.highlow = HIGHADJ;
681 s += 3;
682 }
683 else if (strncmp (s, "h%", 2) == 0)
684 {
685 the_insn.highlow = HIGH;
686 s += 2;
687 }
688 else if (strncmp (s, "l%", 2) == 0)
689 {
690 the_insn.highlow = PAIR;
691 s += 2;
692 }
693 the_insn.expand = insn->expand;
694
695 /* Note that if the getExpression() fails, we will still have
696 created U entries in the symbol table for the 'symbols'
697 in the input string. Try not to create U symbols for
698 registers, etc. */
699
700 if (!getExpression (s))
701 {
702 s = expr_end;
703 continue;
704 }
705 break;
706
707 default:
708 as_fatal (_("failed sanity check."));
709 }
710 break;
711 }
712 error:
713 if (match == 0)
714 {
715 /* Args don't match. */
716 if (&insn[1] - i860_opcodes < NUMOPCODES
717 && !strcmp (insn->name, insn[1].name))
718 {
719 ++insn;
720 s = argsStart;
721 continue;
722 }
723 else
724 {
725 as_bad (_("Illegal operands"));
726 return;
727 }
728 }
729 break;
730 }
731
732 the_insn.opcode = opcode;
733 }
734
735 static int
736 getExpression (str)
737 char *str;
738 {
739 char *save_in;
740 segT seg;
741
742 save_in = input_line_pointer;
743 input_line_pointer = str;
744 seg = expression (&the_insn.exp);
745 if (seg != absolute_section
746 && seg != undefined_section
747 && ! SEG_NORMAL (seg))
748 {
749 the_insn.error = _("bad segment");
750 expr_end = input_line_pointer;
751 input_line_pointer = save_in;
752 return 1;
753 }
754 expr_end = input_line_pointer;
755 input_line_pointer = save_in;
756 return 0;
757 }
758
759
760 /*
761 This is identical to the md_atof in m68k.c. I think this is right,
762 but I'm not sure.
763
764 Turn a string in input_line_pointer into a floating point constant of type
765 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
766 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
767 */
768
769 /* Equal to MAX_PRECISION in atof-ieee.c */
770 #define MAX_LITTLENUMS 6
771
772 char *
773 md_atof (type, litP, sizeP)
774 char type;
775 char *litP;
776 int *sizeP;
777 {
778 int prec;
779 LITTLENUM_TYPE words[MAX_LITTLENUMS];
780 LITTLENUM_TYPE *wordP;
781 char *t;
782 char *atof_ieee ();
783
784 switch (type)
785 {
786
787 case 'f':
788 case 'F':
789 case 's':
790 case 'S':
791 prec = 2;
792 break;
793
794 case 'd':
795 case 'D':
796 case 'r':
797 case 'R':
798 prec = 4;
799 break;
800
801 case 'x':
802 case 'X':
803 prec = 6;
804 break;
805
806 case 'p':
807 case 'P':
808 prec = 6;
809 break;
810
811 default:
812 *sizeP = 0;
813 return _("Bad call to MD_ATOF()");
814 }
815 t = atof_ieee (input_line_pointer, type, words);
816 if (t)
817 input_line_pointer = t;
818 *sizeP = prec * sizeof (LITTLENUM_TYPE);
819 for (wordP = words; prec--;)
820 {
821 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
822 litP += sizeof (LITTLENUM_TYPE);
823 }
824 return 0;
825 }
826
827 /*
828 * Write out big-endian.
829 */
830 void
831 md_number_to_chars (buf, val, n)
832 char *buf;
833 valueT val;
834 int n;
835 {
836 number_to_chars_bigendian (buf, val, n);
837 }
838
839 void
840 md_number_to_imm (buf, val, n, fixP)
841 char *buf;
842 long val;
843 int n;
844 fixS *fixP;
845 {
846 enum reloc_type reloc = fixP->fx_r_type & 0xf;
847 enum highlow_type highlow = (fixP->fx_r_type >> 4) & 0x3;
848
849 assert (buf);
850 assert (n == 4); /* always on i860 */
851
852 switch (highlow)
853 {
854
855 case HIGHADJ: /* adjusts the high-order 16-bits */
856 if (val & (1 << 15))
857 val += (1 << 16);
858
859 /*FALLTHROUGH*/
860
861 case HIGH: /* selects the high-order 16-bits */
862 val >>= 16;
863 break;
864
865 case PAIR: /* selects the low-order 16-bits */
866 val = val & 0xffff;
867 break;
868
869 default:
870 break;
871 }
872
873 switch (reloc)
874 {
875
876 case BRADDR: /* br,call,bc,bc.t,bnc,bnc.t w/26-bit immediate */
877 if (fixP->fx_pcrel != 1)
878 as_bad (_("26-bit branch w/o pc relative set: 0x%08x"), val);
879 val >>= 2; /* align pcrel offset, see manual */
880
881 if (val >= (1 << 25) || val < -(1 << 25)) /* check for overflow */
882 as_bad (_("26-bit branch offset overflow: 0x%08x"), val);
883 buf[0] = (buf[0] & 0xfc) | ((val >> 24) & 0x3);
884 buf[1] = val >> 16;
885 buf[2] = val >> 8;
886 buf[3] = val;
887 break;
888
889 case SPLIT2: /* 16 bit immediate, 4-byte aligned */
890 if (val & 0x3)
891 as_bad (_("16-bit immediate 4-byte alignment error: 0x%08x"), val);
892 val &= ~0x3; /* 4-byte align value */
893 /*FALLTHROUGH*/
894 case SPLIT1: /* 16 bit immediate, 2-byte aligned */
895 if (val & 0x1)
896 as_bad (_("16-bit immediate 2-byte alignment error: 0x%08x"), val);
897 val &= ~0x1; /* 2-byte align value */
898 /*FALLTHROUGH*/
899 case SPLIT0: /* st,bla,bte,btne w/16-bit immediate */
900 if (fixP->fx_pcrel == 1)
901 val >>= 2; /* align pcrel offset, see manual */
902 /* check for bounds */
903 if (highlow != PAIR && (val >= (1 << 16) || val < -(1 << 15)))
904 as_bad (_("16-bit branch offset overflow: 0x%08x"), val);
905 buf[1] = (buf[1] & ~0x1f) | ((val >> 11) & 0x1f);
906 buf[2] = (buf[2] & ~0x7) | ((val >> 8) & 0x7);
907 buf[3] |= val; /* perserve bottom opcode bits */
908 break;
909
910 case LOW4: /* fld,pfld,pst,flush 16-byte aligned */
911 if (val & 0xf)
912 as_bad (_("16-bit immediate 16-byte alignment error: 0x%08x"), val);
913 val &= ~0xf; /* 16-byte align value */
914 /*FALLTHROUGH*/
915 case LOW3: /* fld,pfld,pst,flush 8-byte aligned */
916 if (val & 0x7)
917 as_bad (_("16-bit immediate 8-byte alignment error: 0x%08x"), val);
918 val &= ~0x7; /* 8-byte align value */
919 /*FALLTHROUGH*/
920 case LOW2: /* 16 bit immediate, 4-byte aligned */
921 if (val & 0x3)
922 as_bad (_("16-bit immediate 4-byte alignment error: 0x%08x"), val);
923 val &= ~0x3; /* 4-byte align value */
924 /*FALLTHROUGH*/
925 case LOW1: /* 16 bit immediate, 2-byte aligned */
926 if (val & 0x1)
927 as_bad (_("16-bit immediate 2-byte alignment error: 0x%08x"), val);
928 val &= ~0x1; /* 2-byte align value */
929 /*FALLTHROUGH*/
930 case LOW0: /* 16 bit immediate, byte aligned */
931 /* check for bounds */
932 if (highlow != PAIR && (val >= (1 << 16) || val < -(1 << 15)))
933 as_bad (_("16-bit immediate overflow: 0x%08x"), val);
934 buf[2] = val >> 8;
935 buf[3] |= val; /* perserve bottom opcode bits */
936 break;
937
938 case NO_RELOC:
939 default:
940 as_bad (_("bad relocation type: 0x%02x"), reloc);
941 break;
942 }
943 }
944
945 /* should never be called for i860 */
946 void
947 md_number_to_disp (buf, val, n)
948 char *buf;
949 long val;
950 {
951 as_fatal (_("md_number_to_disp\n"));
952 }
953
954 /* should never be called for i860 */
955 void
956 md_number_to_field (buf, val, fix)
957 char *buf;
958 long val;
959 void *fix;
960 {
961 as_fatal (_("i860_number_to_field\n"));
962 }
963
964 /* the bit-field entries in the relocation_info struct plays hell
965 with the byte-order problems of cross-assembly. So as a hack,
966 I added this mach. dependent ri twiddler. Ugly, but it gets
967 you there. -KWK */
968 /* on i860: first 4 bytes are normal unsigned long address, next three
969 bytes are index, most sig. byte first. Byte 7 is broken up with
970 bit 7 as pcrel, bit 6 as extern, and the lower six bits as
971 relocation type (highlow 5-4). Next 4 bytes are long addend. */
972 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
973 void
974 md_ri_to_chars (ri_p, ri)
975 struct relocation_info *ri_p, ri;
976 {
977 #if 0
978 unsigned char the_bytes[sizeof (*ri_p)];
979
980 /* this is easy */
981 md_number_to_chars (the_bytes, ri.r_address, sizeof (ri.r_address));
982 /* now the fun stuff */
983 the_bytes[4] = (ri.r_index >> 16) & 0x0ff;
984 the_bytes[5] = (ri.r_index >> 8) & 0x0ff;
985 the_bytes[6] = ri.r_index & 0x0ff;
986 the_bytes[7] = ((ri.r_extern << 7) & 0x80) | (0 & 0x60) | (ri.r_type & 0x1F);
987 /* Also easy */
988 md_number_to_chars (&the_bytes[8], ri.r_addend, sizeof (ri.r_addend));
989 /* now put it back where you found it, Junior... */
990 memcpy ((char *) ri_p, the_bytes, sizeof (*ri_p));
991 #endif
992 }
993
994 /* should never be called for i860 */
995 void
996 md_convert_frag (headers, seg, fragP)
997 object_headers *headers;
998 segT seg;
999 register fragS *fragP;
1000 {
1001 as_fatal (_("i860_convert_frag\n"));
1002 }
1003
1004 /* should never be called for i860 */
1005 int
1006 md_estimate_size_before_relax (fragP, segtype)
1007 register fragS *fragP;
1008 segT segtype;
1009 {
1010 as_fatal (_("i860_estimate_size_before_relax\n"));
1011 }
1012
1013 /* for debugging only, must match enum reloc_type */
1014 static char *Reloc[] =
1015 {
1016 "NO_RELOC",
1017 "BRADDR",
1018 "LOW0",
1019 "LOW1",
1020 "LOW2",
1021 "LOW3",
1022 "LOW4",
1023 "SPLIT0",
1024 "SPLIT1",
1025 "SPLIT2",
1026 "RELOC_32",
1027 };
1028 static char *Highlow[] =
1029 {
1030 "NO_SPEC",
1031 "PAIR",
1032 "HIGH",
1033 "HIGHADJ",
1034 };
1035 static void
1036 print_insn (insn)
1037 struct i860_it *insn;
1038 {
1039 if (insn->error)
1040 {
1041 fprintf (stderr, "ERROR: %s\n");
1042 }
1043 fprintf (stderr, "opcode=0x%08x\t", insn->opcode);
1044 fprintf (stderr, "expand=0x%08x\t", insn->expand);
1045 fprintf (stderr, "reloc = %s\t", Reloc[insn->reloc]);
1046 fprintf (stderr, "highlow = %s\n", Highlow[insn->highlow]);
1047 fprintf (stderr, "exp = {\n");
1048 fprintf (stderr, "\t\tX_add_symbol = %s\n",
1049 insn->exp.X_add_symbol ?
1050 (S_GET_NAME (insn->exp.X_add_symbol) ?
1051 S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0");
1052 fprintf (stderr, "\t\tX_op_symbol = %s\n",
1053 insn->exp.X_op_symbol ?
1054 (S_GET_NAME (insn->exp.X_op_symbol) ?
1055 S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0");
1056 fprintf (stderr, "\t\tX_add_number = %d\n",
1057 insn->exp.X_add_number);
1058 fprintf (stderr, "}\n");
1059 }
1060 \f
1061 CONST char *md_shortopts = "";
1062 struct option md_longopts[] = {
1063 {NULL, no_argument, NULL, 0}
1064 };
1065 size_t md_longopts_size = sizeof(md_longopts);
1066
1067 int
1068 md_parse_option (c, arg)
1069 int c;
1070 char *arg;
1071 {
1072 return 0;
1073 }
1074
1075 void
1076 md_show_usage (stream)
1077 FILE *stream;
1078 {
1079 }
1080 \f
1081 #ifdef comment
1082 /*
1083 * I860 relocations are completely different, so it needs
1084 * this machine dependent routine to emit them.
1085 */
1086 void
1087 emit_machine_reloc (fixP, segment_address_in_file)
1088 register fixS *fixP;
1089 relax_addressT segment_address_in_file;
1090 {
1091 struct reloc_info_i860 ri;
1092 register symbolS *symbolP;
1093 extern char *next_object_file_charP;
1094 long add_number;
1095
1096 memset ((char *) &ri, '\0', sizeof (ri));
1097 for (; fixP; fixP = fixP->fx_next)
1098 {
1099
1100 if (fixP->fx_r_type & ~0x3f)
1101 {
1102 as_fatal ("fixP->fx_r_type = %d\n", fixP->fx_r_type);
1103 }
1104 ri.r_pcrel = fixP->fx_pcrel;
1105 ri.r_type = fixP->fx_r_type;
1106
1107 if ((symbolP = fixP->fx_addsy) != NULL)
1108 {
1109 ri.r_address = fixP->fx_frag->fr_address +
1110 fixP->fx_where - segment_address_in_file;
1111 if (!S_IS_DEFINED (symbolP))
1112 {
1113 ri.r_extern = 1;
1114 ri.r_symbolnum = symbolP->sy_number;
1115 }
1116 else
1117 {
1118 ri.r_extern = 0;
1119 ri.r_symbolnum = S_GET_TYPE (symbolP);
1120 }
1121 if (symbolP && symbolP->sy_frag)
1122 {
1123 ri.r_addend = symbolP->sy_frag->fr_address;
1124 }
1125 ri.r_type = fixP->fx_r_type;
1126 if (fixP->fx_pcrel)
1127 {
1128 /* preserve actual offset vs. pc + 4 */
1129 ri.r_addend -= (ri.r_address + 4);
1130 }
1131 else
1132 {
1133 ri.r_addend = fixP->fx_addnumber;
1134 }
1135
1136 md_ri_to_chars ((char *) &ri, ri);
1137 append (&next_object_file_charP, (char *) &ri, sizeof (ri));
1138 }
1139 }
1140 }
1141
1142 #endif /* comment */
1143
1144 #ifdef OBJ_AOUT
1145
1146 /* on i860: first 4 bytes are normal unsigned long address, next three
1147 bytes are index, most sig. byte first. Byte 7 is broken up with
1148 bit 7 as pcrel, bit 6 as extern, and the lower six bits as
1149 relocation type (highlow 5-4). Next 4 bytes are long addend. */
1150
1151 void
1152 tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
1153 char *where;
1154 fixS *fixP;
1155 relax_addressT segment_address_in_file;
1156 {
1157 long r_index;
1158 long r_extern;
1159 long r_addend = 0;
1160 long r_address;
1161
1162 know (fixP->fx_addsy);
1163 know (!(fixP->fx_r_type & ~0x3f));
1164
1165 if (!S_IS_DEFINED (fixP->fx_addsy))
1166 {
1167 r_extern = 1;
1168 r_index = fixP->fx_addsy->sy_number;
1169 }
1170 else
1171 {
1172 r_extern = 0;
1173 r_index = S_GET_TYPE (fixP->fx_addsy);
1174 }
1175
1176 md_number_to_chars (where,
1177 r_address = fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1178 4);
1179
1180 where[4] = (r_index >> 16) & 0x0ff;
1181 where[5] = (r_index >> 8) & 0x0ff;
1182 where[6] = r_index & 0x0ff;
1183 where[7] = (((fixP->fx_pcrel << 7) & 0x80)
1184 | ((r_extern << 6) & 0x40)
1185 | (fixP->fx_r_type & 0x3F));
1186
1187 if (fixP->fx_addsy->sy_frag)
1188 {
1189 r_addend = fixP->fx_addsy->sy_frag->fr_address;
1190 }
1191
1192 if (fixP->fx_pcrel)
1193 {
1194 /* preserve actual offset vs. pc + 4 */
1195 r_addend -= (r_address + 4);
1196 }
1197 else
1198 {
1199 r_addend = fixP->fx_addnumber;
1200 }
1201
1202 md_number_to_chars (&where[8], r_addend, 4);
1203 }
1204
1205 #endif /* OBJ_AOUT */
1206
1207 /* We have no need to default values of symbols. */
1208
1209 /* ARGSUSED */
1210 symbolS *
1211 md_undefined_symbol (name)
1212 char *name;
1213 {
1214 return 0;
1215 }
1216
1217 /* Round up a section size to the appropriate boundary. */
1218 valueT
1219 md_section_align (segment, size)
1220 segT segment;
1221 valueT size;
1222 {
1223 return size; /* Byte alignment is fine */
1224 }
1225
1226 /* Exactly what point is a PC-relative offset relative TO?
1227 On the i860, they're relative to the address of the offset, plus
1228 its size. (??? Is this right? FIXME-SOON!) */
1229 long
1230 md_pcrel_from (fixP)
1231 fixS *fixP;
1232 {
1233 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
1234 }
1235
1236 void
1237 md_apply_fix (fixP, val)
1238 fixS *fixP;
1239 long val;
1240 {
1241 char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
1242
1243 /* looks to me like i860 never has bit fixes. Let's see. xoxorich. */
1244 know (fixP->fx_bit_fixP == NULL);
1245 if (!fixP->fx_bit_fixP)
1246 {
1247 fixP->fx_addnumber = val;
1248 md_number_to_imm (place, val, fixP->fx_size, fixP);
1249 }
1250 else
1251 {
1252 md_number_to_field (place, val, fixP->fx_bit_fixP);
1253 }
1254 }
1255
1256 /*
1257 * Local Variables:
1258 * fill-column: 131
1259 * comment-column: 0
1260 * End:
1261 */
1262
1263 /* end of tc-i860.c */
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