1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR
= 0, /* dynamic general purpose register */
142 DYNREG_FR
, /* dynamic floating point register */
143 DYNREG_PR
, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE
,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix
*next
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 symbolS
*regsym
[REG_NUM
];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode
: 1, /* which mode we're in */
255 default_explicit_mode
: 1, /* which mode is the default */
256 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
258 keep_pending_output
: 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning
,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use
;
275 end_of_insn_group
: 1,
276 manual_bundling_on
: 1,
277 manual_bundling_off
: 1,
278 loc_directive_seen
: 1;
279 signed char user_template
; /* user-selected template, if any */
280 unsigned char qp_regno
; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code
;
288 enum ia64_opnd opnd
; /* type of operand in need of fix */
289 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
290 expressionS expr
; /* the value to be inserted */
292 fixup
[2]; /* at most two fixups per insn */
293 struct ia64_opcode
*idesc
;
294 struct label_fix
*label_fixups
;
295 struct label_fix
*tag_fixups
;
296 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
299 unsigned int src_line
;
300 struct dwarf2_line_info debug_line
;
308 struct dynreg
*next
; /* next dynamic register */
310 unsigned short base
; /* the base register number */
311 unsigned short num_regs
; /* # of registers in this set */
313 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
315 flagword flags
; /* ELF-header flags */
318 unsigned hint
:1; /* is this hint currently valid? */
319 bfd_vma offset
; /* mem.offset offset */
320 bfd_vma base
; /* mem.offset base */
323 int path
; /* number of alt. entry points seen */
324 const char **entry_labels
; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths
; /* size currently allocated for
329 int pointer_size
; /* size in bytes of a pointer */
330 int pointer_size_shift
; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT
) 1) << 1},
454 {"psr.up", ((valueT
) 1) << 2},
455 {"psr.ac", ((valueT
) 1) << 3},
456 {"psr.mfl", ((valueT
) 1) << 4},
457 {"psr.mfh", ((valueT
) 1) << 5},
459 {"psr.ic", ((valueT
) 1) << 13},
460 {"psr.i", ((valueT
) 1) << 14},
461 {"psr.pk", ((valueT
) 1) << 15},
463 {"psr.dt", ((valueT
) 1) << 17},
464 {"psr.dfl", ((valueT
) 1) << 18},
465 {"psr.dfh", ((valueT
) 1) << 19},
466 {"psr.sp", ((valueT
) 1) << 20},
467 {"psr.pp", ((valueT
) 1) << 21},
468 {"psr.di", ((valueT
) 1) << 22},
469 {"psr.si", ((valueT
) 1) << 23},
470 {"psr.db", ((valueT
) 1) << 24},
471 {"psr.lp", ((valueT
) 1) << 25},
472 {"psr.tb", ((valueT
) 1) << 26},
473 {"psr.rt", ((valueT
) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT
) 1) << 34},
477 {"psr.mc", ((valueT
) 1) << 35},
478 {"psr.it", ((valueT
) 1) << 36},
479 {"psr.id", ((valueT
) 1) << 37},
480 {"psr.da", ((valueT
) 1) << 38},
481 {"psr.dd", ((valueT
) 1) << 39},
482 {"psr.ss", ((valueT
) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT
) 1) << 43},
485 {"psr.bn", ((valueT
) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID
},
498 { "cpuid", IND_CPUID
},
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
577 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
578 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
580 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
581 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
582 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop
[IA64_NUM_UNITS
] =
591 0x0000000000LL
, /* NIL => break 0 */
592 0x0008000000LL
, /* I-unit nop */
593 0x0008000000LL
, /* M-unit nop */
594 0x4000000000LL
, /* B-unit nop */
595 0x0008000000LL
, /* F-unit nop */
596 0x0008000000LL
, /* L-"unit" nop */
597 0x0008000000LL
, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name
[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template
[N
][N
][N
];
615 /* Resource dependencies currently in effect */
617 int depind
; /* dependency index */
618 const struct ia64_dependency
*dependency
; /* actual dependency */
619 unsigned specific
:1, /* is this a specific bit/regno? */
620 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
621 int index
; /* specific regno/bit within dependency */
622 int note
; /* optional qualifying note (0 if none) */
626 int insn_srlz
; /* current insn serialization state */
627 int data_srlz
; /* current data serialization state */
628 int qp_regno
; /* qualifying predicate for this usage */
629 char *file
; /* what file marked this dependency */
630 unsigned int line
; /* what line marked this dependency */
631 struct mem_offset mem_offset
; /* optional memory offset hint */
632 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
633 int path
; /* corresponding code entry index */
635 static int regdepslen
= 0;
636 static int regdepstotlen
= 0;
637 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem
[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex
{
646 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
647 static int qp_mutexeslen
= 0;
648 static int qp_mutexestotlen
= 0;
649 static valueT qp_safe_across_calls
= 0;
651 /* Current state of PR implications */
652 static struct qp_imply
{
655 unsigned p2_branched
:1;
657 } *qp_implies
= NULL
;
658 static int qp_implieslen
= 0;
659 static int qp_impliestotlen
= 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS
*align_frag
;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list
{
696 unsigned long slot_number
;
698 struct unw_rec_list
*next
;
701 #define SLOT_NUM_NOT_SET (unsigned)-1
703 /* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705 typedef struct label_prologue_count
707 struct label_prologue_count
*next
;
708 unsigned long label_number
;
709 unsigned int prologue_count
;
710 } label_prologue_count
;
714 /* Maintain a list of unwind entries for the current function. */
718 /* Any unwind entires that should be attached to the current slot
719 that an insn is being constructed for. */
720 unw_rec_list
*current_entry
;
722 /* These are used to create the unwind table entry for this function. */
724 symbolS
*info
; /* pointer to unwind info */
725 symbolS
*personality_routine
;
727 subsegT saved_text_subseg
;
728 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
730 /* TRUE if processing unwind directives in a prologue region. */
731 unsigned int prologue
: 1;
732 unsigned int prologue_mask
: 4;
733 unsigned int body
: 1;
734 unsigned int insn
: 1;
735 unsigned int prologue_count
; /* number of .prologues seen so far */
736 /* Prologue counts at previous .label_state directives. */
737 struct label_prologue_count
* saved_prologue_counts
;
740 /* The input value is a negated offset from psp, and specifies an address
741 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
742 must add 16 and divide by 4 to get the encoded value. */
744 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
746 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
748 /* Forward declarations: */
749 static void set_section
PARAMS ((char *name
));
750 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
751 unsigned int, unsigned int));
752 static void dot_align (int);
753 static void dot_radix
PARAMS ((int));
754 static void dot_special_section
PARAMS ((int));
755 static void dot_proc
PARAMS ((int));
756 static void dot_fframe
PARAMS ((int));
757 static void dot_vframe
PARAMS ((int));
758 static void dot_vframesp
PARAMS ((int));
759 static void dot_vframepsp
PARAMS ((int));
760 static void dot_save
PARAMS ((int));
761 static void dot_restore
PARAMS ((int));
762 static void dot_restorereg
PARAMS ((int));
763 static void dot_restorereg_p
PARAMS ((int));
764 static void dot_handlerdata
PARAMS ((int));
765 static void dot_unwentry
PARAMS ((int));
766 static void dot_altrp
PARAMS ((int));
767 static void dot_savemem
PARAMS ((int));
768 static void dot_saveg
PARAMS ((int));
769 static void dot_savef
PARAMS ((int));
770 static void dot_saveb
PARAMS ((int));
771 static void dot_savegf
PARAMS ((int));
772 static void dot_spill
PARAMS ((int));
773 static void dot_spillreg
PARAMS ((int));
774 static void dot_spillmem
PARAMS ((int));
775 static void dot_spillreg_p
PARAMS ((int));
776 static void dot_spillmem_p
PARAMS ((int));
777 static void dot_label_state
PARAMS ((int));
778 static void dot_copy_state
PARAMS ((int));
779 static void dot_unwabi
PARAMS ((int));
780 static void dot_personality
PARAMS ((int));
781 static void dot_body
PARAMS ((int));
782 static void dot_prologue
PARAMS ((int));
783 static void dot_endp
PARAMS ((int));
784 static void dot_template
PARAMS ((int));
785 static void dot_regstk
PARAMS ((int));
786 static void dot_rot
PARAMS ((int));
787 static void dot_byteorder
PARAMS ((int));
788 static void dot_psr
PARAMS ((int));
789 static void dot_alias
PARAMS ((int));
790 static void dot_ln
PARAMS ((int));
791 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
792 static void dot_xdata
PARAMS ((int));
793 static void stmt_float_cons
PARAMS ((int));
794 static void stmt_cons_ua
PARAMS ((int));
795 static void dot_xfloat_cons
PARAMS ((int));
796 static void dot_xstringer
PARAMS ((int));
797 static void dot_xdata_ua
PARAMS ((int));
798 static void dot_xfloat_cons_ua
PARAMS ((int));
799 static void print_prmask
PARAMS ((valueT mask
));
800 static void dot_pred_rel
PARAMS ((int));
801 static void dot_reg_val
PARAMS ((int));
802 static void dot_serialize
PARAMS ((int));
803 static void dot_dv_mode
PARAMS ((int));
804 static void dot_entry
PARAMS ((int));
805 static void dot_mem_offset
PARAMS ((int));
806 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
807 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
808 static void declare_register_set
PARAMS ((const char *, int, int));
809 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
810 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
813 static int parse_operand
PARAMS ((expressionS
*e
));
814 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
815 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
816 static void emit_one_bundle
PARAMS ((void));
817 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
818 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
819 bfd_reloc_code_real_type r_type
));
820 static void insn_group_break
PARAMS ((int, int, int));
821 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
822 struct rsrc
*, int depind
, int path
));
823 static void add_qp_mutex
PARAMS((valueT mask
));
824 static void add_qp_imply
PARAMS((int p1
, int p2
));
825 static void clear_qp_branch_flag
PARAMS((valueT mask
));
826 static void clear_qp_mutex
PARAMS((valueT mask
));
827 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
828 static int has_suffix_p
PARAMS((const char *, const char *));
829 static void clear_register_values
PARAMS ((void));
830 static void print_dependency
PARAMS ((const char *action
, int depind
));
831 static void instruction_serialization
PARAMS ((void));
832 static void data_serialization
PARAMS ((void));
833 static void remove_marked_resource
PARAMS ((struct rsrc
*));
834 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
835 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
836 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
837 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
838 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
839 struct ia64_opcode
*, int, struct rsrc
[], int, int));
840 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
841 static void check_dependencies
PARAMS((struct ia64_opcode
*));
842 static void mark_resources
PARAMS((struct ia64_opcode
*));
843 static void update_dependencies
PARAMS((struct ia64_opcode
*));
844 static void note_register_values
PARAMS((struct ia64_opcode
*));
845 static int qp_mutex
PARAMS ((int, int, int));
846 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
847 static void output_vbyte_mem
PARAMS ((int, char *, char *));
848 static void count_output
PARAMS ((int, char *, char *));
849 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
850 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
851 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
852 static void output_P1_format
PARAMS ((vbyte_func
, int));
853 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
854 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
855 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
856 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
857 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
858 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
859 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
860 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
861 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
862 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
863 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
864 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
865 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
866 static char format_ab_reg
PARAMS ((int, int));
867 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
869 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
870 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
872 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
873 static unw_rec_list
*output_endp
PARAMS ((void));
874 static unw_rec_list
*output_prologue
PARAMS ((void));
875 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
876 static unw_rec_list
*output_body
PARAMS ((void));
877 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
878 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
879 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
880 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_rp_when
PARAMS ((void));
882 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
883 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
884 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
886 static unw_rec_list
*output_pfs_when
PARAMS ((void));
887 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
888 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
890 static unw_rec_list
*output_preds_when
PARAMS ((void));
891 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
892 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
893 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
894 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
895 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
896 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
897 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
898 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
899 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
900 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
901 static unw_rec_list
*output_unat_when
PARAMS ((void));
902 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
903 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
904 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
905 static unw_rec_list
*output_lc_when
PARAMS ((void));
906 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
907 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
908 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
909 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
910 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
911 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
912 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
913 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
914 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
915 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
916 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
917 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_bsp_when
PARAMS ((void));
919 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
920 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
921 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
922 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
923 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
925 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
926 static unw_rec_list
*output_rnat_when
PARAMS ((void));
927 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
928 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
929 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
930 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
931 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
932 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
933 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
934 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
935 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
936 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
938 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
940 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
942 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
943 unsigned int, unsigned int));
944 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
945 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
946 static int calc_record_size
PARAMS ((unw_rec_list
*));
947 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
948 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
949 unsigned long, fragS
*,
951 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
952 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
953 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
954 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
955 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
956 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
957 static void free_saved_prologue_counts
PARAMS ((void));
959 /* Determine if application register REGNUM resides only in the integer
960 unit (as opposed to the memory unit). */
962 ar_is_only_in_integer_unit (int reg
)
965 return reg
>= 64 && reg
<= 111;
968 /* Determine if application register REGNUM resides only in the memory
969 unit (as opposed to the integer unit). */
971 ar_is_only_in_memory_unit (int reg
)
974 return reg
>= 0 && reg
<= 47;
977 /* Switch to section NAME and create section if necessary. It's
978 rather ugly that we have to manipulate input_line_pointer but I
979 don't see any other way to accomplish the same thing without
980 changing obj-elf.c (which may be the Right Thing, in the end). */
985 char *saved_input_line_pointer
;
987 saved_input_line_pointer
= input_line_pointer
;
988 input_line_pointer
= name
;
990 input_line_pointer
= saved_input_line_pointer
;
993 /* Map 's' to SHF_IA_64_SHORT. */
996 ia64_elf_section_letter (letter
, ptr_msg
)
1001 return SHF_IA_64_SHORT
;
1002 else if (letter
== 'o')
1003 return SHF_LINK_ORDER
;
1005 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1009 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1012 ia64_elf_section_flags (flags
, attr
, type
)
1014 int attr
, type ATTRIBUTE_UNUSED
;
1016 if (attr
& SHF_IA_64_SHORT
)
1017 flags
|= SEC_SMALL_DATA
;
1022 ia64_elf_section_type (str
, len
)
1026 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1028 if (STREQ (ELF_STRING_ia64_unwind_info
))
1029 return SHT_PROGBITS
;
1031 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1032 return SHT_PROGBITS
;
1034 if (STREQ (ELF_STRING_ia64_unwind
))
1035 return SHT_IA_64_UNWIND
;
1037 if (STREQ (ELF_STRING_ia64_unwind_once
))
1038 return SHT_IA_64_UNWIND
;
1040 if (STREQ ("unwind"))
1041 return SHT_IA_64_UNWIND
;
1048 set_regstack (ins
, locs
, outs
, rots
)
1049 unsigned int ins
, locs
, outs
, rots
;
1051 /* Size of frame. */
1054 sof
= ins
+ locs
+ outs
;
1057 as_bad ("Size of frame exceeds maximum of 96 registers");
1062 as_warn ("Size of rotating registers exceeds frame size");
1065 md
.in
.base
= REG_GR
+ 32;
1066 md
.loc
.base
= md
.in
.base
+ ins
;
1067 md
.out
.base
= md
.loc
.base
+ locs
;
1069 md
.in
.num_regs
= ins
;
1070 md
.loc
.num_regs
= locs
;
1071 md
.out
.num_regs
= outs
;
1072 md
.rot
.num_regs
= rots
;
1079 struct label_fix
*lfix
;
1081 subsegT saved_subseg
;
1084 if (!md
.last_text_seg
)
1087 saved_seg
= now_seg
;
1088 saved_subseg
= now_subseg
;
1090 subseg_set (md
.last_text_seg
, 0);
1092 while (md
.num_slots_in_use
> 0)
1093 emit_one_bundle (); /* force out queued instructions */
1095 /* In case there are labels following the last instruction, resolve
1097 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1099 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1100 symbol_set_frag (lfix
->sym
, frag_now
);
1102 CURR_SLOT
.label_fixups
= 0;
1103 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1105 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1106 symbol_set_frag (lfix
->sym
, frag_now
);
1108 CURR_SLOT
.tag_fixups
= 0;
1110 /* In case there are unwind directives following the last instruction,
1111 resolve those now. We only handle prologue, body, and endp directives
1112 here. Give an error for others. */
1113 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1115 switch (ptr
->r
.type
)
1121 ptr
->slot_number
= (unsigned long) frag_more (0);
1122 ptr
->slot_frag
= frag_now
;
1125 /* Allow any record which doesn't have a "t" field (i.e.,
1126 doesn't relate to a particular instruction). */
1142 as_bad (_("Unwind directive not followed by an instruction."));
1146 unwind
.current_entry
= NULL
;
1148 subseg_set (saved_seg
, saved_subseg
);
1150 if (md
.qp
.X_op
== O_register
)
1151 as_bad ("qualifying predicate not followed by instruction");
1155 ia64_do_align (int nbytes
)
1157 char *saved_input_line_pointer
= input_line_pointer
;
1159 input_line_pointer
= "";
1160 s_align_bytes (nbytes
);
1161 input_line_pointer
= saved_input_line_pointer
;
1165 ia64_cons_align (nbytes
)
1170 char *saved_input_line_pointer
= input_line_pointer
;
1171 input_line_pointer
= "";
1172 s_align_bytes (nbytes
);
1173 input_line_pointer
= saved_input_line_pointer
;
1177 /* Output COUNT bytes to a memory location. */
1178 static char *vbyte_mem_ptr
= NULL
;
1181 output_vbyte_mem (count
, ptr
, comment
)
1184 char *comment ATTRIBUTE_UNUSED
;
1187 if (vbyte_mem_ptr
== NULL
)
1192 for (x
= 0; x
< count
; x
++)
1193 *(vbyte_mem_ptr
++) = ptr
[x
];
1196 /* Count the number of bytes required for records. */
1197 static int vbyte_count
= 0;
1199 count_output (count
, ptr
, comment
)
1201 char *ptr ATTRIBUTE_UNUSED
;
1202 char *comment ATTRIBUTE_UNUSED
;
1204 vbyte_count
+= count
;
1208 output_R1_format (f
, rtype
, rlen
)
1210 unw_record_type rtype
;
1217 output_R3_format (f
, rtype
, rlen
);
1223 else if (rtype
!= prologue
)
1224 as_bad ("record type is not valid");
1226 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1227 (*f
) (1, &byte
, NULL
);
1231 output_R2_format (f
, mask
, grsave
, rlen
)
1238 mask
= (mask
& 0x0f);
1239 grsave
= (grsave
& 0x7f);
1241 bytes
[0] = (UNW_R2
| (mask
>> 1));
1242 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1243 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1244 (*f
) (count
, bytes
, NULL
);
1248 output_R3_format (f
, rtype
, rlen
)
1250 unw_record_type rtype
;
1257 output_R1_format (f
, rtype
, rlen
);
1263 else if (rtype
!= prologue
)
1264 as_bad ("record type is not valid");
1265 bytes
[0] = (UNW_R3
| r
);
1266 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1267 (*f
) (count
+ 1, bytes
, NULL
);
1271 output_P1_format (f
, brmask
)
1276 byte
= UNW_P1
| (brmask
& 0x1f);
1277 (*f
) (1, &byte
, NULL
);
1281 output_P2_format (f
, brmask
, gr
)
1287 brmask
= (brmask
& 0x1f);
1288 bytes
[0] = UNW_P2
| (brmask
>> 1);
1289 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1290 (*f
) (2, bytes
, NULL
);
1294 output_P3_format (f
, rtype
, reg
)
1296 unw_record_type rtype
;
1341 as_bad ("Invalid record type for P3 format.");
1343 bytes
[0] = (UNW_P3
| (r
>> 1));
1344 bytes
[1] = (((r
& 1) << 7) | reg
);
1345 (*f
) (2, bytes
, NULL
);
1349 output_P4_format (f
, imask
, imask_size
)
1351 unsigned char *imask
;
1352 unsigned long imask_size
;
1355 (*f
) (imask_size
, (char *) imask
, NULL
);
1359 output_P5_format (f
, grmask
, frmask
)
1362 unsigned long frmask
;
1365 grmask
= (grmask
& 0x0f);
1368 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1369 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1370 bytes
[3] = (frmask
& 0x000000ff);
1371 (*f
) (4, bytes
, NULL
);
1375 output_P6_format (f
, rtype
, rmask
)
1377 unw_record_type rtype
;
1383 if (rtype
== gr_mem
)
1385 else if (rtype
!= fr_mem
)
1386 as_bad ("Invalid record type for format P6");
1387 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1388 (*f
) (1, &byte
, NULL
);
1392 output_P7_format (f
, rtype
, w1
, w2
)
1394 unw_record_type rtype
;
1401 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1406 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1456 bytes
[0] = (UNW_P7
| r
);
1457 (*f
) (count
, bytes
, NULL
);
1461 output_P8_format (f
, rtype
, t
)
1463 unw_record_type rtype
;
1502 case bspstore_psprel
:
1505 case bspstore_sprel
:
1517 case priunat_when_gr
:
1520 case priunat_psprel
:
1526 case priunat_when_mem
:
1533 count
+= output_leb128 (bytes
+ 2, t
, 0);
1534 (*f
) (count
, bytes
, NULL
);
1538 output_P9_format (f
, grmask
, gr
)
1545 bytes
[1] = (grmask
& 0x0f);
1546 bytes
[2] = (gr
& 0x7f);
1547 (*f
) (3, bytes
, NULL
);
1551 output_P10_format (f
, abi
, context
)
1558 bytes
[1] = (abi
& 0xff);
1559 bytes
[2] = (context
& 0xff);
1560 (*f
) (3, bytes
, NULL
);
1564 output_B1_format (f
, rtype
, label
)
1566 unw_record_type rtype
;
1567 unsigned long label
;
1573 output_B4_format (f
, rtype
, label
);
1576 if (rtype
== copy_state
)
1578 else if (rtype
!= label_state
)
1579 as_bad ("Invalid record type for format B1");
1581 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1582 (*f
) (1, &byte
, NULL
);
1586 output_B2_format (f
, ecount
, t
)
1588 unsigned long ecount
;
1595 output_B3_format (f
, ecount
, t
);
1598 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1599 count
+= output_leb128 (bytes
+ 1, t
, 0);
1600 (*f
) (count
, bytes
, NULL
);
1604 output_B3_format (f
, ecount
, t
)
1606 unsigned long ecount
;
1613 output_B2_format (f
, ecount
, t
);
1617 count
+= output_leb128 (bytes
+ 1, t
, 0);
1618 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1619 (*f
) (count
, bytes
, NULL
);
1623 output_B4_format (f
, rtype
, label
)
1625 unw_record_type rtype
;
1626 unsigned long label
;
1633 output_B1_format (f
, rtype
, label
);
1637 if (rtype
== copy_state
)
1639 else if (rtype
!= label_state
)
1640 as_bad ("Invalid record type for format B1");
1642 bytes
[0] = (UNW_B4
| (r
<< 3));
1643 count
+= output_leb128 (bytes
+ 1, label
, 0);
1644 (*f
) (count
, bytes
, NULL
);
1648 format_ab_reg (ab
, reg
)
1655 ret
= (ab
<< 5) | reg
;
1660 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1662 unw_record_type rtype
;
1672 if (rtype
== spill_sprel
)
1674 else if (rtype
!= spill_psprel
)
1675 as_bad ("Invalid record type for format X1");
1676 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1677 count
+= output_leb128 (bytes
+ 2, t
, 0);
1678 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1679 (*f
) (count
, bytes
, NULL
);
1683 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1692 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1693 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1694 count
+= output_leb128 (bytes
+ 3, t
, 0);
1695 (*f
) (count
, bytes
, NULL
);
1699 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1701 unw_record_type rtype
;
1712 if (rtype
== spill_sprel_p
)
1714 else if (rtype
!= spill_psprel_p
)
1715 as_bad ("Invalid record type for format X3");
1716 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1717 bytes
[2] = format_ab_reg (ab
, reg
);
1718 count
+= output_leb128 (bytes
+ 3, t
, 0);
1719 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1720 (*f
) (count
, bytes
, NULL
);
1724 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1734 bytes
[1] = (qp
& 0x3f);
1735 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1736 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1737 count
+= output_leb128 (bytes
+ 4, t
, 0);
1738 (*f
) (count
, bytes
, NULL
);
1741 /* This function allocates a record list structure, and initializes fields. */
1743 static unw_rec_list
*
1744 alloc_record (unw_record_type t
)
1747 ptr
= xmalloc (sizeof (*ptr
));
1749 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1754 /* Dummy unwind record used for calculating the length of the last prologue or
1757 static unw_rec_list
*
1760 unw_rec_list
*ptr
= alloc_record (endp
);
1764 static unw_rec_list
*
1767 unw_rec_list
*ptr
= alloc_record (prologue
);
1768 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1772 static unw_rec_list
*
1773 output_prologue_gr (saved_mask
, reg
)
1774 unsigned int saved_mask
;
1777 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1778 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1779 ptr
->r
.record
.r
.grmask
= saved_mask
;
1780 ptr
->r
.record
.r
.grsave
= reg
;
1784 static unw_rec_list
*
1787 unw_rec_list
*ptr
= alloc_record (body
);
1791 static unw_rec_list
*
1792 output_mem_stack_f (size
)
1795 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1796 ptr
->r
.record
.p
.size
= size
;
1800 static unw_rec_list
*
1801 output_mem_stack_v ()
1803 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1807 static unw_rec_list
*
1811 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1812 ptr
->r
.record
.p
.gr
= gr
;
1816 static unw_rec_list
*
1817 output_psp_sprel (offset
)
1818 unsigned int offset
;
1820 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1821 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1825 static unw_rec_list
*
1828 unw_rec_list
*ptr
= alloc_record (rp_when
);
1832 static unw_rec_list
*
1836 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1837 ptr
->r
.record
.p
.gr
= gr
;
1841 static unw_rec_list
*
1845 unw_rec_list
*ptr
= alloc_record (rp_br
);
1846 ptr
->r
.record
.p
.br
= br
;
1850 static unw_rec_list
*
1851 output_rp_psprel (offset
)
1852 unsigned int offset
;
1854 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1855 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1859 static unw_rec_list
*
1860 output_rp_sprel (offset
)
1861 unsigned int offset
;
1863 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1864 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1868 static unw_rec_list
*
1871 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1875 static unw_rec_list
*
1879 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1880 ptr
->r
.record
.p
.gr
= gr
;
1884 static unw_rec_list
*
1885 output_pfs_psprel (offset
)
1886 unsigned int offset
;
1888 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1889 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1893 static unw_rec_list
*
1894 output_pfs_sprel (offset
)
1895 unsigned int offset
;
1897 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1898 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1902 static unw_rec_list
*
1903 output_preds_when ()
1905 unw_rec_list
*ptr
= alloc_record (preds_when
);
1909 static unw_rec_list
*
1910 output_preds_gr (gr
)
1913 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1914 ptr
->r
.record
.p
.gr
= gr
;
1918 static unw_rec_list
*
1919 output_preds_psprel (offset
)
1920 unsigned int offset
;
1922 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1923 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1927 static unw_rec_list
*
1928 output_preds_sprel (offset
)
1929 unsigned int offset
;
1931 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1932 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1936 static unw_rec_list
*
1937 output_fr_mem (mask
)
1940 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1941 ptr
->r
.record
.p
.rmask
= mask
;
1945 static unw_rec_list
*
1946 output_frgr_mem (gr_mask
, fr_mask
)
1947 unsigned int gr_mask
;
1948 unsigned int fr_mask
;
1950 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1951 ptr
->r
.record
.p
.grmask
= gr_mask
;
1952 ptr
->r
.record
.p
.frmask
= fr_mask
;
1956 static unw_rec_list
*
1957 output_gr_gr (mask
, reg
)
1961 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1962 ptr
->r
.record
.p
.grmask
= mask
;
1963 ptr
->r
.record
.p
.gr
= reg
;
1967 static unw_rec_list
*
1968 output_gr_mem (mask
)
1971 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1972 ptr
->r
.record
.p
.rmask
= mask
;
1976 static unw_rec_list
*
1977 output_br_mem (unsigned int mask
)
1979 unw_rec_list
*ptr
= alloc_record (br_mem
);
1980 ptr
->r
.record
.p
.brmask
= mask
;
1984 static unw_rec_list
*
1985 output_br_gr (save_mask
, reg
)
1986 unsigned int save_mask
;
1989 unw_rec_list
*ptr
= alloc_record (br_gr
);
1990 ptr
->r
.record
.p
.brmask
= save_mask
;
1991 ptr
->r
.record
.p
.gr
= reg
;
1995 static unw_rec_list
*
1996 output_spill_base (offset
)
1997 unsigned int offset
;
1999 unw_rec_list
*ptr
= alloc_record (spill_base
);
2000 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2004 static unw_rec_list
*
2007 unw_rec_list
*ptr
= alloc_record (unat_when
);
2011 static unw_rec_list
*
2015 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2016 ptr
->r
.record
.p
.gr
= gr
;
2020 static unw_rec_list
*
2021 output_unat_psprel (offset
)
2022 unsigned int offset
;
2024 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2025 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2029 static unw_rec_list
*
2030 output_unat_sprel (offset
)
2031 unsigned int offset
;
2033 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2034 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2038 static unw_rec_list
*
2041 unw_rec_list
*ptr
= alloc_record (lc_when
);
2045 static unw_rec_list
*
2049 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2050 ptr
->r
.record
.p
.gr
= gr
;
2054 static unw_rec_list
*
2055 output_lc_psprel (offset
)
2056 unsigned int offset
;
2058 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2059 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2063 static unw_rec_list
*
2064 output_lc_sprel (offset
)
2065 unsigned int offset
;
2067 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2068 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2072 static unw_rec_list
*
2075 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2079 static unw_rec_list
*
2083 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2084 ptr
->r
.record
.p
.gr
= gr
;
2088 static unw_rec_list
*
2089 output_fpsr_psprel (offset
)
2090 unsigned int offset
;
2092 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2093 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2097 static unw_rec_list
*
2098 output_fpsr_sprel (offset
)
2099 unsigned int offset
;
2101 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2102 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2106 static unw_rec_list
*
2107 output_priunat_when_gr ()
2109 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2113 static unw_rec_list
*
2114 output_priunat_when_mem ()
2116 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2120 static unw_rec_list
*
2121 output_priunat_gr (gr
)
2124 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2125 ptr
->r
.record
.p
.gr
= gr
;
2129 static unw_rec_list
*
2130 output_priunat_psprel (offset
)
2131 unsigned int offset
;
2133 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2134 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2138 static unw_rec_list
*
2139 output_priunat_sprel (offset
)
2140 unsigned int offset
;
2142 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2143 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2147 static unw_rec_list
*
2150 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2154 static unw_rec_list
*
2158 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2159 ptr
->r
.record
.p
.gr
= gr
;
2163 static unw_rec_list
*
2164 output_bsp_psprel (offset
)
2165 unsigned int offset
;
2167 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2168 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2172 static unw_rec_list
*
2173 output_bsp_sprel (offset
)
2174 unsigned int offset
;
2176 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2177 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2181 static unw_rec_list
*
2182 output_bspstore_when ()
2184 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2188 static unw_rec_list
*
2189 output_bspstore_gr (gr
)
2192 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2193 ptr
->r
.record
.p
.gr
= gr
;
2197 static unw_rec_list
*
2198 output_bspstore_psprel (offset
)
2199 unsigned int offset
;
2201 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2202 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2206 static unw_rec_list
*
2207 output_bspstore_sprel (offset
)
2208 unsigned int offset
;
2210 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2211 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2215 static unw_rec_list
*
2218 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2222 static unw_rec_list
*
2226 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2227 ptr
->r
.record
.p
.gr
= gr
;
2231 static unw_rec_list
*
2232 output_rnat_psprel (offset
)
2233 unsigned int offset
;
2235 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2236 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2240 static unw_rec_list
*
2241 output_rnat_sprel (offset
)
2242 unsigned int offset
;
2244 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2245 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2249 static unw_rec_list
*
2250 output_unwabi (abi
, context
)
2252 unsigned long context
;
2254 unw_rec_list
*ptr
= alloc_record (unwabi
);
2255 ptr
->r
.record
.p
.abi
= abi
;
2256 ptr
->r
.record
.p
.context
= context
;
2260 static unw_rec_list
*
2261 output_epilogue (unsigned long ecount
)
2263 unw_rec_list
*ptr
= alloc_record (epilogue
);
2264 ptr
->r
.record
.b
.ecount
= ecount
;
2268 static unw_rec_list
*
2269 output_label_state (unsigned long label
)
2271 unw_rec_list
*ptr
= alloc_record (label_state
);
2272 ptr
->r
.record
.b
.label
= label
;
2276 static unw_rec_list
*
2277 output_copy_state (unsigned long label
)
2279 unw_rec_list
*ptr
= alloc_record (copy_state
);
2280 ptr
->r
.record
.b
.label
= label
;
2284 static unw_rec_list
*
2285 output_spill_psprel (ab
, reg
, offset
)
2288 unsigned int offset
;
2290 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2291 ptr
->r
.record
.x
.ab
= ab
;
2292 ptr
->r
.record
.x
.reg
= reg
;
2293 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2297 static unw_rec_list
*
2298 output_spill_sprel (ab
, reg
, offset
)
2301 unsigned int offset
;
2303 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2304 ptr
->r
.record
.x
.ab
= ab
;
2305 ptr
->r
.record
.x
.reg
= reg
;
2306 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2310 static unw_rec_list
*
2311 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2314 unsigned int offset
;
2315 unsigned int predicate
;
2317 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2318 ptr
->r
.record
.x
.ab
= ab
;
2319 ptr
->r
.record
.x
.reg
= reg
;
2320 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2321 ptr
->r
.record
.x
.qp
= predicate
;
2325 static unw_rec_list
*
2326 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2329 unsigned int offset
;
2330 unsigned int predicate
;
2332 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2333 ptr
->r
.record
.x
.ab
= ab
;
2334 ptr
->r
.record
.x
.reg
= reg
;
2335 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2336 ptr
->r
.record
.x
.qp
= predicate
;
2340 static unw_rec_list
*
2341 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2344 unsigned int targ_reg
;
2347 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2348 ptr
->r
.record
.x
.ab
= ab
;
2349 ptr
->r
.record
.x
.reg
= reg
;
2350 ptr
->r
.record
.x
.treg
= targ_reg
;
2351 ptr
->r
.record
.x
.xy
= xy
;
2355 static unw_rec_list
*
2356 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2359 unsigned int targ_reg
;
2361 unsigned int predicate
;
2363 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2364 ptr
->r
.record
.x
.ab
= ab
;
2365 ptr
->r
.record
.x
.reg
= reg
;
2366 ptr
->r
.record
.x
.treg
= targ_reg
;
2367 ptr
->r
.record
.x
.xy
= xy
;
2368 ptr
->r
.record
.x
.qp
= predicate
;
2372 /* Given a unw_rec_list process the correct format with the
2373 specified function. */
2376 process_one_record (ptr
, f
)
2380 unsigned long fr_mask
, gr_mask
;
2382 switch (ptr
->r
.type
)
2384 /* This is a dummy record that takes up no space in the output. */
2392 /* These are taken care of by prologue/prologue_gr. */
2397 if (ptr
->r
.type
== prologue_gr
)
2398 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2399 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2401 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2403 /* Output descriptor(s) for union of register spills (if any). */
2404 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2405 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2408 if ((fr_mask
& ~0xfUL
) == 0)
2409 output_P6_format (f
, fr_mem
, fr_mask
);
2412 output_P5_format (f
, gr_mask
, fr_mask
);
2417 output_P6_format (f
, gr_mem
, gr_mask
);
2418 if (ptr
->r
.record
.r
.mask
.br_mem
)
2419 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2421 /* output imask descriptor if necessary: */
2422 if (ptr
->r
.record
.r
.mask
.i
)
2423 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2424 ptr
->r
.record
.r
.imask_size
);
2428 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2432 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2433 ptr
->r
.record
.p
.size
);
2446 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2449 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2452 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2460 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2469 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2479 case bspstore_sprel
:
2481 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2484 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2487 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2490 as_bad ("spill_mask record unimplemented.");
2492 case priunat_when_gr
:
2493 case priunat_when_mem
:
2497 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2499 case priunat_psprel
:
2501 case bspstore_psprel
:
2503 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2506 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2509 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2513 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2516 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2517 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2518 ptr
->r
.record
.x
.pspoff
);
2521 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2522 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2523 ptr
->r
.record
.x
.spoff
);
2526 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2527 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2528 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2530 case spill_psprel_p
:
2531 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2532 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2533 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2536 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2537 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2538 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2541 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2542 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2543 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2547 as_bad ("record_type_not_valid");
2552 /* Given a unw_rec_list list, process all the records with
2553 the specified function. */
2555 process_unw_records (list
, f
)
2560 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2561 process_one_record (ptr
, f
);
2564 /* Determine the size of a record list in bytes. */
2566 calc_record_size (list
)
2570 process_unw_records (list
, count_output
);
2574 /* Update IMASK bitmask to reflect the fact that one or more registers
2575 of type TYPE are saved starting at instruction with index T. If N
2576 bits are set in REGMASK, it is assumed that instructions T through
2577 T+N-1 save these registers.
2581 1: instruction saves next fp reg
2582 2: instruction saves next general reg
2583 3: instruction saves next branch reg */
2585 set_imask (region
, regmask
, t
, type
)
2586 unw_rec_list
*region
;
2587 unsigned long regmask
;
2591 unsigned char *imask
;
2592 unsigned long imask_size
;
2596 imask
= region
->r
.record
.r
.mask
.i
;
2597 imask_size
= region
->r
.record
.r
.imask_size
;
2600 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2601 imask
= xmalloc (imask_size
);
2602 memset (imask
, 0, imask_size
);
2604 region
->r
.record
.r
.imask_size
= imask_size
;
2605 region
->r
.record
.r
.mask
.i
= imask
;
2609 pos
= 2 * (3 - t
% 4);
2612 if (i
>= imask_size
)
2614 as_bad ("Ignoring attempt to spill beyond end of region");
2618 imask
[i
] |= (type
& 0x3) << pos
;
2620 regmask
&= (regmask
- 1);
2630 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2631 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2632 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2636 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2637 unsigned long slot_addr
;
2639 unsigned long first_addr
;
2643 unsigned long index
= 0;
2645 /* First time we are called, the initial address and frag are invalid. */
2646 if (first_addr
== 0)
2649 /* If the two addresses are in different frags, then we need to add in
2650 the remaining size of this frag, and then the entire size of intermediate
2652 while (slot_frag
!= first_frag
)
2654 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2658 /* We can get the final addresses only during and after
2660 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2661 index
+= 3 * ((first_frag
->fr_next
->fr_address
2662 - first_frag
->fr_address
2663 - first_frag
->fr_fix
) >> 4);
2666 /* We don't know what the final addresses will be. We try our
2667 best to estimate. */
2668 switch (first_frag
->fr_type
)
2674 as_fatal ("only constant space allocation is supported");
2680 /* Take alignment into account. Assume the worst case
2681 before relaxation. */
2682 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2686 if (first_frag
->fr_symbol
)
2688 as_fatal ("only constant offsets are supported");
2692 index
+= 3 * (first_frag
->fr_offset
>> 4);
2696 /* Add in the full size of the frag converted to instruction slots. */
2697 index
+= 3 * (first_frag
->fr_fix
>> 4);
2698 /* Subtract away the initial part before first_addr. */
2699 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2700 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2702 /* Move to the beginning of the next frag. */
2703 first_frag
= first_frag
->fr_next
;
2704 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2707 /* Add in the used part of the last frag. */
2708 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2709 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2713 /* Optimize unwind record directives. */
2715 static unw_rec_list
*
2716 optimize_unw_records (list
)
2722 /* If the only unwind record is ".prologue" or ".prologue" followed
2723 by ".body", then we can optimize the unwind directives away. */
2724 if (list
->r
.type
== prologue
2725 && (list
->next
->r
.type
== endp
2726 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2732 /* Given a complete record list, process any records which have
2733 unresolved fields, (ie length counts for a prologue). After
2734 this has been run, all necessary information should be available
2735 within each record to generate an image. */
2738 fixup_unw_records (list
, before_relax
)
2742 unw_rec_list
*ptr
, *region
= 0;
2743 unsigned long first_addr
= 0, rlen
= 0, t
;
2744 fragS
*first_frag
= 0;
2746 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2748 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2749 as_bad (" Insn slot not set in unwind record.");
2750 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2751 first_addr
, first_frag
, before_relax
);
2752 switch (ptr
->r
.type
)
2760 unsigned long last_addr
= 0;
2761 fragS
*last_frag
= NULL
;
2763 first_addr
= ptr
->slot_number
;
2764 first_frag
= ptr
->slot_frag
;
2765 /* Find either the next body/prologue start, or the end of
2766 the function, and determine the size of the region. */
2767 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2768 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2769 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2771 last_addr
= last
->slot_number
;
2772 last_frag
= last
->slot_frag
;
2775 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2777 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2778 if (ptr
->r
.type
== body
)
2779 /* End of region. */
2787 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2789 /* This happens when a memory-stack-less procedure uses a
2790 ".restore sp" directive at the end of a region to pop
2792 ptr
->r
.record
.b
.t
= 0;
2803 case priunat_when_gr
:
2804 case priunat_when_mem
:
2808 ptr
->r
.record
.p
.t
= t
;
2816 case spill_psprel_p
:
2817 ptr
->r
.record
.x
.t
= t
;
2823 as_bad ("frgr_mem record before region record!");
2826 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2827 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2828 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2829 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2834 as_bad ("fr_mem record before region record!");
2837 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2838 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2843 as_bad ("gr_mem record before region record!");
2846 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2847 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2852 as_bad ("br_mem record before region record!");
2855 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2856 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2862 as_bad ("gr_gr record before region record!");
2865 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2870 as_bad ("br_gr record before region record!");
2873 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2882 /* Estimate the size of a frag before relaxing. We only have one type of frag
2883 to handle here, which is the unwind info frag. */
2886 ia64_estimate_size_before_relax (fragS
*frag
,
2887 asection
*segtype ATTRIBUTE_UNUSED
)
2892 /* ??? This code is identical to the first part of ia64_convert_frag. */
2893 list
= (unw_rec_list
*) frag
->fr_opcode
;
2894 fixup_unw_records (list
, 0);
2896 len
= calc_record_size (list
);
2897 /* pad to pointer-size boundary. */
2898 pad
= len
% md
.pointer_size
;
2900 len
+= md
.pointer_size
- pad
;
2901 /* Add 8 for the header. */
2903 /* Add a pointer for the personality offset. */
2904 if (frag
->fr_offset
)
2905 size
+= md
.pointer_size
;
2907 /* fr_var carries the max_chars that we created the fragment with.
2908 We must, of course, have allocated enough memory earlier. */
2909 assert (frag
->fr_var
>= size
);
2911 return frag
->fr_fix
+ size
;
2914 /* This function converts a rs_machine_dependent variant frag into a
2915 normal fill frag with the unwind image from the the record list. */
2917 ia64_convert_frag (fragS
*frag
)
2923 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2924 list
= (unw_rec_list
*) frag
->fr_opcode
;
2925 fixup_unw_records (list
, 0);
2927 len
= calc_record_size (list
);
2928 /* pad to pointer-size boundary. */
2929 pad
= len
% md
.pointer_size
;
2931 len
+= md
.pointer_size
- pad
;
2932 /* Add 8 for the header. */
2934 /* Add a pointer for the personality offset. */
2935 if (frag
->fr_offset
)
2936 size
+= md
.pointer_size
;
2938 /* fr_var carries the max_chars that we created the fragment with.
2939 We must, of course, have allocated enough memory earlier. */
2940 assert (frag
->fr_var
>= size
);
2942 /* Initialize the header area. fr_offset is initialized with
2943 unwind.personality_routine. */
2944 if (frag
->fr_offset
)
2946 if (md
.flags
& EF_IA_64_ABI64
)
2947 flag_value
= (bfd_vma
) 3 << 32;
2949 /* 32-bit unwind info block. */
2950 flag_value
= (bfd_vma
) 0x1003 << 32;
2955 md_number_to_chars (frag
->fr_literal
,
2956 (((bfd_vma
) 1 << 48) /* Version. */
2957 | flag_value
/* U & E handler flags. */
2958 | (len
/ md
.pointer_size
)), /* Length. */
2961 /* Skip the header. */
2962 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2963 process_unw_records (list
, output_vbyte_mem
);
2965 /* Fill the padding bytes with zeros. */
2967 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2968 md
.pointer_size
- pad
);
2970 frag
->fr_fix
+= size
;
2971 frag
->fr_type
= rs_fill
;
2973 frag
->fr_offset
= 0;
2977 convert_expr_to_ab_reg (e
, ab
, regp
)
2984 if (e
->X_op
!= O_register
)
2987 reg
= e
->X_add_number
;
2988 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2991 *regp
= reg
- REG_GR
;
2993 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2994 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2997 *regp
= reg
- REG_FR
;
2999 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3002 *regp
= reg
- REG_BR
;
3009 case REG_PR
: *regp
= 0; break;
3010 case REG_PSP
: *regp
= 1; break;
3011 case REG_PRIUNAT
: *regp
= 2; break;
3012 case REG_BR
+ 0: *regp
= 3; break;
3013 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3014 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3015 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3016 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3017 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3018 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3019 case REG_AR
+ AR_LC
: *regp
= 10; break;
3029 convert_expr_to_xy_reg (e
, xy
, regp
)
3036 if (e
->X_op
!= O_register
)
3039 reg
= e
->X_add_number
;
3041 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3044 *regp
= reg
- REG_GR
;
3046 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3049 *regp
= reg
- REG_FR
;
3051 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3054 *regp
= reg
- REG_BR
;
3064 /* The current frag is an alignment frag. */
3065 align_frag
= frag_now
;
3066 s_align_bytes (arg
);
3071 int dummy ATTRIBUTE_UNUSED
;
3078 if (is_it_end_of_statement ())
3080 radix
= input_line_pointer
;
3081 ch
= get_symbol_end ();
3082 ia64_canonicalize_symbol_name (radix
);
3083 if (strcasecmp (radix
, "C"))
3084 as_bad ("Radix `%s' unsupported or invalid", radix
);
3085 *input_line_pointer
= ch
;
3086 demand_empty_rest_of_line ();
3089 /* Helper function for .loc directives. If the assembler is not generating
3090 line number info, then we need to remember which instructions have a .loc
3091 directive, and only call dwarf2_gen_line_info for those instructions. */
3096 CURR_SLOT
.loc_directive_seen
= 1;
3097 dwarf2_directive_loc (x
);
3100 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3102 dot_special_section (which
)
3105 set_section ((char *) special_section_name
[which
]);
3108 /* Return -1 for warning and 0 for error. */
3111 unwind_diagnostic (const char * region
, const char *directive
)
3113 if (md
.unwind_check
== unwind_check_warning
)
3115 as_warn (".%s outside of %s", directive
, region
);
3120 as_bad (".%s outside of %s", directive
, region
);
3121 ignore_rest_of_line ();
3126 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3127 a procedure but the unwind directive check is set to warning, 0 if
3128 a directive isn't in a procedure and the unwind directive check is set
3132 in_procedure (const char *directive
)
3134 if (unwind
.proc_start
3135 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3137 return unwind_diagnostic ("procedure", directive
);
3140 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3141 a prologue but the unwind directive check is set to warning, 0 if
3142 a directive isn't in a prologue and the unwind directive check is set
3146 in_prologue (const char *directive
)
3148 int in
= in_procedure (directive
);
3151 /* We are in a procedure. Check if we are in a prologue. */
3152 if (unwind
.prologue
)
3154 /* We only want to issue one message. */
3156 return unwind_diagnostic ("prologue", directive
);
3163 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3164 a body but the unwind directive check is set to warning, 0 if
3165 a directive isn't in a body and the unwind directive check is set
3169 in_body (const char *directive
)
3171 int in
= in_procedure (directive
);
3174 /* We are in a procedure. Check if we are in a body. */
3177 /* We only want to issue one message. */
3179 return unwind_diagnostic ("body region", directive
);
3187 add_unwind_entry (ptr
)
3191 unwind
.tail
->next
= ptr
;
3196 /* The current entry can in fact be a chain of unwind entries. */
3197 if (unwind
.current_entry
== NULL
)
3198 unwind
.current_entry
= ptr
;
3203 int dummy ATTRIBUTE_UNUSED
;
3207 if (!in_prologue ("fframe"))
3212 if (e
.X_op
!= O_constant
)
3213 as_bad ("Operand to .fframe must be a constant");
3215 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3220 int dummy ATTRIBUTE_UNUSED
;
3225 if (!in_prologue ("vframe"))
3229 reg
= e
.X_add_number
- REG_GR
;
3230 if (e
.X_op
== O_register
&& reg
< 128)
3232 add_unwind_entry (output_mem_stack_v ());
3233 if (! (unwind
.prologue_mask
& 2))
3234 add_unwind_entry (output_psp_gr (reg
));
3237 as_bad ("First operand to .vframe must be a general register");
3241 dot_vframesp (dummy
)
3242 int dummy ATTRIBUTE_UNUSED
;
3246 if (!in_prologue ("vframesp"))
3250 if (e
.X_op
== O_constant
)
3252 add_unwind_entry (output_mem_stack_v ());
3253 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3256 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3260 dot_vframepsp (dummy
)
3261 int dummy ATTRIBUTE_UNUSED
;
3265 if (!in_prologue ("vframepsp"))
3269 if (e
.X_op
== O_constant
)
3271 add_unwind_entry (output_mem_stack_v ());
3272 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3275 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3280 int dummy ATTRIBUTE_UNUSED
;
3286 if (!in_prologue ("save"))
3289 sep
= parse_operand (&e1
);
3291 as_bad ("No second operand to .save");
3292 sep
= parse_operand (&e2
);
3294 reg1
= e1
.X_add_number
;
3295 reg2
= e2
.X_add_number
- REG_GR
;
3297 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3298 if (e1
.X_op
== O_register
)
3300 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3304 case REG_AR
+ AR_BSP
:
3305 add_unwind_entry (output_bsp_when ());
3306 add_unwind_entry (output_bsp_gr (reg2
));
3308 case REG_AR
+ AR_BSPSTORE
:
3309 add_unwind_entry (output_bspstore_when ());
3310 add_unwind_entry (output_bspstore_gr (reg2
));
3312 case REG_AR
+ AR_RNAT
:
3313 add_unwind_entry (output_rnat_when ());
3314 add_unwind_entry (output_rnat_gr (reg2
));
3316 case REG_AR
+ AR_UNAT
:
3317 add_unwind_entry (output_unat_when ());
3318 add_unwind_entry (output_unat_gr (reg2
));
3320 case REG_AR
+ AR_FPSR
:
3321 add_unwind_entry (output_fpsr_when ());
3322 add_unwind_entry (output_fpsr_gr (reg2
));
3324 case REG_AR
+ AR_PFS
:
3325 add_unwind_entry (output_pfs_when ());
3326 if (! (unwind
.prologue_mask
& 4))
3327 add_unwind_entry (output_pfs_gr (reg2
));
3329 case REG_AR
+ AR_LC
:
3330 add_unwind_entry (output_lc_when ());
3331 add_unwind_entry (output_lc_gr (reg2
));
3334 add_unwind_entry (output_rp_when ());
3335 if (! (unwind
.prologue_mask
& 8))
3336 add_unwind_entry (output_rp_gr (reg2
));
3339 add_unwind_entry (output_preds_when ());
3340 if (! (unwind
.prologue_mask
& 1))
3341 add_unwind_entry (output_preds_gr (reg2
));
3344 add_unwind_entry (output_priunat_when_gr ());
3345 add_unwind_entry (output_priunat_gr (reg2
));
3348 as_bad ("First operand not a valid register");
3352 as_bad (" Second operand not a valid register");
3355 as_bad ("First operand not a register");
3360 int dummy ATTRIBUTE_UNUSED
;
3363 unsigned long ecount
; /* # of _additional_ regions to pop */
3366 if (!in_body ("restore"))
3369 sep
= parse_operand (&e1
);
3370 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3372 as_bad ("First operand to .restore must be stack pointer (sp)");
3378 parse_operand (&e2
);
3379 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3381 as_bad ("Second operand to .restore must be a constant >= 0");
3384 ecount
= e2
.X_add_number
;
3387 ecount
= unwind
.prologue_count
- 1;
3389 if (ecount
>= unwind
.prologue_count
)
3391 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3392 ecount
+ 1, unwind
.prologue_count
);
3396 add_unwind_entry (output_epilogue (ecount
));
3398 if (ecount
< unwind
.prologue_count
)
3399 unwind
.prologue_count
-= ecount
+ 1;
3401 unwind
.prologue_count
= 0;
3405 dot_restorereg (dummy
)
3406 int dummy ATTRIBUTE_UNUSED
;
3408 unsigned int ab
, reg
;
3411 if (!in_procedure ("restorereg"))
3416 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3418 as_bad ("First operand to .restorereg must be a preserved register");
3421 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3425 dot_restorereg_p (dummy
)
3426 int dummy ATTRIBUTE_UNUSED
;
3428 unsigned int qp
, ab
, reg
;
3432 if (!in_procedure ("restorereg.p"))
3435 sep
= parse_operand (&e1
);
3438 as_bad ("No second operand to .restorereg.p");
3442 parse_operand (&e2
);
3444 qp
= e1
.X_add_number
- REG_P
;
3445 if (e1
.X_op
!= O_register
|| qp
> 63)
3447 as_bad ("First operand to .restorereg.p must be a predicate");
3451 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3453 as_bad ("Second operand to .restorereg.p must be a preserved register");
3456 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3459 static char *special_linkonce_name
[] =
3461 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3465 start_unwind_section (const segT text_seg
, int sec_index
)
3468 Use a slightly ugly scheme to derive the unwind section names from
3469 the text section name:
3471 text sect. unwind table sect.
3472 name: name: comments:
3473 ---------- ----------------- --------------------------------
3475 .text.foo .IA_64.unwind.text.foo
3476 .foo .IA_64.unwind.foo
3478 .gnu.linkonce.ia64unw.foo
3479 _info .IA_64.unwind_info gas issues error message (ditto)
3480 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3482 This mapping is done so that:
3484 (a) An object file with unwind info only in .text will use
3485 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3486 This follows the letter of the ABI and also ensures backwards
3487 compatibility with older toolchains.
3489 (b) An object file with unwind info in multiple text sections
3490 will use separate unwind sections for each text section.
3491 This allows us to properly set the "sh_info" and "sh_link"
3492 fields in SHT_IA_64_UNWIND as required by the ABI and also
3493 lets GNU ld support programs with multiple segments
3494 containing unwind info (as might be the case for certain
3495 embedded applications).
3497 (c) An error is issued if there would be a name clash.
3500 const char *text_name
, *sec_text_name
;
3502 const char *prefix
= special_section_name
[sec_index
];
3504 size_t prefix_len
, suffix_len
, sec_name_len
;
3506 sec_text_name
= segment_name (text_seg
);
3507 text_name
= sec_text_name
;
3508 if (strncmp (text_name
, "_info", 5) == 0)
3510 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3512 ignore_rest_of_line ();
3515 if (strcmp (text_name
, ".text") == 0)
3518 /* Build the unwind section name by appending the (possibly stripped)
3519 text section name to the unwind prefix. */
3521 if (strncmp (text_name
, ".gnu.linkonce.t.",
3522 sizeof (".gnu.linkonce.t.") - 1) == 0)
3524 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3525 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3528 prefix_len
= strlen (prefix
);
3529 suffix_len
= strlen (suffix
);
3530 sec_name_len
= prefix_len
+ suffix_len
;
3531 sec_name
= alloca (sec_name_len
+ 1);
3532 memcpy (sec_name
, prefix
, prefix_len
);
3533 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3534 sec_name
[sec_name_len
] = '\0';
3536 /* Handle COMDAT group. */
3537 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3538 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3541 size_t len
, group_name_len
;
3542 const char *group_name
= elf_group_name (text_seg
);
3544 if (group_name
== NULL
)
3546 as_bad ("Group section `%s' has no group signature",
3548 ignore_rest_of_line ();
3551 /* We have to construct a fake section directive. */
3552 group_name_len
= strlen (group_name
);
3554 + 16 /* ,"aG",@progbits, */
3555 + group_name_len
/* ,group_name */
3558 section
= alloca (len
+ 1);
3559 memcpy (section
, sec_name
, sec_name_len
);
3560 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3561 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3562 memcpy (section
+ len
- 7, ",comdat", 7);
3563 section
[len
] = '\0';
3564 set_section (section
);
3568 set_section (sec_name
);
3569 bfd_set_section_flags (stdoutput
, now_seg
,
3570 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3573 elf_linked_to_section (now_seg
) = text_seg
;
3577 generate_unwind_image (const segT text_seg
)
3582 /* Mark the end of the unwind info, so that we can compute the size of the
3583 last unwind region. */
3584 add_unwind_entry (output_endp ());
3586 /* Force out pending instructions, to make sure all unwind records have
3587 a valid slot_number field. */
3588 ia64_flush_insns ();
3590 /* Generate the unwind record. */
3591 list
= optimize_unw_records (unwind
.list
);
3592 fixup_unw_records (list
, 1);
3593 size
= calc_record_size (list
);
3595 if (size
> 0 || unwind
.force_unwind_entry
)
3597 unwind
.force_unwind_entry
= 0;
3598 /* pad to pointer-size boundary. */
3599 pad
= size
% md
.pointer_size
;
3601 size
+= md
.pointer_size
- pad
;
3602 /* Add 8 for the header. */
3604 /* Add a pointer for the personality offset. */
3605 if (unwind
.personality_routine
)
3606 size
+= md
.pointer_size
;
3609 /* If there are unwind records, switch sections, and output the info. */
3613 bfd_reloc_code_real_type reloc
;
3615 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3617 /* Make sure the section has 4 byte alignment for ILP32 and
3618 8 byte alignment for LP64. */
3619 frag_align (md
.pointer_size_shift
, 0, 0);
3620 record_alignment (now_seg
, md
.pointer_size_shift
);
3622 /* Set expression which points to start of unwind descriptor area. */
3623 unwind
.info
= expr_build_dot ();
3625 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3626 (offsetT
) (long) unwind
.personality_routine
,
3629 /* Add the personality address to the image. */
3630 if (unwind
.personality_routine
!= 0)
3632 exp
.X_op
= O_symbol
;
3633 exp
.X_add_symbol
= unwind
.personality_routine
;
3634 exp
.X_add_number
= 0;
3636 if (md
.flags
& EF_IA_64_BE
)
3638 if (md
.flags
& EF_IA_64_ABI64
)
3639 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3641 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3645 if (md
.flags
& EF_IA_64_ABI64
)
3646 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3648 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3651 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3652 md
.pointer_size
, &exp
, 0, reloc
);
3653 unwind
.personality_routine
= 0;
3657 free_saved_prologue_counts ();
3658 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3662 dot_handlerdata (dummy
)
3663 int dummy ATTRIBUTE_UNUSED
;
3665 if (!in_procedure ("handlerdata"))
3667 unwind
.force_unwind_entry
= 1;
3669 /* Remember which segment we're in so we can switch back after .endp */
3670 unwind
.saved_text_seg
= now_seg
;
3671 unwind
.saved_text_subseg
= now_subseg
;
3673 /* Generate unwind info into unwind-info section and then leave that
3674 section as the currently active one so dataXX directives go into
3675 the language specific data area of the unwind info block. */
3676 generate_unwind_image (now_seg
);
3677 demand_empty_rest_of_line ();
3681 dot_unwentry (dummy
)
3682 int dummy ATTRIBUTE_UNUSED
;
3684 if (!in_procedure ("unwentry"))
3686 unwind
.force_unwind_entry
= 1;
3687 demand_empty_rest_of_line ();
3692 int dummy ATTRIBUTE_UNUSED
;
3697 if (!in_prologue ("altrp"))
3701 reg
= e
.X_add_number
- REG_BR
;
3702 if (e
.X_op
== O_register
&& reg
< 8)
3703 add_unwind_entry (output_rp_br (reg
));
3705 as_bad ("First operand not a valid branch register");
3709 dot_savemem (psprel
)
3716 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3719 sep
= parse_operand (&e1
);
3721 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3722 sep
= parse_operand (&e2
);
3724 reg1
= e1
.X_add_number
;
3725 val
= e2
.X_add_number
;
3727 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3728 if (e1
.X_op
== O_register
)
3730 if (e2
.X_op
== O_constant
)
3734 case REG_AR
+ AR_BSP
:
3735 add_unwind_entry (output_bsp_when ());
3736 add_unwind_entry ((psprel
3738 : output_bsp_sprel
) (val
));
3740 case REG_AR
+ AR_BSPSTORE
:
3741 add_unwind_entry (output_bspstore_when ());
3742 add_unwind_entry ((psprel
3743 ? output_bspstore_psprel
3744 : output_bspstore_sprel
) (val
));
3746 case REG_AR
+ AR_RNAT
:
3747 add_unwind_entry (output_rnat_when ());
3748 add_unwind_entry ((psprel
3749 ? output_rnat_psprel
3750 : output_rnat_sprel
) (val
));
3752 case REG_AR
+ AR_UNAT
:
3753 add_unwind_entry (output_unat_when ());
3754 add_unwind_entry ((psprel
3755 ? output_unat_psprel
3756 : output_unat_sprel
) (val
));
3758 case REG_AR
+ AR_FPSR
:
3759 add_unwind_entry (output_fpsr_when ());
3760 add_unwind_entry ((psprel
3761 ? output_fpsr_psprel
3762 : output_fpsr_sprel
) (val
));
3764 case REG_AR
+ AR_PFS
:
3765 add_unwind_entry (output_pfs_when ());
3766 add_unwind_entry ((psprel
3768 : output_pfs_sprel
) (val
));
3770 case REG_AR
+ AR_LC
:
3771 add_unwind_entry (output_lc_when ());
3772 add_unwind_entry ((psprel
3774 : output_lc_sprel
) (val
));
3777 add_unwind_entry (output_rp_when ());
3778 add_unwind_entry ((psprel
3780 : output_rp_sprel
) (val
));
3783 add_unwind_entry (output_preds_when ());
3784 add_unwind_entry ((psprel
3785 ? output_preds_psprel
3786 : output_preds_sprel
) (val
));
3789 add_unwind_entry (output_priunat_when_mem ());
3790 add_unwind_entry ((psprel
3791 ? output_priunat_psprel
3792 : output_priunat_sprel
) (val
));
3795 as_bad ("First operand not a valid register");
3799 as_bad (" Second operand not a valid constant");
3802 as_bad ("First operand not a register");
3807 int dummy ATTRIBUTE_UNUSED
;
3812 if (!in_prologue ("save.g"))
3815 sep
= parse_operand (&e1
);
3817 parse_operand (&e2
);
3819 if (e1
.X_op
!= O_constant
)
3820 as_bad ("First operand to .save.g must be a constant.");
3823 int grmask
= e1
.X_add_number
;
3825 add_unwind_entry (output_gr_mem (grmask
));
3828 int reg
= e2
.X_add_number
- REG_GR
;
3829 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3830 add_unwind_entry (output_gr_gr (grmask
, reg
));
3832 as_bad ("Second operand is an invalid register.");
3839 int dummy ATTRIBUTE_UNUSED
;
3844 if (!in_prologue ("save.f"))
3847 sep
= parse_operand (&e1
);
3849 if (e1
.X_op
!= O_constant
)
3850 as_bad ("Operand to .save.f must be a constant.");
3852 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3857 int dummy ATTRIBUTE_UNUSED
;
3864 if (!in_prologue ("save.b"))
3867 sep
= parse_operand (&e1
);
3868 if (e1
.X_op
!= O_constant
)
3870 as_bad ("First operand to .save.b must be a constant.");
3873 brmask
= e1
.X_add_number
;
3877 sep
= parse_operand (&e2
);
3878 reg
= e2
.X_add_number
- REG_GR
;
3879 if (e2
.X_op
!= O_register
|| reg
> 127)
3881 as_bad ("Second operand to .save.b must be a general register.");
3884 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3887 add_unwind_entry (output_br_mem (brmask
));
3889 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3890 demand_empty_rest_of_line ();
3895 int dummy ATTRIBUTE_UNUSED
;
3900 if (!in_prologue ("save.gf"))
3903 sep
= parse_operand (&e1
);
3905 parse_operand (&e2
);
3907 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3908 as_bad ("Both operands of .save.gf must be constants.");
3911 int grmask
= e1
.X_add_number
;
3912 int frmask
= e2
.X_add_number
;
3913 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3919 int dummy ATTRIBUTE_UNUSED
;
3924 if (!in_prologue ("spill"))
3927 sep
= parse_operand (&e
);
3928 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3929 demand_empty_rest_of_line ();
3931 if (e
.X_op
!= O_constant
)
3932 as_bad ("Operand to .spill must be a constant");
3934 add_unwind_entry (output_spill_base (e
.X_add_number
));
3938 dot_spillreg (dummy
)
3939 int dummy ATTRIBUTE_UNUSED
;
3942 unsigned int ab
, xy
, reg
, treg
;
3945 if (!in_procedure ("spillreg"))
3948 sep
= parse_operand (&e1
);
3951 as_bad ("No second operand to .spillreg");
3955 parse_operand (&e2
);
3957 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3959 as_bad ("First operand to .spillreg must be a preserved register");
3963 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3965 as_bad ("Second operand to .spillreg must be a register");
3969 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3973 dot_spillmem (psprel
)
3978 unsigned int ab
, reg
;
3980 if (!in_procedure ("spillmem"))
3983 sep
= parse_operand (&e1
);
3986 as_bad ("Second operand missing");
3990 parse_operand (&e2
);
3992 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3994 as_bad ("First operand to .spill%s must be a preserved register",
3995 psprel
? "psp" : "sp");
3999 if (e2
.X_op
!= O_constant
)
4001 as_bad ("Second operand to .spill%s must be a constant",
4002 psprel
? "psp" : "sp");
4007 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
4009 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
4013 dot_spillreg_p (dummy
)
4014 int dummy ATTRIBUTE_UNUSED
;
4017 unsigned int ab
, xy
, reg
, treg
;
4018 expressionS e1
, e2
, e3
;
4021 if (!in_procedure ("spillreg.p"))
4024 sep
= parse_operand (&e1
);
4027 as_bad ("No second and third operand to .spillreg.p");
4031 sep
= parse_operand (&e2
);
4034 as_bad ("No third operand to .spillreg.p");
4038 parse_operand (&e3
);
4040 qp
= e1
.X_add_number
- REG_P
;
4042 if (e1
.X_op
!= O_register
|| qp
> 63)
4044 as_bad ("First operand to .spillreg.p must be a predicate");
4048 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4050 as_bad ("Second operand to .spillreg.p must be a preserved register");
4054 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4056 as_bad ("Third operand to .spillreg.p must be a register");
4060 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4064 dot_spillmem_p (psprel
)
4067 expressionS e1
, e2
, e3
;
4069 unsigned int ab
, reg
;
4072 if (!in_procedure ("spillmem.p"))
4075 sep
= parse_operand (&e1
);
4078 as_bad ("Second operand missing");
4082 parse_operand (&e2
);
4085 as_bad ("Second operand missing");
4089 parse_operand (&e3
);
4091 qp
= e1
.X_add_number
- REG_P
;
4092 if (e1
.X_op
!= O_register
|| qp
> 63)
4094 as_bad ("First operand to .spill%s_p must be a predicate",
4095 psprel
? "psp" : "sp");
4099 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4101 as_bad ("Second operand to .spill%s_p must be a preserved register",
4102 psprel
? "psp" : "sp");
4106 if (e3
.X_op
!= O_constant
)
4108 as_bad ("Third operand to .spill%s_p must be a constant",
4109 psprel
? "psp" : "sp");
4114 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4116 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4120 get_saved_prologue_count (lbl
)
4123 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4125 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4129 return lpc
->prologue_count
;
4131 as_bad ("Missing .label_state %ld", lbl
);
4136 save_prologue_count (lbl
, count
)
4140 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4142 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4146 lpc
->prologue_count
= count
;
4149 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4151 new_lpc
->next
= unwind
.saved_prologue_counts
;
4152 new_lpc
->label_number
= lbl
;
4153 new_lpc
->prologue_count
= count
;
4154 unwind
.saved_prologue_counts
= new_lpc
;
4159 free_saved_prologue_counts ()
4161 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4162 label_prologue_count
*next
;
4171 unwind
.saved_prologue_counts
= NULL
;
4175 dot_label_state (dummy
)
4176 int dummy ATTRIBUTE_UNUSED
;
4180 if (!in_body ("label_state"))
4184 if (e
.X_op
!= O_constant
)
4186 as_bad ("Operand to .label_state must be a constant");
4189 add_unwind_entry (output_label_state (e
.X_add_number
));
4190 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4194 dot_copy_state (dummy
)
4195 int dummy ATTRIBUTE_UNUSED
;
4199 if (!in_body ("copy_state"))
4203 if (e
.X_op
!= O_constant
)
4205 as_bad ("Operand to .copy_state must be a constant");
4208 add_unwind_entry (output_copy_state (e
.X_add_number
));
4209 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4214 int dummy ATTRIBUTE_UNUSED
;
4219 if (!in_procedure ("unwabi"))
4222 sep
= parse_operand (&e1
);
4225 as_bad ("Second operand to .unwabi missing");
4228 sep
= parse_operand (&e2
);
4229 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4230 demand_empty_rest_of_line ();
4232 if (e1
.X_op
!= O_constant
)
4234 as_bad ("First operand to .unwabi must be a constant");
4238 if (e2
.X_op
!= O_constant
)
4240 as_bad ("Second operand to .unwabi must be a constant");
4244 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4248 dot_personality (dummy
)
4249 int dummy ATTRIBUTE_UNUSED
;
4252 if (!in_procedure ("personality"))
4255 name
= input_line_pointer
;
4256 c
= get_symbol_end ();
4257 p
= input_line_pointer
;
4258 unwind
.personality_routine
= symbol_find_or_make (name
);
4259 unwind
.force_unwind_entry
= 1;
4262 demand_empty_rest_of_line ();
4267 int dummy ATTRIBUTE_UNUSED
;
4272 unwind
.proc_start
= 0;
4273 /* Parse names of main and alternate entry points and mark them as
4274 function symbols: */
4278 name
= input_line_pointer
;
4279 c
= get_symbol_end ();
4280 p
= input_line_pointer
;
4282 as_bad ("Empty argument of .proc");
4285 sym
= symbol_find_or_make (name
);
4286 if (S_IS_DEFINED (sym
))
4287 as_bad ("`%s' was already defined", name
);
4288 else if (unwind
.proc_start
== 0)
4290 unwind
.proc_start
= sym
;
4292 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4296 if (*input_line_pointer
!= ',')
4298 ++input_line_pointer
;
4300 if (unwind
.proc_start
== 0)
4301 unwind
.proc_start
= expr_build_dot ();
4302 demand_empty_rest_of_line ();
4305 unwind
.prologue
= 0;
4306 unwind
.prologue_count
= 0;
4309 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4310 unwind
.personality_routine
= 0;
4315 int dummy ATTRIBUTE_UNUSED
;
4317 if (!in_procedure ("body"))
4319 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4320 as_warn ("Initial .body should precede any instructions");
4322 unwind
.prologue
= 0;
4323 unwind
.prologue_mask
= 0;
4326 add_unwind_entry (output_body ());
4327 demand_empty_rest_of_line ();
4331 dot_prologue (dummy
)
4332 int dummy ATTRIBUTE_UNUSED
;
4335 int mask
= 0, grsave
= 0;
4337 if (!in_procedure ("prologue"))
4339 if (unwind
.prologue
)
4341 as_bad (".prologue within prologue");
4342 ignore_rest_of_line ();
4345 if (!unwind
.body
&& unwind
.insn
)
4346 as_warn ("Initial .prologue should precede any instructions");
4348 if (!is_it_end_of_statement ())
4351 sep
= parse_operand (&e1
);
4353 as_bad ("No second operand to .prologue");
4354 sep
= parse_operand (&e2
);
4355 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4356 demand_empty_rest_of_line ();
4358 if (e1
.X_op
== O_constant
)
4360 mask
= e1
.X_add_number
;
4362 if (e2
.X_op
== O_constant
)
4363 grsave
= e2
.X_add_number
;
4364 else if (e2
.X_op
== O_register
4365 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4368 as_bad ("Second operand not a constant or general register");
4370 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4373 as_bad ("First operand not a constant");
4376 add_unwind_entry (output_prologue ());
4378 unwind
.prologue
= 1;
4379 unwind
.prologue_mask
= mask
;
4381 ++unwind
.prologue_count
;
4386 int dummy ATTRIBUTE_UNUSED
;
4390 int bytes_per_address
;
4393 subsegT saved_subseg
;
4394 char *name
, *default_name
, *p
, c
;
4396 int unwind_check
= md
.unwind_check
;
4398 md
.unwind_check
= unwind_check_error
;
4399 if (!in_procedure ("endp"))
4401 md
.unwind_check
= unwind_check
;
4403 if (unwind
.saved_text_seg
)
4405 saved_seg
= unwind
.saved_text_seg
;
4406 saved_subseg
= unwind
.saved_text_subseg
;
4407 unwind
.saved_text_seg
= NULL
;
4411 saved_seg
= now_seg
;
4412 saved_subseg
= now_subseg
;
4415 insn_group_break (1, 0, 0);
4417 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4419 generate_unwind_image (saved_seg
);
4421 if (unwind
.info
|| unwind
.force_unwind_entry
)
4425 subseg_set (md
.last_text_seg
, 0);
4426 proc_end
= expr_build_dot ();
4428 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4430 /* Make sure that section has 4 byte alignment for ILP32 and
4431 8 byte alignment for LP64. */
4432 record_alignment (now_seg
, md
.pointer_size_shift
);
4434 /* Need space for 3 pointers for procedure start, procedure end,
4436 ptr
= frag_more (3 * md
.pointer_size
);
4437 where
= frag_now_fix () - (3 * md
.pointer_size
);
4438 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4440 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4441 e
.X_op
= O_pseudo_fixup
;
4442 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4444 if (!S_IS_LOCAL (unwind
.proc_start
)
4445 && S_IS_DEFINED (unwind
.proc_start
))
4446 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_start
),
4447 S_GET_VALUE (unwind
.proc_start
),
4448 symbol_get_frag (unwind
.proc_start
));
4450 e
.X_add_symbol
= unwind
.proc_start
;
4451 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4453 e
.X_op
= O_pseudo_fixup
;
4454 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4456 e
.X_add_symbol
= proc_end
;
4457 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4458 bytes_per_address
, &e
);
4462 e
.X_op
= O_pseudo_fixup
;
4463 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4465 e
.X_add_symbol
= unwind
.info
;
4466 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4467 bytes_per_address
, &e
);
4470 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4474 subseg_set (saved_seg
, saved_subseg
);
4476 if (unwind
.proc_start
)
4477 default_name
= (char *) S_GET_NAME (unwind
.proc_start
);
4479 default_name
= NULL
;
4481 /* Parse names of main and alternate entry points and set symbol sizes. */
4485 name
= input_line_pointer
;
4486 c
= get_symbol_end ();
4487 p
= input_line_pointer
;
4490 if (md
.unwind_check
== unwind_check_warning
)
4494 as_warn ("Empty argument of .endp. Use the default name `%s'",
4496 name
= default_name
;
4499 as_warn ("Empty argument of .endp");
4502 as_bad ("Empty argument of .endp");
4506 sym
= symbol_find (name
);
4508 && md
.unwind_check
== unwind_check_warning
4510 && default_name
!= name
)
4512 /* We have a bad name. Try the default one if needed. */
4513 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4514 name
, default_name
);
4515 name
= default_name
;
4516 sym
= symbol_find (name
);
4518 if (!sym
|| !S_IS_DEFINED (sym
))
4519 as_bad ("`%s' was not defined within procedure", name
);
4520 else if (unwind
.proc_start
4521 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4522 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4524 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4525 fragS
*frag
= symbol_get_frag (sym
);
4527 /* Check whether the function label is at or beyond last
4529 while (fr
&& fr
!= frag
)
4533 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4534 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4537 symbol_get_obj (sym
)->size
=
4538 (expressionS
*) xmalloc (sizeof (expressionS
));
4539 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4540 symbol_get_obj (sym
)->size
->X_add_symbol
4541 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4542 frag_now_fix (), frag_now
);
4543 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4544 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4551 if (*input_line_pointer
!= ',')
4553 ++input_line_pointer
;
4555 demand_empty_rest_of_line ();
4556 unwind
.proc_start
= unwind
.info
= 0;
4560 dot_template (template)
4563 CURR_SLOT
.user_template
= template;
4568 int dummy ATTRIBUTE_UNUSED
;
4570 int ins
, locs
, outs
, rots
;
4572 if (is_it_end_of_statement ())
4573 ins
= locs
= outs
= rots
= 0;
4576 ins
= get_absolute_expression ();
4577 if (*input_line_pointer
++ != ',')
4579 locs
= get_absolute_expression ();
4580 if (*input_line_pointer
++ != ',')
4582 outs
= get_absolute_expression ();
4583 if (*input_line_pointer
++ != ',')
4585 rots
= get_absolute_expression ();
4587 set_regstack (ins
, locs
, outs
, rots
);
4591 as_bad ("Comma expected");
4592 ignore_rest_of_line ();
4599 unsigned num_regs
, num_alloced
= 0;
4600 struct dynreg
**drpp
, *dr
;
4601 int ch
, base_reg
= 0;
4607 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4608 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4609 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4613 /* First, remove existing names from hash table. */
4614 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4616 hash_delete (md
.dynreg_hash
, dr
->name
);
4617 /* FIXME: Free dr->name. */
4621 drpp
= &md
.dynreg
[type
];
4624 start
= input_line_pointer
;
4625 ch
= get_symbol_end ();
4626 len
= strlen (ia64_canonicalize_symbol_name (start
));
4627 *input_line_pointer
= ch
;
4630 if (*input_line_pointer
!= '[')
4632 as_bad ("Expected '['");
4635 ++input_line_pointer
; /* skip '[' */
4637 num_regs
= get_absolute_expression ();
4639 if (*input_line_pointer
++ != ']')
4641 as_bad ("Expected ']'");
4646 num_alloced
+= num_regs
;
4650 if (num_alloced
> md
.rot
.num_regs
)
4652 as_bad ("Used more than the declared %d rotating registers",
4658 if (num_alloced
> 96)
4660 as_bad ("Used more than the available 96 rotating registers");
4665 if (num_alloced
> 48)
4667 as_bad ("Used more than the available 48 rotating registers");
4678 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4679 memset (*drpp
, 0, sizeof (*dr
));
4682 name
= obstack_alloc (¬es
, len
+ 1);
4683 memcpy (name
, start
, len
);
4688 dr
->num_regs
= num_regs
;
4689 dr
->base
= base_reg
;
4691 base_reg
+= num_regs
;
4693 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4695 as_bad ("Attempt to redefine register set `%s'", name
);
4696 obstack_free (¬es
, name
);
4700 if (*input_line_pointer
!= ',')
4702 ++input_line_pointer
; /* skip comma */
4705 demand_empty_rest_of_line ();
4709 ignore_rest_of_line ();
4713 dot_byteorder (byteorder
)
4716 segment_info_type
*seginfo
= seg_info (now_seg
);
4718 if (byteorder
== -1)
4720 if (seginfo
->tc_segment_info_data
.endian
== 0)
4721 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4722 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4725 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4727 if (target_big_endian
!= byteorder
)
4729 target_big_endian
= byteorder
;
4730 if (target_big_endian
)
4732 ia64_number_to_chars
= number_to_chars_bigendian
;
4733 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4737 ia64_number_to_chars
= number_to_chars_littleendian
;
4738 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4745 int dummy ATTRIBUTE_UNUSED
;
4752 option
= input_line_pointer
;
4753 ch
= get_symbol_end ();
4754 if (strcmp (option
, "lsb") == 0)
4755 md
.flags
&= ~EF_IA_64_BE
;
4756 else if (strcmp (option
, "msb") == 0)
4757 md
.flags
|= EF_IA_64_BE
;
4758 else if (strcmp (option
, "abi32") == 0)
4759 md
.flags
&= ~EF_IA_64_ABI64
;
4760 else if (strcmp (option
, "abi64") == 0)
4761 md
.flags
|= EF_IA_64_ABI64
;
4763 as_bad ("Unknown psr option `%s'", option
);
4764 *input_line_pointer
= ch
;
4767 if (*input_line_pointer
!= ',')
4770 ++input_line_pointer
;
4773 demand_empty_rest_of_line ();
4778 int dummy ATTRIBUTE_UNUSED
;
4780 new_logical_line (0, get_absolute_expression ());
4781 demand_empty_rest_of_line ();
4785 cross_section (ref
, cons
, ua
)
4787 void (*cons
) PARAMS((int));
4791 int saved_auto_align
;
4792 unsigned int section_count
;
4795 start
= input_line_pointer
;
4801 name
= demand_copy_C_string (&len
);
4802 obstack_free(¬es
, name
);
4805 ignore_rest_of_line ();
4811 char c
= get_symbol_end ();
4813 if (input_line_pointer
== start
)
4815 as_bad ("Missing section name");
4816 ignore_rest_of_line ();
4819 *input_line_pointer
= c
;
4821 end
= input_line_pointer
;
4823 if (*input_line_pointer
!= ',')
4825 as_bad ("Comma expected after section name");
4826 ignore_rest_of_line ();
4830 end
= input_line_pointer
+ 1; /* skip comma */
4831 input_line_pointer
= start
;
4832 md
.keep_pending_output
= 1;
4833 section_count
= bfd_count_sections(stdoutput
);
4834 obj_elf_section (0);
4835 if (section_count
!= bfd_count_sections(stdoutput
))
4836 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4837 input_line_pointer
= end
;
4838 saved_auto_align
= md
.auto_align
;
4843 md
.auto_align
= saved_auto_align
;
4844 obj_elf_previous (0);
4845 md
.keep_pending_output
= 0;
4852 cross_section (size
, cons
, 0);
4855 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4858 stmt_float_cons (kind
)
4879 ia64_do_align (alignment
);
4887 int saved_auto_align
= md
.auto_align
;
4891 md
.auto_align
= saved_auto_align
;
4895 dot_xfloat_cons (kind
)
4898 cross_section (kind
, stmt_float_cons
, 0);
4902 dot_xstringer (zero
)
4905 cross_section (zero
, stringer
, 0);
4912 cross_section (size
, cons
, 1);
4916 dot_xfloat_cons_ua (kind
)
4919 cross_section (kind
, float_cons
, 1);
4922 /* .reg.val <regname>,value */
4926 int dummy ATTRIBUTE_UNUSED
;
4931 if (reg
.X_op
!= O_register
)
4933 as_bad (_("Register name expected"));
4934 ignore_rest_of_line ();
4936 else if (*input_line_pointer
++ != ',')
4938 as_bad (_("Comma expected"));
4939 ignore_rest_of_line ();
4943 valueT value
= get_absolute_expression ();
4944 int regno
= reg
.X_add_number
;
4945 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4946 as_warn (_("Register value annotation ignored"));
4949 gr_values
[regno
- REG_GR
].known
= 1;
4950 gr_values
[regno
- REG_GR
].value
= value
;
4951 gr_values
[regno
- REG_GR
].path
= md
.path
;
4954 demand_empty_rest_of_line ();
4959 .serialize.instruction
4962 dot_serialize (type
)
4965 insn_group_break (0, 0, 0);
4967 instruction_serialization ();
4969 data_serialization ();
4970 insn_group_break (0, 0, 0);
4971 demand_empty_rest_of_line ();
4974 /* select dv checking mode
4979 A stop is inserted when changing modes
4986 if (md
.manual_bundling
)
4987 as_warn (_("Directive invalid within a bundle"));
4989 if (type
== 'E' || type
== 'A')
4990 md
.mode_explicitly_set
= 0;
4992 md
.mode_explicitly_set
= 1;
4999 if (md
.explicit_mode
)
5000 insn_group_break (1, 0, 0);
5001 md
.explicit_mode
= 0;
5005 if (!md
.explicit_mode
)
5006 insn_group_break (1, 0, 0);
5007 md
.explicit_mode
= 1;
5011 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5012 insn_group_break (1, 0, 0);
5013 md
.explicit_mode
= md
.default_explicit_mode
;
5014 md
.mode_explicitly_set
= 0;
5025 for (regno
= 0; regno
< 64; regno
++)
5027 if (mask
& ((valueT
) 1 << regno
))
5029 fprintf (stderr
, "%s p%d", comma
, regno
);
5036 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5037 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5038 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5039 .pred.safe_across_calls p1 [, p2 [,...]]
5048 int p1
= -1, p2
= -1;
5052 if (*input_line_pointer
== '"')
5055 char *form
= demand_copy_C_string (&len
);
5057 if (strcmp (form
, "mutex") == 0)
5059 else if (strcmp (form
, "clear") == 0)
5061 else if (strcmp (form
, "imply") == 0)
5063 obstack_free (¬es
, form
);
5065 else if (*input_line_pointer
== '@')
5067 char *form
= ++input_line_pointer
;
5068 char c
= get_symbol_end();
5070 if (strcmp (form
, "mutex") == 0)
5072 else if (strcmp (form
, "clear") == 0)
5074 else if (strcmp (form
, "imply") == 0)
5076 *input_line_pointer
= c
;
5080 as_bad (_("Missing predicate relation type"));
5081 ignore_rest_of_line ();
5086 as_bad (_("Unrecognized predicate relation type"));
5087 ignore_rest_of_line ();
5090 if (*input_line_pointer
== ',')
5091 ++input_line_pointer
;
5100 expressionS pr
, *pr1
, *pr2
;
5103 if (pr
.X_op
== O_register
5104 && pr
.X_add_number
>= REG_P
5105 && pr
.X_add_number
<= REG_P
+ 63)
5107 regno
= pr
.X_add_number
- REG_P
;
5115 else if (type
!= 'i'
5116 && pr
.X_op
== O_subtract
5117 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5118 && pr1
->X_op
== O_register
5119 && pr1
->X_add_number
>= REG_P
5120 && pr1
->X_add_number
<= REG_P
+ 63
5121 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5122 && pr2
->X_op
== O_register
5123 && pr2
->X_add_number
>= REG_P
5124 && pr2
->X_add_number
<= REG_P
+ 63)
5129 regno
= pr1
->X_add_number
- REG_P
;
5130 stop
= pr2
->X_add_number
- REG_P
;
5133 as_bad (_("Bad register range"));
5134 ignore_rest_of_line ();
5137 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5138 count
+= stop
- regno
+ 1;
5142 as_bad (_("Predicate register expected"));
5143 ignore_rest_of_line ();
5147 as_warn (_("Duplicate predicate register ignored"));
5149 if (*input_line_pointer
!= ',')
5151 ++input_line_pointer
;
5160 clear_qp_mutex (mask
);
5161 clear_qp_implies (mask
, (valueT
) 0);
5164 if (count
!= 2 || p1
== -1 || p2
== -1)
5165 as_bad (_("Predicate source and target required"));
5166 else if (p1
== 0 || p2
== 0)
5167 as_bad (_("Use of p0 is not valid in this context"));
5169 add_qp_imply (p1
, p2
);
5174 as_bad (_("At least two PR arguments expected"));
5179 as_bad (_("Use of p0 is not valid in this context"));
5182 add_qp_mutex (mask
);
5185 /* note that we don't override any existing relations */
5188 as_bad (_("At least one PR argument expected"));
5193 fprintf (stderr
, "Safe across calls: ");
5194 print_prmask (mask
);
5195 fprintf (stderr
, "\n");
5197 qp_safe_across_calls
= mask
;
5200 demand_empty_rest_of_line ();
5203 /* .entry label [, label [, ...]]
5204 Hint to DV code that the given labels are to be considered entry points.
5205 Otherwise, only global labels are considered entry points. */
5209 int dummy ATTRIBUTE_UNUSED
;
5218 name
= input_line_pointer
;
5219 c
= get_symbol_end ();
5220 symbolP
= symbol_find_or_make (name
);
5222 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5224 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5227 *input_line_pointer
= c
;
5229 c
= *input_line_pointer
;
5232 input_line_pointer
++;
5234 if (*input_line_pointer
== '\n')
5240 demand_empty_rest_of_line ();
5243 /* .mem.offset offset, base
5244 "base" is used to distinguish between offsets from a different base. */
5247 dot_mem_offset (dummy
)
5248 int dummy ATTRIBUTE_UNUSED
;
5250 md
.mem_offset
.hint
= 1;
5251 md
.mem_offset
.offset
= get_absolute_expression ();
5252 if (*input_line_pointer
!= ',')
5254 as_bad (_("Comma expected"));
5255 ignore_rest_of_line ();
5258 ++input_line_pointer
;
5259 md
.mem_offset
.base
= get_absolute_expression ();
5260 demand_empty_rest_of_line ();
5263 /* ia64-specific pseudo-ops: */
5264 const pseudo_typeS md_pseudo_table
[] =
5266 { "radix", dot_radix
, 0 },
5267 { "lcomm", s_lcomm_bytes
, 1 },
5268 { "loc", dot_loc
, 0 },
5269 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5270 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5271 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5272 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5273 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5274 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5275 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5276 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5277 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5278 { "proc", dot_proc
, 0 },
5279 { "body", dot_body
, 0 },
5280 { "prologue", dot_prologue
, 0 },
5281 { "endp", dot_endp
, 0 },
5283 { "fframe", dot_fframe
, 0 },
5284 { "vframe", dot_vframe
, 0 },
5285 { "vframesp", dot_vframesp
, 0 },
5286 { "vframepsp", dot_vframepsp
, 0 },
5287 { "save", dot_save
, 0 },
5288 { "restore", dot_restore
, 0 },
5289 { "restorereg", dot_restorereg
, 0 },
5290 { "restorereg.p", dot_restorereg_p
, 0 },
5291 { "handlerdata", dot_handlerdata
, 0 },
5292 { "unwentry", dot_unwentry
, 0 },
5293 { "altrp", dot_altrp
, 0 },
5294 { "savesp", dot_savemem
, 0 },
5295 { "savepsp", dot_savemem
, 1 },
5296 { "save.g", dot_saveg
, 0 },
5297 { "save.f", dot_savef
, 0 },
5298 { "save.b", dot_saveb
, 0 },
5299 { "save.gf", dot_savegf
, 0 },
5300 { "spill", dot_spill
, 0 },
5301 { "spillreg", dot_spillreg
, 0 },
5302 { "spillsp", dot_spillmem
, 0 },
5303 { "spillpsp", dot_spillmem
, 1 },
5304 { "spillreg.p", dot_spillreg_p
, 0 },
5305 { "spillsp.p", dot_spillmem_p
, 0 },
5306 { "spillpsp.p", dot_spillmem_p
, 1 },
5307 { "label_state", dot_label_state
, 0 },
5308 { "copy_state", dot_copy_state
, 0 },
5309 { "unwabi", dot_unwabi
, 0 },
5310 { "personality", dot_personality
, 0 },
5311 { "mii", dot_template
, 0x0 },
5312 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5313 { "mlx", dot_template
, 0x2 },
5314 { "mmi", dot_template
, 0x4 },
5315 { "mfi", dot_template
, 0x6 },
5316 { "mmf", dot_template
, 0x7 },
5317 { "mib", dot_template
, 0x8 },
5318 { "mbb", dot_template
, 0x9 },
5319 { "bbb", dot_template
, 0xb },
5320 { "mmb", dot_template
, 0xc },
5321 { "mfb", dot_template
, 0xe },
5322 { "align", dot_align
, 0 },
5323 { "regstk", dot_regstk
, 0 },
5324 { "rotr", dot_rot
, DYNREG_GR
},
5325 { "rotf", dot_rot
, DYNREG_FR
},
5326 { "rotp", dot_rot
, DYNREG_PR
},
5327 { "lsb", dot_byteorder
, 0 },
5328 { "msb", dot_byteorder
, 1 },
5329 { "psr", dot_psr
, 0 },
5330 { "alias", dot_alias
, 0 },
5331 { "secalias", dot_alias
, 1 },
5332 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5334 { "xdata1", dot_xdata
, 1 },
5335 { "xdata2", dot_xdata
, 2 },
5336 { "xdata4", dot_xdata
, 4 },
5337 { "xdata8", dot_xdata
, 8 },
5338 { "xdata16", dot_xdata
, 16 },
5339 { "xreal4", dot_xfloat_cons
, 'f' },
5340 { "xreal8", dot_xfloat_cons
, 'd' },
5341 { "xreal10", dot_xfloat_cons
, 'x' },
5342 { "xreal16", dot_xfloat_cons
, 'X' },
5343 { "xstring", dot_xstringer
, 0 },
5344 { "xstringz", dot_xstringer
, 1 },
5346 /* unaligned versions: */
5347 { "xdata2.ua", dot_xdata_ua
, 2 },
5348 { "xdata4.ua", dot_xdata_ua
, 4 },
5349 { "xdata8.ua", dot_xdata_ua
, 8 },
5350 { "xdata16.ua", dot_xdata_ua
, 16 },
5351 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5352 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5353 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5354 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5356 /* annotations/DV checking support */
5357 { "entry", dot_entry
, 0 },
5358 { "mem.offset", dot_mem_offset
, 0 },
5359 { "pred.rel", dot_pred_rel
, 0 },
5360 { "pred.rel.clear", dot_pred_rel
, 'c' },
5361 { "pred.rel.imply", dot_pred_rel
, 'i' },
5362 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5363 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5364 { "reg.val", dot_reg_val
, 0 },
5365 { "serialize.data", dot_serialize
, 0 },
5366 { "serialize.instruction", dot_serialize
, 1 },
5367 { "auto", dot_dv_mode
, 'a' },
5368 { "explicit", dot_dv_mode
, 'e' },
5369 { "default", dot_dv_mode
, 'd' },
5371 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5372 IA-64 aligns data allocation pseudo-ops by default, so we have to
5373 tell it that these ones are supposed to be unaligned. Long term,
5374 should rewrite so that only IA-64 specific data allocation pseudo-ops
5375 are aligned by default. */
5376 {"2byte", stmt_cons_ua
, 2},
5377 {"4byte", stmt_cons_ua
, 4},
5378 {"8byte", stmt_cons_ua
, 8},
5383 static const struct pseudo_opcode
5386 void (*handler
) (int);
5391 /* these are more like pseudo-ops, but don't start with a dot */
5392 { "data1", cons
, 1 },
5393 { "data2", cons
, 2 },
5394 { "data4", cons
, 4 },
5395 { "data8", cons
, 8 },
5396 { "data16", cons
, 16 },
5397 { "real4", stmt_float_cons
, 'f' },
5398 { "real8", stmt_float_cons
, 'd' },
5399 { "real10", stmt_float_cons
, 'x' },
5400 { "real16", stmt_float_cons
, 'X' },
5401 { "string", stringer
, 0 },
5402 { "stringz", stringer
, 1 },
5404 /* unaligned versions: */
5405 { "data2.ua", stmt_cons_ua
, 2 },
5406 { "data4.ua", stmt_cons_ua
, 4 },
5407 { "data8.ua", stmt_cons_ua
, 8 },
5408 { "data16.ua", stmt_cons_ua
, 16 },
5409 { "real4.ua", float_cons
, 'f' },
5410 { "real8.ua", float_cons
, 'd' },
5411 { "real10.ua", float_cons
, 'x' },
5412 { "real16.ua", float_cons
, 'X' },
5415 /* Declare a register by creating a symbol for it and entering it in
5416 the symbol table. */
5419 declare_register (name
, regnum
)
5426 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5428 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5430 as_fatal ("Inserting \"%s\" into register table failed: %s",
5437 declare_register_set (prefix
, num_regs
, base_regnum
)
5445 for (i
= 0; i
< num_regs
; ++i
)
5447 sprintf (name
, "%s%u", prefix
, i
);
5448 declare_register (name
, base_regnum
+ i
);
5453 operand_width (opnd
)
5454 enum ia64_opnd opnd
;
5456 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5457 unsigned int bits
= 0;
5461 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5462 bits
+= odesc
->field
[i
].bits
;
5467 static enum operand_match_result
5468 operand_match (idesc
, index
, e
)
5469 const struct ia64_opcode
*idesc
;
5473 enum ia64_opnd opnd
= idesc
->operands
[index
];
5474 int bits
, relocatable
= 0;
5475 struct insn_fix
*fix
;
5482 case IA64_OPND_AR_CCV
:
5483 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5484 return OPERAND_MATCH
;
5487 case IA64_OPND_AR_CSD
:
5488 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5489 return OPERAND_MATCH
;
5492 case IA64_OPND_AR_PFS
:
5493 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5494 return OPERAND_MATCH
;
5498 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5499 return OPERAND_MATCH
;
5503 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5504 return OPERAND_MATCH
;
5508 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5509 return OPERAND_MATCH
;
5512 case IA64_OPND_PR_ROT
:
5513 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5514 return OPERAND_MATCH
;
5518 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5519 return OPERAND_MATCH
;
5522 case IA64_OPND_PSR_L
:
5523 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5524 return OPERAND_MATCH
;
5527 case IA64_OPND_PSR_UM
:
5528 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5529 return OPERAND_MATCH
;
5533 if (e
->X_op
== O_constant
)
5535 if (e
->X_add_number
== 1)
5536 return OPERAND_MATCH
;
5538 return OPERAND_OUT_OF_RANGE
;
5543 if (e
->X_op
== O_constant
)
5545 if (e
->X_add_number
== 8)
5546 return OPERAND_MATCH
;
5548 return OPERAND_OUT_OF_RANGE
;
5553 if (e
->X_op
== O_constant
)
5555 if (e
->X_add_number
== 16)
5556 return OPERAND_MATCH
;
5558 return OPERAND_OUT_OF_RANGE
;
5562 /* register operands: */
5565 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5566 && e
->X_add_number
< REG_AR
+ 128)
5567 return OPERAND_MATCH
;
5572 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5573 && e
->X_add_number
< REG_BR
+ 8)
5574 return OPERAND_MATCH
;
5578 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5579 && e
->X_add_number
< REG_CR
+ 128)
5580 return OPERAND_MATCH
;
5587 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5588 && e
->X_add_number
< REG_FR
+ 128)
5589 return OPERAND_MATCH
;
5594 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5595 && e
->X_add_number
< REG_P
+ 64)
5596 return OPERAND_MATCH
;
5602 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5603 && e
->X_add_number
< REG_GR
+ 128)
5604 return OPERAND_MATCH
;
5607 case IA64_OPND_R3_2
:
5608 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5610 if (e
->X_add_number
< REG_GR
+ 4)
5611 return OPERAND_MATCH
;
5612 else if (e
->X_add_number
< REG_GR
+ 128)
5613 return OPERAND_OUT_OF_RANGE
;
5617 /* indirect operands: */
5618 case IA64_OPND_CPUID_R3
:
5619 case IA64_OPND_DBR_R3
:
5620 case IA64_OPND_DTR_R3
:
5621 case IA64_OPND_ITR_R3
:
5622 case IA64_OPND_IBR_R3
:
5623 case IA64_OPND_MSR_R3
:
5624 case IA64_OPND_PKR_R3
:
5625 case IA64_OPND_PMC_R3
:
5626 case IA64_OPND_PMD_R3
:
5627 case IA64_OPND_RR_R3
:
5628 if (e
->X_op
== O_index
&& e
->X_op_symbol
5629 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5630 == opnd
- IA64_OPND_CPUID_R3
))
5631 return OPERAND_MATCH
;
5635 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5636 return OPERAND_MATCH
;
5639 /* immediate operands: */
5640 case IA64_OPND_CNT2a
:
5641 case IA64_OPND_LEN4
:
5642 case IA64_OPND_LEN6
:
5643 bits
= operand_width (idesc
->operands
[index
]);
5644 if (e
->X_op
== O_constant
)
5646 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5647 return OPERAND_MATCH
;
5649 return OPERAND_OUT_OF_RANGE
;
5653 case IA64_OPND_CNT2b
:
5654 if (e
->X_op
== O_constant
)
5656 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5657 return OPERAND_MATCH
;
5659 return OPERAND_OUT_OF_RANGE
;
5663 case IA64_OPND_CNT2c
:
5664 val
= e
->X_add_number
;
5665 if (e
->X_op
== O_constant
)
5667 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5668 return OPERAND_MATCH
;
5670 return OPERAND_OUT_OF_RANGE
;
5675 /* SOR must be an integer multiple of 8 */
5676 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5677 return OPERAND_OUT_OF_RANGE
;
5680 if (e
->X_op
== O_constant
)
5682 if ((bfd_vma
) e
->X_add_number
<= 96)
5683 return OPERAND_MATCH
;
5685 return OPERAND_OUT_OF_RANGE
;
5689 case IA64_OPND_IMMU62
:
5690 if (e
->X_op
== O_constant
)
5692 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5693 return OPERAND_MATCH
;
5695 return OPERAND_OUT_OF_RANGE
;
5699 /* FIXME -- need 62-bit relocation type */
5700 as_bad (_("62-bit relocation not yet implemented"));
5704 case IA64_OPND_IMMU64
:
5705 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5706 || e
->X_op
== O_subtract
)
5708 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5709 fix
->code
= BFD_RELOC_IA64_IMM64
;
5710 if (e
->X_op
!= O_subtract
)
5712 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5713 if (e
->X_op
== O_pseudo_fixup
)
5717 fix
->opnd
= idesc
->operands
[index
];
5720 ++CURR_SLOT
.num_fixups
;
5721 return OPERAND_MATCH
;
5723 else if (e
->X_op
== O_constant
)
5724 return OPERAND_MATCH
;
5727 case IA64_OPND_CCNT5
:
5728 case IA64_OPND_CNT5
:
5729 case IA64_OPND_CNT6
:
5730 case IA64_OPND_CPOS6a
:
5731 case IA64_OPND_CPOS6b
:
5732 case IA64_OPND_CPOS6c
:
5733 case IA64_OPND_IMMU2
:
5734 case IA64_OPND_IMMU7a
:
5735 case IA64_OPND_IMMU7b
:
5736 case IA64_OPND_IMMU21
:
5737 case IA64_OPND_IMMU24
:
5738 case IA64_OPND_MBTYPE4
:
5739 case IA64_OPND_MHTYPE8
:
5740 case IA64_OPND_POS6
:
5741 bits
= operand_width (idesc
->operands
[index
]);
5742 if (e
->X_op
== O_constant
)
5744 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5745 return OPERAND_MATCH
;
5747 return OPERAND_OUT_OF_RANGE
;
5751 case IA64_OPND_IMMU9
:
5752 bits
= operand_width (idesc
->operands
[index
]);
5753 if (e
->X_op
== O_constant
)
5755 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5757 int lobits
= e
->X_add_number
& 0x3;
5758 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5759 e
->X_add_number
|= (bfd_vma
) 0x3;
5760 return OPERAND_MATCH
;
5763 return OPERAND_OUT_OF_RANGE
;
5767 case IA64_OPND_IMM44
:
5768 /* least 16 bits must be zero */
5769 if ((e
->X_add_number
& 0xffff) != 0)
5770 /* XXX technically, this is wrong: we should not be issuing warning
5771 messages until we're sure this instruction pattern is going to
5773 as_warn (_("lower 16 bits of mask ignored"));
5775 if (e
->X_op
== O_constant
)
5777 if (((e
->X_add_number
>= 0
5778 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5779 || (e
->X_add_number
< 0
5780 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5783 if (e
->X_add_number
>= 0
5784 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5786 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5788 return OPERAND_MATCH
;
5791 return OPERAND_OUT_OF_RANGE
;
5795 case IA64_OPND_IMM17
:
5796 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5797 if (e
->X_op
== O_constant
)
5799 if (((e
->X_add_number
>= 0
5800 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5801 || (e
->X_add_number
< 0
5802 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5805 if (e
->X_add_number
>= 0
5806 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5808 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5810 return OPERAND_MATCH
;
5813 return OPERAND_OUT_OF_RANGE
;
5817 case IA64_OPND_IMM14
:
5818 case IA64_OPND_IMM22
:
5820 case IA64_OPND_IMM1
:
5821 case IA64_OPND_IMM8
:
5822 case IA64_OPND_IMM8U4
:
5823 case IA64_OPND_IMM8M1
:
5824 case IA64_OPND_IMM8M1U4
:
5825 case IA64_OPND_IMM8M1U8
:
5826 case IA64_OPND_IMM9a
:
5827 case IA64_OPND_IMM9b
:
5828 bits
= operand_width (idesc
->operands
[index
]);
5829 if (relocatable
&& (e
->X_op
== O_symbol
5830 || e
->X_op
== O_subtract
5831 || e
->X_op
== O_pseudo_fixup
))
5833 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5835 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5836 fix
->code
= BFD_RELOC_IA64_IMM14
;
5838 fix
->code
= BFD_RELOC_IA64_IMM22
;
5840 if (e
->X_op
!= O_subtract
)
5842 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5843 if (e
->X_op
== O_pseudo_fixup
)
5847 fix
->opnd
= idesc
->operands
[index
];
5850 ++CURR_SLOT
.num_fixups
;
5851 return OPERAND_MATCH
;
5853 else if (e
->X_op
!= O_constant
5854 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5855 return OPERAND_MISMATCH
;
5857 if (opnd
== IA64_OPND_IMM8M1U4
)
5859 /* Zero is not valid for unsigned compares that take an adjusted
5860 constant immediate range. */
5861 if (e
->X_add_number
== 0)
5862 return OPERAND_OUT_OF_RANGE
;
5864 /* Sign-extend 32-bit unsigned numbers, so that the following range
5865 checks will work. */
5866 val
= e
->X_add_number
;
5867 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5868 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5869 val
= ((val
<< 32) >> 32);
5871 /* Check for 0x100000000. This is valid because
5872 0x100000000-1 is the same as ((uint32_t) -1). */
5873 if (val
== ((bfd_signed_vma
) 1 << 32))
5874 return OPERAND_MATCH
;
5878 else if (opnd
== IA64_OPND_IMM8M1U8
)
5880 /* Zero is not valid for unsigned compares that take an adjusted
5881 constant immediate range. */
5882 if (e
->X_add_number
== 0)
5883 return OPERAND_OUT_OF_RANGE
;
5885 /* Check for 0x10000000000000000. */
5886 if (e
->X_op
== O_big
)
5888 if (generic_bignum
[0] == 0
5889 && generic_bignum
[1] == 0
5890 && generic_bignum
[2] == 0
5891 && generic_bignum
[3] == 0
5892 && generic_bignum
[4] == 1)
5893 return OPERAND_MATCH
;
5895 return OPERAND_OUT_OF_RANGE
;
5898 val
= e
->X_add_number
- 1;
5900 else if (opnd
== IA64_OPND_IMM8M1
)
5901 val
= e
->X_add_number
- 1;
5902 else if (opnd
== IA64_OPND_IMM8U4
)
5904 /* Sign-extend 32-bit unsigned numbers, so that the following range
5905 checks will work. */
5906 val
= e
->X_add_number
;
5907 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5908 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5909 val
= ((val
<< 32) >> 32);
5912 val
= e
->X_add_number
;
5914 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5915 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5916 return OPERAND_MATCH
;
5918 return OPERAND_OUT_OF_RANGE
;
5920 case IA64_OPND_INC3
:
5921 /* +/- 1, 4, 8, 16 */
5922 val
= e
->X_add_number
;
5925 if (e
->X_op
== O_constant
)
5927 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5928 return OPERAND_MATCH
;
5930 return OPERAND_OUT_OF_RANGE
;
5934 case IA64_OPND_TGT25
:
5935 case IA64_OPND_TGT25b
:
5936 case IA64_OPND_TGT25c
:
5937 case IA64_OPND_TGT64
:
5938 if (e
->X_op
== O_symbol
)
5940 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5941 if (opnd
== IA64_OPND_TGT25
)
5942 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5943 else if (opnd
== IA64_OPND_TGT25b
)
5944 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5945 else if (opnd
== IA64_OPND_TGT25c
)
5946 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5947 else if (opnd
== IA64_OPND_TGT64
)
5948 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5952 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5953 fix
->opnd
= idesc
->operands
[index
];
5956 ++CURR_SLOT
.num_fixups
;
5957 return OPERAND_MATCH
;
5959 case IA64_OPND_TAG13
:
5960 case IA64_OPND_TAG13b
:
5964 return OPERAND_MATCH
;
5967 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5968 /* There are no external relocs for TAG13/TAG13b fields, so we
5969 create a dummy reloc. This will not live past md_apply_fix3. */
5970 fix
->code
= BFD_RELOC_UNUSED
;
5971 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5972 fix
->opnd
= idesc
->operands
[index
];
5975 ++CURR_SLOT
.num_fixups
;
5976 return OPERAND_MATCH
;
5983 case IA64_OPND_LDXMOV
:
5984 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5985 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5986 fix
->opnd
= idesc
->operands
[index
];
5989 ++CURR_SLOT
.num_fixups
;
5990 return OPERAND_MATCH
;
5995 return OPERAND_MISMATCH
;
6004 memset (e
, 0, sizeof (*e
));
6007 if (*input_line_pointer
!= '}')
6009 sep
= *input_line_pointer
++;
6013 if (!md
.manual_bundling
)
6014 as_warn ("Found '}' when manual bundling is off");
6016 CURR_SLOT
.manual_bundling_off
= 1;
6017 md
.manual_bundling
= 0;
6023 /* Returns the next entry in the opcode table that matches the one in
6024 IDESC, and frees the entry in IDESC. If no matching entry is
6025 found, NULL is returned instead. */
6027 static struct ia64_opcode
*
6028 get_next_opcode (struct ia64_opcode
*idesc
)
6030 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6031 ia64_free_opcode (idesc
);
6035 /* Parse the operands for the opcode and find the opcode variant that
6036 matches the specified operands, or NULL if no match is possible. */
6038 static struct ia64_opcode
*
6039 parse_operands (idesc
)
6040 struct ia64_opcode
*idesc
;
6042 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6043 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6046 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6047 enum operand_match_result result
;
6049 char *first_arg
= 0, *end
, *saved_input_pointer
;
6052 assert (strlen (idesc
->name
) <= 128);
6054 strcpy (mnemonic
, idesc
->name
);
6055 if (idesc
->operands
[2] == IA64_OPND_SOF
6056 || idesc
->operands
[1] == IA64_OPND_SOF
)
6058 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6059 can't parse the first operand until we have parsed the
6060 remaining operands of the "alloc" instruction. */
6062 first_arg
= input_line_pointer
;
6063 end
= strchr (input_line_pointer
, '=');
6066 as_bad ("Expected separator `='");
6069 input_line_pointer
= end
+ 1;
6076 if (i
< NELEMS (CURR_SLOT
.opnd
))
6078 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6079 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6086 sep
= parse_operand (&dummy
);
6087 if (dummy
.X_op
== O_absent
)
6093 if (sep
!= '=' && sep
!= ',')
6098 if (num_outputs
> 0)
6099 as_bad ("Duplicate equal sign (=) in instruction");
6101 num_outputs
= i
+ 1;
6106 as_bad ("Illegal operand separator `%c'", sep
);
6110 if (idesc
->operands
[2] == IA64_OPND_SOF
6111 || idesc
->operands
[1] == IA64_OPND_SOF
)
6113 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6114 know (strcmp (idesc
->name
, "alloc") == 0);
6115 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6116 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6117 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6118 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6119 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6120 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6121 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6123 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6124 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6125 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6126 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6128 /* now we can parse the first arg: */
6129 saved_input_pointer
= input_line_pointer
;
6130 input_line_pointer
= first_arg
;
6131 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6133 --num_outputs
; /* force error */
6134 input_line_pointer
= saved_input_pointer
;
6136 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6137 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6138 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6139 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6143 highest_unmatched_operand
= -4;
6144 curr_out_of_range_pos
= -1;
6146 for (; idesc
; idesc
= get_next_opcode (idesc
))
6148 if (num_outputs
!= idesc
->num_outputs
)
6149 continue; /* mismatch in # of outputs */
6150 if (highest_unmatched_operand
< 0)
6151 highest_unmatched_operand
|= 1;
6152 if (num_operands
> NELEMS (idesc
->operands
)
6153 || (num_operands
< NELEMS (idesc
->operands
)
6154 && idesc
->operands
[num_operands
])
6155 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6156 continue; /* mismatch in number of arguments */
6157 if (highest_unmatched_operand
< 0)
6158 highest_unmatched_operand
|= 2;
6160 CURR_SLOT
.num_fixups
= 0;
6162 /* Try to match all operands. If we see an out-of-range operand,
6163 then continue trying to match the rest of the operands, since if
6164 the rest match, then this idesc will give the best error message. */
6166 out_of_range_pos
= -1;
6167 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6169 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6170 if (result
!= OPERAND_MATCH
)
6172 if (result
!= OPERAND_OUT_OF_RANGE
)
6174 if (out_of_range_pos
< 0)
6175 /* remember position of the first out-of-range operand: */
6176 out_of_range_pos
= i
;
6180 /* If we did not match all operands, or if at least one operand was
6181 out-of-range, then this idesc does not match. Keep track of which
6182 idesc matched the most operands before failing. If we have two
6183 idescs that failed at the same position, and one had an out-of-range
6184 operand, then prefer the out-of-range operand. Thus if we have
6185 "add r0=0x1000000,r1" we get an error saying the constant is out
6186 of range instead of an error saying that the constant should have been
6189 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6191 if (i
> highest_unmatched_operand
6192 || (i
== highest_unmatched_operand
6193 && out_of_range_pos
> curr_out_of_range_pos
))
6195 highest_unmatched_operand
= i
;
6196 if (out_of_range_pos
>= 0)
6198 expected_operand
= idesc
->operands
[out_of_range_pos
];
6199 error_pos
= out_of_range_pos
;
6203 expected_operand
= idesc
->operands
[i
];
6206 curr_out_of_range_pos
= out_of_range_pos
;
6215 if (expected_operand
)
6216 as_bad ("Operand %u of `%s' should be %s",
6217 error_pos
+ 1, mnemonic
,
6218 elf64_ia64_operands
[expected_operand
].desc
);
6219 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6220 as_bad ("Wrong number of output operands");
6221 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6222 as_bad ("Wrong number of input operands");
6224 as_bad ("Operand mismatch");
6228 /* Check that the instruction doesn't use
6229 - r0, f0, or f1 as output operands
6230 - the same predicate twice as output operands
6231 - r0 as address of a base update load or store
6232 - the same GR as output and address of a base update load
6233 - two even- or two odd-numbered FRs as output operands of a floating
6234 point parallel load.
6235 At most two (conflicting) output (or output-like) operands can exist,
6236 (floating point parallel loads have three outputs, but the base register,
6237 if updated, cannot conflict with the actual outputs). */
6239 for (i
= 0; i
< num_operands
; ++i
)
6244 switch (idesc
->operands
[i
])
6249 if (i
< num_outputs
)
6251 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6254 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6256 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6261 if (i
< num_outputs
)
6264 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6266 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6273 if (i
< num_outputs
)
6275 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6276 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6279 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6282 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6284 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6288 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6290 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6293 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6295 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6306 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6309 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6315 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6320 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6325 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6333 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6335 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6336 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6337 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6338 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6339 && ! ((reg1
^ reg2
) & 1))
6340 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6341 reg1
- REG_FR
, reg2
- REG_FR
);
6342 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6343 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6344 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6345 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6346 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6347 reg1
- REG_FR
, reg2
- REG_FR
);
6352 build_insn (slot
, insnp
)
6356 const struct ia64_operand
*odesc
, *o2desc
;
6357 struct ia64_opcode
*idesc
= slot
->idesc
;
6363 insn
= idesc
->opcode
| slot
->qp_regno
;
6365 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6367 if (slot
->opnd
[i
].X_op
== O_register
6368 || slot
->opnd
[i
].X_op
== O_constant
6369 || slot
->opnd
[i
].X_op
== O_index
)
6370 val
= slot
->opnd
[i
].X_add_number
;
6371 else if (slot
->opnd
[i
].X_op
== O_big
)
6373 /* This must be the value 0x10000000000000000. */
6374 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6380 switch (idesc
->operands
[i
])
6382 case IA64_OPND_IMMU64
:
6383 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6384 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6385 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6386 | (((val
>> 63) & 0x1) << 36));
6389 case IA64_OPND_IMMU62
:
6390 val
&= 0x3fffffffffffffffULL
;
6391 if (val
!= slot
->opnd
[i
].X_add_number
)
6392 as_warn (_("Value truncated to 62 bits"));
6393 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6394 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6397 case IA64_OPND_TGT64
:
6399 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6400 insn
|= ((((val
>> 59) & 0x1) << 36)
6401 | (((val
>> 0) & 0xfffff) << 13));
6432 case IA64_OPND_R3_2
:
6433 case IA64_OPND_CPUID_R3
:
6434 case IA64_OPND_DBR_R3
:
6435 case IA64_OPND_DTR_R3
:
6436 case IA64_OPND_ITR_R3
:
6437 case IA64_OPND_IBR_R3
:
6439 case IA64_OPND_MSR_R3
:
6440 case IA64_OPND_PKR_R3
:
6441 case IA64_OPND_PMC_R3
:
6442 case IA64_OPND_PMD_R3
:
6443 case IA64_OPND_RR_R3
:
6451 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6452 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6454 as_bad_where (slot
->src_file
, slot
->src_line
,
6455 "Bad operand value: %s", err
);
6456 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6458 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6459 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6461 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6462 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6464 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6465 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6466 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6468 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6469 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6479 int manual_bundling_off
= 0, manual_bundling
= 0;
6480 enum ia64_unit required_unit
, insn_unit
= 0;
6481 enum ia64_insn_type type
[3], insn_type
;
6482 unsigned int template, orig_template
;
6483 bfd_vma insn
[3] = { -1, -1, -1 };
6484 struct ia64_opcode
*idesc
;
6485 int end_of_insn_group
= 0, user_template
= -1;
6486 int n
, i
, j
, first
, curr
, last_slot
;
6487 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6488 bfd_vma t0
= 0, t1
= 0;
6489 struct label_fix
*lfix
;
6490 struct insn_fix
*ifix
;
6496 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6497 know (first
>= 0 & first
< NUM_SLOTS
);
6498 n
= MIN (3, md
.num_slots_in_use
);
6500 /* Determine template: user user_template if specified, best match
6503 if (md
.slot
[first
].user_template
>= 0)
6504 user_template
= template = md
.slot
[first
].user_template
;
6507 /* Auto select appropriate template. */
6508 memset (type
, 0, sizeof (type
));
6510 for (i
= 0; i
< n
; ++i
)
6512 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6514 type
[i
] = md
.slot
[curr
].idesc
->type
;
6515 curr
= (curr
+ 1) % NUM_SLOTS
;
6517 template = best_template
[type
[0]][type
[1]][type
[2]];
6520 /* initialize instructions with appropriate nops: */
6521 for (i
= 0; i
< 3; ++i
)
6522 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6526 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6527 from the start of the frag. */
6528 addr_mod
= frag_now_fix () & 15;
6529 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6530 as_bad (_("instruction address is not a multiple of 16"));
6531 frag_now
->insn_addr
= addr_mod
;
6532 frag_now
->has_code
= 1;
6534 /* now fill in slots with as many insns as possible: */
6536 idesc
= md
.slot
[curr
].idesc
;
6537 end_of_insn_group
= 0;
6539 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6541 /* If we have unwind records, we may need to update some now. */
6542 ptr
= md
.slot
[curr
].unwind_record
;
6545 /* Find the last prologue/body record in the list for the current
6546 insn, and set the slot number for all records up to that point.
6547 This needs to be done now, because prologue/body records refer to
6548 the current point, not the point after the instruction has been
6549 issued. This matters because there may have been nops emitted
6550 meanwhile. Any non-prologue non-body record followed by a
6551 prologue/body record must also refer to the current point. */
6553 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6554 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6555 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6556 || ptr
->r
.type
== body
)
6560 /* Make last_ptr point one after the last prologue/body
6562 last_ptr
= last_ptr
->next
;
6563 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6566 ptr
->slot_number
= (unsigned long) f
+ i
;
6567 ptr
->slot_frag
= frag_now
;
6569 /* Remove the initialized records, so that we won't accidentally
6570 update them again if we insert a nop and continue. */
6571 md
.slot
[curr
].unwind_record
= last_ptr
;
6575 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6576 if (md
.slot
[curr
].manual_bundling_on
)
6579 manual_bundling
= 1;
6581 break; /* Need to start a new bundle. */
6584 /* If this instruction specifies a template, then it must be the first
6585 instruction of a bundle. */
6586 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6589 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6591 if (manual_bundling
&& !manual_bundling_off
)
6593 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6594 "`%s' must be last in bundle", idesc
->name
);
6596 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6600 if (idesc
->flags
& IA64_OPCODE_LAST
)
6603 unsigned int required_template
;
6605 /* If we need a stop bit after an M slot, our only choice is
6606 template 5 (M;;MI). If we need a stop bit after a B
6607 slot, our only choice is to place it at the end of the
6608 bundle, because the only available templates are MIB,
6609 MBB, BBB, MMB, and MFB. We don't handle anything other
6610 than M and B slots because these are the only kind of
6611 instructions that can have the IA64_OPCODE_LAST bit set. */
6612 required_template
= template;
6613 switch (idesc
->type
)
6617 required_template
= 5;
6625 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6626 "Internal error: don't know how to force %s to end"
6627 "of instruction group", idesc
->name
);
6632 && (i
> required_slot
6633 || (required_slot
== 2 && !manual_bundling_off
)
6634 || (user_template
>= 0
6635 /* Changing from MMI to M;MI is OK. */
6636 && (template ^ required_template
) > 1)))
6638 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6639 "`%s' must be last in instruction group",
6641 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6642 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6644 if (required_slot
< i
)
6645 /* Can't fit this instruction. */
6649 if (required_template
!= template)
6651 /* If we switch the template, we need to reset the NOPs
6652 after slot i. The slot-types of the instructions ahead
6653 of i never change, so we don't need to worry about
6654 changing NOPs in front of this slot. */
6655 for (j
= i
; j
< 3; ++j
)
6656 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6658 template = required_template
;
6660 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6662 if (manual_bundling
)
6664 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6665 "Label must be first in a bundle");
6666 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6668 /* This insn must go into the first slot of a bundle. */
6672 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6674 /* We need an instruction group boundary in the middle of a
6675 bundle. See if we can switch to an other template with
6676 an appropriate boundary. */
6678 orig_template
= template;
6679 if (i
== 1 && (user_template
== 4
6680 || (user_template
< 0
6681 && (ia64_templ_desc
[template].exec_unit
[0]
6685 end_of_insn_group
= 0;
6687 else if (i
== 2 && (user_template
== 0
6688 || (user_template
< 0
6689 && (ia64_templ_desc
[template].exec_unit
[1]
6691 /* This test makes sure we don't switch the template if
6692 the next instruction is one that needs to be first in
6693 an instruction group. Since all those instructions are
6694 in the M group, there is no way such an instruction can
6695 fit in this bundle even if we switch the template. The
6696 reason we have to check for this is that otherwise we
6697 may end up generating "MI;;I M.." which has the deadly
6698 effect that the second M instruction is no longer the
6699 first in the group! --davidm 99/12/16 */
6700 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6703 end_of_insn_group
= 0;
6706 && user_template
== 0
6707 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6708 /* Use the next slot. */
6710 else if (curr
!= first
)
6711 /* can't fit this insn */
6714 if (template != orig_template
)
6715 /* if we switch the template, we need to reset the NOPs
6716 after slot i. The slot-types of the instructions ahead
6717 of i never change, so we don't need to worry about
6718 changing NOPs in front of this slot. */
6719 for (j
= i
; j
< 3; ++j
)
6720 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6722 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6724 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6725 if (idesc
->type
== IA64_TYPE_DYN
)
6727 enum ia64_opnd opnd1
, opnd2
;
6729 if ((strcmp (idesc
->name
, "nop") == 0)
6730 || (strcmp (idesc
->name
, "break") == 0))
6731 insn_unit
= required_unit
;
6732 else if (strcmp (idesc
->name
, "hint") == 0)
6734 insn_unit
= required_unit
;
6735 if (required_unit
== IA64_UNIT_B
)
6741 case hint_b_warning
:
6742 as_warn ("hint in B unit may be treated as nop");
6745 /* When manual bundling is off and there is no
6746 user template, we choose a different unit so
6747 that hint won't go into the current slot. We
6748 will fill the current bundle with nops and
6749 try to put hint into the next bundle. */
6750 if (!manual_bundling
&& user_template
< 0)
6751 insn_unit
= IA64_UNIT_I
;
6753 as_bad ("hint in B unit can't be used");
6758 else if (strcmp (idesc
->name
, "chk.s") == 0
6759 || strcmp (idesc
->name
, "mov") == 0)
6761 insn_unit
= IA64_UNIT_M
;
6762 if (required_unit
== IA64_UNIT_I
6763 || (required_unit
== IA64_UNIT_F
&& template == 6))
6764 insn_unit
= IA64_UNIT_I
;
6767 as_fatal ("emit_one_bundle: unexpected dynamic op");
6769 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6770 opnd1
= idesc
->operands
[0];
6771 opnd2
= idesc
->operands
[1];
6772 ia64_free_opcode (idesc
);
6773 idesc
= ia64_find_opcode (mnemonic
);
6774 /* moves to/from ARs have collisions */
6775 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6777 while (idesc
!= NULL
6778 && (idesc
->operands
[0] != opnd1
6779 || idesc
->operands
[1] != opnd2
))
6780 idesc
= get_next_opcode (idesc
);
6782 md
.slot
[curr
].idesc
= idesc
;
6786 insn_type
= idesc
->type
;
6787 insn_unit
= IA64_UNIT_NIL
;
6791 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6792 insn_unit
= required_unit
;
6794 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6795 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6796 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6797 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6798 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6803 if (insn_unit
!= required_unit
)
6804 continue; /* Try next slot. */
6806 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6808 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6810 md
.slot
[curr
].loc_directive_seen
= 0;
6811 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6814 build_insn (md
.slot
+ curr
, insn
+ i
);
6816 ptr
= md
.slot
[curr
].unwind_record
;
6819 /* Set slot numbers for all remaining unwind records belonging to the
6820 current insn. There can not be any prologue/body unwind records
6822 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6823 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6825 ptr
->slot_number
= (unsigned long) f
+ i
;
6826 ptr
->slot_frag
= frag_now
;
6828 md
.slot
[curr
].unwind_record
= NULL
;
6831 if (required_unit
== IA64_UNIT_L
)
6834 /* skip one slot for long/X-unit instructions */
6837 --md
.num_slots_in_use
;
6840 /* now is a good time to fix up the labels for this insn: */
6841 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6843 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6844 symbol_set_frag (lfix
->sym
, frag_now
);
6846 /* and fix up the tags also. */
6847 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6849 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6850 symbol_set_frag (lfix
->sym
, frag_now
);
6853 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6855 ifix
= md
.slot
[curr
].fixup
+ j
;
6856 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6857 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6858 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6859 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6860 fix
->fx_file
= md
.slot
[curr
].src_file
;
6861 fix
->fx_line
= md
.slot
[curr
].src_line
;
6864 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6867 ia64_free_opcode (md
.slot
[curr
].idesc
);
6868 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6869 md
.slot
[curr
].user_template
= -1;
6871 if (manual_bundling_off
)
6873 manual_bundling
= 0;
6876 curr
= (curr
+ 1) % NUM_SLOTS
;
6877 idesc
= md
.slot
[curr
].idesc
;
6879 if (manual_bundling
> 0)
6881 if (md
.num_slots_in_use
> 0)
6884 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6885 "`%s' does not fit into bundle", idesc
->name
);
6886 else if (last_slot
< 0)
6888 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6889 "`%s' does not fit into %s template",
6890 idesc
->name
, ia64_templ_desc
[template].name
);
6891 /* Drop first insn so we don't livelock. */
6892 --md
.num_slots_in_use
;
6893 know (curr
== first
);
6894 ia64_free_opcode (md
.slot
[curr
].idesc
);
6895 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6896 md
.slot
[curr
].user_template
= -1;
6904 else if (last_slot
== 0)
6905 where
= "slots 2 or 3";
6908 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6909 "`%s' can't go in %s of %s template",
6910 idesc
->name
, where
, ia64_templ_desc
[template].name
);
6914 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6915 "Missing '}' at end of file");
6917 know (md
.num_slots_in_use
< NUM_SLOTS
);
6919 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6920 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6922 number_to_chars_littleendian (f
+ 0, t0
, 8);
6923 number_to_chars_littleendian (f
+ 8, t1
, 8);
6927 md_parse_option (c
, arg
)
6934 /* Switches from the Intel assembler. */
6936 if (strcmp (arg
, "ilp64") == 0
6937 || strcmp (arg
, "lp64") == 0
6938 || strcmp (arg
, "p64") == 0)
6940 md
.flags
|= EF_IA_64_ABI64
;
6942 else if (strcmp (arg
, "ilp32") == 0)
6944 md
.flags
&= ~EF_IA_64_ABI64
;
6946 else if (strcmp (arg
, "le") == 0)
6948 md
.flags
&= ~EF_IA_64_BE
;
6949 default_big_endian
= 0;
6951 else if (strcmp (arg
, "be") == 0)
6953 md
.flags
|= EF_IA_64_BE
;
6954 default_big_endian
= 1;
6956 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6959 if (strcmp (arg
, "warning") == 0)
6960 md
.unwind_check
= unwind_check_warning
;
6961 else if (strcmp (arg
, "error") == 0)
6962 md
.unwind_check
= unwind_check_error
;
6966 else if (strncmp (arg
, "hint.b=", 7) == 0)
6969 if (strcmp (arg
, "ok") == 0)
6970 md
.hint_b
= hint_b_ok
;
6971 else if (strcmp (arg
, "warning") == 0)
6972 md
.hint_b
= hint_b_warning
;
6973 else if (strcmp (arg
, "error") == 0)
6974 md
.hint_b
= hint_b_error
;
6978 else if (strncmp (arg
, "tune=", 5) == 0)
6981 if (strcmp (arg
, "itanium1") == 0)
6983 else if (strcmp (arg
, "itanium2") == 0)
6993 if (strcmp (arg
, "so") == 0)
6995 /* Suppress signon message. */
6997 else if (strcmp (arg
, "pi") == 0)
6999 /* Reject privileged instructions. FIXME */
7001 else if (strcmp (arg
, "us") == 0)
7003 /* Allow union of signed and unsigned range. FIXME */
7005 else if (strcmp (arg
, "close_fcalls") == 0)
7007 /* Do not resolve global function calls. */
7014 /* temp[="prefix"] Insert temporary labels into the object file
7015 symbol table prefixed by "prefix".
7016 Default prefix is ":temp:".
7021 /* indirect=<tgt> Assume unannotated indirect branches behavior
7022 according to <tgt> --
7023 exit: branch out from the current context (default)
7024 labels: all labels in context may be branch targets
7026 if (strncmp (arg
, "indirect=", 9) != 0)
7031 /* -X conflicts with an ignored option, use -x instead */
7033 if (!arg
|| strcmp (arg
, "explicit") == 0)
7035 /* set default mode to explicit */
7036 md
.default_explicit_mode
= 1;
7039 else if (strcmp (arg
, "auto") == 0)
7041 md
.default_explicit_mode
= 0;
7043 else if (strcmp (arg
, "none") == 0)
7047 else if (strcmp (arg
, "debug") == 0)
7051 else if (strcmp (arg
, "debugx") == 0)
7053 md
.default_explicit_mode
= 1;
7056 else if (strcmp (arg
, "debugn") == 0)
7063 as_bad (_("Unrecognized option '-x%s'"), arg
);
7068 /* nops Print nops statistics. */
7071 /* GNU specific switches for gcc. */
7072 case OPTION_MCONSTANT_GP
:
7073 md
.flags
|= EF_IA_64_CONS_GP
;
7076 case OPTION_MAUTO_PIC
:
7077 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7088 md_show_usage (stream
)
7093 --mconstant-gp mark output file as using the constant-GP model\n\
7094 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7095 --mauto-pic mark output file as using the constant-GP model\n\
7096 without function descriptors (sets ELF header flag\n\
7097 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7098 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7099 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7100 -mtune=[itanium1|itanium2]\n\
7101 tune for a specific CPU (default -mtune=itanium2)\n\
7102 -munwind-check=[warning|error]\n\
7103 unwind directive check (default -munwind-check=warning)\n\
7104 -mhint.b=[ok|warning|error]\n\
7105 hint.b check (default -mhint.b=error)\n\
7106 -x | -xexplicit turn on dependency violation checking\n\
7107 -xauto automagically remove dependency violations (default)\n\
7108 -xnone turn off dependency violation checking\n\
7109 -xdebug debug dependency violation checker\n\
7110 -xdebugn debug dependency violation checker but turn off\n\
7111 dependency violation checking\n\
7112 -xdebugx debug dependency violation checker and turn on\n\
7113 dependency violation checking\n"),
7118 ia64_after_parse_args ()
7120 if (debug_type
== DEBUG_STABS
)
7121 as_fatal (_("--gstabs is not supported for ia64"));
7124 /* Return true if TYPE fits in TEMPL at SLOT. */
7127 match (int templ
, int type
, int slot
)
7129 enum ia64_unit unit
;
7132 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7135 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7137 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7139 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7140 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7141 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7142 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7143 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7144 default: result
= 0; break;
7149 /* Add a bit of extra goodness if a nop of type F or B would fit
7150 in TEMPL at SLOT. */
7153 extra_goodness (int templ
, int slot
)
7158 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7160 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7166 if (match (templ
, IA64_TYPE_M
, slot
)
7167 || match (templ
, IA64_TYPE_I
, slot
))
7168 /* Favor M- and I-unit NOPs. We definitely want to avoid
7169 F-unit and B-unit may cause split-issue or less-than-optimal
7170 branch-prediction. */
7181 /* This function is called once, at assembler startup time. It sets
7182 up all the tables, etc. that the MD part of the assembler will need
7183 that can be determined before arguments are parsed. */
7187 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7192 md
.explicit_mode
= md
.default_explicit_mode
;
7194 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7196 /* Make sure function pointers get initialized. */
7197 target_big_endian
= -1;
7198 dot_byteorder (default_big_endian
);
7200 alias_hash
= hash_new ();
7201 alias_name_hash
= hash_new ();
7202 secalias_hash
= hash_new ();
7203 secalias_name_hash
= hash_new ();
7205 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7206 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7207 &zero_address_frag
);
7209 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7210 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7211 &zero_address_frag
);
7213 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7214 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7215 &zero_address_frag
);
7217 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7218 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7219 &zero_address_frag
);
7221 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7222 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7223 &zero_address_frag
);
7225 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7226 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7227 &zero_address_frag
);
7229 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7230 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7231 &zero_address_frag
);
7233 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7234 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7235 &zero_address_frag
);
7237 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7238 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7239 &zero_address_frag
);
7241 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7242 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7243 &zero_address_frag
);
7245 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7246 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7247 &zero_address_frag
);
7249 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7250 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7251 &zero_address_frag
);
7253 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7254 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7255 &zero_address_frag
);
7257 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7258 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7259 &zero_address_frag
);
7261 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7262 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7263 &zero_address_frag
);
7265 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7266 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7267 &zero_address_frag
);
7269 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7270 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7271 &zero_address_frag
);
7273 if (md
.tune
!= itanium1
)
7275 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7277 le_nop_stop
[0] = 0x9;
7280 /* Compute the table of best templates. We compute goodness as a
7281 base 4 value, in which each match counts for 3. Match-failures
7282 result in NOPs and we use extra_goodness() to pick the execution
7283 units that are best suited for issuing the NOP. */
7284 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7285 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7286 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7289 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7292 if (match (t
, i
, 0))
7294 if (match (t
, j
, 1))
7296 if (match (t
, k
, 2))
7297 goodness
= 3 + 3 + 3;
7299 goodness
= 3 + 3 + extra_goodness (t
, 2);
7301 else if (match (t
, j
, 2))
7302 goodness
= 3 + 3 + extra_goodness (t
, 1);
7306 goodness
+= extra_goodness (t
, 1);
7307 goodness
+= extra_goodness (t
, 2);
7310 else if (match (t
, i
, 1))
7312 if (match (t
, j
, 2))
7315 goodness
= 3 + extra_goodness (t
, 2);
7317 else if (match (t
, i
, 2))
7318 goodness
= 3 + extra_goodness (t
, 1);
7320 if (goodness
> best
)
7323 best_template
[i
][j
][k
] = t
;
7328 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7329 md
.slot
[i
].user_template
= -1;
7331 md
.pseudo_hash
= hash_new ();
7332 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7334 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7335 (void *) (pseudo_opcode
+ i
));
7337 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7338 pseudo_opcode
[i
].name
, err
);
7341 md
.reg_hash
= hash_new ();
7342 md
.dynreg_hash
= hash_new ();
7343 md
.const_hash
= hash_new ();
7344 md
.entry_hash
= hash_new ();
7346 /* general registers: */
7349 for (i
= 0; i
< total
; ++i
)
7351 sprintf (name
, "r%d", i
- REG_GR
);
7352 md
.regsym
[i
] = declare_register (name
, i
);
7355 /* floating point registers: */
7357 for (; i
< total
; ++i
)
7359 sprintf (name
, "f%d", i
- REG_FR
);
7360 md
.regsym
[i
] = declare_register (name
, i
);
7363 /* application registers: */
7366 for (; i
< total
; ++i
)
7368 sprintf (name
, "ar%d", i
- REG_AR
);
7369 md
.regsym
[i
] = declare_register (name
, i
);
7372 /* control registers: */
7375 for (; i
< total
; ++i
)
7377 sprintf (name
, "cr%d", i
- REG_CR
);
7378 md
.regsym
[i
] = declare_register (name
, i
);
7381 /* predicate registers: */
7383 for (; i
< total
; ++i
)
7385 sprintf (name
, "p%d", i
- REG_P
);
7386 md
.regsym
[i
] = declare_register (name
, i
);
7389 /* branch registers: */
7391 for (; i
< total
; ++i
)
7393 sprintf (name
, "b%d", i
- REG_BR
);
7394 md
.regsym
[i
] = declare_register (name
, i
);
7397 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7398 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7399 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7400 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7401 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7402 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7403 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7405 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7407 regnum
= indirect_reg
[i
].regnum
;
7408 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7411 /* define synonyms for application registers: */
7412 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7413 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7414 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7416 /* define synonyms for control registers: */
7417 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7418 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7419 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7421 declare_register ("gp", REG_GR
+ 1);
7422 declare_register ("sp", REG_GR
+ 12);
7423 declare_register ("rp", REG_BR
+ 0);
7425 /* pseudo-registers used to specify unwind info: */
7426 declare_register ("psp", REG_PSP
);
7428 declare_register_set ("ret", 4, REG_GR
+ 8);
7429 declare_register_set ("farg", 8, REG_FR
+ 8);
7430 declare_register_set ("fret", 8, REG_FR
+ 8);
7432 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7434 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7435 (PTR
) (const_bits
+ i
));
7437 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7441 /* Set the architecture and machine depending on defaults and command line
7443 if (md
.flags
& EF_IA_64_ABI64
)
7444 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7446 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7449 as_warn (_("Could not set architecture and machine"));
7451 /* Set the pointer size and pointer shift size depending on md.flags */
7453 if (md
.flags
& EF_IA_64_ABI64
)
7455 md
.pointer_size
= 8; /* pointers are 8 bytes */
7456 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7460 md
.pointer_size
= 4; /* pointers are 4 bytes */
7461 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7464 md
.mem_offset
.hint
= 0;
7467 md
.entry_labels
= NULL
;
7470 /* Set the default options in md. Cannot do this in md_begin because
7471 that is called after md_parse_option which is where we set the
7472 options in md based on command line options. */
7475 ia64_init (argc
, argv
)
7476 int argc ATTRIBUTE_UNUSED
;
7477 char **argv ATTRIBUTE_UNUSED
;
7479 md
.flags
= MD_FLAGS_DEFAULT
;
7481 /* FIXME: We should change it to unwind_check_error someday. */
7482 md
.unwind_check
= unwind_check_warning
;
7483 md
.hint_b
= hint_b_error
;
7487 /* Return a string for the target object file format. */
7490 ia64_target_format ()
7492 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7494 if (md
.flags
& EF_IA_64_BE
)
7496 if (md
.flags
& EF_IA_64_ABI64
)
7497 #if defined(TE_AIX50)
7498 return "elf64-ia64-aix-big";
7499 #elif defined(TE_HPUX)
7500 return "elf64-ia64-hpux-big";
7502 return "elf64-ia64-big";
7505 #if defined(TE_AIX50)
7506 return "elf32-ia64-aix-big";
7507 #elif defined(TE_HPUX)
7508 return "elf32-ia64-hpux-big";
7510 return "elf32-ia64-big";
7515 if (md
.flags
& EF_IA_64_ABI64
)
7517 return "elf64-ia64-aix-little";
7519 return "elf64-ia64-little";
7523 return "elf32-ia64-aix-little";
7525 return "elf32-ia64-little";
7530 return "unknown-format";
7534 ia64_end_of_source ()
7536 /* terminate insn group upon reaching end of file: */
7537 insn_group_break (1, 0, 0);
7539 /* emits slots we haven't written yet: */
7540 ia64_flush_insns ();
7542 bfd_set_private_flags (stdoutput
, md
.flags
);
7544 md
.mem_offset
.hint
= 0;
7550 if (md
.qp
.X_op
== O_register
)
7551 as_bad ("qualifying predicate not followed by instruction");
7552 md
.qp
.X_op
= O_absent
;
7554 if (ignore_input ())
7557 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7559 if (md
.detect_dv
&& !md
.explicit_mode
)
7566 as_warn (_("Explicit stops are ignored in auto mode"));
7570 insn_group_break (1, 0, 0);
7574 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7576 static int defining_tag
= 0;
7579 ia64_unrecognized_line (ch
)
7585 expression (&md
.qp
);
7586 if (*input_line_pointer
++ != ')')
7588 as_bad ("Expected ')'");
7591 if (md
.qp
.X_op
!= O_register
)
7593 as_bad ("Qualifying predicate expected");
7596 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7598 as_bad ("Predicate register expected");
7604 if (md
.manual_bundling
)
7605 as_warn ("Found '{' when manual bundling is already turned on");
7607 CURR_SLOT
.manual_bundling_on
= 1;
7608 md
.manual_bundling
= 1;
7610 /* Bundling is only acceptable in explicit mode
7611 or when in default automatic mode. */
7612 if (md
.detect_dv
&& !md
.explicit_mode
)
7614 if (!md
.mode_explicitly_set
7615 && !md
.default_explicit_mode
)
7618 as_warn (_("Found '{' after explicit switch to automatic mode"));
7623 if (!md
.manual_bundling
)
7624 as_warn ("Found '}' when manual bundling is off");
7626 PREV_SLOT
.manual_bundling_off
= 1;
7627 md
.manual_bundling
= 0;
7629 /* switch back to automatic mode, if applicable */
7632 && !md
.mode_explicitly_set
7633 && !md
.default_explicit_mode
)
7636 /* Allow '{' to follow on the same line. We also allow ";;", but that
7637 happens automatically because ';' is an end of line marker. */
7639 if (input_line_pointer
[0] == '{')
7641 input_line_pointer
++;
7642 return ia64_unrecognized_line ('{');
7645 demand_empty_rest_of_line ();
7655 if (md
.qp
.X_op
== O_register
)
7657 as_bad ("Tag must come before qualifying predicate.");
7661 /* This implements just enough of read_a_source_file in read.c to
7662 recognize labels. */
7663 if (is_name_beginner (*input_line_pointer
))
7665 s
= input_line_pointer
;
7666 c
= get_symbol_end ();
7668 else if (LOCAL_LABELS_FB
7669 && ISDIGIT (*input_line_pointer
))
7672 while (ISDIGIT (*input_line_pointer
))
7673 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7674 fb_label_instance_inc (temp
);
7675 s
= fb_label_name (temp
, 0);
7676 c
= *input_line_pointer
;
7685 /* Put ':' back for error messages' sake. */
7686 *input_line_pointer
++ = ':';
7687 as_bad ("Expected ':'");
7694 /* Put ':' back for error messages' sake. */
7695 *input_line_pointer
++ = ':';
7696 if (*input_line_pointer
++ != ']')
7698 as_bad ("Expected ']'");
7703 as_bad ("Tag name expected");
7713 /* Not a valid line. */
7718 ia64_frob_label (sym
)
7721 struct label_fix
*fix
;
7723 /* Tags need special handling since they are not bundle breaks like
7727 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7729 fix
->next
= CURR_SLOT
.tag_fixups
;
7730 CURR_SLOT
.tag_fixups
= fix
;
7735 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7737 md
.last_text_seg
= now_seg
;
7738 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7740 fix
->next
= CURR_SLOT
.label_fixups
;
7741 CURR_SLOT
.label_fixups
= fix
;
7743 /* Keep track of how many code entry points we've seen. */
7744 if (md
.path
== md
.maxpaths
)
7747 md
.entry_labels
= (const char **)
7748 xrealloc ((void *) md
.entry_labels
,
7749 md
.maxpaths
* sizeof (char *));
7751 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7756 /* The HP-UX linker will give unresolved symbol errors for symbols
7757 that are declared but unused. This routine removes declared,
7758 unused symbols from an object. */
7760 ia64_frob_symbol (sym
)
7763 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7764 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7765 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7766 && ! S_IS_EXTERNAL (sym
)))
7773 ia64_flush_pending_output ()
7775 if (!md
.keep_pending_output
7776 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7778 /* ??? This causes many unnecessary stop bits to be emitted.
7779 Unfortunately, it isn't clear if it is safe to remove this. */
7780 insn_group_break (1, 0, 0);
7781 ia64_flush_insns ();
7785 /* Do ia64-specific expression optimization. All that's done here is
7786 to transform index expressions that are either due to the indexing
7787 of rotating registers or due to the indexing of indirect register
7790 ia64_optimize_expr (l
, op
, r
)
7799 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7801 num_regs
= (l
->X_add_number
>> 16);
7802 if ((unsigned) r
->X_add_number
>= num_regs
)
7805 as_bad ("No current frame");
7807 as_bad ("Index out of range 0..%u", num_regs
- 1);
7808 r
->X_add_number
= 0;
7810 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7813 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7815 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7816 || l
->X_add_number
== IND_MEM
)
7818 as_bad ("Indirect register set name expected");
7819 l
->X_add_number
= IND_CPUID
;
7822 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7823 l
->X_add_number
= r
->X_add_number
;
7831 ia64_parse_name (name
, e
, nextcharP
)
7836 struct const_desc
*cdesc
;
7837 struct dynreg
*dr
= 0;
7844 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7846 /* Find what relocation pseudo-function we're dealing with. */
7847 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7848 if (pseudo_func
[idx
].name
7849 && pseudo_func
[idx
].name
[0] == name
[1]
7850 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7852 pseudo_type
= pseudo_func
[idx
].type
;
7855 switch (pseudo_type
)
7857 case PSEUDO_FUNC_RELOC
:
7858 end
= input_line_pointer
;
7859 if (*nextcharP
!= '(')
7861 as_bad ("Expected '('");
7865 ++input_line_pointer
;
7867 if (*input_line_pointer
!= ')')
7869 as_bad ("Missing ')'");
7873 ++input_line_pointer
;
7874 if (e
->X_op
!= O_symbol
)
7876 if (e
->X_op
!= O_pseudo_fixup
)
7878 as_bad ("Not a symbolic expression");
7881 if (idx
!= FUNC_LT_RELATIVE
)
7883 as_bad ("Illegal combination of relocation functions");
7886 switch (S_GET_VALUE (e
->X_op_symbol
))
7888 case FUNC_FPTR_RELATIVE
:
7889 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7890 case FUNC_DTP_MODULE
:
7891 idx
= FUNC_LT_DTP_MODULE
; break;
7892 case FUNC_DTP_RELATIVE
:
7893 idx
= FUNC_LT_DTP_RELATIVE
; break;
7894 case FUNC_TP_RELATIVE
:
7895 idx
= FUNC_LT_TP_RELATIVE
; break;
7897 as_bad ("Illegal combination of relocation functions");
7901 /* Make sure gas doesn't get rid of local symbols that are used
7903 e
->X_op
= O_pseudo_fixup
;
7904 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7906 *nextcharP
= *input_line_pointer
;
7909 case PSEUDO_FUNC_CONST
:
7910 e
->X_op
= O_constant
;
7911 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7914 case PSEUDO_FUNC_REG
:
7915 e
->X_op
= O_register
;
7916 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7925 /* first see if NAME is a known register name: */
7926 sym
= hash_find (md
.reg_hash
, name
);
7929 e
->X_op
= O_register
;
7930 e
->X_add_number
= S_GET_VALUE (sym
);
7934 cdesc
= hash_find (md
.const_hash
, name
);
7937 e
->X_op
= O_constant
;
7938 e
->X_add_number
= cdesc
->value
;
7942 /* check for inN, locN, or outN: */
7947 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7955 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7963 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7974 /* Ignore register numbers with leading zeroes, except zero itself. */
7975 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7977 unsigned long regnum
;
7979 /* The name is inN, locN, or outN; parse the register number. */
7980 regnum
= strtoul (name
+ idx
, &end
, 10);
7981 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7983 if (regnum
>= dr
->num_regs
)
7986 as_bad ("No current frame");
7988 as_bad ("Register number out of range 0..%u",
7992 e
->X_op
= O_register
;
7993 e
->X_add_number
= dr
->base
+ regnum
;
7998 end
= alloca (strlen (name
) + 1);
8000 name
= ia64_canonicalize_symbol_name (end
);
8001 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8003 /* We've got ourselves the name of a rotating register set.
8004 Store the base register number in the low 16 bits of
8005 X_add_number and the size of the register set in the top 16
8007 e
->X_op
= O_register
;
8008 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8014 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8017 ia64_canonicalize_symbol_name (name
)
8020 size_t len
= strlen (name
), full
= len
;
8022 while (len
> 0 && name
[len
- 1] == '#')
8027 as_bad ("Standalone `#' is illegal");
8029 else if (len
< full
- 1)
8030 as_warn ("Redundant `#' suffix operators");
8035 /* Return true if idesc is a conditional branch instruction. This excludes
8036 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8037 because they always read/write resources regardless of the value of the
8038 qualifying predicate. br.ia must always use p0, and hence is always
8039 taken. Thus this function returns true for branches which can fall
8040 through, and which use no resources if they do fall through. */
8043 is_conditional_branch (idesc
)
8044 struct ia64_opcode
*idesc
;
8046 /* br is a conditional branch. Everything that starts with br. except
8047 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8048 Everything that starts with brl is a conditional branch. */
8049 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8050 && (idesc
->name
[2] == '\0'
8051 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8052 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8053 || idesc
->name
[2] == 'l'
8054 /* br.cond, br.call, br.clr */
8055 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8056 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8057 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8060 /* Return whether the given opcode is a taken branch. If there's any doubt,
8064 is_taken_branch (idesc
)
8065 struct ia64_opcode
*idesc
;
8067 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8068 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8071 /* Return whether the given opcode is an interruption or rfi. If there's any
8072 doubt, returns zero. */
8075 is_interruption_or_rfi (idesc
)
8076 struct ia64_opcode
*idesc
;
8078 if (strcmp (idesc
->name
, "rfi") == 0)
8083 /* Returns the index of the given dependency in the opcode's list of chks, or
8084 -1 if there is no dependency. */
8087 depends_on (depind
, idesc
)
8089 struct ia64_opcode
*idesc
;
8092 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8093 for (i
= 0; i
< dep
->nchks
; i
++)
8095 if (depind
== DEP (dep
->chks
[i
]))
8101 /* Determine a set of specific resources used for a particular resource
8102 class. Returns the number of specific resources identified For those
8103 cases which are not determinable statically, the resource returned is
8106 Meanings of value in 'NOTE':
8107 1) only read/write when the register number is explicitly encoded in the
8109 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8110 accesses CFM when qualifying predicate is in the rotating region.
8111 3) general register value is used to specify an indirect register; not
8112 determinable statically.
8113 4) only read the given resource when bits 7:0 of the indirect index
8114 register value does not match the register number of the resource; not
8115 determinable statically.
8116 5) all rules are implementation specific.
8117 6) only when both the index specified by the reader and the index specified
8118 by the writer have the same value in bits 63:61; not determinable
8120 7) only access the specified resource when the corresponding mask bit is
8122 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8123 only read when these insns reference FR2-31
8124 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8125 written when these insns write FR32-127
8126 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8128 11) The target predicates are written independently of PR[qp], but source
8129 registers are only read if PR[qp] is true. Since the state of PR[qp]
8130 cannot statically be determined, all source registers are marked used.
8131 12) This insn only reads the specified predicate register when that
8132 register is the PR[qp].
8133 13) This reference to ld-c only applies to teh GR whose value is loaded
8134 with data returned from memory, not the post-incremented address register.
8135 14) The RSE resource includes the implementation-specific RSE internal
8136 state resources. At least one (and possibly more) of these resources are
8137 read by each instruction listed in IC:rse-readers. At least one (and
8138 possibly more) of these resources are written by each insn listed in
8140 15+16) Represents reserved instructions, which the assembler does not
8143 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8144 this code; there are no dependency violations based on memory access.
8147 #define MAX_SPECS 256
8152 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8153 const struct ia64_dependency
*dep
;
8154 struct ia64_opcode
*idesc
;
8155 int type
; /* is this a DV chk or a DV reg? */
8156 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8157 int note
; /* resource note for this insn's usage */
8158 int path
; /* which execution path to examine */
8165 if (dep
->mode
== IA64_DV_WAW
8166 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8167 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8170 /* template for any resources we identify */
8171 tmpl
.dependency
= dep
;
8173 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8174 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8175 tmpl
.link_to_qp_branch
= 1;
8176 tmpl
.mem_offset
.hint
= 0;
8177 tmpl
.mem_offset
.offset
= 0;
8178 tmpl
.mem_offset
.base
= 0;
8181 tmpl
.cmp_type
= CMP_NONE
;
8188 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8189 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8190 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8192 /* we don't need to track these */
8193 if (dep
->semantics
== IA64_DVS_NONE
)
8196 switch (dep
->specifier
)
8201 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8203 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8204 if (regno
>= 0 && regno
<= 7)
8206 specs
[count
] = tmpl
;
8207 specs
[count
++].index
= regno
;
8213 for (i
= 0; i
< 8; i
++)
8215 specs
[count
] = tmpl
;
8216 specs
[count
++].index
= i
;
8225 case IA64_RS_AR_UNAT
:
8226 /* This is a mov =AR or mov AR= instruction. */
8227 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8229 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8230 if (regno
== AR_UNAT
)
8232 specs
[count
++] = tmpl
;
8237 /* This is a spill/fill, or other instruction that modifies the
8240 /* Unless we can determine the specific bits used, mark the whole
8241 thing; bits 8:3 of the memory address indicate the bit used in
8242 UNAT. The .mem.offset hint may be used to eliminate a small
8243 subset of conflicts. */
8244 specs
[count
] = tmpl
;
8245 if (md
.mem_offset
.hint
)
8248 fprintf (stderr
, " Using hint for spill/fill\n");
8249 /* The index isn't actually used, just set it to something
8250 approximating the bit index. */
8251 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8252 specs
[count
].mem_offset
.hint
= 1;
8253 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8254 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8258 specs
[count
++].specific
= 0;
8266 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8268 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8269 if ((regno
>= 8 && regno
<= 15)
8270 || (regno
>= 20 && regno
<= 23)
8271 || (regno
>= 31 && regno
<= 39)
8272 || (regno
>= 41 && regno
<= 47)
8273 || (regno
>= 67 && regno
<= 111))
8275 specs
[count
] = tmpl
;
8276 specs
[count
++].index
= regno
;
8289 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8291 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8292 if ((regno
>= 48 && regno
<= 63)
8293 || (regno
>= 112 && regno
<= 127))
8295 specs
[count
] = tmpl
;
8296 specs
[count
++].index
= regno
;
8302 for (i
= 48; i
< 64; i
++)
8304 specs
[count
] = tmpl
;
8305 specs
[count
++].index
= i
;
8307 for (i
= 112; i
< 128; i
++)
8309 specs
[count
] = tmpl
;
8310 specs
[count
++].index
= i
;
8328 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8329 if (idesc
->operands
[i
] == IA64_OPND_B1
8330 || idesc
->operands
[i
] == IA64_OPND_B2
)
8332 specs
[count
] = tmpl
;
8333 specs
[count
++].index
=
8334 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8339 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8340 if (idesc
->operands
[i
] == IA64_OPND_B1
8341 || idesc
->operands
[i
] == IA64_OPND_B2
)
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
=
8345 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8351 case IA64_RS_CPUID
: /* four or more registers */
8354 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8356 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8357 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8360 specs
[count
] = tmpl
;
8361 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8365 specs
[count
] = tmpl
;
8366 specs
[count
++].specific
= 0;
8376 case IA64_RS_DBR
: /* four or more registers */
8379 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8381 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8382 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8385 specs
[count
] = tmpl
;
8386 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8390 specs
[count
] = tmpl
;
8391 specs
[count
++].specific
= 0;
8395 else if (note
== 0 && !rsrc_write
)
8397 specs
[count
] = tmpl
;
8398 specs
[count
++].specific
= 0;
8406 case IA64_RS_IBR
: /* four or more registers */
8409 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8411 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8412 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8415 specs
[count
] = tmpl
;
8416 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8420 specs
[count
] = tmpl
;
8421 specs
[count
++].specific
= 0;
8434 /* These are implementation specific. Force all references to
8435 conflict with all other references. */
8436 specs
[count
] = tmpl
;
8437 specs
[count
++].specific
= 0;
8445 case IA64_RS_PKR
: /* 16 or more registers */
8446 if (note
== 3 || note
== 4)
8448 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8450 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8451 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8456 specs
[count
] = tmpl
;
8457 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8460 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8462 /* Uses all registers *except* the one in R3. */
8463 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8465 specs
[count
] = tmpl
;
8466 specs
[count
++].index
= i
;
8472 specs
[count
] = tmpl
;
8473 specs
[count
++].specific
= 0;
8480 specs
[count
] = tmpl
;
8481 specs
[count
++].specific
= 0;
8485 case IA64_RS_PMC
: /* four or more registers */
8488 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8489 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8492 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8494 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8495 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8498 specs
[count
] = tmpl
;
8499 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8503 specs
[count
] = tmpl
;
8504 specs
[count
++].specific
= 0;
8514 case IA64_RS_PMD
: /* four or more registers */
8517 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8519 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8520 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8523 specs
[count
] = tmpl
;
8524 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8528 specs
[count
] = tmpl
;
8529 specs
[count
++].specific
= 0;
8539 case IA64_RS_RR
: /* eight registers */
8542 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8544 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8545 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8548 specs
[count
] = tmpl
;
8549 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8553 specs
[count
] = tmpl
;
8554 specs
[count
++].specific
= 0;
8558 else if (note
== 0 && !rsrc_write
)
8560 specs
[count
] = tmpl
;
8561 specs
[count
++].specific
= 0;
8569 case IA64_RS_CR_IRR
:
8572 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8573 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8575 && idesc
->operands
[1] == IA64_OPND_CR3
8578 for (i
= 0; i
< 4; i
++)
8580 specs
[count
] = tmpl
;
8581 specs
[count
++].index
= CR_IRR0
+ i
;
8587 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8588 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8590 && regno
<= CR_IRR3
)
8592 specs
[count
] = tmpl
;
8593 specs
[count
++].index
= regno
;
8602 case IA64_RS_CR_LRR
:
8609 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8610 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8611 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8613 specs
[count
] = tmpl
;
8614 specs
[count
++].index
= regno
;
8622 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8624 specs
[count
] = tmpl
;
8625 specs
[count
++].index
=
8626 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8641 else if (rsrc_write
)
8643 if (dep
->specifier
== IA64_RS_FRb
8644 && idesc
->operands
[0] == IA64_OPND_F1
)
8646 specs
[count
] = tmpl
;
8647 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8652 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8654 if (idesc
->operands
[i
] == IA64_OPND_F2
8655 || idesc
->operands
[i
] == IA64_OPND_F3
8656 || idesc
->operands
[i
] == IA64_OPND_F4
)
8658 specs
[count
] = tmpl
;
8659 specs
[count
++].index
=
8660 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8669 /* This reference applies only to the GR whose value is loaded with
8670 data returned from memory. */
8671 specs
[count
] = tmpl
;
8672 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8678 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8679 if (idesc
->operands
[i
] == IA64_OPND_R1
8680 || idesc
->operands
[i
] == IA64_OPND_R2
8681 || idesc
->operands
[i
] == IA64_OPND_R3
)
8683 specs
[count
] = tmpl
;
8684 specs
[count
++].index
=
8685 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8687 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8688 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8689 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8691 specs
[count
] = tmpl
;
8692 specs
[count
++].index
=
8693 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8698 /* Look for anything that reads a GR. */
8699 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8701 if (idesc
->operands
[i
] == IA64_OPND_MR3
8702 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8703 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8704 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8705 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8706 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8707 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8708 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8709 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8710 || ((i
>= idesc
->num_outputs
)
8711 && (idesc
->operands
[i
] == IA64_OPND_R1
8712 || idesc
->operands
[i
] == IA64_OPND_R2
8713 || idesc
->operands
[i
] == IA64_OPND_R3
8714 /* addl source register. */
8715 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8717 specs
[count
] = tmpl
;
8718 specs
[count
++].index
=
8719 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8730 /* This is the same as IA64_RS_PRr, except that the register range is
8731 from 1 - 15, and there are no rotating register reads/writes here. */
8735 for (i
= 1; i
< 16; i
++)
8737 specs
[count
] = tmpl
;
8738 specs
[count
++].index
= i
;
8744 /* Mark only those registers indicated by the mask. */
8747 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8748 for (i
= 1; i
< 16; i
++)
8749 if (mask
& ((valueT
) 1 << i
))
8751 specs
[count
] = tmpl
;
8752 specs
[count
++].index
= i
;
8760 else if (note
== 11) /* note 11 implies note 1 as well */
8764 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8766 if (idesc
->operands
[i
] == IA64_OPND_P1
8767 || idesc
->operands
[i
] == IA64_OPND_P2
)
8769 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8770 if (regno
>= 1 && regno
< 16)
8772 specs
[count
] = tmpl
;
8773 specs
[count
++].index
= regno
;
8783 else if (note
== 12)
8785 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8787 specs
[count
] = tmpl
;
8788 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8795 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8796 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8797 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8798 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8800 if ((idesc
->operands
[0] == IA64_OPND_P1
8801 || idesc
->operands
[0] == IA64_OPND_P2
)
8802 && p1
>= 1 && p1
< 16)
8804 specs
[count
] = tmpl
;
8805 specs
[count
].cmp_type
=
8806 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8807 specs
[count
++].index
= p1
;
8809 if ((idesc
->operands
[1] == IA64_OPND_P1
8810 || idesc
->operands
[1] == IA64_OPND_P2
)
8811 && p2
>= 1 && p2
< 16)
8813 specs
[count
] = tmpl
;
8814 specs
[count
].cmp_type
=
8815 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8816 specs
[count
++].index
= p2
;
8821 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8823 specs
[count
] = tmpl
;
8824 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8826 if (idesc
->operands
[1] == IA64_OPND_PR
)
8828 for (i
= 1; i
< 16; i
++)
8830 specs
[count
] = tmpl
;
8831 specs
[count
++].index
= i
;
8842 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8843 simplified cases of this. */
8847 for (i
= 16; i
< 63; i
++)
8849 specs
[count
] = tmpl
;
8850 specs
[count
++].index
= i
;
8856 /* Mark only those registers indicated by the mask. */
8858 && idesc
->operands
[0] == IA64_OPND_PR
)
8860 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8861 if (mask
& ((valueT
) 1 << 16))
8862 for (i
= 16; i
< 63; i
++)
8864 specs
[count
] = tmpl
;
8865 specs
[count
++].index
= i
;
8869 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8871 for (i
= 16; i
< 63; i
++)
8873 specs
[count
] = tmpl
;
8874 specs
[count
++].index
= i
;
8882 else if (note
== 11) /* note 11 implies note 1 as well */
8886 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8888 if (idesc
->operands
[i
] == IA64_OPND_P1
8889 || idesc
->operands
[i
] == IA64_OPND_P2
)
8891 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8892 if (regno
>= 16 && regno
< 63)
8894 specs
[count
] = tmpl
;
8895 specs
[count
++].index
= regno
;
8905 else if (note
== 12)
8907 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8909 specs
[count
] = tmpl
;
8910 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8917 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8918 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8919 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8920 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8922 if ((idesc
->operands
[0] == IA64_OPND_P1
8923 || idesc
->operands
[0] == IA64_OPND_P2
)
8924 && p1
>= 16 && p1
< 63)
8926 specs
[count
] = tmpl
;
8927 specs
[count
].cmp_type
=
8928 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8929 specs
[count
++].index
= p1
;
8931 if ((idesc
->operands
[1] == IA64_OPND_P1
8932 || idesc
->operands
[1] == IA64_OPND_P2
)
8933 && p2
>= 16 && p2
< 63)
8935 specs
[count
] = tmpl
;
8936 specs
[count
].cmp_type
=
8937 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8938 specs
[count
++].index
= p2
;
8943 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8945 specs
[count
] = tmpl
;
8946 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8948 if (idesc
->operands
[1] == IA64_OPND_PR
)
8950 for (i
= 16; i
< 63; i
++)
8952 specs
[count
] = tmpl
;
8953 specs
[count
++].index
= i
;
8965 /* Verify that the instruction is using the PSR bit indicated in
8969 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8971 if (dep
->regindex
< 6)
8973 specs
[count
++] = tmpl
;
8976 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8978 if (dep
->regindex
< 32
8979 || dep
->regindex
== 35
8980 || dep
->regindex
== 36
8981 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8983 specs
[count
++] = tmpl
;
8986 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8988 if (dep
->regindex
< 32
8989 || dep
->regindex
== 35
8990 || dep
->regindex
== 36
8991 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8993 specs
[count
++] = tmpl
;
8998 /* Several PSR bits have very specific dependencies. */
8999 switch (dep
->regindex
)
9002 specs
[count
++] = tmpl
;
9007 specs
[count
++] = tmpl
;
9011 /* Only certain CR accesses use PSR.ic */
9012 if (idesc
->operands
[0] == IA64_OPND_CR3
9013 || idesc
->operands
[1] == IA64_OPND_CR3
)
9016 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9019 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9034 specs
[count
++] = tmpl
;
9043 specs
[count
++] = tmpl
;
9047 /* Only some AR accesses use cpl */
9048 if (idesc
->operands
[0] == IA64_OPND_AR3
9049 || idesc
->operands
[1] == IA64_OPND_AR3
)
9052 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9055 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9062 && regno
<= AR_K7
))))
9064 specs
[count
++] = tmpl
;
9069 specs
[count
++] = tmpl
;
9079 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9081 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9087 if (mask
& ((valueT
) 1 << dep
->regindex
))
9089 specs
[count
++] = tmpl
;
9094 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9095 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9096 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9097 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9099 if (idesc
->operands
[i
] == IA64_OPND_F1
9100 || idesc
->operands
[i
] == IA64_OPND_F2
9101 || idesc
->operands
[i
] == IA64_OPND_F3
9102 || idesc
->operands
[i
] == IA64_OPND_F4
)
9104 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9105 if (reg
>= min
&& reg
<= max
)
9107 specs
[count
++] = tmpl
;
9114 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9115 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9116 /* mfh is read on writes to FR32-127; mfl is read on writes to
9118 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9120 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9122 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9123 if (reg
>= min
&& reg
<= max
)
9125 specs
[count
++] = tmpl
;
9130 else if (note
== 10)
9132 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9134 if (idesc
->operands
[i
] == IA64_OPND_R1
9135 || idesc
->operands
[i
] == IA64_OPND_R2
9136 || idesc
->operands
[i
] == IA64_OPND_R3
)
9138 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9139 if (regno
>= 16 && regno
<= 31)
9141 specs
[count
++] = tmpl
;
9152 case IA64_RS_AR_FPSR
:
9153 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9155 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9156 if (regno
== AR_FPSR
)
9158 specs
[count
++] = tmpl
;
9163 specs
[count
++] = tmpl
;
9168 /* Handle all AR[REG] resources */
9169 if (note
== 0 || note
== 1)
9171 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9172 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9173 && regno
== dep
->regindex
)
9175 specs
[count
++] = tmpl
;
9177 /* other AR[REG] resources may be affected by AR accesses */
9178 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9181 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9182 switch (dep
->regindex
)
9188 if (regno
== AR_BSPSTORE
)
9190 specs
[count
++] = tmpl
;
9194 (regno
== AR_BSPSTORE
9195 || regno
== AR_RNAT
))
9197 specs
[count
++] = tmpl
;
9202 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9205 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9206 switch (dep
->regindex
)
9211 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9213 specs
[count
++] = tmpl
;
9220 specs
[count
++] = tmpl
;
9230 /* Handle all CR[REG] resources */
9231 if (note
== 0 || note
== 1)
9233 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9235 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9236 if (regno
== dep
->regindex
)
9238 specs
[count
++] = tmpl
;
9240 else if (!rsrc_write
)
9242 /* Reads from CR[IVR] affect other resources. */
9243 if (regno
== CR_IVR
)
9245 if ((dep
->regindex
>= CR_IRR0
9246 && dep
->regindex
<= CR_IRR3
)
9247 || dep
->regindex
== CR_TPR
)
9249 specs
[count
++] = tmpl
;
9256 specs
[count
++] = tmpl
;
9265 case IA64_RS_INSERVICE
:
9266 /* look for write of EOI (67) or read of IVR (65) */
9267 if ((idesc
->operands
[0] == IA64_OPND_CR3
9268 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9269 || (idesc
->operands
[1] == IA64_OPND_CR3
9270 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9272 specs
[count
++] = tmpl
;
9279 specs
[count
++] = tmpl
;
9290 specs
[count
++] = tmpl
;
9294 /* Check if any of the registers accessed are in the rotating region.
9295 mov to/from pr accesses CFM only when qp_regno is in the rotating
9297 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9299 if (idesc
->operands
[i
] == IA64_OPND_R1
9300 || idesc
->operands
[i
] == IA64_OPND_R2
9301 || idesc
->operands
[i
] == IA64_OPND_R3
)
9303 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9304 /* Assumes that md.rot.num_regs is always valid */
9305 if (md
.rot
.num_regs
> 0
9307 && num
< 31 + md
.rot
.num_regs
)
9309 specs
[count
] = tmpl
;
9310 specs
[count
++].specific
= 0;
9313 else if (idesc
->operands
[i
] == IA64_OPND_F1
9314 || idesc
->operands
[i
] == IA64_OPND_F2
9315 || idesc
->operands
[i
] == IA64_OPND_F3
9316 || idesc
->operands
[i
] == IA64_OPND_F4
)
9318 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9321 specs
[count
] = tmpl
;
9322 specs
[count
++].specific
= 0;
9325 else if (idesc
->operands
[i
] == IA64_OPND_P1
9326 || idesc
->operands
[i
] == IA64_OPND_P2
)
9328 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9331 specs
[count
] = tmpl
;
9332 specs
[count
++].specific
= 0;
9336 if (CURR_SLOT
.qp_regno
> 15)
9338 specs
[count
] = tmpl
;
9339 specs
[count
++].specific
= 0;
9344 /* This is the same as IA64_RS_PRr, except simplified to account for
9345 the fact that there is only one register. */
9349 specs
[count
++] = tmpl
;
9354 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9355 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9356 if (mask
& ((valueT
) 1 << 63))
9357 specs
[count
++] = tmpl
;
9359 else if (note
== 11)
9361 if ((idesc
->operands
[0] == IA64_OPND_P1
9362 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9363 || (idesc
->operands
[1] == IA64_OPND_P2
9364 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9366 specs
[count
++] = tmpl
;
9369 else if (note
== 12)
9371 if (CURR_SLOT
.qp_regno
== 63)
9373 specs
[count
++] = tmpl
;
9380 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9381 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9382 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9383 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9386 && (idesc
->operands
[0] == IA64_OPND_P1
9387 || idesc
->operands
[0] == IA64_OPND_P2
))
9389 specs
[count
] = tmpl
;
9390 specs
[count
++].cmp_type
=
9391 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9394 && (idesc
->operands
[1] == IA64_OPND_P1
9395 || idesc
->operands
[1] == IA64_OPND_P2
))
9397 specs
[count
] = tmpl
;
9398 specs
[count
++].cmp_type
=
9399 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9404 if (CURR_SLOT
.qp_regno
== 63)
9406 specs
[count
++] = tmpl
;
9417 /* FIXME we can identify some individual RSE written resources, but RSE
9418 read resources have not yet been completely identified, so for now
9419 treat RSE as a single resource */
9420 if (strncmp (idesc
->name
, "mov", 3) == 0)
9424 if (idesc
->operands
[0] == IA64_OPND_AR3
9425 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9427 specs
[count
++] = tmpl
;
9432 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9434 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9435 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9437 specs
[count
++] = tmpl
;
9440 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9442 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9443 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9444 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9446 specs
[count
++] = tmpl
;
9453 specs
[count
++] = tmpl
;
9458 /* FIXME -- do any of these need to be non-specific? */
9459 specs
[count
++] = tmpl
;
9463 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9470 /* Clear branch flags on marked resources. This breaks the link between the
9471 QP of the marking instruction and a subsequent branch on the same QP. */
9474 clear_qp_branch_flag (mask
)
9478 for (i
= 0; i
< regdepslen
; i
++)
9480 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9481 if ((bit
& mask
) != 0)
9483 regdeps
[i
].link_to_qp_branch
= 0;
9488 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9489 any mutexes which contain one of the PRs and create new ones when
9493 update_qp_mutex (valueT mask
)
9499 while (i
< qp_mutexeslen
)
9501 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9503 /* If it destroys and creates the same mutex, do nothing. */
9504 if (qp_mutexes
[i
].prmask
== mask
9505 && qp_mutexes
[i
].path
== md
.path
)
9516 fprintf (stderr
, " Clearing mutex relation");
9517 print_prmask (qp_mutexes
[i
].prmask
);
9518 fprintf (stderr
, "\n");
9521 /* Deal with the old mutex with more than 3+ PRs only if
9522 the new mutex on the same execution path with it.
9524 FIXME: The 3+ mutex support is incomplete.
9525 dot_pred_rel () may be a better place to fix it. */
9526 if (qp_mutexes
[i
].path
== md
.path
)
9528 /* If it is a proper subset of the mutex, create a
9531 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9534 qp_mutexes
[i
].prmask
&= ~mask
;
9535 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9537 /* Modify the mutex if there are more than one
9545 /* Remove the mutex. */
9546 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9554 add_qp_mutex (mask
);
9559 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9561 Any changes to a PR clears the mutex relations which include that PR. */
9564 clear_qp_mutex (mask
)
9570 while (i
< qp_mutexeslen
)
9572 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9576 fprintf (stderr
, " Clearing mutex relation");
9577 print_prmask (qp_mutexes
[i
].prmask
);
9578 fprintf (stderr
, "\n");
9580 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9587 /* Clear implies relations which contain PRs in the given masks.
9588 P1_MASK indicates the source of the implies relation, while P2_MASK
9589 indicates the implied PR. */
9592 clear_qp_implies (p1_mask
, p2_mask
)
9599 while (i
< qp_implieslen
)
9601 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9602 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9605 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9606 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9607 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9614 /* Add the PRs specified to the list of implied relations. */
9617 add_qp_imply (p1
, p2
)
9624 /* p0 is not meaningful here. */
9625 if (p1
== 0 || p2
== 0)
9631 /* If it exists already, ignore it. */
9632 for (i
= 0; i
< qp_implieslen
; i
++)
9634 if (qp_implies
[i
].p1
== p1
9635 && qp_implies
[i
].p2
== p2
9636 && qp_implies
[i
].path
== md
.path
9637 && !qp_implies
[i
].p2_branched
)
9641 if (qp_implieslen
== qp_impliestotlen
)
9643 qp_impliestotlen
+= 20;
9644 qp_implies
= (struct qp_imply
*)
9645 xrealloc ((void *) qp_implies
,
9646 qp_impliestotlen
* sizeof (struct qp_imply
));
9649 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9650 qp_implies
[qp_implieslen
].p1
= p1
;
9651 qp_implies
[qp_implieslen
].p2
= p2
;
9652 qp_implies
[qp_implieslen
].path
= md
.path
;
9653 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9655 /* Add in the implied transitive relations; for everything that p2 implies,
9656 make p1 imply that, too; for everything that implies p1, make it imply p2
9658 for (i
= 0; i
< qp_implieslen
; i
++)
9660 if (qp_implies
[i
].p1
== p2
)
9661 add_qp_imply (p1
, qp_implies
[i
].p2
);
9662 if (qp_implies
[i
].p2
== p1
)
9663 add_qp_imply (qp_implies
[i
].p1
, p2
);
9665 /* Add in mutex relations implied by this implies relation; for each mutex
9666 relation containing p2, duplicate it and replace p2 with p1. */
9667 bit
= (valueT
) 1 << p1
;
9668 mask
= (valueT
) 1 << p2
;
9669 for (i
= 0; i
< qp_mutexeslen
; i
++)
9671 if (qp_mutexes
[i
].prmask
& mask
)
9672 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9676 /* Add the PRs specified in the mask to the mutex list; this means that only
9677 one of the PRs can be true at any time. PR0 should never be included in
9687 if (qp_mutexeslen
== qp_mutexestotlen
)
9689 qp_mutexestotlen
+= 20;
9690 qp_mutexes
= (struct qpmutex
*)
9691 xrealloc ((void *) qp_mutexes
,
9692 qp_mutexestotlen
* sizeof (struct qpmutex
));
9696 fprintf (stderr
, " Registering mutex on");
9697 print_prmask (mask
);
9698 fprintf (stderr
, "\n");
9700 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9701 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9705 has_suffix_p (name
, suffix
)
9709 size_t namelen
= strlen (name
);
9710 size_t sufflen
= strlen (suffix
);
9712 if (namelen
<= sufflen
)
9714 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9718 clear_register_values ()
9722 fprintf (stderr
, " Clearing register values\n");
9723 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9724 gr_values
[i
].known
= 0;
9727 /* Keep track of register values/changes which affect DV tracking.
9729 optimization note: should add a flag to classes of insns where otherwise we
9730 have to examine a group of strings to identify them. */
9733 note_register_values (idesc
)
9734 struct ia64_opcode
*idesc
;
9736 valueT qp_changemask
= 0;
9739 /* Invalidate values for registers being written to. */
9740 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9742 if (idesc
->operands
[i
] == IA64_OPND_R1
9743 || idesc
->operands
[i
] == IA64_OPND_R2
9744 || idesc
->operands
[i
] == IA64_OPND_R3
)
9746 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9747 if (regno
> 0 && regno
< NELEMS (gr_values
))
9748 gr_values
[regno
].known
= 0;
9750 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9752 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9753 if (regno
> 0 && regno
< 4)
9754 gr_values
[regno
].known
= 0;
9756 else if (idesc
->operands
[i
] == IA64_OPND_P1
9757 || idesc
->operands
[i
] == IA64_OPND_P2
)
9759 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9760 qp_changemask
|= (valueT
) 1 << regno
;
9762 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9764 if (idesc
->operands
[2] & (valueT
) 0x10000)
9765 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9767 qp_changemask
= idesc
->operands
[2];
9770 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9772 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9773 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9775 qp_changemask
= idesc
->operands
[1];
9776 qp_changemask
&= ~(valueT
) 0xFFFF;
9781 /* Always clear qp branch flags on any PR change. */
9782 /* FIXME there may be exceptions for certain compares. */
9783 clear_qp_branch_flag (qp_changemask
);
9785 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9786 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9788 qp_changemask
|= ~(valueT
) 0xFFFF;
9789 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9791 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9792 gr_values
[i
].known
= 0;
9794 clear_qp_mutex (qp_changemask
);
9795 clear_qp_implies (qp_changemask
, qp_changemask
);
9797 /* After a call, all register values are undefined, except those marked
9799 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9800 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9802 /* FIXME keep GR values which are marked as "safe_across_calls" */
9803 clear_register_values ();
9804 clear_qp_mutex (~qp_safe_across_calls
);
9805 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9806 clear_qp_branch_flag (~qp_safe_across_calls
);
9808 else if (is_interruption_or_rfi (idesc
)
9809 || is_taken_branch (idesc
))
9811 clear_register_values ();
9812 clear_qp_mutex (~(valueT
) 0);
9813 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9815 /* Look for mutex and implies relations. */
9816 else if ((idesc
->operands
[0] == IA64_OPND_P1
9817 || idesc
->operands
[0] == IA64_OPND_P2
)
9818 && (idesc
->operands
[1] == IA64_OPND_P1
9819 || idesc
->operands
[1] == IA64_OPND_P2
))
9821 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9822 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9823 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9824 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9826 /* If both PRs are PR0, we can't really do anything. */
9827 if (p1
== 0 && p2
== 0)
9830 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9832 /* In general, clear mutexes and implies which include P1 or P2,
9833 with the following exceptions. */
9834 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9835 || has_suffix_p (idesc
->name
, ".and.orcm"))
9837 clear_qp_implies (p2mask
, p1mask
);
9839 else if (has_suffix_p (idesc
->name
, ".andcm")
9840 || has_suffix_p (idesc
->name
, ".and"))
9842 clear_qp_implies (0, p1mask
| p2mask
);
9844 else if (has_suffix_p (idesc
->name
, ".orcm")
9845 || has_suffix_p (idesc
->name
, ".or"))
9847 clear_qp_mutex (p1mask
| p2mask
);
9848 clear_qp_implies (p1mask
| p2mask
, 0);
9854 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9856 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9857 if (p1
== 0 || p2
== 0)
9858 clear_qp_mutex (p1mask
| p2mask
);
9860 added
= update_qp_mutex (p1mask
| p2mask
);
9862 if (CURR_SLOT
.qp_regno
== 0
9863 || has_suffix_p (idesc
->name
, ".unc"))
9865 if (added
== 0 && p1
&& p2
)
9866 add_qp_mutex (p1mask
| p2mask
);
9867 if (CURR_SLOT
.qp_regno
!= 0)
9870 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9872 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9877 /* Look for mov imm insns into GRs. */
9878 else if (idesc
->operands
[0] == IA64_OPND_R1
9879 && (idesc
->operands
[1] == IA64_OPND_IMM22
9880 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9881 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9882 && (strcmp (idesc
->name
, "mov") == 0
9883 || strcmp (idesc
->name
, "movl") == 0))
9885 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9886 if (regno
> 0 && regno
< NELEMS (gr_values
))
9888 gr_values
[regno
].known
= 1;
9889 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9890 gr_values
[regno
].path
= md
.path
;
9893 fprintf (stderr
, " Know gr%d = ", regno
);
9894 fprintf_vma (stderr
, gr_values
[regno
].value
);
9895 fputs ("\n", stderr
);
9899 /* Look for dep.z imm insns. */
9900 else if (idesc
->operands
[0] == IA64_OPND_R1
9901 && idesc
->operands
[1] == IA64_OPND_IMM8
9902 && strcmp (idesc
->name
, "dep.z") == 0)
9904 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9905 if (regno
> 0 && regno
< NELEMS (gr_values
))
9907 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9909 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9910 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9911 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9912 gr_values
[regno
].known
= 1;
9913 gr_values
[regno
].value
= value
;
9914 gr_values
[regno
].path
= md
.path
;
9917 fprintf (stderr
, " Know gr%d = ", regno
);
9918 fprintf_vma (stderr
, gr_values
[regno
].value
);
9919 fputs ("\n", stderr
);
9925 clear_qp_mutex (qp_changemask
);
9926 clear_qp_implies (qp_changemask
, qp_changemask
);
9930 /* Return whether the given predicate registers are currently mutex. */
9933 qp_mutex (p1
, p2
, path
)
9943 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9944 for (i
= 0; i
< qp_mutexeslen
; i
++)
9946 if (qp_mutexes
[i
].path
>= path
9947 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9954 /* Return whether the given resource is in the given insn's list of chks
9955 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9959 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9961 struct ia64_opcode
*idesc
;
9966 struct rsrc specs
[MAX_SPECS
];
9969 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9970 we don't need to check. One exception is note 11, which indicates that
9971 target predicates are written regardless of PR[qp]. */
9972 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9976 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9979 /* UNAT checking is a bit more specific than other resources */
9980 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9981 && specs
[count
].mem_offset
.hint
9982 && rs
->mem_offset
.hint
)
9984 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9986 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9987 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9994 /* Skip apparent PR write conflicts where both writes are an AND or both
9995 writes are an OR. */
9996 if (rs
->dependency
->specifier
== IA64_RS_PR
9997 || rs
->dependency
->specifier
== IA64_RS_PRr
9998 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10000 if (specs
[count
].cmp_type
!= CMP_NONE
10001 && specs
[count
].cmp_type
== rs
->cmp_type
)
10004 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10005 dv_mode
[rs
->dependency
->mode
],
10006 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10007 specs
[count
].index
: 63);
10012 " %s on parallel compare conflict %s vs %s on PR%d\n",
10013 dv_mode
[rs
->dependency
->mode
],
10014 dv_cmp_type
[rs
->cmp_type
],
10015 dv_cmp_type
[specs
[count
].cmp_type
],
10016 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10017 specs
[count
].index
: 63);
10021 /* If either resource is not specific, conservatively assume a conflict
10023 if (!specs
[count
].specific
|| !rs
->specific
)
10025 else if (specs
[count
].index
== rs
->index
)
10032 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10033 insert a stop to create the break. Update all resource dependencies
10034 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10035 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10036 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10040 insn_group_break (insert_stop
, qp_regno
, save_current
)
10047 if (insert_stop
&& md
.num_slots_in_use
> 0)
10048 PREV_SLOT
.end_of_insn_group
= 1;
10052 fprintf (stderr
, " Insn group break%s",
10053 (insert_stop
? " (w/stop)" : ""));
10055 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10056 fprintf (stderr
, "\n");
10060 while (i
< regdepslen
)
10062 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10065 && regdeps
[i
].qp_regno
!= qp_regno
)
10072 && CURR_SLOT
.src_file
== regdeps
[i
].file
10073 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10079 /* clear dependencies which are automatically cleared by a stop, or
10080 those that have reached the appropriate state of insn serialization */
10081 if (dep
->semantics
== IA64_DVS_IMPLIED
10082 || dep
->semantics
== IA64_DVS_IMPLIEDF
10083 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10085 print_dependency ("Removing", i
);
10086 regdeps
[i
] = regdeps
[--regdepslen
];
10090 if (dep
->semantics
== IA64_DVS_DATA
10091 || dep
->semantics
== IA64_DVS_INSTR
10092 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10094 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10095 regdeps
[i
].insn_srlz
= STATE_STOP
;
10096 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10097 regdeps
[i
].data_srlz
= STATE_STOP
;
10104 /* Add the given resource usage spec to the list of active dependencies. */
10107 mark_resource (idesc
, dep
, spec
, depind
, path
)
10108 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10109 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10114 if (regdepslen
== regdepstotlen
)
10116 regdepstotlen
+= 20;
10117 regdeps
= (struct rsrc
*)
10118 xrealloc ((void *) regdeps
,
10119 regdepstotlen
* sizeof (struct rsrc
));
10122 regdeps
[regdepslen
] = *spec
;
10123 regdeps
[regdepslen
].depind
= depind
;
10124 regdeps
[regdepslen
].path
= path
;
10125 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10126 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10128 print_dependency ("Adding", regdepslen
);
10134 print_dependency (action
, depind
)
10135 const char *action
;
10140 fprintf (stderr
, " %s %s '%s'",
10141 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10142 (regdeps
[depind
].dependency
)->name
);
10143 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10144 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10145 if (regdeps
[depind
].mem_offset
.hint
)
10147 fputs (" ", stderr
);
10148 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10149 fputs ("+", stderr
);
10150 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10152 fprintf (stderr
, "\n");
10157 instruction_serialization ()
10161 fprintf (stderr
, " Instruction serialization\n");
10162 for (i
= 0; i
< regdepslen
; i
++)
10163 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10164 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10168 data_serialization ()
10172 fprintf (stderr
, " Data serialization\n");
10173 while (i
< regdepslen
)
10175 if (regdeps
[i
].data_srlz
== STATE_STOP
10176 /* Note: as of 991210, all "other" dependencies are cleared by a
10177 data serialization. This might change with new tables */
10178 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10180 print_dependency ("Removing", i
);
10181 regdeps
[i
] = regdeps
[--regdepslen
];
10188 /* Insert stops and serializations as needed to avoid DVs. */
10191 remove_marked_resource (rs
)
10194 switch (rs
->dependency
->semantics
)
10196 case IA64_DVS_SPECIFIC
:
10198 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10199 /* ...fall through... */
10200 case IA64_DVS_INSTR
:
10202 fprintf (stderr
, "Inserting instr serialization\n");
10203 if (rs
->insn_srlz
< STATE_STOP
)
10204 insn_group_break (1, 0, 0);
10205 if (rs
->insn_srlz
< STATE_SRLZ
)
10207 struct slot oldslot
= CURR_SLOT
;
10208 /* Manually jam a srlz.i insn into the stream */
10209 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10210 CURR_SLOT
.user_template
= -1;
10211 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10212 instruction_serialization ();
10213 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10214 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10215 emit_one_bundle ();
10216 CURR_SLOT
= oldslot
;
10218 insn_group_break (1, 0, 0);
10220 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10221 "other" types of DV are eliminated
10222 by a data serialization */
10223 case IA64_DVS_DATA
:
10225 fprintf (stderr
, "Inserting data serialization\n");
10226 if (rs
->data_srlz
< STATE_STOP
)
10227 insn_group_break (1, 0, 0);
10229 struct slot oldslot
= CURR_SLOT
;
10230 /* Manually jam a srlz.d insn into the stream */
10231 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10232 CURR_SLOT
.user_template
= -1;
10233 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10234 data_serialization ();
10235 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10236 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10237 emit_one_bundle ();
10238 CURR_SLOT
= oldslot
;
10241 case IA64_DVS_IMPLIED
:
10242 case IA64_DVS_IMPLIEDF
:
10244 fprintf (stderr
, "Inserting stop\n");
10245 insn_group_break (1, 0, 0);
10252 /* Check the resources used by the given opcode against the current dependency
10255 The check is run once for each execution path encountered. In this case,
10256 a unique execution path is the sequence of instructions following a code
10257 entry point, e.g. the following has three execution paths, one starting
10258 at L0, one at L1, and one at L2.
10267 check_dependencies (idesc
)
10268 struct ia64_opcode
*idesc
;
10270 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10274 /* Note that the number of marked resources may change within the
10275 loop if in auto mode. */
10277 while (i
< regdepslen
)
10279 struct rsrc
*rs
= ®deps
[i
];
10280 const struct ia64_dependency
*dep
= rs
->dependency
;
10283 int start_over
= 0;
10285 if (dep
->semantics
== IA64_DVS_NONE
10286 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10292 note
= NOTE (opdeps
->chks
[chkind
]);
10294 /* Check this resource against each execution path seen thus far. */
10295 for (path
= 0; path
<= md
.path
; path
++)
10299 /* If the dependency wasn't on the path being checked, ignore it. */
10300 if (rs
->path
< path
)
10303 /* If the QP for this insn implies a QP which has branched, don't
10304 bother checking. Ed. NOTE: I don't think this check is terribly
10305 useful; what's the point of generating code which will only be
10306 reached if its QP is zero?
10307 This code was specifically inserted to handle the following code,
10308 based on notes from Intel's DV checking code, where p1 implies p2.
10314 if (CURR_SLOT
.qp_regno
!= 0)
10318 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10320 if (qp_implies
[implies
].path
>= path
10321 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10322 && qp_implies
[implies
].p2_branched
)
10332 if ((matchtype
= resources_match (rs
, idesc
, note
,
10333 CURR_SLOT
.qp_regno
, path
)) != 0)
10336 char pathmsg
[256] = "";
10337 char indexmsg
[256] = "";
10338 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10341 sprintf (pathmsg
, " when entry is at label '%s'",
10342 md
.entry_labels
[path
- 1]);
10343 if (matchtype
== 1 && rs
->index
>= 0)
10344 sprintf (indexmsg
, ", specific resource number is %d",
10346 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10348 (certain
? "violates" : "may violate"),
10349 dv_mode
[dep
->mode
], dep
->name
,
10350 dv_sem
[dep
->semantics
],
10351 pathmsg
, indexmsg
);
10353 if (md
.explicit_mode
)
10355 as_warn ("%s", msg
);
10356 if (path
< md
.path
)
10357 as_warn (_("Only the first path encountering the conflict "
10359 as_warn_where (rs
->file
, rs
->line
,
10360 _("This is the location of the "
10361 "conflicting usage"));
10362 /* Don't bother checking other paths, to avoid duplicating
10363 the same warning */
10369 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10371 remove_marked_resource (rs
);
10373 /* since the set of dependencies has changed, start over */
10374 /* FIXME -- since we're removing dvs as we go, we
10375 probably don't really need to start over... */
10388 /* Register new dependencies based on the given opcode. */
10391 mark_resources (idesc
)
10392 struct ia64_opcode
*idesc
;
10395 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10396 int add_only_qp_reads
= 0;
10398 /* A conditional branch only uses its resources if it is taken; if it is
10399 taken, we stop following that path. The other branch types effectively
10400 *always* write their resources. If it's not taken, register only QP
10402 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10404 add_only_qp_reads
= 1;
10408 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10410 for (i
= 0; i
< opdeps
->nregs
; i
++)
10412 const struct ia64_dependency
*dep
;
10413 struct rsrc specs
[MAX_SPECS
];
10418 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10419 note
= NOTE (opdeps
->regs
[i
]);
10421 if (add_only_qp_reads
10422 && !(dep
->mode
== IA64_DV_WAR
10423 && (dep
->specifier
== IA64_RS_PR
10424 || dep
->specifier
== IA64_RS_PRr
10425 || dep
->specifier
== IA64_RS_PR63
)))
10428 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10430 while (count
-- > 0)
10432 mark_resource (idesc
, dep
, &specs
[count
],
10433 DEP (opdeps
->regs
[i
]), md
.path
);
10436 /* The execution path may affect register values, which may in turn
10437 affect which indirect-access resources are accessed. */
10438 switch (dep
->specifier
)
10442 case IA64_RS_CPUID
:
10450 for (path
= 0; path
< md
.path
; path
++)
10452 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10453 while (count
-- > 0)
10454 mark_resource (idesc
, dep
, &specs
[count
],
10455 DEP (opdeps
->regs
[i
]), path
);
10462 /* Remove dependencies when they no longer apply. */
10465 update_dependencies (idesc
)
10466 struct ia64_opcode
*idesc
;
10470 if (strcmp (idesc
->name
, "srlz.i") == 0)
10472 instruction_serialization ();
10474 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10476 data_serialization ();
10478 else if (is_interruption_or_rfi (idesc
)
10479 || is_taken_branch (idesc
))
10481 /* Although technically the taken branch doesn't clear dependencies
10482 which require a srlz.[id], we don't follow the branch; the next
10483 instruction is assumed to start with a clean slate. */
10487 else if (is_conditional_branch (idesc
)
10488 && CURR_SLOT
.qp_regno
!= 0)
10490 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10492 for (i
= 0; i
< qp_implieslen
; i
++)
10494 /* If the conditional branch's predicate is implied by the predicate
10495 in an existing dependency, remove that dependency. */
10496 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10499 /* Note that this implied predicate takes a branch so that if
10500 a later insn generates a DV but its predicate implies this
10501 one, we can avoid the false DV warning. */
10502 qp_implies
[i
].p2_branched
= 1;
10503 while (depind
< regdepslen
)
10505 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10507 print_dependency ("Removing", depind
);
10508 regdeps
[depind
] = regdeps
[--regdepslen
];
10515 /* Any marked resources which have this same predicate should be
10516 cleared, provided that the QP hasn't been modified between the
10517 marking instruction and the branch. */
10520 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10525 while (i
< regdepslen
)
10527 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10528 && regdeps
[i
].link_to_qp_branch
10529 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10530 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10532 /* Treat like a taken branch */
10533 print_dependency ("Removing", i
);
10534 regdeps
[i
] = regdeps
[--regdepslen
];
10543 /* Examine the current instruction for dependency violations. */
10547 struct ia64_opcode
*idesc
;
10551 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10552 idesc
->name
, CURR_SLOT
.src_line
,
10553 idesc
->dependencies
->nchks
,
10554 idesc
->dependencies
->nregs
);
10557 /* Look through the list of currently marked resources; if the current
10558 instruction has the dependency in its chks list which uses that resource,
10559 check against the specific resources used. */
10560 check_dependencies (idesc
);
10562 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10563 then add them to the list of marked resources. */
10564 mark_resources (idesc
);
10566 /* There are several types of dependency semantics, and each has its own
10567 requirements for being cleared
10569 Instruction serialization (insns separated by interruption, rfi, or
10570 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10572 Data serialization (instruction serialization, or writer + srlz.d +
10573 reader, where writer and srlz.d are in separate groups) clears
10574 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10575 always be the case).
10577 Instruction group break (groups separated by stop, taken branch,
10578 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10580 update_dependencies (idesc
);
10582 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10583 warning. Keep track of as many as possible that are useful. */
10584 note_register_values (idesc
);
10586 /* We don't need or want this anymore. */
10587 md
.mem_offset
.hint
= 0;
10592 /* Translate one line of assembly. Pseudo ops and labels do not show
10598 char *saved_input_line_pointer
, *mnemonic
;
10599 const struct pseudo_opcode
*pdesc
;
10600 struct ia64_opcode
*idesc
;
10601 unsigned char qp_regno
;
10602 unsigned int flags
;
10605 saved_input_line_pointer
= input_line_pointer
;
10606 input_line_pointer
= str
;
10608 /* extract the opcode (mnemonic): */
10610 mnemonic
= input_line_pointer
;
10611 ch
= get_symbol_end ();
10612 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10615 *input_line_pointer
= ch
;
10616 (*pdesc
->handler
) (pdesc
->arg
);
10620 /* Find the instruction descriptor matching the arguments. */
10622 idesc
= ia64_find_opcode (mnemonic
);
10623 *input_line_pointer
= ch
;
10626 as_bad ("Unknown opcode `%s'", mnemonic
);
10630 idesc
= parse_operands (idesc
);
10634 /* Handle the dynamic ops we can handle now: */
10635 if (idesc
->type
== IA64_TYPE_DYN
)
10637 if (strcmp (idesc
->name
, "add") == 0)
10639 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10640 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10644 ia64_free_opcode (idesc
);
10645 idesc
= ia64_find_opcode (mnemonic
);
10647 else if (strcmp (idesc
->name
, "mov") == 0)
10649 enum ia64_opnd opnd1
, opnd2
;
10652 opnd1
= idesc
->operands
[0];
10653 opnd2
= idesc
->operands
[1];
10654 if (opnd1
== IA64_OPND_AR3
)
10656 else if (opnd2
== IA64_OPND_AR3
)
10660 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10662 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10663 mnemonic
= "mov.i";
10664 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10665 mnemonic
= "mov.m";
10673 ia64_free_opcode (idesc
);
10674 idesc
= ia64_find_opcode (mnemonic
);
10675 while (idesc
!= NULL
10676 && (idesc
->operands
[0] != opnd1
10677 || idesc
->operands
[1] != opnd2
))
10678 idesc
= get_next_opcode (idesc
);
10682 else if (strcmp (idesc
->name
, "mov.i") == 0
10683 || strcmp (idesc
->name
, "mov.m") == 0)
10685 enum ia64_opnd opnd1
, opnd2
;
10688 opnd1
= idesc
->operands
[0];
10689 opnd2
= idesc
->operands
[1];
10690 if (opnd1
== IA64_OPND_AR3
)
10692 else if (opnd2
== IA64_OPND_AR3
)
10696 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10699 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10701 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10703 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10704 as_bad ("AR %d can only be accessed by %c-unit",
10705 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10709 else if (strcmp (idesc
->name
, "hint.b") == 0)
10715 case hint_b_warning
:
10716 as_warn ("hint.b may be treated as nop");
10719 as_bad ("hint.b shouldn't be used");
10725 if (md
.qp
.X_op
== O_register
)
10727 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10728 md
.qp
.X_op
= O_absent
;
10731 flags
= idesc
->flags
;
10733 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10735 /* The alignment frag has to end with a stop bit only if the
10736 next instruction after the alignment directive has to be
10737 the first instruction in an instruction group. */
10740 while (align_frag
->fr_type
!= rs_align_code
)
10742 align_frag
= align_frag
->fr_next
;
10746 /* align_frag can be NULL if there are directives in
10748 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10749 align_frag
->tc_frag_data
= 1;
10752 insn_group_break (1, 0, 0);
10756 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10758 as_bad ("`%s' cannot be predicated", idesc
->name
);
10762 /* Build the instruction. */
10763 CURR_SLOT
.qp_regno
= qp_regno
;
10764 CURR_SLOT
.idesc
= idesc
;
10765 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10766 dwarf2_where (&CURR_SLOT
.debug_line
);
10768 /* Add unwind entry, if there is one. */
10769 if (unwind
.current_entry
)
10771 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10772 unwind
.current_entry
= NULL
;
10774 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10777 /* Check for dependency violations. */
10781 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10782 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10783 emit_one_bundle ();
10785 if ((flags
& IA64_OPCODE_LAST
) != 0)
10786 insn_group_break (1, 0, 0);
10788 md
.last_text_seg
= now_seg
;
10791 input_line_pointer
= saved_input_line_pointer
;
10794 /* Called when symbol NAME cannot be found in the symbol table.
10795 Should be used for dynamic valued symbols only. */
10798 md_undefined_symbol (name
)
10799 char *name ATTRIBUTE_UNUSED
;
10804 /* Called for any expression that can not be recognized. When the
10805 function is called, `input_line_pointer' will point to the start of
10812 switch (*input_line_pointer
)
10815 ++input_line_pointer
;
10817 if (*input_line_pointer
!= ']')
10819 as_bad ("Closing bracket missing");
10824 if (e
->X_op
!= O_register
)
10825 as_bad ("Register expected as index");
10827 ++input_line_pointer
;
10838 ignore_rest_of_line ();
10841 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10842 a section symbol plus some offset. For relocs involving @fptr(),
10843 directives we don't want such adjustments since we need to have the
10844 original symbol's name in the reloc. */
10846 ia64_fix_adjustable (fix
)
10849 /* Prevent all adjustments to global symbols */
10850 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10853 switch (fix
->fx_r_type
)
10855 case BFD_RELOC_IA64_FPTR64I
:
10856 case BFD_RELOC_IA64_FPTR32MSB
:
10857 case BFD_RELOC_IA64_FPTR32LSB
:
10858 case BFD_RELOC_IA64_FPTR64MSB
:
10859 case BFD_RELOC_IA64_FPTR64LSB
:
10860 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10861 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10871 ia64_force_relocation (fix
)
10874 switch (fix
->fx_r_type
)
10876 case BFD_RELOC_IA64_FPTR64I
:
10877 case BFD_RELOC_IA64_FPTR32MSB
:
10878 case BFD_RELOC_IA64_FPTR32LSB
:
10879 case BFD_RELOC_IA64_FPTR64MSB
:
10880 case BFD_RELOC_IA64_FPTR64LSB
:
10882 case BFD_RELOC_IA64_LTOFF22
:
10883 case BFD_RELOC_IA64_LTOFF64I
:
10884 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10885 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10886 case BFD_RELOC_IA64_PLTOFF22
:
10887 case BFD_RELOC_IA64_PLTOFF64I
:
10888 case BFD_RELOC_IA64_PLTOFF64MSB
:
10889 case BFD_RELOC_IA64_PLTOFF64LSB
:
10891 case BFD_RELOC_IA64_LTOFF22X
:
10892 case BFD_RELOC_IA64_LDXMOV
:
10899 return generic_force_reloc (fix
);
10902 /* Decide from what point a pc-relative relocation is relative to,
10903 relative to the pc-relative fixup. Er, relatively speaking. */
10905 ia64_pcrel_from_section (fix
, sec
)
10909 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10911 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10918 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10920 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10924 expr
.X_op
= O_pseudo_fixup
;
10925 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10926 expr
.X_add_number
= 0;
10927 expr
.X_add_symbol
= symbol
;
10928 emit_expr (&expr
, size
);
10931 /* This is called whenever some data item (not an instruction) needs a
10932 fixup. We pick the right reloc code depending on the byteorder
10933 currently in effect. */
10935 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10941 bfd_reloc_code_real_type code
;
10946 /* There are no reloc for 8 and 16 bit quantities, but we allow
10947 them here since they will work fine as long as the expression
10948 is fully defined at the end of the pass over the source file. */
10949 case 1: code
= BFD_RELOC_8
; break;
10950 case 2: code
= BFD_RELOC_16
; break;
10952 if (target_big_endian
)
10953 code
= BFD_RELOC_IA64_DIR32MSB
;
10955 code
= BFD_RELOC_IA64_DIR32LSB
;
10959 /* In 32-bit mode, data8 could mean function descriptors too. */
10960 if (exp
->X_op
== O_pseudo_fixup
10961 && exp
->X_op_symbol
10962 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10963 && !(md
.flags
& EF_IA_64_ABI64
))
10965 if (target_big_endian
)
10966 code
= BFD_RELOC_IA64_IPLTMSB
;
10968 code
= BFD_RELOC_IA64_IPLTLSB
;
10969 exp
->X_op
= O_symbol
;
10974 if (target_big_endian
)
10975 code
= BFD_RELOC_IA64_DIR64MSB
;
10977 code
= BFD_RELOC_IA64_DIR64LSB
;
10982 if (exp
->X_op
== O_pseudo_fixup
10983 && exp
->X_op_symbol
10984 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10986 if (target_big_endian
)
10987 code
= BFD_RELOC_IA64_IPLTMSB
;
10989 code
= BFD_RELOC_IA64_IPLTLSB
;
10990 exp
->X_op
= O_symbol
;
10996 as_bad ("Unsupported fixup size %d", nbytes
);
10997 ignore_rest_of_line ();
11001 if (exp
->X_op
== O_pseudo_fixup
)
11003 exp
->X_op
= O_symbol
;
11004 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11005 /* ??? If code unchanged, unsupported. */
11008 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11009 /* We need to store the byte order in effect in case we're going
11010 to fix an 8 or 16 bit relocation (for which there no real
11011 relocs available). See md_apply_fix3(). */
11012 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11015 /* Return the actual relocation we wish to associate with the pseudo
11016 reloc described by SYM and R_TYPE. SYM should be one of the
11017 symbols in the pseudo_func array, or NULL. */
11019 static bfd_reloc_code_real_type
11020 ia64_gen_real_reloc_type (sym
, r_type
)
11021 struct symbol
*sym
;
11022 bfd_reloc_code_real_type r_type
;
11024 bfd_reloc_code_real_type
new = 0;
11025 const char *type
= NULL
, *suffix
= "";
11032 switch (S_GET_VALUE (sym
))
11034 case FUNC_FPTR_RELATIVE
:
11037 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11038 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11039 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11040 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11041 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11042 default: type
= "FPTR"; break;
11046 case FUNC_GP_RELATIVE
:
11049 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11050 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11051 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11052 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11053 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11054 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11055 default: type
= "GPREL"; break;
11059 case FUNC_LT_RELATIVE
:
11062 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11063 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11064 default: type
= "LTOFF"; break;
11068 case FUNC_LT_RELATIVE_X
:
11071 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11072 default: type
= "LTOFF"; suffix
= "X"; break;
11076 case FUNC_PC_RELATIVE
:
11079 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11080 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11081 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11082 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11083 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11084 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11085 default: type
= "PCREL"; break;
11089 case FUNC_PLT_RELATIVE
:
11092 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11093 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11094 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11095 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11096 default: type
= "PLTOFF"; break;
11100 case FUNC_SEC_RELATIVE
:
11103 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11104 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11105 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11106 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11107 default: type
= "SECREL"; break;
11111 case FUNC_SEG_RELATIVE
:
11114 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11115 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11116 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11117 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11118 default: type
= "SEGREL"; break;
11122 case FUNC_LTV_RELATIVE
:
11125 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11126 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11127 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11128 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11129 default: type
= "LTV"; break;
11133 case FUNC_LT_FPTR_RELATIVE
:
11136 case BFD_RELOC_IA64_IMM22
:
11137 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11138 case BFD_RELOC_IA64_IMM64
:
11139 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11140 case BFD_RELOC_IA64_DIR32MSB
:
11141 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11142 case BFD_RELOC_IA64_DIR32LSB
:
11143 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11144 case BFD_RELOC_IA64_DIR64MSB
:
11145 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11146 case BFD_RELOC_IA64_DIR64LSB
:
11147 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11149 type
= "LTOFF_FPTR"; break;
11153 case FUNC_TP_RELATIVE
:
11156 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11157 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11158 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11159 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11160 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11161 default: type
= "TPREL"; break;
11165 case FUNC_LT_TP_RELATIVE
:
11168 case BFD_RELOC_IA64_IMM22
:
11169 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11171 type
= "LTOFF_TPREL"; break;
11175 case FUNC_DTP_MODULE
:
11178 case BFD_RELOC_IA64_DIR64MSB
:
11179 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11180 case BFD_RELOC_IA64_DIR64LSB
:
11181 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11183 type
= "DTPMOD"; break;
11187 case FUNC_LT_DTP_MODULE
:
11190 case BFD_RELOC_IA64_IMM22
:
11191 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11193 type
= "LTOFF_DTPMOD"; break;
11197 case FUNC_DTP_RELATIVE
:
11200 case BFD_RELOC_IA64_DIR32MSB
:
11201 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11202 case BFD_RELOC_IA64_DIR32LSB
:
11203 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11204 case BFD_RELOC_IA64_DIR64MSB
:
11205 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11206 case BFD_RELOC_IA64_DIR64LSB
:
11207 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11208 case BFD_RELOC_IA64_IMM14
:
11209 new = BFD_RELOC_IA64_DTPREL14
; break;
11210 case BFD_RELOC_IA64_IMM22
:
11211 new = BFD_RELOC_IA64_DTPREL22
; break;
11212 case BFD_RELOC_IA64_IMM64
:
11213 new = BFD_RELOC_IA64_DTPREL64I
; break;
11215 type
= "DTPREL"; break;
11219 case FUNC_LT_DTP_RELATIVE
:
11222 case BFD_RELOC_IA64_IMM22
:
11223 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11225 type
= "LTOFF_DTPREL"; break;
11229 case FUNC_IPLT_RELOC
:
11232 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11233 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11234 default: type
= "IPLT"; break;
11252 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11253 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11254 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11255 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11256 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11257 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11258 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11262 /* This should be an error, but since previously there wasn't any
11263 diagnostic here, dont't make it fail because of this for now. */
11264 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11269 /* Here is where generate the appropriate reloc for pseudo relocation
11272 ia64_validate_fix (fix
)
11275 switch (fix
->fx_r_type
)
11277 case BFD_RELOC_IA64_FPTR64I
:
11278 case BFD_RELOC_IA64_FPTR32MSB
:
11279 case BFD_RELOC_IA64_FPTR64LSB
:
11280 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11281 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11282 if (fix
->fx_offset
!= 0)
11283 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11284 "No addend allowed in @fptr() relocation");
11292 fix_insn (fix
, odesc
, value
)
11294 const struct ia64_operand
*odesc
;
11297 bfd_vma insn
[3], t0
, t1
, control_bits
;
11302 slot
= fix
->fx_where
& 0x3;
11303 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11305 /* Bundles are always in little-endian byte order */
11306 t0
= bfd_getl64 (fixpos
);
11307 t1
= bfd_getl64 (fixpos
+ 8);
11308 control_bits
= t0
& 0x1f;
11309 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11310 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11311 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11314 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11316 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11317 insn
[2] |= (((value
& 0x7f) << 13)
11318 | (((value
>> 7) & 0x1ff) << 27)
11319 | (((value
>> 16) & 0x1f) << 22)
11320 | (((value
>> 21) & 0x1) << 21)
11321 | (((value
>> 63) & 0x1) << 36));
11323 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11325 if (value
& ~0x3fffffffffffffffULL
)
11326 err
= "integer operand out of range";
11327 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11328 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11330 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11333 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11334 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11335 | (((value
>> 0) & 0xfffff) << 13));
11338 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11341 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11343 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11344 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11345 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11346 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11349 /* Attempt to simplify or even eliminate a fixup. The return value is
11350 ignored; perhaps it was once meaningful, but now it is historical.
11351 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11353 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11357 md_apply_fix3 (fix
, valP
, seg
)
11360 segT seg ATTRIBUTE_UNUSED
;
11363 valueT value
= *valP
;
11365 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11369 switch (fix
->fx_r_type
)
11371 case BFD_RELOC_IA64_PCREL21B
: break;
11372 case BFD_RELOC_IA64_PCREL21BI
: break;
11373 case BFD_RELOC_IA64_PCREL21F
: break;
11374 case BFD_RELOC_IA64_PCREL21M
: break;
11375 case BFD_RELOC_IA64_PCREL60B
: break;
11376 case BFD_RELOC_IA64_PCREL22
: break;
11377 case BFD_RELOC_IA64_PCREL64I
: break;
11378 case BFD_RELOC_IA64_PCREL32MSB
: break;
11379 case BFD_RELOC_IA64_PCREL32LSB
: break;
11380 case BFD_RELOC_IA64_PCREL64MSB
: break;
11381 case BFD_RELOC_IA64_PCREL64LSB
: break;
11383 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11390 switch (fix
->fx_r_type
)
11392 case BFD_RELOC_UNUSED
:
11393 /* This must be a TAG13 or TAG13b operand. There are no external
11394 relocs defined for them, so we must give an error. */
11395 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11396 "%s must have a constant value",
11397 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11401 case BFD_RELOC_IA64_TPREL14
:
11402 case BFD_RELOC_IA64_TPREL22
:
11403 case BFD_RELOC_IA64_TPREL64I
:
11404 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11405 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11406 case BFD_RELOC_IA64_DTPREL14
:
11407 case BFD_RELOC_IA64_DTPREL22
:
11408 case BFD_RELOC_IA64_DTPREL64I
:
11409 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11410 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11417 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11419 if (fix
->tc_fix_data
.bigendian
)
11420 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11422 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11427 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11432 /* Generate the BFD reloc to be stuck in the object file from the
11433 fixup used internally in the assembler. */
11436 tc_gen_reloc (sec
, fixp
)
11437 asection
*sec ATTRIBUTE_UNUSED
;
11442 reloc
= xmalloc (sizeof (*reloc
));
11443 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11444 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11445 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11446 reloc
->addend
= fixp
->fx_offset
;
11447 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11451 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11452 "Cannot represent %s relocation in object file",
11453 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11458 /* Turn a string in input_line_pointer into a floating point constant
11459 of type TYPE, and store the appropriate bytes in *LIT. The number
11460 of LITTLENUMS emitted is stored in *SIZE. An error message is
11461 returned, or NULL on OK. */
11463 #define MAX_LITTLENUMS 5
11466 md_atof (type
, lit
, size
)
11471 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11501 return "Bad call to MD_ATOF()";
11503 t
= atof_ieee (input_line_pointer
, type
, words
);
11505 input_line_pointer
= t
;
11507 (*ia64_float_to_chars
) (lit
, words
, prec
);
11511 /* It is 10 byte floating point with 6 byte padding. */
11512 memset (&lit
[10], 0, 6);
11513 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11516 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11521 /* Handle ia64 specific semantics of the align directive. */
11524 ia64_md_do_align (n
, fill
, len
, max
)
11525 int n ATTRIBUTE_UNUSED
;
11526 const char *fill ATTRIBUTE_UNUSED
;
11527 int len ATTRIBUTE_UNUSED
;
11528 int max ATTRIBUTE_UNUSED
;
11530 if (subseg_text_p (now_seg
))
11531 ia64_flush_insns ();
11534 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11535 of an rs_align_code fragment. */
11538 ia64_handle_align (fragp
)
11543 const unsigned char *nop
;
11545 if (fragp
->fr_type
!= rs_align_code
)
11548 /* Check if this frag has to end with a stop bit. */
11549 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11551 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11552 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11554 /* If no paddings are needed, we check if we need a stop bit. */
11555 if (!bytes
&& fragp
->tc_frag_data
)
11557 if (fragp
->fr_fix
< 16)
11559 /* FIXME: It won't work with
11561 alloc r32=ar.pfs,1,2,4,0
11565 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11566 _("Can't add stop bit to mark end of instruction group"));
11569 /* Bundles are always in little-endian byte order. Make sure
11570 the previous bundle has the stop bit. */
11574 /* Make sure we are on a 16-byte boundary, in case someone has been
11575 putting data into a text section. */
11578 int fix
= bytes
& 15;
11579 memset (p
, 0, fix
);
11582 fragp
->fr_fix
+= fix
;
11585 /* Instruction bundles are always little-endian. */
11586 memcpy (p
, nop
, 16);
11587 fragp
->fr_var
= 16;
11591 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11596 number_to_chars_bigendian (lit
, (long) (*words
++),
11597 sizeof (LITTLENUM_TYPE
));
11598 lit
+= sizeof (LITTLENUM_TYPE
);
11603 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11608 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11609 sizeof (LITTLENUM_TYPE
));
11610 lit
+= sizeof (LITTLENUM_TYPE
);
11615 ia64_elf_section_change_hook (void)
11617 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11618 && elf_linked_to_section (now_seg
) == NULL
)
11619 elf_linked_to_section (now_seg
) = text_section
;
11620 dot_byteorder (-1);
11623 /* Check if a label should be made global. */
11625 ia64_check_label (symbolS
*label
)
11627 if (*input_line_pointer
== ':')
11629 S_SET_EXTERNAL (label
);
11630 input_line_pointer
++;
11634 /* Used to remember where .alias and .secalias directives are seen. We
11635 will rename symbol and section names when we are about to output
11636 the relocatable file. */
11639 char *file
; /* The file where the directive is seen. */
11640 unsigned int line
; /* The line number the directive is at. */
11641 const char *name
; /* The orignale name of the symbol. */
11644 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11645 .secalias. Otherwise, it is .alias. */
11647 dot_alias (int section
)
11649 char *name
, *alias
;
11653 const char *error_string
;
11656 struct hash_control
*ahash
, *nhash
;
11659 name
= input_line_pointer
;
11660 delim
= get_symbol_end ();
11661 end_name
= input_line_pointer
;
11664 if (name
== end_name
)
11666 as_bad (_("expected symbol name"));
11667 discard_rest_of_line ();
11671 SKIP_WHITESPACE ();
11673 if (*input_line_pointer
!= ',')
11676 as_bad (_("expected comma after \"%s\""), name
);
11678 ignore_rest_of_line ();
11682 input_line_pointer
++;
11684 ia64_canonicalize_symbol_name (name
);
11686 /* We call demand_copy_C_string to check if alias string is valid.
11687 There should be a closing `"' and no `\0' in the string. */
11688 alias
= demand_copy_C_string (&len
);
11691 ignore_rest_of_line ();
11695 /* Make a copy of name string. */
11696 len
= strlen (name
) + 1;
11697 obstack_grow (¬es
, name
, len
);
11698 name
= obstack_finish (¬es
);
11703 ahash
= secalias_hash
;
11704 nhash
= secalias_name_hash
;
11709 ahash
= alias_hash
;
11710 nhash
= alias_name_hash
;
11713 /* Check if alias has been used before. */
11714 h
= (struct alias
*) hash_find (ahash
, alias
);
11717 if (strcmp (h
->name
, name
))
11718 as_bad (_("`%s' is already the alias of %s `%s'"),
11719 alias
, kind
, h
->name
);
11723 /* Check if name already has an alias. */
11724 a
= (const char *) hash_find (nhash
, name
);
11727 if (strcmp (a
, alias
))
11728 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11732 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11733 as_where (&h
->file
, &h
->line
);
11736 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11739 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11740 alias
, kind
, error_string
);
11744 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11747 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11748 alias
, kind
, error_string
);
11750 obstack_free (¬es
, name
);
11751 obstack_free (¬es
, alias
);
11754 demand_empty_rest_of_line ();
11757 /* It renames the original symbol name to its alias. */
11759 do_alias (const char *alias
, PTR value
)
11761 struct alias
*h
= (struct alias
*) value
;
11762 symbolS
*sym
= symbol_find (h
->name
);
11765 as_warn_where (h
->file
, h
->line
,
11766 _("symbol `%s' aliased to `%s' is not used"),
11769 S_SET_NAME (sym
, (char *) alias
);
11772 /* Called from write_object_file. */
11774 ia64_adjust_symtab (void)
11776 hash_traverse (alias_hash
, do_alias
);
11779 /* It renames the original section name to its alias. */
11781 do_secalias (const char *alias
, PTR value
)
11783 struct alias
*h
= (struct alias
*) value
;
11784 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11787 as_warn_where (h
->file
, h
->line
,
11788 _("section `%s' aliased to `%s' is not used"),
11794 /* Called from write_object_file. */
11796 ia64_frob_file (void)
11798 hash_traverse (secalias_hash
, do_secalias
);