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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2014 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
27
28 #ifdef OBJ_ELF
29 #include "elf/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 #ifdef OBJ_XCOFF
39 #include "coff/xcoff.h"
40 #include "libxcoff.h"
41 #endif
42
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
47
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
50
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
53 #ifdef TE_PE
54 #define TARGET_REG_NAMES_P TRUE
55 #else
56 #define TARGET_REG_NAMES_P FALSE
57 #endif
58 #endif
59
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
65
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
73
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
76
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
80
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
83
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
87
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
93
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
95
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
98
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
102 #endif
103
104 #ifdef OBJ_XCOFF
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
129 #endif
130
131 #ifdef OBJ_ELF
132 static void ppc_elf_cons (int);
133 static void ppc_elf_rdata (int);
134 static void ppc_elf_lcomm (int);
135 static void ppc_elf_localentry (int);
136 static void ppc_elf_abiversion (int);
137 #endif
138
139 #ifdef TE_PE
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
151 #endif
152 \f
153 /* Generic assembler global variables which must be defined by all
154 targets. */
155
156 #ifdef OBJ_ELF
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars[] = "#!";
162 static const char ppc_eabi_comment_chars[] = "#";
163
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars = ppc_solaris_comment_chars;
166 #else
167 const char *ppc_comment_chars = ppc_eabi_comment_chars;
168 #endif
169 #else
170 const char comment_chars[] = "#";
171 #endif
172
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars[] = "#";
175
176 /* Characters which may be used to separate multiple commands on a
177 single line. */
178 const char line_separator_chars[] = ";";
179
180 /* Characters which are used to indicate an exponent in a floating
181 point number. */
182 const char EXP_CHARS[] = "eE";
183
184 /* Characters which mean that a number is a floating point constant,
185 as in 0d1.0. */
186 const char FLT_CHARS[] = "dD";
187
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars[] = "%[";
191
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment;
194
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length;
197
198 /* More than this number of nops in an alignment op gets a branch
199 instead. */
200 unsigned long nop_limit = 4;
201
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu = 0;
205 ppc_cpu_t sticky = 0;
206
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion = 0;
209
210 /* Flags set on encountering toc relocs. */
211 enum {
212 has_large_toc_reloc = 1,
213 has_small_toc_reloc = 2
214 } toc_reloc_types;
215 \f
216 /* The target specific pseudo-ops which we support. */
217
218 const pseudo_typeS md_pseudo_table[] =
219 {
220 /* Pseudo-ops which must be overridden. */
221 { "byte", ppc_byte, 0 },
222
223 #ifdef OBJ_XCOFF
224 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
225 legitimately belong in the obj-*.c file. However, XCOFF is based
226 on COFF, and is only implemented for the RS/6000. We just use
227 obj-coff.c, and add what we need here. */
228 { "comm", ppc_comm, 0 },
229 { "lcomm", ppc_comm, 1 },
230 { "bb", ppc_bb, 0 },
231 { "bc", ppc_bc, 0 },
232 { "bf", ppc_bf, 0 },
233 { "bi", ppc_biei, 0 },
234 { "bs", ppc_bs, 0 },
235 { "csect", ppc_csect, 0 },
236 { "dwsect", ppc_dwsect, 0 },
237 { "data", ppc_section, 'd' },
238 { "eb", ppc_eb, 0 },
239 { "ec", ppc_ec, 0 },
240 { "ef", ppc_ef, 0 },
241 { "ei", ppc_biei, 1 },
242 { "es", ppc_es, 0 },
243 { "extern", ppc_extern, 0 },
244 { "function", ppc_function, 0 },
245 { "lglobl", ppc_lglobl, 0 },
246 { "ref", ppc_ref, 0 },
247 { "rename", ppc_rename, 0 },
248 { "section", ppc_named_section, 0 },
249 { "stabx", ppc_stabx, 0 },
250 { "text", ppc_section, 't' },
251 { "toc", ppc_toc, 0 },
252 { "long", ppc_xcoff_cons, 2 },
253 { "llong", ppc_xcoff_cons, 3 },
254 { "word", ppc_xcoff_cons, 1 },
255 { "short", ppc_xcoff_cons, 1 },
256 { "vbyte", ppc_vbyte, 0 },
257 #endif
258
259 #ifdef OBJ_ELF
260 { "llong", ppc_elf_cons, 8 },
261 { "quad", ppc_elf_cons, 8 },
262 { "long", ppc_elf_cons, 4 },
263 { "word", ppc_elf_cons, 2 },
264 { "short", ppc_elf_cons, 2 },
265 { "rdata", ppc_elf_rdata, 0 },
266 { "rodata", ppc_elf_rdata, 0 },
267 { "lcomm", ppc_elf_lcomm, 0 },
268 { "localentry", ppc_elf_localentry, 0 },
269 { "abiversion", ppc_elf_abiversion, 0 },
270 #endif
271
272 #ifdef TE_PE
273 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
274 { "previous", ppc_previous, 0 },
275 { "pdata", ppc_pdata, 0 },
276 { "ydata", ppc_ydata, 0 },
277 { "reldata", ppc_reldata, 0 },
278 { "rdata", ppc_rdata, 0 },
279 { "ualong", ppc_ualong, 0 },
280 { "znop", ppc_znop, 0 },
281 { "comm", ppc_pe_comm, 0 },
282 { "lcomm", ppc_pe_comm, 1 },
283 { "section", ppc_pe_section, 0 },
284 { "function", ppc_pe_function,0 },
285 { "tocd", ppc_pe_tocd, 0 },
286 #endif
287
288 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
289 { "tc", ppc_tc, 0 },
290 { "machine", ppc_machine, 0 },
291 #endif
292
293 { NULL, NULL, 0 }
294 };
295
296 \f
297 /* Predefined register names if -mregnames (or default for Windows NT).
298 In general, there are lots of them, in an attempt to be compatible
299 with a number of other Windows NT assemblers. */
300
301 /* Structure to hold information about predefined registers. */
302 struct pd_reg
303 {
304 char *name;
305 int value;
306 };
307
308 /* List of registers that are pre-defined:
309
310 Each general register has predefined names of the form:
311 1. r<reg_num> which has the value <reg_num>.
312 2. r.<reg_num> which has the value <reg_num>.
313
314 Each floating point register has predefined names of the form:
315 1. f<reg_num> which has the value <reg_num>.
316 2. f.<reg_num> which has the value <reg_num>.
317
318 Each vector unit register has predefined names of the form:
319 1. v<reg_num> which has the value <reg_num>.
320 2. v.<reg_num> which has the value <reg_num>.
321
322 Each condition register has predefined names of the form:
323 1. cr<reg_num> which has the value <reg_num>.
324 2. cr.<reg_num> which has the value <reg_num>.
325
326 There are individual registers as well:
327 sp or r.sp has the value 1
328 rtoc or r.toc has the value 2
329 fpscr has the value 0
330 xer has the value 1
331 lr has the value 8
332 ctr has the value 9
333 pmr has the value 0
334 dar has the value 19
335 dsisr has the value 18
336 dec has the value 22
337 sdr1 has the value 25
338 srr0 has the value 26
339 srr1 has the value 27
340
341 The table is sorted. Suitable for searching by a binary search. */
342
343 static const struct pd_reg pre_defined_registers[] =
344 {
345 { "cr.0", 0 }, /* Condition Registers */
346 { "cr.1", 1 },
347 { "cr.2", 2 },
348 { "cr.3", 3 },
349 { "cr.4", 4 },
350 { "cr.5", 5 },
351 { "cr.6", 6 },
352 { "cr.7", 7 },
353
354 { "cr0", 0 },
355 { "cr1", 1 },
356 { "cr2", 2 },
357 { "cr3", 3 },
358 { "cr4", 4 },
359 { "cr5", 5 },
360 { "cr6", 6 },
361 { "cr7", 7 },
362
363 { "ctr", 9 },
364
365 { "dar", 19 }, /* Data Access Register */
366 { "dec", 22 }, /* Decrementer */
367 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
368
369 { "f.0", 0 }, /* Floating point registers */
370 { "f.1", 1 },
371 { "f.10", 10 },
372 { "f.11", 11 },
373 { "f.12", 12 },
374 { "f.13", 13 },
375 { "f.14", 14 },
376 { "f.15", 15 },
377 { "f.16", 16 },
378 { "f.17", 17 },
379 { "f.18", 18 },
380 { "f.19", 19 },
381 { "f.2", 2 },
382 { "f.20", 20 },
383 { "f.21", 21 },
384 { "f.22", 22 },
385 { "f.23", 23 },
386 { "f.24", 24 },
387 { "f.25", 25 },
388 { "f.26", 26 },
389 { "f.27", 27 },
390 { "f.28", 28 },
391 { "f.29", 29 },
392 { "f.3", 3 },
393 { "f.30", 30 },
394 { "f.31", 31 },
395
396 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
397 { "f.33", 33 },
398 { "f.34", 34 },
399 { "f.35", 35 },
400 { "f.36", 36 },
401 { "f.37", 37 },
402 { "f.38", 38 },
403 { "f.39", 39 },
404 { "f.4", 4 },
405 { "f.40", 40 },
406 { "f.41", 41 },
407 { "f.42", 42 },
408 { "f.43", 43 },
409 { "f.44", 44 },
410 { "f.45", 45 },
411 { "f.46", 46 },
412 { "f.47", 47 },
413 { "f.48", 48 },
414 { "f.49", 49 },
415 { "f.5", 5 },
416 { "f.50", 50 },
417 { "f.51", 51 },
418 { "f.52", 52 },
419 { "f.53", 53 },
420 { "f.54", 54 },
421 { "f.55", 55 },
422 { "f.56", 56 },
423 { "f.57", 57 },
424 { "f.58", 58 },
425 { "f.59", 59 },
426 { "f.6", 6 },
427 { "f.60", 60 },
428 { "f.61", 61 },
429 { "f.62", 62 },
430 { "f.63", 63 },
431 { "f.7", 7 },
432 { "f.8", 8 },
433 { "f.9", 9 },
434
435 { "f0", 0 },
436 { "f1", 1 },
437 { "f10", 10 },
438 { "f11", 11 },
439 { "f12", 12 },
440 { "f13", 13 },
441 { "f14", 14 },
442 { "f15", 15 },
443 { "f16", 16 },
444 { "f17", 17 },
445 { "f18", 18 },
446 { "f19", 19 },
447 { "f2", 2 },
448 { "f20", 20 },
449 { "f21", 21 },
450 { "f22", 22 },
451 { "f23", 23 },
452 { "f24", 24 },
453 { "f25", 25 },
454 { "f26", 26 },
455 { "f27", 27 },
456 { "f28", 28 },
457 { "f29", 29 },
458 { "f3", 3 },
459 { "f30", 30 },
460 { "f31", 31 },
461
462 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
463 { "f33", 33 },
464 { "f34", 34 },
465 { "f35", 35 },
466 { "f36", 36 },
467 { "f37", 37 },
468 { "f38", 38 },
469 { "f39", 39 },
470 { "f4", 4 },
471 { "f40", 40 },
472 { "f41", 41 },
473 { "f42", 42 },
474 { "f43", 43 },
475 { "f44", 44 },
476 { "f45", 45 },
477 { "f46", 46 },
478 { "f47", 47 },
479 { "f48", 48 },
480 { "f49", 49 },
481 { "f5", 5 },
482 { "f50", 50 },
483 { "f51", 51 },
484 { "f52", 52 },
485 { "f53", 53 },
486 { "f54", 54 },
487 { "f55", 55 },
488 { "f56", 56 },
489 { "f57", 57 },
490 { "f58", 58 },
491 { "f59", 59 },
492 { "f6", 6 },
493 { "f60", 60 },
494 { "f61", 61 },
495 { "f62", 62 },
496 { "f63", 63 },
497 { "f7", 7 },
498 { "f8", 8 },
499 { "f9", 9 },
500
501 { "fpscr", 0 },
502
503 /* Quantization registers used with pair single instructions. */
504 { "gqr.0", 0 },
505 { "gqr.1", 1 },
506 { "gqr.2", 2 },
507 { "gqr.3", 3 },
508 { "gqr.4", 4 },
509 { "gqr.5", 5 },
510 { "gqr.6", 6 },
511 { "gqr.7", 7 },
512 { "gqr0", 0 },
513 { "gqr1", 1 },
514 { "gqr2", 2 },
515 { "gqr3", 3 },
516 { "gqr4", 4 },
517 { "gqr5", 5 },
518 { "gqr6", 6 },
519 { "gqr7", 7 },
520
521 { "lr", 8 }, /* Link Register */
522
523 { "pmr", 0 },
524
525 { "r.0", 0 }, /* General Purpose Registers */
526 { "r.1", 1 },
527 { "r.10", 10 },
528 { "r.11", 11 },
529 { "r.12", 12 },
530 { "r.13", 13 },
531 { "r.14", 14 },
532 { "r.15", 15 },
533 { "r.16", 16 },
534 { "r.17", 17 },
535 { "r.18", 18 },
536 { "r.19", 19 },
537 { "r.2", 2 },
538 { "r.20", 20 },
539 { "r.21", 21 },
540 { "r.22", 22 },
541 { "r.23", 23 },
542 { "r.24", 24 },
543 { "r.25", 25 },
544 { "r.26", 26 },
545 { "r.27", 27 },
546 { "r.28", 28 },
547 { "r.29", 29 },
548 { "r.3", 3 },
549 { "r.30", 30 },
550 { "r.31", 31 },
551 { "r.4", 4 },
552 { "r.5", 5 },
553 { "r.6", 6 },
554 { "r.7", 7 },
555 { "r.8", 8 },
556 { "r.9", 9 },
557
558 { "r.sp", 1 }, /* Stack Pointer */
559
560 { "r.toc", 2 }, /* Pointer to the table of contents */
561
562 { "r0", 0 }, /* More general purpose registers */
563 { "r1", 1 },
564 { "r10", 10 },
565 { "r11", 11 },
566 { "r12", 12 },
567 { "r13", 13 },
568 { "r14", 14 },
569 { "r15", 15 },
570 { "r16", 16 },
571 { "r17", 17 },
572 { "r18", 18 },
573 { "r19", 19 },
574 { "r2", 2 },
575 { "r20", 20 },
576 { "r21", 21 },
577 { "r22", 22 },
578 { "r23", 23 },
579 { "r24", 24 },
580 { "r25", 25 },
581 { "r26", 26 },
582 { "r27", 27 },
583 { "r28", 28 },
584 { "r29", 29 },
585 { "r3", 3 },
586 { "r30", 30 },
587 { "r31", 31 },
588 { "r4", 4 },
589 { "r5", 5 },
590 { "r6", 6 },
591 { "r7", 7 },
592 { "r8", 8 },
593 { "r9", 9 },
594
595 { "rtoc", 2 }, /* Table of contents */
596
597 { "sdr1", 25 }, /* Storage Description Register 1 */
598
599 { "sp", 1 },
600
601 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
602 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
603
604 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
605 { "v.1", 1 },
606 { "v.10", 10 },
607 { "v.11", 11 },
608 { "v.12", 12 },
609 { "v.13", 13 },
610 { "v.14", 14 },
611 { "v.15", 15 },
612 { "v.16", 16 },
613 { "v.17", 17 },
614 { "v.18", 18 },
615 { "v.19", 19 },
616 { "v.2", 2 },
617 { "v.20", 20 },
618 { "v.21", 21 },
619 { "v.22", 22 },
620 { "v.23", 23 },
621 { "v.24", 24 },
622 { "v.25", 25 },
623 { "v.26", 26 },
624 { "v.27", 27 },
625 { "v.28", 28 },
626 { "v.29", 29 },
627 { "v.3", 3 },
628 { "v.30", 30 },
629 { "v.31", 31 },
630 { "v.4", 4 },
631 { "v.5", 5 },
632 { "v.6", 6 },
633 { "v.7", 7 },
634 { "v.8", 8 },
635 { "v.9", 9 },
636
637 { "v0", 0 },
638 { "v1", 1 },
639 { "v10", 10 },
640 { "v11", 11 },
641 { "v12", 12 },
642 { "v13", 13 },
643 { "v14", 14 },
644 { "v15", 15 },
645 { "v16", 16 },
646 { "v17", 17 },
647 { "v18", 18 },
648 { "v19", 19 },
649 { "v2", 2 },
650 { "v20", 20 },
651 { "v21", 21 },
652 { "v22", 22 },
653 { "v23", 23 },
654 { "v24", 24 },
655 { "v25", 25 },
656 { "v26", 26 },
657 { "v27", 27 },
658 { "v28", 28 },
659 { "v29", 29 },
660 { "v3", 3 },
661 { "v30", 30 },
662 { "v31", 31 },
663 { "v4", 4 },
664 { "v5", 5 },
665 { "v6", 6 },
666 { "v7", 7 },
667 { "v8", 8 },
668 { "v9", 9 },
669
670 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
671 { "vs.1", 1 },
672 { "vs.10", 10 },
673 { "vs.11", 11 },
674 { "vs.12", 12 },
675 { "vs.13", 13 },
676 { "vs.14", 14 },
677 { "vs.15", 15 },
678 { "vs.16", 16 },
679 { "vs.17", 17 },
680 { "vs.18", 18 },
681 { "vs.19", 19 },
682 { "vs.2", 2 },
683 { "vs.20", 20 },
684 { "vs.21", 21 },
685 { "vs.22", 22 },
686 { "vs.23", 23 },
687 { "vs.24", 24 },
688 { "vs.25", 25 },
689 { "vs.26", 26 },
690 { "vs.27", 27 },
691 { "vs.28", 28 },
692 { "vs.29", 29 },
693 { "vs.3", 3 },
694 { "vs.30", 30 },
695 { "vs.31", 31 },
696 { "vs.32", 32 },
697 { "vs.33", 33 },
698 { "vs.34", 34 },
699 { "vs.35", 35 },
700 { "vs.36", 36 },
701 { "vs.37", 37 },
702 { "vs.38", 38 },
703 { "vs.39", 39 },
704 { "vs.4", 4 },
705 { "vs.40", 40 },
706 { "vs.41", 41 },
707 { "vs.42", 42 },
708 { "vs.43", 43 },
709 { "vs.44", 44 },
710 { "vs.45", 45 },
711 { "vs.46", 46 },
712 { "vs.47", 47 },
713 { "vs.48", 48 },
714 { "vs.49", 49 },
715 { "vs.5", 5 },
716 { "vs.50", 50 },
717 { "vs.51", 51 },
718 { "vs.52", 52 },
719 { "vs.53", 53 },
720 { "vs.54", 54 },
721 { "vs.55", 55 },
722 { "vs.56", 56 },
723 { "vs.57", 57 },
724 { "vs.58", 58 },
725 { "vs.59", 59 },
726 { "vs.6", 6 },
727 { "vs.60", 60 },
728 { "vs.61", 61 },
729 { "vs.62", 62 },
730 { "vs.63", 63 },
731 { "vs.7", 7 },
732 { "vs.8", 8 },
733 { "vs.9", 9 },
734
735 { "vs0", 0 },
736 { "vs1", 1 },
737 { "vs10", 10 },
738 { "vs11", 11 },
739 { "vs12", 12 },
740 { "vs13", 13 },
741 { "vs14", 14 },
742 { "vs15", 15 },
743 { "vs16", 16 },
744 { "vs17", 17 },
745 { "vs18", 18 },
746 { "vs19", 19 },
747 { "vs2", 2 },
748 { "vs20", 20 },
749 { "vs21", 21 },
750 { "vs22", 22 },
751 { "vs23", 23 },
752 { "vs24", 24 },
753 { "vs25", 25 },
754 { "vs26", 26 },
755 { "vs27", 27 },
756 { "vs28", 28 },
757 { "vs29", 29 },
758 { "vs3", 3 },
759 { "vs30", 30 },
760 { "vs31", 31 },
761 { "vs32", 32 },
762 { "vs33", 33 },
763 { "vs34", 34 },
764 { "vs35", 35 },
765 { "vs36", 36 },
766 { "vs37", 37 },
767 { "vs38", 38 },
768 { "vs39", 39 },
769 { "vs4", 4 },
770 { "vs40", 40 },
771 { "vs41", 41 },
772 { "vs42", 42 },
773 { "vs43", 43 },
774 { "vs44", 44 },
775 { "vs45", 45 },
776 { "vs46", 46 },
777 { "vs47", 47 },
778 { "vs48", 48 },
779 { "vs49", 49 },
780 { "vs5", 5 },
781 { "vs50", 50 },
782 { "vs51", 51 },
783 { "vs52", 52 },
784 { "vs53", 53 },
785 { "vs54", 54 },
786 { "vs55", 55 },
787 { "vs56", 56 },
788 { "vs57", 57 },
789 { "vs58", 58 },
790 { "vs59", 59 },
791 { "vs6", 6 },
792 { "vs60", 60 },
793 { "vs61", 61 },
794 { "vs62", 62 },
795 { "vs63", 63 },
796 { "vs7", 7 },
797 { "vs8", 8 },
798 { "vs9", 9 },
799
800 { "xer", 1 },
801
802 };
803
804 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
805
806 /* Given NAME, find the register number associated with that name, return
807 the integer value associated with the given name or -1 on failure. */
808
809 static int
810 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
811 {
812 int middle, low, high;
813 int cmp;
814
815 low = 0;
816 high = regcount - 1;
817
818 do
819 {
820 middle = (low + high) / 2;
821 cmp = strcasecmp (name, regs[middle].name);
822 if (cmp < 0)
823 high = middle - 1;
824 else if (cmp > 0)
825 low = middle + 1;
826 else
827 return regs[middle].value;
828 }
829 while (low <= high);
830
831 return -1;
832 }
833
834 /*
835 * Summary of register_name.
836 *
837 * in: Input_line_pointer points to 1st char of operand.
838 *
839 * out: A expressionS.
840 * The operand may have been a register: in this case, X_op == O_register,
841 * X_add_number is set to the register number, and truth is returned.
842 * Input_line_pointer->(next non-blank) char after operand, or is in its
843 * original state.
844 */
845
846 static bfd_boolean
847 register_name (expressionS *expressionP)
848 {
849 int reg_number;
850 char *name;
851 char *start;
852 char c;
853
854 /* Find the spelling of the operand. */
855 start = name = input_line_pointer;
856 if (name[0] == '%' && ISALPHA (name[1]))
857 name = ++input_line_pointer;
858
859 else if (!reg_names_p || !ISALPHA (name[0]))
860 return FALSE;
861
862 c = get_symbol_end ();
863 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
864
865 /* Put back the delimiting char. */
866 *input_line_pointer = c;
867
868 /* Look to see if it's in the register table. */
869 if (reg_number >= 0)
870 {
871 expressionP->X_op = O_register;
872 expressionP->X_add_number = reg_number;
873
874 /* Make the rest nice. */
875 expressionP->X_add_symbol = NULL;
876 expressionP->X_op_symbol = NULL;
877 return TRUE;
878 }
879
880 /* Reset the line as if we had not done anything. */
881 input_line_pointer = start;
882 return FALSE;
883 }
884 \f
885 /* This function is called for each symbol seen in an expression. It
886 handles the special parsing which PowerPC assemblers are supposed
887 to use for condition codes. */
888
889 /* Whether to do the special parsing. */
890 static bfd_boolean cr_operand;
891
892 /* Names to recognize in a condition code. This table is sorted. */
893 static const struct pd_reg cr_names[] =
894 {
895 { "cr0", 0 },
896 { "cr1", 1 },
897 { "cr2", 2 },
898 { "cr3", 3 },
899 { "cr4", 4 },
900 { "cr5", 5 },
901 { "cr6", 6 },
902 { "cr7", 7 },
903 { "eq", 2 },
904 { "gt", 1 },
905 { "lt", 0 },
906 { "so", 3 },
907 { "un", 3 }
908 };
909
910 /* Parsing function. This returns non-zero if it recognized an
911 expression. */
912
913 int
914 ppc_parse_name (const char *name, expressionS *exp)
915 {
916 int val;
917
918 if (! cr_operand)
919 return 0;
920
921 if (*name == '%')
922 ++name;
923 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
924 name);
925 if (val < 0)
926 return 0;
927
928 exp->X_op = O_constant;
929 exp->X_add_number = val;
930
931 return 1;
932 }
933 \f
934 /* Local variables. */
935
936 /* Whether to target xcoff64/elf64. */
937 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
938
939 /* Opcode hash table. */
940 static struct hash_control *ppc_hash;
941
942 /* Macro hash table. */
943 static struct hash_control *ppc_macro_hash;
944
945 #ifdef OBJ_ELF
946 /* What type of shared library support to use. */
947 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
948
949 /* Flags to set in the elf header. */
950 static flagword ppc_flags = 0;
951
952 /* Whether this is Solaris or not. */
953 #ifdef TARGET_SOLARIS_COMMENT
954 #define SOLARIS_P TRUE
955 #else
956 #define SOLARIS_P FALSE
957 #endif
958
959 static bfd_boolean msolaris = SOLARIS_P;
960 #endif
961
962 #ifdef OBJ_XCOFF
963
964 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
965 using a bunch of different sections. These assembler sections,
966 however, are all encompassed within the .text or .data sections of
967 the final output file. We handle this by using different
968 subsegments within these main segments. */
969
970 /* Next subsegment to allocate within the .text segment. */
971 static subsegT ppc_text_subsegment = 2;
972
973 /* Linked list of csects in the text section. */
974 static symbolS *ppc_text_csects;
975
976 /* Next subsegment to allocate within the .data segment. */
977 static subsegT ppc_data_subsegment = 2;
978
979 /* Linked list of csects in the data section. */
980 static symbolS *ppc_data_csects;
981
982 /* The current csect. */
983 static symbolS *ppc_current_csect;
984
985 /* The RS/6000 assembler uses a TOC which holds addresses of functions
986 and variables. Symbols are put in the TOC with the .tc pseudo-op.
987 A special relocation is used when accessing TOC entries. We handle
988 the TOC as a subsegment within the .data segment. We set it up if
989 we see a .toc pseudo-op, and save the csect symbol here. */
990 static symbolS *ppc_toc_csect;
991
992 /* The first frag in the TOC subsegment. */
993 static fragS *ppc_toc_frag;
994
995 /* The first frag in the first subsegment after the TOC in the .data
996 segment. NULL if there are no subsegments after the TOC. */
997 static fragS *ppc_after_toc_frag;
998
999 /* The current static block. */
1000 static symbolS *ppc_current_block;
1001
1002 /* The COFF debugging section; set by md_begin. This is not the
1003 .debug section, but is instead the secret BFD section which will
1004 cause BFD to set the section number of a symbol to N_DEBUG. */
1005 static asection *ppc_coff_debug_section;
1006
1007 /* Structure to set the length field of the dwarf sections. */
1008 struct dw_subsection {
1009 /* Subsections are simply linked. */
1010 struct dw_subsection *link;
1011
1012 /* The subsection number. */
1013 subsegT subseg;
1014
1015 /* Expression to compute the length of the section. */
1016 expressionS end_exp;
1017 };
1018
1019 static struct dw_section {
1020 /* Corresponding section. */
1021 segT sect;
1022
1023 /* Simply linked list of subsections with a label. */
1024 struct dw_subsection *list_subseg;
1025
1026 /* The anonymous subsection. */
1027 struct dw_subsection *anon_subseg;
1028 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1029 #endif /* OBJ_XCOFF */
1030
1031 #ifdef TE_PE
1032
1033 /* Various sections that we need for PE coff support. */
1034 static segT ydata_section;
1035 static segT pdata_section;
1036 static segT reldata_section;
1037 static segT rdata_section;
1038 static segT tocdata_section;
1039
1040 /* The current section and the previous section. See ppc_previous. */
1041 static segT ppc_previous_section;
1042 static segT ppc_current_section;
1043
1044 #endif /* TE_PE */
1045
1046 #ifdef OBJ_ELF
1047 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1048 #define PPC_APUINFO_ISEL 0x40
1049 #define PPC_APUINFO_PMR 0x41
1050 #define PPC_APUINFO_RFMCI 0x42
1051 #define PPC_APUINFO_CACHELCK 0x43
1052 #define PPC_APUINFO_SPE 0x100
1053 #define PPC_APUINFO_EFS 0x101
1054 #define PPC_APUINFO_BRLOCK 0x102
1055 #define PPC_APUINFO_VLE 0x104
1056
1057 /*
1058 * We keep a list of APUinfo
1059 */
1060 unsigned long *ppc_apuinfo_list;
1061 unsigned int ppc_apuinfo_num;
1062 unsigned int ppc_apuinfo_num_alloc;
1063 #endif /* OBJ_ELF */
1064 \f
1065 #ifdef OBJ_ELF
1066 const char *const md_shortopts = "b:l:usm:K:VQ:";
1067 #else
1068 const char *const md_shortopts = "um:";
1069 #endif
1070 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1071 const struct option md_longopts[] = {
1072 {"nops", required_argument, NULL, OPTION_NOPS},
1073 {NULL, no_argument, NULL, 0}
1074 };
1075 const size_t md_longopts_size = sizeof (md_longopts);
1076
1077 int
1078 md_parse_option (int c, char *arg)
1079 {
1080 ppc_cpu_t new_cpu;
1081
1082 switch (c)
1083 {
1084 case 'u':
1085 /* -u means that any undefined symbols should be treated as
1086 external, which is the default for gas anyhow. */
1087 break;
1088
1089 #ifdef OBJ_ELF
1090 case 'l':
1091 /* Solaris as takes -le (presumably for little endian). For completeness
1092 sake, recognize -be also. */
1093 if (strcmp (arg, "e") == 0)
1094 {
1095 target_big_endian = 0;
1096 set_target_endian = 1;
1097 if (ppc_cpu & PPC_OPCODE_VLE)
1098 as_bad (_("the use of -mvle requires big endian."));
1099 }
1100 else
1101 return 0;
1102
1103 break;
1104
1105 case 'b':
1106 if (strcmp (arg, "e") == 0)
1107 {
1108 target_big_endian = 1;
1109 set_target_endian = 1;
1110 }
1111 else
1112 return 0;
1113
1114 break;
1115
1116 case 'K':
1117 /* Recognize -K PIC. */
1118 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1119 {
1120 shlib = SHLIB_PIC;
1121 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1122 }
1123 else
1124 return 0;
1125
1126 break;
1127 #endif
1128
1129 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1130 case 'a':
1131 if (strcmp (arg, "64") == 0)
1132 {
1133 #ifdef BFD64
1134 ppc_obj64 = 1;
1135 if (ppc_cpu & PPC_OPCODE_VLE)
1136 as_bad (_("the use of -mvle requires -a32."));
1137 #else
1138 as_fatal (_("%s unsupported"), "-a64");
1139 #endif
1140 }
1141 else if (strcmp (arg, "32") == 0)
1142 ppc_obj64 = 0;
1143 else
1144 return 0;
1145 break;
1146
1147 case 'm':
1148 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1149 if (new_cpu != 0)
1150 {
1151 ppc_cpu = new_cpu;
1152 if (strcmp (arg, "vle") == 0)
1153 {
1154 if (set_target_endian && target_big_endian == 0)
1155 as_bad (_("the use of -mvle requires big endian."));
1156 if (ppc_obj64)
1157 as_bad (_("the use of -mvle requires -a32."));
1158 }
1159 }
1160
1161 else if (strcmp (arg, "regnames") == 0)
1162 reg_names_p = TRUE;
1163
1164 else if (strcmp (arg, "no-regnames") == 0)
1165 reg_names_p = FALSE;
1166
1167 #ifdef OBJ_ELF
1168 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1169 that require relocation. */
1170 else if (strcmp (arg, "relocatable") == 0)
1171 {
1172 shlib = SHLIB_MRELOCATABLE;
1173 ppc_flags |= EF_PPC_RELOCATABLE;
1174 }
1175
1176 else if (strcmp (arg, "relocatable-lib") == 0)
1177 {
1178 shlib = SHLIB_MRELOCATABLE;
1179 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1180 }
1181
1182 /* -memb, set embedded bit. */
1183 else if (strcmp (arg, "emb") == 0)
1184 ppc_flags |= EF_PPC_EMB;
1185
1186 /* -mlittle/-mbig set the endianness. */
1187 else if (strcmp (arg, "little") == 0
1188 || strcmp (arg, "little-endian") == 0)
1189 {
1190 target_big_endian = 0;
1191 set_target_endian = 1;
1192 if (ppc_cpu & PPC_OPCODE_VLE)
1193 as_bad (_("the use of -mvle requires big endian."));
1194 }
1195
1196 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1197 {
1198 target_big_endian = 1;
1199 set_target_endian = 1;
1200 }
1201
1202 else if (strcmp (arg, "solaris") == 0)
1203 {
1204 msolaris = TRUE;
1205 ppc_comment_chars = ppc_solaris_comment_chars;
1206 }
1207
1208 else if (strcmp (arg, "no-solaris") == 0)
1209 {
1210 msolaris = FALSE;
1211 ppc_comment_chars = ppc_eabi_comment_chars;
1212 }
1213 #endif
1214 else
1215 {
1216 as_bad (_("invalid switch -m%s"), arg);
1217 return 0;
1218 }
1219 break;
1220
1221 #ifdef OBJ_ELF
1222 /* -V: SVR4 argument to print version ID. */
1223 case 'V':
1224 print_version_id ();
1225 break;
1226
1227 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1228 should be emitted or not. FIXME: Not implemented. */
1229 case 'Q':
1230 break;
1231
1232 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1233 rather than .stabs.excl, which is ignored by the linker.
1234 FIXME: Not implemented. */
1235 case 's':
1236 if (arg)
1237 return 0;
1238
1239 break;
1240 #endif
1241
1242 case OPTION_NOPS:
1243 {
1244 char *end;
1245 nop_limit = strtoul (optarg, &end, 0);
1246 if (*end)
1247 as_bad (_("--nops needs a numeric argument"));
1248 }
1249 break;
1250
1251 default:
1252 return 0;
1253 }
1254
1255 return 1;
1256 }
1257
1258 void
1259 md_show_usage (FILE *stream)
1260 {
1261 fprintf (stream, _("\
1262 PowerPC options:\n\
1263 -a32 generate ELF32/XCOFF32\n\
1264 -a64 generate ELF64/XCOFF64\n\
1265 -u ignored\n\
1266 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1267 -mpwr generate code for POWER (RIOS1)\n\
1268 -m601 generate code for PowerPC 601\n\
1269 -mppc, -mppc32, -m603, -m604\n\
1270 generate code for PowerPC 603/604\n\
1271 -m403 generate code for PowerPC 403\n\
1272 -m405 generate code for PowerPC 405\n\
1273 -m440 generate code for PowerPC 440\n\
1274 -m464 generate code for PowerPC 464\n\
1275 -m476 generate code for PowerPC 476\n\
1276 -m7400, -m7410, -m7450, -m7455\n\
1277 generate code for PowerPC 7400/7410/7450/7455\n\
1278 -m750cl generate code for PowerPC 750cl\n"));
1279 fprintf (stream, _("\
1280 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1281 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1282 -mbooke generate code for 32-bit PowerPC BookE\n\
1283 -ma2 generate code for A2 architecture\n\
1284 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1285 -mpower5, -mpwr5, -mpwr5x\n\
1286 generate code for Power5 architecture\n\
1287 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1288 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1289 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1290 -mcell generate code for Cell Broadband Engine architecture\n\
1291 -mcom generate code Power/PowerPC common instructions\n\
1292 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1293 fprintf (stream, _("\
1294 -maltivec generate code for AltiVec\n\
1295 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1296 -mhtm generate code for Hardware Transactional Memory\n\
1297 -me300 generate code for PowerPC e300 family\n\
1298 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1299 -me500mc, generate code for Freescale e500mc core complex\n\
1300 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1301 -me5500, generate code for Freescale e5500 core complex\n\
1302 -me6500, generate code for Freescale e6500 core complex\n\
1303 -mspe generate code for Motorola SPE instructions\n\
1304 -mvle generate code for Freescale VLE instructions\n\
1305 -mtitan generate code for AppliedMicro Titan core complex\n\
1306 -mregnames Allow symbolic names for registers\n\
1307 -mno-regnames Do not allow symbolic names for registers\n"));
1308 #ifdef OBJ_ELF
1309 fprintf (stream, _("\
1310 -mrelocatable support for GCC's -mrelocatble option\n\
1311 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1312 -memb set PPC_EMB bit in ELF flags\n\
1313 -mlittle, -mlittle-endian, -le\n\
1314 generate code for a little endian machine\n\
1315 -mbig, -mbig-endian, -be\n\
1316 generate code for a big endian machine\n\
1317 -msolaris generate code for Solaris\n\
1318 -mno-solaris do not generate code for Solaris\n\
1319 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1320 -V print assembler version number\n\
1321 -Qy, -Qn ignored\n"));
1322 #endif
1323 fprintf (stream, _("\
1324 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1325 }
1326 \f
1327 /* Set ppc_cpu if it is not already set. */
1328
1329 static void
1330 ppc_set_cpu (void)
1331 {
1332 const char *default_os = TARGET_OS;
1333 const char *default_cpu = TARGET_CPU;
1334
1335 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1336 {
1337 if (ppc_obj64)
1338 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1339 else if (strncmp (default_os, "aix", 3) == 0
1340 && default_os[3] >= '4' && default_os[3] <= '9')
1341 ppc_cpu |= PPC_OPCODE_COMMON;
1342 else if (strncmp (default_os, "aix3", 4) == 0)
1343 ppc_cpu |= PPC_OPCODE_POWER;
1344 else if (strcmp (default_cpu, "rs6000") == 0)
1345 ppc_cpu |= PPC_OPCODE_POWER;
1346 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1347 ppc_cpu |= PPC_OPCODE_PPC;
1348 else
1349 as_fatal (_("unknown default cpu = %s, os = %s"),
1350 default_cpu, default_os);
1351 }
1352 }
1353
1354 /* Figure out the BFD architecture to use. This function and ppc_mach
1355 are called well before md_begin, when the output file is opened. */
1356
1357 enum bfd_architecture
1358 ppc_arch (void)
1359 {
1360 const char *default_cpu = TARGET_CPU;
1361 ppc_set_cpu ();
1362
1363 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1364 return bfd_arch_powerpc;
1365 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1366 return bfd_arch_powerpc;
1367 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1368 return bfd_arch_rs6000;
1369 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1370 {
1371 if (strcmp (default_cpu, "rs6000") == 0)
1372 return bfd_arch_rs6000;
1373 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1374 return bfd_arch_powerpc;
1375 }
1376
1377 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1378 return bfd_arch_unknown;
1379 }
1380
1381 unsigned long
1382 ppc_mach (void)
1383 {
1384 if (ppc_obj64)
1385 return bfd_mach_ppc64;
1386 else if (ppc_arch () == bfd_arch_rs6000)
1387 return bfd_mach_rs6k;
1388 else if (ppc_cpu & PPC_OPCODE_TITAN)
1389 return bfd_mach_ppc_titan;
1390 else if (ppc_cpu & PPC_OPCODE_VLE)
1391 return bfd_mach_ppc_vle;
1392 else
1393 return bfd_mach_ppc;
1394 }
1395
1396 extern char*
1397 ppc_target_format (void)
1398 {
1399 #ifdef OBJ_COFF
1400 #ifdef TE_PE
1401 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1402 #elif TE_POWERMAC
1403 return "xcoff-powermac";
1404 #else
1405 # ifdef TE_AIX5
1406 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1407 # else
1408 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1409 # endif
1410 #endif
1411 #endif
1412 #ifdef OBJ_ELF
1413 # ifdef TE_FreeBSD
1414 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1415 # elif defined (TE_VXWORKS)
1416 return "elf32-powerpc-vxworks";
1417 # else
1418 return (target_big_endian
1419 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1420 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1421 # endif
1422 #endif
1423 }
1424
1425 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1426 Return TRUE if there's a problem, otherwise FALSE. */
1427
1428 static bfd_boolean
1429 insn_validate (const struct powerpc_opcode *op)
1430 {
1431 const unsigned char *o;
1432 unsigned long omask = op->mask;
1433
1434 /* The mask had better not trim off opcode bits. */
1435 if ((op->opcode & omask) != op->opcode)
1436 {
1437 as_bad (_("mask trims opcode bits for %s"), op->name);
1438 return TRUE;
1439 }
1440
1441 /* The operands must not overlap the opcode or each other. */
1442 for (o = op->operands; *o; ++o)
1443 {
1444 if (*o >= num_powerpc_operands)
1445 {
1446 as_bad (_("operand index error for %s"), op->name);
1447 return TRUE;
1448 }
1449 else
1450 {
1451 const struct powerpc_operand *operand = &powerpc_operands[*o];
1452 if (operand->shift != PPC_OPSHIFT_INV)
1453 {
1454 unsigned long mask;
1455
1456 if (operand->shift >= 0)
1457 mask = operand->bitm << operand->shift;
1458 else
1459 mask = operand->bitm >> -operand->shift;
1460 if (omask & mask)
1461 {
1462 as_bad (_("operand %d overlap in %s"),
1463 (int) (o - op->operands), op->name);
1464 return TRUE;
1465 }
1466 omask |= mask;
1467 }
1468 }
1469 }
1470 return FALSE;
1471 }
1472
1473 /* Insert opcodes and macros into hash tables. Called at startup and
1474 for .machine pseudo. */
1475
1476 static void
1477 ppc_setup_opcodes (void)
1478 {
1479 const struct powerpc_opcode *op;
1480 const struct powerpc_opcode *op_end;
1481 const struct powerpc_macro *macro;
1482 const struct powerpc_macro *macro_end;
1483 bfd_boolean bad_insn = FALSE;
1484
1485 if (ppc_hash != NULL)
1486 hash_die (ppc_hash);
1487 if (ppc_macro_hash != NULL)
1488 hash_die (ppc_macro_hash);
1489
1490 /* Insert the opcodes into a hash table. */
1491 ppc_hash = hash_new ();
1492
1493 if (ENABLE_CHECKING)
1494 {
1495 unsigned int i;
1496
1497 /* An index into powerpc_operands is stored in struct fix
1498 fx_pcrel_adjust which is 8 bits wide. */
1499 gas_assert (num_powerpc_operands < 256);
1500
1501 /* Check operand masks. Code here and in the disassembler assumes
1502 all the 1's in the mask are contiguous. */
1503 for (i = 0; i < num_powerpc_operands; ++i)
1504 {
1505 unsigned long mask = powerpc_operands[i].bitm;
1506 unsigned long right_bit;
1507 unsigned int j;
1508
1509 right_bit = mask & -mask;
1510 mask += right_bit;
1511 right_bit = mask & -mask;
1512 if (mask != right_bit)
1513 {
1514 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1515 bad_insn = TRUE;
1516 }
1517 for (j = i + 1; j < num_powerpc_operands; ++j)
1518 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1519 sizeof (powerpc_operands[0])) == 0)
1520 {
1521 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1522 j, i);
1523 bad_insn = TRUE;
1524 }
1525 }
1526 }
1527
1528 op_end = powerpc_opcodes + powerpc_num_opcodes;
1529 for (op = powerpc_opcodes; op < op_end; op++)
1530 {
1531 if (ENABLE_CHECKING)
1532 {
1533 if (op != powerpc_opcodes)
1534 {
1535 int old_opcode = PPC_OP (op[-1].opcode);
1536 int new_opcode = PPC_OP (op[0].opcode);
1537
1538 #ifdef PRINT_OPCODE_TABLE
1539 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1540 op->name, (unsigned int) (op - powerpc_opcodes),
1541 (unsigned int) new_opcode, (unsigned int) op->opcode,
1542 (unsigned int) op->mask, (unsigned long long) op->flags);
1543 #endif
1544
1545 /* The major opcodes had better be sorted. Code in the
1546 disassembler assumes the insns are sorted according to
1547 major opcode. */
1548 if (new_opcode < old_opcode)
1549 {
1550 as_bad (_("major opcode is not sorted for %s"),
1551 op->name);
1552 bad_insn = TRUE;
1553 }
1554 }
1555 bad_insn |= insn_validate (op);
1556 }
1557
1558 if ((ppc_cpu & op->flags) != 0
1559 && !(ppc_cpu & op->deprecated))
1560 {
1561 const char *retval;
1562
1563 retval = hash_insert (ppc_hash, op->name, (void *) op);
1564 if (retval != NULL)
1565 {
1566 as_bad (_("duplicate instruction %s"),
1567 op->name);
1568 bad_insn = TRUE;
1569 }
1570 }
1571 }
1572
1573 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1574 for (op = powerpc_opcodes; op < op_end; op++)
1575 hash_insert (ppc_hash, op->name, (void *) op);
1576
1577 op_end = vle_opcodes + vle_num_opcodes;
1578 for (op = vle_opcodes; op < op_end; op++)
1579 {
1580 if (ENABLE_CHECKING)
1581 {
1582 if (op != vle_opcodes)
1583 {
1584 unsigned old_seg, new_seg;
1585
1586 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1587 old_seg = VLE_OP_TO_SEG (old_seg);
1588 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1589 new_seg = VLE_OP_TO_SEG (new_seg);
1590
1591 #ifdef PRINT_OPCODE_TABLE
1592 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1593 op->name, (unsigned int) (op - powerpc_opcodes),
1594 (unsigned int) new_seg, (unsigned int) op->opcode,
1595 (unsigned int) op->mask, (unsigned long long) op->flags);
1596 #endif
1597 /* The major opcodes had better be sorted. Code in the
1598 disassembler assumes the insns are sorted according to
1599 major opcode. */
1600 if (new_seg < old_seg)
1601 {
1602 as_bad (_("major opcode is not sorted for %s"),
1603 op->name);
1604 bad_insn = TRUE;
1605 }
1606 }
1607
1608 bad_insn |= insn_validate (op);
1609 }
1610
1611 if ((ppc_cpu & op->flags) != 0
1612 && !(ppc_cpu & op->deprecated))
1613 {
1614 const char *retval;
1615
1616 retval = hash_insert (ppc_hash, op->name, (void *) op);
1617 if (retval != NULL)
1618 {
1619 as_bad (_("duplicate instruction %s"),
1620 op->name);
1621 bad_insn = TRUE;
1622 }
1623 }
1624 }
1625
1626 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1627 for (op = vle_opcodes; op < op_end; op++)
1628 hash_insert (ppc_hash, op->name, (void *) op);
1629
1630 /* Insert the macros into a hash table. */
1631 ppc_macro_hash = hash_new ();
1632
1633 macro_end = powerpc_macros + powerpc_num_macros;
1634 for (macro = powerpc_macros; macro < macro_end; macro++)
1635 {
1636 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1637 {
1638 const char *retval;
1639
1640 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1641 if (retval != (const char *) NULL)
1642 {
1643 as_bad (_("duplicate macro %s"), macro->name);
1644 bad_insn = TRUE;
1645 }
1646 }
1647 }
1648
1649 if (bad_insn)
1650 abort ();
1651 }
1652
1653 /* This function is called when the assembler starts up. It is called
1654 after the options have been parsed and the output file has been
1655 opened. */
1656
1657 void
1658 md_begin (void)
1659 {
1660 ppc_set_cpu ();
1661
1662 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1663 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1664
1665 #ifdef OBJ_ELF
1666 /* Set the ELF flags if desired. */
1667 if (ppc_flags && !msolaris)
1668 bfd_set_private_flags (stdoutput, ppc_flags);
1669 #endif
1670
1671 ppc_setup_opcodes ();
1672
1673 /* Tell the main code what the endianness is if it is not overridden
1674 by the user. */
1675 if (!set_target_endian)
1676 {
1677 set_target_endian = 1;
1678 target_big_endian = PPC_BIG_ENDIAN;
1679 }
1680
1681 #ifdef OBJ_XCOFF
1682 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1683
1684 /* Create dummy symbols to serve as initial csects. This forces the
1685 text csects to precede the data csects. These symbols will not
1686 be output. */
1687 ppc_text_csects = symbol_make ("dummy\001");
1688 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1689 ppc_data_csects = symbol_make ("dummy\001");
1690 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1691 #endif
1692
1693 #ifdef TE_PE
1694
1695 ppc_current_section = text_section;
1696 ppc_previous_section = 0;
1697
1698 #endif
1699 }
1700
1701 void
1702 ppc_cleanup (void)
1703 {
1704 #ifdef OBJ_ELF
1705 if (ppc_apuinfo_list == NULL)
1706 return;
1707
1708 /* Ok, so write the section info out. We have this layout:
1709
1710 byte data what
1711 ---- ---- ----
1712 0 8 length of "APUinfo\0"
1713 4 (n*4) number of APU's (4 bytes each)
1714 8 2 note type 2
1715 12 "APUinfo\0" name
1716 20 APU#1 first APU's info
1717 24 APU#2 second APU's info
1718 ... ...
1719 */
1720 {
1721 char *p;
1722 asection *seg = now_seg;
1723 subsegT subseg = now_subseg;
1724 asection *apuinfo_secp = (asection *) NULL;
1725 unsigned int i;
1726
1727 /* Create the .PPC.EMB.apuinfo section. */
1728 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1729 bfd_set_section_flags (stdoutput,
1730 apuinfo_secp,
1731 SEC_HAS_CONTENTS | SEC_READONLY);
1732
1733 p = frag_more (4);
1734 md_number_to_chars (p, (valueT) 8, 4);
1735
1736 p = frag_more (4);
1737 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1738
1739 p = frag_more (4);
1740 md_number_to_chars (p, (valueT) 2, 4);
1741
1742 p = frag_more (8);
1743 strcpy (p, "APUinfo");
1744
1745 for (i = 0; i < ppc_apuinfo_num; i++)
1746 {
1747 p = frag_more (4);
1748 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1749 }
1750
1751 frag_align (2, 0, 0);
1752
1753 /* We probably can't restore the current segment, for there likely
1754 isn't one yet... */
1755 if (seg && subseg)
1756 subseg_set (seg, subseg);
1757 }
1758 #endif
1759 }
1760
1761 /* Insert an operand value into an instruction. */
1762
1763 static unsigned long
1764 ppc_insert_operand (unsigned long insn,
1765 const struct powerpc_operand *operand,
1766 offsetT val,
1767 ppc_cpu_t cpu,
1768 char *file,
1769 unsigned int line)
1770 {
1771 long min, max, right;
1772
1773 max = operand->bitm;
1774 right = max & -max;
1775 min = 0;
1776
1777 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1778 {
1779 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1780 max = (max >> 1) & -right;
1781 min = ~max & -right;
1782 }
1783
1784 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1785 max++;
1786
1787 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1788 {
1789 long tmp = min;
1790 min = -max;
1791 max = -tmp;
1792 }
1793
1794 if (min <= max)
1795 {
1796 /* Some people write constants with the sign extension done by
1797 hand but only up to 32 bits. This shouldn't really be valid,
1798 but, to permit this code to assemble on a 64-bit host, we
1799 sign extend the 32-bit value to 64 bits if so doing makes the
1800 value valid. */
1801 if (val > max
1802 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1803 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1804 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1805 val = val - 0x80000000 - 0x80000000;
1806
1807 /* Similarly, people write expressions like ~(1<<15), and expect
1808 this to be OK for a 32-bit unsigned value. */
1809 else if (val < min
1810 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1811 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1812 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1813 val = val + 0x80000000 + 0x80000000;
1814
1815 else if (val < min
1816 || val > max
1817 || (val & (right - 1)) != 0)
1818 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1819 }
1820
1821 if (operand->insert)
1822 {
1823 const char *errmsg;
1824
1825 errmsg = NULL;
1826 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1827 if (errmsg != (const char *) NULL)
1828 as_bad_where (file, line, "%s", errmsg);
1829 }
1830 else if (operand->shift >= 0)
1831 insn |= ((long) val & operand->bitm) << operand->shift;
1832 else
1833 insn |= ((long) val & operand->bitm) >> -operand->shift;
1834
1835 return insn;
1836 }
1837
1838 \f
1839 #ifdef OBJ_ELF
1840 /* Parse @got, etc. and return the desired relocation. */
1841 static bfd_reloc_code_real_type
1842 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1843 {
1844 struct map_bfd {
1845 char *string;
1846 unsigned int length : 8;
1847 unsigned int valid32 : 1;
1848 unsigned int valid64 : 1;
1849 unsigned int reloc;
1850 };
1851
1852 char ident[20];
1853 char *str = *str_p;
1854 char *str2;
1855 int ch;
1856 int len;
1857 const struct map_bfd *ptr;
1858
1859 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1860 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1861 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1862
1863 static const struct map_bfd mapping[] = {
1864 MAP ("l", BFD_RELOC_LO16),
1865 MAP ("h", BFD_RELOC_HI16),
1866 MAP ("ha", BFD_RELOC_HI16_S),
1867 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1868 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1869 MAP ("got", BFD_RELOC_16_GOTOFF),
1870 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1871 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1872 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1873 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1874 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1875 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1876 MAP ("copy", BFD_RELOC_PPC_COPY),
1877 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1878 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1879 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1880 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1881 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1882 MAP ("tls", BFD_RELOC_PPC_TLS),
1883 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1884 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1885 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1886 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1887 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1888 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1889 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1890 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1891 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1892 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1893 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1894 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1895 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1896 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1897 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1898 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1899 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1900 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1901 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1902 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1903 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1904 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1905 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1906 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1907 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1908 MAP32 ("fixup", BFD_RELOC_CTOR),
1909 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1910 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1911 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1912 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1913 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1914 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1915 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1916 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1917 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1918 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1919 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1920 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1921 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1922 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1923 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1924 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1925 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1926 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1927 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1928 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1929 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1930 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1931 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1932 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1933 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1934 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1935 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1936 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1937 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
1938 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1939 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1940 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1941 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1942 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1943 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1944 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1945 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1946 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1947 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1948 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
1949 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1950 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1951 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1952 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1953 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
1954 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1955 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
1956 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1957 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1958 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1959 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1960 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1961 };
1962
1963 if (*str++ != '@')
1964 return BFD_RELOC_UNUSED;
1965
1966 for (ch = *str, str2 = ident;
1967 (str2 < ident + sizeof (ident) - 1
1968 && (ISALNUM (ch) || ch == '@'));
1969 ch = *++str)
1970 {
1971 *str2++ = TOLOWER (ch);
1972 }
1973
1974 *str2 = '\0';
1975 len = str2 - ident;
1976
1977 ch = ident[0];
1978 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1979 if (ch == ptr->string[0]
1980 && len == ptr->length
1981 && memcmp (ident, ptr->string, ptr->length) == 0
1982 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1983 {
1984 int reloc = ptr->reloc;
1985
1986 if (!ppc_obj64 && exp_p->X_add_number != 0)
1987 {
1988 switch (reloc)
1989 {
1990 case BFD_RELOC_16_GOTOFF:
1991 case BFD_RELOC_LO16_GOTOFF:
1992 case BFD_RELOC_HI16_GOTOFF:
1993 case BFD_RELOC_HI16_S_GOTOFF:
1994 as_warn (_("identifier+constant@got means "
1995 "identifier@got+constant"));
1996 break;
1997
1998 case BFD_RELOC_PPC_GOT_TLSGD16:
1999 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2000 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2001 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2002 case BFD_RELOC_PPC_GOT_TLSLD16:
2003 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2004 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2005 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2006 case BFD_RELOC_PPC_GOT_DTPREL16:
2007 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2008 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2009 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2010 case BFD_RELOC_PPC_GOT_TPREL16:
2011 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2012 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2013 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2014 as_bad (_("symbol+offset not supported for got tls"));
2015 break;
2016 }
2017 }
2018
2019 /* Now check for identifier@suffix+constant. */
2020 if (*str == '-' || *str == '+')
2021 {
2022 char *orig_line = input_line_pointer;
2023 expressionS new_exp;
2024
2025 input_line_pointer = str;
2026 expression (&new_exp);
2027 if (new_exp.X_op == O_constant)
2028 {
2029 exp_p->X_add_number += new_exp.X_add_number;
2030 str = input_line_pointer;
2031 }
2032
2033 if (&input_line_pointer != str_p)
2034 input_line_pointer = orig_line;
2035 }
2036 *str_p = str;
2037
2038 if (reloc == (int) BFD_RELOC_PPC64_TOC
2039 && exp_p->X_op == O_symbol
2040 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2041 {
2042 /* Change the symbol so that the dummy .TOC. symbol can be
2043 omitted from the object file. */
2044 exp_p->X_add_symbol = &abs_symbol;
2045 }
2046
2047 return (bfd_reloc_code_real_type) reloc;
2048 }
2049
2050 return BFD_RELOC_UNUSED;
2051 }
2052
2053 /* Like normal .long/.short/.word, except support @got, etc.
2054 Clobbers input_line_pointer, checks end-of-line. */
2055 static void
2056 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
2057 {
2058 expressionS exp;
2059 bfd_reloc_code_real_type reloc;
2060
2061 if (is_it_end_of_statement ())
2062 {
2063 demand_empty_rest_of_line ();
2064 return;
2065 }
2066
2067 do
2068 {
2069 expression (&exp);
2070 if (*input_line_pointer == '@'
2071 && (reloc = ppc_elf_suffix (&input_line_pointer,
2072 &exp)) != BFD_RELOC_UNUSED)
2073 {
2074 reloc_howto_type *reloc_howto;
2075 int size;
2076
2077 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2078 size = bfd_get_reloc_size (reloc_howto);
2079
2080 if (size > nbytes)
2081 {
2082 as_bad (_("%s relocations do not fit in %d bytes\n"),
2083 reloc_howto->name, nbytes);
2084 }
2085 else
2086 {
2087 char *p;
2088 int offset;
2089
2090 p = frag_more (nbytes);
2091 memset (p, 0, nbytes);
2092 offset = 0;
2093 if (target_big_endian)
2094 offset = nbytes - size;
2095 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2096 &exp, 0, reloc);
2097 }
2098 }
2099 else
2100 emit_expr (&exp, (unsigned int) nbytes);
2101 }
2102 while (*input_line_pointer++ == ',');
2103
2104 /* Put terminator back into stream. */
2105 input_line_pointer--;
2106 demand_empty_rest_of_line ();
2107 }
2108
2109 /* Solaris pseduo op to change to the .rodata section. */
2110 static void
2111 ppc_elf_rdata (int xxx)
2112 {
2113 char *save_line = input_line_pointer;
2114 static char section[] = ".rodata\n";
2115
2116 /* Just pretend this is .section .rodata */
2117 input_line_pointer = section;
2118 obj_elf_section (xxx);
2119
2120 input_line_pointer = save_line;
2121 }
2122
2123 /* Pseudo op to make file scope bss items. */
2124 static void
2125 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2126 {
2127 char *name;
2128 char c;
2129 char *p;
2130 offsetT size;
2131 symbolS *symbolP;
2132 offsetT align;
2133 segT old_sec;
2134 int old_subsec;
2135 char *pfrag;
2136 int align2;
2137
2138 name = input_line_pointer;
2139 c = get_symbol_end ();
2140
2141 /* just after name is now '\0'. */
2142 p = input_line_pointer;
2143 *p = c;
2144 SKIP_WHITESPACE ();
2145 if (*input_line_pointer != ',')
2146 {
2147 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2148 ignore_rest_of_line ();
2149 return;
2150 }
2151
2152 input_line_pointer++; /* skip ',' */
2153 if ((size = get_absolute_expression ()) < 0)
2154 {
2155 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2156 ignore_rest_of_line ();
2157 return;
2158 }
2159
2160 /* The third argument to .lcomm is the alignment. */
2161 if (*input_line_pointer != ',')
2162 align = 8;
2163 else
2164 {
2165 ++input_line_pointer;
2166 align = get_absolute_expression ();
2167 if (align <= 0)
2168 {
2169 as_warn (_("ignoring bad alignment"));
2170 align = 8;
2171 }
2172 }
2173
2174 *p = 0;
2175 symbolP = symbol_find_or_make (name);
2176 *p = c;
2177
2178 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2179 {
2180 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2181 S_GET_NAME (symbolP));
2182 ignore_rest_of_line ();
2183 return;
2184 }
2185
2186 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2187 {
2188 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2189 S_GET_NAME (symbolP),
2190 (long) S_GET_VALUE (symbolP),
2191 (long) size);
2192
2193 ignore_rest_of_line ();
2194 return;
2195 }
2196
2197 /* Allocate_bss. */
2198 old_sec = now_seg;
2199 old_subsec = now_subseg;
2200 if (align)
2201 {
2202 /* Convert to a power of 2 alignment. */
2203 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2204 if (align != 1)
2205 {
2206 as_bad (_("common alignment not a power of 2"));
2207 ignore_rest_of_line ();
2208 return;
2209 }
2210 }
2211 else
2212 align2 = 0;
2213
2214 record_alignment (bss_section, align2);
2215 subseg_set (bss_section, 1);
2216 if (align2)
2217 frag_align (align2, 0, 0);
2218 if (S_GET_SEGMENT (symbolP) == bss_section)
2219 symbol_get_frag (symbolP)->fr_symbol = 0;
2220 symbol_set_frag (symbolP, frag_now);
2221 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2222 (char *) 0);
2223 *pfrag = 0;
2224 S_SET_SIZE (symbolP, size);
2225 S_SET_SEGMENT (symbolP, bss_section);
2226 subseg_set (old_sec, old_subsec);
2227 demand_empty_rest_of_line ();
2228 }
2229
2230 /* Pseudo op to set symbol local entry point. */
2231 static void
2232 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2233 {
2234 char *name = input_line_pointer;
2235 char c = get_symbol_end ();
2236 char *p;
2237 expressionS exp;
2238 symbolS *sym;
2239 asymbol *bfdsym;
2240 elf_symbol_type *elfsym;
2241
2242 p = input_line_pointer;
2243 *p = c;
2244 SKIP_WHITESPACE ();
2245 if (*input_line_pointer != ',')
2246 {
2247 *p = 0;
2248 as_bad (_("expected comma after name `%s' in .localentry directive"),
2249 name);
2250 *p = c;
2251 ignore_rest_of_line ();
2252 return;
2253 }
2254 input_line_pointer++;
2255 expression (&exp);
2256 if (exp.X_op == O_absent)
2257 {
2258 as_bad (_("missing expression in .localentry directive"));
2259 exp.X_op = O_constant;
2260 exp.X_add_number = 0;
2261 }
2262 *p = 0;
2263 sym = symbol_find_or_make (name);
2264 *p = c;
2265
2266 if (resolve_expression (&exp)
2267 && exp.X_op == O_constant)
2268 {
2269 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2270
2271 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2272 as_bad (_(".localentry expression for `%s' "
2273 "is not a valid power of 2"), S_GET_NAME (sym));
2274 else
2275 {
2276 bfdsym = symbol_get_bfdsym (sym);
2277 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2278 gas_assert (elfsym);
2279 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2280 elfsym->internal_elf_sym.st_other |= encoded;
2281 if (ppc_abiversion == 0)
2282 ppc_abiversion = 2;
2283 }
2284 }
2285 else
2286 as_bad (_(".localentry expression for `%s' "
2287 "does not evaluate to a constant"), S_GET_NAME (sym));
2288
2289 demand_empty_rest_of_line ();
2290 }
2291
2292 /* Pseudo op to set ABI version. */
2293 static void
2294 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2295 {
2296 expressionS exp;
2297
2298 expression (&exp);
2299 if (exp.X_op == O_absent)
2300 {
2301 as_bad (_("missing expression in .abiversion directive"));
2302 exp.X_op = O_constant;
2303 exp.X_add_number = 0;
2304 }
2305
2306 if (resolve_expression (&exp)
2307 && exp.X_op == O_constant)
2308 ppc_abiversion = exp.X_add_number;
2309 else
2310 as_bad (_(".abiversion expression does not evaluate to a constant"));
2311 demand_empty_rest_of_line ();
2312 }
2313
2314 /* Set ABI version in output file. */
2315 void
2316 ppc_elf_end (void)
2317 {
2318 if (ppc_obj64 && ppc_abiversion != 0)
2319 {
2320 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2321 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2322 }
2323 }
2324
2325 /* Validate any relocations emitted for -mrelocatable, possibly adding
2326 fixups for word relocations in writable segments, so we can adjust
2327 them at runtime. */
2328 static void
2329 ppc_elf_validate_fix (fixS *fixp, segT seg)
2330 {
2331 if (fixp->fx_done || fixp->fx_pcrel)
2332 return;
2333
2334 switch (shlib)
2335 {
2336 case SHLIB_NONE:
2337 case SHLIB_PIC:
2338 return;
2339
2340 case SHLIB_MRELOCATABLE:
2341 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2342 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2343 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2344 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2345 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2346 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2347 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2348 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2349 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2350 && (seg->flags & SEC_LOAD) != 0
2351 && strcmp (segment_name (seg), ".got2") != 0
2352 && strcmp (segment_name (seg), ".dtors") != 0
2353 && strcmp (segment_name (seg), ".ctors") != 0
2354 && strcmp (segment_name (seg), ".fixup") != 0
2355 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2356 && strcmp (segment_name (seg), ".eh_frame") != 0
2357 && strcmp (segment_name (seg), ".ex_shared") != 0)
2358 {
2359 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2360 || fixp->fx_r_type != BFD_RELOC_CTOR)
2361 {
2362 as_bad_where (fixp->fx_file, fixp->fx_line,
2363 _("relocation cannot be done when using -mrelocatable"));
2364 }
2365 }
2366 return;
2367 }
2368 }
2369
2370 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2371 function descriptor sym if the corresponding code sym is used. */
2372
2373 void
2374 ppc_frob_file_before_adjust (void)
2375 {
2376 symbolS *symp;
2377 asection *toc;
2378
2379 if (!ppc_obj64)
2380 return;
2381
2382 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2383 {
2384 const char *name;
2385 char *dotname;
2386 symbolS *dotsym;
2387 size_t len;
2388
2389 name = S_GET_NAME (symp);
2390 if (name[0] == '.')
2391 continue;
2392
2393 if (! S_IS_WEAK (symp)
2394 || S_IS_DEFINED (symp))
2395 continue;
2396
2397 len = strlen (name) + 1;
2398 dotname = xmalloc (len + 1);
2399 dotname[0] = '.';
2400 memcpy (dotname + 1, name, len);
2401 dotsym = symbol_find_noref (dotname, 1);
2402 free (dotname);
2403 if (dotsym != NULL && (symbol_used_p (dotsym)
2404 || symbol_used_in_reloc_p (dotsym)))
2405 symbol_mark_used (symp);
2406
2407 }
2408
2409 toc = bfd_get_section_by_name (stdoutput, ".toc");
2410 if (toc != NULL
2411 && toc_reloc_types != has_large_toc_reloc
2412 && bfd_section_size (stdoutput, toc) > 0x10000)
2413 as_warn (_("TOC section size exceeds 64k"));
2414 }
2415
2416 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2417 emitted. Other uses of .TOC. will cause the symbol to be marked
2418 with BSF_KEEP in md_apply_fix. */
2419
2420 void
2421 ppc_elf_adjust_symtab (void)
2422 {
2423 if (ppc_obj64)
2424 {
2425 symbolS *symp;
2426 symp = symbol_find (".TOC.");
2427 if (symp != NULL)
2428 {
2429 asymbol *bsym = symbol_get_bfdsym (symp);
2430 if ((bsym->flags & BSF_KEEP) == 0)
2431 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2432 }
2433 }
2434 }
2435 #endif /* OBJ_ELF */
2436 \f
2437 #ifdef TE_PE
2438
2439 /*
2440 * Summary of parse_toc_entry.
2441 *
2442 * in: Input_line_pointer points to the '[' in one of:
2443 *
2444 * [toc] [tocv] [toc32] [toc64]
2445 *
2446 * Anything else is an error of one kind or another.
2447 *
2448 * out:
2449 * return value: success or failure
2450 * toc_kind: kind of toc reference
2451 * input_line_pointer:
2452 * success: first char after the ']'
2453 * failure: unchanged
2454 *
2455 * settings:
2456 *
2457 * [toc] - rv == success, toc_kind = default_toc
2458 * [tocv] - rv == success, toc_kind = data_in_toc
2459 * [toc32] - rv == success, toc_kind = must_be_32
2460 * [toc64] - rv == success, toc_kind = must_be_64
2461 *
2462 */
2463
2464 enum toc_size_qualifier
2465 {
2466 default_toc, /* The toc cell constructed should be the system default size */
2467 data_in_toc, /* This is a direct reference to a toc cell */
2468 must_be_32, /* The toc cell constructed must be 32 bits wide */
2469 must_be_64 /* The toc cell constructed must be 64 bits wide */
2470 };
2471
2472 static int
2473 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2474 {
2475 char *start;
2476 char *toc_spec;
2477 char c;
2478 enum toc_size_qualifier t;
2479
2480 /* Save the input_line_pointer. */
2481 start = input_line_pointer;
2482
2483 /* Skip over the '[' , and whitespace. */
2484 ++input_line_pointer;
2485 SKIP_WHITESPACE ();
2486
2487 /* Find the spelling of the operand. */
2488 toc_spec = input_line_pointer;
2489 c = get_symbol_end ();
2490
2491 if (strcmp (toc_spec, "toc") == 0)
2492 {
2493 t = default_toc;
2494 }
2495 else if (strcmp (toc_spec, "tocv") == 0)
2496 {
2497 t = data_in_toc;
2498 }
2499 else if (strcmp (toc_spec, "toc32") == 0)
2500 {
2501 t = must_be_32;
2502 }
2503 else if (strcmp (toc_spec, "toc64") == 0)
2504 {
2505 t = must_be_64;
2506 }
2507 else
2508 {
2509 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2510 *input_line_pointer = c;
2511 input_line_pointer = start;
2512 return 0;
2513 }
2514
2515 /* Now find the ']'. */
2516 *input_line_pointer = c;
2517
2518 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2519 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2520
2521 if (c != ']')
2522 {
2523 as_bad (_("syntax error: expected `]', found `%c'"), c);
2524 input_line_pointer = start;
2525 return 0;
2526 }
2527
2528 *toc_kind = t;
2529 return 1;
2530 }
2531 #endif
2532
2533 #ifdef OBJ_XCOFF
2534 /* See whether a symbol is in the TOC section. */
2535
2536 static int
2537 ppc_is_toc_sym (symbolS *sym)
2538 {
2539 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2540 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2541 }
2542 #endif
2543 \f
2544
2545 #ifdef OBJ_ELF
2546 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2547 static void
2548 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2549 {
2550 unsigned int i;
2551
2552 /* Check we don't already exist. */
2553 for (i = 0; i < ppc_apuinfo_num; i++)
2554 if (ppc_apuinfo_list[i] == APUID (apu, version))
2555 return;
2556
2557 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2558 {
2559 if (ppc_apuinfo_num_alloc == 0)
2560 {
2561 ppc_apuinfo_num_alloc = 4;
2562 ppc_apuinfo_list = (unsigned long *)
2563 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2564 }
2565 else
2566 {
2567 ppc_apuinfo_num_alloc += 4;
2568 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2569 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2570 }
2571 }
2572 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2573 }
2574 #undef APUID
2575 #endif
2576 \f
2577
2578 /* We need to keep a list of fixups. We can't simply generate them as
2579 we go, because that would require us to first create the frag, and
2580 that would screw up references to ``.''. */
2581
2582 struct ppc_fixup
2583 {
2584 expressionS exp;
2585 int opindex;
2586 bfd_reloc_code_real_type reloc;
2587 };
2588
2589 #define MAX_INSN_FIXUPS (5)
2590
2591 /* Form I16L. */
2592 #define E_OR2I_INSN 0x7000C000
2593 #define E_AND2I_DOT_INSN 0x7000C800
2594 #define E_OR2IS_INSN 0x7000D000
2595 #define E_LIS_INSN 0x7000E000
2596 #define E_AND2IS_DOT_INSN 0x7000E800
2597
2598 /* Form I16A. */
2599 #define E_ADD2I_DOT_INSN 0x70008800
2600 #define E_ADD2IS_INSN 0x70009000
2601 #define E_CMP16I_INSN 0x70009800
2602 #define E_MULL2I_INSN 0x7000A000
2603 #define E_CMPL16I_INSN 0x7000A800
2604 #define E_CMPH16I_INSN 0x7000B000
2605 #define E_CMPHL16I_INSN 0x7000B800
2606
2607 /* This routine is called for each instruction to be assembled. */
2608
2609 void
2610 md_assemble (char *str)
2611 {
2612 char *s;
2613 const struct powerpc_opcode *opcode;
2614 unsigned long insn;
2615 const unsigned char *opindex_ptr;
2616 int skip_optional;
2617 int need_paren;
2618 int next_opindex;
2619 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2620 int fc;
2621 char *f;
2622 int addr_mod;
2623 int i;
2624 unsigned int insn_length;
2625
2626 /* Get the opcode. */
2627 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2628 ;
2629 if (*s != '\0')
2630 *s++ = '\0';
2631
2632 /* Look up the opcode in the hash table. */
2633 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2634 if (opcode == (const struct powerpc_opcode *) NULL)
2635 {
2636 const struct powerpc_macro *macro;
2637
2638 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2639 if (macro == (const struct powerpc_macro *) NULL)
2640 as_bad (_("unrecognized opcode: `%s'"), str);
2641 else
2642 ppc_macro (s, macro);
2643
2644 return;
2645 }
2646
2647 insn = opcode->opcode;
2648
2649 str = s;
2650 while (ISSPACE (*str))
2651 ++str;
2652
2653 /* PowerPC operands are just expressions. The only real issue is
2654 that a few operand types are optional. All cases which might use
2655 an optional operand separate the operands only with commas (in some
2656 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2657 have optional operands). Most instructions with optional operands
2658 have only one. Those that have more than one optional operand can
2659 take either all their operands or none. So, before we start seriously
2660 parsing the operands, we check to see if we have optional operands,
2661 and if we do, we count the number of commas to see which operands
2662 have been omitted. */
2663 skip_optional = 0;
2664 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2665 {
2666 const struct powerpc_operand *operand;
2667
2668 operand = &powerpc_operands[*opindex_ptr];
2669 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2670 {
2671 unsigned int opcount;
2672 unsigned int num_operands_expected;
2673
2674 /* There is an optional operand. Count the number of
2675 commas in the input line. */
2676 if (*str == '\0')
2677 opcount = 0;
2678 else
2679 {
2680 opcount = 1;
2681 s = str;
2682 while ((s = strchr (s, ',')) != (char *) NULL)
2683 {
2684 ++opcount;
2685 ++s;
2686 }
2687 }
2688
2689 /* Compute the number of expected operands.
2690 Do not count fake operands. */
2691 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2692 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2693 ++ num_operands_expected;
2694
2695 /* If there are fewer operands in the line then are called
2696 for by the instruction, we want to skip the optional
2697 operands. */
2698 if (opcount < num_operands_expected)
2699 skip_optional = 1;
2700
2701 break;
2702 }
2703 }
2704
2705 /* Gather the operands. */
2706 need_paren = 0;
2707 next_opindex = 0;
2708 fc = 0;
2709 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2710 {
2711 const struct powerpc_operand *operand;
2712 const char *errmsg;
2713 char *hold;
2714 expressionS ex;
2715 char endc;
2716
2717 if (next_opindex == 0)
2718 operand = &powerpc_operands[*opindex_ptr];
2719 else
2720 {
2721 operand = &powerpc_operands[next_opindex];
2722 next_opindex = 0;
2723 }
2724 errmsg = NULL;
2725
2726 /* If this is a fake operand, then we do not expect anything
2727 from the input. */
2728 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2729 {
2730 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2731 if (errmsg != (const char *) NULL)
2732 as_bad ("%s", errmsg);
2733 continue;
2734 }
2735
2736 /* If this is an optional operand, and we are skipping it, just
2737 insert a zero. */
2738 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2739 && skip_optional)
2740 {
2741 if (operand->insert)
2742 {
2743 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2744 if (errmsg != (const char *) NULL)
2745 as_bad ("%s", errmsg);
2746 }
2747 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2748 next_opindex = *opindex_ptr + 1;
2749 continue;
2750 }
2751
2752 /* Gather the operand. */
2753 hold = input_line_pointer;
2754 input_line_pointer = str;
2755
2756 #ifdef TE_PE
2757 if (*input_line_pointer == '[')
2758 {
2759 /* We are expecting something like the second argument here:
2760 *
2761 * lwz r4,[toc].GS.0.static_int(rtoc)
2762 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2763 * The argument following the `]' must be a symbol name, and the
2764 * register must be the toc register: 'rtoc' or '2'
2765 *
2766 * The effect is to 0 as the displacement field
2767 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2768 * the appropriate variation) reloc against it based on the symbol.
2769 * The linker will build the toc, and insert the resolved toc offset.
2770 *
2771 * Note:
2772 * o The size of the toc entry is currently assumed to be
2773 * 32 bits. This should not be assumed to be a hard coded
2774 * number.
2775 * o In an effort to cope with a change from 32 to 64 bits,
2776 * there are also toc entries that are specified to be
2777 * either 32 or 64 bits:
2778 * lwz r4,[toc32].GS.0.static_int(rtoc)
2779 * lwz r4,[toc64].GS.0.static_int(rtoc)
2780 * These demand toc entries of the specified size, and the
2781 * instruction probably requires it.
2782 */
2783
2784 int valid_toc;
2785 enum toc_size_qualifier toc_kind;
2786 bfd_reloc_code_real_type toc_reloc;
2787
2788 /* Go parse off the [tocXX] part. */
2789 valid_toc = parse_toc_entry (&toc_kind);
2790
2791 if (!valid_toc)
2792 {
2793 ignore_rest_of_line ();
2794 break;
2795 }
2796
2797 /* Now get the symbol following the ']'. */
2798 expression (&ex);
2799
2800 switch (toc_kind)
2801 {
2802 case default_toc:
2803 /* In this case, we may not have seen the symbol yet,
2804 since it is allowed to appear on a .extern or .globl
2805 or just be a label in the .data section. */
2806 toc_reloc = BFD_RELOC_PPC_TOC16;
2807 break;
2808 case data_in_toc:
2809 /* 1. The symbol must be defined and either in the toc
2810 section, or a global.
2811 2. The reloc generated must have the TOCDEFN flag set
2812 in upper bit mess of the reloc type.
2813 FIXME: It's a little confusing what the tocv
2814 qualifier can be used for. At the very least, I've
2815 seen three uses, only one of which I'm sure I can
2816 explain. */
2817 if (ex.X_op == O_symbol)
2818 {
2819 gas_assert (ex.X_add_symbol != NULL);
2820 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2821 != tocdata_section)
2822 {
2823 as_bad (_("[tocv] symbol is not a toc symbol"));
2824 }
2825 }
2826
2827 toc_reloc = BFD_RELOC_PPC_TOC16;
2828 break;
2829 case must_be_32:
2830 /* FIXME: these next two specifically specify 32/64 bit
2831 toc entries. We don't support them today. Is this
2832 the right way to say that? */
2833 toc_reloc = BFD_RELOC_UNUSED;
2834 as_bad (_("unimplemented toc32 expression modifier"));
2835 break;
2836 case must_be_64:
2837 /* FIXME: see above. */
2838 toc_reloc = BFD_RELOC_UNUSED;
2839 as_bad (_("unimplemented toc64 expression modifier"));
2840 break;
2841 default:
2842 fprintf (stderr,
2843 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2844 toc_kind);
2845 abort ();
2846 break;
2847 }
2848
2849 /* We need to generate a fixup for this expression. */
2850 if (fc >= MAX_INSN_FIXUPS)
2851 as_fatal (_("too many fixups"));
2852
2853 fixups[fc].reloc = toc_reloc;
2854 fixups[fc].exp = ex;
2855 fixups[fc].opindex = *opindex_ptr;
2856 ++fc;
2857
2858 /* Ok. We've set up the fixup for the instruction. Now make it
2859 look like the constant 0 was found here. */
2860 ex.X_unsigned = 1;
2861 ex.X_op = O_constant;
2862 ex.X_add_number = 0;
2863 ex.X_add_symbol = NULL;
2864 ex.X_op_symbol = NULL;
2865 }
2866
2867 else
2868 #endif /* TE_PE */
2869 {
2870 if ((reg_names_p
2871 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2872 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2873 || !register_name (&ex))
2874 {
2875 char save_lex = lex_type['%'];
2876
2877 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2878 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2879 {
2880 cr_operand = TRUE;
2881 lex_type['%'] |= LEX_BEGIN_NAME;
2882 }
2883 expression (&ex);
2884 cr_operand = FALSE;
2885 lex_type['%'] = save_lex;
2886 }
2887 }
2888
2889 str = input_line_pointer;
2890 input_line_pointer = hold;
2891
2892 if (ex.X_op == O_illegal)
2893 as_bad (_("illegal operand"));
2894 else if (ex.X_op == O_absent)
2895 as_bad (_("missing operand"));
2896 else if (ex.X_op == O_register)
2897 {
2898 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2899 ppc_cpu, (char *) NULL, 0);
2900 }
2901 else if (ex.X_op == O_constant)
2902 {
2903 #ifdef OBJ_ELF
2904 /* Allow @HA, @L, @H on constants. */
2905 bfd_reloc_code_real_type reloc;
2906 char *orig_str = str;
2907
2908 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2909 switch (reloc)
2910 {
2911 default:
2912 str = orig_str;
2913 break;
2914
2915 case BFD_RELOC_LO16:
2916 ex.X_add_number &= 0xffff;
2917 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2918 ex.X_add_number = SEX16 (ex.X_add_number);
2919 break;
2920
2921 case BFD_RELOC_HI16:
2922 if (REPORT_OVERFLOW_HI && ppc_obj64)
2923 {
2924 /* PowerPC64 @h is tested for overflow. */
2925 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2926 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2927 {
2928 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2929 ex.X_add_number
2930 = ((addressT) ex.X_add_number ^ sign) - sign;
2931 }
2932 break;
2933 }
2934 /* Fall thru */
2935
2936 case BFD_RELOC_PPC64_ADDR16_HIGH:
2937 ex.X_add_number = PPC_HI (ex.X_add_number);
2938 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2939 ex.X_add_number = SEX16 (ex.X_add_number);
2940 break;
2941
2942 case BFD_RELOC_HI16_S:
2943 if (REPORT_OVERFLOW_HI && ppc_obj64)
2944 {
2945 /* PowerPC64 @ha is tested for overflow. */
2946 ex.X_add_number
2947 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2948 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2949 {
2950 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2951 ex.X_add_number
2952 = ((addressT) ex.X_add_number ^ sign) - sign;
2953 }
2954 break;
2955 }
2956 /* Fall thru */
2957
2958 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2959 ex.X_add_number = PPC_HA (ex.X_add_number);
2960 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2961 ex.X_add_number = SEX16 (ex.X_add_number);
2962 break;
2963
2964 case BFD_RELOC_PPC64_HIGHER:
2965 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2966 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2967 ex.X_add_number = SEX16 (ex.X_add_number);
2968 break;
2969
2970 case BFD_RELOC_PPC64_HIGHER_S:
2971 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2972 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2973 ex.X_add_number = SEX16 (ex.X_add_number);
2974 break;
2975
2976 case BFD_RELOC_PPC64_HIGHEST:
2977 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2978 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2979 ex.X_add_number = SEX16 (ex.X_add_number);
2980 break;
2981
2982 case BFD_RELOC_PPC64_HIGHEST_S:
2983 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2984 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2985 ex.X_add_number = SEX16 (ex.X_add_number);
2986 break;
2987 }
2988 #endif /* OBJ_ELF */
2989 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2990 ppc_cpu, (char *) NULL, 0);
2991 }
2992 else
2993 {
2994 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2995 #ifdef OBJ_ELF
2996 if (ex.X_op == O_symbol && str[0] == '(')
2997 {
2998 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2999 if (sym_name[0] == '.')
3000 ++sym_name;
3001
3002 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3003 {
3004 expressionS tls_exp;
3005
3006 hold = input_line_pointer;
3007 input_line_pointer = str + 1;
3008 expression (&tls_exp);
3009 if (tls_exp.X_op == O_symbol)
3010 {
3011 reloc = BFD_RELOC_UNUSED;
3012 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3013 {
3014 reloc = BFD_RELOC_PPC_TLSGD;
3015 input_line_pointer += 7;
3016 }
3017 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3018 {
3019 reloc = BFD_RELOC_PPC_TLSLD;
3020 input_line_pointer += 7;
3021 }
3022 if (reloc != BFD_RELOC_UNUSED)
3023 {
3024 SKIP_WHITESPACE ();
3025 str = input_line_pointer;
3026
3027 if (fc >= MAX_INSN_FIXUPS)
3028 as_fatal (_("too many fixups"));
3029 fixups[fc].exp = tls_exp;
3030 fixups[fc].opindex = *opindex_ptr;
3031 fixups[fc].reloc = reloc;
3032 ++fc;
3033 }
3034 }
3035 input_line_pointer = hold;
3036 }
3037 }
3038
3039 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
3040 {
3041 /* Some TLS tweaks. */
3042 switch (reloc)
3043 {
3044 default:
3045 break;
3046
3047 case BFD_RELOC_PPC_TLS:
3048 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3049 as_bad (_("@tls may not be used with \"%s\" operands"),
3050 opcode->name);
3051 else if (operand->shift != 11)
3052 as_bad (_("@tls may only be used in last operand"));
3053 else
3054 insn = ppc_insert_operand (insn, operand,
3055 ppc_obj64 ? 13 : 2,
3056 ppc_cpu, (char *) NULL, 0);
3057 break;
3058
3059 /* We'll only use the 32 (or 64) bit form of these relocations
3060 in constants. Instructions get the 16 bit form. */
3061 case BFD_RELOC_PPC_DTPREL:
3062 reloc = BFD_RELOC_PPC_DTPREL16;
3063 break;
3064 case BFD_RELOC_PPC_TPREL:
3065 reloc = BFD_RELOC_PPC_TPREL16;
3066 break;
3067 }
3068
3069 /* If VLE-mode convert LO/HI/HA relocations. */
3070 if (opcode->flags & PPC_OPCODE_VLE)
3071 {
3072 int tmp_insn = insn & opcode->mask;
3073
3074 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3075 || tmp_insn == E_AND2I_DOT_INSN
3076 || tmp_insn == E_OR2IS_INSN
3077 || tmp_insn == E_LIS_INSN
3078 || tmp_insn == E_AND2IS_DOT_INSN);
3079
3080
3081 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3082 || tmp_insn == E_ADD2IS_INSN
3083 || tmp_insn == E_CMP16I_INSN
3084 || tmp_insn == E_MULL2I_INSN
3085 || tmp_insn == E_CMPL16I_INSN
3086 || tmp_insn == E_CMPH16I_INSN
3087 || tmp_insn == E_CMPHL16I_INSN);
3088
3089 switch (reloc)
3090 {
3091 default:
3092 break;
3093
3094 case BFD_RELOC_PPC_EMB_SDA21:
3095 reloc = BFD_RELOC_PPC_VLE_SDA21;
3096 break;
3097
3098 case BFD_RELOC_LO16:
3099 if (use_d_reloc)
3100 reloc = BFD_RELOC_PPC_VLE_LO16D;
3101 else if (use_a_reloc)
3102 reloc = BFD_RELOC_PPC_VLE_LO16A;
3103 break;
3104
3105 case BFD_RELOC_HI16:
3106 if (use_d_reloc)
3107 reloc = BFD_RELOC_PPC_VLE_HI16D;
3108 else if (use_a_reloc)
3109 reloc = BFD_RELOC_PPC_VLE_HI16A;
3110 break;
3111
3112 case BFD_RELOC_HI16_S:
3113 if (use_d_reloc)
3114 reloc = BFD_RELOC_PPC_VLE_HA16D;
3115 else if (use_a_reloc)
3116 reloc = BFD_RELOC_PPC_VLE_HA16A;
3117 break;
3118
3119 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3120 if (use_d_reloc)
3121 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3122 break;
3123
3124 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3125 if (use_d_reloc)
3126 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3127 break;
3128
3129 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3130 if (use_d_reloc)
3131 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3132 break;
3133 }
3134 }
3135 }
3136 #endif /* OBJ_ELF */
3137
3138 if (reloc != BFD_RELOC_UNUSED)
3139 ;
3140 /* Determine a BFD reloc value based on the operand information.
3141 We are only prepared to turn a few of the operands into
3142 relocs. */
3143 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3144 | PPC_OPERAND_ABSOLUTE)) != 0
3145 && operand->bitm == 0x3fffffc
3146 && operand->shift == 0)
3147 reloc = BFD_RELOC_PPC_B26;
3148 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3149 | PPC_OPERAND_ABSOLUTE)) != 0
3150 && operand->bitm == 0xfffc
3151 && operand->shift == 0)
3152 reloc = BFD_RELOC_PPC_B16;
3153 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3154 && operand->bitm == 0x1fe
3155 && operand->shift == -1)
3156 reloc = BFD_RELOC_PPC_VLE_REL8;
3157 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3158 && operand->bitm == 0xfffe
3159 && operand->shift == 0)
3160 reloc = BFD_RELOC_PPC_VLE_REL15;
3161 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3162 && operand->bitm == 0x1fffffe
3163 && operand->shift == 0)
3164 reloc = BFD_RELOC_PPC_VLE_REL24;
3165 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3166 && (operand->bitm & 0xfff0) == 0xfff0
3167 && operand->shift == 0)
3168 {
3169 reloc = BFD_RELOC_16;
3170 #ifdef OBJ_XCOFF
3171 /* Note: the symbol may be not yet defined. */
3172 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3173 && ppc_is_toc_sym (ex.X_add_symbol))
3174 reloc = BFD_RELOC_PPC_TOC16;
3175 #endif
3176 }
3177
3178 /* For the absolute forms of branches, convert the PC
3179 relative form back into the absolute. */
3180 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3181 {
3182 switch (reloc)
3183 {
3184 case BFD_RELOC_PPC_B26:
3185 reloc = BFD_RELOC_PPC_BA26;
3186 break;
3187 case BFD_RELOC_PPC_B16:
3188 reloc = BFD_RELOC_PPC_BA16;
3189 break;
3190 #ifdef OBJ_ELF
3191 case BFD_RELOC_PPC_B16_BRTAKEN:
3192 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3193 break;
3194 case BFD_RELOC_PPC_B16_BRNTAKEN:
3195 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3196 break;
3197 #endif
3198 default:
3199 break;
3200 }
3201 }
3202
3203 #ifdef OBJ_ELF
3204 switch (reloc)
3205 {
3206 case BFD_RELOC_PPC_TOC16:
3207 toc_reloc_types |= has_small_toc_reloc;
3208 break;
3209 case BFD_RELOC_PPC64_TOC16_LO:
3210 case BFD_RELOC_PPC64_TOC16_HI:
3211 case BFD_RELOC_PPC64_TOC16_HA:
3212 toc_reloc_types |= has_large_toc_reloc;
3213 break;
3214 default:
3215 break;
3216 }
3217
3218 if (ppc_obj64
3219 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3220 {
3221 switch (reloc)
3222 {
3223 case BFD_RELOC_16:
3224 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3225 break;
3226 case BFD_RELOC_LO16:
3227 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3228 break;
3229 case BFD_RELOC_16_GOTOFF:
3230 reloc = BFD_RELOC_PPC64_GOT16_DS;
3231 break;
3232 case BFD_RELOC_LO16_GOTOFF:
3233 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3234 break;
3235 case BFD_RELOC_LO16_PLTOFF:
3236 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3237 break;
3238 case BFD_RELOC_16_BASEREL:
3239 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3240 break;
3241 case BFD_RELOC_LO16_BASEREL:
3242 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3243 break;
3244 case BFD_RELOC_PPC_TOC16:
3245 reloc = BFD_RELOC_PPC64_TOC16_DS;
3246 break;
3247 case BFD_RELOC_PPC64_TOC16_LO:
3248 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3249 break;
3250 case BFD_RELOC_PPC64_PLTGOT16:
3251 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3252 break;
3253 case BFD_RELOC_PPC64_PLTGOT16_LO:
3254 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3255 break;
3256 case BFD_RELOC_PPC_DTPREL16:
3257 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3258 break;
3259 case BFD_RELOC_PPC_DTPREL16_LO:
3260 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3261 break;
3262 case BFD_RELOC_PPC_TPREL16:
3263 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3264 break;
3265 case BFD_RELOC_PPC_TPREL16_LO:
3266 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3267 break;
3268 case BFD_RELOC_PPC_GOT_DTPREL16:
3269 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3270 case BFD_RELOC_PPC_GOT_TPREL16:
3271 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3272 break;
3273 default:
3274 as_bad (_("unsupported relocation for DS offset field"));
3275 break;
3276 }
3277 }
3278 #endif
3279
3280 /* We need to generate a fixup for this expression. */
3281 if (fc >= MAX_INSN_FIXUPS)
3282 as_fatal (_("too many fixups"));
3283 fixups[fc].exp = ex;
3284 fixups[fc].opindex = *opindex_ptr;
3285 fixups[fc].reloc = reloc;
3286 ++fc;
3287 }
3288
3289 if (need_paren)
3290 {
3291 endc = ')';
3292 need_paren = 0;
3293 /* If expecting more operands, then we want to see "),". */
3294 if (*str == endc && opindex_ptr[1] != 0)
3295 {
3296 do
3297 ++str;
3298 while (ISSPACE (*str));
3299 endc = ',';
3300 }
3301 }
3302 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3303 {
3304 endc = '(';
3305 need_paren = 1;
3306 }
3307 else
3308 endc = ',';
3309
3310 /* The call to expression should have advanced str past any
3311 whitespace. */
3312 if (*str != endc
3313 && (endc != ',' || *str != '\0'))
3314 {
3315 if (*str == '\0')
3316 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3317 else
3318 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3319 break;
3320 }
3321
3322 if (*str != '\0')
3323 ++str;
3324 }
3325
3326 while (ISSPACE (*str))
3327 ++str;
3328
3329 if (*str != '\0')
3330 as_bad (_("junk at end of line: `%s'"), str);
3331
3332 #ifdef OBJ_ELF
3333 /* Do we need/want an APUinfo section? */
3334 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3335 && !ppc_obj64)
3336 {
3337 /* These are all version "1". */
3338 if (opcode->flags & PPC_OPCODE_SPE)
3339 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3340 if (opcode->flags & PPC_OPCODE_ISEL)
3341 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3342 if (opcode->flags & PPC_OPCODE_EFS)
3343 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3344 if (opcode->flags & PPC_OPCODE_BRLOCK)
3345 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3346 if (opcode->flags & PPC_OPCODE_PMR)
3347 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3348 if (opcode->flags & PPC_OPCODE_CACHELCK)
3349 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3350 if (opcode->flags & PPC_OPCODE_RFMCI)
3351 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3352 if (opcode->flags & PPC_OPCODE_VLE)
3353 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3354 }
3355 #endif
3356
3357 /* Write out the instruction. */
3358 /* Differentiate between two and four byte insns. */
3359 if (ppc_mach () == bfd_mach_ppc_vle)
3360 {
3361 if (PPC_OP_SE_VLE (insn))
3362 insn_length = 2;
3363 else
3364 insn_length = 4;
3365 addr_mod = frag_now_fix () & 1;
3366 }
3367 else
3368 {
3369 insn_length = 4;
3370 addr_mod = frag_now_fix () & 3;
3371 }
3372 /* All instructions can start on a 2 byte boundary for VLE. */
3373 f = frag_more (insn_length);
3374 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3375 {
3376 if (ppc_mach() == bfd_mach_ppc_vle)
3377 as_bad (_("instruction address is not a multiple of 2"));
3378 else
3379 as_bad (_("instruction address is not a multiple of 4"));
3380 }
3381 frag_now->insn_addr = addr_mod;
3382 frag_now->has_code = 1;
3383 md_number_to_chars (f, insn, insn_length);
3384
3385 #ifdef OBJ_ELF
3386 dwarf2_emit_insn (insn_length);
3387 #endif
3388
3389 /* Create any fixups. */
3390 for (i = 0; i < fc; i++)
3391 {
3392 fixS *fixP;
3393 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3394 {
3395 reloc_howto_type *reloc_howto;
3396 int size;
3397 int offset;
3398
3399 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3400 if (!reloc_howto)
3401 abort ();
3402
3403 size = bfd_get_reloc_size (reloc_howto);
3404 offset = target_big_endian ? (insn_length - size) : 0;
3405
3406 if (size < 1 || size > 4)
3407 abort ();
3408
3409 fixP = fix_new_exp (frag_now,
3410 f - frag_now->fr_literal + offset,
3411 size,
3412 &fixups[i].exp,
3413 reloc_howto->pc_relative,
3414 fixups[i].reloc);
3415 }
3416 else
3417 {
3418 const struct powerpc_operand *operand;
3419
3420 operand = &powerpc_operands[fixups[i].opindex];
3421 fixP = fix_new_exp (frag_now,
3422 f - frag_now->fr_literal,
3423 insn_length,
3424 &fixups[i].exp,
3425 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3426 BFD_RELOC_UNUSED);
3427 }
3428 fixP->fx_pcrel_adjust = fixups[i].opindex;
3429 }
3430 }
3431
3432 /* Handle a macro. Gather all the operands, transform them as
3433 described by the macro, and call md_assemble recursively. All the
3434 operands are separated by commas; we don't accept parentheses
3435 around operands here. */
3436
3437 static void
3438 ppc_macro (char *str, const struct powerpc_macro *macro)
3439 {
3440 char *operands[10];
3441 unsigned int count;
3442 char *s;
3443 unsigned int len;
3444 const char *format;
3445 unsigned int arg;
3446 char *send;
3447 char *complete;
3448
3449 /* Gather the users operands into the operands array. */
3450 count = 0;
3451 s = str;
3452 while (1)
3453 {
3454 if (count >= sizeof operands / sizeof operands[0])
3455 break;
3456 operands[count++] = s;
3457 s = strchr (s, ',');
3458 if (s == (char *) NULL)
3459 break;
3460 *s++ = '\0';
3461 }
3462
3463 if (count != macro->operands)
3464 {
3465 as_bad (_("wrong number of operands"));
3466 return;
3467 }
3468
3469 /* Work out how large the string must be (the size is unbounded
3470 because it includes user input). */
3471 len = 0;
3472 format = macro->format;
3473 while (*format != '\0')
3474 {
3475 if (*format != '%')
3476 {
3477 ++len;
3478 ++format;
3479 }
3480 else
3481 {
3482 arg = strtol (format + 1, &send, 10);
3483 know (send != format && arg < count);
3484 len += strlen (operands[arg]);
3485 format = send;
3486 }
3487 }
3488
3489 /* Put the string together. */
3490 complete = s = (char *) alloca (len + 1);
3491 format = macro->format;
3492 while (*format != '\0')
3493 {
3494 if (*format != '%')
3495 *s++ = *format++;
3496 else
3497 {
3498 arg = strtol (format + 1, &send, 10);
3499 strcpy (s, operands[arg]);
3500 s += strlen (s);
3501 format = send;
3502 }
3503 }
3504 *s = '\0';
3505
3506 /* Assemble the constructed instruction. */
3507 md_assemble (complete);
3508 }
3509 \f
3510 #ifdef OBJ_ELF
3511 /* For ELF, add support for SHT_ORDERED. */
3512
3513 int
3514 ppc_section_type (char *str, size_t len)
3515 {
3516 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3517 return SHT_ORDERED;
3518
3519 return -1;
3520 }
3521
3522 int
3523 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3524 {
3525 if (type == SHT_ORDERED)
3526 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3527
3528 return flags;
3529 }
3530 #endif /* OBJ_ELF */
3531
3532 \f
3533 /* Pseudo-op handling. */
3534
3535 /* The .byte pseudo-op. This is similar to the normal .byte
3536 pseudo-op, but it can also take a single ASCII string. */
3537
3538 static void
3539 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3540 {
3541 if (*input_line_pointer != '\"')
3542 {
3543 cons (1);
3544 return;
3545 }
3546
3547 /* Gather characters. A real double quote is doubled. Unusual
3548 characters are not permitted. */
3549 ++input_line_pointer;
3550 while (1)
3551 {
3552 char c;
3553
3554 c = *input_line_pointer++;
3555
3556 if (c == '\"')
3557 {
3558 if (*input_line_pointer != '\"')
3559 break;
3560 ++input_line_pointer;
3561 }
3562
3563 FRAG_APPEND_1_CHAR (c);
3564 }
3565
3566 demand_empty_rest_of_line ();
3567 }
3568 \f
3569 #ifdef OBJ_XCOFF
3570
3571 /* XCOFF specific pseudo-op handling. */
3572
3573 /* This is set if we are creating a .stabx symbol, since we don't want
3574 to handle symbol suffixes for such symbols. */
3575 static bfd_boolean ppc_stab_symbol;
3576
3577 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3578 symbols in the .bss segment as though they were local common
3579 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3580 aligns .comm and .lcomm to 4 bytes. */
3581
3582 static void
3583 ppc_comm (int lcomm)
3584 {
3585 asection *current_seg = now_seg;
3586 subsegT current_subseg = now_subseg;
3587 char *name;
3588 char endc;
3589 char *end_name;
3590 offsetT size;
3591 offsetT align;
3592 symbolS *lcomm_sym = NULL;
3593 symbolS *sym;
3594 char *pfrag;
3595
3596 name = input_line_pointer;
3597 endc = get_symbol_end ();
3598 end_name = input_line_pointer;
3599 *end_name = endc;
3600
3601 if (*input_line_pointer != ',')
3602 {
3603 as_bad (_("missing size"));
3604 ignore_rest_of_line ();
3605 return;
3606 }
3607 ++input_line_pointer;
3608
3609 size = get_absolute_expression ();
3610 if (size < 0)
3611 {
3612 as_bad (_("negative size"));
3613 ignore_rest_of_line ();
3614 return;
3615 }
3616
3617 if (! lcomm)
3618 {
3619 /* The third argument to .comm is the alignment. */
3620 if (*input_line_pointer != ',')
3621 align = 2;
3622 else
3623 {
3624 ++input_line_pointer;
3625 align = get_absolute_expression ();
3626 if (align <= 0)
3627 {
3628 as_warn (_("ignoring bad alignment"));
3629 align = 2;
3630 }
3631 }
3632 }
3633 else
3634 {
3635 char *lcomm_name;
3636 char lcomm_endc;
3637
3638 /* The third argument to .lcomm appears to be the real local
3639 common symbol to create. References to the symbol named in
3640 the first argument are turned into references to the third
3641 argument. */
3642 if (*input_line_pointer != ',')
3643 {
3644 as_bad (_("missing real symbol name"));
3645 ignore_rest_of_line ();
3646 return;
3647 }
3648 ++input_line_pointer;
3649
3650 lcomm_name = input_line_pointer;
3651 lcomm_endc = get_symbol_end ();
3652
3653 lcomm_sym = symbol_find_or_make (lcomm_name);
3654
3655 *input_line_pointer = lcomm_endc;
3656
3657 /* The fourth argument to .lcomm is the alignment. */
3658 if (*input_line_pointer != ',')
3659 {
3660 if (size <= 4)
3661 align = 2;
3662 else
3663 align = 3;
3664 }
3665 else
3666 {
3667 ++input_line_pointer;
3668 align = get_absolute_expression ();
3669 if (align <= 0)
3670 {
3671 as_warn (_("ignoring bad alignment"));
3672 align = 2;
3673 }
3674 }
3675 }
3676
3677 *end_name = '\0';
3678 sym = symbol_find_or_make (name);
3679 *end_name = endc;
3680
3681 if (S_IS_DEFINED (sym)
3682 || S_GET_VALUE (sym) != 0)
3683 {
3684 as_bad (_("attempt to redefine symbol"));
3685 ignore_rest_of_line ();
3686 return;
3687 }
3688
3689 record_alignment (bss_section, align);
3690
3691 if (! lcomm
3692 || ! S_IS_DEFINED (lcomm_sym))
3693 {
3694 symbolS *def_sym;
3695 offsetT def_size;
3696
3697 if (! lcomm)
3698 {
3699 def_sym = sym;
3700 def_size = size;
3701 S_SET_EXTERNAL (sym);
3702 }
3703 else
3704 {
3705 symbol_get_tc (lcomm_sym)->output = 1;
3706 def_sym = lcomm_sym;
3707 def_size = 0;
3708 }
3709
3710 subseg_set (bss_section, 1);
3711 frag_align (align, 0, 0);
3712
3713 symbol_set_frag (def_sym, frag_now);
3714 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3715 def_size, (char *) NULL);
3716 *pfrag = 0;
3717 S_SET_SEGMENT (def_sym, bss_section);
3718 symbol_get_tc (def_sym)->align = align;
3719 }
3720 else if (lcomm)
3721 {
3722 /* Align the size of lcomm_sym. */
3723 symbol_get_frag (lcomm_sym)->fr_offset =
3724 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3725 &~ ((1 << align) - 1));
3726 if (align > symbol_get_tc (lcomm_sym)->align)
3727 symbol_get_tc (lcomm_sym)->align = align;
3728 }
3729
3730 if (lcomm)
3731 {
3732 /* Make sym an offset from lcomm_sym. */
3733 S_SET_SEGMENT (sym, bss_section);
3734 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3735 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3736 symbol_get_frag (lcomm_sym)->fr_offset += size;
3737 }
3738
3739 subseg_set (current_seg, current_subseg);
3740
3741 demand_empty_rest_of_line ();
3742 }
3743
3744 /* The .csect pseudo-op. This switches us into a different
3745 subsegment. The first argument is a symbol whose value is the
3746 start of the .csect. In COFF, csect symbols get special aux
3747 entries defined by the x_csect field of union internal_auxent. The
3748 optional second argument is the alignment (the default is 2). */
3749
3750 static void
3751 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3752 {
3753 char *name;
3754 char endc;
3755 symbolS *sym;
3756 offsetT align;
3757
3758 name = input_line_pointer;
3759 endc = get_symbol_end ();
3760
3761 sym = symbol_find_or_make (name);
3762
3763 *input_line_pointer = endc;
3764
3765 if (S_GET_NAME (sym)[0] == '\0')
3766 {
3767 /* An unnamed csect is assumed to be [PR]. */
3768 symbol_get_tc (sym)->symbol_class = XMC_PR;
3769 }
3770
3771 align = 2;
3772 if (*input_line_pointer == ',')
3773 {
3774 ++input_line_pointer;
3775 align = get_absolute_expression ();
3776 }
3777
3778 ppc_change_csect (sym, align);
3779
3780 demand_empty_rest_of_line ();
3781 }
3782
3783 /* Change to a different csect. */
3784
3785 static void
3786 ppc_change_csect (symbolS *sym, offsetT align)
3787 {
3788 if (S_IS_DEFINED (sym))
3789 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3790 else
3791 {
3792 symbolS **list_ptr;
3793 int after_toc;
3794 int hold_chunksize;
3795 symbolS *list;
3796 int is_code;
3797 segT sec;
3798
3799 /* This is a new csect. We need to look at the symbol class to
3800 figure out whether it should go in the text section or the
3801 data section. */
3802 after_toc = 0;
3803 is_code = 0;
3804 switch (symbol_get_tc (sym)->symbol_class)
3805 {
3806 case XMC_PR:
3807 case XMC_RO:
3808 case XMC_DB:
3809 case XMC_GL:
3810 case XMC_XO:
3811 case XMC_SV:
3812 case XMC_TI:
3813 case XMC_TB:
3814 S_SET_SEGMENT (sym, text_section);
3815 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3816 ++ppc_text_subsegment;
3817 list_ptr = &ppc_text_csects;
3818 is_code = 1;
3819 break;
3820 case XMC_RW:
3821 case XMC_TC0:
3822 case XMC_TC:
3823 case XMC_DS:
3824 case XMC_UA:
3825 case XMC_BS:
3826 case XMC_UC:
3827 if (ppc_toc_csect != NULL
3828 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3829 == ppc_data_subsegment))
3830 after_toc = 1;
3831 S_SET_SEGMENT (sym, data_section);
3832 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3833 ++ppc_data_subsegment;
3834 list_ptr = &ppc_data_csects;
3835 break;
3836 default:
3837 abort ();
3838 }
3839
3840 /* We set the obstack chunk size to a small value before
3841 changing subsegments, so that we don't use a lot of memory
3842 space for what may be a small section. */
3843 hold_chunksize = chunksize;
3844 chunksize = 64;
3845
3846 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3847 symbol_get_tc (sym)->subseg);
3848
3849 chunksize = hold_chunksize;
3850
3851 if (after_toc)
3852 ppc_after_toc_frag = frag_now;
3853
3854 record_alignment (sec, align);
3855 if (is_code)
3856 frag_align_code (align, 0);
3857 else
3858 frag_align (align, 0, 0);
3859
3860 symbol_set_frag (sym, frag_now);
3861 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3862
3863 symbol_get_tc (sym)->align = align;
3864 symbol_get_tc (sym)->output = 1;
3865 symbol_get_tc (sym)->within = sym;
3866
3867 for (list = *list_ptr;
3868 symbol_get_tc (list)->next != (symbolS *) NULL;
3869 list = symbol_get_tc (list)->next)
3870 ;
3871 symbol_get_tc (list)->next = sym;
3872
3873 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3874 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3875 &symbol_lastP);
3876 }
3877
3878 ppc_current_csect = sym;
3879 }
3880
3881 static void
3882 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3883 {
3884 segT sec;
3885 flagword oldflags;
3886 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3887
3888 sec = subseg_new (dw->name, subseg);
3889 oldflags = bfd_get_section_flags (stdoutput, sec);
3890 if (oldflags == SEC_NO_FLAGS)
3891 {
3892 /* Just created section. */
3893 gas_assert (dw_sections[idx].sect == NULL);
3894
3895 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3896 bfd_set_section_alignment (stdoutput, sec, 0);
3897 dw_sections[idx].sect = sec;
3898 }
3899
3900 /* Not anymore in a csect. */
3901 ppc_current_csect = NULL;
3902 }
3903
3904 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3905 .dwsect flag [, opt-label ]
3906 */
3907
3908 static void
3909 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3910 {
3911 offsetT flag;
3912 symbolS *opt_label;
3913 const struct xcoff_dwsect_name *dw;
3914 struct dw_subsection *subseg;
3915 struct dw_section *dws;
3916 int i;
3917
3918 /* Find section. */
3919 flag = get_absolute_expression ();
3920 dw = NULL;
3921 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3922 if (xcoff_dwsect_names[i].flag == flag)
3923 {
3924 dw = &xcoff_dwsect_names[i];
3925 break;
3926 }
3927
3928 /* Parse opt-label. */
3929 if (*input_line_pointer == ',')
3930 {
3931 const char *label;
3932 char c;
3933
3934 ++input_line_pointer;
3935
3936 label = input_line_pointer;
3937 c = get_symbol_end ();
3938 opt_label = symbol_find_or_make (label);
3939 *input_line_pointer = c;
3940 }
3941 else
3942 opt_label = NULL;
3943
3944 demand_empty_rest_of_line ();
3945
3946 /* Return now in case of unknown subsection. */
3947 if (dw == NULL)
3948 {
3949 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3950 (unsigned)flag);
3951 return;
3952 }
3953
3954 /* Find the subsection. */
3955 dws = &dw_sections[i];
3956 subseg = NULL;
3957 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3958 {
3959 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3960 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3961 {
3962 as_bad (_("label %s was not defined in this dwarf section"),
3963 S_GET_NAME (opt_label));
3964 subseg = dws->anon_subseg;
3965 opt_label = NULL;
3966 }
3967 else
3968 subseg = symbol_get_tc (opt_label)->u.dw;
3969 }
3970
3971 if (subseg != NULL)
3972 {
3973 /* Switch to the subsection. */
3974 ppc_change_debug_section (i, subseg->subseg);
3975 }
3976 else
3977 {
3978 /* Create a new dw subsection. */
3979 subseg = (struct dw_subsection *)
3980 xmalloc (sizeof (struct dw_subsection));
3981
3982 if (opt_label == NULL)
3983 {
3984 /* The anonymous one. */
3985 subseg->subseg = 0;
3986 subseg->link = NULL;
3987 dws->anon_subseg = subseg;
3988 }
3989 else
3990 {
3991 /* A named one. */
3992 if (dws->list_subseg != NULL)
3993 subseg->subseg = dws->list_subseg->subseg + 1;
3994 else
3995 subseg->subseg = 1;
3996
3997 subseg->link = dws->list_subseg;
3998 dws->list_subseg = subseg;
3999 symbol_get_tc (opt_label)->u.dw = subseg;
4000 }
4001
4002 ppc_change_debug_section (i, subseg->subseg);
4003
4004 if (dw->def_size)
4005 {
4006 /* Add the length field. */
4007 expressionS *exp = &subseg->end_exp;
4008 int sz;
4009
4010 if (opt_label != NULL)
4011 symbol_set_value_now (opt_label);
4012
4013 /* Add the length field. Note that according to the AIX assembler
4014 manual, the size of the length field is 4 for powerpc32 but
4015 12 for powerpc64. */
4016 if (ppc_obj64)
4017 {
4018 /* Write the 64bit marker. */
4019 md_number_to_chars (frag_more (4), -1, 4);
4020 }
4021
4022 exp->X_op = O_subtract;
4023 exp->X_op_symbol = symbol_temp_new_now ();
4024 exp->X_add_symbol = symbol_temp_make ();
4025
4026 sz = ppc_obj64 ? 8 : 4;
4027 exp->X_add_number = -sz;
4028 emit_expr (exp, sz);
4029 }
4030 }
4031 }
4032
4033 /* This function handles the .text and .data pseudo-ops. These
4034 pseudo-ops aren't really used by XCOFF; we implement them for the
4035 convenience of people who aren't used to XCOFF. */
4036
4037 static void
4038 ppc_section (int type)
4039 {
4040 const char *name;
4041 symbolS *sym;
4042
4043 if (type == 't')
4044 name = ".text[PR]";
4045 else if (type == 'd')
4046 name = ".data[RW]";
4047 else
4048 abort ();
4049
4050 sym = symbol_find_or_make (name);
4051
4052 ppc_change_csect (sym, 2);
4053
4054 demand_empty_rest_of_line ();
4055 }
4056
4057 /* This function handles the .section pseudo-op. This is mostly to
4058 give an error, since XCOFF only supports .text, .data and .bss, but
4059 we do permit the user to name the text or data section. */
4060
4061 static void
4062 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4063 {
4064 char *user_name;
4065 const char *real_name;
4066 char c;
4067 symbolS *sym;
4068
4069 user_name = input_line_pointer;
4070 c = get_symbol_end ();
4071
4072 if (strcmp (user_name, ".text") == 0)
4073 real_name = ".text[PR]";
4074 else if (strcmp (user_name, ".data") == 0)
4075 real_name = ".data[RW]";
4076 else
4077 {
4078 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4079 *input_line_pointer = c;
4080 ignore_rest_of_line ();
4081 return;
4082 }
4083
4084 *input_line_pointer = c;
4085
4086 sym = symbol_find_or_make (real_name);
4087
4088 ppc_change_csect (sym, 2);
4089
4090 demand_empty_rest_of_line ();
4091 }
4092
4093 /* The .extern pseudo-op. We create an undefined symbol. */
4094
4095 static void
4096 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4097 {
4098 char *name;
4099 char endc;
4100
4101 name = input_line_pointer;
4102 endc = get_symbol_end ();
4103
4104 (void) symbol_find_or_make (name);
4105
4106 *input_line_pointer = endc;
4107
4108 demand_empty_rest_of_line ();
4109 }
4110
4111 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4112
4113 static void
4114 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4115 {
4116 char *name;
4117 char endc;
4118 symbolS *sym;
4119
4120 name = input_line_pointer;
4121 endc = get_symbol_end ();
4122
4123 sym = symbol_find_or_make (name);
4124
4125 *input_line_pointer = endc;
4126
4127 symbol_get_tc (sym)->output = 1;
4128
4129 demand_empty_rest_of_line ();
4130 }
4131
4132 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4133 relocations at the beginning of the current csect.
4134
4135 (In principle, there's no reason why the relocations _have_ to be at
4136 the beginning. Anywhere in the csect would do. However, inserting
4137 at the beginning is what the native assmebler does, and it helps to
4138 deal with cases where the .ref statements follow the section contents.)
4139
4140 ??? .refs don't work for empty .csects. However, the native assembler
4141 doesn't report an error in this case, and neither yet do we. */
4142
4143 static void
4144 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4145 {
4146 char *name;
4147 char c;
4148
4149 if (ppc_current_csect == NULL)
4150 {
4151 as_bad (_(".ref outside .csect"));
4152 ignore_rest_of_line ();
4153 return;
4154 }
4155
4156 do
4157 {
4158 name = input_line_pointer;
4159 c = get_symbol_end ();
4160
4161 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4162 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4163
4164 *input_line_pointer = c;
4165 SKIP_WHITESPACE ();
4166 c = *input_line_pointer;
4167 if (c == ',')
4168 {
4169 input_line_pointer++;
4170 SKIP_WHITESPACE ();
4171 if (is_end_of_line[(unsigned char) *input_line_pointer])
4172 {
4173 as_bad (_("missing symbol name"));
4174 ignore_rest_of_line ();
4175 return;
4176 }
4177 }
4178 }
4179 while (c == ',');
4180
4181 demand_empty_rest_of_line ();
4182 }
4183
4184 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4185 although I don't know why it bothers. */
4186
4187 static void
4188 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4189 {
4190 char *name;
4191 char endc;
4192 symbolS *sym;
4193 int len;
4194
4195 name = input_line_pointer;
4196 endc = get_symbol_end ();
4197
4198 sym = symbol_find_or_make (name);
4199
4200 *input_line_pointer = endc;
4201
4202 if (*input_line_pointer != ',')
4203 {
4204 as_bad (_("missing rename string"));
4205 ignore_rest_of_line ();
4206 return;
4207 }
4208 ++input_line_pointer;
4209
4210 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4211
4212 demand_empty_rest_of_line ();
4213 }
4214
4215 /* The .stabx pseudo-op. This is similar to a normal .stabs
4216 pseudo-op, but slightly different. A sample is
4217 .stabx "main:F-1",.main,142,0
4218 The first argument is the symbol name to create. The second is the
4219 value, and the third is the storage class. The fourth seems to be
4220 always zero, and I am assuming it is the type. */
4221
4222 static void
4223 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4224 {
4225 char *name;
4226 int len;
4227 symbolS *sym;
4228 expressionS exp;
4229
4230 name = demand_copy_C_string (&len);
4231
4232 if (*input_line_pointer != ',')
4233 {
4234 as_bad (_("missing value"));
4235 return;
4236 }
4237 ++input_line_pointer;
4238
4239 ppc_stab_symbol = TRUE;
4240 sym = symbol_make (name);
4241 ppc_stab_symbol = FALSE;
4242
4243 symbol_get_tc (sym)->real_name = name;
4244
4245 (void) expression (&exp);
4246
4247 switch (exp.X_op)
4248 {
4249 case O_illegal:
4250 case O_absent:
4251 case O_big:
4252 as_bad (_("illegal .stabx expression; zero assumed"));
4253 exp.X_add_number = 0;
4254 /* Fall through. */
4255 case O_constant:
4256 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4257 symbol_set_frag (sym, &zero_address_frag);
4258 break;
4259
4260 case O_symbol:
4261 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4262 symbol_set_value_expression (sym, &exp);
4263 else
4264 {
4265 S_SET_VALUE (sym,
4266 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4267 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4268 }
4269 break;
4270
4271 default:
4272 /* The value is some complex expression. This will probably
4273 fail at some later point, but this is probably the right
4274 thing to do here. */
4275 symbol_set_value_expression (sym, &exp);
4276 break;
4277 }
4278
4279 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4280 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4281
4282 if (*input_line_pointer != ',')
4283 {
4284 as_bad (_("missing class"));
4285 return;
4286 }
4287 ++input_line_pointer;
4288
4289 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4290
4291 if (*input_line_pointer != ',')
4292 {
4293 as_bad (_("missing type"));
4294 return;
4295 }
4296 ++input_line_pointer;
4297
4298 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4299
4300 symbol_get_tc (sym)->output = 1;
4301
4302 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4303 {
4304 /* In this case :
4305
4306 .bs name
4307 .stabx "z",arrays_,133,0
4308 .es
4309
4310 .comm arrays_,13768,3
4311
4312 resolve_symbol_value will copy the exp's "within" into sym's when the
4313 offset is 0. Since this seems to be corner case problem,
4314 only do the correction for storage class C_STSYM. A better solution
4315 would be to have the tc field updated in ppc_symbol_new_hook. */
4316
4317 if (exp.X_op == O_symbol)
4318 {
4319 if (ppc_current_block == NULL)
4320 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4321
4322 symbol_get_tc (sym)->within = ppc_current_block;
4323 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4324 }
4325 }
4326
4327 if (exp.X_op != O_symbol
4328 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4329 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4330 ppc_frob_label (sym);
4331 else
4332 {
4333 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4334 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4335 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4336 symbol_get_tc (ppc_current_csect)->within = sym;
4337 }
4338
4339 demand_empty_rest_of_line ();
4340 }
4341
4342 /* The .function pseudo-op. This takes several arguments. The first
4343 argument seems to be the external name of the symbol. The second
4344 argument seems to be the label for the start of the function. gcc
4345 uses the same name for both. I have no idea what the third and
4346 fourth arguments are meant to be. The optional fifth argument is
4347 an expression for the size of the function. In COFF this symbol
4348 gets an aux entry like that used for a csect. */
4349
4350 static void
4351 ppc_function (int ignore ATTRIBUTE_UNUSED)
4352 {
4353 char *name;
4354 char endc;
4355 char *s;
4356 symbolS *ext_sym;
4357 symbolS *lab_sym;
4358
4359 name = input_line_pointer;
4360 endc = get_symbol_end ();
4361
4362 /* Ignore any [PR] suffix. */
4363 name = ppc_canonicalize_symbol_name (name);
4364 s = strchr (name, '[');
4365 if (s != (char *) NULL
4366 && strcmp (s + 1, "PR]") == 0)
4367 *s = '\0';
4368
4369 ext_sym = symbol_find_or_make (name);
4370
4371 *input_line_pointer = endc;
4372
4373 if (*input_line_pointer != ',')
4374 {
4375 as_bad (_("missing symbol name"));
4376 ignore_rest_of_line ();
4377 return;
4378 }
4379 ++input_line_pointer;
4380
4381 name = input_line_pointer;
4382 endc = get_symbol_end ();
4383
4384 lab_sym = symbol_find_or_make (name);
4385
4386 *input_line_pointer = endc;
4387
4388 if (ext_sym != lab_sym)
4389 {
4390 expressionS exp;
4391
4392 exp.X_op = O_symbol;
4393 exp.X_add_symbol = lab_sym;
4394 exp.X_op_symbol = NULL;
4395 exp.X_add_number = 0;
4396 exp.X_unsigned = 0;
4397 symbol_set_value_expression (ext_sym, &exp);
4398 }
4399
4400 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4401 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4402 symbol_get_tc (ext_sym)->output = 1;
4403
4404 if (*input_line_pointer == ',')
4405 {
4406 expressionS exp;
4407
4408 /* Ignore the third argument. */
4409 ++input_line_pointer;
4410 expression (& exp);
4411 if (*input_line_pointer == ',')
4412 {
4413 /* Ignore the fourth argument. */
4414 ++input_line_pointer;
4415 expression (& exp);
4416 if (*input_line_pointer == ',')
4417 {
4418 /* The fifth argument is the function size. */
4419 ++input_line_pointer;
4420 symbol_get_tc (ext_sym)->u.size = symbol_new
4421 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4422 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4423 }
4424 }
4425 }
4426
4427 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4428 SF_SET_FUNCTION (ext_sym);
4429 SF_SET_PROCESS (ext_sym);
4430 coff_add_linesym (ext_sym);
4431
4432 demand_empty_rest_of_line ();
4433 }
4434
4435 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4436 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4437 with the correct line number */
4438
4439 static symbolS *saved_bi_sym = 0;
4440
4441 static void
4442 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4443 {
4444 symbolS *sym;
4445
4446 sym = symbol_make (".bf");
4447 S_SET_SEGMENT (sym, text_section);
4448 symbol_set_frag (sym, frag_now);
4449 S_SET_VALUE (sym, frag_now_fix ());
4450 S_SET_STORAGE_CLASS (sym, C_FCN);
4451
4452 coff_line_base = get_absolute_expression ();
4453
4454 S_SET_NUMBER_AUXILIARY (sym, 1);
4455 SA_SET_SYM_LNNO (sym, coff_line_base);
4456
4457 /* Line number for bi. */
4458 if (saved_bi_sym)
4459 {
4460 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4461 saved_bi_sym = 0;
4462 }
4463
4464
4465 symbol_get_tc (sym)->output = 1;
4466
4467 ppc_frob_label (sym);
4468
4469 demand_empty_rest_of_line ();
4470 }
4471
4472 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4473 ".ef", except that the line number is absolute, not relative to the
4474 most recent ".bf" symbol. */
4475
4476 static void
4477 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4478 {
4479 symbolS *sym;
4480
4481 sym = symbol_make (".ef");
4482 S_SET_SEGMENT (sym, text_section);
4483 symbol_set_frag (sym, frag_now);
4484 S_SET_VALUE (sym, frag_now_fix ());
4485 S_SET_STORAGE_CLASS (sym, C_FCN);
4486 S_SET_NUMBER_AUXILIARY (sym, 1);
4487 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4488 symbol_get_tc (sym)->output = 1;
4489
4490 ppc_frob_label (sym);
4491
4492 demand_empty_rest_of_line ();
4493 }
4494
4495 /* The .bi and .ei pseudo-ops. These take a string argument and
4496 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4497 the symbol list. The value of .bi will be know when the next .bf
4498 is encountered. */
4499
4500 static void
4501 ppc_biei (int ei)
4502 {
4503 static symbolS *last_biei;
4504
4505 char *name;
4506 int len;
4507 symbolS *sym;
4508 symbolS *look;
4509
4510 name = demand_copy_C_string (&len);
4511
4512 /* The value of these symbols is actually file offset. Here we set
4513 the value to the index into the line number entries. In
4514 ppc_frob_symbols we set the fix_line field, which will cause BFD
4515 to do the right thing. */
4516
4517 sym = symbol_make (name);
4518 /* obj-coff.c currently only handles line numbers correctly in the
4519 .text section. */
4520 S_SET_SEGMENT (sym, text_section);
4521 S_SET_VALUE (sym, coff_n_line_nos);
4522 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4523
4524 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4525 symbol_get_tc (sym)->output = 1;
4526
4527 /* Save bi. */
4528 if (ei)
4529 saved_bi_sym = 0;
4530 else
4531 saved_bi_sym = sym;
4532
4533 for (look = last_biei ? last_biei : symbol_rootP;
4534 (look != (symbolS *) NULL
4535 && (S_GET_STORAGE_CLASS (look) == C_FILE
4536 || S_GET_STORAGE_CLASS (look) == C_BINCL
4537 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4538 look = symbol_next (look))
4539 ;
4540 if (look != (symbolS *) NULL)
4541 {
4542 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4543 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4544 last_biei = sym;
4545 }
4546
4547 demand_empty_rest_of_line ();
4548 }
4549
4550 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4551 There is one argument, which is a csect symbol. The value of the
4552 .bs symbol is the index of this csect symbol. */
4553
4554 static void
4555 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4556 {
4557 char *name;
4558 char endc;
4559 symbolS *csect;
4560 symbolS *sym;
4561
4562 if (ppc_current_block != NULL)
4563 as_bad (_("nested .bs blocks"));
4564
4565 name = input_line_pointer;
4566 endc = get_symbol_end ();
4567
4568 csect = symbol_find_or_make (name);
4569
4570 *input_line_pointer = endc;
4571
4572 sym = symbol_make (".bs");
4573 S_SET_SEGMENT (sym, now_seg);
4574 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4575 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4576 symbol_get_tc (sym)->output = 1;
4577
4578 symbol_get_tc (sym)->within = csect;
4579
4580 ppc_frob_label (sym);
4581
4582 ppc_current_block = sym;
4583
4584 demand_empty_rest_of_line ();
4585 }
4586
4587 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4588
4589 static void
4590 ppc_es (int ignore ATTRIBUTE_UNUSED)
4591 {
4592 symbolS *sym;
4593
4594 if (ppc_current_block == NULL)
4595 as_bad (_(".es without preceding .bs"));
4596
4597 sym = symbol_make (".es");
4598 S_SET_SEGMENT (sym, now_seg);
4599 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4600 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4601 symbol_get_tc (sym)->output = 1;
4602
4603 ppc_frob_label (sym);
4604
4605 ppc_current_block = NULL;
4606
4607 demand_empty_rest_of_line ();
4608 }
4609
4610 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4611 line number. */
4612
4613 static void
4614 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4615 {
4616 symbolS *sym;
4617
4618 sym = symbol_make (".bb");
4619 S_SET_SEGMENT (sym, text_section);
4620 symbol_set_frag (sym, frag_now);
4621 S_SET_VALUE (sym, frag_now_fix ());
4622 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4623
4624 S_SET_NUMBER_AUXILIARY (sym, 1);
4625 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4626
4627 symbol_get_tc (sym)->output = 1;
4628
4629 SF_SET_PROCESS (sym);
4630
4631 ppc_frob_label (sym);
4632
4633 demand_empty_rest_of_line ();
4634 }
4635
4636 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4637 line number. */
4638
4639 static void
4640 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4641 {
4642 symbolS *sym;
4643
4644 sym = symbol_make (".eb");
4645 S_SET_SEGMENT (sym, text_section);
4646 symbol_set_frag (sym, frag_now);
4647 S_SET_VALUE (sym, frag_now_fix ());
4648 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4649 S_SET_NUMBER_AUXILIARY (sym, 1);
4650 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4651 symbol_get_tc (sym)->output = 1;
4652
4653 SF_SET_PROCESS (sym);
4654
4655 ppc_frob_label (sym);
4656
4657 demand_empty_rest_of_line ();
4658 }
4659
4660 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4661 specified name. */
4662
4663 static void
4664 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4665 {
4666 char *name;
4667 int len;
4668 symbolS *sym;
4669
4670 name = demand_copy_C_string (&len);
4671 sym = symbol_make (name);
4672 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4673 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4674 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4675 S_SET_VALUE (sym, 0);
4676 symbol_get_tc (sym)->output = 1;
4677
4678 ppc_frob_label (sym);
4679
4680 demand_empty_rest_of_line ();
4681 }
4682
4683 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4684
4685 static void
4686 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4687 {
4688 symbolS *sym;
4689
4690 sym = symbol_make (".ec");
4691 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4692 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4693 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4694 S_SET_VALUE (sym, 0);
4695 symbol_get_tc (sym)->output = 1;
4696
4697 ppc_frob_label (sym);
4698
4699 demand_empty_rest_of_line ();
4700 }
4701
4702 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4703
4704 static void
4705 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4706 {
4707 if (ppc_toc_csect != (symbolS *) NULL)
4708 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4709 else
4710 {
4711 subsegT subseg;
4712 symbolS *sym;
4713 symbolS *list;
4714
4715 subseg = ppc_data_subsegment;
4716 ++ppc_data_subsegment;
4717
4718 subseg_new (segment_name (data_section), subseg);
4719 ppc_toc_frag = frag_now;
4720
4721 sym = symbol_find_or_make ("TOC[TC0]");
4722 symbol_set_frag (sym, frag_now);
4723 S_SET_SEGMENT (sym, data_section);
4724 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4725 symbol_get_tc (sym)->subseg = subseg;
4726 symbol_get_tc (sym)->output = 1;
4727 symbol_get_tc (sym)->within = sym;
4728
4729 ppc_toc_csect = sym;
4730
4731 for (list = ppc_data_csects;
4732 symbol_get_tc (list)->next != (symbolS *) NULL;
4733 list = symbol_get_tc (list)->next)
4734 ;
4735 symbol_get_tc (list)->next = sym;
4736
4737 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4738 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4739 &symbol_lastP);
4740 }
4741
4742 ppc_current_csect = ppc_toc_csect;
4743
4744 demand_empty_rest_of_line ();
4745 }
4746
4747 /* The AIX assembler automatically aligns the operands of a .long or
4748 .short pseudo-op, and we want to be compatible. */
4749
4750 static void
4751 ppc_xcoff_cons (int log_size)
4752 {
4753 frag_align (log_size, 0, 0);
4754 record_alignment (now_seg, log_size);
4755 cons (1 << log_size);
4756 }
4757
4758 static void
4759 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4760 {
4761 expressionS exp;
4762 int byte_count;
4763
4764 (void) expression (&exp);
4765
4766 if (exp.X_op != O_constant)
4767 {
4768 as_bad (_("non-constant byte count"));
4769 return;
4770 }
4771
4772 byte_count = exp.X_add_number;
4773
4774 if (*input_line_pointer != ',')
4775 {
4776 as_bad (_("missing value"));
4777 return;
4778 }
4779
4780 ++input_line_pointer;
4781 cons (byte_count);
4782 }
4783
4784 void
4785 ppc_xcoff_end (void)
4786 {
4787 int i;
4788
4789 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4790 {
4791 struct dw_section *dws = &dw_sections[i];
4792 struct dw_subsection *dwss;
4793
4794 if (dws->anon_subseg)
4795 {
4796 dwss = dws->anon_subseg;
4797 dwss->link = dws->list_subseg;
4798 }
4799 else
4800 dwss = dws->list_subseg;
4801
4802 for (; dwss != NULL; dwss = dwss->link)
4803 if (dwss->end_exp.X_add_symbol != NULL)
4804 {
4805 subseg_set (dws->sect, dwss->subseg);
4806 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4807 }
4808 }
4809 }
4810
4811 #endif /* OBJ_XCOFF */
4812 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4813 \f
4814 /* The .tc pseudo-op. This is used when generating either XCOFF or
4815 ELF. This takes two or more arguments.
4816
4817 When generating XCOFF output, the first argument is the name to
4818 give to this location in the toc; this will be a symbol with class
4819 TC. The rest of the arguments are N-byte values to actually put at
4820 this location in the TOC; often there is just one more argument, a
4821 relocatable symbol reference. The size of the value to store
4822 depends on target word size. A 32-bit target uses 4-byte values, a
4823 64-bit target uses 8-byte values.
4824
4825 When not generating XCOFF output, the arguments are the same, but
4826 the first argument is simply ignored. */
4827
4828 static void
4829 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4830 {
4831 #ifdef OBJ_XCOFF
4832
4833 /* Define the TOC symbol name. */
4834 {
4835 char *name;
4836 char endc;
4837 symbolS *sym;
4838
4839 if (ppc_toc_csect == (symbolS *) NULL
4840 || ppc_toc_csect != ppc_current_csect)
4841 {
4842 as_bad (_(".tc not in .toc section"));
4843 ignore_rest_of_line ();
4844 return;
4845 }
4846
4847 name = input_line_pointer;
4848 endc = get_symbol_end ();
4849
4850 sym = symbol_find_or_make (name);
4851
4852 *input_line_pointer = endc;
4853
4854 if (S_IS_DEFINED (sym))
4855 {
4856 symbolS *label;
4857
4858 label = symbol_get_tc (ppc_current_csect)->within;
4859 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4860 {
4861 as_bad (_(".tc with no label"));
4862 ignore_rest_of_line ();
4863 return;
4864 }
4865
4866 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4867 symbol_set_frag (label, symbol_get_frag (sym));
4868 S_SET_VALUE (label, S_GET_VALUE (sym));
4869
4870 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4871 ++input_line_pointer;
4872
4873 return;
4874 }
4875
4876 S_SET_SEGMENT (sym, now_seg);
4877 symbol_set_frag (sym, frag_now);
4878 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4879 symbol_get_tc (sym)->symbol_class = XMC_TC;
4880 symbol_get_tc (sym)->output = 1;
4881
4882 ppc_frob_label (sym);
4883 }
4884
4885 #endif /* OBJ_XCOFF */
4886 #ifdef OBJ_ELF
4887 int align;
4888
4889 /* Skip the TOC symbol name. */
4890 while (is_part_of_name (*input_line_pointer)
4891 || *input_line_pointer == ' '
4892 || *input_line_pointer == '['
4893 || *input_line_pointer == ']'
4894 || *input_line_pointer == '{'
4895 || *input_line_pointer == '}')
4896 ++input_line_pointer;
4897
4898 /* Align to a four/eight byte boundary. */
4899 align = ppc_obj64 ? 3 : 2;
4900 frag_align (align, 0, 0);
4901 record_alignment (now_seg, align);
4902 #endif /* OBJ_ELF */
4903
4904 if (*input_line_pointer != ',')
4905 demand_empty_rest_of_line ();
4906 else
4907 {
4908 ++input_line_pointer;
4909 cons (ppc_obj64 ? 8 : 4);
4910 }
4911 }
4912
4913 /* Pseudo-op .machine. */
4914
4915 static void
4916 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4917 {
4918 char *cpu_string;
4919 #define MAX_HISTORY 100
4920 static ppc_cpu_t *cpu_history;
4921 static int curr_hist;
4922
4923 SKIP_WHITESPACE ();
4924
4925 if (*input_line_pointer == '"')
4926 {
4927 int len;
4928 cpu_string = demand_copy_C_string (&len);
4929 }
4930 else
4931 {
4932 char c;
4933 cpu_string = input_line_pointer;
4934 c = get_symbol_end ();
4935 cpu_string = xstrdup (cpu_string);
4936 *input_line_pointer = c;
4937 }
4938
4939 if (cpu_string != NULL)
4940 {
4941 ppc_cpu_t old_cpu = ppc_cpu;
4942 ppc_cpu_t new_cpu;
4943 char *p;
4944
4945 for (p = cpu_string; *p != 0; p++)
4946 *p = TOLOWER (*p);
4947
4948 if (strcmp (cpu_string, "push") == 0)
4949 {
4950 if (cpu_history == NULL)
4951 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4952
4953 if (curr_hist >= MAX_HISTORY)
4954 as_bad (_(".machine stack overflow"));
4955 else
4956 cpu_history[curr_hist++] = ppc_cpu;
4957 }
4958 else if (strcmp (cpu_string, "pop") == 0)
4959 {
4960 if (curr_hist <= 0)
4961 as_bad (_(".machine stack underflow"));
4962 else
4963 ppc_cpu = cpu_history[--curr_hist];
4964 }
4965 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4966 ppc_cpu = new_cpu;
4967 else
4968 as_bad (_("invalid machine `%s'"), cpu_string);
4969
4970 if (ppc_cpu != old_cpu)
4971 ppc_setup_opcodes ();
4972 }
4973
4974 demand_empty_rest_of_line ();
4975 }
4976 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4977 \f
4978 #ifdef TE_PE
4979
4980 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4981
4982 /* Set the current section. */
4983 static void
4984 ppc_set_current_section (segT new)
4985 {
4986 ppc_previous_section = ppc_current_section;
4987 ppc_current_section = new;
4988 }
4989
4990 /* pseudo-op: .previous
4991 behaviour: toggles the current section with the previous section.
4992 errors: None
4993 warnings: "No previous section" */
4994
4995 static void
4996 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4997 {
4998 if (ppc_previous_section == NULL)
4999 {
5000 as_warn (_("no previous section to return to, ignored."));
5001 return;
5002 }
5003
5004 subseg_set (ppc_previous_section, 0);
5005
5006 ppc_set_current_section (ppc_previous_section);
5007 }
5008
5009 /* pseudo-op: .pdata
5010 behaviour: predefined read only data section
5011 double word aligned
5012 errors: None
5013 warnings: None
5014 initial: .section .pdata "adr3"
5015 a - don't know -- maybe a misprint
5016 d - initialized data
5017 r - readable
5018 3 - double word aligned (that would be 4 byte boundary)
5019
5020 commentary:
5021 Tag index tables (also known as the function table) for exception
5022 handling, debugging, etc. */
5023
5024 static void
5025 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5026 {
5027 if (pdata_section == 0)
5028 {
5029 pdata_section = subseg_new (".pdata", 0);
5030
5031 bfd_set_section_flags (stdoutput, pdata_section,
5032 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5033 | SEC_READONLY | SEC_DATA ));
5034
5035 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5036 }
5037 else
5038 {
5039 pdata_section = subseg_new (".pdata", 0);
5040 }
5041 ppc_set_current_section (pdata_section);
5042 }
5043
5044 /* pseudo-op: .ydata
5045 behaviour: predefined read only data section
5046 double word aligned
5047 errors: None
5048 warnings: None
5049 initial: .section .ydata "drw3"
5050 a - don't know -- maybe a misprint
5051 d - initialized data
5052 r - readable
5053 3 - double word aligned (that would be 4 byte boundary)
5054 commentary:
5055 Tag tables (also known as the scope table) for exception handling,
5056 debugging, etc. */
5057
5058 static void
5059 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5060 {
5061 if (ydata_section == 0)
5062 {
5063 ydata_section = subseg_new (".ydata", 0);
5064 bfd_set_section_flags (stdoutput, ydata_section,
5065 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5066 | SEC_READONLY | SEC_DATA ));
5067
5068 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5069 }
5070 else
5071 {
5072 ydata_section = subseg_new (".ydata", 0);
5073 }
5074 ppc_set_current_section (ydata_section);
5075 }
5076
5077 /* pseudo-op: .reldata
5078 behaviour: predefined read write data section
5079 double word aligned (4-byte)
5080 FIXME: relocation is applied to it
5081 FIXME: what's the difference between this and .data?
5082 errors: None
5083 warnings: None
5084 initial: .section .reldata "drw3"
5085 d - initialized data
5086 r - readable
5087 w - writeable
5088 3 - double word aligned (that would be 8 byte boundary)
5089
5090 commentary:
5091 Like .data, but intended to hold data subject to relocation, such as
5092 function descriptors, etc. */
5093
5094 static void
5095 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5096 {
5097 if (reldata_section == 0)
5098 {
5099 reldata_section = subseg_new (".reldata", 0);
5100
5101 bfd_set_section_flags (stdoutput, reldata_section,
5102 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5103 | SEC_DATA));
5104
5105 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5106 }
5107 else
5108 {
5109 reldata_section = subseg_new (".reldata", 0);
5110 }
5111 ppc_set_current_section (reldata_section);
5112 }
5113
5114 /* pseudo-op: .rdata
5115 behaviour: predefined read only data section
5116 double word aligned
5117 errors: None
5118 warnings: None
5119 initial: .section .rdata "dr3"
5120 d - initialized data
5121 r - readable
5122 3 - double word aligned (that would be 4 byte boundary) */
5123
5124 static void
5125 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5126 {
5127 if (rdata_section == 0)
5128 {
5129 rdata_section = subseg_new (".rdata", 0);
5130 bfd_set_section_flags (stdoutput, rdata_section,
5131 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5132 | SEC_READONLY | SEC_DATA ));
5133
5134 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5135 }
5136 else
5137 {
5138 rdata_section = subseg_new (".rdata", 0);
5139 }
5140 ppc_set_current_section (rdata_section);
5141 }
5142
5143 /* pseudo-op: .ualong
5144 behaviour: much like .int, with the exception that no alignment is
5145 performed.
5146 FIXME: test the alignment statement
5147 errors: None
5148 warnings: None */
5149
5150 static void
5151 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5152 {
5153 /* Try for long. */
5154 cons (4);
5155 }
5156
5157 /* pseudo-op: .znop <symbol name>
5158 behaviour: Issue a nop instruction
5159 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5160 the supplied symbol name.
5161 errors: None
5162 warnings: Missing symbol name */
5163
5164 static void
5165 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5166 {
5167 unsigned long insn;
5168 const struct powerpc_opcode *opcode;
5169 char *f;
5170 symbolS *sym;
5171 char *symbol_name;
5172 char c;
5173 char *name;
5174
5175 /* Strip out the symbol name. */
5176 symbol_name = input_line_pointer;
5177 c = get_symbol_end ();
5178
5179 name = xmalloc (input_line_pointer - symbol_name + 1);
5180 strcpy (name, symbol_name);
5181
5182 sym = symbol_find_or_make (name);
5183
5184 *input_line_pointer = c;
5185
5186 SKIP_WHITESPACE ();
5187
5188 /* Look up the opcode in the hash table. */
5189 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5190
5191 /* Stick in the nop. */
5192 insn = opcode->opcode;
5193
5194 /* Write out the instruction. */
5195 f = frag_more (4);
5196 md_number_to_chars (f, insn, 4);
5197 fix_new (frag_now,
5198 f - frag_now->fr_literal,
5199 4,
5200 sym,
5201 0,
5202 0,
5203 BFD_RELOC_16_GOT_PCREL);
5204
5205 }
5206
5207 /* pseudo-op:
5208 behaviour:
5209 errors:
5210 warnings: */
5211
5212 static void
5213 ppc_pe_comm (int lcomm)
5214 {
5215 char *name;
5216 char c;
5217 char *p;
5218 offsetT temp;
5219 symbolS *symbolP;
5220 offsetT align;
5221
5222 name = input_line_pointer;
5223 c = get_symbol_end ();
5224
5225 /* just after name is now '\0'. */
5226 p = input_line_pointer;
5227 *p = c;
5228 SKIP_WHITESPACE ();
5229 if (*input_line_pointer != ',')
5230 {
5231 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5232 ignore_rest_of_line ();
5233 return;
5234 }
5235
5236 input_line_pointer++; /* skip ',' */
5237 if ((temp = get_absolute_expression ()) < 0)
5238 {
5239 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5240 ignore_rest_of_line ();
5241 return;
5242 }
5243
5244 if (! lcomm)
5245 {
5246 /* The third argument to .comm is the alignment. */
5247 if (*input_line_pointer != ',')
5248 align = 3;
5249 else
5250 {
5251 ++input_line_pointer;
5252 align = get_absolute_expression ();
5253 if (align <= 0)
5254 {
5255 as_warn (_("ignoring bad alignment"));
5256 align = 3;
5257 }
5258 }
5259 }
5260
5261 *p = 0;
5262 symbolP = symbol_find_or_make (name);
5263
5264 *p = c;
5265 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5266 {
5267 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5268 S_GET_NAME (symbolP));
5269 ignore_rest_of_line ();
5270 return;
5271 }
5272
5273 if (S_GET_VALUE (symbolP))
5274 {
5275 if (S_GET_VALUE (symbolP) != (valueT) temp)
5276 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5277 S_GET_NAME (symbolP),
5278 (long) S_GET_VALUE (symbolP),
5279 (long) temp);
5280 }
5281 else
5282 {
5283 S_SET_VALUE (symbolP, (valueT) temp);
5284 S_SET_EXTERNAL (symbolP);
5285 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5286 }
5287
5288 demand_empty_rest_of_line ();
5289 }
5290
5291 /*
5292 * implement the .section pseudo op:
5293 * .section name {, "flags"}
5294 * ^ ^
5295 * | +--- optional flags: 'b' for bss
5296 * | 'i' for info
5297 * +-- section name 'l' for lib
5298 * 'n' for noload
5299 * 'o' for over
5300 * 'w' for data
5301 * 'd' (apparently m88k for data)
5302 * 'x' for text
5303 * But if the argument is not a quoted string, treat it as a
5304 * subsegment number.
5305 *
5306 * FIXME: this is a copy of the section processing from obj-coff.c, with
5307 * additions/changes for the moto-pas assembler support. There are three
5308 * categories:
5309 *
5310 * FIXME: I just noticed this. This doesn't work at all really. It it
5311 * setting bits that bfd probably neither understands or uses. The
5312 * correct approach (?) will have to incorporate extra fields attached
5313 * to the section to hold the system specific stuff. (krk)
5314 *
5315 * Section Contents:
5316 * 'a' - unknown - referred to in documentation, but no definition supplied
5317 * 'c' - section has code
5318 * 'd' - section has initialized data
5319 * 'u' - section has uninitialized data
5320 * 'i' - section contains directives (info)
5321 * 'n' - section can be discarded
5322 * 'R' - remove section at link time
5323 *
5324 * Section Protection:
5325 * 'r' - section is readable
5326 * 'w' - section is writeable
5327 * 'x' - section is executable
5328 * 's' - section is sharable
5329 *
5330 * Section Alignment:
5331 * '0' - align to byte boundary
5332 * '1' - align to halfword undary
5333 * '2' - align to word boundary
5334 * '3' - align to doubleword boundary
5335 * '4' - align to quadword boundary
5336 * '5' - align to 32 byte boundary
5337 * '6' - align to 64 byte boundary
5338 *
5339 */
5340
5341 void
5342 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5343 {
5344 /* Strip out the section name. */
5345 char *section_name;
5346 char c;
5347 char *name;
5348 unsigned int exp;
5349 flagword flags;
5350 segT sec;
5351 int align;
5352
5353 section_name = input_line_pointer;
5354 c = get_symbol_end ();
5355
5356 name = xmalloc (input_line_pointer - section_name + 1);
5357 strcpy (name, section_name);
5358
5359 *input_line_pointer = c;
5360
5361 SKIP_WHITESPACE ();
5362
5363 exp = 0;
5364 flags = SEC_NO_FLAGS;
5365
5366 if (strcmp (name, ".idata$2") == 0)
5367 {
5368 align = 0;
5369 }
5370 else if (strcmp (name, ".idata$3") == 0)
5371 {
5372 align = 0;
5373 }
5374 else if (strcmp (name, ".idata$4") == 0)
5375 {
5376 align = 2;
5377 }
5378 else if (strcmp (name, ".idata$5") == 0)
5379 {
5380 align = 2;
5381 }
5382 else if (strcmp (name, ".idata$6") == 0)
5383 {
5384 align = 1;
5385 }
5386 else
5387 /* Default alignment to 16 byte boundary. */
5388 align = 4;
5389
5390 if (*input_line_pointer == ',')
5391 {
5392 ++input_line_pointer;
5393 SKIP_WHITESPACE ();
5394 if (*input_line_pointer != '"')
5395 exp = get_absolute_expression ();
5396 else
5397 {
5398 ++input_line_pointer;
5399 while (*input_line_pointer != '"'
5400 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5401 {
5402 switch (*input_line_pointer)
5403 {
5404 /* Section Contents */
5405 case 'a': /* unknown */
5406 as_bad (_("unsupported section attribute -- 'a'"));
5407 break;
5408 case 'c': /* code section */
5409 flags |= SEC_CODE;
5410 break;
5411 case 'd': /* section has initialized data */
5412 flags |= SEC_DATA;
5413 break;
5414 case 'u': /* section has uninitialized data */
5415 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5416 in winnt.h */
5417 flags |= SEC_ROM;
5418 break;
5419 case 'i': /* section contains directives (info) */
5420 /* FIXME: This is IMAGE_SCN_LNK_INFO
5421 in winnt.h */
5422 flags |= SEC_HAS_CONTENTS;
5423 break;
5424 case 'n': /* section can be discarded */
5425 flags &=~ SEC_LOAD;
5426 break;
5427 case 'R': /* Remove section at link time */
5428 flags |= SEC_NEVER_LOAD;
5429 break;
5430 #if IFLICT_BRAIN_DAMAGE
5431 /* Section Protection */
5432 case 'r': /* section is readable */
5433 flags |= IMAGE_SCN_MEM_READ;
5434 break;
5435 case 'w': /* section is writeable */
5436 flags |= IMAGE_SCN_MEM_WRITE;
5437 break;
5438 case 'x': /* section is executable */
5439 flags |= IMAGE_SCN_MEM_EXECUTE;
5440 break;
5441 case 's': /* section is sharable */
5442 flags |= IMAGE_SCN_MEM_SHARED;
5443 break;
5444
5445 /* Section Alignment */
5446 case '0': /* align to byte boundary */
5447 flags |= IMAGE_SCN_ALIGN_1BYTES;
5448 align = 0;
5449 break;
5450 case '1': /* align to halfword boundary */
5451 flags |= IMAGE_SCN_ALIGN_2BYTES;
5452 align = 1;
5453 break;
5454 case '2': /* align to word boundary */
5455 flags |= IMAGE_SCN_ALIGN_4BYTES;
5456 align = 2;
5457 break;
5458 case '3': /* align to doubleword boundary */
5459 flags |= IMAGE_SCN_ALIGN_8BYTES;
5460 align = 3;
5461 break;
5462 case '4': /* align to quadword boundary */
5463 flags |= IMAGE_SCN_ALIGN_16BYTES;
5464 align = 4;
5465 break;
5466 case '5': /* align to 32 byte boundary */
5467 flags |= IMAGE_SCN_ALIGN_32BYTES;
5468 align = 5;
5469 break;
5470 case '6': /* align to 64 byte boundary */
5471 flags |= IMAGE_SCN_ALIGN_64BYTES;
5472 align = 6;
5473 break;
5474 #endif
5475 default:
5476 as_bad (_("unknown section attribute '%c'"),
5477 *input_line_pointer);
5478 break;
5479 }
5480 ++input_line_pointer;
5481 }
5482 if (*input_line_pointer == '"')
5483 ++input_line_pointer;
5484 }
5485 }
5486
5487 sec = subseg_new (name, (subsegT) exp);
5488
5489 ppc_set_current_section (sec);
5490
5491 if (flags != SEC_NO_FLAGS)
5492 {
5493 if (! bfd_set_section_flags (stdoutput, sec, flags))
5494 as_bad (_("error setting flags for \"%s\": %s"),
5495 bfd_section_name (stdoutput, sec),
5496 bfd_errmsg (bfd_get_error ()));
5497 }
5498
5499 bfd_set_section_alignment (stdoutput, sec, align);
5500 }
5501
5502 static void
5503 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5504 {
5505 char *name;
5506 char endc;
5507 symbolS *ext_sym;
5508
5509 name = input_line_pointer;
5510 endc = get_symbol_end ();
5511
5512 ext_sym = symbol_find_or_make (name);
5513
5514 *input_line_pointer = endc;
5515
5516 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5517 SF_SET_FUNCTION (ext_sym);
5518 SF_SET_PROCESS (ext_sym);
5519 coff_add_linesym (ext_sym);
5520
5521 demand_empty_rest_of_line ();
5522 }
5523
5524 static void
5525 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5526 {
5527 if (tocdata_section == 0)
5528 {
5529 tocdata_section = subseg_new (".tocd", 0);
5530 /* FIXME: section flags won't work. */
5531 bfd_set_section_flags (stdoutput, tocdata_section,
5532 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5533 | SEC_READONLY | SEC_DATA));
5534
5535 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5536 }
5537 else
5538 {
5539 rdata_section = subseg_new (".tocd", 0);
5540 }
5541
5542 ppc_set_current_section (tocdata_section);
5543
5544 demand_empty_rest_of_line ();
5545 }
5546
5547 /* Don't adjust TOC relocs to use the section symbol. */
5548
5549 int
5550 ppc_pe_fix_adjustable (fixS *fix)
5551 {
5552 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5553 }
5554
5555 #endif
5556 \f
5557 #ifdef OBJ_XCOFF
5558
5559 /* XCOFF specific symbol and file handling. */
5560
5561 /* Canonicalize the symbol name. We use the to force the suffix, if
5562 any, to use square brackets, and to be in upper case. */
5563
5564 char *
5565 ppc_canonicalize_symbol_name (char *name)
5566 {
5567 char *s;
5568
5569 if (ppc_stab_symbol)
5570 return name;
5571
5572 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5573 ;
5574 if (*s != '\0')
5575 {
5576 char brac;
5577
5578 if (*s == '[')
5579 brac = ']';
5580 else
5581 {
5582 *s = '[';
5583 brac = '}';
5584 }
5585
5586 for (s++; *s != '\0' && *s != brac; s++)
5587 *s = TOUPPER (*s);
5588
5589 if (*s == '\0' || s[1] != '\0')
5590 as_bad (_("bad symbol suffix"));
5591
5592 *s = ']';
5593 }
5594
5595 return name;
5596 }
5597
5598 /* Set the class of a symbol based on the suffix, if any. This is
5599 called whenever a new symbol is created. */
5600
5601 void
5602 ppc_symbol_new_hook (symbolS *sym)
5603 {
5604 struct ppc_tc_sy *tc;
5605 const char *s;
5606
5607 tc = symbol_get_tc (sym);
5608 tc->next = NULL;
5609 tc->output = 0;
5610 tc->symbol_class = -1;
5611 tc->real_name = NULL;
5612 tc->subseg = 0;
5613 tc->align = 0;
5614 tc->u.size = NULL;
5615 tc->u.dw = NULL;
5616 tc->within = NULL;
5617
5618 if (ppc_stab_symbol)
5619 return;
5620
5621 s = strchr (S_GET_NAME (sym), '[');
5622 if (s == (const char *) NULL)
5623 {
5624 /* There is no suffix. */
5625 return;
5626 }
5627
5628 ++s;
5629
5630 switch (s[0])
5631 {
5632 case 'B':
5633 if (strcmp (s, "BS]") == 0)
5634 tc->symbol_class = XMC_BS;
5635 break;
5636 case 'D':
5637 if (strcmp (s, "DB]") == 0)
5638 tc->symbol_class = XMC_DB;
5639 else if (strcmp (s, "DS]") == 0)
5640 tc->symbol_class = XMC_DS;
5641 break;
5642 case 'G':
5643 if (strcmp (s, "GL]") == 0)
5644 tc->symbol_class = XMC_GL;
5645 break;
5646 case 'P':
5647 if (strcmp (s, "PR]") == 0)
5648 tc->symbol_class = XMC_PR;
5649 break;
5650 case 'R':
5651 if (strcmp (s, "RO]") == 0)
5652 tc->symbol_class = XMC_RO;
5653 else if (strcmp (s, "RW]") == 0)
5654 tc->symbol_class = XMC_RW;
5655 break;
5656 case 'S':
5657 if (strcmp (s, "SV]") == 0)
5658 tc->symbol_class = XMC_SV;
5659 break;
5660 case 'T':
5661 if (strcmp (s, "TC]") == 0)
5662 tc->symbol_class = XMC_TC;
5663 else if (strcmp (s, "TI]") == 0)
5664 tc->symbol_class = XMC_TI;
5665 else if (strcmp (s, "TB]") == 0)
5666 tc->symbol_class = XMC_TB;
5667 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5668 tc->symbol_class = XMC_TC0;
5669 break;
5670 case 'U':
5671 if (strcmp (s, "UA]") == 0)
5672 tc->symbol_class = XMC_UA;
5673 else if (strcmp (s, "UC]") == 0)
5674 tc->symbol_class = XMC_UC;
5675 break;
5676 case 'X':
5677 if (strcmp (s, "XO]") == 0)
5678 tc->symbol_class = XMC_XO;
5679 break;
5680 }
5681
5682 if (tc->symbol_class == -1)
5683 as_bad (_("unrecognized symbol suffix"));
5684 }
5685
5686 /* Set the class of a label based on where it is defined. This
5687 handles symbols without suffixes. Also, move the symbol so that it
5688 follows the csect symbol. */
5689
5690 void
5691 ppc_frob_label (symbolS *sym)
5692 {
5693 if (ppc_current_csect != (symbolS *) NULL)
5694 {
5695 if (symbol_get_tc (sym)->symbol_class == -1)
5696 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5697
5698 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5699 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5700 &symbol_rootP, &symbol_lastP);
5701 symbol_get_tc (ppc_current_csect)->within = sym;
5702 symbol_get_tc (sym)->within = ppc_current_csect;
5703 }
5704
5705 #ifdef OBJ_ELF
5706 dwarf2_emit_label (sym);
5707 #endif
5708 }
5709
5710 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5711 seen. It tells ppc_adjust_symtab whether it needs to look through
5712 the symbols. */
5713
5714 static bfd_boolean ppc_saw_abs;
5715
5716 /* Change the name of a symbol just before writing it out. Set the
5717 real name if the .rename pseudo-op was used. Otherwise, remove any
5718 class suffix. Return 1 if the symbol should not be included in the
5719 symbol table. */
5720
5721 int
5722 ppc_frob_symbol (symbolS *sym)
5723 {
5724 static symbolS *ppc_last_function;
5725 static symbolS *set_end;
5726
5727 /* Discard symbols that should not be included in the output symbol
5728 table. */
5729 if (! symbol_used_in_reloc_p (sym)
5730 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5731 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5732 && ! symbol_get_tc (sym)->output
5733 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5734 return 1;
5735
5736 /* This one will disappear anyway. Don't make a csect sym for it. */
5737 if (sym == abs_section_sym)
5738 return 1;
5739
5740 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5741 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5742 else
5743 {
5744 const char *name;
5745 const char *s;
5746
5747 name = S_GET_NAME (sym);
5748 s = strchr (name, '[');
5749 if (s != (char *) NULL)
5750 {
5751 unsigned int len;
5752 char *snew;
5753
5754 len = s - name;
5755 snew = xmalloc (len + 1);
5756 memcpy (snew, name, len);
5757 snew[len] = '\0';
5758
5759 S_SET_NAME (sym, snew);
5760 }
5761 }
5762
5763 if (set_end != (symbolS *) NULL)
5764 {
5765 SA_SET_SYM_ENDNDX (set_end, sym);
5766 set_end = NULL;
5767 }
5768
5769 if (SF_GET_FUNCTION (sym))
5770 {
5771 if (ppc_last_function != (symbolS *) NULL)
5772 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5773 ppc_last_function = sym;
5774 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5775 {
5776 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5777 SA_SET_SYM_FSIZE (sym,
5778 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5779 }
5780 }
5781 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5782 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5783 {
5784 if (ppc_last_function == (symbolS *) NULL)
5785 as_bad (_(".ef with no preceding .function"));
5786 else
5787 {
5788 set_end = ppc_last_function;
5789 ppc_last_function = NULL;
5790
5791 /* We don't have a C_EFCN symbol, but we need to force the
5792 COFF backend to believe that it has seen one. */
5793 coff_last_function = NULL;
5794 }
5795 }
5796
5797 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5798 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5799 && S_GET_STORAGE_CLASS (sym) != C_FILE
5800 && S_GET_STORAGE_CLASS (sym) != C_FCN
5801 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5802 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5803 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5804 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5805 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5806 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5807 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5808
5809 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5810 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5811 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5812 {
5813 int i;
5814 union internal_auxent *a;
5815
5816 /* Create a csect aux. */
5817 i = S_GET_NUMBER_AUXILIARY (sym);
5818 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5819 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5820 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5821 {
5822 /* This is the TOC table. */
5823 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5824 a->x_csect.x_scnlen.l = 0;
5825 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5826 }
5827 else if (symbol_get_tc (sym)->subseg != 0)
5828 {
5829 /* This is a csect symbol. x_scnlen is the size of the
5830 csect. */
5831 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5832 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5833 S_GET_SEGMENT (sym))
5834 - S_GET_VALUE (sym));
5835 else
5836 {
5837 resolve_symbol_value (symbol_get_tc (sym)->next);
5838 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5839 - S_GET_VALUE (sym));
5840 }
5841 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5842 }
5843 else if (S_GET_SEGMENT (sym) == bss_section)
5844 {
5845 /* This is a common symbol. */
5846 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5847 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5848 if (S_IS_EXTERNAL (sym))
5849 symbol_get_tc (sym)->symbol_class = XMC_RW;
5850 else
5851 symbol_get_tc (sym)->symbol_class = XMC_BS;
5852 }
5853 else if (S_GET_SEGMENT (sym) == absolute_section)
5854 {
5855 /* This is an absolute symbol. The csect will be created by
5856 ppc_adjust_symtab. */
5857 ppc_saw_abs = TRUE;
5858 a->x_csect.x_smtyp = XTY_LD;
5859 if (symbol_get_tc (sym)->symbol_class == -1)
5860 symbol_get_tc (sym)->symbol_class = XMC_XO;
5861 }
5862 else if (! S_IS_DEFINED (sym))
5863 {
5864 /* This is an external symbol. */
5865 a->x_csect.x_scnlen.l = 0;
5866 a->x_csect.x_smtyp = XTY_ER;
5867 }
5868 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5869 {
5870 symbolS *next;
5871
5872 /* This is a TOC definition. x_scnlen is the size of the
5873 TOC entry. */
5874 next = symbol_next (sym);
5875 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5876 next = symbol_next (next);
5877 if (next == (symbolS *) NULL
5878 || symbol_get_tc (next)->symbol_class != XMC_TC)
5879 {
5880 if (ppc_after_toc_frag == (fragS *) NULL)
5881 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5882 data_section)
5883 - S_GET_VALUE (sym));
5884 else
5885 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5886 - S_GET_VALUE (sym));
5887 }
5888 else
5889 {
5890 resolve_symbol_value (next);
5891 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5892 - S_GET_VALUE (sym));
5893 }
5894 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5895 }
5896 else
5897 {
5898 symbolS *csect;
5899
5900 /* This is a normal symbol definition. x_scnlen is the
5901 symbol index of the containing csect. */
5902 if (S_GET_SEGMENT (sym) == text_section)
5903 csect = ppc_text_csects;
5904 else if (S_GET_SEGMENT (sym) == data_section)
5905 csect = ppc_data_csects;
5906 else
5907 abort ();
5908
5909 /* Skip the initial dummy symbol. */
5910 csect = symbol_get_tc (csect)->next;
5911
5912 if (csect == (symbolS *) NULL)
5913 {
5914 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5915 a->x_csect.x_scnlen.l = 0;
5916 }
5917 else
5918 {
5919 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5920 {
5921 resolve_symbol_value (symbol_get_tc (csect)->next);
5922 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5923 > S_GET_VALUE (sym))
5924 break;
5925 csect = symbol_get_tc (csect)->next;
5926 }
5927
5928 a->x_csect.x_scnlen.p =
5929 coffsymbol (symbol_get_bfdsym (csect))->native;
5930 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5931 1;
5932 }
5933 a->x_csect.x_smtyp = XTY_LD;
5934 }
5935
5936 a->x_csect.x_parmhash = 0;
5937 a->x_csect.x_snhash = 0;
5938 if (symbol_get_tc (sym)->symbol_class == -1)
5939 a->x_csect.x_smclas = XMC_PR;
5940 else
5941 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5942 a->x_csect.x_stab = 0;
5943 a->x_csect.x_snstab = 0;
5944
5945 /* Don't let the COFF backend resort these symbols. */
5946 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5947 }
5948 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5949 {
5950 /* We want the value to be the symbol index of the referenced
5951 csect symbol. BFD will do that for us if we set the right
5952 flags. */
5953 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5954 combined_entry_type *c = coffsymbol (bsym)->native;
5955
5956 S_SET_VALUE (sym, (valueT) (size_t) c);
5957 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5958 }
5959 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5960 {
5961 symbolS *block;
5962 valueT base;
5963
5964 block = symbol_get_tc (sym)->within;
5965 if (block)
5966 {
5967 /* The value is the offset from the enclosing csect. */
5968 symbolS *csect;
5969
5970 csect = symbol_get_tc (block)->within;
5971 resolve_symbol_value (csect);
5972 base = S_GET_VALUE (csect);
5973 }
5974 else
5975 base = 0;
5976
5977 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5978 }
5979 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5980 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5981 {
5982 /* We want the value to be a file offset into the line numbers.
5983 BFD will do that for us if we set the right flags. We have
5984 already set the value correctly. */
5985 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5986 }
5987
5988 return 0;
5989 }
5990
5991 /* Adjust the symbol table. This creates csect symbols for all
5992 absolute symbols. */
5993
5994 void
5995 ppc_adjust_symtab (void)
5996 {
5997 symbolS *sym;
5998
5999 if (! ppc_saw_abs)
6000 return;
6001
6002 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6003 {
6004 symbolS *csect;
6005 int i;
6006 union internal_auxent *a;
6007
6008 if (S_GET_SEGMENT (sym) != absolute_section)
6009 continue;
6010
6011 csect = symbol_create (".abs[XO]", absolute_section,
6012 S_GET_VALUE (sym), &zero_address_frag);
6013 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6014 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6015 i = S_GET_NUMBER_AUXILIARY (csect);
6016 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6017 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6018 a->x_csect.x_scnlen.l = 0;
6019 a->x_csect.x_smtyp = XTY_SD;
6020 a->x_csect.x_parmhash = 0;
6021 a->x_csect.x_snhash = 0;
6022 a->x_csect.x_smclas = XMC_XO;
6023 a->x_csect.x_stab = 0;
6024 a->x_csect.x_snstab = 0;
6025
6026 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6027
6028 i = S_GET_NUMBER_AUXILIARY (sym);
6029 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6030 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6031 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6032 }
6033
6034 ppc_saw_abs = FALSE;
6035 }
6036
6037 /* Set the VMA for a section. This is called on all the sections in
6038 turn. */
6039
6040 void
6041 ppc_frob_section (asection *sec)
6042 {
6043 static bfd_vma vma = 0;
6044
6045 /* Dwarf sections start at 0. */
6046 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6047 return;
6048
6049 vma = md_section_align (sec, vma);
6050 bfd_set_section_vma (stdoutput, sec, vma);
6051 vma += bfd_section_size (stdoutput, sec);
6052 }
6053
6054 #endif /* OBJ_XCOFF */
6055 \f
6056 char *
6057 md_atof (int type, char *litp, int *sizep)
6058 {
6059 return ieee_md_atof (type, litp, sizep, target_big_endian);
6060 }
6061
6062 /* Write a value out to the object file, using the appropriate
6063 endianness. */
6064
6065 void
6066 md_number_to_chars (char *buf, valueT val, int n)
6067 {
6068 if (target_big_endian)
6069 number_to_chars_bigendian (buf, val, n);
6070 else
6071 number_to_chars_littleendian (buf, val, n);
6072 }
6073
6074 /* Align a section (I don't know why this is machine dependent). */
6075
6076 valueT
6077 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6078 {
6079 #ifdef OBJ_ELF
6080 return addr;
6081 #else
6082 int align = bfd_get_section_alignment (stdoutput, seg);
6083
6084 return ((addr + (1 << align) - 1) & (-1 << align));
6085 #endif
6086 }
6087
6088 /* We don't have any form of relaxing. */
6089
6090 int
6091 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6092 asection *seg ATTRIBUTE_UNUSED)
6093 {
6094 abort ();
6095 return 0;
6096 }
6097
6098 /* Convert a machine dependent frag. We never generate these. */
6099
6100 void
6101 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6102 asection *sec ATTRIBUTE_UNUSED,
6103 fragS *fragp ATTRIBUTE_UNUSED)
6104 {
6105 abort ();
6106 }
6107
6108 /* We have no need to default values of symbols. */
6109
6110 symbolS *
6111 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6112 {
6113 return 0;
6114 }
6115 \f
6116 /* Functions concerning relocs. */
6117
6118 /* The location from which a PC relative jump should be calculated,
6119 given a PC relative reloc. */
6120
6121 long
6122 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6123 {
6124 return fixp->fx_frag->fr_address + fixp->fx_where;
6125 }
6126
6127 #ifdef OBJ_XCOFF
6128
6129 /* This is called to see whether a fixup should be adjusted to use a
6130 section symbol. We take the opportunity to change a fixup against
6131 a symbol in the TOC subsegment into a reloc against the
6132 corresponding .tc symbol. */
6133
6134 int
6135 ppc_fix_adjustable (fixS *fix)
6136 {
6137 valueT val = resolve_symbol_value (fix->fx_addsy);
6138 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6139 TC_SYMFIELD_TYPE *tc;
6140
6141 if (symseg == absolute_section)
6142 return 0;
6143
6144 /* Always adjust symbols in debugging sections. */
6145 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6146 return 1;
6147
6148 if (ppc_toc_csect != (symbolS *) NULL
6149 && fix->fx_addsy != ppc_toc_csect
6150 && symseg == data_section
6151 && val >= ppc_toc_frag->fr_address
6152 && (ppc_after_toc_frag == (fragS *) NULL
6153 || val < ppc_after_toc_frag->fr_address))
6154 {
6155 symbolS *sy;
6156
6157 for (sy = symbol_next (ppc_toc_csect);
6158 sy != (symbolS *) NULL;
6159 sy = symbol_next (sy))
6160 {
6161 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6162
6163 if (sy_tc->symbol_class == XMC_TC0)
6164 continue;
6165 if (sy_tc->symbol_class != XMC_TC)
6166 break;
6167 if (val == resolve_symbol_value (sy))
6168 {
6169 fix->fx_addsy = sy;
6170 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6171 return 0;
6172 }
6173 }
6174
6175 as_bad_where (fix->fx_file, fix->fx_line,
6176 _("symbol in .toc does not match any .tc"));
6177 }
6178
6179 /* Possibly adjust the reloc to be against the csect. */
6180 tc = symbol_get_tc (fix->fx_addsy);
6181 if (tc->subseg == 0
6182 && tc->symbol_class != XMC_TC0
6183 && tc->symbol_class != XMC_TC
6184 && symseg != bss_section
6185 /* Don't adjust if this is a reloc in the toc section. */
6186 && (symseg != data_section
6187 || ppc_toc_csect == NULL
6188 || val < ppc_toc_frag->fr_address
6189 || (ppc_after_toc_frag != NULL
6190 && val >= ppc_after_toc_frag->fr_address)))
6191 {
6192 symbolS *csect = tc->within;
6193
6194 /* If the symbol was not declared by a label (eg: a section symbol),
6195 use the section instead of the csect. This doesn't happen in
6196 normal AIX assembly code. */
6197 if (csect == NULL)
6198 csect = seg_info (symseg)->sym;
6199
6200 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6201 fix->fx_addsy = csect;
6202
6203 return 0;
6204 }
6205
6206 /* Adjust a reloc against a .lcomm symbol to be against the base
6207 .lcomm. */
6208 if (symseg == bss_section
6209 && ! S_IS_EXTERNAL (fix->fx_addsy))
6210 {
6211 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6212
6213 fix->fx_offset += val - resolve_symbol_value (sy);
6214 fix->fx_addsy = sy;
6215 }
6216
6217 return 0;
6218 }
6219
6220 /* A reloc from one csect to another must be kept. The assembler
6221 will, of course, keep relocs between sections, and it will keep
6222 absolute relocs, but we need to force it to keep PC relative relocs
6223 between two csects in the same section. */
6224
6225 int
6226 ppc_force_relocation (fixS *fix)
6227 {
6228 /* At this point fix->fx_addsy should already have been converted to
6229 a csect symbol. If the csect does not include the fragment, then
6230 we need to force the relocation. */
6231 if (fix->fx_pcrel
6232 && fix->fx_addsy != NULL
6233 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6234 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6235 > fix->fx_frag->fr_address)
6236 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6237 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6238 <= fix->fx_frag->fr_address))))
6239 return 1;
6240
6241 return generic_force_reloc (fix);
6242 }
6243
6244 void
6245 ppc_new_dot_label (symbolS *sym)
6246 {
6247 /* Anchor this label to the current csect for relocations. */
6248 symbol_get_tc (sym)->within = ppc_current_csect;
6249 }
6250
6251 #endif /* OBJ_XCOFF */
6252
6253 #ifdef OBJ_ELF
6254 /* If this function returns non-zero, it guarantees that a relocation
6255 will be emitted for a fixup. */
6256
6257 int
6258 ppc_force_relocation (fixS *fix)
6259 {
6260 /* Branch prediction relocations must force a relocation, as must
6261 the vtable description relocs. */
6262 switch (fix->fx_r_type)
6263 {
6264 case BFD_RELOC_PPC_B16_BRTAKEN:
6265 case BFD_RELOC_PPC_B16_BRNTAKEN:
6266 case BFD_RELOC_PPC_BA16_BRTAKEN:
6267 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6268 case BFD_RELOC_24_PLT_PCREL:
6269 case BFD_RELOC_PPC64_TOC:
6270 return 1;
6271 case BFD_RELOC_PPC_B26:
6272 case BFD_RELOC_PPC_BA26:
6273 case BFD_RELOC_PPC_B16:
6274 case BFD_RELOC_PPC_BA16:
6275 /* All branch fixups targeting a localentry symbol must
6276 force a relocation. */
6277 if (fix->fx_addsy)
6278 {
6279 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6280 elf_symbol_type *elfsym
6281 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6282 gas_assert (elfsym);
6283 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6284 return 1;
6285 }
6286 break;
6287 default:
6288 break;
6289 }
6290
6291 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6292 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6293 return 1;
6294
6295 return generic_force_reloc (fix);
6296 }
6297
6298 int
6299 ppc_fix_adjustable (fixS *fix)
6300 {
6301 switch (fix->fx_r_type)
6302 {
6303 /* All branch fixups targeting a localentry symbol must
6304 continue using the symbol. */
6305 case BFD_RELOC_PPC_B26:
6306 case BFD_RELOC_PPC_BA26:
6307 case BFD_RELOC_PPC_B16:
6308 case BFD_RELOC_PPC_BA16:
6309 case BFD_RELOC_PPC_B16_BRTAKEN:
6310 case BFD_RELOC_PPC_B16_BRNTAKEN:
6311 case BFD_RELOC_PPC_BA16_BRTAKEN:
6312 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6313 if (fix->fx_addsy)
6314 {
6315 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6316 elf_symbol_type *elfsym
6317 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6318 gas_assert (elfsym);
6319 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6320 return 0;
6321 }
6322 break;
6323 default:
6324 break;
6325 }
6326
6327 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6328 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6329 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6330 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6331 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6332 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6333 && fix->fx_r_type != BFD_RELOC_GPREL16
6334 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6335 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6336 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6337 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6338 }
6339 #endif
6340
6341 void
6342 ppc_frag_check (struct frag *fragP)
6343 {
6344 if (!fragP->has_code)
6345 return;
6346
6347 if (ppc_mach() == bfd_mach_ppc_vle)
6348 {
6349 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6350 as_bad (_("instruction address is not a multiple of 2"));
6351 }
6352 else
6353 {
6354 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6355 as_bad (_("instruction address is not a multiple of 4"));
6356 }
6357 }
6358
6359 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6360 rs_align_code frag. */
6361
6362 void
6363 ppc_handle_align (struct frag *fragP)
6364 {
6365 valueT count = (fragP->fr_next->fr_address
6366 - (fragP->fr_address + fragP->fr_fix));
6367
6368 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6369 {
6370 char *dest = fragP->fr_literal + fragP->fr_fix;
6371
6372 fragP->fr_var = 2;
6373 md_number_to_chars (dest, 0x4400, 2);
6374 }
6375 else if (count != 0 && (count & 3) == 0)
6376 {
6377 char *dest = fragP->fr_literal + fragP->fr_fix;
6378
6379 fragP->fr_var = 4;
6380
6381 if (count > 4 * nop_limit && count < 0x2000000)
6382 {
6383 struct frag *rest;
6384
6385 /* Make a branch, then follow with nops. Insert another
6386 frag to handle the nops. */
6387 md_number_to_chars (dest, 0x48000000 + count, 4);
6388 count -= 4;
6389 if (count == 0)
6390 return;
6391
6392 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6393 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6394 fragP->fr_next = rest;
6395 fragP = rest;
6396 rest->fr_address += rest->fr_fix + 4;
6397 rest->fr_fix = 0;
6398 /* If we leave the next frag as rs_align_code we'll come here
6399 again, resulting in a bunch of branches rather than a
6400 branch followed by nops. */
6401 rest->fr_type = rs_align;
6402 dest = rest->fr_literal;
6403 }
6404
6405 md_number_to_chars (dest, 0x60000000, 4);
6406
6407 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6408 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6409 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6410 {
6411 /* For power6, power7 and power8, we want the last nop to be a group
6412 terminating one. Do this by inserting an rs_fill frag immediately
6413 after this one, with its address set to the last nop location.
6414 This will automatically reduce the number of nops in the current
6415 frag by one. */
6416 if (count > 4)
6417 {
6418 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6419
6420 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6421 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6422 group_nop->fr_fix = 0;
6423 group_nop->fr_offset = 1;
6424 group_nop->fr_type = rs_fill;
6425 fragP->fr_next = group_nop;
6426 dest = group_nop->fr_literal;
6427 }
6428
6429 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6430 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6431 {
6432 if (ppc_cpu & PPC_OPCODE_E500MC)
6433 /* e500mc group terminating nop: "ori 0,0,0". */
6434 md_number_to_chars (dest, 0x60000000, 4);
6435 else
6436 /* power7/power8 group terminating nop: "ori 2,2,0". */
6437 md_number_to_chars (dest, 0x60420000, 4);
6438 }
6439 else
6440 /* power6 group terminating nop: "ori 1,1,0". */
6441 md_number_to_chars (dest, 0x60210000, 4);
6442 }
6443 }
6444 }
6445
6446 /* Apply a fixup to the object code. This is called for all the
6447 fixups we generated by the calls to fix_new_exp, above. */
6448
6449 void
6450 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
6451 {
6452 valueT value = * valP;
6453 offsetT fieldval;
6454 const struct powerpc_operand *operand;
6455
6456 #ifdef OBJ_ELF
6457 if (fixP->fx_addsy != NULL)
6458 {
6459 /* Hack around bfd_install_relocation brain damage. */
6460 if (fixP->fx_pcrel)
6461 value += fixP->fx_frag->fr_address + fixP->fx_where;
6462 }
6463 else
6464 fixP->fx_done = 1;
6465 #else
6466 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6467 the symbol values. If we are doing this relocation the code in
6468 write.c is going to call bfd_install_relocation, which is also
6469 going to use the symbol value. That means that if the reloc is
6470 fully resolved we want to use *valP since bfd_install_relocation is
6471 not being used.
6472 However, if the reloc is not fully resolved we do not want to
6473 use *valP, and must use fx_offset instead. If the relocation
6474 is PC-relative, we then need to re-apply md_pcrel_from_section
6475 to this new relocation value. */
6476 if (fixP->fx_addsy == (symbolS *) NULL)
6477 fixP->fx_done = 1;
6478
6479 else
6480 {
6481 value = fixP->fx_offset;
6482 if (fixP->fx_pcrel)
6483 value -= md_pcrel_from_section (fixP, seg);
6484 }
6485 #endif
6486
6487 if (fixP->fx_subsy != (symbolS *) NULL)
6488 {
6489 /* We can't actually support subtracting a symbol. */
6490 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6491 }
6492
6493 operand = NULL;
6494 if (fixP->fx_pcrel_adjust != 0)
6495 {
6496 /* This is a fixup on an instruction. */
6497 int opindex = fixP->fx_pcrel_adjust & 0xff;
6498
6499 operand = &powerpc_operands[opindex];
6500 #ifdef OBJ_XCOFF
6501 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6502 does not generate a reloc. It uses the offset of `sym' within its
6503 csect. Other usages, such as `.long sym', generate relocs. This
6504 is the documented behaviour of non-TOC symbols. */
6505 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6506 && (operand->bitm & 0xfff0) == 0xfff0
6507 && operand->shift == 0
6508 && (operand->insert == NULL || ppc_obj64)
6509 && fixP->fx_addsy != NULL
6510 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6511 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6512 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6513 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6514 {
6515 value = fixP->fx_offset;
6516 fixP->fx_done = 1;
6517 }
6518
6519 /* During parsing of instructions, a TOC16 reloc is generated for
6520 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6521 in the toc. But at parse time, SYM may be not yet defined, so
6522 check again here. */
6523 if (fixP->fx_r_type == BFD_RELOC_16
6524 && fixP->fx_addsy != NULL
6525 && ppc_is_toc_sym (fixP->fx_addsy))
6526 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6527 #endif
6528 }
6529
6530 /* Calculate value to be stored in field. */
6531 fieldval = value;
6532 switch (fixP->fx_r_type)
6533 {
6534 #ifdef OBJ_ELF
6535 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6536 case BFD_RELOC_PPC_VLE_LO16A:
6537 case BFD_RELOC_PPC_VLE_LO16D:
6538 #endif
6539 case BFD_RELOC_LO16:
6540 case BFD_RELOC_LO16_PCREL:
6541 fieldval = value & 0xffff;
6542 sign_extend_16:
6543 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6544 fieldval = SEX16 (fieldval);
6545 fixP->fx_no_overflow = 1;
6546 break;
6547
6548 case BFD_RELOC_HI16:
6549 case BFD_RELOC_HI16_PCREL:
6550 #ifdef OBJ_ELF
6551 if (REPORT_OVERFLOW_HI && ppc_obj64)
6552 {
6553 fieldval = value >> 16;
6554 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6555 {
6556 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6557 fieldval = ((valueT) fieldval ^ sign) - sign;
6558 }
6559 break;
6560 }
6561 /* Fall thru */
6562
6563 case BFD_RELOC_PPC_VLE_HI16A:
6564 case BFD_RELOC_PPC_VLE_HI16D:
6565 case BFD_RELOC_PPC64_ADDR16_HIGH:
6566 #endif
6567 fieldval = PPC_HI (value);
6568 goto sign_extend_16;
6569
6570 case BFD_RELOC_HI16_S:
6571 case BFD_RELOC_HI16_S_PCREL:
6572 #ifdef OBJ_ELF
6573 if (REPORT_OVERFLOW_HI && ppc_obj64)
6574 {
6575 fieldval = (value + 0x8000) >> 16;
6576 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6577 {
6578 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6579 fieldval = ((valueT) fieldval ^ sign) - sign;
6580 }
6581 break;
6582 }
6583 /* Fall thru */
6584
6585 case BFD_RELOC_PPC_VLE_HA16A:
6586 case BFD_RELOC_PPC_VLE_HA16D:
6587 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6588 #endif
6589 fieldval = PPC_HA (value);
6590 goto sign_extend_16;
6591
6592 #ifdef OBJ_ELF
6593 case BFD_RELOC_PPC64_HIGHER:
6594 fieldval = PPC_HIGHER (value);
6595 goto sign_extend_16;
6596
6597 case BFD_RELOC_PPC64_HIGHER_S:
6598 fieldval = PPC_HIGHERA (value);
6599 goto sign_extend_16;
6600
6601 case BFD_RELOC_PPC64_HIGHEST:
6602 fieldval = PPC_HIGHEST (value);
6603 goto sign_extend_16;
6604
6605 case BFD_RELOC_PPC64_HIGHEST_S:
6606 fieldval = PPC_HIGHESTA (value);
6607 goto sign_extend_16;
6608 #endif
6609
6610 default:
6611 break;
6612 }
6613
6614 if (operand != NULL)
6615 {
6616 /* Handle relocs in an insn. */
6617 char *where;
6618 unsigned long insn;
6619
6620 switch (fixP->fx_r_type)
6621 {
6622 #ifdef OBJ_ELF
6623 /* The following relocs can't be calculated by the assembler.
6624 Leave the field zero. */
6625 case BFD_RELOC_PPC_TPREL16:
6626 case BFD_RELOC_PPC_TPREL16_LO:
6627 case BFD_RELOC_PPC_TPREL16_HI:
6628 case BFD_RELOC_PPC_TPREL16_HA:
6629 case BFD_RELOC_PPC_DTPREL16:
6630 case BFD_RELOC_PPC_DTPREL16_LO:
6631 case BFD_RELOC_PPC_DTPREL16_HI:
6632 case BFD_RELOC_PPC_DTPREL16_HA:
6633 case BFD_RELOC_PPC_GOT_TLSGD16:
6634 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6635 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6636 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6637 case BFD_RELOC_PPC_GOT_TLSLD16:
6638 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6639 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6640 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6641 case BFD_RELOC_PPC_GOT_TPREL16:
6642 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6643 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6644 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6645 case BFD_RELOC_PPC_GOT_DTPREL16:
6646 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6647 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6648 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6649 case BFD_RELOC_PPC64_TPREL16_DS:
6650 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6651 case BFD_RELOC_PPC64_TPREL16_HIGH:
6652 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6653 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6654 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6655 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6656 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6657 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6658 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6659 case BFD_RELOC_PPC64_DTPREL16_DS:
6660 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6661 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6662 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6663 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6664 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6665 gas_assert (fixP->fx_addsy != NULL);
6666 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6667 fieldval = 0;
6668 break;
6669
6670 /* These also should leave the field zero for the same
6671 reason. Note that older versions of gas wrote values
6672 here. If we want to go back to the old behaviour, then
6673 all _LO and _LO_DS cases will need to be treated like
6674 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6675 case BFD_RELOC_16_GOTOFF:
6676 case BFD_RELOC_LO16_GOTOFF:
6677 case BFD_RELOC_HI16_GOTOFF:
6678 case BFD_RELOC_HI16_S_GOTOFF:
6679 case BFD_RELOC_LO16_PLTOFF:
6680 case BFD_RELOC_HI16_PLTOFF:
6681 case BFD_RELOC_HI16_S_PLTOFF:
6682 case BFD_RELOC_GPREL16:
6683 case BFD_RELOC_16_BASEREL:
6684 case BFD_RELOC_LO16_BASEREL:
6685 case BFD_RELOC_HI16_BASEREL:
6686 case BFD_RELOC_HI16_S_BASEREL:
6687 case BFD_RELOC_PPC_TOC16:
6688 case BFD_RELOC_PPC64_TOC16_LO:
6689 case BFD_RELOC_PPC64_TOC16_HI:
6690 case BFD_RELOC_PPC64_TOC16_HA:
6691 case BFD_RELOC_PPC64_PLTGOT16:
6692 case BFD_RELOC_PPC64_PLTGOT16_LO:
6693 case BFD_RELOC_PPC64_PLTGOT16_HI:
6694 case BFD_RELOC_PPC64_PLTGOT16_HA:
6695 case BFD_RELOC_PPC64_GOT16_DS:
6696 case BFD_RELOC_PPC64_GOT16_LO_DS:
6697 case BFD_RELOC_PPC64_PLT16_LO_DS:
6698 case BFD_RELOC_PPC64_SECTOFF_DS:
6699 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6700 case BFD_RELOC_PPC64_TOC16_DS:
6701 case BFD_RELOC_PPC64_TOC16_LO_DS:
6702 case BFD_RELOC_PPC64_PLTGOT16_DS:
6703 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6704 case BFD_RELOC_PPC_EMB_NADDR16:
6705 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6706 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6707 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6708 case BFD_RELOC_PPC_EMB_SDAI16:
6709 case BFD_RELOC_PPC_EMB_SDA2I16:
6710 case BFD_RELOC_PPC_EMB_SDA2REL:
6711 case BFD_RELOC_PPC_EMB_SDA21:
6712 case BFD_RELOC_PPC_EMB_MRKREF:
6713 case BFD_RELOC_PPC_EMB_RELSEC16:
6714 case BFD_RELOC_PPC_EMB_RELST_LO:
6715 case BFD_RELOC_PPC_EMB_RELST_HI:
6716 case BFD_RELOC_PPC_EMB_RELST_HA:
6717 case BFD_RELOC_PPC_EMB_BIT_FLD:
6718 case BFD_RELOC_PPC_EMB_RELSDA:
6719 case BFD_RELOC_PPC_VLE_SDA21:
6720 case BFD_RELOC_PPC_VLE_SDA21_LO:
6721 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6722 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6723 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6724 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6725 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6726 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6727 gas_assert (fixP->fx_addsy != NULL);
6728 /* Fall thru */
6729
6730 case BFD_RELOC_PPC_TLS:
6731 case BFD_RELOC_PPC_TLSGD:
6732 case BFD_RELOC_PPC_TLSLD:
6733 fieldval = 0;
6734 break;
6735 #endif
6736
6737 #ifdef OBJ_XCOFF
6738 case BFD_RELOC_PPC_B16:
6739 /* Adjust the offset to the instruction boundary. */
6740 fieldval += 2;
6741 break;
6742 #endif
6743
6744 default:
6745 break;
6746 }
6747
6748 #ifdef OBJ_ELF
6749 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6750 contents can stay at zero. */
6751 #define APPLY_RELOC fixP->fx_done
6752 #else
6753 #define APPLY_RELOC 1
6754 #endif
6755 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6756 {
6757 /* Fetch the instruction, insert the fully resolved operand
6758 value, and stuff the instruction back again. */
6759 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6760 if (target_big_endian)
6761 {
6762 if (fixP->fx_size == 4)
6763 insn = bfd_getb32 ((unsigned char *) where);
6764 else
6765 insn = bfd_getb16 ((unsigned char *) where);
6766 }
6767 else
6768 {
6769 if (fixP->fx_size == 4)
6770 insn = bfd_getl32 ((unsigned char *) where);
6771 else
6772 insn = bfd_getl16 ((unsigned char *) where);
6773 }
6774 insn = ppc_insert_operand (insn, operand, fieldval,
6775 fixP->tc_fix_data.ppc_cpu,
6776 fixP->fx_file, fixP->fx_line);
6777 if (target_big_endian)
6778 {
6779 if (fixP->fx_size == 4)
6780 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6781 else
6782 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6783 }
6784 else
6785 {
6786 if (fixP->fx_size == 4)
6787 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6788 else
6789 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6790 }
6791 }
6792
6793 if (fixP->fx_done)
6794 /* Nothing else to do here. */
6795 return;
6796
6797 gas_assert (fixP->fx_addsy != NULL);
6798 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6799 {
6800 char *sfile;
6801 unsigned int sline;
6802
6803 /* Use expr_symbol_where to see if this is an expression
6804 symbol. */
6805 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6806 as_bad_where (fixP->fx_file, fixP->fx_line,
6807 _("unresolved expression that must be resolved"));
6808 else
6809 as_bad_where (fixP->fx_file, fixP->fx_line,
6810 _("unsupported relocation against %s"),
6811 S_GET_NAME (fixP->fx_addsy));
6812 fixP->fx_done = 1;
6813 return;
6814 }
6815 }
6816 else
6817 {
6818 /* Handle relocs in data. */
6819 switch (fixP->fx_r_type)
6820 {
6821 case BFD_RELOC_VTABLE_INHERIT:
6822 if (fixP->fx_addsy
6823 && !S_IS_DEFINED (fixP->fx_addsy)
6824 && !S_IS_WEAK (fixP->fx_addsy))
6825 S_SET_WEAK (fixP->fx_addsy);
6826 /* Fall thru */
6827
6828 case BFD_RELOC_VTABLE_ENTRY:
6829 fixP->fx_done = 0;
6830 break;
6831
6832 #ifdef OBJ_ELF
6833 /* These can appear with @l etc. in data. */
6834 case BFD_RELOC_LO16:
6835 case BFD_RELOC_LO16_PCREL:
6836 case BFD_RELOC_HI16:
6837 case BFD_RELOC_HI16_PCREL:
6838 case BFD_RELOC_HI16_S:
6839 case BFD_RELOC_HI16_S_PCREL:
6840 case BFD_RELOC_PPC64_HIGHER:
6841 case BFD_RELOC_PPC64_HIGHER_S:
6842 case BFD_RELOC_PPC64_HIGHEST:
6843 case BFD_RELOC_PPC64_HIGHEST_S:
6844 case BFD_RELOC_PPC64_ADDR16_HIGH:
6845 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6846 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6847 break;
6848
6849 case BFD_RELOC_PPC_DTPMOD:
6850 case BFD_RELOC_PPC_TPREL:
6851 case BFD_RELOC_PPC_DTPREL:
6852 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6853 break;
6854
6855 /* Just punt all of these to the linker. */
6856 case BFD_RELOC_PPC_B16_BRTAKEN:
6857 case BFD_RELOC_PPC_B16_BRNTAKEN:
6858 case BFD_RELOC_16_GOTOFF:
6859 case BFD_RELOC_LO16_GOTOFF:
6860 case BFD_RELOC_HI16_GOTOFF:
6861 case BFD_RELOC_HI16_S_GOTOFF:
6862 case BFD_RELOC_LO16_PLTOFF:
6863 case BFD_RELOC_HI16_PLTOFF:
6864 case BFD_RELOC_HI16_S_PLTOFF:
6865 case BFD_RELOC_PPC_COPY:
6866 case BFD_RELOC_PPC_GLOB_DAT:
6867 case BFD_RELOC_16_BASEREL:
6868 case BFD_RELOC_LO16_BASEREL:
6869 case BFD_RELOC_HI16_BASEREL:
6870 case BFD_RELOC_HI16_S_BASEREL:
6871 case BFD_RELOC_PPC_TLS:
6872 case BFD_RELOC_PPC_DTPREL16_LO:
6873 case BFD_RELOC_PPC_DTPREL16_HI:
6874 case BFD_RELOC_PPC_DTPREL16_HA:
6875 case BFD_RELOC_PPC_TPREL16_LO:
6876 case BFD_RELOC_PPC_TPREL16_HI:
6877 case BFD_RELOC_PPC_TPREL16_HA:
6878 case BFD_RELOC_PPC_GOT_TLSGD16:
6879 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6880 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6881 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6882 case BFD_RELOC_PPC_GOT_TLSLD16:
6883 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6884 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6885 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6886 case BFD_RELOC_PPC_GOT_DTPREL16:
6887 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6888 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6889 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6890 case BFD_RELOC_PPC_GOT_TPREL16:
6891 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6892 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6893 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6894 case BFD_RELOC_24_PLT_PCREL:
6895 case BFD_RELOC_PPC_LOCAL24PC:
6896 case BFD_RELOC_32_PLT_PCREL:
6897 case BFD_RELOC_GPREL16:
6898 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6899 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6900 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6901 case BFD_RELOC_PPC_EMB_NADDR32:
6902 case BFD_RELOC_PPC_EMB_NADDR16:
6903 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6904 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6905 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6906 case BFD_RELOC_PPC_EMB_SDAI16:
6907 case BFD_RELOC_PPC_EMB_SDA2REL:
6908 case BFD_RELOC_PPC_EMB_SDA2I16:
6909 case BFD_RELOC_PPC_EMB_SDA21:
6910 case BFD_RELOC_PPC_VLE_SDA21_LO:
6911 case BFD_RELOC_PPC_EMB_MRKREF:
6912 case BFD_RELOC_PPC_EMB_RELSEC16:
6913 case BFD_RELOC_PPC_EMB_RELST_LO:
6914 case BFD_RELOC_PPC_EMB_RELST_HI:
6915 case BFD_RELOC_PPC_EMB_RELST_HA:
6916 case BFD_RELOC_PPC_EMB_BIT_FLD:
6917 case BFD_RELOC_PPC_EMB_RELSDA:
6918 case BFD_RELOC_PPC64_TOC:
6919 case BFD_RELOC_PPC_TOC16:
6920 case BFD_RELOC_PPC64_TOC16_LO:
6921 case BFD_RELOC_PPC64_TOC16_HI:
6922 case BFD_RELOC_PPC64_TOC16_HA:
6923 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6924 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6925 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6926 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6927 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6928 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6929 case BFD_RELOC_PPC64_TPREL16_HIGH:
6930 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6931 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6932 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6933 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6934 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6935 fixP->fx_done = 0;
6936 break;
6937 #endif
6938
6939 #ifdef OBJ_XCOFF
6940 case BFD_RELOC_NONE:
6941 #endif
6942 case BFD_RELOC_CTOR:
6943 case BFD_RELOC_32:
6944 case BFD_RELOC_32_PCREL:
6945 case BFD_RELOC_RVA:
6946 case BFD_RELOC_64:
6947 case BFD_RELOC_64_PCREL:
6948 case BFD_RELOC_16:
6949 case BFD_RELOC_16_PCREL:
6950 case BFD_RELOC_8:
6951 break;
6952
6953 default:
6954 fprintf (stderr,
6955 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6956 fflush (stderr);
6957 abort ();
6958 }
6959
6960 if (fixP->fx_size && APPLY_RELOC)
6961 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6962 fieldval, fixP->fx_size);
6963 }
6964
6965 /* We are only able to convert some relocs to pc-relative. */
6966 if (!fixP->fx_done && fixP->fx_pcrel)
6967 {
6968 switch (fixP->fx_r_type)
6969 {
6970 case BFD_RELOC_LO16:
6971 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6972 break;
6973
6974 case BFD_RELOC_HI16:
6975 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6976 break;
6977
6978 case BFD_RELOC_HI16_S:
6979 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6980 break;
6981
6982 case BFD_RELOC_64:
6983 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6984 break;
6985
6986 case BFD_RELOC_32:
6987 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6988 break;
6989
6990 case BFD_RELOC_16:
6991 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6992 break;
6993
6994 /* Some of course are already pc-relative. */
6995 case BFD_RELOC_LO16_PCREL:
6996 case BFD_RELOC_HI16_PCREL:
6997 case BFD_RELOC_HI16_S_PCREL:
6998 case BFD_RELOC_64_PCREL:
6999 case BFD_RELOC_32_PCREL:
7000 case BFD_RELOC_16_PCREL:
7001 case BFD_RELOC_PPC_B16:
7002 case BFD_RELOC_PPC_B16_BRTAKEN:
7003 case BFD_RELOC_PPC_B16_BRNTAKEN:
7004 case BFD_RELOC_PPC_B26:
7005 case BFD_RELOC_PPC_LOCAL24PC:
7006 case BFD_RELOC_24_PLT_PCREL:
7007 case BFD_RELOC_32_PLT_PCREL:
7008 case BFD_RELOC_64_PLT_PCREL:
7009 case BFD_RELOC_PPC_VLE_REL8:
7010 case BFD_RELOC_PPC_VLE_REL15:
7011 case BFD_RELOC_PPC_VLE_REL24:
7012 break;
7013
7014 default:
7015 if (fixP->fx_addsy)
7016 {
7017 char *sfile;
7018 unsigned int sline;
7019
7020 /* Use expr_symbol_where to see if this is an
7021 expression symbol. */
7022 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7023 as_bad_where (fixP->fx_file, fixP->fx_line,
7024 _("unresolved expression that must"
7025 " be resolved"));
7026 else
7027 as_bad_where (fixP->fx_file, fixP->fx_line,
7028 _("cannot emit PC relative %s relocation"
7029 " against %s"),
7030 bfd_get_reloc_code_name (fixP->fx_r_type),
7031 S_GET_NAME (fixP->fx_addsy));
7032 }
7033 else
7034 as_bad_where (fixP->fx_file, fixP->fx_line,
7035 _("unable to resolve expression"));
7036 fixP->fx_done = 1;
7037 break;
7038 }
7039 }
7040
7041 #ifdef OBJ_ELF
7042 ppc_elf_validate_fix (fixP, seg);
7043 fixP->fx_addnumber = value;
7044
7045 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7046 from the section contents. If we are going to be emitting a reloc
7047 then the section contents are immaterial, so don't warn if they
7048 happen to overflow. Leave such warnings to ld. */
7049 if (!fixP->fx_done)
7050 {
7051 fixP->fx_no_overflow = 1;
7052
7053 /* Arrange to emit .TOC. as a normal symbol if used in anything
7054 but .TOC.@tocbase. */
7055 if (ppc_obj64
7056 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7057 && fixP->fx_addsy != NULL
7058 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7059 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7060 }
7061 #else
7062 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7063 fixP->fx_addnumber = 0;
7064 else
7065 {
7066 #ifdef TE_PE
7067 fixP->fx_addnumber = 0;
7068 #else
7069 /* We want to use the offset within the toc, not the actual VMA
7070 of the symbol. */
7071 fixP->fx_addnumber =
7072 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7073 - S_GET_VALUE (ppc_toc_csect);
7074 /* Set *valP to avoid errors. */
7075 *valP = value;
7076 #endif
7077 }
7078 #endif
7079 }
7080
7081 /* Generate a reloc for a fixup. */
7082
7083 arelent *
7084 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7085 {
7086 arelent *reloc;
7087
7088 reloc = (arelent *) xmalloc (sizeof (arelent));
7089
7090 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7091 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7092 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7093 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7094 if (reloc->howto == (reloc_howto_type *) NULL)
7095 {
7096 as_bad_where (fixp->fx_file, fixp->fx_line,
7097 _("reloc %d not supported by object file format"),
7098 (int) fixp->fx_r_type);
7099 return NULL;
7100 }
7101 reloc->addend = fixp->fx_addnumber;
7102
7103 return reloc;
7104 }
7105
7106 void
7107 ppc_cfi_frame_initial_instructions (void)
7108 {
7109 cfi_add_CFA_def_cfa (1, 0);
7110 }
7111
7112 int
7113 tc_ppc_regname_to_dw2regnum (char *regname)
7114 {
7115 unsigned int regnum = -1;
7116 unsigned int i;
7117 const char *p;
7118 char *q;
7119 static struct { char *name; int dw2regnum; } regnames[] =
7120 {
7121 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7122 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7123 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7124 { "spe_acc", 111 }, { "spefscr", 112 }
7125 };
7126
7127 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7128 if (strcmp (regnames[i].name, regname) == 0)
7129 return regnames[i].dw2regnum;
7130
7131 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7132 {
7133 p = regname + 1 + (regname[1] == '.');
7134 regnum = strtoul (p, &q, 10);
7135 if (p == q || *q || regnum >= 32)
7136 return -1;
7137 if (regname[0] == 'f')
7138 regnum += 32;
7139 else if (regname[0] == 'v')
7140 regnum += 77;
7141 }
7142 else if (regname[0] == 'c' && regname[1] == 'r')
7143 {
7144 p = regname + 2 + (regname[2] == '.');
7145 if (p[0] < '0' || p[0] > '7' || p[1])
7146 return -1;
7147 regnum = p[0] - '0' + 68;
7148 }
7149 return regnum;
7150 }
GDB Binutils - Deliverables
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