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* config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27 #include "dw2gencfi.h"
28 #include "opcode/ppc.h"
29
30 #ifdef OBJ_ELF
31 #include "elf/ppc.h"
32 #include "dwarf2dbg.h"
33 #endif
34
35 #ifdef TE_PE
36 #include "coff/pe.h"
37 #endif
38
39 #ifdef OBJ_XCOFF
40 #include "coff/xcoff.h"
41 #include "libxcoff.h"
42 #endif
43
44 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46 /* Tell the main code what the endianness is. */
47 extern int target_big_endian;
48
49 /* Whether or not, we've set target_big_endian. */
50 static int set_target_endian = 0;
51
52 /* Whether to use user friendly register names. */
53 #ifndef TARGET_REG_NAMES_P
54 #ifdef TE_PE
55 #define TARGET_REG_NAMES_P TRUE
56 #else
57 #define TARGET_REG_NAMES_P FALSE
58 #endif
59 #endif
60
61 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64 /* #lo(value) denotes the least significant 16 bits of the indicated. */
65 #define PPC_LO(v) ((v) & 0xffff)
66
67 /* Split the indicated value with the msbs in bits 11-15
68 and the lsbs in bits 21-31. */
69 #define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff)
70
71 /* Split the indicated value with the msbs in bits 6-10
72 and the lsbs in bits 21-31. */
73 #define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff)
74
75 /* #lo(value) denotes the lsb 16 bits in split16a format. */
76 #define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v))
77
78 /* #lo(value) denotes the lsb 16 bits in split16d format. */
79 #define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v))
80
81 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
82 #define PPC_HI(v) (((v) >> 16) & 0xffff)
83
84 /* #lo(value) denotes the msb 16 bits in split16a format. */
85 #define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v))
86
87 /* #lo(value) denotes the msb 16 bits in split16d format. */
88 #define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v))
89
90 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
91 the indicated value, compensating for #lo() being treated as a
92 signed number. */
93 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
94
95 /* #ha(value) denotes the high adjusted value in split16a format. */
96 #define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v))
97
98 /* #ha(value) denotes the high adjusted value in split16d format. */
99 #define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v))
100
101 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
102 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
103
104 /* #highera(value) denotes bits 32 through 47 of the indicated value,
105 compensating for #lo() being treated as a signed number. */
106 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
107
108 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
109 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
110
111 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
112 compensating for #lo being treated as a signed number. */
113 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
114
115 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
116
117 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
118
119 static void ppc_macro (char *, const struct powerpc_macro *);
120 static void ppc_byte (int);
121
122 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
123 static void ppc_tc (int);
124 static void ppc_machine (int);
125 #endif
126
127 #ifdef OBJ_XCOFF
128 static void ppc_comm (int);
129 static void ppc_bb (int);
130 static void ppc_bc (int);
131 static void ppc_bf (int);
132 static void ppc_biei (int);
133 static void ppc_bs (int);
134 static void ppc_eb (int);
135 static void ppc_ec (int);
136 static void ppc_ef (int);
137 static void ppc_es (int);
138 static void ppc_csect (int);
139 static void ppc_dwsect (int);
140 static void ppc_change_csect (symbolS *, offsetT);
141 static void ppc_function (int);
142 static void ppc_extern (int);
143 static void ppc_lglobl (int);
144 static void ppc_ref (int);
145 static void ppc_section (int);
146 static void ppc_named_section (int);
147 static void ppc_stabx (int);
148 static void ppc_rename (int);
149 static void ppc_toc (int);
150 static void ppc_xcoff_cons (int);
151 static void ppc_vbyte (int);
152 #endif
153
154 #ifdef OBJ_ELF
155 static void ppc_elf_cons (int);
156 static void ppc_elf_rdata (int);
157 static void ppc_elf_lcomm (int);
158 #endif
159
160 #ifdef TE_PE
161 static void ppc_previous (int);
162 static void ppc_pdata (int);
163 static void ppc_ydata (int);
164 static void ppc_reldata (int);
165 static void ppc_rdata (int);
166 static void ppc_ualong (int);
167 static void ppc_znop (int);
168 static void ppc_pe_comm (int);
169 static void ppc_pe_section (int);
170 static void ppc_pe_function (int);
171 static void ppc_pe_tocd (int);
172 #endif
173 \f
174 /* Generic assembler global variables which must be defined by all
175 targets. */
176
177 #ifdef OBJ_ELF
178 /* This string holds the chars that always start a comment. If the
179 pre-processor is disabled, these aren't very useful. The macro
180 tc_comment_chars points to this. We use this, rather than the
181 usual comment_chars, so that we can switch for Solaris conventions. */
182 static const char ppc_solaris_comment_chars[] = "#!";
183 static const char ppc_eabi_comment_chars[] = "#";
184
185 #ifdef TARGET_SOLARIS_COMMENT
186 const char *ppc_comment_chars = ppc_solaris_comment_chars;
187 #else
188 const char *ppc_comment_chars = ppc_eabi_comment_chars;
189 #endif
190 #else
191 const char comment_chars[] = "#";
192 #endif
193
194 /* Characters which start a comment at the beginning of a line. */
195 const char line_comment_chars[] = "#";
196
197 /* Characters which may be used to separate multiple commands on a
198 single line. */
199 const char line_separator_chars[] = ";";
200
201 /* Characters which are used to indicate an exponent in a floating
202 point number. */
203 const char EXP_CHARS[] = "eE";
204
205 /* Characters which mean that a number is a floating point constant,
206 as in 0d1.0. */
207 const char FLT_CHARS[] = "dD";
208
209 /* Anything that can start an operand needs to be mentioned here,
210 to stop the input scrubber eating whitespace. */
211 const char ppc_symbol_chars[] = "%[";
212
213 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
214 int ppc_cie_data_alignment;
215
216 /* The dwarf2 minimum instruction length. */
217 int ppc_dwarf2_line_min_insn_length;
218
219 /* More than this number of nops in an alignment op gets a branch
220 instead. */
221 unsigned long nop_limit = 4;
222
223 /* The type of processor we are assembling for. This is one or more
224 of the PPC_OPCODE flags defined in opcode/ppc.h. */
225 ppc_cpu_t ppc_cpu = 0;
226 ppc_cpu_t sticky = 0;
227
228 /* Flags set on encountering toc relocs. */
229 enum {
230 has_large_toc_reloc = 1,
231 has_small_toc_reloc = 2
232 } toc_reloc_types;
233 \f
234 /* The target specific pseudo-ops which we support. */
235
236 const pseudo_typeS md_pseudo_table[] =
237 {
238 /* Pseudo-ops which must be overridden. */
239 { "byte", ppc_byte, 0 },
240
241 #ifdef OBJ_XCOFF
242 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
243 legitimately belong in the obj-*.c file. However, XCOFF is based
244 on COFF, and is only implemented for the RS/6000. We just use
245 obj-coff.c, and add what we need here. */
246 { "comm", ppc_comm, 0 },
247 { "lcomm", ppc_comm, 1 },
248 { "bb", ppc_bb, 0 },
249 { "bc", ppc_bc, 0 },
250 { "bf", ppc_bf, 0 },
251 { "bi", ppc_biei, 0 },
252 { "bs", ppc_bs, 0 },
253 { "csect", ppc_csect, 0 },
254 { "dwsect", ppc_dwsect, 0 },
255 { "data", ppc_section, 'd' },
256 { "eb", ppc_eb, 0 },
257 { "ec", ppc_ec, 0 },
258 { "ef", ppc_ef, 0 },
259 { "ei", ppc_biei, 1 },
260 { "es", ppc_es, 0 },
261 { "extern", ppc_extern, 0 },
262 { "function", ppc_function, 0 },
263 { "lglobl", ppc_lglobl, 0 },
264 { "ref", ppc_ref, 0 },
265 { "rename", ppc_rename, 0 },
266 { "section", ppc_named_section, 0 },
267 { "stabx", ppc_stabx, 0 },
268 { "text", ppc_section, 't' },
269 { "toc", ppc_toc, 0 },
270 { "long", ppc_xcoff_cons, 2 },
271 { "llong", ppc_xcoff_cons, 3 },
272 { "word", ppc_xcoff_cons, 1 },
273 { "short", ppc_xcoff_cons, 1 },
274 { "vbyte", ppc_vbyte, 0 },
275 #endif
276
277 #ifdef OBJ_ELF
278 { "llong", ppc_elf_cons, 8 },
279 { "quad", ppc_elf_cons, 8 },
280 { "long", ppc_elf_cons, 4 },
281 { "word", ppc_elf_cons, 2 },
282 { "short", ppc_elf_cons, 2 },
283 { "rdata", ppc_elf_rdata, 0 },
284 { "rodata", ppc_elf_rdata, 0 },
285 { "lcomm", ppc_elf_lcomm, 0 },
286 #endif
287
288 #ifdef TE_PE
289 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
290 { "previous", ppc_previous, 0 },
291 { "pdata", ppc_pdata, 0 },
292 { "ydata", ppc_ydata, 0 },
293 { "reldata", ppc_reldata, 0 },
294 { "rdata", ppc_rdata, 0 },
295 { "ualong", ppc_ualong, 0 },
296 { "znop", ppc_znop, 0 },
297 { "comm", ppc_pe_comm, 0 },
298 { "lcomm", ppc_pe_comm, 1 },
299 { "section", ppc_pe_section, 0 },
300 { "function", ppc_pe_function,0 },
301 { "tocd", ppc_pe_tocd, 0 },
302 #endif
303
304 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
305 { "tc", ppc_tc, 0 },
306 { "machine", ppc_machine, 0 },
307 #endif
308
309 { NULL, NULL, 0 }
310 };
311
312 \f
313 /* Predefined register names if -mregnames (or default for Windows NT).
314 In general, there are lots of them, in an attempt to be compatible
315 with a number of other Windows NT assemblers. */
316
317 /* Structure to hold information about predefined registers. */
318 struct pd_reg
319 {
320 char *name;
321 int value;
322 };
323
324 /* List of registers that are pre-defined:
325
326 Each general register has predefined names of the form:
327 1. r<reg_num> which has the value <reg_num>.
328 2. r.<reg_num> which has the value <reg_num>.
329
330 Each floating point register has predefined names of the form:
331 1. f<reg_num> which has the value <reg_num>.
332 2. f.<reg_num> which has the value <reg_num>.
333
334 Each vector unit register has predefined names of the form:
335 1. v<reg_num> which has the value <reg_num>.
336 2. v.<reg_num> which has the value <reg_num>.
337
338 Each condition register has predefined names of the form:
339 1. cr<reg_num> which has the value <reg_num>.
340 2. cr.<reg_num> which has the value <reg_num>.
341
342 There are individual registers as well:
343 sp or r.sp has the value 1
344 rtoc or r.toc has the value 2
345 fpscr has the value 0
346 xer has the value 1
347 lr has the value 8
348 ctr has the value 9
349 pmr has the value 0
350 dar has the value 19
351 dsisr has the value 18
352 dec has the value 22
353 sdr1 has the value 25
354 srr0 has the value 26
355 srr1 has the value 27
356
357 The table is sorted. Suitable for searching by a binary search. */
358
359 static const struct pd_reg pre_defined_registers[] =
360 {
361 { "cr.0", 0 }, /* Condition Registers */
362 { "cr.1", 1 },
363 { "cr.2", 2 },
364 { "cr.3", 3 },
365 { "cr.4", 4 },
366 { "cr.5", 5 },
367 { "cr.6", 6 },
368 { "cr.7", 7 },
369
370 { "cr0", 0 },
371 { "cr1", 1 },
372 { "cr2", 2 },
373 { "cr3", 3 },
374 { "cr4", 4 },
375 { "cr5", 5 },
376 { "cr6", 6 },
377 { "cr7", 7 },
378
379 { "ctr", 9 },
380
381 { "dar", 19 }, /* Data Access Register */
382 { "dec", 22 }, /* Decrementer */
383 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
384
385 { "f.0", 0 }, /* Floating point registers */
386 { "f.1", 1 },
387 { "f.10", 10 },
388 { "f.11", 11 },
389 { "f.12", 12 },
390 { "f.13", 13 },
391 { "f.14", 14 },
392 { "f.15", 15 },
393 { "f.16", 16 },
394 { "f.17", 17 },
395 { "f.18", 18 },
396 { "f.19", 19 },
397 { "f.2", 2 },
398 { "f.20", 20 },
399 { "f.21", 21 },
400 { "f.22", 22 },
401 { "f.23", 23 },
402 { "f.24", 24 },
403 { "f.25", 25 },
404 { "f.26", 26 },
405 { "f.27", 27 },
406 { "f.28", 28 },
407 { "f.29", 29 },
408 { "f.3", 3 },
409 { "f.30", 30 },
410 { "f.31", 31 },
411
412 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
413 { "f.33", 33 },
414 { "f.34", 34 },
415 { "f.35", 35 },
416 { "f.36", 36 },
417 { "f.37", 37 },
418 { "f.38", 38 },
419 { "f.39", 39 },
420 { "f.4", 4 },
421 { "f.40", 40 },
422 { "f.41", 41 },
423 { "f.42", 42 },
424 { "f.43", 43 },
425 { "f.44", 44 },
426 { "f.45", 45 },
427 { "f.46", 46 },
428 { "f.47", 47 },
429 { "f.48", 48 },
430 { "f.49", 49 },
431 { "f.5", 5 },
432 { "f.50", 50 },
433 { "f.51", 51 },
434 { "f.52", 52 },
435 { "f.53", 53 },
436 { "f.54", 54 },
437 { "f.55", 55 },
438 { "f.56", 56 },
439 { "f.57", 57 },
440 { "f.58", 58 },
441 { "f.59", 59 },
442 { "f.6", 6 },
443 { "f.60", 60 },
444 { "f.61", 61 },
445 { "f.62", 62 },
446 { "f.63", 63 },
447 { "f.7", 7 },
448 { "f.8", 8 },
449 { "f.9", 9 },
450
451 { "f0", 0 },
452 { "f1", 1 },
453 { "f10", 10 },
454 { "f11", 11 },
455 { "f12", 12 },
456 { "f13", 13 },
457 { "f14", 14 },
458 { "f15", 15 },
459 { "f16", 16 },
460 { "f17", 17 },
461 { "f18", 18 },
462 { "f19", 19 },
463 { "f2", 2 },
464 { "f20", 20 },
465 { "f21", 21 },
466 { "f22", 22 },
467 { "f23", 23 },
468 { "f24", 24 },
469 { "f25", 25 },
470 { "f26", 26 },
471 { "f27", 27 },
472 { "f28", 28 },
473 { "f29", 29 },
474 { "f3", 3 },
475 { "f30", 30 },
476 { "f31", 31 },
477
478 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
479 { "f33", 33 },
480 { "f34", 34 },
481 { "f35", 35 },
482 { "f36", 36 },
483 { "f37", 37 },
484 { "f38", 38 },
485 { "f39", 39 },
486 { "f4", 4 },
487 { "f40", 40 },
488 { "f41", 41 },
489 { "f42", 42 },
490 { "f43", 43 },
491 { "f44", 44 },
492 { "f45", 45 },
493 { "f46", 46 },
494 { "f47", 47 },
495 { "f48", 48 },
496 { "f49", 49 },
497 { "f5", 5 },
498 { "f50", 50 },
499 { "f51", 51 },
500 { "f52", 52 },
501 { "f53", 53 },
502 { "f54", 54 },
503 { "f55", 55 },
504 { "f56", 56 },
505 { "f57", 57 },
506 { "f58", 58 },
507 { "f59", 59 },
508 { "f6", 6 },
509 { "f60", 60 },
510 { "f61", 61 },
511 { "f62", 62 },
512 { "f63", 63 },
513 { "f7", 7 },
514 { "f8", 8 },
515 { "f9", 9 },
516
517 { "fpscr", 0 },
518
519 /* Quantization registers used with pair single instructions. */
520 { "gqr.0", 0 },
521 { "gqr.1", 1 },
522 { "gqr.2", 2 },
523 { "gqr.3", 3 },
524 { "gqr.4", 4 },
525 { "gqr.5", 5 },
526 { "gqr.6", 6 },
527 { "gqr.7", 7 },
528 { "gqr0", 0 },
529 { "gqr1", 1 },
530 { "gqr2", 2 },
531 { "gqr3", 3 },
532 { "gqr4", 4 },
533 { "gqr5", 5 },
534 { "gqr6", 6 },
535 { "gqr7", 7 },
536
537 { "lr", 8 }, /* Link Register */
538
539 { "pmr", 0 },
540
541 { "r.0", 0 }, /* General Purpose Registers */
542 { "r.1", 1 },
543 { "r.10", 10 },
544 { "r.11", 11 },
545 { "r.12", 12 },
546 { "r.13", 13 },
547 { "r.14", 14 },
548 { "r.15", 15 },
549 { "r.16", 16 },
550 { "r.17", 17 },
551 { "r.18", 18 },
552 { "r.19", 19 },
553 { "r.2", 2 },
554 { "r.20", 20 },
555 { "r.21", 21 },
556 { "r.22", 22 },
557 { "r.23", 23 },
558 { "r.24", 24 },
559 { "r.25", 25 },
560 { "r.26", 26 },
561 { "r.27", 27 },
562 { "r.28", 28 },
563 { "r.29", 29 },
564 { "r.3", 3 },
565 { "r.30", 30 },
566 { "r.31", 31 },
567 { "r.4", 4 },
568 { "r.5", 5 },
569 { "r.6", 6 },
570 { "r.7", 7 },
571 { "r.8", 8 },
572 { "r.9", 9 },
573
574 { "r.sp", 1 }, /* Stack Pointer */
575
576 { "r.toc", 2 }, /* Pointer to the table of contents */
577
578 { "r0", 0 }, /* More general purpose registers */
579 { "r1", 1 },
580 { "r10", 10 },
581 { "r11", 11 },
582 { "r12", 12 },
583 { "r13", 13 },
584 { "r14", 14 },
585 { "r15", 15 },
586 { "r16", 16 },
587 { "r17", 17 },
588 { "r18", 18 },
589 { "r19", 19 },
590 { "r2", 2 },
591 { "r20", 20 },
592 { "r21", 21 },
593 { "r22", 22 },
594 { "r23", 23 },
595 { "r24", 24 },
596 { "r25", 25 },
597 { "r26", 26 },
598 { "r27", 27 },
599 { "r28", 28 },
600 { "r29", 29 },
601 { "r3", 3 },
602 { "r30", 30 },
603 { "r31", 31 },
604 { "r4", 4 },
605 { "r5", 5 },
606 { "r6", 6 },
607 { "r7", 7 },
608 { "r8", 8 },
609 { "r9", 9 },
610
611 { "rtoc", 2 }, /* Table of contents */
612
613 { "sdr1", 25 }, /* Storage Description Register 1 */
614
615 { "sp", 1 },
616
617 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
618 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
619
620 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
621 { "v.1", 1 },
622 { "v.10", 10 },
623 { "v.11", 11 },
624 { "v.12", 12 },
625 { "v.13", 13 },
626 { "v.14", 14 },
627 { "v.15", 15 },
628 { "v.16", 16 },
629 { "v.17", 17 },
630 { "v.18", 18 },
631 { "v.19", 19 },
632 { "v.2", 2 },
633 { "v.20", 20 },
634 { "v.21", 21 },
635 { "v.22", 22 },
636 { "v.23", 23 },
637 { "v.24", 24 },
638 { "v.25", 25 },
639 { "v.26", 26 },
640 { "v.27", 27 },
641 { "v.28", 28 },
642 { "v.29", 29 },
643 { "v.3", 3 },
644 { "v.30", 30 },
645 { "v.31", 31 },
646 { "v.4", 4 },
647 { "v.5", 5 },
648 { "v.6", 6 },
649 { "v.7", 7 },
650 { "v.8", 8 },
651 { "v.9", 9 },
652
653 { "v0", 0 },
654 { "v1", 1 },
655 { "v10", 10 },
656 { "v11", 11 },
657 { "v12", 12 },
658 { "v13", 13 },
659 { "v14", 14 },
660 { "v15", 15 },
661 { "v16", 16 },
662 { "v17", 17 },
663 { "v18", 18 },
664 { "v19", 19 },
665 { "v2", 2 },
666 { "v20", 20 },
667 { "v21", 21 },
668 { "v22", 22 },
669 { "v23", 23 },
670 { "v24", 24 },
671 { "v25", 25 },
672 { "v26", 26 },
673 { "v27", 27 },
674 { "v28", 28 },
675 { "v29", 29 },
676 { "v3", 3 },
677 { "v30", 30 },
678 { "v31", 31 },
679 { "v4", 4 },
680 { "v5", 5 },
681 { "v6", 6 },
682 { "v7", 7 },
683 { "v8", 8 },
684 { "v9", 9 },
685
686 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
687 { "vs.1", 1 },
688 { "vs.10", 10 },
689 { "vs.11", 11 },
690 { "vs.12", 12 },
691 { "vs.13", 13 },
692 { "vs.14", 14 },
693 { "vs.15", 15 },
694 { "vs.16", 16 },
695 { "vs.17", 17 },
696 { "vs.18", 18 },
697 { "vs.19", 19 },
698 { "vs.2", 2 },
699 { "vs.20", 20 },
700 { "vs.21", 21 },
701 { "vs.22", 22 },
702 { "vs.23", 23 },
703 { "vs.24", 24 },
704 { "vs.25", 25 },
705 { "vs.26", 26 },
706 { "vs.27", 27 },
707 { "vs.28", 28 },
708 { "vs.29", 29 },
709 { "vs.3", 3 },
710 { "vs.30", 30 },
711 { "vs.31", 31 },
712 { "vs.32", 32 },
713 { "vs.33", 33 },
714 { "vs.34", 34 },
715 { "vs.35", 35 },
716 { "vs.36", 36 },
717 { "vs.37", 37 },
718 { "vs.38", 38 },
719 { "vs.39", 39 },
720 { "vs.4", 4 },
721 { "vs.40", 40 },
722 { "vs.41", 41 },
723 { "vs.42", 42 },
724 { "vs.43", 43 },
725 { "vs.44", 44 },
726 { "vs.45", 45 },
727 { "vs.46", 46 },
728 { "vs.47", 47 },
729 { "vs.48", 48 },
730 { "vs.49", 49 },
731 { "vs.5", 5 },
732 { "vs.50", 50 },
733 { "vs.51", 51 },
734 { "vs.52", 52 },
735 { "vs.53", 53 },
736 { "vs.54", 54 },
737 { "vs.55", 55 },
738 { "vs.56", 56 },
739 { "vs.57", 57 },
740 { "vs.58", 58 },
741 { "vs.59", 59 },
742 { "vs.6", 6 },
743 { "vs.60", 60 },
744 { "vs.61", 61 },
745 { "vs.62", 62 },
746 { "vs.63", 63 },
747 { "vs.7", 7 },
748 { "vs.8", 8 },
749 { "vs.9", 9 },
750
751 { "vs0", 0 },
752 { "vs1", 1 },
753 { "vs10", 10 },
754 { "vs11", 11 },
755 { "vs12", 12 },
756 { "vs13", 13 },
757 { "vs14", 14 },
758 { "vs15", 15 },
759 { "vs16", 16 },
760 { "vs17", 17 },
761 { "vs18", 18 },
762 { "vs19", 19 },
763 { "vs2", 2 },
764 { "vs20", 20 },
765 { "vs21", 21 },
766 { "vs22", 22 },
767 { "vs23", 23 },
768 { "vs24", 24 },
769 { "vs25", 25 },
770 { "vs26", 26 },
771 { "vs27", 27 },
772 { "vs28", 28 },
773 { "vs29", 29 },
774 { "vs3", 3 },
775 { "vs30", 30 },
776 { "vs31", 31 },
777 { "vs32", 32 },
778 { "vs33", 33 },
779 { "vs34", 34 },
780 { "vs35", 35 },
781 { "vs36", 36 },
782 { "vs37", 37 },
783 { "vs38", 38 },
784 { "vs39", 39 },
785 { "vs4", 4 },
786 { "vs40", 40 },
787 { "vs41", 41 },
788 { "vs42", 42 },
789 { "vs43", 43 },
790 { "vs44", 44 },
791 { "vs45", 45 },
792 { "vs46", 46 },
793 { "vs47", 47 },
794 { "vs48", 48 },
795 { "vs49", 49 },
796 { "vs5", 5 },
797 { "vs50", 50 },
798 { "vs51", 51 },
799 { "vs52", 52 },
800 { "vs53", 53 },
801 { "vs54", 54 },
802 { "vs55", 55 },
803 { "vs56", 56 },
804 { "vs57", 57 },
805 { "vs58", 58 },
806 { "vs59", 59 },
807 { "vs6", 6 },
808 { "vs60", 60 },
809 { "vs61", 61 },
810 { "vs62", 62 },
811 { "vs63", 63 },
812 { "vs7", 7 },
813 { "vs8", 8 },
814 { "vs9", 9 },
815
816 { "xer", 1 },
817
818 };
819
820 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
821
822 /* Given NAME, find the register number associated with that name, return
823 the integer value associated with the given name or -1 on failure. */
824
825 static int
826 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
827 {
828 int middle, low, high;
829 int cmp;
830
831 low = 0;
832 high = regcount - 1;
833
834 do
835 {
836 middle = (low + high) / 2;
837 cmp = strcasecmp (name, regs[middle].name);
838 if (cmp < 0)
839 high = middle - 1;
840 else if (cmp > 0)
841 low = middle + 1;
842 else
843 return regs[middle].value;
844 }
845 while (low <= high);
846
847 return -1;
848 }
849
850 /*
851 * Summary of register_name.
852 *
853 * in: Input_line_pointer points to 1st char of operand.
854 *
855 * out: A expressionS.
856 * The operand may have been a register: in this case, X_op == O_register,
857 * X_add_number is set to the register number, and truth is returned.
858 * Input_line_pointer->(next non-blank) char after operand, or is in its
859 * original state.
860 */
861
862 static bfd_boolean
863 register_name (expressionS *expressionP)
864 {
865 int reg_number;
866 char *name;
867 char *start;
868 char c;
869
870 /* Find the spelling of the operand. */
871 start = name = input_line_pointer;
872 if (name[0] == '%' && ISALPHA (name[1]))
873 name = ++input_line_pointer;
874
875 else if (!reg_names_p || !ISALPHA (name[0]))
876 return FALSE;
877
878 c = get_symbol_end ();
879 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
880
881 /* Put back the delimiting char. */
882 *input_line_pointer = c;
883
884 /* Look to see if it's in the register table. */
885 if (reg_number >= 0)
886 {
887 expressionP->X_op = O_register;
888 expressionP->X_add_number = reg_number;
889
890 /* Make the rest nice. */
891 expressionP->X_add_symbol = NULL;
892 expressionP->X_op_symbol = NULL;
893 return TRUE;
894 }
895
896 /* Reset the line as if we had not done anything. */
897 input_line_pointer = start;
898 return FALSE;
899 }
900 \f
901 /* This function is called for each symbol seen in an expression. It
902 handles the special parsing which PowerPC assemblers are supposed
903 to use for condition codes. */
904
905 /* Whether to do the special parsing. */
906 static bfd_boolean cr_operand;
907
908 /* Names to recognize in a condition code. This table is sorted. */
909 static const struct pd_reg cr_names[] =
910 {
911 { "cr0", 0 },
912 { "cr1", 1 },
913 { "cr2", 2 },
914 { "cr3", 3 },
915 { "cr4", 4 },
916 { "cr5", 5 },
917 { "cr6", 6 },
918 { "cr7", 7 },
919 { "eq", 2 },
920 { "gt", 1 },
921 { "lt", 0 },
922 { "so", 3 },
923 { "un", 3 }
924 };
925
926 /* Parsing function. This returns non-zero if it recognized an
927 expression. */
928
929 int
930 ppc_parse_name (const char *name, expressionS *exp)
931 {
932 int val;
933
934 if (! cr_operand)
935 return 0;
936
937 if (*name == '%')
938 ++name;
939 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
940 name);
941 if (val < 0)
942 return 0;
943
944 exp->X_op = O_constant;
945 exp->X_add_number = val;
946
947 return 1;
948 }
949 \f
950 /* Local variables. */
951
952 /* Whether to target xcoff64/elf64. */
953 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
954
955 /* Opcode hash table. */
956 static struct hash_control *ppc_hash;
957
958 /* Macro hash table. */
959 static struct hash_control *ppc_macro_hash;
960
961 #ifdef OBJ_ELF
962 /* What type of shared library support to use. */
963 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
964
965 /* Flags to set in the elf header. */
966 static flagword ppc_flags = 0;
967
968 /* Whether this is Solaris or not. */
969 #ifdef TARGET_SOLARIS_COMMENT
970 #define SOLARIS_P TRUE
971 #else
972 #define SOLARIS_P FALSE
973 #endif
974
975 static bfd_boolean msolaris = SOLARIS_P;
976 #endif
977
978 #ifdef OBJ_XCOFF
979
980 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
981 using a bunch of different sections. These assembler sections,
982 however, are all encompassed within the .text or .data sections of
983 the final output file. We handle this by using different
984 subsegments within these main segments. */
985
986 /* Next subsegment to allocate within the .text segment. */
987 static subsegT ppc_text_subsegment = 2;
988
989 /* Linked list of csects in the text section. */
990 static symbolS *ppc_text_csects;
991
992 /* Next subsegment to allocate within the .data segment. */
993 static subsegT ppc_data_subsegment = 2;
994
995 /* Linked list of csects in the data section. */
996 static symbolS *ppc_data_csects;
997
998 /* The current csect. */
999 static symbolS *ppc_current_csect;
1000
1001 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1002 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1003 A special relocation is used when accessing TOC entries. We handle
1004 the TOC as a subsegment within the .data segment. We set it up if
1005 we see a .toc pseudo-op, and save the csect symbol here. */
1006 static symbolS *ppc_toc_csect;
1007
1008 /* The first frag in the TOC subsegment. */
1009 static fragS *ppc_toc_frag;
1010
1011 /* The first frag in the first subsegment after the TOC in the .data
1012 segment. NULL if there are no subsegments after the TOC. */
1013 static fragS *ppc_after_toc_frag;
1014
1015 /* The current static block. */
1016 static symbolS *ppc_current_block;
1017
1018 /* The COFF debugging section; set by md_begin. This is not the
1019 .debug section, but is instead the secret BFD section which will
1020 cause BFD to set the section number of a symbol to N_DEBUG. */
1021 static asection *ppc_coff_debug_section;
1022
1023 /* Structure to set the length field of the dwarf sections. */
1024 struct dw_subsection {
1025 /* Subsections are simply linked. */
1026 struct dw_subsection *link;
1027
1028 /* The subsection number. */
1029 subsegT subseg;
1030
1031 /* Expression to compute the length of the section. */
1032 expressionS end_exp;
1033 };
1034
1035 static struct dw_section {
1036 /* Corresponding section. */
1037 segT sect;
1038
1039 /* Simply linked list of subsections with a label. */
1040 struct dw_subsection *list_subseg;
1041
1042 /* The anonymous subsection. */
1043 struct dw_subsection *anon_subseg;
1044 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1045 #endif /* OBJ_XCOFF */
1046
1047 #ifdef TE_PE
1048
1049 /* Various sections that we need for PE coff support. */
1050 static segT ydata_section;
1051 static segT pdata_section;
1052 static segT reldata_section;
1053 static segT rdata_section;
1054 static segT tocdata_section;
1055
1056 /* The current section and the previous section. See ppc_previous. */
1057 static segT ppc_previous_section;
1058 static segT ppc_current_section;
1059
1060 #endif /* TE_PE */
1061
1062 #ifdef OBJ_ELF
1063 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1064 #define PPC_APUINFO_ISEL 0x40
1065 #define PPC_APUINFO_PMR 0x41
1066 #define PPC_APUINFO_RFMCI 0x42
1067 #define PPC_APUINFO_CACHELCK 0x43
1068 #define PPC_APUINFO_SPE 0x100
1069 #define PPC_APUINFO_EFS 0x101
1070 #define PPC_APUINFO_BRLOCK 0x102
1071 #define PPC_APUINFO_VLE 0x104
1072
1073 /*
1074 * We keep a list of APUinfo
1075 */
1076 unsigned long *ppc_apuinfo_list;
1077 unsigned int ppc_apuinfo_num;
1078 unsigned int ppc_apuinfo_num_alloc;
1079 #endif /* OBJ_ELF */
1080 \f
1081 #ifdef OBJ_ELF
1082 const char *const md_shortopts = "b:l:usm:K:VQ:";
1083 #else
1084 const char *const md_shortopts = "um:";
1085 #endif
1086 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1087 const struct option md_longopts[] = {
1088 {"nops", required_argument, NULL, OPTION_NOPS},
1089 {NULL, no_argument, NULL, 0}
1090 };
1091 const size_t md_longopts_size = sizeof (md_longopts);
1092
1093 int
1094 md_parse_option (int c, char *arg)
1095 {
1096 ppc_cpu_t new_cpu;
1097
1098 switch (c)
1099 {
1100 case 'u':
1101 /* -u means that any undefined symbols should be treated as
1102 external, which is the default for gas anyhow. */
1103 break;
1104
1105 #ifdef OBJ_ELF
1106 case 'l':
1107 /* Solaris as takes -le (presumably for little endian). For completeness
1108 sake, recognize -be also. */
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 0;
1112 set_target_endian = 1;
1113 if (ppc_cpu & PPC_OPCODE_VLE)
1114 as_bad (_("the use of -mvle requires big endian."));
1115 }
1116 else
1117 return 0;
1118
1119 break;
1120
1121 case 'b':
1122 if (strcmp (arg, "e") == 0)
1123 {
1124 target_big_endian = 1;
1125 set_target_endian = 1;
1126 }
1127 else
1128 return 0;
1129
1130 break;
1131
1132 case 'K':
1133 /* Recognize -K PIC. */
1134 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1135 {
1136 shlib = SHLIB_PIC;
1137 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1138 }
1139 else
1140 return 0;
1141
1142 break;
1143 #endif
1144
1145 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1146 case 'a':
1147 if (strcmp (arg, "64") == 0)
1148 {
1149 #ifdef BFD64
1150 ppc_obj64 = 1;
1151 if (ppc_cpu & PPC_OPCODE_VLE)
1152 as_bad (_("the use of -mvle requires -a32."));
1153 #else
1154 as_fatal (_("%s unsupported"), "-a64");
1155 #endif
1156 }
1157 else if (strcmp (arg, "32") == 0)
1158 ppc_obj64 = 0;
1159 else
1160 return 0;
1161 break;
1162
1163 case 'm':
1164 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1165 if (new_cpu != 0)
1166 {
1167 ppc_cpu = new_cpu;
1168 if (strcmp (arg, "vle") == 0)
1169 {
1170 if (set_target_endian && target_big_endian == 0)
1171 as_bad (_("the use of -mvle requires big endian."));
1172 if (ppc_obj64)
1173 as_bad (_("the use of -mvle requires -a32."));
1174 }
1175 }
1176
1177 else if (strcmp (arg, "regnames") == 0)
1178 reg_names_p = TRUE;
1179
1180 else if (strcmp (arg, "no-regnames") == 0)
1181 reg_names_p = FALSE;
1182
1183 #ifdef OBJ_ELF
1184 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1185 that require relocation. */
1186 else if (strcmp (arg, "relocatable") == 0)
1187 {
1188 shlib = SHLIB_MRELOCATABLE;
1189 ppc_flags |= EF_PPC_RELOCATABLE;
1190 }
1191
1192 else if (strcmp (arg, "relocatable-lib") == 0)
1193 {
1194 shlib = SHLIB_MRELOCATABLE;
1195 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1196 }
1197
1198 /* -memb, set embedded bit. */
1199 else if (strcmp (arg, "emb") == 0)
1200 ppc_flags |= EF_PPC_EMB;
1201
1202 /* -mlittle/-mbig set the endianness. */
1203 else if (strcmp (arg, "little") == 0
1204 || strcmp (arg, "little-endian") == 0)
1205 {
1206 target_big_endian = 0;
1207 set_target_endian = 1;
1208 if (ppc_cpu & PPC_OPCODE_VLE)
1209 as_bad (_("the use of -mvle requires big endian."));
1210 }
1211
1212 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1213 {
1214 target_big_endian = 1;
1215 set_target_endian = 1;
1216 }
1217
1218 else if (strcmp (arg, "solaris") == 0)
1219 {
1220 msolaris = TRUE;
1221 ppc_comment_chars = ppc_solaris_comment_chars;
1222 }
1223
1224 else if (strcmp (arg, "no-solaris") == 0)
1225 {
1226 msolaris = FALSE;
1227 ppc_comment_chars = ppc_eabi_comment_chars;
1228 }
1229 #endif
1230 else
1231 {
1232 as_bad (_("invalid switch -m%s"), arg);
1233 return 0;
1234 }
1235 break;
1236
1237 #ifdef OBJ_ELF
1238 /* -V: SVR4 argument to print version ID. */
1239 case 'V':
1240 print_version_id ();
1241 break;
1242
1243 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1244 should be emitted or not. FIXME: Not implemented. */
1245 case 'Q':
1246 break;
1247
1248 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1249 rather than .stabs.excl, which is ignored by the linker.
1250 FIXME: Not implemented. */
1251 case 's':
1252 if (arg)
1253 return 0;
1254
1255 break;
1256 #endif
1257
1258 case OPTION_NOPS:
1259 {
1260 char *end;
1261 nop_limit = strtoul (optarg, &end, 0);
1262 if (*end)
1263 as_bad (_("--nops needs a numeric argument"));
1264 }
1265 break;
1266
1267 default:
1268 return 0;
1269 }
1270
1271 return 1;
1272 }
1273
1274 void
1275 md_show_usage (FILE *stream)
1276 {
1277 fprintf (stream, _("\
1278 PowerPC options:\n\
1279 -a32 generate ELF32/XCOFF32\n\
1280 -a64 generate ELF64/XCOFF64\n\
1281 -u ignored\n\
1282 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1283 -mpwr generate code for POWER (RIOS1)\n\
1284 -m601 generate code for PowerPC 601\n\
1285 -mppc, -mppc32, -m603, -m604\n\
1286 generate code for PowerPC 603/604\n\
1287 -m403 generate code for PowerPC 403\n\
1288 -m405 generate code for PowerPC 405\n\
1289 -m440 generate code for PowerPC 440\n\
1290 -m464 generate code for PowerPC 464\n\
1291 -m476 generate code for PowerPC 476\n\
1292 -m7400, -m7410, -m7450, -m7455\n\
1293 generate code for PowerPC 7400/7410/7450/7455\n\
1294 -m750cl generate code for PowerPC 750cl\n"));
1295 fprintf (stream, _("\
1296 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1297 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1298 -mbooke generate code for 32-bit PowerPC BookE\n\
1299 -ma2 generate code for A2 architecture\n\
1300 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1301 -mpower5, -mpwr5, -mpwr5x\n\
1302 generate code for Power5 architecture\n\
1303 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1304 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1305 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1306 -mcell generate code for Cell Broadband Engine architecture\n\
1307 -mcom generate code Power/PowerPC common instructions\n\
1308 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1309 fprintf (stream, _("\
1310 -maltivec generate code for AltiVec\n\
1311 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1312 -mhtm generate code for Hardware Transactional Memory\n\
1313 -me300 generate code for PowerPC e300 family\n\
1314 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1315 -me500mc, generate code for Freescale e500mc core complex\n\
1316 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1317 -me5500, generate code for Freescale e5500 core complex\n\
1318 -me6500, generate code for Freescale e6500 core complex\n\
1319 -mspe generate code for Motorola SPE instructions\n\
1320 -mvle generate code for Freescale VLE instructions\n\
1321 -mtitan generate code for AppliedMicro Titan core complex\n\
1322 -mregnames Allow symbolic names for registers\n\
1323 -mno-regnames Do not allow symbolic names for registers\n"));
1324 #ifdef OBJ_ELF
1325 fprintf (stream, _("\
1326 -mrelocatable support for GCC's -mrelocatble option\n\
1327 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1328 -memb set PPC_EMB bit in ELF flags\n\
1329 -mlittle, -mlittle-endian, -le\n\
1330 generate code for a little endian machine\n\
1331 -mbig, -mbig-endian, -be\n\
1332 generate code for a big endian machine\n\
1333 -msolaris generate code for Solaris\n\
1334 -mno-solaris do not generate code for Solaris\n\
1335 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1336 -V print assembler version number\n\
1337 -Qy, -Qn ignored\n"));
1338 #endif
1339 fprintf (stream, _("\
1340 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1341 }
1342 \f
1343 /* Set ppc_cpu if it is not already set. */
1344
1345 static void
1346 ppc_set_cpu (void)
1347 {
1348 const char *default_os = TARGET_OS;
1349 const char *default_cpu = TARGET_CPU;
1350
1351 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1352 {
1353 if (ppc_obj64)
1354 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1355 else if (strncmp (default_os, "aix", 3) == 0
1356 && default_os[3] >= '4' && default_os[3] <= '9')
1357 ppc_cpu |= PPC_OPCODE_COMMON;
1358 else if (strncmp (default_os, "aix3", 4) == 0)
1359 ppc_cpu |= PPC_OPCODE_POWER;
1360 else if (strcmp (default_cpu, "rs6000") == 0)
1361 ppc_cpu |= PPC_OPCODE_POWER;
1362 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1363 ppc_cpu |= PPC_OPCODE_PPC;
1364 else
1365 as_fatal (_("unknown default cpu = %s, os = %s"),
1366 default_cpu, default_os);
1367 }
1368 }
1369
1370 /* Figure out the BFD architecture to use. This function and ppc_mach
1371 are called well before md_begin, when the output file is opened. */
1372
1373 enum bfd_architecture
1374 ppc_arch (void)
1375 {
1376 const char *default_cpu = TARGET_CPU;
1377 ppc_set_cpu ();
1378
1379 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1380 return bfd_arch_powerpc;
1381 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1382 return bfd_arch_powerpc;
1383 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1384 return bfd_arch_rs6000;
1385 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1386 {
1387 if (strcmp (default_cpu, "rs6000") == 0)
1388 return bfd_arch_rs6000;
1389 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1390 return bfd_arch_powerpc;
1391 }
1392
1393 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1394 return bfd_arch_unknown;
1395 }
1396
1397 unsigned long
1398 ppc_mach (void)
1399 {
1400 if (ppc_obj64)
1401 return bfd_mach_ppc64;
1402 else if (ppc_arch () == bfd_arch_rs6000)
1403 return bfd_mach_rs6k;
1404 else if (ppc_cpu & PPC_OPCODE_TITAN)
1405 return bfd_mach_ppc_titan;
1406 else if (ppc_cpu & PPC_OPCODE_VLE)
1407 return bfd_mach_ppc_vle;
1408 else
1409 return bfd_mach_ppc;
1410 }
1411
1412 extern char*
1413 ppc_target_format (void)
1414 {
1415 #ifdef OBJ_COFF
1416 #ifdef TE_PE
1417 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1418 #elif TE_POWERMAC
1419 return "xcoff-powermac";
1420 #else
1421 # ifdef TE_AIX5
1422 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1423 # else
1424 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1425 # endif
1426 #endif
1427 #endif
1428 #ifdef OBJ_ELF
1429 # ifdef TE_FreeBSD
1430 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1431 # elif defined (TE_VXWORKS)
1432 return "elf32-powerpc-vxworks";
1433 # else
1434 return (target_big_endian
1435 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1436 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1437 # endif
1438 #endif
1439 }
1440
1441 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1442 Return TRUE if there's a problem, otherwise FALSE. */
1443
1444 static bfd_boolean
1445 insn_validate (const struct powerpc_opcode *op)
1446 {
1447 const unsigned char *o;
1448 unsigned long omask = op->mask;
1449
1450 /* The mask had better not trim off opcode bits. */
1451 if ((op->opcode & omask) != op->opcode)
1452 {
1453 as_bad (_("mask trims opcode bits for %s"), op->name);
1454 return TRUE;
1455 }
1456
1457 /* The operands must not overlap the opcode or each other. */
1458 for (o = op->operands; *o; ++o)
1459 {
1460 if (*o >= num_powerpc_operands)
1461 {
1462 as_bad (_("operand index error for %s"), op->name);
1463 return TRUE;
1464 }
1465 else
1466 {
1467 const struct powerpc_operand *operand = &powerpc_operands[*o];
1468 if (operand->shift != PPC_OPSHIFT_INV)
1469 {
1470 unsigned long mask;
1471
1472 if (operand->shift >= 0)
1473 mask = operand->bitm << operand->shift;
1474 else
1475 mask = operand->bitm >> -operand->shift;
1476 if (omask & mask)
1477 {
1478 as_bad (_("operand %d overlap in %s"),
1479 (int) (o - op->operands), op->name);
1480 return TRUE;
1481 }
1482 omask |= mask;
1483 }
1484 }
1485 }
1486 return FALSE;
1487 }
1488
1489 /* Insert opcodes and macros into hash tables. Called at startup and
1490 for .machine pseudo. */
1491
1492 static void
1493 ppc_setup_opcodes (void)
1494 {
1495 const struct powerpc_opcode *op;
1496 const struct powerpc_opcode *op_end;
1497 const struct powerpc_macro *macro;
1498 const struct powerpc_macro *macro_end;
1499 bfd_boolean bad_insn = FALSE;
1500
1501 if (ppc_hash != NULL)
1502 hash_die (ppc_hash);
1503 if (ppc_macro_hash != NULL)
1504 hash_die (ppc_macro_hash);
1505
1506 /* Insert the opcodes into a hash table. */
1507 ppc_hash = hash_new ();
1508
1509 if (ENABLE_CHECKING)
1510 {
1511 unsigned int i;
1512
1513 /* An index into powerpc_operands is stored in struct fix
1514 fx_pcrel_adjust which is 8 bits wide. */
1515 gas_assert (num_powerpc_operands < 256);
1516
1517 /* Check operand masks. Code here and in the disassembler assumes
1518 all the 1's in the mask are contiguous. */
1519 for (i = 0; i < num_powerpc_operands; ++i)
1520 {
1521 unsigned long mask = powerpc_operands[i].bitm;
1522 unsigned long right_bit;
1523 unsigned int j;
1524
1525 right_bit = mask & -mask;
1526 mask += right_bit;
1527 right_bit = mask & -mask;
1528 if (mask != right_bit)
1529 {
1530 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1531 bad_insn = TRUE;
1532 }
1533 for (j = i + 1; j < num_powerpc_operands; ++j)
1534 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1535 sizeof (powerpc_operands[0])) == 0)
1536 {
1537 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1538 j, i);
1539 bad_insn = TRUE;
1540 }
1541 }
1542 }
1543
1544 op_end = powerpc_opcodes + powerpc_num_opcodes;
1545 for (op = powerpc_opcodes; op < op_end; op++)
1546 {
1547 if (ENABLE_CHECKING)
1548 {
1549 if (op != powerpc_opcodes)
1550 {
1551 int old_opcode = PPC_OP (op[-1].opcode);
1552 int new_opcode = PPC_OP (op[0].opcode);
1553
1554 #ifdef PRINT_OPCODE_TABLE
1555 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1556 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1557 (unsigned int) op->opcode, (unsigned int) op->mask,
1558 (unsigned long long) op->flags);
1559 #endif
1560
1561 /* The major opcodes had better be sorted. Code in the
1562 disassembler assumes the insns are sorted according to
1563 major opcode. */
1564 if (new_opcode < old_opcode)
1565 {
1566 as_bad (_("major opcode is not sorted for %s"),
1567 op->name);
1568 bad_insn = TRUE;
1569 }
1570 }
1571 bad_insn |= insn_validate (op);
1572 }
1573
1574 if ((ppc_cpu & op->flags) != 0
1575 && !(ppc_cpu & op->deprecated))
1576 {
1577 const char *retval;
1578
1579 retval = hash_insert (ppc_hash, op->name, (void *) op);
1580 if (retval != NULL)
1581 {
1582 as_bad (_("duplicate instruction %s"),
1583 op->name);
1584 bad_insn = TRUE;
1585 }
1586 }
1587 }
1588
1589 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1590 for (op = powerpc_opcodes; op < op_end; op++)
1591 hash_insert (ppc_hash, op->name, (void *) op);
1592
1593 op_end = vle_opcodes + vle_num_opcodes;
1594 for (op = vle_opcodes; op < op_end; op++)
1595 {
1596 if (ENABLE_CHECKING)
1597 {
1598 if (op != vle_opcodes)
1599 {
1600 unsigned old_seg, new_seg;
1601
1602 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1603 old_seg = VLE_OP_TO_SEG (old_seg);
1604 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1605 new_seg = VLE_OP_TO_SEG (new_seg);
1606
1607 #ifdef PRINT_OPCODE_TABLE
1608 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1609 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1610 (unsigned int) op->opcode, (unsigned int) op->mask,
1611 (unsigned long long) op->flags);
1612 #endif
1613 /* The major opcodes had better be sorted. Code in the
1614 disassembler assumes the insns are sorted according to
1615 major opcode. */
1616 if (new_seg < old_seg)
1617 {
1618 as_bad (_("major opcode is not sorted for %s"),
1619 op->name);
1620 bad_insn = TRUE;
1621 }
1622 }
1623
1624 bad_insn |= insn_validate (op);
1625 }
1626
1627 if ((ppc_cpu & op->flags) != 0
1628 && !(ppc_cpu & op->deprecated))
1629 {
1630 const char *retval;
1631
1632 retval = hash_insert (ppc_hash, op->name, (void *) op);
1633 if (retval != NULL)
1634 {
1635 as_bad (_("duplicate instruction %s"),
1636 op->name);
1637 bad_insn = TRUE;
1638 }
1639 }
1640 }
1641
1642 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1643 for (op = vle_opcodes; op < op_end; op++)
1644 hash_insert (ppc_hash, op->name, (void *) op);
1645
1646 /* Insert the macros into a hash table. */
1647 ppc_macro_hash = hash_new ();
1648
1649 macro_end = powerpc_macros + powerpc_num_macros;
1650 for (macro = powerpc_macros; macro < macro_end; macro++)
1651 {
1652 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1653 {
1654 const char *retval;
1655
1656 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1657 if (retval != (const char *) NULL)
1658 {
1659 as_bad (_("duplicate macro %s"), macro->name);
1660 bad_insn = TRUE;
1661 }
1662 }
1663 }
1664
1665 if (bad_insn)
1666 abort ();
1667 }
1668
1669 /* This function is called when the assembler starts up. It is called
1670 after the options have been parsed and the output file has been
1671 opened. */
1672
1673 void
1674 md_begin (void)
1675 {
1676 ppc_set_cpu ();
1677
1678 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1679 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1680
1681 #ifdef OBJ_ELF
1682 /* Set the ELF flags if desired. */
1683 if (ppc_flags && !msolaris)
1684 bfd_set_private_flags (stdoutput, ppc_flags);
1685 #endif
1686
1687 ppc_setup_opcodes ();
1688
1689 /* Tell the main code what the endianness is if it is not overridden
1690 by the user. */
1691 if (!set_target_endian)
1692 {
1693 set_target_endian = 1;
1694 target_big_endian = PPC_BIG_ENDIAN;
1695 }
1696
1697 #ifdef OBJ_XCOFF
1698 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1699
1700 /* Create dummy symbols to serve as initial csects. This forces the
1701 text csects to precede the data csects. These symbols will not
1702 be output. */
1703 ppc_text_csects = symbol_make ("dummy\001");
1704 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1705 ppc_data_csects = symbol_make ("dummy\001");
1706 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1707 #endif
1708
1709 #ifdef TE_PE
1710
1711 ppc_current_section = text_section;
1712 ppc_previous_section = 0;
1713
1714 #endif
1715 }
1716
1717 void
1718 ppc_cleanup (void)
1719 {
1720 #ifdef OBJ_ELF
1721 if (ppc_apuinfo_list == NULL)
1722 return;
1723
1724 /* Ok, so write the section info out. We have this layout:
1725
1726 byte data what
1727 ---- ---- ----
1728 0 8 length of "APUinfo\0"
1729 4 (n*4) number of APU's (4 bytes each)
1730 8 2 note type 2
1731 12 "APUinfo\0" name
1732 20 APU#1 first APU's info
1733 24 APU#2 second APU's info
1734 ... ...
1735 */
1736 {
1737 char *p;
1738 asection *seg = now_seg;
1739 subsegT subseg = now_subseg;
1740 asection *apuinfo_secp = (asection *) NULL;
1741 unsigned int i;
1742
1743 /* Create the .PPC.EMB.apuinfo section. */
1744 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1745 bfd_set_section_flags (stdoutput,
1746 apuinfo_secp,
1747 SEC_HAS_CONTENTS | SEC_READONLY);
1748
1749 p = frag_more (4);
1750 md_number_to_chars (p, (valueT) 8, 4);
1751
1752 p = frag_more (4);
1753 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1754
1755 p = frag_more (4);
1756 md_number_to_chars (p, (valueT) 2, 4);
1757
1758 p = frag_more (8);
1759 strcpy (p, "APUinfo");
1760
1761 for (i = 0; i < ppc_apuinfo_num; i++)
1762 {
1763 p = frag_more (4);
1764 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1765 }
1766
1767 frag_align (2, 0, 0);
1768
1769 /* We probably can't restore the current segment, for there likely
1770 isn't one yet... */
1771 if (seg && subseg)
1772 subseg_set (seg, subseg);
1773 }
1774 #endif
1775 }
1776
1777 /* Insert an operand value into an instruction. */
1778
1779 static unsigned long
1780 ppc_insert_operand (unsigned long insn,
1781 const struct powerpc_operand *operand,
1782 offsetT val,
1783 ppc_cpu_t cpu,
1784 char *file,
1785 unsigned int line)
1786 {
1787 long min, max, right;
1788
1789 max = operand->bitm;
1790 right = max & -max;
1791 min = 0;
1792
1793 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1794 {
1795 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1796 max = (max >> 1) & -right;
1797 min = ~max & -right;
1798 }
1799
1800 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1801 max++;
1802
1803 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1804 {
1805 long tmp = min;
1806 min = -max;
1807 max = -tmp;
1808 }
1809
1810 if (min <= max)
1811 {
1812 /* Some people write constants with the sign extension done by
1813 hand but only up to 32 bits. This shouldn't really be valid,
1814 but, to permit this code to assemble on a 64-bit host, we
1815 sign extend the 32-bit value to 64 bits if so doing makes the
1816 value valid. */
1817 if (val > max
1818 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1819 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1820 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1821 val = val - 0x80000000 - 0x80000000;
1822
1823 /* Similarly, people write expressions like ~(1<<15), and expect
1824 this to be OK for a 32-bit unsigned value. */
1825 else if (val < min
1826 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1827 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1828 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1829 val = val + 0x80000000 + 0x80000000;
1830
1831 else if (val < min
1832 || val > max
1833 || (val & (right - 1)) != 0)
1834 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1835 }
1836
1837 if (operand->insert)
1838 {
1839 const char *errmsg;
1840
1841 errmsg = NULL;
1842 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1843 if (errmsg != (const char *) NULL)
1844 as_bad_where (file, line, "%s", errmsg);
1845 }
1846 else if (operand->shift >= 0)
1847 insn |= ((long) val & operand->bitm) << operand->shift;
1848 else
1849 insn |= ((long) val & operand->bitm) >> -operand->shift;
1850
1851 return insn;
1852 }
1853
1854 \f
1855 #ifdef OBJ_ELF
1856 /* Parse @got, etc. and return the desired relocation. */
1857 static bfd_reloc_code_real_type
1858 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1859 {
1860 struct map_bfd {
1861 char *string;
1862 unsigned int length : 8;
1863 unsigned int valid32 : 1;
1864 unsigned int valid64 : 1;
1865 unsigned int reloc;
1866 };
1867
1868 char ident[20];
1869 char *str = *str_p;
1870 char *str2;
1871 int ch;
1872 int len;
1873 const struct map_bfd *ptr;
1874
1875 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1876 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1877 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1878
1879 static const struct map_bfd mapping[] = {
1880 MAP ("l", BFD_RELOC_LO16),
1881 MAP ("h", BFD_RELOC_HI16),
1882 MAP ("ha", BFD_RELOC_HI16_S),
1883 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1884 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1885 MAP ("got", BFD_RELOC_16_GOTOFF),
1886 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1887 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1888 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1889 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1890 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1891 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1892 MAP ("copy", BFD_RELOC_PPC_COPY),
1893 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1894 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1895 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1896 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1897 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1898 MAP ("tls", BFD_RELOC_PPC_TLS),
1899 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1900 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1901 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1902 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1903 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1904 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1905 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1906 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1907 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1908 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1909 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1910 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1911 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1912 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1913 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1914 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1915 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1916 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1917 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1918 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1919 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1920 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1921 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1922 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1923 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1924 MAP32 ("fixup", BFD_RELOC_CTOR),
1925 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1926 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1927 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1928 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1929 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1930 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1931 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1932 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1933 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1934 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1935 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1936 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1937 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1938 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1939 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1940 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1941 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1942 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1943 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1944 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1945 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1946 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1947 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1948 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1949 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1950 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1951 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1952 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1953 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1954 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1955 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1956 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1957 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1958 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1959 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1960 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1961 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1962 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1963 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1964 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1965 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1966 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1967 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1968 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1969 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1970 };
1971
1972 if (*str++ != '@')
1973 return BFD_RELOC_UNUSED;
1974
1975 for (ch = *str, str2 = ident;
1976 (str2 < ident + sizeof (ident) - 1
1977 && (ISALNUM (ch) || ch == '@'));
1978 ch = *++str)
1979 {
1980 *str2++ = TOLOWER (ch);
1981 }
1982
1983 *str2 = '\0';
1984 len = str2 - ident;
1985
1986 ch = ident[0];
1987 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1988 if (ch == ptr->string[0]
1989 && len == ptr->length
1990 && memcmp (ident, ptr->string, ptr->length) == 0
1991 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1992 {
1993 int reloc = ptr->reloc;
1994
1995 if (!ppc_obj64 && exp_p->X_add_number != 0)
1996 {
1997 switch (reloc)
1998 {
1999 case BFD_RELOC_16_GOTOFF:
2000 case BFD_RELOC_LO16_GOTOFF:
2001 case BFD_RELOC_HI16_GOTOFF:
2002 case BFD_RELOC_HI16_S_GOTOFF:
2003 as_warn (_("identifier+constant@got means "
2004 "identifier@got+constant"));
2005 break;
2006
2007 case BFD_RELOC_PPC_GOT_TLSGD16:
2008 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2009 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2010 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2011 case BFD_RELOC_PPC_GOT_TLSLD16:
2012 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2013 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2014 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2015 case BFD_RELOC_PPC_GOT_DTPREL16:
2016 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2017 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2018 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2019 case BFD_RELOC_PPC_GOT_TPREL16:
2020 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2021 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2022 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2023 as_bad (_("symbol+offset not supported for got tls"));
2024 break;
2025 }
2026 }
2027
2028 /* Now check for identifier@suffix+constant. */
2029 if (*str == '-' || *str == '+')
2030 {
2031 char *orig_line = input_line_pointer;
2032 expressionS new_exp;
2033
2034 input_line_pointer = str;
2035 expression (&new_exp);
2036 if (new_exp.X_op == O_constant)
2037 {
2038 exp_p->X_add_number += new_exp.X_add_number;
2039 str = input_line_pointer;
2040 }
2041
2042 if (&input_line_pointer != str_p)
2043 input_line_pointer = orig_line;
2044 }
2045 *str_p = str;
2046
2047 if (reloc == (int) BFD_RELOC_PPC64_TOC
2048 && exp_p->X_op == O_symbol
2049 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2050 {
2051 /* Change the symbol so that the dummy .TOC. symbol can be
2052 omitted from the object file. */
2053 exp_p->X_add_symbol = &abs_symbol;
2054 }
2055
2056 return (bfd_reloc_code_real_type) reloc;
2057 }
2058
2059 return BFD_RELOC_UNUSED;
2060 }
2061
2062 /* Like normal .long/.short/.word, except support @got, etc.
2063 Clobbers input_line_pointer, checks end-of-line. */
2064 static void
2065 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
2066 {
2067 expressionS exp;
2068 bfd_reloc_code_real_type reloc;
2069
2070 if (is_it_end_of_statement ())
2071 {
2072 demand_empty_rest_of_line ();
2073 return;
2074 }
2075
2076 do
2077 {
2078 expression (&exp);
2079 if (exp.X_op == O_symbol
2080 && *input_line_pointer == '@'
2081 && (reloc = ppc_elf_suffix (&input_line_pointer,
2082 &exp)) != BFD_RELOC_UNUSED)
2083 {
2084 reloc_howto_type *reloc_howto;
2085 int size;
2086
2087 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2088 size = bfd_get_reloc_size (reloc_howto);
2089
2090 if (size > nbytes)
2091 {
2092 as_bad (_("%s relocations do not fit in %d bytes\n"),
2093 reloc_howto->name, nbytes);
2094 }
2095 else
2096 {
2097 char *p;
2098 int offset;
2099
2100 p = frag_more (nbytes);
2101 memset (p, 0, nbytes);
2102 offset = 0;
2103 if (target_big_endian)
2104 offset = nbytes - size;
2105 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2106 &exp, 0, reloc);
2107 }
2108 }
2109 else
2110 emit_expr (&exp, (unsigned int) nbytes);
2111 }
2112 while (*input_line_pointer++ == ',');
2113
2114 /* Put terminator back into stream. */
2115 input_line_pointer--;
2116 demand_empty_rest_of_line ();
2117 }
2118
2119 /* Solaris pseduo op to change to the .rodata section. */
2120 static void
2121 ppc_elf_rdata (int xxx)
2122 {
2123 char *save_line = input_line_pointer;
2124 static char section[] = ".rodata\n";
2125
2126 /* Just pretend this is .section .rodata */
2127 input_line_pointer = section;
2128 obj_elf_section (xxx);
2129
2130 input_line_pointer = save_line;
2131 }
2132
2133 /* Pseudo op to make file scope bss items. */
2134 static void
2135 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2136 {
2137 char *name;
2138 char c;
2139 char *p;
2140 offsetT size;
2141 symbolS *symbolP;
2142 offsetT align;
2143 segT old_sec;
2144 int old_subsec;
2145 char *pfrag;
2146 int align2;
2147
2148 name = input_line_pointer;
2149 c = get_symbol_end ();
2150
2151 /* just after name is now '\0'. */
2152 p = input_line_pointer;
2153 *p = c;
2154 SKIP_WHITESPACE ();
2155 if (*input_line_pointer != ',')
2156 {
2157 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2158 ignore_rest_of_line ();
2159 return;
2160 }
2161
2162 input_line_pointer++; /* skip ',' */
2163 if ((size = get_absolute_expression ()) < 0)
2164 {
2165 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2166 ignore_rest_of_line ();
2167 return;
2168 }
2169
2170 /* The third argument to .lcomm is the alignment. */
2171 if (*input_line_pointer != ',')
2172 align = 8;
2173 else
2174 {
2175 ++input_line_pointer;
2176 align = get_absolute_expression ();
2177 if (align <= 0)
2178 {
2179 as_warn (_("ignoring bad alignment"));
2180 align = 8;
2181 }
2182 }
2183
2184 *p = 0;
2185 symbolP = symbol_find_or_make (name);
2186 *p = c;
2187
2188 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2189 {
2190 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2191 S_GET_NAME (symbolP));
2192 ignore_rest_of_line ();
2193 return;
2194 }
2195
2196 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2197 {
2198 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2199 S_GET_NAME (symbolP),
2200 (long) S_GET_VALUE (symbolP),
2201 (long) size);
2202
2203 ignore_rest_of_line ();
2204 return;
2205 }
2206
2207 /* Allocate_bss. */
2208 old_sec = now_seg;
2209 old_subsec = now_subseg;
2210 if (align)
2211 {
2212 /* Convert to a power of 2 alignment. */
2213 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2214 if (align != 1)
2215 {
2216 as_bad (_("common alignment not a power of 2"));
2217 ignore_rest_of_line ();
2218 return;
2219 }
2220 }
2221 else
2222 align2 = 0;
2223
2224 record_alignment (bss_section, align2);
2225 subseg_set (bss_section, 0);
2226 if (align2)
2227 frag_align (align2, 0, 0);
2228 if (S_GET_SEGMENT (symbolP) == bss_section)
2229 symbol_get_frag (symbolP)->fr_symbol = 0;
2230 symbol_set_frag (symbolP, frag_now);
2231 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2232 (char *) 0);
2233 *pfrag = 0;
2234 S_SET_SIZE (symbolP, size);
2235 S_SET_SEGMENT (symbolP, bss_section);
2236 subseg_set (old_sec, old_subsec);
2237 demand_empty_rest_of_line ();
2238 }
2239
2240 /* Validate any relocations emitted for -mrelocatable, possibly adding
2241 fixups for word relocations in writable segments, so we can adjust
2242 them at runtime. */
2243 static void
2244 ppc_elf_validate_fix (fixS *fixp, segT seg)
2245 {
2246 if (fixp->fx_done || fixp->fx_pcrel)
2247 return;
2248
2249 switch (shlib)
2250 {
2251 case SHLIB_NONE:
2252 case SHLIB_PIC:
2253 return;
2254
2255 case SHLIB_MRELOCATABLE:
2256 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2257 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2258 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2259 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2260 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2261 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2262 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2263 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2264 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2265 && (seg->flags & SEC_LOAD) != 0
2266 && strcmp (segment_name (seg), ".got2") != 0
2267 && strcmp (segment_name (seg), ".dtors") != 0
2268 && strcmp (segment_name (seg), ".ctors") != 0
2269 && strcmp (segment_name (seg), ".fixup") != 0
2270 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2271 && strcmp (segment_name (seg), ".eh_frame") != 0
2272 && strcmp (segment_name (seg), ".ex_shared") != 0)
2273 {
2274 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2275 || fixp->fx_r_type != BFD_RELOC_CTOR)
2276 {
2277 as_bad_where (fixp->fx_file, fixp->fx_line,
2278 _("relocation cannot be done when using -mrelocatable"));
2279 }
2280 }
2281 return;
2282 }
2283 }
2284
2285 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2286 function descriptor sym if the corresponding code sym is used. */
2287
2288 void
2289 ppc_frob_file_before_adjust (void)
2290 {
2291 symbolS *symp;
2292 asection *toc;
2293
2294 if (!ppc_obj64)
2295 return;
2296
2297 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2298 {
2299 const char *name;
2300 char *dotname;
2301 symbolS *dotsym;
2302 size_t len;
2303
2304 name = S_GET_NAME (symp);
2305 if (name[0] == '.')
2306 continue;
2307
2308 if (! S_IS_WEAK (symp)
2309 || S_IS_DEFINED (symp))
2310 continue;
2311
2312 len = strlen (name) + 1;
2313 dotname = xmalloc (len + 1);
2314 dotname[0] = '.';
2315 memcpy (dotname + 1, name, len);
2316 dotsym = symbol_find_noref (dotname, 1);
2317 free (dotname);
2318 if (dotsym != NULL && (symbol_used_p (dotsym)
2319 || symbol_used_in_reloc_p (dotsym)))
2320 symbol_mark_used (symp);
2321
2322 }
2323
2324 toc = bfd_get_section_by_name (stdoutput, ".toc");
2325 if (toc != NULL
2326 && toc_reloc_types != has_large_toc_reloc
2327 && bfd_section_size (stdoutput, toc) > 0x10000)
2328 as_warn (_("TOC section size exceeds 64k"));
2329 }
2330
2331 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2332 emitted. Other uses of .TOC. will cause the symbol to be marked
2333 with BSF_KEEP in md_apply_fix. */
2334
2335 void
2336 ppc_elf_adjust_symtab (void)
2337 {
2338 if (ppc_obj64)
2339 {
2340 symbolS *symp;
2341 symp = symbol_find (".TOC.");
2342 if (symp != NULL)
2343 {
2344 asymbol *bsym = symbol_get_bfdsym (symp);
2345 if ((bsym->flags & BSF_KEEP) == 0)
2346 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2347 else
2348 S_SET_WEAK (symp);
2349 }
2350 }
2351 }
2352 #endif /* OBJ_ELF */
2353 \f
2354 #ifdef TE_PE
2355
2356 /*
2357 * Summary of parse_toc_entry.
2358 *
2359 * in: Input_line_pointer points to the '[' in one of:
2360 *
2361 * [toc] [tocv] [toc32] [toc64]
2362 *
2363 * Anything else is an error of one kind or another.
2364 *
2365 * out:
2366 * return value: success or failure
2367 * toc_kind: kind of toc reference
2368 * input_line_pointer:
2369 * success: first char after the ']'
2370 * failure: unchanged
2371 *
2372 * settings:
2373 *
2374 * [toc] - rv == success, toc_kind = default_toc
2375 * [tocv] - rv == success, toc_kind = data_in_toc
2376 * [toc32] - rv == success, toc_kind = must_be_32
2377 * [toc64] - rv == success, toc_kind = must_be_64
2378 *
2379 */
2380
2381 enum toc_size_qualifier
2382 {
2383 default_toc, /* The toc cell constructed should be the system default size */
2384 data_in_toc, /* This is a direct reference to a toc cell */
2385 must_be_32, /* The toc cell constructed must be 32 bits wide */
2386 must_be_64 /* The toc cell constructed must be 64 bits wide */
2387 };
2388
2389 static int
2390 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2391 {
2392 char *start;
2393 char *toc_spec;
2394 char c;
2395 enum toc_size_qualifier t;
2396
2397 /* Save the input_line_pointer. */
2398 start = input_line_pointer;
2399
2400 /* Skip over the '[' , and whitespace. */
2401 ++input_line_pointer;
2402 SKIP_WHITESPACE ();
2403
2404 /* Find the spelling of the operand. */
2405 toc_spec = input_line_pointer;
2406 c = get_symbol_end ();
2407
2408 if (strcmp (toc_spec, "toc") == 0)
2409 {
2410 t = default_toc;
2411 }
2412 else if (strcmp (toc_spec, "tocv") == 0)
2413 {
2414 t = data_in_toc;
2415 }
2416 else if (strcmp (toc_spec, "toc32") == 0)
2417 {
2418 t = must_be_32;
2419 }
2420 else if (strcmp (toc_spec, "toc64") == 0)
2421 {
2422 t = must_be_64;
2423 }
2424 else
2425 {
2426 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2427 *input_line_pointer = c;
2428 input_line_pointer = start;
2429 return 0;
2430 }
2431
2432 /* Now find the ']'. */
2433 *input_line_pointer = c;
2434
2435 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2436 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2437
2438 if (c != ']')
2439 {
2440 as_bad (_("syntax error: expected `]', found `%c'"), c);
2441 input_line_pointer = start;
2442 return 0;
2443 }
2444
2445 *toc_kind = t;
2446 return 1;
2447 }
2448 #endif
2449
2450 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2451 /* See whether a symbol is in the TOC section. */
2452
2453 static int
2454 ppc_is_toc_sym (symbolS *sym)
2455 {
2456 #ifdef OBJ_XCOFF
2457 return symbol_get_tc (sym)->symbol_class == XMC_TC;
2458 #endif
2459 #ifdef OBJ_ELF
2460 const char *sname = segment_name (S_GET_SEGMENT (sym));
2461 if (ppc_obj64)
2462 return strcmp (sname, ".toc") == 0;
2463 else
2464 return strcmp (sname, ".got") == 0;
2465 #endif
2466 }
2467 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2468 \f
2469
2470 #ifdef OBJ_ELF
2471 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2472 static void
2473 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2474 {
2475 unsigned int i;
2476
2477 /* Check we don't already exist. */
2478 for (i = 0; i < ppc_apuinfo_num; i++)
2479 if (ppc_apuinfo_list[i] == APUID (apu, version))
2480 return;
2481
2482 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2483 {
2484 if (ppc_apuinfo_num_alloc == 0)
2485 {
2486 ppc_apuinfo_num_alloc = 4;
2487 ppc_apuinfo_list = (unsigned long *)
2488 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2489 }
2490 else
2491 {
2492 ppc_apuinfo_num_alloc += 4;
2493 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2494 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2495 }
2496 }
2497 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2498 }
2499 #undef APUID
2500 #endif
2501 \f
2502
2503 /* We need to keep a list of fixups. We can't simply generate them as
2504 we go, because that would require us to first create the frag, and
2505 that would screw up references to ``.''. */
2506
2507 struct ppc_fixup
2508 {
2509 expressionS exp;
2510 int opindex;
2511 bfd_reloc_code_real_type reloc;
2512 };
2513
2514 #define MAX_INSN_FIXUPS (5)
2515
2516 /* Form I16L. */
2517 #define E_OR2I_INSN 0x7000C000
2518 #define E_AND2I_DOT_INSN 0x7000C800
2519 #define E_OR2IS_INSN 0x7000D000
2520 #define E_LIS_INSN 0x7000E000
2521 #define E_AND2IS_DOT_INSN 0x7000E800
2522
2523 /* Form I16A. */
2524 #define E_ADD2I_DOT_INSN 0x70008800
2525 #define E_ADD2IS_INSN 0x70009000
2526 #define E_CMP16I_INSN 0x70009800
2527 #define E_MULL2I_INSN 0x7000A000
2528 #define E_CMPL16I_INSN 0x7000A800
2529 #define E_CMPH16I_INSN 0x7000B000
2530 #define E_CMPHL16I_INSN 0x7000B800
2531
2532 /* This routine is called for each instruction to be assembled. */
2533
2534 void
2535 md_assemble (char *str)
2536 {
2537 char *s;
2538 const struct powerpc_opcode *opcode;
2539 unsigned long insn;
2540 const unsigned char *opindex_ptr;
2541 int skip_optional;
2542 int need_paren;
2543 int next_opindex;
2544 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2545 int fc;
2546 char *f;
2547 int addr_mod;
2548 int i;
2549 unsigned int insn_length;
2550
2551 /* Get the opcode. */
2552 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2553 ;
2554 if (*s != '\0')
2555 *s++ = '\0';
2556
2557 /* Look up the opcode in the hash table. */
2558 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2559 if (opcode == (const struct powerpc_opcode *) NULL)
2560 {
2561 const struct powerpc_macro *macro;
2562
2563 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2564 if (macro == (const struct powerpc_macro *) NULL)
2565 as_bad (_("unrecognized opcode: `%s'"), str);
2566 else
2567 ppc_macro (s, macro);
2568
2569 return;
2570 }
2571
2572 insn = opcode->opcode;
2573
2574 str = s;
2575 while (ISSPACE (*str))
2576 ++str;
2577
2578 /* PowerPC operands are just expressions. The only real issue is
2579 that a few operand types are optional. All cases which might use
2580 an optional operand separate the operands only with commas (in some
2581 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2582 have optional operands). Most instructions with optional operands
2583 have only one. Those that have more than one optional operand can
2584 take either all their operands or none. So, before we start seriously
2585 parsing the operands, we check to see if we have optional operands,
2586 and if we do, we count the number of commas to see which operands
2587 have been omitted. */
2588 skip_optional = 0;
2589 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2590 {
2591 const struct powerpc_operand *operand;
2592
2593 operand = &powerpc_operands[*opindex_ptr];
2594 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2595 {
2596 unsigned int opcount;
2597 unsigned int num_operands_expected;
2598
2599 /* There is an optional operand. Count the number of
2600 commas in the input line. */
2601 if (*str == '\0')
2602 opcount = 0;
2603 else
2604 {
2605 opcount = 1;
2606 s = str;
2607 while ((s = strchr (s, ',')) != (char *) NULL)
2608 {
2609 ++opcount;
2610 ++s;
2611 }
2612 }
2613
2614 /* Compute the number of expected operands.
2615 Do not count fake operands. */
2616 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2617 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2618 ++ num_operands_expected;
2619
2620 /* If there are fewer operands in the line then are called
2621 for by the instruction, we want to skip the optional
2622 operands. */
2623 if (opcount < num_operands_expected)
2624 skip_optional = 1;
2625
2626 break;
2627 }
2628 }
2629
2630 /* Gather the operands. */
2631 need_paren = 0;
2632 next_opindex = 0;
2633 fc = 0;
2634 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2635 {
2636 const struct powerpc_operand *operand;
2637 const char *errmsg;
2638 char *hold;
2639 expressionS ex;
2640 char endc;
2641
2642 if (next_opindex == 0)
2643 operand = &powerpc_operands[*opindex_ptr];
2644 else
2645 {
2646 operand = &powerpc_operands[next_opindex];
2647 next_opindex = 0;
2648 }
2649 errmsg = NULL;
2650
2651 /* If this is a fake operand, then we do not expect anything
2652 from the input. */
2653 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2654 {
2655 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2656 if (errmsg != (const char *) NULL)
2657 as_bad ("%s", errmsg);
2658 continue;
2659 }
2660
2661 /* If this is an optional operand, and we are skipping it, just
2662 insert a zero. */
2663 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2664 && skip_optional)
2665 {
2666 if (operand->insert)
2667 {
2668 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2669 if (errmsg != (const char *) NULL)
2670 as_bad ("%s", errmsg);
2671 }
2672 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2673 next_opindex = *opindex_ptr + 1;
2674 continue;
2675 }
2676
2677 /* Gather the operand. */
2678 hold = input_line_pointer;
2679 input_line_pointer = str;
2680
2681 #ifdef TE_PE
2682 if (*input_line_pointer == '[')
2683 {
2684 /* We are expecting something like the second argument here:
2685 *
2686 * lwz r4,[toc].GS.0.static_int(rtoc)
2687 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2688 * The argument following the `]' must be a symbol name, and the
2689 * register must be the toc register: 'rtoc' or '2'
2690 *
2691 * The effect is to 0 as the displacement field
2692 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2693 * the appropriate variation) reloc against it based on the symbol.
2694 * The linker will build the toc, and insert the resolved toc offset.
2695 *
2696 * Note:
2697 * o The size of the toc entry is currently assumed to be
2698 * 32 bits. This should not be assumed to be a hard coded
2699 * number.
2700 * o In an effort to cope with a change from 32 to 64 bits,
2701 * there are also toc entries that are specified to be
2702 * either 32 or 64 bits:
2703 * lwz r4,[toc32].GS.0.static_int(rtoc)
2704 * lwz r4,[toc64].GS.0.static_int(rtoc)
2705 * These demand toc entries of the specified size, and the
2706 * instruction probably requires it.
2707 */
2708
2709 int valid_toc;
2710 enum toc_size_qualifier toc_kind;
2711 bfd_reloc_code_real_type toc_reloc;
2712
2713 /* Go parse off the [tocXX] part. */
2714 valid_toc = parse_toc_entry (&toc_kind);
2715
2716 if (!valid_toc)
2717 {
2718 ignore_rest_of_line ();
2719 break;
2720 }
2721
2722 /* Now get the symbol following the ']'. */
2723 expression (&ex);
2724
2725 switch (toc_kind)
2726 {
2727 case default_toc:
2728 /* In this case, we may not have seen the symbol yet,
2729 since it is allowed to appear on a .extern or .globl
2730 or just be a label in the .data section. */
2731 toc_reloc = BFD_RELOC_PPC_TOC16;
2732 break;
2733 case data_in_toc:
2734 /* 1. The symbol must be defined and either in the toc
2735 section, or a global.
2736 2. The reloc generated must have the TOCDEFN flag set
2737 in upper bit mess of the reloc type.
2738 FIXME: It's a little confusing what the tocv
2739 qualifier can be used for. At the very least, I've
2740 seen three uses, only one of which I'm sure I can
2741 explain. */
2742 if (ex.X_op == O_symbol)
2743 {
2744 gas_assert (ex.X_add_symbol != NULL);
2745 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2746 != tocdata_section)
2747 {
2748 as_bad (_("[tocv] symbol is not a toc symbol"));
2749 }
2750 }
2751
2752 toc_reloc = BFD_RELOC_PPC_TOC16;
2753 break;
2754 case must_be_32:
2755 /* FIXME: these next two specifically specify 32/64 bit
2756 toc entries. We don't support them today. Is this
2757 the right way to say that? */
2758 toc_reloc = BFD_RELOC_UNUSED;
2759 as_bad (_("unimplemented toc32 expression modifier"));
2760 break;
2761 case must_be_64:
2762 /* FIXME: see above. */
2763 toc_reloc = BFD_RELOC_UNUSED;
2764 as_bad (_("unimplemented toc64 expression modifier"));
2765 break;
2766 default:
2767 fprintf (stderr,
2768 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2769 toc_kind);
2770 abort ();
2771 break;
2772 }
2773
2774 /* We need to generate a fixup for this expression. */
2775 if (fc >= MAX_INSN_FIXUPS)
2776 as_fatal (_("too many fixups"));
2777
2778 fixups[fc].reloc = toc_reloc;
2779 fixups[fc].exp = ex;
2780 fixups[fc].opindex = *opindex_ptr;
2781 ++fc;
2782
2783 /* Ok. We've set up the fixup for the instruction. Now make it
2784 look like the constant 0 was found here. */
2785 ex.X_unsigned = 1;
2786 ex.X_op = O_constant;
2787 ex.X_add_number = 0;
2788 ex.X_add_symbol = NULL;
2789 ex.X_op_symbol = NULL;
2790 }
2791
2792 else
2793 #endif /* TE_PE */
2794 {
2795 if ((reg_names_p
2796 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2797 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2798 || !register_name (&ex))
2799 {
2800 char save_lex = lex_type['%'];
2801
2802 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2803 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2804 {
2805 cr_operand = TRUE;
2806 lex_type['%'] |= LEX_BEGIN_NAME;
2807 }
2808 expression (&ex);
2809 cr_operand = FALSE;
2810 lex_type['%'] = save_lex;
2811 }
2812 }
2813
2814 str = input_line_pointer;
2815 input_line_pointer = hold;
2816
2817 if (ex.X_op == O_illegal)
2818 as_bad (_("illegal operand"));
2819 else if (ex.X_op == O_absent)
2820 as_bad (_("missing operand"));
2821 else if (ex.X_op == O_register)
2822 {
2823 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2824 ppc_cpu, (char *) NULL, 0);
2825 }
2826 else if (ex.X_op == O_constant)
2827 {
2828 #ifdef OBJ_ELF
2829 /* Allow @HA, @L, @H on constants. */
2830 bfd_reloc_code_real_type reloc;
2831 char *orig_str = str;
2832
2833 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2834 switch (reloc)
2835 {
2836 default:
2837 str = orig_str;
2838 break;
2839
2840 case BFD_RELOC_LO16:
2841 /* X_unsigned is the default, so if the user has done
2842 something which cleared it, we always produce a
2843 signed value. */
2844 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2845 ex.X_add_number &= 0xffff;
2846 else
2847 ex.X_add_number = SEX16 (ex.X_add_number);
2848 break;
2849
2850 case BFD_RELOC_HI16:
2851 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2852 ex.X_add_number = PPC_HI (ex.X_add_number);
2853 else
2854 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2855 break;
2856
2857 case BFD_RELOC_HI16_S:
2858 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2859 ex.X_add_number = PPC_HA (ex.X_add_number);
2860 else
2861 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2862 break;
2863
2864 case BFD_RELOC_PPC64_HIGHER:
2865 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2866 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2867 else
2868 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2869 break;
2870
2871 case BFD_RELOC_PPC64_HIGHER_S:
2872 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2873 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2874 else
2875 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2876 break;
2877
2878 case BFD_RELOC_PPC64_HIGHEST:
2879 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2880 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2881 else
2882 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2883 break;
2884
2885 case BFD_RELOC_PPC64_HIGHEST_S:
2886 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2887 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2888 else
2889 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2890 break;
2891 }
2892 #endif /* OBJ_ELF */
2893 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2894 ppc_cpu, (char *) NULL, 0);
2895 }
2896 else
2897 {
2898 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2899 #ifdef OBJ_ELF
2900 if (ex.X_op == O_symbol && str[0] == '(')
2901 {
2902 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2903 if (sym_name[0] == '.')
2904 ++sym_name;
2905
2906 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
2907 {
2908 expressionS tls_exp;
2909
2910 hold = input_line_pointer;
2911 input_line_pointer = str + 1;
2912 expression (&tls_exp);
2913 if (tls_exp.X_op == O_symbol)
2914 {
2915 reloc = BFD_RELOC_UNUSED;
2916 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2917 {
2918 reloc = BFD_RELOC_PPC_TLSGD;
2919 input_line_pointer += 7;
2920 }
2921 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2922 {
2923 reloc = BFD_RELOC_PPC_TLSLD;
2924 input_line_pointer += 7;
2925 }
2926 if (reloc != BFD_RELOC_UNUSED)
2927 {
2928 SKIP_WHITESPACE ();
2929 str = input_line_pointer;
2930
2931 if (fc >= MAX_INSN_FIXUPS)
2932 as_fatal (_("too many fixups"));
2933 fixups[fc].exp = tls_exp;
2934 fixups[fc].opindex = *opindex_ptr;
2935 fixups[fc].reloc = reloc;
2936 ++fc;
2937 }
2938 }
2939 input_line_pointer = hold;
2940 }
2941 }
2942
2943 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2944 {
2945 /* Some TLS tweaks. */
2946 switch (reloc)
2947 {
2948 default:
2949 break;
2950
2951 case BFD_RELOC_PPC_TLS:
2952 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2953 as_bad (_("@tls may not be used with \"%s\" operands"),
2954 opcode->name);
2955 else if (operand->shift != 11)
2956 as_bad (_("@tls may only be used in last operand"));
2957 else
2958 insn = ppc_insert_operand (insn, operand,
2959 ppc_obj64 ? 13 : 2,
2960 ppc_cpu, (char *) NULL, 0);
2961 break;
2962
2963 /* We'll only use the 32 (or 64) bit form of these relocations
2964 in constants. Instructions get the 16 bit form. */
2965 case BFD_RELOC_PPC_DTPREL:
2966 reloc = BFD_RELOC_PPC_DTPREL16;
2967 break;
2968 case BFD_RELOC_PPC_TPREL:
2969 reloc = BFD_RELOC_PPC_TPREL16;
2970 break;
2971 }
2972
2973 /* If VLE-mode convert LO/HI/HA relocations. */
2974 if (opcode->flags & PPC_OPCODE_VLE)
2975 {
2976 int tmp_insn = insn & opcode->mask;
2977
2978 int use_d_reloc = (tmp_insn == E_OR2I_INSN
2979 || tmp_insn == E_AND2I_DOT_INSN
2980 || tmp_insn == E_OR2IS_INSN
2981 || tmp_insn == E_LIS_INSN
2982 || tmp_insn == E_AND2IS_DOT_INSN);
2983
2984
2985 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
2986 || tmp_insn == E_ADD2IS_INSN
2987 || tmp_insn == E_CMP16I_INSN
2988 || tmp_insn == E_MULL2I_INSN
2989 || tmp_insn == E_CMPL16I_INSN
2990 || tmp_insn == E_CMPH16I_INSN
2991 || tmp_insn == E_CMPHL16I_INSN);
2992
2993 switch (reloc)
2994 {
2995 default:
2996 break;
2997
2998 case BFD_RELOC_PPC_EMB_SDA21:
2999 reloc = BFD_RELOC_PPC_VLE_SDA21;
3000 break;
3001
3002 case BFD_RELOC_LO16:
3003 if (use_d_reloc)
3004 reloc = BFD_RELOC_PPC_VLE_LO16D;
3005 else if (use_a_reloc)
3006 reloc = BFD_RELOC_PPC_VLE_LO16A;
3007 break;
3008
3009 case BFD_RELOC_HI16:
3010 if (use_d_reloc)
3011 reloc = BFD_RELOC_PPC_VLE_HI16D;
3012 else if (use_a_reloc)
3013 reloc = BFD_RELOC_PPC_VLE_HI16A;
3014 break;
3015
3016 case BFD_RELOC_HI16_S:
3017 if (use_d_reloc)
3018 reloc = BFD_RELOC_PPC_VLE_HA16D;
3019 else if (use_a_reloc)
3020 reloc = BFD_RELOC_PPC_VLE_HA16A;
3021 break;
3022
3023 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3024 if (use_d_reloc)
3025 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3026 break;
3027
3028 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3029 if (use_d_reloc)
3030 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3031 break;
3032
3033 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3034 if (use_d_reloc)
3035 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3036 break;
3037 }
3038 }
3039
3040 /* For the absolute forms of branches, convert the PC
3041 relative form back into the absolute. */
3042 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3043 {
3044 switch (reloc)
3045 {
3046 case BFD_RELOC_PPC_B26:
3047 reloc = BFD_RELOC_PPC_BA26;
3048 break;
3049 case BFD_RELOC_PPC_B16:
3050 reloc = BFD_RELOC_PPC_BA16;
3051 break;
3052 case BFD_RELOC_PPC_B16_BRTAKEN:
3053 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3054 break;
3055 case BFD_RELOC_PPC_B16_BRNTAKEN:
3056 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3057 break;
3058 default:
3059 break;
3060 }
3061 }
3062
3063 switch (reloc)
3064 {
3065 case BFD_RELOC_PPC_TOC16:
3066 toc_reloc_types |= has_small_toc_reloc;
3067 break;
3068 case BFD_RELOC_PPC64_TOC16_LO:
3069 case BFD_RELOC_PPC64_TOC16_HI:
3070 case BFD_RELOC_PPC64_TOC16_HA:
3071 toc_reloc_types |= has_large_toc_reloc;
3072 break;
3073 default:
3074 break;
3075 }
3076
3077 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3078 {
3079 switch (reloc)
3080 {
3081 case BFD_RELOC_16:
3082 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3083 break;
3084 case BFD_RELOC_LO16:
3085 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3086 break;
3087 case BFD_RELOC_16_GOTOFF:
3088 reloc = BFD_RELOC_PPC64_GOT16_DS;
3089 break;
3090 case BFD_RELOC_LO16_GOTOFF:
3091 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3092 break;
3093 case BFD_RELOC_LO16_PLTOFF:
3094 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3095 break;
3096 case BFD_RELOC_16_BASEREL:
3097 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3098 break;
3099 case BFD_RELOC_LO16_BASEREL:
3100 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3101 break;
3102 case BFD_RELOC_PPC_TOC16:
3103 reloc = BFD_RELOC_PPC64_TOC16_DS;
3104 break;
3105 case BFD_RELOC_PPC64_TOC16_LO:
3106 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3107 break;
3108 case BFD_RELOC_PPC64_PLTGOT16:
3109 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3110 break;
3111 case BFD_RELOC_PPC64_PLTGOT16_LO:
3112 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3113 break;
3114 case BFD_RELOC_PPC_DTPREL16:
3115 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3116 break;
3117 case BFD_RELOC_PPC_DTPREL16_LO:
3118 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3119 break;
3120 case BFD_RELOC_PPC_TPREL16:
3121 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3122 break;
3123 case BFD_RELOC_PPC_TPREL16_LO:
3124 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3125 break;
3126 case BFD_RELOC_PPC_GOT_DTPREL16:
3127 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3128 case BFD_RELOC_PPC_GOT_TPREL16:
3129 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3130 break;
3131 default:
3132 as_bad (_("unsupported relocation for DS offset field"));
3133 break;
3134 }
3135 }
3136 }
3137 #endif /* OBJ_ELF */
3138
3139 if (reloc != BFD_RELOC_UNUSED)
3140 ;
3141 /* Determine a BFD reloc value based on the operand information.
3142 We are only prepared to turn a few of the operands into
3143 relocs. */
3144 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3145 && operand->bitm == 0x3fffffc
3146 && operand->shift == 0)
3147 reloc = BFD_RELOC_PPC_B26;
3148 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3149 && operand->bitm == 0xfffc
3150 && operand->shift == 0)
3151 reloc = BFD_RELOC_PPC_B16;
3152 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3153 && operand->bitm == 0x1fe
3154 && operand->shift == -1)
3155 reloc = BFD_RELOC_PPC_VLE_REL8;
3156 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3157 && operand->bitm == 0xfffe
3158 && operand->shift == 0)
3159 reloc = BFD_RELOC_PPC_VLE_REL15;
3160 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3161 && operand->bitm == 0x1fffffe
3162 && operand->shift == 0)
3163 reloc = BFD_RELOC_PPC_VLE_REL24;
3164 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3165 && operand->bitm == 0x3fffffc
3166 && operand->shift == 0)
3167 reloc = BFD_RELOC_PPC_BA26;
3168 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3169 && operand->bitm == 0xfffc
3170 && operand->shift == 0)
3171 reloc = BFD_RELOC_PPC_BA16;
3172 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3173 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3174 && (operand->bitm & 0xfff0) == 0xfff0
3175 && operand->shift == 0)
3176 {
3177 if (ppc_is_toc_sym (ex.X_add_symbol))
3178 {
3179 reloc = BFD_RELOC_PPC_TOC16;
3180 #ifdef OBJ_ELF
3181 if (ppc_obj64
3182 && (operand->flags & PPC_OPERAND_DS) != 0)
3183 reloc = BFD_RELOC_PPC64_TOC16_DS;
3184 #endif
3185 }
3186 else
3187 {
3188 reloc = BFD_RELOC_16;
3189 #ifdef OBJ_ELF
3190 if (ppc_obj64
3191 && (operand->flags & PPC_OPERAND_DS) != 0)
3192 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3193 #endif
3194 }
3195 }
3196 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
3197
3198 /* We need to generate a fixup for this expression. */
3199 if (fc >= MAX_INSN_FIXUPS)
3200 as_fatal (_("too many fixups"));
3201 fixups[fc].exp = ex;
3202 fixups[fc].opindex = *opindex_ptr;
3203 fixups[fc].reloc = reloc;
3204 ++fc;
3205 }
3206
3207 if (need_paren)
3208 {
3209 endc = ')';
3210 need_paren = 0;
3211 /* If expecting more operands, then we want to see "),". */
3212 if (*str == endc && opindex_ptr[1] != 0)
3213 {
3214 do
3215 ++str;
3216 while (ISSPACE (*str));
3217 endc = ',';
3218 }
3219 }
3220 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3221 {
3222 endc = '(';
3223 need_paren = 1;
3224 }
3225 else
3226 endc = ',';
3227
3228 /* The call to expression should have advanced str past any
3229 whitespace. */
3230 if (*str != endc
3231 && (endc != ',' || *str != '\0'))
3232 {
3233 if (*str == '\0')
3234 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3235 else
3236 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3237 break;
3238 }
3239
3240 if (*str != '\0')
3241 ++str;
3242 }
3243
3244 while (ISSPACE (*str))
3245 ++str;
3246
3247 if (*str != '\0')
3248 as_bad (_("junk at end of line: `%s'"), str);
3249
3250 #ifdef OBJ_ELF
3251 /* Do we need/want an APUinfo section? */
3252 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3253 && !ppc_obj64)
3254 {
3255 /* These are all version "1". */
3256 if (opcode->flags & PPC_OPCODE_SPE)
3257 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3258 if (opcode->flags & PPC_OPCODE_ISEL)
3259 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3260 if (opcode->flags & PPC_OPCODE_EFS)
3261 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3262 if (opcode->flags & PPC_OPCODE_BRLOCK)
3263 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3264 if (opcode->flags & PPC_OPCODE_PMR)
3265 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3266 if (opcode->flags & PPC_OPCODE_CACHELCK)
3267 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3268 if (opcode->flags & PPC_OPCODE_RFMCI)
3269 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3270 if (opcode->flags & PPC_OPCODE_VLE)
3271 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3272 }
3273 #endif
3274
3275 /* Write out the instruction. */
3276 /* Differentiate between two and four byte insns. */
3277 if (ppc_mach () == bfd_mach_ppc_vle)
3278 {
3279 if (PPC_OP_SE_VLE (insn))
3280 insn_length = 2;
3281 else
3282 insn_length = 4;
3283 addr_mod = frag_now_fix () & 1;
3284 }
3285 else
3286 {
3287 insn_length = 4;
3288 addr_mod = frag_now_fix () & 3;
3289 }
3290 /* All instructions can start on a 2 byte boundary for VLE. */
3291 f = frag_more (insn_length);
3292 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3293 {
3294 if (ppc_mach() == bfd_mach_ppc_vle)
3295 as_bad (_("instruction address is not a multiple of 2"));
3296 else
3297 as_bad (_("instruction address is not a multiple of 4"));
3298 }
3299 frag_now->insn_addr = addr_mod;
3300 frag_now->has_code = 1;
3301 md_number_to_chars (f, insn, insn_length);
3302
3303 #ifdef OBJ_ELF
3304 dwarf2_emit_insn (insn_length);
3305 #endif
3306
3307 /* Create any fixups. */
3308 for (i = 0; i < fc; i++)
3309 {
3310 fixS *fixP;
3311 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3312 {
3313 reloc_howto_type *reloc_howto;
3314 int size;
3315 int offset;
3316
3317 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3318 if (!reloc_howto)
3319 abort ();
3320
3321 size = bfd_get_reloc_size (reloc_howto);
3322 offset = target_big_endian ? (insn_length - size) : 0;
3323
3324 if (size < 1 || size > 4)
3325 abort ();
3326
3327 fixP = fix_new_exp (frag_now,
3328 f - frag_now->fr_literal + offset,
3329 size,
3330 &fixups[i].exp,
3331 reloc_howto->pc_relative,
3332 fixups[i].reloc);
3333 }
3334 else
3335 {
3336 const struct powerpc_operand *operand;
3337
3338 operand = &powerpc_operands[fixups[i].opindex];
3339 fixP = fix_new_exp (frag_now,
3340 f - frag_now->fr_literal,
3341 insn_length,
3342 &fixups[i].exp,
3343 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3344 BFD_RELOC_UNUSED);
3345 }
3346 fixP->fx_pcrel_adjust = fixups[i].opindex;
3347 }
3348 }
3349
3350 /* Handle a macro. Gather all the operands, transform them as
3351 described by the macro, and call md_assemble recursively. All the
3352 operands are separated by commas; we don't accept parentheses
3353 around operands here. */
3354
3355 static void
3356 ppc_macro (char *str, const struct powerpc_macro *macro)
3357 {
3358 char *operands[10];
3359 unsigned int count;
3360 char *s;
3361 unsigned int len;
3362 const char *format;
3363 unsigned int arg;
3364 char *send;
3365 char *complete;
3366
3367 /* Gather the users operands into the operands array. */
3368 count = 0;
3369 s = str;
3370 while (1)
3371 {
3372 if (count >= sizeof operands / sizeof operands[0])
3373 break;
3374 operands[count++] = s;
3375 s = strchr (s, ',');
3376 if (s == (char *) NULL)
3377 break;
3378 *s++ = '\0';
3379 }
3380
3381 if (count != macro->operands)
3382 {
3383 as_bad (_("wrong number of operands"));
3384 return;
3385 }
3386
3387 /* Work out how large the string must be (the size is unbounded
3388 because it includes user input). */
3389 len = 0;
3390 format = macro->format;
3391 while (*format != '\0')
3392 {
3393 if (*format != '%')
3394 {
3395 ++len;
3396 ++format;
3397 }
3398 else
3399 {
3400 arg = strtol (format + 1, &send, 10);
3401 know (send != format && arg < count);
3402 len += strlen (operands[arg]);
3403 format = send;
3404 }
3405 }
3406
3407 /* Put the string together. */
3408 complete = s = (char *) alloca (len + 1);
3409 format = macro->format;
3410 while (*format != '\0')
3411 {
3412 if (*format != '%')
3413 *s++ = *format++;
3414 else
3415 {
3416 arg = strtol (format + 1, &send, 10);
3417 strcpy (s, operands[arg]);
3418 s += strlen (s);
3419 format = send;
3420 }
3421 }
3422 *s = '\0';
3423
3424 /* Assemble the constructed instruction. */
3425 md_assemble (complete);
3426 }
3427 \f
3428 #ifdef OBJ_ELF
3429 /* For ELF, add support for SHT_ORDERED. */
3430
3431 int
3432 ppc_section_type (char *str, size_t len)
3433 {
3434 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3435 return SHT_ORDERED;
3436
3437 return -1;
3438 }
3439
3440 int
3441 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3442 {
3443 if (type == SHT_ORDERED)
3444 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3445
3446 return flags;
3447 }
3448 #endif /* OBJ_ELF */
3449
3450 \f
3451 /* Pseudo-op handling. */
3452
3453 /* The .byte pseudo-op. This is similar to the normal .byte
3454 pseudo-op, but it can also take a single ASCII string. */
3455
3456 static void
3457 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3458 {
3459 if (*input_line_pointer != '\"')
3460 {
3461 cons (1);
3462 return;
3463 }
3464
3465 /* Gather characters. A real double quote is doubled. Unusual
3466 characters are not permitted. */
3467 ++input_line_pointer;
3468 while (1)
3469 {
3470 char c;
3471
3472 c = *input_line_pointer++;
3473
3474 if (c == '\"')
3475 {
3476 if (*input_line_pointer != '\"')
3477 break;
3478 ++input_line_pointer;
3479 }
3480
3481 FRAG_APPEND_1_CHAR (c);
3482 }
3483
3484 demand_empty_rest_of_line ();
3485 }
3486 \f
3487 #ifdef OBJ_XCOFF
3488
3489 /* XCOFF specific pseudo-op handling. */
3490
3491 /* This is set if we are creating a .stabx symbol, since we don't want
3492 to handle symbol suffixes for such symbols. */
3493 static bfd_boolean ppc_stab_symbol;
3494
3495 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3496 symbols in the .bss segment as though they were local common
3497 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3498 aligns .comm and .lcomm to 4 bytes. */
3499
3500 static void
3501 ppc_comm (int lcomm)
3502 {
3503 asection *current_seg = now_seg;
3504 subsegT current_subseg = now_subseg;
3505 char *name;
3506 char endc;
3507 char *end_name;
3508 offsetT size;
3509 offsetT align;
3510 symbolS *lcomm_sym = NULL;
3511 symbolS *sym;
3512 char *pfrag;
3513
3514 name = input_line_pointer;
3515 endc = get_symbol_end ();
3516 end_name = input_line_pointer;
3517 *end_name = endc;
3518
3519 if (*input_line_pointer != ',')
3520 {
3521 as_bad (_("missing size"));
3522 ignore_rest_of_line ();
3523 return;
3524 }
3525 ++input_line_pointer;
3526
3527 size = get_absolute_expression ();
3528 if (size < 0)
3529 {
3530 as_bad (_("negative size"));
3531 ignore_rest_of_line ();
3532 return;
3533 }
3534
3535 if (! lcomm)
3536 {
3537 /* The third argument to .comm is the alignment. */
3538 if (*input_line_pointer != ',')
3539 align = 2;
3540 else
3541 {
3542 ++input_line_pointer;
3543 align = get_absolute_expression ();
3544 if (align <= 0)
3545 {
3546 as_warn (_("ignoring bad alignment"));
3547 align = 2;
3548 }
3549 }
3550 }
3551 else
3552 {
3553 char *lcomm_name;
3554 char lcomm_endc;
3555
3556 if (size <= 4)
3557 align = 2;
3558 else
3559 align = 3;
3560
3561 /* The third argument to .lcomm appears to be the real local
3562 common symbol to create. References to the symbol named in
3563 the first argument are turned into references to the third
3564 argument. */
3565 if (*input_line_pointer != ',')
3566 {
3567 as_bad (_("missing real symbol name"));
3568 ignore_rest_of_line ();
3569 return;
3570 }
3571 ++input_line_pointer;
3572
3573 lcomm_name = input_line_pointer;
3574 lcomm_endc = get_symbol_end ();
3575
3576 lcomm_sym = symbol_find_or_make (lcomm_name);
3577
3578 *input_line_pointer = lcomm_endc;
3579 }
3580
3581 *end_name = '\0';
3582 sym = symbol_find_or_make (name);
3583 *end_name = endc;
3584
3585 if (S_IS_DEFINED (sym)
3586 || S_GET_VALUE (sym) != 0)
3587 {
3588 as_bad (_("attempt to redefine symbol"));
3589 ignore_rest_of_line ();
3590 return;
3591 }
3592
3593 record_alignment (bss_section, align);
3594
3595 if (! lcomm
3596 || ! S_IS_DEFINED (lcomm_sym))
3597 {
3598 symbolS *def_sym;
3599 offsetT def_size;
3600
3601 if (! lcomm)
3602 {
3603 def_sym = sym;
3604 def_size = size;
3605 S_SET_EXTERNAL (sym);
3606 }
3607 else
3608 {
3609 symbol_get_tc (lcomm_sym)->output = 1;
3610 def_sym = lcomm_sym;
3611 def_size = 0;
3612 }
3613
3614 subseg_set (bss_section, 1);
3615 frag_align (align, 0, 0);
3616
3617 symbol_set_frag (def_sym, frag_now);
3618 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3619 def_size, (char *) NULL);
3620 *pfrag = 0;
3621 S_SET_SEGMENT (def_sym, bss_section);
3622 symbol_get_tc (def_sym)->align = align;
3623 }
3624 else if (lcomm)
3625 {
3626 /* Align the size of lcomm_sym. */
3627 symbol_get_frag (lcomm_sym)->fr_offset =
3628 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3629 &~ ((1 << align) - 1));
3630 if (align > symbol_get_tc (lcomm_sym)->align)
3631 symbol_get_tc (lcomm_sym)->align = align;
3632 }
3633
3634 if (lcomm)
3635 {
3636 /* Make sym an offset from lcomm_sym. */
3637 S_SET_SEGMENT (sym, bss_section);
3638 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3639 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3640 symbol_get_frag (lcomm_sym)->fr_offset += size;
3641 }
3642
3643 subseg_set (current_seg, current_subseg);
3644
3645 demand_empty_rest_of_line ();
3646 }
3647
3648 /* The .csect pseudo-op. This switches us into a different
3649 subsegment. The first argument is a symbol whose value is the
3650 start of the .csect. In COFF, csect symbols get special aux
3651 entries defined by the x_csect field of union internal_auxent. The
3652 optional second argument is the alignment (the default is 2). */
3653
3654 static void
3655 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3656 {
3657 char *name;
3658 char endc;
3659 symbolS *sym;
3660 offsetT align;
3661
3662 name = input_line_pointer;
3663 endc = get_symbol_end ();
3664
3665 sym = symbol_find_or_make (name);
3666
3667 *input_line_pointer = endc;
3668
3669 if (S_GET_NAME (sym)[0] == '\0')
3670 {
3671 /* An unnamed csect is assumed to be [PR]. */
3672 symbol_get_tc (sym)->symbol_class = XMC_PR;
3673 }
3674
3675 align = 2;
3676 if (*input_line_pointer == ',')
3677 {
3678 ++input_line_pointer;
3679 align = get_absolute_expression ();
3680 }
3681
3682 ppc_change_csect (sym, align);
3683
3684 demand_empty_rest_of_line ();
3685 }
3686
3687 /* Change to a different csect. */
3688
3689 static void
3690 ppc_change_csect (symbolS *sym, offsetT align)
3691 {
3692 if (S_IS_DEFINED (sym))
3693 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3694 else
3695 {
3696 symbolS **list_ptr;
3697 int after_toc;
3698 int hold_chunksize;
3699 symbolS *list;
3700 int is_code;
3701 segT sec;
3702
3703 /* This is a new csect. We need to look at the symbol class to
3704 figure out whether it should go in the text section or the
3705 data section. */
3706 after_toc = 0;
3707 is_code = 0;
3708 switch (symbol_get_tc (sym)->symbol_class)
3709 {
3710 case XMC_PR:
3711 case XMC_RO:
3712 case XMC_DB:
3713 case XMC_GL:
3714 case XMC_XO:
3715 case XMC_SV:
3716 case XMC_TI:
3717 case XMC_TB:
3718 S_SET_SEGMENT (sym, text_section);
3719 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3720 ++ppc_text_subsegment;
3721 list_ptr = &ppc_text_csects;
3722 is_code = 1;
3723 break;
3724 case XMC_RW:
3725 case XMC_TC0:
3726 case XMC_TC:
3727 case XMC_DS:
3728 case XMC_UA:
3729 case XMC_BS:
3730 case XMC_UC:
3731 if (ppc_toc_csect != NULL
3732 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3733 == ppc_data_subsegment))
3734 after_toc = 1;
3735 S_SET_SEGMENT (sym, data_section);
3736 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3737 ++ppc_data_subsegment;
3738 list_ptr = &ppc_data_csects;
3739 break;
3740 default:
3741 abort ();
3742 }
3743
3744 /* We set the obstack chunk size to a small value before
3745 changing subsegments, so that we don't use a lot of memory
3746 space for what may be a small section. */
3747 hold_chunksize = chunksize;
3748 chunksize = 64;
3749
3750 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3751 symbol_get_tc (sym)->subseg);
3752
3753 chunksize = hold_chunksize;
3754
3755 if (after_toc)
3756 ppc_after_toc_frag = frag_now;
3757
3758 record_alignment (sec, align);
3759 if (is_code)
3760 frag_align_code (align, 0);
3761 else
3762 frag_align (align, 0, 0);
3763
3764 symbol_set_frag (sym, frag_now);
3765 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3766
3767 symbol_get_tc (sym)->align = align;
3768 symbol_get_tc (sym)->output = 1;
3769 symbol_get_tc (sym)->within = sym;
3770
3771 for (list = *list_ptr;
3772 symbol_get_tc (list)->next != (symbolS *) NULL;
3773 list = symbol_get_tc (list)->next)
3774 ;
3775 symbol_get_tc (list)->next = sym;
3776
3777 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3778 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3779 &symbol_lastP);
3780 }
3781
3782 ppc_current_csect = sym;
3783 }
3784
3785 static void
3786 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3787 {
3788 segT sec;
3789 flagword oldflags;
3790 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3791
3792 sec = subseg_new (dw->name, subseg);
3793 oldflags = bfd_get_section_flags (stdoutput, sec);
3794 if (oldflags == SEC_NO_FLAGS)
3795 {
3796 /* Just created section. */
3797 gas_assert (dw_sections[idx].sect == NULL);
3798
3799 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3800 bfd_set_section_alignment (stdoutput, sec, 0);
3801 dw_sections[idx].sect = sec;
3802 }
3803
3804 /* Not anymore in a csect. */
3805 ppc_current_csect = NULL;
3806 }
3807
3808 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3809 .dwsect flag [, opt-label ]
3810 */
3811
3812 static void
3813 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3814 {
3815 offsetT flag;
3816 symbolS *opt_label;
3817 const struct xcoff_dwsect_name *dw;
3818 struct dw_subsection *subseg;
3819 struct dw_section *dws;
3820 int i;
3821
3822 /* Find section. */
3823 flag = get_absolute_expression ();
3824 dw = NULL;
3825 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3826 if (xcoff_dwsect_names[i].flag == flag)
3827 {
3828 dw = &xcoff_dwsect_names[i];
3829 break;
3830 }
3831
3832 /* Parse opt-label. */
3833 if (*input_line_pointer == ',')
3834 {
3835 const char *label;
3836 char c;
3837
3838 ++input_line_pointer;
3839
3840 label = input_line_pointer;
3841 c = get_symbol_end ();
3842 opt_label = symbol_find_or_make (label);
3843 *input_line_pointer = c;
3844 }
3845 else
3846 opt_label = NULL;
3847
3848 demand_empty_rest_of_line ();
3849
3850 /* Return now in case of unknown subsection. */
3851 if (dw == NULL)
3852 {
3853 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3854 (unsigned)flag);
3855 return;
3856 }
3857
3858 /* Find the subsection. */
3859 dws = &dw_sections[i];
3860 subseg = NULL;
3861 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3862 {
3863 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3864 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3865 {
3866 as_bad (_("label %s was not defined in this dwarf section"),
3867 S_GET_NAME (opt_label));
3868 subseg = dws->anon_subseg;
3869 opt_label = NULL;
3870 }
3871 else
3872 subseg = symbol_get_tc (opt_label)->u.dw;
3873 }
3874
3875 if (subseg != NULL)
3876 {
3877 /* Switch to the subsection. */
3878 ppc_change_debug_section (i, subseg->subseg);
3879 }
3880 else
3881 {
3882 /* Create a new dw subsection. */
3883 subseg = (struct dw_subsection *)
3884 xmalloc (sizeof (struct dw_subsection));
3885
3886 if (opt_label == NULL)
3887 {
3888 /* The anonymous one. */
3889 subseg->subseg = 0;
3890 subseg->link = NULL;
3891 dws->anon_subseg = subseg;
3892 }
3893 else
3894 {
3895 /* A named one. */
3896 if (dws->list_subseg != NULL)
3897 subseg->subseg = dws->list_subseg->subseg + 1;
3898 else
3899 subseg->subseg = 1;
3900
3901 subseg->link = dws->list_subseg;
3902 dws->list_subseg = subseg;
3903 symbol_get_tc (opt_label)->u.dw = subseg;
3904 }
3905
3906 ppc_change_debug_section (i, subseg->subseg);
3907
3908 if (dw->def_size)
3909 {
3910 /* Add the length field. */
3911 expressionS *exp = &subseg->end_exp;
3912 int sz;
3913
3914 if (opt_label != NULL)
3915 symbol_set_value_now (opt_label);
3916
3917 /* Add the length field. Note that according to the AIX assembler
3918 manual, the size of the length field is 4 for powerpc32 but
3919 12 for powerpc64. */
3920 if (ppc_obj64)
3921 {
3922 /* Write the 64bit marker. */
3923 md_number_to_chars (frag_more (4), -1, 4);
3924 }
3925
3926 exp->X_op = O_subtract;
3927 exp->X_op_symbol = symbol_temp_new_now ();
3928 exp->X_add_symbol = symbol_temp_make ();
3929
3930 sz = ppc_obj64 ? 8 : 4;
3931 exp->X_add_number = -sz;
3932 emit_expr (exp, sz);
3933 }
3934 }
3935 }
3936
3937 /* This function handles the .text and .data pseudo-ops. These
3938 pseudo-ops aren't really used by XCOFF; we implement them for the
3939 convenience of people who aren't used to XCOFF. */
3940
3941 static void
3942 ppc_section (int type)
3943 {
3944 const char *name;
3945 symbolS *sym;
3946
3947 if (type == 't')
3948 name = ".text[PR]";
3949 else if (type == 'd')
3950 name = ".data[RW]";
3951 else
3952 abort ();
3953
3954 sym = symbol_find_or_make (name);
3955
3956 ppc_change_csect (sym, 2);
3957
3958 demand_empty_rest_of_line ();
3959 }
3960
3961 /* This function handles the .section pseudo-op. This is mostly to
3962 give an error, since XCOFF only supports .text, .data and .bss, but
3963 we do permit the user to name the text or data section. */
3964
3965 static void
3966 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3967 {
3968 char *user_name;
3969 const char *real_name;
3970 char c;
3971 symbolS *sym;
3972
3973 user_name = input_line_pointer;
3974 c = get_symbol_end ();
3975
3976 if (strcmp (user_name, ".text") == 0)
3977 real_name = ".text[PR]";
3978 else if (strcmp (user_name, ".data") == 0)
3979 real_name = ".data[RW]";
3980 else
3981 {
3982 as_bad (_("the XCOFF file format does not support arbitrary sections"));
3983 *input_line_pointer = c;
3984 ignore_rest_of_line ();
3985 return;
3986 }
3987
3988 *input_line_pointer = c;
3989
3990 sym = symbol_find_or_make (real_name);
3991
3992 ppc_change_csect (sym, 2);
3993
3994 demand_empty_rest_of_line ();
3995 }
3996
3997 /* The .extern pseudo-op. We create an undefined symbol. */
3998
3999 static void
4000 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4001 {
4002 char *name;
4003 char endc;
4004
4005 name = input_line_pointer;
4006 endc = get_symbol_end ();
4007
4008 (void) symbol_find_or_make (name);
4009
4010 *input_line_pointer = endc;
4011
4012 demand_empty_rest_of_line ();
4013 }
4014
4015 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4016
4017 static void
4018 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4019 {
4020 char *name;
4021 char endc;
4022 symbolS *sym;
4023
4024 name = input_line_pointer;
4025 endc = get_symbol_end ();
4026
4027 sym = symbol_find_or_make (name);
4028
4029 *input_line_pointer = endc;
4030
4031 symbol_get_tc (sym)->output = 1;
4032
4033 demand_empty_rest_of_line ();
4034 }
4035
4036 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4037 relocations at the beginning of the current csect.
4038
4039 (In principle, there's no reason why the relocations _have_ to be at
4040 the beginning. Anywhere in the csect would do. However, inserting
4041 at the beginning is what the native assmebler does, and it helps to
4042 deal with cases where the .ref statements follow the section contents.)
4043
4044 ??? .refs don't work for empty .csects. However, the native assembler
4045 doesn't report an error in this case, and neither yet do we. */
4046
4047 static void
4048 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4049 {
4050 char *name;
4051 char c;
4052
4053 if (ppc_current_csect == NULL)
4054 {
4055 as_bad (_(".ref outside .csect"));
4056 ignore_rest_of_line ();
4057 return;
4058 }
4059
4060 do
4061 {
4062 name = input_line_pointer;
4063 c = get_symbol_end ();
4064
4065 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4066 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4067
4068 *input_line_pointer = c;
4069 SKIP_WHITESPACE ();
4070 c = *input_line_pointer;
4071 if (c == ',')
4072 {
4073 input_line_pointer++;
4074 SKIP_WHITESPACE ();
4075 if (is_end_of_line[(unsigned char) *input_line_pointer])
4076 {
4077 as_bad (_("missing symbol name"));
4078 ignore_rest_of_line ();
4079 return;
4080 }
4081 }
4082 }
4083 while (c == ',');
4084
4085 demand_empty_rest_of_line ();
4086 }
4087
4088 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4089 although I don't know why it bothers. */
4090
4091 static void
4092 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4093 {
4094 char *name;
4095 char endc;
4096 symbolS *sym;
4097 int len;
4098
4099 name = input_line_pointer;
4100 endc = get_symbol_end ();
4101
4102 sym = symbol_find_or_make (name);
4103
4104 *input_line_pointer = endc;
4105
4106 if (*input_line_pointer != ',')
4107 {
4108 as_bad (_("missing rename string"));
4109 ignore_rest_of_line ();
4110 return;
4111 }
4112 ++input_line_pointer;
4113
4114 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4115
4116 demand_empty_rest_of_line ();
4117 }
4118
4119 /* The .stabx pseudo-op. This is similar to a normal .stabs
4120 pseudo-op, but slightly different. A sample is
4121 .stabx "main:F-1",.main,142,0
4122 The first argument is the symbol name to create. The second is the
4123 value, and the third is the storage class. The fourth seems to be
4124 always zero, and I am assuming it is the type. */
4125
4126 static void
4127 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4128 {
4129 char *name;
4130 int len;
4131 symbolS *sym;
4132 expressionS exp;
4133
4134 name = demand_copy_C_string (&len);
4135
4136 if (*input_line_pointer != ',')
4137 {
4138 as_bad (_("missing value"));
4139 return;
4140 }
4141 ++input_line_pointer;
4142
4143 ppc_stab_symbol = TRUE;
4144 sym = symbol_make (name);
4145 ppc_stab_symbol = FALSE;
4146
4147 symbol_get_tc (sym)->real_name = name;
4148
4149 (void) expression (&exp);
4150
4151 switch (exp.X_op)
4152 {
4153 case O_illegal:
4154 case O_absent:
4155 case O_big:
4156 as_bad (_("illegal .stabx expression; zero assumed"));
4157 exp.X_add_number = 0;
4158 /* Fall through. */
4159 case O_constant:
4160 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4161 symbol_set_frag (sym, &zero_address_frag);
4162 break;
4163
4164 case O_symbol:
4165 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4166 symbol_set_value_expression (sym, &exp);
4167 else
4168 {
4169 S_SET_VALUE (sym,
4170 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4171 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4172 }
4173 break;
4174
4175 default:
4176 /* The value is some complex expression. This will probably
4177 fail at some later point, but this is probably the right
4178 thing to do here. */
4179 symbol_set_value_expression (sym, &exp);
4180 break;
4181 }
4182
4183 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4184 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4185
4186 if (*input_line_pointer != ',')
4187 {
4188 as_bad (_("missing class"));
4189 return;
4190 }
4191 ++input_line_pointer;
4192
4193 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4194
4195 if (*input_line_pointer != ',')
4196 {
4197 as_bad (_("missing type"));
4198 return;
4199 }
4200 ++input_line_pointer;
4201
4202 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4203
4204 symbol_get_tc (sym)->output = 1;
4205
4206 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4207 {
4208 /* In this case :
4209
4210 .bs name
4211 .stabx "z",arrays_,133,0
4212 .es
4213
4214 .comm arrays_,13768,3
4215
4216 resolve_symbol_value will copy the exp's "within" into sym's when the
4217 offset is 0. Since this seems to be corner case problem,
4218 only do the correction for storage class C_STSYM. A better solution
4219 would be to have the tc field updated in ppc_symbol_new_hook. */
4220
4221 if (exp.X_op == O_symbol)
4222 {
4223 if (ppc_current_block == NULL)
4224 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4225
4226 symbol_get_tc (sym)->within = ppc_current_block;
4227 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4228 }
4229 }
4230
4231 if (exp.X_op != O_symbol
4232 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4233 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4234 ppc_frob_label (sym);
4235 else
4236 {
4237 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4238 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4239 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4240 symbol_get_tc (ppc_current_csect)->within = sym;
4241 }
4242
4243 demand_empty_rest_of_line ();
4244 }
4245
4246 /* The .function pseudo-op. This takes several arguments. The first
4247 argument seems to be the external name of the symbol. The second
4248 argument seems to be the label for the start of the function. gcc
4249 uses the same name for both. I have no idea what the third and
4250 fourth arguments are meant to be. The optional fifth argument is
4251 an expression for the size of the function. In COFF this symbol
4252 gets an aux entry like that used for a csect. */
4253
4254 static void
4255 ppc_function (int ignore ATTRIBUTE_UNUSED)
4256 {
4257 char *name;
4258 char endc;
4259 char *s;
4260 symbolS *ext_sym;
4261 symbolS *lab_sym;
4262
4263 name = input_line_pointer;
4264 endc = get_symbol_end ();
4265
4266 /* Ignore any [PR] suffix. */
4267 name = ppc_canonicalize_symbol_name (name);
4268 s = strchr (name, '[');
4269 if (s != (char *) NULL
4270 && strcmp (s + 1, "PR]") == 0)
4271 *s = '\0';
4272
4273 ext_sym = symbol_find_or_make (name);
4274
4275 *input_line_pointer = endc;
4276
4277 if (*input_line_pointer != ',')
4278 {
4279 as_bad (_("missing symbol name"));
4280 ignore_rest_of_line ();
4281 return;
4282 }
4283 ++input_line_pointer;
4284
4285 name = input_line_pointer;
4286 endc = get_symbol_end ();
4287
4288 lab_sym = symbol_find_or_make (name);
4289
4290 *input_line_pointer = endc;
4291
4292 if (ext_sym != lab_sym)
4293 {
4294 expressionS exp;
4295
4296 exp.X_op = O_symbol;
4297 exp.X_add_symbol = lab_sym;
4298 exp.X_op_symbol = NULL;
4299 exp.X_add_number = 0;
4300 exp.X_unsigned = 0;
4301 symbol_set_value_expression (ext_sym, &exp);
4302 }
4303
4304 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4305 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4306 symbol_get_tc (ext_sym)->output = 1;
4307
4308 if (*input_line_pointer == ',')
4309 {
4310 expressionS exp;
4311
4312 /* Ignore the third argument. */
4313 ++input_line_pointer;
4314 expression (& exp);
4315 if (*input_line_pointer == ',')
4316 {
4317 /* Ignore the fourth argument. */
4318 ++input_line_pointer;
4319 expression (& exp);
4320 if (*input_line_pointer == ',')
4321 {
4322 /* The fifth argument is the function size. */
4323 ++input_line_pointer;
4324 symbol_get_tc (ext_sym)->u.size = symbol_new
4325 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4326 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4327 }
4328 }
4329 }
4330
4331 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4332 SF_SET_FUNCTION (ext_sym);
4333 SF_SET_PROCESS (ext_sym);
4334 coff_add_linesym (ext_sym);
4335
4336 demand_empty_rest_of_line ();
4337 }
4338
4339 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4340 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4341 with the correct line number */
4342
4343 static symbolS *saved_bi_sym = 0;
4344
4345 static void
4346 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4347 {
4348 symbolS *sym;
4349
4350 sym = symbol_make (".bf");
4351 S_SET_SEGMENT (sym, text_section);
4352 symbol_set_frag (sym, frag_now);
4353 S_SET_VALUE (sym, frag_now_fix ());
4354 S_SET_STORAGE_CLASS (sym, C_FCN);
4355
4356 coff_line_base = get_absolute_expression ();
4357
4358 S_SET_NUMBER_AUXILIARY (sym, 1);
4359 SA_SET_SYM_LNNO (sym, coff_line_base);
4360
4361 /* Line number for bi. */
4362 if (saved_bi_sym)
4363 {
4364 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4365 saved_bi_sym = 0;
4366 }
4367
4368
4369 symbol_get_tc (sym)->output = 1;
4370
4371 ppc_frob_label (sym);
4372
4373 demand_empty_rest_of_line ();
4374 }
4375
4376 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4377 ".ef", except that the line number is absolute, not relative to the
4378 most recent ".bf" symbol. */
4379
4380 static void
4381 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4382 {
4383 symbolS *sym;
4384
4385 sym = symbol_make (".ef");
4386 S_SET_SEGMENT (sym, text_section);
4387 symbol_set_frag (sym, frag_now);
4388 S_SET_VALUE (sym, frag_now_fix ());
4389 S_SET_STORAGE_CLASS (sym, C_FCN);
4390 S_SET_NUMBER_AUXILIARY (sym, 1);
4391 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4392 symbol_get_tc (sym)->output = 1;
4393
4394 ppc_frob_label (sym);
4395
4396 demand_empty_rest_of_line ();
4397 }
4398
4399 /* The .bi and .ei pseudo-ops. These take a string argument and
4400 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4401 the symbol list. The value of .bi will be know when the next .bf
4402 is encountered. */
4403
4404 static void
4405 ppc_biei (int ei)
4406 {
4407 static symbolS *last_biei;
4408
4409 char *name;
4410 int len;
4411 symbolS *sym;
4412 symbolS *look;
4413
4414 name = demand_copy_C_string (&len);
4415
4416 /* The value of these symbols is actually file offset. Here we set
4417 the value to the index into the line number entries. In
4418 ppc_frob_symbols we set the fix_line field, which will cause BFD
4419 to do the right thing. */
4420
4421 sym = symbol_make (name);
4422 /* obj-coff.c currently only handles line numbers correctly in the
4423 .text section. */
4424 S_SET_SEGMENT (sym, text_section);
4425 S_SET_VALUE (sym, coff_n_line_nos);
4426 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4427
4428 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4429 symbol_get_tc (sym)->output = 1;
4430
4431 /* Save bi. */
4432 if (ei)
4433 saved_bi_sym = 0;
4434 else
4435 saved_bi_sym = sym;
4436
4437 for (look = last_biei ? last_biei : symbol_rootP;
4438 (look != (symbolS *) NULL
4439 && (S_GET_STORAGE_CLASS (look) == C_FILE
4440 || S_GET_STORAGE_CLASS (look) == C_BINCL
4441 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4442 look = symbol_next (look))
4443 ;
4444 if (look != (symbolS *) NULL)
4445 {
4446 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4447 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4448 last_biei = sym;
4449 }
4450
4451 demand_empty_rest_of_line ();
4452 }
4453
4454 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4455 There is one argument, which is a csect symbol. The value of the
4456 .bs symbol is the index of this csect symbol. */
4457
4458 static void
4459 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4460 {
4461 char *name;
4462 char endc;
4463 symbolS *csect;
4464 symbolS *sym;
4465
4466 if (ppc_current_block != NULL)
4467 as_bad (_("nested .bs blocks"));
4468
4469 name = input_line_pointer;
4470 endc = get_symbol_end ();
4471
4472 csect = symbol_find_or_make (name);
4473
4474 *input_line_pointer = endc;
4475
4476 sym = symbol_make (".bs");
4477 S_SET_SEGMENT (sym, now_seg);
4478 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4479 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4480 symbol_get_tc (sym)->output = 1;
4481
4482 symbol_get_tc (sym)->within = csect;
4483
4484 ppc_frob_label (sym);
4485
4486 ppc_current_block = sym;
4487
4488 demand_empty_rest_of_line ();
4489 }
4490
4491 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4492
4493 static void
4494 ppc_es (int ignore ATTRIBUTE_UNUSED)
4495 {
4496 symbolS *sym;
4497
4498 if (ppc_current_block == NULL)
4499 as_bad (_(".es without preceding .bs"));
4500
4501 sym = symbol_make (".es");
4502 S_SET_SEGMENT (sym, now_seg);
4503 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4504 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4505 symbol_get_tc (sym)->output = 1;
4506
4507 ppc_frob_label (sym);
4508
4509 ppc_current_block = NULL;
4510
4511 demand_empty_rest_of_line ();
4512 }
4513
4514 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4515 line number. */
4516
4517 static void
4518 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4519 {
4520 symbolS *sym;
4521
4522 sym = symbol_make (".bb");
4523 S_SET_SEGMENT (sym, text_section);
4524 symbol_set_frag (sym, frag_now);
4525 S_SET_VALUE (sym, frag_now_fix ());
4526 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4527
4528 S_SET_NUMBER_AUXILIARY (sym, 1);
4529 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4530
4531 symbol_get_tc (sym)->output = 1;
4532
4533 SF_SET_PROCESS (sym);
4534
4535 ppc_frob_label (sym);
4536
4537 demand_empty_rest_of_line ();
4538 }
4539
4540 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4541 line number. */
4542
4543 static void
4544 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4545 {
4546 symbolS *sym;
4547
4548 sym = symbol_make (".eb");
4549 S_SET_SEGMENT (sym, text_section);
4550 symbol_set_frag (sym, frag_now);
4551 S_SET_VALUE (sym, frag_now_fix ());
4552 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4553 S_SET_NUMBER_AUXILIARY (sym, 1);
4554 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4555 symbol_get_tc (sym)->output = 1;
4556
4557 SF_SET_PROCESS (sym);
4558
4559 ppc_frob_label (sym);
4560
4561 demand_empty_rest_of_line ();
4562 }
4563
4564 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4565 specified name. */
4566
4567 static void
4568 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4569 {
4570 char *name;
4571 int len;
4572 symbolS *sym;
4573
4574 name = demand_copy_C_string (&len);
4575 sym = symbol_make (name);
4576 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4577 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4578 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4579 S_SET_VALUE (sym, 0);
4580 symbol_get_tc (sym)->output = 1;
4581
4582 ppc_frob_label (sym);
4583
4584 demand_empty_rest_of_line ();
4585 }
4586
4587 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4588
4589 static void
4590 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4591 {
4592 symbolS *sym;
4593
4594 sym = symbol_make (".ec");
4595 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4596 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4597 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4598 S_SET_VALUE (sym, 0);
4599 symbol_get_tc (sym)->output = 1;
4600
4601 ppc_frob_label (sym);
4602
4603 demand_empty_rest_of_line ();
4604 }
4605
4606 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4607
4608 static void
4609 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4610 {
4611 if (ppc_toc_csect != (symbolS *) NULL)
4612 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4613 else
4614 {
4615 subsegT subseg;
4616 symbolS *sym;
4617 symbolS *list;
4618
4619 subseg = ppc_data_subsegment;
4620 ++ppc_data_subsegment;
4621
4622 subseg_new (segment_name (data_section), subseg);
4623 ppc_toc_frag = frag_now;
4624
4625 sym = symbol_find_or_make ("TOC[TC0]");
4626 symbol_set_frag (sym, frag_now);
4627 S_SET_SEGMENT (sym, data_section);
4628 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4629 symbol_get_tc (sym)->subseg = subseg;
4630 symbol_get_tc (sym)->output = 1;
4631 symbol_get_tc (sym)->within = sym;
4632
4633 ppc_toc_csect = sym;
4634
4635 for (list = ppc_data_csects;
4636 symbol_get_tc (list)->next != (symbolS *) NULL;
4637 list = symbol_get_tc (list)->next)
4638 ;
4639 symbol_get_tc (list)->next = sym;
4640
4641 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4642 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4643 &symbol_lastP);
4644 }
4645
4646 ppc_current_csect = ppc_toc_csect;
4647
4648 demand_empty_rest_of_line ();
4649 }
4650
4651 /* The AIX assembler automatically aligns the operands of a .long or
4652 .short pseudo-op, and we want to be compatible. */
4653
4654 static void
4655 ppc_xcoff_cons (int log_size)
4656 {
4657 frag_align (log_size, 0, 0);
4658 record_alignment (now_seg, log_size);
4659 cons (1 << log_size);
4660 }
4661
4662 static void
4663 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4664 {
4665 expressionS exp;
4666 int byte_count;
4667
4668 (void) expression (&exp);
4669
4670 if (exp.X_op != O_constant)
4671 {
4672 as_bad (_("non-constant byte count"));
4673 return;
4674 }
4675
4676 byte_count = exp.X_add_number;
4677
4678 if (*input_line_pointer != ',')
4679 {
4680 as_bad (_("missing value"));
4681 return;
4682 }
4683
4684 ++input_line_pointer;
4685 cons (byte_count);
4686 }
4687
4688 void
4689 ppc_xcoff_end (void)
4690 {
4691 int i;
4692
4693 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4694 {
4695 struct dw_section *dws = &dw_sections[i];
4696 struct dw_subsection *dwss;
4697
4698 if (dws->anon_subseg)
4699 {
4700 dwss = dws->anon_subseg;
4701 dwss->link = dws->list_subseg;
4702 }
4703 else
4704 dwss = dws->list_subseg;
4705
4706 for (; dwss != NULL; dwss = dwss->link)
4707 if (dwss->end_exp.X_add_symbol != NULL)
4708 {
4709 subseg_set (dws->sect, dwss->subseg);
4710 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4711 }
4712 }
4713 }
4714
4715 #endif /* OBJ_XCOFF */
4716 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4717 \f
4718 /* The .tc pseudo-op. This is used when generating either XCOFF or
4719 ELF. This takes two or more arguments.
4720
4721 When generating XCOFF output, the first argument is the name to
4722 give to this location in the toc; this will be a symbol with class
4723 TC. The rest of the arguments are N-byte values to actually put at
4724 this location in the TOC; often there is just one more argument, a
4725 relocatable symbol reference. The size of the value to store
4726 depends on target word size. A 32-bit target uses 4-byte values, a
4727 64-bit target uses 8-byte values.
4728
4729 When not generating XCOFF output, the arguments are the same, but
4730 the first argument is simply ignored. */
4731
4732 static void
4733 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4734 {
4735 #ifdef OBJ_XCOFF
4736
4737 /* Define the TOC symbol name. */
4738 {
4739 char *name;
4740 char endc;
4741 symbolS *sym;
4742
4743 if (ppc_toc_csect == (symbolS *) NULL
4744 || ppc_toc_csect != ppc_current_csect)
4745 {
4746 as_bad (_(".tc not in .toc section"));
4747 ignore_rest_of_line ();
4748 return;
4749 }
4750
4751 name = input_line_pointer;
4752 endc = get_symbol_end ();
4753
4754 sym = symbol_find_or_make (name);
4755
4756 *input_line_pointer = endc;
4757
4758 if (S_IS_DEFINED (sym))
4759 {
4760 symbolS *label;
4761
4762 label = symbol_get_tc (ppc_current_csect)->within;
4763 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4764 {
4765 as_bad (_(".tc with no label"));
4766 ignore_rest_of_line ();
4767 return;
4768 }
4769
4770 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4771 symbol_set_frag (label, symbol_get_frag (sym));
4772 S_SET_VALUE (label, S_GET_VALUE (sym));
4773
4774 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4775 ++input_line_pointer;
4776
4777 return;
4778 }
4779
4780 S_SET_SEGMENT (sym, now_seg);
4781 symbol_set_frag (sym, frag_now);
4782 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4783 symbol_get_tc (sym)->symbol_class = XMC_TC;
4784 symbol_get_tc (sym)->output = 1;
4785
4786 ppc_frob_label (sym);
4787 }
4788
4789 #endif /* OBJ_XCOFF */
4790 #ifdef OBJ_ELF
4791 int align;
4792
4793 /* Skip the TOC symbol name. */
4794 while (is_part_of_name (*input_line_pointer)
4795 || *input_line_pointer == ' '
4796 || *input_line_pointer == '['
4797 || *input_line_pointer == ']'
4798 || *input_line_pointer == '{'
4799 || *input_line_pointer == '}')
4800 ++input_line_pointer;
4801
4802 /* Align to a four/eight byte boundary. */
4803 align = ppc_obj64 ? 3 : 2;
4804 frag_align (align, 0, 0);
4805 record_alignment (now_seg, align);
4806 #endif /* OBJ_ELF */
4807
4808 if (*input_line_pointer != ',')
4809 demand_empty_rest_of_line ();
4810 else
4811 {
4812 ++input_line_pointer;
4813 cons (ppc_obj64 ? 8 : 4);
4814 }
4815 }
4816
4817 /* Pseudo-op .machine. */
4818
4819 static void
4820 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4821 {
4822 char *cpu_string;
4823 #define MAX_HISTORY 100
4824 static ppc_cpu_t *cpu_history;
4825 static int curr_hist;
4826
4827 SKIP_WHITESPACE ();
4828
4829 if (*input_line_pointer == '"')
4830 {
4831 int len;
4832 cpu_string = demand_copy_C_string (&len);
4833 }
4834 else
4835 {
4836 char c;
4837 cpu_string = input_line_pointer;
4838 c = get_symbol_end ();
4839 cpu_string = xstrdup (cpu_string);
4840 *input_line_pointer = c;
4841 }
4842
4843 if (cpu_string != NULL)
4844 {
4845 ppc_cpu_t old_cpu = ppc_cpu;
4846 ppc_cpu_t new_cpu;
4847 char *p;
4848
4849 for (p = cpu_string; *p != 0; p++)
4850 *p = TOLOWER (*p);
4851
4852 if (strcmp (cpu_string, "push") == 0)
4853 {
4854 if (cpu_history == NULL)
4855 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4856
4857 if (curr_hist >= MAX_HISTORY)
4858 as_bad (_(".machine stack overflow"));
4859 else
4860 cpu_history[curr_hist++] = ppc_cpu;
4861 }
4862 else if (strcmp (cpu_string, "pop") == 0)
4863 {
4864 if (curr_hist <= 0)
4865 as_bad (_(".machine stack underflow"));
4866 else
4867 ppc_cpu = cpu_history[--curr_hist];
4868 }
4869 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4870 ppc_cpu = new_cpu;
4871 else
4872 as_bad (_("invalid machine `%s'"), cpu_string);
4873
4874 if (ppc_cpu != old_cpu)
4875 ppc_setup_opcodes ();
4876 }
4877
4878 demand_empty_rest_of_line ();
4879 }
4880 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4881 \f
4882 #ifdef TE_PE
4883
4884 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4885
4886 /* Set the current section. */
4887 static void
4888 ppc_set_current_section (segT new)
4889 {
4890 ppc_previous_section = ppc_current_section;
4891 ppc_current_section = new;
4892 }
4893
4894 /* pseudo-op: .previous
4895 behaviour: toggles the current section with the previous section.
4896 errors: None
4897 warnings: "No previous section" */
4898
4899 static void
4900 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4901 {
4902 if (ppc_previous_section == NULL)
4903 {
4904 as_warn (_("no previous section to return to, ignored."));
4905 return;
4906 }
4907
4908 subseg_set (ppc_previous_section, 0);
4909
4910 ppc_set_current_section (ppc_previous_section);
4911 }
4912
4913 /* pseudo-op: .pdata
4914 behaviour: predefined read only data section
4915 double word aligned
4916 errors: None
4917 warnings: None
4918 initial: .section .pdata "adr3"
4919 a - don't know -- maybe a misprint
4920 d - initialized data
4921 r - readable
4922 3 - double word aligned (that would be 4 byte boundary)
4923
4924 commentary:
4925 Tag index tables (also known as the function table) for exception
4926 handling, debugging, etc. */
4927
4928 static void
4929 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4930 {
4931 if (pdata_section == 0)
4932 {
4933 pdata_section = subseg_new (".pdata", 0);
4934
4935 bfd_set_section_flags (stdoutput, pdata_section,
4936 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4937 | SEC_READONLY | SEC_DATA ));
4938
4939 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4940 }
4941 else
4942 {
4943 pdata_section = subseg_new (".pdata", 0);
4944 }
4945 ppc_set_current_section (pdata_section);
4946 }
4947
4948 /* pseudo-op: .ydata
4949 behaviour: predefined read only data section
4950 double word aligned
4951 errors: None
4952 warnings: None
4953 initial: .section .ydata "drw3"
4954 a - don't know -- maybe a misprint
4955 d - initialized data
4956 r - readable
4957 3 - double word aligned (that would be 4 byte boundary)
4958 commentary:
4959 Tag tables (also known as the scope table) for exception handling,
4960 debugging, etc. */
4961
4962 static void
4963 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4964 {
4965 if (ydata_section == 0)
4966 {
4967 ydata_section = subseg_new (".ydata", 0);
4968 bfd_set_section_flags (stdoutput, ydata_section,
4969 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4970 | SEC_READONLY | SEC_DATA ));
4971
4972 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4973 }
4974 else
4975 {
4976 ydata_section = subseg_new (".ydata", 0);
4977 }
4978 ppc_set_current_section (ydata_section);
4979 }
4980
4981 /* pseudo-op: .reldata
4982 behaviour: predefined read write data section
4983 double word aligned (4-byte)
4984 FIXME: relocation is applied to it
4985 FIXME: what's the difference between this and .data?
4986 errors: None
4987 warnings: None
4988 initial: .section .reldata "drw3"
4989 d - initialized data
4990 r - readable
4991 w - writeable
4992 3 - double word aligned (that would be 8 byte boundary)
4993
4994 commentary:
4995 Like .data, but intended to hold data subject to relocation, such as
4996 function descriptors, etc. */
4997
4998 static void
4999 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5000 {
5001 if (reldata_section == 0)
5002 {
5003 reldata_section = subseg_new (".reldata", 0);
5004
5005 bfd_set_section_flags (stdoutput, reldata_section,
5006 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5007 | SEC_DATA));
5008
5009 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5010 }
5011 else
5012 {
5013 reldata_section = subseg_new (".reldata", 0);
5014 }
5015 ppc_set_current_section (reldata_section);
5016 }
5017
5018 /* pseudo-op: .rdata
5019 behaviour: predefined read only data section
5020 double word aligned
5021 errors: None
5022 warnings: None
5023 initial: .section .rdata "dr3"
5024 d - initialized data
5025 r - readable
5026 3 - double word aligned (that would be 4 byte boundary) */
5027
5028 static void
5029 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5030 {
5031 if (rdata_section == 0)
5032 {
5033 rdata_section = subseg_new (".rdata", 0);
5034 bfd_set_section_flags (stdoutput, rdata_section,
5035 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5036 | SEC_READONLY | SEC_DATA ));
5037
5038 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5039 }
5040 else
5041 {
5042 rdata_section = subseg_new (".rdata", 0);
5043 }
5044 ppc_set_current_section (rdata_section);
5045 }
5046
5047 /* pseudo-op: .ualong
5048 behaviour: much like .int, with the exception that no alignment is
5049 performed.
5050 FIXME: test the alignment statement
5051 errors: None
5052 warnings: None */
5053
5054 static void
5055 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5056 {
5057 /* Try for long. */
5058 cons (4);
5059 }
5060
5061 /* pseudo-op: .znop <symbol name>
5062 behaviour: Issue a nop instruction
5063 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5064 the supplied symbol name.
5065 errors: None
5066 warnings: Missing symbol name */
5067
5068 static void
5069 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5070 {
5071 unsigned long insn;
5072 const struct powerpc_opcode *opcode;
5073 char *f;
5074 symbolS *sym;
5075 char *symbol_name;
5076 char c;
5077 char *name;
5078
5079 /* Strip out the symbol name. */
5080 symbol_name = input_line_pointer;
5081 c = get_symbol_end ();
5082
5083 name = xmalloc (input_line_pointer - symbol_name + 1);
5084 strcpy (name, symbol_name);
5085
5086 sym = symbol_find_or_make (name);
5087
5088 *input_line_pointer = c;
5089
5090 SKIP_WHITESPACE ();
5091
5092 /* Look up the opcode in the hash table. */
5093 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5094
5095 /* Stick in the nop. */
5096 insn = opcode->opcode;
5097
5098 /* Write out the instruction. */
5099 f = frag_more (4);
5100 md_number_to_chars (f, insn, 4);
5101 fix_new (frag_now,
5102 f - frag_now->fr_literal,
5103 4,
5104 sym,
5105 0,
5106 0,
5107 BFD_RELOC_16_GOT_PCREL);
5108
5109 }
5110
5111 /* pseudo-op:
5112 behaviour:
5113 errors:
5114 warnings: */
5115
5116 static void
5117 ppc_pe_comm (int lcomm)
5118 {
5119 char *name;
5120 char c;
5121 char *p;
5122 offsetT temp;
5123 symbolS *symbolP;
5124 offsetT align;
5125
5126 name = input_line_pointer;
5127 c = get_symbol_end ();
5128
5129 /* just after name is now '\0'. */
5130 p = input_line_pointer;
5131 *p = c;
5132 SKIP_WHITESPACE ();
5133 if (*input_line_pointer != ',')
5134 {
5135 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5136 ignore_rest_of_line ();
5137 return;
5138 }
5139
5140 input_line_pointer++; /* skip ',' */
5141 if ((temp = get_absolute_expression ()) < 0)
5142 {
5143 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5144 ignore_rest_of_line ();
5145 return;
5146 }
5147
5148 if (! lcomm)
5149 {
5150 /* The third argument to .comm is the alignment. */
5151 if (*input_line_pointer != ',')
5152 align = 3;
5153 else
5154 {
5155 ++input_line_pointer;
5156 align = get_absolute_expression ();
5157 if (align <= 0)
5158 {
5159 as_warn (_("ignoring bad alignment"));
5160 align = 3;
5161 }
5162 }
5163 }
5164
5165 *p = 0;
5166 symbolP = symbol_find_or_make (name);
5167
5168 *p = c;
5169 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5170 {
5171 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5172 S_GET_NAME (symbolP));
5173 ignore_rest_of_line ();
5174 return;
5175 }
5176
5177 if (S_GET_VALUE (symbolP))
5178 {
5179 if (S_GET_VALUE (symbolP) != (valueT) temp)
5180 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5181 S_GET_NAME (symbolP),
5182 (long) S_GET_VALUE (symbolP),
5183 (long) temp);
5184 }
5185 else
5186 {
5187 S_SET_VALUE (symbolP, (valueT) temp);
5188 S_SET_EXTERNAL (symbolP);
5189 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5190 }
5191
5192 demand_empty_rest_of_line ();
5193 }
5194
5195 /*
5196 * implement the .section pseudo op:
5197 * .section name {, "flags"}
5198 * ^ ^
5199 * | +--- optional flags: 'b' for bss
5200 * | 'i' for info
5201 * +-- section name 'l' for lib
5202 * 'n' for noload
5203 * 'o' for over
5204 * 'w' for data
5205 * 'd' (apparently m88k for data)
5206 * 'x' for text
5207 * But if the argument is not a quoted string, treat it as a
5208 * subsegment number.
5209 *
5210 * FIXME: this is a copy of the section processing from obj-coff.c, with
5211 * additions/changes for the moto-pas assembler support. There are three
5212 * categories:
5213 *
5214 * FIXME: I just noticed this. This doesn't work at all really. It it
5215 * setting bits that bfd probably neither understands or uses. The
5216 * correct approach (?) will have to incorporate extra fields attached
5217 * to the section to hold the system specific stuff. (krk)
5218 *
5219 * Section Contents:
5220 * 'a' - unknown - referred to in documentation, but no definition supplied
5221 * 'c' - section has code
5222 * 'd' - section has initialized data
5223 * 'u' - section has uninitialized data
5224 * 'i' - section contains directives (info)
5225 * 'n' - section can be discarded
5226 * 'R' - remove section at link time
5227 *
5228 * Section Protection:
5229 * 'r' - section is readable
5230 * 'w' - section is writeable
5231 * 'x' - section is executable
5232 * 's' - section is sharable
5233 *
5234 * Section Alignment:
5235 * '0' - align to byte boundary
5236 * '1' - align to halfword undary
5237 * '2' - align to word boundary
5238 * '3' - align to doubleword boundary
5239 * '4' - align to quadword boundary
5240 * '5' - align to 32 byte boundary
5241 * '6' - align to 64 byte boundary
5242 *
5243 */
5244
5245 void
5246 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5247 {
5248 /* Strip out the section name. */
5249 char *section_name;
5250 char c;
5251 char *name;
5252 unsigned int exp;
5253 flagword flags;
5254 segT sec;
5255 int align;
5256
5257 section_name = input_line_pointer;
5258 c = get_symbol_end ();
5259
5260 name = xmalloc (input_line_pointer - section_name + 1);
5261 strcpy (name, section_name);
5262
5263 *input_line_pointer = c;
5264
5265 SKIP_WHITESPACE ();
5266
5267 exp = 0;
5268 flags = SEC_NO_FLAGS;
5269
5270 if (strcmp (name, ".idata$2") == 0)
5271 {
5272 align = 0;
5273 }
5274 else if (strcmp (name, ".idata$3") == 0)
5275 {
5276 align = 0;
5277 }
5278 else if (strcmp (name, ".idata$4") == 0)
5279 {
5280 align = 2;
5281 }
5282 else if (strcmp (name, ".idata$5") == 0)
5283 {
5284 align = 2;
5285 }
5286 else if (strcmp (name, ".idata$6") == 0)
5287 {
5288 align = 1;
5289 }
5290 else
5291 /* Default alignment to 16 byte boundary. */
5292 align = 4;
5293
5294 if (*input_line_pointer == ',')
5295 {
5296 ++input_line_pointer;
5297 SKIP_WHITESPACE ();
5298 if (*input_line_pointer != '"')
5299 exp = get_absolute_expression ();
5300 else
5301 {
5302 ++input_line_pointer;
5303 while (*input_line_pointer != '"'
5304 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5305 {
5306 switch (*input_line_pointer)
5307 {
5308 /* Section Contents */
5309 case 'a': /* unknown */
5310 as_bad (_("unsupported section attribute -- 'a'"));
5311 break;
5312 case 'c': /* code section */
5313 flags |= SEC_CODE;
5314 break;
5315 case 'd': /* section has initialized data */
5316 flags |= SEC_DATA;
5317 break;
5318 case 'u': /* section has uninitialized data */
5319 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5320 in winnt.h */
5321 flags |= SEC_ROM;
5322 break;
5323 case 'i': /* section contains directives (info) */
5324 /* FIXME: This is IMAGE_SCN_LNK_INFO
5325 in winnt.h */
5326 flags |= SEC_HAS_CONTENTS;
5327 break;
5328 case 'n': /* section can be discarded */
5329 flags &=~ SEC_LOAD;
5330 break;
5331 case 'R': /* Remove section at link time */
5332 flags |= SEC_NEVER_LOAD;
5333 break;
5334 #if IFLICT_BRAIN_DAMAGE
5335 /* Section Protection */
5336 case 'r': /* section is readable */
5337 flags |= IMAGE_SCN_MEM_READ;
5338 break;
5339 case 'w': /* section is writeable */
5340 flags |= IMAGE_SCN_MEM_WRITE;
5341 break;
5342 case 'x': /* section is executable */
5343 flags |= IMAGE_SCN_MEM_EXECUTE;
5344 break;
5345 case 's': /* section is sharable */
5346 flags |= IMAGE_SCN_MEM_SHARED;
5347 break;
5348
5349 /* Section Alignment */
5350 case '0': /* align to byte boundary */
5351 flags |= IMAGE_SCN_ALIGN_1BYTES;
5352 align = 0;
5353 break;
5354 case '1': /* align to halfword boundary */
5355 flags |= IMAGE_SCN_ALIGN_2BYTES;
5356 align = 1;
5357 break;
5358 case '2': /* align to word boundary */
5359 flags |= IMAGE_SCN_ALIGN_4BYTES;
5360 align = 2;
5361 break;
5362 case '3': /* align to doubleword boundary */
5363 flags |= IMAGE_SCN_ALIGN_8BYTES;
5364 align = 3;
5365 break;
5366 case '4': /* align to quadword boundary */
5367 flags |= IMAGE_SCN_ALIGN_16BYTES;
5368 align = 4;
5369 break;
5370 case '5': /* align to 32 byte boundary */
5371 flags |= IMAGE_SCN_ALIGN_32BYTES;
5372 align = 5;
5373 break;
5374 case '6': /* align to 64 byte boundary */
5375 flags |= IMAGE_SCN_ALIGN_64BYTES;
5376 align = 6;
5377 break;
5378 #endif
5379 default:
5380 as_bad (_("unknown section attribute '%c'"),
5381 *input_line_pointer);
5382 break;
5383 }
5384 ++input_line_pointer;
5385 }
5386 if (*input_line_pointer == '"')
5387 ++input_line_pointer;
5388 }
5389 }
5390
5391 sec = subseg_new (name, (subsegT) exp);
5392
5393 ppc_set_current_section (sec);
5394
5395 if (flags != SEC_NO_FLAGS)
5396 {
5397 if (! bfd_set_section_flags (stdoutput, sec, flags))
5398 as_bad (_("error setting flags for \"%s\": %s"),
5399 bfd_section_name (stdoutput, sec),
5400 bfd_errmsg (bfd_get_error ()));
5401 }
5402
5403 bfd_set_section_alignment (stdoutput, sec, align);
5404 }
5405
5406 static void
5407 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5408 {
5409 char *name;
5410 char endc;
5411 symbolS *ext_sym;
5412
5413 name = input_line_pointer;
5414 endc = get_symbol_end ();
5415
5416 ext_sym = symbol_find_or_make (name);
5417
5418 *input_line_pointer = endc;
5419
5420 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5421 SF_SET_FUNCTION (ext_sym);
5422 SF_SET_PROCESS (ext_sym);
5423 coff_add_linesym (ext_sym);
5424
5425 demand_empty_rest_of_line ();
5426 }
5427
5428 static void
5429 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5430 {
5431 if (tocdata_section == 0)
5432 {
5433 tocdata_section = subseg_new (".tocd", 0);
5434 /* FIXME: section flags won't work. */
5435 bfd_set_section_flags (stdoutput, tocdata_section,
5436 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5437 | SEC_READONLY | SEC_DATA));
5438
5439 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5440 }
5441 else
5442 {
5443 rdata_section = subseg_new (".tocd", 0);
5444 }
5445
5446 ppc_set_current_section (tocdata_section);
5447
5448 demand_empty_rest_of_line ();
5449 }
5450
5451 /* Don't adjust TOC relocs to use the section symbol. */
5452
5453 int
5454 ppc_pe_fix_adjustable (fixS *fix)
5455 {
5456 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5457 }
5458
5459 #endif
5460 \f
5461 #ifdef OBJ_XCOFF
5462
5463 /* XCOFF specific symbol and file handling. */
5464
5465 /* Canonicalize the symbol name. We use the to force the suffix, if
5466 any, to use square brackets, and to be in upper case. */
5467
5468 char *
5469 ppc_canonicalize_symbol_name (char *name)
5470 {
5471 char *s;
5472
5473 if (ppc_stab_symbol)
5474 return name;
5475
5476 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5477 ;
5478 if (*s != '\0')
5479 {
5480 char brac;
5481
5482 if (*s == '[')
5483 brac = ']';
5484 else
5485 {
5486 *s = '[';
5487 brac = '}';
5488 }
5489
5490 for (s++; *s != '\0' && *s != brac; s++)
5491 *s = TOUPPER (*s);
5492
5493 if (*s == '\0' || s[1] != '\0')
5494 as_bad (_("bad symbol suffix"));
5495
5496 *s = ']';
5497 }
5498
5499 return name;
5500 }
5501
5502 /* Set the class of a symbol based on the suffix, if any. This is
5503 called whenever a new symbol is created. */
5504
5505 void
5506 ppc_symbol_new_hook (symbolS *sym)
5507 {
5508 struct ppc_tc_sy *tc;
5509 const char *s;
5510
5511 tc = symbol_get_tc (sym);
5512 tc->next = NULL;
5513 tc->output = 0;
5514 tc->symbol_class = -1;
5515 tc->real_name = NULL;
5516 tc->subseg = 0;
5517 tc->align = 0;
5518 tc->u.size = NULL;
5519 tc->u.dw = NULL;
5520 tc->within = NULL;
5521
5522 if (ppc_stab_symbol)
5523 return;
5524
5525 s = strchr (S_GET_NAME (sym), '[');
5526 if (s == (const char *) NULL)
5527 {
5528 /* There is no suffix. */
5529 return;
5530 }
5531
5532 ++s;
5533
5534 switch (s[0])
5535 {
5536 case 'B':
5537 if (strcmp (s, "BS]") == 0)
5538 tc->symbol_class = XMC_BS;
5539 break;
5540 case 'D':
5541 if (strcmp (s, "DB]") == 0)
5542 tc->symbol_class = XMC_DB;
5543 else if (strcmp (s, "DS]") == 0)
5544 tc->symbol_class = XMC_DS;
5545 break;
5546 case 'G':
5547 if (strcmp (s, "GL]") == 0)
5548 tc->symbol_class = XMC_GL;
5549 break;
5550 case 'P':
5551 if (strcmp (s, "PR]") == 0)
5552 tc->symbol_class = XMC_PR;
5553 break;
5554 case 'R':
5555 if (strcmp (s, "RO]") == 0)
5556 tc->symbol_class = XMC_RO;
5557 else if (strcmp (s, "RW]") == 0)
5558 tc->symbol_class = XMC_RW;
5559 break;
5560 case 'S':
5561 if (strcmp (s, "SV]") == 0)
5562 tc->symbol_class = XMC_SV;
5563 break;
5564 case 'T':
5565 if (strcmp (s, "TC]") == 0)
5566 tc->symbol_class = XMC_TC;
5567 else if (strcmp (s, "TI]") == 0)
5568 tc->symbol_class = XMC_TI;
5569 else if (strcmp (s, "TB]") == 0)
5570 tc->symbol_class = XMC_TB;
5571 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5572 tc->symbol_class = XMC_TC0;
5573 break;
5574 case 'U':
5575 if (strcmp (s, "UA]") == 0)
5576 tc->symbol_class = XMC_UA;
5577 else if (strcmp (s, "UC]") == 0)
5578 tc->symbol_class = XMC_UC;
5579 break;
5580 case 'X':
5581 if (strcmp (s, "XO]") == 0)
5582 tc->symbol_class = XMC_XO;
5583 break;
5584 }
5585
5586 if (tc->symbol_class == -1)
5587 as_bad (_("unrecognized symbol suffix"));
5588 }
5589
5590 /* Set the class of a label based on where it is defined. This
5591 handles symbols without suffixes. Also, move the symbol so that it
5592 follows the csect symbol. */
5593
5594 void
5595 ppc_frob_label (symbolS *sym)
5596 {
5597 if (ppc_current_csect != (symbolS *) NULL)
5598 {
5599 if (symbol_get_tc (sym)->symbol_class == -1)
5600 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5601
5602 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5603 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5604 &symbol_rootP, &symbol_lastP);
5605 symbol_get_tc (ppc_current_csect)->within = sym;
5606 symbol_get_tc (sym)->within = ppc_current_csect;
5607 }
5608
5609 #ifdef OBJ_ELF
5610 dwarf2_emit_label (sym);
5611 #endif
5612 }
5613
5614 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5615 seen. It tells ppc_adjust_symtab whether it needs to look through
5616 the symbols. */
5617
5618 static bfd_boolean ppc_saw_abs;
5619
5620 /* Change the name of a symbol just before writing it out. Set the
5621 real name if the .rename pseudo-op was used. Otherwise, remove any
5622 class suffix. Return 1 if the symbol should not be included in the
5623 symbol table. */
5624
5625 int
5626 ppc_frob_symbol (symbolS *sym)
5627 {
5628 static symbolS *ppc_last_function;
5629 static symbolS *set_end;
5630
5631 /* Discard symbols that should not be included in the output symbol
5632 table. */
5633 if (! symbol_used_in_reloc_p (sym)
5634 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5635 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5636 && ! symbol_get_tc (sym)->output
5637 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5638 return 1;
5639
5640 /* This one will disappear anyway. Don't make a csect sym for it. */
5641 if (sym == abs_section_sym)
5642 return 1;
5643
5644 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5645 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5646 else
5647 {
5648 const char *name;
5649 const char *s;
5650
5651 name = S_GET_NAME (sym);
5652 s = strchr (name, '[');
5653 if (s != (char *) NULL)
5654 {
5655 unsigned int len;
5656 char *snew;
5657
5658 len = s - name;
5659 snew = xmalloc (len + 1);
5660 memcpy (snew, name, len);
5661 snew[len] = '\0';
5662
5663 S_SET_NAME (sym, snew);
5664 }
5665 }
5666
5667 if (set_end != (symbolS *) NULL)
5668 {
5669 SA_SET_SYM_ENDNDX (set_end, sym);
5670 set_end = NULL;
5671 }
5672
5673 if (SF_GET_FUNCTION (sym))
5674 {
5675 if (ppc_last_function != (symbolS *) NULL)
5676 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5677 ppc_last_function = sym;
5678 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5679 {
5680 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5681 SA_SET_SYM_FSIZE (sym,
5682 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5683 }
5684 }
5685 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5686 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5687 {
5688 if (ppc_last_function == (symbolS *) NULL)
5689 as_bad (_(".ef with no preceding .function"));
5690 else
5691 {
5692 set_end = ppc_last_function;
5693 ppc_last_function = NULL;
5694
5695 /* We don't have a C_EFCN symbol, but we need to force the
5696 COFF backend to believe that it has seen one. */
5697 coff_last_function = NULL;
5698 }
5699 }
5700
5701 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5702 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5703 && S_GET_STORAGE_CLASS (sym) != C_FILE
5704 && S_GET_STORAGE_CLASS (sym) != C_FCN
5705 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5706 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5707 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5708 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5709 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5710 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5711 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5712
5713 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5714 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5715 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5716 {
5717 int i;
5718 union internal_auxent *a;
5719
5720 /* Create a csect aux. */
5721 i = S_GET_NUMBER_AUXILIARY (sym);
5722 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5723 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5724 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5725 {
5726 /* This is the TOC table. */
5727 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5728 a->x_csect.x_scnlen.l = 0;
5729 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5730 }
5731 else if (symbol_get_tc (sym)->subseg != 0)
5732 {
5733 /* This is a csect symbol. x_scnlen is the size of the
5734 csect. */
5735 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5736 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5737 S_GET_SEGMENT (sym))
5738 - S_GET_VALUE (sym));
5739 else
5740 {
5741 resolve_symbol_value (symbol_get_tc (sym)->next);
5742 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5743 - S_GET_VALUE (sym));
5744 }
5745 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5746 }
5747 else if (S_GET_SEGMENT (sym) == bss_section)
5748 {
5749 /* This is a common symbol. */
5750 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5751 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5752 if (S_IS_EXTERNAL (sym))
5753 symbol_get_tc (sym)->symbol_class = XMC_RW;
5754 else
5755 symbol_get_tc (sym)->symbol_class = XMC_BS;
5756 }
5757 else if (S_GET_SEGMENT (sym) == absolute_section)
5758 {
5759 /* This is an absolute symbol. The csect will be created by
5760 ppc_adjust_symtab. */
5761 ppc_saw_abs = TRUE;
5762 a->x_csect.x_smtyp = XTY_LD;
5763 if (symbol_get_tc (sym)->symbol_class == -1)
5764 symbol_get_tc (sym)->symbol_class = XMC_XO;
5765 }
5766 else if (! S_IS_DEFINED (sym))
5767 {
5768 /* This is an external symbol. */
5769 a->x_csect.x_scnlen.l = 0;
5770 a->x_csect.x_smtyp = XTY_ER;
5771 }
5772 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5773 {
5774 symbolS *next;
5775
5776 /* This is a TOC definition. x_scnlen is the size of the
5777 TOC entry. */
5778 next = symbol_next (sym);
5779 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5780 next = symbol_next (next);
5781 if (next == (symbolS *) NULL
5782 || symbol_get_tc (next)->symbol_class != XMC_TC)
5783 {
5784 if (ppc_after_toc_frag == (fragS *) NULL)
5785 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5786 data_section)
5787 - S_GET_VALUE (sym));
5788 else
5789 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5790 - S_GET_VALUE (sym));
5791 }
5792 else
5793 {
5794 resolve_symbol_value (next);
5795 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5796 - S_GET_VALUE (sym));
5797 }
5798 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5799 }
5800 else
5801 {
5802 symbolS *csect;
5803
5804 /* This is a normal symbol definition. x_scnlen is the
5805 symbol index of the containing csect. */
5806 if (S_GET_SEGMENT (sym) == text_section)
5807 csect = ppc_text_csects;
5808 else if (S_GET_SEGMENT (sym) == data_section)
5809 csect = ppc_data_csects;
5810 else
5811 abort ();
5812
5813 /* Skip the initial dummy symbol. */
5814 csect = symbol_get_tc (csect)->next;
5815
5816 if (csect == (symbolS *) NULL)
5817 {
5818 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5819 a->x_csect.x_scnlen.l = 0;
5820 }
5821 else
5822 {
5823 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5824 {
5825 resolve_symbol_value (symbol_get_tc (csect)->next);
5826 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5827 > S_GET_VALUE (sym))
5828 break;
5829 csect = symbol_get_tc (csect)->next;
5830 }
5831
5832 a->x_csect.x_scnlen.p =
5833 coffsymbol (symbol_get_bfdsym (csect))->native;
5834 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5835 1;
5836 }
5837 a->x_csect.x_smtyp = XTY_LD;
5838 }
5839
5840 a->x_csect.x_parmhash = 0;
5841 a->x_csect.x_snhash = 0;
5842 if (symbol_get_tc (sym)->symbol_class == -1)
5843 a->x_csect.x_smclas = XMC_PR;
5844 else
5845 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5846 a->x_csect.x_stab = 0;
5847 a->x_csect.x_snstab = 0;
5848
5849 /* Don't let the COFF backend resort these symbols. */
5850 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5851 }
5852 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5853 {
5854 /* We want the value to be the symbol index of the referenced
5855 csect symbol. BFD will do that for us if we set the right
5856 flags. */
5857 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5858 combined_entry_type *c = coffsymbol (bsym)->native;
5859
5860 S_SET_VALUE (sym, (valueT) (size_t) c);
5861 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5862 }
5863 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5864 {
5865 symbolS *block;
5866 valueT base;
5867
5868 block = symbol_get_tc (sym)->within;
5869 if (block)
5870 {
5871 /* The value is the offset from the enclosing csect. */
5872 symbolS *csect;
5873
5874 csect = symbol_get_tc (block)->within;
5875 resolve_symbol_value (csect);
5876 base = S_GET_VALUE (csect);
5877 }
5878 else
5879 base = 0;
5880
5881 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5882 }
5883 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5884 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5885 {
5886 /* We want the value to be a file offset into the line numbers.
5887 BFD will do that for us if we set the right flags. We have
5888 already set the value correctly. */
5889 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5890 }
5891
5892 return 0;
5893 }
5894
5895 /* Adjust the symbol table. This creates csect symbols for all
5896 absolute symbols. */
5897
5898 void
5899 ppc_adjust_symtab (void)
5900 {
5901 symbolS *sym;
5902
5903 if (! ppc_saw_abs)
5904 return;
5905
5906 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5907 {
5908 symbolS *csect;
5909 int i;
5910 union internal_auxent *a;
5911
5912 if (S_GET_SEGMENT (sym) != absolute_section)
5913 continue;
5914
5915 csect = symbol_create (".abs[XO]", absolute_section,
5916 S_GET_VALUE (sym), &zero_address_frag);
5917 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5918 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5919 i = S_GET_NUMBER_AUXILIARY (csect);
5920 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5921 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5922 a->x_csect.x_scnlen.l = 0;
5923 a->x_csect.x_smtyp = XTY_SD;
5924 a->x_csect.x_parmhash = 0;
5925 a->x_csect.x_snhash = 0;
5926 a->x_csect.x_smclas = XMC_XO;
5927 a->x_csect.x_stab = 0;
5928 a->x_csect.x_snstab = 0;
5929
5930 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5931
5932 i = S_GET_NUMBER_AUXILIARY (sym);
5933 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5934 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5935 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5936 }
5937
5938 ppc_saw_abs = FALSE;
5939 }
5940
5941 /* Set the VMA for a section. This is called on all the sections in
5942 turn. */
5943
5944 void
5945 ppc_frob_section (asection *sec)
5946 {
5947 static bfd_vma vma = 0;
5948
5949 /* Dwarf sections start at 0. */
5950 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5951 return;
5952
5953 vma = md_section_align (sec, vma);
5954 bfd_set_section_vma (stdoutput, sec, vma);
5955 vma += bfd_section_size (stdoutput, sec);
5956 }
5957
5958 #endif /* OBJ_XCOFF */
5959 \f
5960 char *
5961 md_atof (int type, char *litp, int *sizep)
5962 {
5963 return ieee_md_atof (type, litp, sizep, target_big_endian);
5964 }
5965
5966 /* Write a value out to the object file, using the appropriate
5967 endianness. */
5968
5969 void
5970 md_number_to_chars (char *buf, valueT val, int n)
5971 {
5972 if (target_big_endian)
5973 number_to_chars_bigendian (buf, val, n);
5974 else
5975 number_to_chars_littleendian (buf, val, n);
5976 }
5977
5978 /* Align a section (I don't know why this is machine dependent). */
5979
5980 valueT
5981 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5982 {
5983 #ifdef OBJ_ELF
5984 return addr;
5985 #else
5986 int align = bfd_get_section_alignment (stdoutput, seg);
5987
5988 return ((addr + (1 << align) - 1) & (-1 << align));
5989 #endif
5990 }
5991
5992 /* We don't have any form of relaxing. */
5993
5994 int
5995 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5996 asection *seg ATTRIBUTE_UNUSED)
5997 {
5998 abort ();
5999 return 0;
6000 }
6001
6002 /* Convert a machine dependent frag. We never generate these. */
6003
6004 void
6005 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6006 asection *sec ATTRIBUTE_UNUSED,
6007 fragS *fragp ATTRIBUTE_UNUSED)
6008 {
6009 abort ();
6010 }
6011
6012 /* We have no need to default values of symbols. */
6013
6014 symbolS *
6015 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6016 {
6017 return 0;
6018 }
6019 \f
6020 /* Functions concerning relocs. */
6021
6022 /* The location from which a PC relative jump should be calculated,
6023 given a PC relative reloc. */
6024
6025 long
6026 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6027 {
6028 return fixp->fx_frag->fr_address + fixp->fx_where;
6029 }
6030
6031 #ifdef OBJ_XCOFF
6032
6033 /* This is called to see whether a fixup should be adjusted to use a
6034 section symbol. We take the opportunity to change a fixup against
6035 a symbol in the TOC subsegment into a reloc against the
6036 corresponding .tc symbol. */
6037
6038 int
6039 ppc_fix_adjustable (fixS *fix)
6040 {
6041 valueT val = resolve_symbol_value (fix->fx_addsy);
6042 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6043 TC_SYMFIELD_TYPE *tc;
6044
6045 if (symseg == absolute_section)
6046 return 0;
6047
6048 /* Always adjust symbols in debugging sections. */
6049 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6050 return 1;
6051
6052 if (ppc_toc_csect != (symbolS *) NULL
6053 && fix->fx_addsy != ppc_toc_csect
6054 && symseg == data_section
6055 && val >= ppc_toc_frag->fr_address
6056 && (ppc_after_toc_frag == (fragS *) NULL
6057 || val < ppc_after_toc_frag->fr_address))
6058 {
6059 symbolS *sy;
6060
6061 for (sy = symbol_next (ppc_toc_csect);
6062 sy != (symbolS *) NULL;
6063 sy = symbol_next (sy))
6064 {
6065 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6066
6067 if (sy_tc->symbol_class == XMC_TC0)
6068 continue;
6069 if (sy_tc->symbol_class != XMC_TC)
6070 break;
6071 if (val == resolve_symbol_value (sy))
6072 {
6073 fix->fx_addsy = sy;
6074 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6075 return 0;
6076 }
6077 }
6078
6079 as_bad_where (fix->fx_file, fix->fx_line,
6080 _("symbol in .toc does not match any .tc"));
6081 }
6082
6083 /* Possibly adjust the reloc to be against the csect. */
6084 tc = symbol_get_tc (fix->fx_addsy);
6085 if (tc->subseg == 0
6086 && tc->symbol_class != XMC_TC0
6087 && tc->symbol_class != XMC_TC
6088 && symseg != bss_section
6089 /* Don't adjust if this is a reloc in the toc section. */
6090 && (symseg != data_section
6091 || ppc_toc_csect == NULL
6092 || val < ppc_toc_frag->fr_address
6093 || (ppc_after_toc_frag != NULL
6094 && val >= ppc_after_toc_frag->fr_address)))
6095 {
6096 symbolS *csect = tc->within;
6097
6098 /* If the symbol was not declared by a label (eg: a section symbol),
6099 use the section instead of the csect. This doesn't happen in
6100 normal AIX assembly code. */
6101 if (csect == NULL)
6102 csect = seg_info (symseg)->sym;
6103
6104 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6105 fix->fx_addsy = csect;
6106
6107 return 0;
6108 }
6109
6110 /* Adjust a reloc against a .lcomm symbol to be against the base
6111 .lcomm. */
6112 if (symseg == bss_section
6113 && ! S_IS_EXTERNAL (fix->fx_addsy))
6114 {
6115 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6116
6117 fix->fx_offset += val - resolve_symbol_value (sy);
6118 fix->fx_addsy = sy;
6119 }
6120
6121 return 0;
6122 }
6123
6124 /* A reloc from one csect to another must be kept. The assembler
6125 will, of course, keep relocs between sections, and it will keep
6126 absolute relocs, but we need to force it to keep PC relative relocs
6127 between two csects in the same section. */
6128
6129 int
6130 ppc_force_relocation (fixS *fix)
6131 {
6132 /* At this point fix->fx_addsy should already have been converted to
6133 a csect symbol. If the csect does not include the fragment, then
6134 we need to force the relocation. */
6135 if (fix->fx_pcrel
6136 && fix->fx_addsy != NULL
6137 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6138 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6139 > fix->fx_frag->fr_address)
6140 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6141 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6142 <= fix->fx_frag->fr_address))))
6143 return 1;
6144
6145 return generic_force_reloc (fix);
6146 }
6147
6148 void
6149 ppc_new_dot_label (symbolS *sym)
6150 {
6151 /* Anchor this label to the current csect for relocations. */
6152 symbol_get_tc (sym)->within = ppc_current_csect;
6153 }
6154
6155 #endif /* OBJ_XCOFF */
6156
6157 #ifdef OBJ_ELF
6158 /* If this function returns non-zero, it guarantees that a relocation
6159 will be emitted for a fixup. */
6160
6161 int
6162 ppc_force_relocation (fixS *fix)
6163 {
6164 /* Branch prediction relocations must force a relocation, as must
6165 the vtable description relocs. */
6166 switch (fix->fx_r_type)
6167 {
6168 case BFD_RELOC_PPC_B16_BRTAKEN:
6169 case BFD_RELOC_PPC_B16_BRNTAKEN:
6170 case BFD_RELOC_PPC_BA16_BRTAKEN:
6171 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6172 case BFD_RELOC_24_PLT_PCREL:
6173 case BFD_RELOC_PPC64_TOC:
6174 return 1;
6175 default:
6176 break;
6177 }
6178
6179 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6180 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6181 return 1;
6182
6183 return generic_force_reloc (fix);
6184 }
6185
6186 int
6187 ppc_fix_adjustable (fixS *fix)
6188 {
6189 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6190 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6191 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6192 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6193 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6194 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6195 && fix->fx_r_type != BFD_RELOC_GPREL16
6196 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6197 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6198 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6199 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6200 }
6201 #endif
6202
6203 void
6204 ppc_frag_check (struct frag *fragP)
6205 {
6206 if (!fragP->has_code)
6207 return;
6208
6209 if (ppc_mach() == bfd_mach_ppc_vle)
6210 {
6211 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6212 as_bad (_("instruction address is not a multiple of 2"));
6213 }
6214 else
6215 {
6216 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6217 as_bad (_("instruction address is not a multiple of 4"));
6218 }
6219 }
6220
6221 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6222 rs_align_code frag. */
6223
6224 void
6225 ppc_handle_align (struct frag *fragP)
6226 {
6227 valueT count = (fragP->fr_next->fr_address
6228 - (fragP->fr_address + fragP->fr_fix));
6229
6230 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6231 {
6232 char *dest = fragP->fr_literal + fragP->fr_fix;
6233
6234 fragP->fr_var = 2;
6235 md_number_to_chars (dest, 0x4400, 2);
6236 }
6237 else if (count != 0 && (count & 3) == 0)
6238 {
6239 char *dest = fragP->fr_literal + fragP->fr_fix;
6240
6241 fragP->fr_var = 4;
6242
6243 if (count > 4 * nop_limit && count < 0x2000000)
6244 {
6245 struct frag *rest;
6246
6247 /* Make a branch, then follow with nops. Insert another
6248 frag to handle the nops. */
6249 md_number_to_chars (dest, 0x48000000 + count, 4);
6250 count -= 4;
6251 if (count == 0)
6252 return;
6253
6254 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6255 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6256 fragP->fr_next = rest;
6257 fragP = rest;
6258 rest->fr_address += rest->fr_fix + 4;
6259 rest->fr_fix = 0;
6260 /* If we leave the next frag as rs_align_code we'll come here
6261 again, resulting in a bunch of branches rather than a
6262 branch followed by nops. */
6263 rest->fr_type = rs_align;
6264 dest = rest->fr_literal;
6265 }
6266
6267 md_number_to_chars (dest, 0x60000000, 4);
6268
6269 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6270 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6271 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6272 {
6273 /* For power6, power7 and power8, we want the last nop to be a group
6274 terminating one. Do this by inserting an rs_fill frag immediately
6275 after this one, with its address set to the last nop location.
6276 This will automatically reduce the number of nops in the current
6277 frag by one. */
6278 if (count > 4)
6279 {
6280 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6281
6282 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6283 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6284 group_nop->fr_fix = 0;
6285 group_nop->fr_offset = 1;
6286 group_nop->fr_type = rs_fill;
6287 fragP->fr_next = group_nop;
6288 dest = group_nop->fr_literal;
6289 }
6290
6291 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6292 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6293 {
6294 if (ppc_cpu & PPC_OPCODE_E500MC)
6295 /* e500mc group terminating nop: "ori 0,0,0". */
6296 md_number_to_chars (dest, 0x60000000, 4);
6297 else
6298 /* power7/power8 group terminating nop: "ori 2,2,0". */
6299 md_number_to_chars (dest, 0x60420000, 4);
6300 }
6301 else
6302 /* power6 group terminating nop: "ori 1,1,0". */
6303 md_number_to_chars (dest, 0x60210000, 4);
6304 }
6305 }
6306 }
6307
6308 /* Apply a fixup to the object code. This is called for all the
6309 fixups we generated by the calls to fix_new_exp, above. */
6310
6311 void
6312 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
6313 {
6314 valueT value = * valP;
6315
6316 #ifdef OBJ_ELF
6317 if (fixP->fx_addsy != NULL)
6318 {
6319 /* Hack around bfd_install_relocation brain damage. */
6320 if (fixP->fx_pcrel)
6321 value += fixP->fx_frag->fr_address + fixP->fx_where;
6322 }
6323 else
6324 fixP->fx_done = 1;
6325 #else
6326 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6327 the symbol values. If we are doing this relocation the code in
6328 write.c is going to call bfd_install_relocation, which is also
6329 going to use the symbol value. That means that if the reloc is
6330 fully resolved we want to use *valP since bfd_install_relocation is
6331 not being used.
6332 However, if the reloc is not fully resolved we do not want to
6333 use *valP, and must use fx_offset instead. If the relocation
6334 is PC-relative, we then need to re-apply md_pcrel_from_section
6335 to this new relocation value. */
6336 if (fixP->fx_addsy == (symbolS *) NULL)
6337 fixP->fx_done = 1;
6338
6339 else
6340 {
6341 value = fixP->fx_offset;
6342 if (fixP->fx_pcrel)
6343 value -= md_pcrel_from_section (fixP, seg);
6344 }
6345 #endif
6346
6347 if (fixP->fx_subsy != (symbolS *) NULL)
6348 {
6349 /* We can't actually support subtracting a symbol. */
6350 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6351 }
6352
6353 if (fixP->fx_pcrel_adjust != 0)
6354 {
6355 /* Handle relocs in an insn. */
6356
6357 int opindex = fixP->fx_pcrel_adjust & 0xff;
6358 const struct powerpc_operand *operand = &powerpc_operands[opindex];
6359 char *where;
6360 unsigned long insn;
6361 offsetT fieldval;
6362
6363 #ifdef OBJ_XCOFF
6364 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6365 does not generate a reloc. It uses the offset of `sym' within its
6366 csect. Other usages, such as `.long sym', generate relocs. This
6367 is the documented behaviour of non-TOC symbols. */
6368 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6369 && (operand->bitm & 0xfff0) == 0xfff0
6370 && operand->shift == 0
6371 && (operand->insert == NULL || ppc_obj64)
6372 && fixP->fx_addsy != NULL
6373 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6374 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6375 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6376 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6377 {
6378 value = fixP->fx_offset;
6379 fixP->fx_done = 1;
6380 }
6381 #endif
6382 fieldval = value;
6383 switch (fixP->fx_r_type)
6384 {
6385 #ifdef OBJ_ELF
6386 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6387 if (fixP->fx_pcrel)
6388 goto bad_pcrel;
6389 /* fall through */
6390 #endif
6391 case BFD_RELOC_LO16:
6392 if (fixP->fx_pcrel)
6393 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6394 /* fall through */
6395 case BFD_RELOC_LO16_PCREL:
6396 fieldval = SEX16 (value);
6397 break;
6398
6399 case BFD_RELOC_HI16:
6400 if (fixP->fx_pcrel)
6401 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6402 /* fall through */
6403 case BFD_RELOC_HI16_PCREL:
6404 fieldval = SEX16 (PPC_HI (value));
6405 break;
6406
6407 case BFD_RELOC_HI16_S:
6408 if (fixP->fx_pcrel)
6409 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6410 /* fall through */
6411 case BFD_RELOC_HI16_S_PCREL:
6412 fieldval = SEX16 (PPC_HA (value));
6413 break;
6414
6415 #ifdef OBJ_ELF
6416 case BFD_RELOC_PPC64_HIGHER:
6417 if (fixP->fx_pcrel)
6418 goto bad_pcrel;
6419 fieldval = SEX16 (PPC_HIGHER (value));
6420 break;
6421
6422 case BFD_RELOC_PPC64_HIGHER_S:
6423 if (fixP->fx_pcrel)
6424 goto bad_pcrel;
6425 fieldval = SEX16 (PPC_HIGHERA (value));
6426 break;
6427
6428 case BFD_RELOC_PPC64_HIGHEST:
6429 if (fixP->fx_pcrel)
6430 goto bad_pcrel;
6431 fieldval = SEX16 (PPC_HIGHEST (value));
6432 break;
6433
6434 case BFD_RELOC_PPC64_HIGHEST_S:
6435 if (fixP->fx_pcrel)
6436 goto bad_pcrel;
6437 fieldval = SEX16 (PPC_HIGHESTA (value));
6438 break;
6439
6440 /* The following relocs can't be calculated by the assembler.
6441 Leave the field zero. */
6442 case BFD_RELOC_PPC_TPREL16:
6443 case BFD_RELOC_PPC_TPREL16_LO:
6444 case BFD_RELOC_PPC_TPREL16_HI:
6445 case BFD_RELOC_PPC_TPREL16_HA:
6446 case BFD_RELOC_PPC_DTPREL16:
6447 case BFD_RELOC_PPC_DTPREL16_LO:
6448 case BFD_RELOC_PPC_DTPREL16_HI:
6449 case BFD_RELOC_PPC_DTPREL16_HA:
6450 case BFD_RELOC_PPC_GOT_TLSGD16:
6451 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6452 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6453 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6454 case BFD_RELOC_PPC_GOT_TLSLD16:
6455 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6456 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6457 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6458 case BFD_RELOC_PPC_GOT_TPREL16:
6459 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6460 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6461 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6462 case BFD_RELOC_PPC_GOT_DTPREL16:
6463 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6464 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6465 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6466 case BFD_RELOC_PPC64_TPREL16_DS:
6467 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6468 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6469 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6470 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6471 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6472 case BFD_RELOC_PPC64_DTPREL16_DS:
6473 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6474 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6475 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6476 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6477 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6478 gas_assert (fixP->fx_addsy != NULL);
6479 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6480 fieldval = 0;
6481 if (fixP->fx_pcrel)
6482 goto bad_pcrel;
6483 break;
6484
6485 /* These also should leave the field zero for the same
6486 reason. Note that older versions of gas wrote values
6487 here. If we want to go back to the old behaviour, then
6488 all _LO and _LO_DS cases will need to be treated like
6489 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6490 case BFD_RELOC_16_GOTOFF:
6491 case BFD_RELOC_LO16_GOTOFF:
6492 case BFD_RELOC_HI16_GOTOFF:
6493 case BFD_RELOC_HI16_S_GOTOFF:
6494 case BFD_RELOC_LO16_PLTOFF:
6495 case BFD_RELOC_HI16_PLTOFF:
6496 case BFD_RELOC_HI16_S_PLTOFF:
6497 case BFD_RELOC_GPREL16:
6498 case BFD_RELOC_16_BASEREL:
6499 case BFD_RELOC_LO16_BASEREL:
6500 case BFD_RELOC_HI16_BASEREL:
6501 case BFD_RELOC_HI16_S_BASEREL:
6502 case BFD_RELOC_PPC_TOC16:
6503 case BFD_RELOC_PPC64_TOC16_LO:
6504 case BFD_RELOC_PPC64_TOC16_HI:
6505 case BFD_RELOC_PPC64_TOC16_HA:
6506 case BFD_RELOC_PPC64_PLTGOT16:
6507 case BFD_RELOC_PPC64_PLTGOT16_LO:
6508 case BFD_RELOC_PPC64_PLTGOT16_HI:
6509 case BFD_RELOC_PPC64_PLTGOT16_HA:
6510 case BFD_RELOC_PPC64_GOT16_DS:
6511 case BFD_RELOC_PPC64_GOT16_LO_DS:
6512 case BFD_RELOC_PPC64_PLT16_LO_DS:
6513 case BFD_RELOC_PPC64_SECTOFF_DS:
6514 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6515 case BFD_RELOC_PPC64_TOC16_DS:
6516 case BFD_RELOC_PPC64_TOC16_LO_DS:
6517 case BFD_RELOC_PPC64_PLTGOT16_DS:
6518 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6519 case BFD_RELOC_PPC_EMB_NADDR16:
6520 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6521 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6522 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6523 case BFD_RELOC_PPC_EMB_SDAI16:
6524 case BFD_RELOC_PPC_EMB_SDA2I16:
6525 case BFD_RELOC_PPC_EMB_SDA2REL:
6526 case BFD_RELOC_PPC_EMB_SDA21:
6527 case BFD_RELOC_PPC_EMB_MRKREF:
6528 case BFD_RELOC_PPC_EMB_RELSEC16:
6529 case BFD_RELOC_PPC_EMB_RELST_LO:
6530 case BFD_RELOC_PPC_EMB_RELST_HI:
6531 case BFD_RELOC_PPC_EMB_RELST_HA:
6532 case BFD_RELOC_PPC_EMB_BIT_FLD:
6533 case BFD_RELOC_PPC_EMB_RELSDA:
6534 case BFD_RELOC_PPC_VLE_SDA21:
6535 case BFD_RELOC_PPC_VLE_SDA21_LO:
6536 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6537 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6538 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6539 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6540 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6541 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6542 gas_assert (fixP->fx_addsy != NULL);
6543 /* Fall thru */
6544
6545 case BFD_RELOC_PPC_TLS:
6546 case BFD_RELOC_PPC_TLSGD:
6547 case BFD_RELOC_PPC_TLSLD:
6548 fieldval = 0;
6549 if (fixP->fx_pcrel)
6550 goto bad_pcrel;
6551 break;
6552 #endif
6553
6554 default:
6555 break;
6556 }
6557
6558 #ifdef OBJ_ELF
6559 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6560 contents can stay at zero. */
6561 #define APPLY_RELOC fixP->fx_done
6562 #else
6563 #define APPLY_RELOC 1
6564 #endif
6565 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6566 {
6567 /* Fetch the instruction, insert the fully resolved operand
6568 value, and stuff the instruction back again. */
6569 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6570 if (target_big_endian)
6571 {
6572 if (fixP->fx_size == 4)
6573 insn = bfd_getb32 ((unsigned char *) where);
6574 else
6575 insn = bfd_getb16 ((unsigned char *) where);
6576 }
6577 else
6578 {
6579 if (fixP->fx_size == 4)
6580 insn = bfd_getl32 ((unsigned char *) where);
6581 else
6582 insn = bfd_getl16 ((unsigned char *) where);
6583 }
6584 insn = ppc_insert_operand (insn, operand, fieldval,
6585 fixP->tc_fix_data.ppc_cpu,
6586 fixP->fx_file, fixP->fx_line);
6587 if (target_big_endian)
6588 {
6589 if (fixP->fx_size == 4)
6590 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6591 else
6592 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6593 }
6594 else
6595 {
6596 if (fixP->fx_size == 4)
6597 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6598 else
6599 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6600 }
6601 }
6602
6603 if (fixP->fx_done)
6604 /* Nothing else to do here. */
6605 return;
6606
6607 gas_assert (fixP->fx_addsy != NULL);
6608 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6609 {
6610 char *sfile;
6611 unsigned int sline;
6612
6613 /* Use expr_symbol_where to see if this is an expression
6614 symbol. */
6615 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6616 as_bad_where (fixP->fx_file, fixP->fx_line,
6617 _("unresolved expression that must be resolved"));
6618 else
6619 as_bad_where (fixP->fx_file, fixP->fx_line,
6620 _("unsupported relocation against %s"),
6621 S_GET_NAME (fixP->fx_addsy));
6622 fixP->fx_done = 1;
6623 return;
6624 }
6625 }
6626 else
6627 {
6628 int size = 0;
6629 offsetT fieldval = value;
6630
6631 /* Handle relocs in data. */
6632 switch (fixP->fx_r_type)
6633 {
6634 case BFD_RELOC_CTOR:
6635 if (ppc_obj64)
6636 goto ctor64;
6637 /* fall through */
6638
6639 case BFD_RELOC_32:
6640 if (fixP->fx_pcrel)
6641 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6642 /* fall through */
6643
6644 case BFD_RELOC_32_PCREL:
6645 case BFD_RELOC_RVA:
6646 size = 4;
6647 break;
6648
6649 case BFD_RELOC_64:
6650 ctor64:
6651 if (fixP->fx_pcrel)
6652 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6653 /* fall through */
6654
6655 case BFD_RELOC_64_PCREL:
6656 size = 8;
6657 break;
6658
6659 case BFD_RELOC_16:
6660 if (fixP->fx_pcrel)
6661 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6662 /* fall through */
6663
6664 case BFD_RELOC_16_PCREL:
6665 size = 2;
6666 break;
6667
6668 case BFD_RELOC_8:
6669 if (fixP->fx_pcrel)
6670 {
6671 #ifdef OBJ_ELF
6672 bad_pcrel:
6673 #endif
6674 if (fixP->fx_addsy)
6675 {
6676 char *sfile;
6677 unsigned int sline;
6678
6679 /* Use expr_symbol_where to see if this is an
6680 expression symbol. */
6681 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6682 as_bad_where (fixP->fx_file, fixP->fx_line,
6683 _("unresolved expression that must"
6684 " be resolved"));
6685 else
6686 as_bad_where (fixP->fx_file, fixP->fx_line,
6687 _("cannot emit PC relative %s relocation"
6688 " against %s"),
6689 bfd_get_reloc_code_name (fixP->fx_r_type),
6690 S_GET_NAME (fixP->fx_addsy));
6691 }
6692 else
6693 as_bad_where (fixP->fx_file, fixP->fx_line,
6694 _("unable to resolve expression"));
6695 fixP->fx_done = 1;
6696 }
6697 else
6698 size = 1;
6699 break;
6700
6701 case BFD_RELOC_VTABLE_INHERIT:
6702 if (fixP->fx_addsy
6703 && !S_IS_DEFINED (fixP->fx_addsy)
6704 && !S_IS_WEAK (fixP->fx_addsy))
6705 S_SET_WEAK (fixP->fx_addsy);
6706 /* Fall thru */
6707
6708 case BFD_RELOC_VTABLE_ENTRY:
6709 fixP->fx_done = 0;
6710 break;
6711
6712 #ifdef OBJ_ELF
6713 /* These can appear with @l etc. in data. */
6714 case BFD_RELOC_LO16:
6715 if (fixP->fx_pcrel)
6716 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6717 case BFD_RELOC_LO16_PCREL:
6718 size = 2;
6719 break;
6720
6721 case BFD_RELOC_HI16:
6722 if (fixP->fx_pcrel)
6723 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6724 case BFD_RELOC_HI16_PCREL:
6725 size = 2;
6726 fieldval = PPC_HI (value);
6727 break;
6728
6729 case BFD_RELOC_HI16_S:
6730 if (fixP->fx_pcrel)
6731 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6732 case BFD_RELOC_HI16_S_PCREL:
6733 size = 2;
6734 fieldval = PPC_HA (value);
6735 break;
6736
6737 case BFD_RELOC_PPC64_HIGHER:
6738 if (fixP->fx_pcrel)
6739 goto bad_pcrel;
6740 size = 2;
6741 fieldval = PPC_HIGHER (value);
6742 break;
6743
6744 case BFD_RELOC_PPC64_HIGHER_S:
6745 if (fixP->fx_pcrel)
6746 goto bad_pcrel;
6747 size = 2;
6748 fieldval = PPC_HIGHERA (value);
6749 break;
6750
6751 case BFD_RELOC_PPC64_HIGHEST:
6752 if (fixP->fx_pcrel)
6753 goto bad_pcrel;
6754 size = 2;
6755 fieldval = PPC_HIGHEST (value);
6756 break;
6757
6758 case BFD_RELOC_PPC64_HIGHEST_S:
6759 if (fixP->fx_pcrel)
6760 goto bad_pcrel;
6761 size = 2;
6762 fieldval = PPC_HIGHESTA (value);
6763 break;
6764
6765 case BFD_RELOC_PPC_DTPMOD:
6766 case BFD_RELOC_PPC_TPREL:
6767 case BFD_RELOC_PPC_DTPREL:
6768 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6769 break;
6770
6771 /* Just punt all of these to the linker. */
6772 case BFD_RELOC_PPC_B16_BRTAKEN:
6773 case BFD_RELOC_PPC_B16_BRNTAKEN:
6774 case BFD_RELOC_16_GOTOFF:
6775 case BFD_RELOC_LO16_GOTOFF:
6776 case BFD_RELOC_HI16_GOTOFF:
6777 case BFD_RELOC_HI16_S_GOTOFF:
6778 case BFD_RELOC_LO16_PLTOFF:
6779 case BFD_RELOC_HI16_PLTOFF:
6780 case BFD_RELOC_HI16_S_PLTOFF:
6781 case BFD_RELOC_PPC_COPY:
6782 case BFD_RELOC_PPC_GLOB_DAT:
6783 case BFD_RELOC_16_BASEREL:
6784 case BFD_RELOC_LO16_BASEREL:
6785 case BFD_RELOC_HI16_BASEREL:
6786 case BFD_RELOC_HI16_S_BASEREL:
6787 case BFD_RELOC_PPC_TLS:
6788 case BFD_RELOC_PPC_DTPREL16_LO:
6789 case BFD_RELOC_PPC_DTPREL16_HI:
6790 case BFD_RELOC_PPC_DTPREL16_HA:
6791 case BFD_RELOC_PPC_TPREL16_LO:
6792 case BFD_RELOC_PPC_TPREL16_HI:
6793 case BFD_RELOC_PPC_TPREL16_HA:
6794 case BFD_RELOC_PPC_GOT_TLSGD16:
6795 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6796 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6797 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6798 case BFD_RELOC_PPC_GOT_TLSLD16:
6799 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6800 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6801 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6802 case BFD_RELOC_PPC_GOT_DTPREL16:
6803 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6804 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6805 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6806 case BFD_RELOC_PPC_GOT_TPREL16:
6807 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6808 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6809 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6810 case BFD_RELOC_24_PLT_PCREL:
6811 case BFD_RELOC_PPC_LOCAL24PC:
6812 case BFD_RELOC_32_PLT_PCREL:
6813 case BFD_RELOC_GPREL16:
6814 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6815 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6816 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6817 case BFD_RELOC_PPC_EMB_NADDR32:
6818 case BFD_RELOC_PPC_EMB_NADDR16:
6819 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6820 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6821 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6822 case BFD_RELOC_PPC_EMB_SDAI16:
6823 case BFD_RELOC_PPC_EMB_SDA2REL:
6824 case BFD_RELOC_PPC_EMB_SDA2I16:
6825 case BFD_RELOC_PPC_EMB_SDA21:
6826 case BFD_RELOC_PPC_VLE_SDA21_LO:
6827 case BFD_RELOC_PPC_EMB_MRKREF:
6828 case BFD_RELOC_PPC_EMB_RELSEC16:
6829 case BFD_RELOC_PPC_EMB_RELST_LO:
6830 case BFD_RELOC_PPC_EMB_RELST_HI:
6831 case BFD_RELOC_PPC_EMB_RELST_HA:
6832 case BFD_RELOC_PPC_EMB_BIT_FLD:
6833 case BFD_RELOC_PPC_EMB_RELSDA:
6834 case BFD_RELOC_PPC64_TOC:
6835 case BFD_RELOC_PPC_TOC16:
6836 case BFD_RELOC_PPC64_TOC16_LO:
6837 case BFD_RELOC_PPC64_TOC16_HI:
6838 case BFD_RELOC_PPC64_TOC16_HA:
6839 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6840 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6841 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6842 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6843 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6844 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6845 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6846 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6847 fixP->fx_done = 0;
6848 break;
6849 #endif
6850
6851 #ifdef OBJ_XCOFF
6852 case BFD_RELOC_NONE:
6853 break;
6854 #endif
6855
6856 default:
6857 fprintf (stderr,
6858 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6859 fflush (stderr);
6860 abort ();
6861 }
6862
6863 if (size && APPLY_RELOC)
6864 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6865 fieldval, size);
6866 }
6867
6868 #ifdef OBJ_ELF
6869 ppc_elf_validate_fix (fixP, seg);
6870 fixP->fx_addnumber = value;
6871
6872 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6873 from the section contents. If we are going to be emitting a reloc
6874 then the section contents are immaterial, so don't warn if they
6875 happen to overflow. Leave such warnings to ld. */
6876 if (!fixP->fx_done)
6877 {
6878 fixP->fx_no_overflow = 1;
6879
6880 /* Arrange to emit .TOC. as a normal symbol if used in anything
6881 but .TOC.@tocbase. */
6882 if (ppc_obj64
6883 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
6884 && fixP->fx_addsy != NULL
6885 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
6886 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
6887 }
6888 #else
6889 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6890 fixP->fx_addnumber = 0;
6891 else
6892 {
6893 #ifdef TE_PE
6894 fixP->fx_addnumber = 0;
6895 #else
6896 /* We want to use the offset within the toc, not the actual VMA
6897 of the symbol. */
6898 fixP->fx_addnumber =
6899 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6900 - S_GET_VALUE (ppc_toc_csect);
6901 #endif
6902 }
6903 #endif
6904 }
6905
6906 /* Generate a reloc for a fixup. */
6907
6908 arelent *
6909 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6910 {
6911 arelent *reloc;
6912
6913 reloc = (arelent *) xmalloc (sizeof (arelent));
6914
6915 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6916 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6917 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6918 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6919 if (reloc->howto == (reloc_howto_type *) NULL)
6920 {
6921 as_bad_where (fixp->fx_file, fixp->fx_line,
6922 _("reloc %d not supported by object file format"),
6923 (int) fixp->fx_r_type);
6924 return NULL;
6925 }
6926 reloc->addend = fixp->fx_addnumber;
6927
6928 return reloc;
6929 }
6930
6931 void
6932 ppc_cfi_frame_initial_instructions (void)
6933 {
6934 cfi_add_CFA_def_cfa (1, 0);
6935 }
6936
6937 int
6938 tc_ppc_regname_to_dw2regnum (char *regname)
6939 {
6940 unsigned int regnum = -1;
6941 unsigned int i;
6942 const char *p;
6943 char *q;
6944 static struct { char *name; int dw2regnum; } regnames[] =
6945 {
6946 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6947 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6948 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6949 { "spe_acc", 111 }, { "spefscr", 112 }
6950 };
6951
6952 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6953 if (strcmp (regnames[i].name, regname) == 0)
6954 return regnames[i].dw2regnum;
6955
6956 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6957 {
6958 p = regname + 1 + (regname[1] == '.');
6959 regnum = strtoul (p, &q, 10);
6960 if (p == q || *q || regnum >= 32)
6961 return -1;
6962 if (regname[0] == 'f')
6963 regnum += 32;
6964 else if (regname[0] == 'v')
6965 regnum += 77;
6966 }
6967 else if (regname[0] == 'c' && regname[1] == 'r')
6968 {
6969 p = regname + 2 + (regname[2] == '.');
6970 if (p[0] < '0' || p[0] > '7' || p[1])
6971 return -1;
6972 regnum = p[0] - '0' + 68;
6973 }
6974 return regnum;
6975 }
GDB Binutils - Deliverables
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