1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
220 unsigned long last_insn
;
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "regnames") == 0)
1212 else if (strcmp (arg
, "no-regnames") == 0)
1213 reg_names_p
= FALSE
;
1216 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1217 that require relocation. */
1218 else if (strcmp (arg
, "relocatable") == 0)
1220 shlib
= SHLIB_MRELOCATABLE
;
1221 ppc_flags
|= EF_PPC_RELOCATABLE
;
1224 else if (strcmp (arg
, "relocatable-lib") == 0)
1226 shlib
= SHLIB_MRELOCATABLE
;
1227 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1230 /* -memb, set embedded bit. */
1231 else if (strcmp (arg
, "emb") == 0)
1232 ppc_flags
|= EF_PPC_EMB
;
1234 /* -mlittle/-mbig set the endianness. */
1235 else if (strcmp (arg
, "little") == 0
1236 || strcmp (arg
, "little-endian") == 0)
1238 target_big_endian
= 0;
1239 set_target_endian
= 1;
1240 if (ppc_cpu
& PPC_OPCODE_VLE
)
1241 as_bad (_("the use of -mvle requires big endian."));
1244 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1246 target_big_endian
= 1;
1247 set_target_endian
= 1;
1250 else if (strcmp (arg
, "solaris") == 0)
1253 ppc_comment_chars
= ppc_solaris_comment_chars
;
1256 else if (strcmp (arg
, "no-solaris") == 0)
1259 ppc_comment_chars
= ppc_eabi_comment_chars
;
1264 as_bad (_("invalid switch -m%s"), arg
);
1270 /* -V: SVR4 argument to print version ID. */
1272 print_version_id ();
1275 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1276 should be emitted or not. FIXME: Not implemented. */
1280 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1281 rather than .stabs.excl, which is ignored by the linker.
1282 FIXME: Not implemented. */
1293 nop_limit
= strtoul (optarg
, &end
, 0);
1295 as_bad (_("--nops needs a numeric argument"));
1310 md_show_usage (FILE *stream
)
1312 fprintf (stream
, _("\
1314 -a32 generate ELF32/XCOFF32\n\
1315 -a64 generate ELF64/XCOFF64\n\
1317 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1318 -mpwr generate code for POWER (RIOS1)\n\
1319 -m601 generate code for PowerPC 601\n\
1320 -mppc, -mppc32, -m603, -m604\n\
1321 generate code for PowerPC 603/604\n\
1322 -m403 generate code for PowerPC 403\n\
1323 -m405 generate code for PowerPC 405\n\
1324 -m440 generate code for PowerPC 440\n\
1325 -m464 generate code for PowerPC 464\n\
1326 -m476 generate code for PowerPC 476\n\
1327 -m7400, -m7410, -m7450, -m7455\n\
1328 generate code for PowerPC 7400/7410/7450/7455\n\
1329 -m750cl generate code for PowerPC 750cl\n\
1330 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1331 fprintf (stream
, _("\
1332 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1333 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1334 -mbooke generate code for 32-bit PowerPC BookE\n\
1335 -ma2 generate code for A2 architecture\n\
1336 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1337 -mpower5, -mpwr5, -mpwr5x\n\
1338 generate code for Power5 architecture\n\
1339 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1340 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1341 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1342 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1343 -mcell generate code for Cell Broadband Engine architecture\n\
1344 -mcom generate code for Power/PowerPC common instructions\n\
1345 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1346 fprintf (stream
, _("\
1347 -maltivec generate code for AltiVec\n\
1348 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1349 -mhtm generate code for Hardware Transactional Memory\n\
1350 -me300 generate code for PowerPC e300 family\n\
1351 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1352 -me500mc, generate code for Freescale e500mc core complex\n\
1353 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1354 -me5500, generate code for Freescale e5500 core complex\n\
1355 -me6500, generate code for Freescale e6500 core complex\n\
1356 -mspe generate code for Motorola SPE instructions\n\
1357 -mvle generate code for Freescale VLE instructions\n\
1358 -mtitan generate code for AppliedMicro Titan core complex\n\
1359 -mregnames Allow symbolic names for registers\n\
1360 -mno-regnames Do not allow symbolic names for registers\n"));
1362 fprintf (stream
, _("\
1363 -mrelocatable support for GCC's -mrelocatble option\n\
1364 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1365 -memb set PPC_EMB bit in ELF flags\n\
1366 -mlittle, -mlittle-endian, -le\n\
1367 generate code for a little endian machine\n\
1368 -mbig, -mbig-endian, -be\n\
1369 generate code for a big endian machine\n\
1370 -msolaris generate code for Solaris\n\
1371 -mno-solaris do not generate code for Solaris\n\
1372 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1373 -V print assembler version number\n\
1374 -Qy, -Qn ignored\n"));
1376 fprintf (stream
, _("\
1377 -nops=count when aligning, more than COUNT nops uses a branch\n\
1378 -ppc476-workaround warn if emitting data to code sections\n"));
1381 /* Set ppc_cpu if it is not already set. */
1386 const char *default_os
= TARGET_OS
;
1387 const char *default_cpu
= TARGET_CPU
;
1389 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1392 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1393 else if (strncmp (default_os
, "aix", 3) == 0
1394 && default_os
[3] >= '4' && default_os
[3] <= '9')
1395 ppc_cpu
|= PPC_OPCODE_COMMON
;
1396 else if (strncmp (default_os
, "aix3", 4) == 0)
1397 ppc_cpu
|= PPC_OPCODE_POWER
;
1398 else if (strcmp (default_cpu
, "rs6000") == 0)
1399 ppc_cpu
|= PPC_OPCODE_POWER
;
1400 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1401 ppc_cpu
|= PPC_OPCODE_PPC
;
1403 as_fatal (_("unknown default cpu = %s, os = %s"),
1404 default_cpu
, default_os
);
1408 /* Figure out the BFD architecture to use. This function and ppc_mach
1409 are called well before md_begin, when the output file is opened. */
1411 enum bfd_architecture
1414 const char *default_cpu
= TARGET_CPU
;
1417 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1418 return bfd_arch_powerpc
;
1419 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1420 return bfd_arch_powerpc
;
1421 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1422 return bfd_arch_rs6000
;
1423 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1425 if (strcmp (default_cpu
, "rs6000") == 0)
1426 return bfd_arch_rs6000
;
1427 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1428 return bfd_arch_powerpc
;
1431 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1432 return bfd_arch_unknown
;
1439 return bfd_mach_ppc64
;
1440 else if (ppc_arch () == bfd_arch_rs6000
)
1441 return bfd_mach_rs6k
;
1442 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1443 return bfd_mach_ppc_titan
;
1444 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1445 return bfd_mach_ppc_vle
;
1447 return bfd_mach_ppc
;
1451 ppc_target_format (void)
1455 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1457 return "xcoff-powermac";
1460 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1462 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1468 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1469 # elif defined (TE_VXWORKS)
1470 return "elf32-powerpc-vxworks";
1472 return (target_big_endian
1473 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1474 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1479 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1480 Return TRUE if there's a problem, otherwise FALSE. */
1483 insn_validate (const struct powerpc_opcode
*op
)
1485 const unsigned char *o
;
1486 unsigned long omask
= op
->mask
;
1488 /* The mask had better not trim off opcode bits. */
1489 if ((op
->opcode
& omask
) != op
->opcode
)
1491 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1495 /* The operands must not overlap the opcode or each other. */
1496 for (o
= op
->operands
; *o
; ++o
)
1498 if (*o
>= num_powerpc_operands
)
1500 as_bad (_("operand index error for %s"), op
->name
);
1505 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1506 if (operand
->shift
!= (int) PPC_OPSHIFT_INV
)
1510 if (operand
->shift
>= 0)
1511 mask
= operand
->bitm
<< operand
->shift
;
1513 mask
= operand
->bitm
>> -operand
->shift
;
1516 as_bad (_("operand %d overlap in %s"),
1517 (int) (o
- op
->operands
), op
->name
);
1527 /* Insert opcodes and macros into hash tables. Called at startup and
1528 for .machine pseudo. */
1531 ppc_setup_opcodes (void)
1533 const struct powerpc_opcode
*op
;
1534 const struct powerpc_opcode
*op_end
;
1535 const struct powerpc_macro
*macro
;
1536 const struct powerpc_macro
*macro_end
;
1537 bfd_boolean bad_insn
= FALSE
;
1539 if (ppc_hash
!= NULL
)
1540 hash_die (ppc_hash
);
1541 if (ppc_macro_hash
!= NULL
)
1542 hash_die (ppc_macro_hash
);
1544 /* Insert the opcodes into a hash table. */
1545 ppc_hash
= hash_new ();
1547 if (ENABLE_CHECKING
)
1551 /* An index into powerpc_operands is stored in struct fix
1552 fx_pcrel_adjust which is 8 bits wide. */
1553 gas_assert (num_powerpc_operands
< 256);
1555 /* Check operand masks. Code here and in the disassembler assumes
1556 all the 1's in the mask are contiguous. */
1557 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1559 unsigned long mask
= powerpc_operands
[i
].bitm
;
1560 unsigned long right_bit
;
1563 right_bit
= mask
& -mask
;
1565 right_bit
= mask
& -mask
;
1566 if (mask
!= right_bit
)
1568 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1571 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1572 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1573 sizeof (powerpc_operands
[0])) == 0)
1575 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1582 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1583 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1585 if (ENABLE_CHECKING
)
1587 if (op
!= powerpc_opcodes
)
1589 int old_opcode
= PPC_OP (op
[-1].opcode
);
1590 int new_opcode
= PPC_OP (op
[0].opcode
);
1592 #ifdef PRINT_OPCODE_TABLE
1593 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1594 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1595 (unsigned int) new_opcode
, (unsigned int) op
->opcode
,
1596 (unsigned int) op
->mask
, (unsigned long long) op
->flags
);
1599 /* The major opcodes had better be sorted. Code in the
1600 disassembler assumes the insns are sorted according to
1602 if (new_opcode
< old_opcode
)
1604 as_bad (_("major opcode is not sorted for %s"),
1609 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1611 as_bad (_("%s is enabled by vle flag"), op
->name
);
1614 if (PPC_OP (op
->opcode
) != 4
1615 && PPC_OP (op
->opcode
) != 31
1616 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1618 as_bad (_("%s not disabled by vle flag"), op
->name
);
1621 bad_insn
|= insn_validate (op
);
1624 if ((ppc_cpu
& op
->flags
) != 0
1625 && !(ppc_cpu
& op
->deprecated
))
1629 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1632 as_bad (_("duplicate instruction %s"),
1639 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1640 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1641 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1643 op_end
= vle_opcodes
+ vle_num_opcodes
;
1644 for (op
= vle_opcodes
; op
< op_end
; op
++)
1646 if (ENABLE_CHECKING
)
1648 if (op
!= vle_opcodes
)
1650 unsigned old_seg
, new_seg
;
1652 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1653 old_seg
= VLE_OP_TO_SEG (old_seg
);
1654 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1655 new_seg
= VLE_OP_TO_SEG (new_seg
);
1657 #ifdef PRINT_OPCODE_TABLE
1658 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1659 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1660 (unsigned int) new_seg
, (unsigned int) op
->opcode
,
1661 (unsigned int) op
->mask
, (unsigned long long) op
->flags
);
1663 /* The major opcodes had better be sorted. Code in the
1664 disassembler assumes the insns are sorted according to
1666 if (new_seg
< old_seg
)
1668 as_bad (_("major opcode is not sorted for %s"),
1674 bad_insn
|= insn_validate (op
);
1677 if ((ppc_cpu
& op
->flags
) != 0
1678 && !(ppc_cpu
& op
->deprecated
))
1682 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1685 as_bad (_("duplicate instruction %s"),
1692 /* Insert the macros into a hash table. */
1693 ppc_macro_hash
= hash_new ();
1695 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1696 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1698 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1702 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1703 if (retval
!= (const char *) NULL
)
1705 as_bad (_("duplicate macro %s"), macro
->name
);
1715 /* This function is called when the assembler starts up. It is called
1716 after the options have been parsed and the output file has been
1724 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1725 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1728 /* Set the ELF flags if desired. */
1729 if (ppc_flags
&& !msolaris
)
1730 bfd_set_private_flags (stdoutput
, ppc_flags
);
1733 ppc_setup_opcodes ();
1735 /* Tell the main code what the endianness is if it is not overridden
1737 if (!set_target_endian
)
1739 set_target_endian
= 1;
1740 target_big_endian
= PPC_BIG_ENDIAN
;
1744 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1746 /* Create dummy symbols to serve as initial csects. This forces the
1747 text csects to precede the data csects. These symbols will not
1749 ppc_text_csects
= symbol_make ("dummy\001");
1750 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1751 ppc_data_csects
= symbol_make ("dummy\001");
1752 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1757 ppc_current_section
= text_section
;
1758 ppc_previous_section
= 0;
1767 if (ppc_apuinfo_list
== NULL
)
1770 /* Ok, so write the section info out. We have this layout:
1774 0 8 length of "APUinfo\0"
1775 4 (n*4) number of APU's (4 bytes each)
1778 20 APU#1 first APU's info
1779 24 APU#2 second APU's info
1784 asection
*seg
= now_seg
;
1785 subsegT subseg
= now_subseg
;
1786 asection
*apuinfo_secp
= (asection
*) NULL
;
1789 /* Create the .PPC.EMB.apuinfo section. */
1790 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1791 bfd_set_section_flags (stdoutput
,
1793 SEC_HAS_CONTENTS
| SEC_READONLY
);
1796 md_number_to_chars (p
, (valueT
) 8, 4);
1799 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1802 md_number_to_chars (p
, (valueT
) 2, 4);
1805 strcpy (p
, APUINFO_LABEL
);
1807 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1810 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1813 frag_align (2, 0, 0);
1815 /* We probably can't restore the current segment, for there likely
1818 subseg_set (seg
, subseg
);
1823 /* Insert an operand value into an instruction. */
1825 static unsigned long
1826 ppc_insert_operand (unsigned long insn
,
1827 const struct powerpc_operand
*operand
,
1833 long min
, max
, right
;
1835 max
= operand
->bitm
;
1839 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1841 /* Extend the allowed range for addis to [-32768, 65535].
1842 Similarly for cmpli and some VLE high part insns. For 64-bit
1843 it would be good to disable this for signed fields since the
1844 value is sign extended into the high 32 bits of the register.
1845 If the value is, say, an address, then we might care about
1846 the high bits. However, gcc as of 2014-06 uses unsigned
1847 values when loading the high part of 64-bit constants using
1849 min
= ~(max
>> 1) & -right
;
1851 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1853 max
= (max
>> 1) & -right
;
1854 min
= ~max
& -right
;
1857 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1860 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1869 /* Some people write constants with the sign extension done by
1870 hand but only up to 32 bits. This shouldn't really be valid,
1871 but, to permit this code to assemble on a 64-bit host, we
1872 sign extend the 32-bit value to 64 bits if so doing makes the
1875 && (offsetT
) (val
- 0x80000000 - 0x80000000) >= min
1876 && (offsetT
) (val
- 0x80000000 - 0x80000000) <= max
1877 && ((val
- 0x80000000 - 0x80000000) & (right
- 1)) == 0)
1878 val
= val
- 0x80000000 - 0x80000000;
1880 /* Similarly, people write expressions like ~(1<<15), and expect
1881 this to be OK for a 32-bit unsigned value. */
1883 && (offsetT
) (val
+ 0x80000000 + 0x80000000) >= min
1884 && (offsetT
) (val
+ 0x80000000 + 0x80000000) <= max
1885 && ((val
+ 0x80000000 + 0x80000000) & (right
- 1)) == 0)
1886 val
= val
+ 0x80000000 + 0x80000000;
1890 || (val
& (right
- 1)) != 0)
1891 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
1894 if (operand
->insert
)
1899 insn
= (*operand
->insert
) (insn
, (long) val
, cpu
, &errmsg
);
1900 if (errmsg
!= (const char *) NULL
)
1901 as_bad_where (file
, line
, "%s", errmsg
);
1903 else if (operand
->shift
>= 0)
1904 insn
|= ((long) val
& operand
->bitm
) << operand
->shift
;
1906 insn
|= ((long) val
& operand
->bitm
) >> -operand
->shift
;
1913 /* Parse @got, etc. and return the desired relocation. */
1914 static bfd_reloc_code_real_type
1915 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
1919 unsigned int length
: 8;
1920 unsigned int valid32
: 1;
1921 unsigned int valid64
: 1;
1930 const struct map_bfd
*ptr
;
1932 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1933 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1934 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1936 static const struct map_bfd mapping
[] = {
1937 MAP ("l", BFD_RELOC_LO16
),
1938 MAP ("h", BFD_RELOC_HI16
),
1939 MAP ("ha", BFD_RELOC_HI16_S
),
1940 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
1941 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
1942 MAP ("got", BFD_RELOC_16_GOTOFF
),
1943 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
1944 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
1945 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
1946 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
1947 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
1948 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
1949 MAP ("copy", BFD_RELOC_PPC_COPY
),
1950 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
1951 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
1952 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
1953 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
1954 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
1955 MAP ("tls", BFD_RELOC_PPC_TLS
),
1956 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
1957 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
1958 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
1959 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
1960 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
1961 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
1962 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
1963 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
1964 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
1965 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
1966 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
1967 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
1968 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
1969 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
1970 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
1971 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
1972 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
1973 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
1974 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
1975 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
1976 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
1977 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
1978 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
1979 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
1980 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
1981 MAP32 ("fixup", BFD_RELOC_CTOR
),
1982 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
1983 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
1984 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
1985 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
1986 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
1987 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
1988 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
1989 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
1990 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
1991 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
1992 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
1993 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
1994 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
1995 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
1996 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
1997 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
1998 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
1999 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2000 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2001 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2002 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2003 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2004 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2005 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2006 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2007 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2008 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2009 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2010 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2011 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2012 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2013 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2014 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2015 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2016 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2017 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2018 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2019 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2020 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2021 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2022 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2023 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2024 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2025 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2026 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2027 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2028 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2029 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2030 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2031 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2032 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2033 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2037 return BFD_RELOC_NONE
;
2039 for (ch
= *str
, str2
= ident
;
2040 (str2
< ident
+ sizeof (ident
) - 1
2041 && (ISALNUM (ch
) || ch
== '@'));
2044 *str2
++ = TOLOWER (ch
);
2051 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2052 if (ch
== ptr
->string
[0]
2053 && len
== ptr
->length
2054 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2055 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2057 int reloc
= ptr
->reloc
;
2059 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2063 case BFD_RELOC_16_GOTOFF
:
2064 case BFD_RELOC_LO16_GOTOFF
:
2065 case BFD_RELOC_HI16_GOTOFF
:
2066 case BFD_RELOC_HI16_S_GOTOFF
:
2067 as_warn (_("identifier+constant@got means "
2068 "identifier@got+constant"));
2071 case BFD_RELOC_PPC_GOT_TLSGD16
:
2072 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2073 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2074 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2075 case BFD_RELOC_PPC_GOT_TLSLD16
:
2076 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2077 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2078 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2079 case BFD_RELOC_PPC_GOT_DTPREL16
:
2080 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2081 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2082 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2083 case BFD_RELOC_PPC_GOT_TPREL16
:
2084 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2085 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2086 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2087 as_bad (_("symbol+offset not supported for got tls"));
2092 /* Now check for identifier@suffix+constant. */
2093 if (*str
== '-' || *str
== '+')
2095 char *orig_line
= input_line_pointer
;
2096 expressionS new_exp
;
2098 input_line_pointer
= str
;
2099 expression (&new_exp
);
2100 if (new_exp
.X_op
== O_constant
)
2102 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2103 str
= input_line_pointer
;
2106 if (&input_line_pointer
!= str_p
)
2107 input_line_pointer
= orig_line
;
2111 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2112 && exp_p
->X_op
== O_symbol
2113 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2115 /* Change the symbol so that the dummy .TOC. symbol can be
2116 omitted from the object file. */
2117 exp_p
->X_add_symbol
= &abs_symbol
;
2120 return (bfd_reloc_code_real_type
) reloc
;
2123 return BFD_RELOC_NONE
;
2126 /* Support @got, etc. on constants emitted via .short, .int etc. */
2128 bfd_reloc_code_real_type
2129 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2132 if (nbytes
>= 2 && *input_line_pointer
== '@')
2133 return ppc_elf_suffix (&input_line_pointer
, exp
);
2134 return BFD_RELOC_NONE
;
2137 /* Warn when emitting data to code sections, unless we are emitting
2138 a relocation that ld --ppc476-workaround uses to recognise data
2139 *and* there was an unconditional branch prior to the data. */
2142 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2143 unsigned int nbytes
, fixS
*fix
)
2146 && (now_seg
->flags
& SEC_CODE
) != 0
2149 || !(fix
->fx_r_type
== BFD_RELOC_32
2150 || fix
->fx_r_type
== BFD_RELOC_CTOR
2151 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2152 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2153 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2154 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2155 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2156 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2157 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2158 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2160 /* Flag that we've warned. */
2164 as_warn (_("data in executable section"));
2168 /* Solaris pseduo op to change to the .rodata section. */
2170 ppc_elf_rdata (int xxx
)
2172 char *save_line
= input_line_pointer
;
2173 static char section
[] = ".rodata\n";
2175 /* Just pretend this is .section .rodata */
2176 input_line_pointer
= section
;
2177 obj_elf_section (xxx
);
2179 input_line_pointer
= save_line
;
2182 /* Pseudo op to make file scope bss items. */
2184 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2197 c
= get_symbol_name (&name
);
2199 /* Just after name is now '\0'. */
2200 p
= input_line_pointer
;
2202 SKIP_WHITESPACE_AFTER_NAME ();
2203 if (*input_line_pointer
!= ',')
2205 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2206 ignore_rest_of_line ();
2210 input_line_pointer
++; /* skip ',' */
2211 if ((size
= get_absolute_expression ()) < 0)
2213 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2214 ignore_rest_of_line ();
2218 /* The third argument to .lcomm is the alignment. */
2219 if (*input_line_pointer
!= ',')
2223 ++input_line_pointer
;
2224 align
= get_absolute_expression ();
2227 as_warn (_("ignoring bad alignment"));
2233 symbolP
= symbol_find_or_make (name
);
2236 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2238 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2239 S_GET_NAME (symbolP
));
2240 ignore_rest_of_line ();
2244 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2246 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2247 S_GET_NAME (symbolP
),
2248 (long) S_GET_VALUE (symbolP
),
2251 ignore_rest_of_line ();
2257 old_subsec
= now_subseg
;
2260 /* Convert to a power of 2 alignment. */
2261 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2264 as_bad (_("common alignment not a power of 2"));
2265 ignore_rest_of_line ();
2272 record_alignment (bss_section
, align2
);
2273 subseg_set (bss_section
, 1);
2275 frag_align (align2
, 0, 0);
2276 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2277 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2278 symbol_set_frag (symbolP
, frag_now
);
2279 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2282 S_SET_SIZE (symbolP
, size
);
2283 S_SET_SEGMENT (symbolP
, bss_section
);
2284 subseg_set (old_sec
, old_subsec
);
2285 demand_empty_rest_of_line ();
2288 /* Pseudo op to set symbol local entry point. */
2290 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2293 char c
= get_symbol_name (&name
);
2298 elf_symbol_type
*elfsym
;
2300 p
= input_line_pointer
;
2302 SKIP_WHITESPACE_AFTER_NAME ();
2303 if (*input_line_pointer
!= ',')
2306 as_bad (_("expected comma after name `%s' in .localentry directive"),
2309 ignore_rest_of_line ();
2312 input_line_pointer
++;
2314 if (exp
.X_op
== O_absent
)
2316 as_bad (_("missing expression in .localentry directive"));
2317 exp
.X_op
= O_constant
;
2318 exp
.X_add_number
= 0;
2321 sym
= symbol_find_or_make (name
);
2324 if (resolve_expression (&exp
)
2325 && exp
.X_op
== O_constant
)
2327 unsigned char encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2329 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2330 as_bad (_(".localentry expression for `%s' "
2331 "is not a valid power of 2"), S_GET_NAME (sym
));
2334 bfdsym
= symbol_get_bfdsym (sym
);
2335 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2336 gas_assert (elfsym
);
2337 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2338 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2339 if (ppc_abiversion
== 0)
2344 as_bad (_(".localentry expression for `%s' "
2345 "does not evaluate to a constant"), S_GET_NAME (sym
));
2347 demand_empty_rest_of_line ();
2350 /* Pseudo op to set ABI version. */
2352 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2357 if (exp
.X_op
== O_absent
)
2359 as_bad (_("missing expression in .abiversion directive"));
2360 exp
.X_op
= O_constant
;
2361 exp
.X_add_number
= 0;
2364 if (resolve_expression (&exp
)
2365 && exp
.X_op
== O_constant
)
2366 ppc_abiversion
= exp
.X_add_number
;
2368 as_bad (_(".abiversion expression does not evaluate to a constant"));
2369 demand_empty_rest_of_line ();
2372 /* Parse a .gnu_attribute directive. */
2374 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2376 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2378 /* Check validity of defined powerpc tags. */
2379 if (tag
== Tag_GNU_Power_ABI_FP
2380 || tag
== Tag_GNU_Power_ABI_Vector
2381 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2385 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2387 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2388 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2389 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2390 as_warn (_("unknown .gnu_attribute value"));
2394 /* Set ABI version in output file. */
2398 if (ppc_obj64
&& ppc_abiversion
!= 0)
2400 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2401 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2405 /* Validate any relocations emitted for -mrelocatable, possibly adding
2406 fixups for word relocations in writable segments, so we can adjust
2409 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2411 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2420 case SHLIB_MRELOCATABLE
:
2421 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2422 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2423 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2424 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2425 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2426 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2427 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2428 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2429 && (seg
->flags
& SEC_LOAD
) != 0
2430 && strcmp (segment_name (seg
), ".got2") != 0
2431 && strcmp (segment_name (seg
), ".dtors") != 0
2432 && strcmp (segment_name (seg
), ".ctors") != 0
2433 && strcmp (segment_name (seg
), ".fixup") != 0
2434 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2435 && strcmp (segment_name (seg
), ".eh_frame") != 0
2436 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2438 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2439 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2441 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2442 _("relocation cannot be done when using -mrelocatable"));
2449 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2450 function descriptor sym if the corresponding code sym is used. */
2453 ppc_frob_file_before_adjust (void)
2461 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2467 name
= S_GET_NAME (symp
);
2471 if (! S_IS_WEAK (symp
)
2472 || S_IS_DEFINED (symp
))
2475 dotname
= concat (".", name
, (char *) NULL
);
2476 dotsym
= symbol_find_noref (dotname
, 1);
2478 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2479 || symbol_used_in_reloc_p (dotsym
)))
2480 symbol_mark_used (symp
);
2484 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2486 && toc_reloc_types
!= has_large_toc_reloc
2487 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2488 as_warn (_("TOC section size exceeds 64k"));
2491 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2492 emitted. Other uses of .TOC. will cause the symbol to be marked
2493 with BSF_KEEP in md_apply_fix. */
2496 ppc_elf_adjust_symtab (void)
2501 symp
= symbol_find (".TOC.");
2504 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2505 if ((bsym
->flags
& BSF_KEEP
) == 0)
2506 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2510 #endif /* OBJ_ELF */
2515 * Summary of parse_toc_entry.
2517 * in: Input_line_pointer points to the '[' in one of:
2519 * [toc] [tocv] [toc32] [toc64]
2521 * Anything else is an error of one kind or another.
2524 * return value: success or failure
2525 * toc_kind: kind of toc reference
2526 * input_line_pointer:
2527 * success: first char after the ']'
2528 * failure: unchanged
2532 * [toc] - rv == success, toc_kind = default_toc
2533 * [tocv] - rv == success, toc_kind = data_in_toc
2534 * [toc32] - rv == success, toc_kind = must_be_32
2535 * [toc64] - rv == success, toc_kind = must_be_64
2539 enum toc_size_qualifier
2541 default_toc
, /* The toc cell constructed should be the system default size */
2542 data_in_toc
, /* This is a direct reference to a toc cell */
2543 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2544 must_be_64
/* The toc cell constructed must be 64 bits wide */
2548 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2553 enum toc_size_qualifier t
;
2555 /* Save the input_line_pointer. */
2556 start
= input_line_pointer
;
2558 /* Skip over the '[' , and whitespace. */
2559 ++input_line_pointer
;
2562 /* Find the spelling of the operand. */
2563 c
= get_symbol_name (&toc_spec
);
2565 if (strcmp (toc_spec
, "toc") == 0)
2569 else if (strcmp (toc_spec
, "tocv") == 0)
2573 else if (strcmp (toc_spec
, "toc32") == 0)
2577 else if (strcmp (toc_spec
, "toc64") == 0)
2583 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2584 *input_line_pointer
= c
;
2585 input_line_pointer
= start
;
2589 /* Now find the ']'. */
2590 *input_line_pointer
= c
;
2592 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2593 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2597 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2598 input_line_pointer
= start
;
2607 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2608 /* See whether a symbol is in the TOC section. */
2611 ppc_is_toc_sym (symbolS
*sym
)
2614 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2615 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2618 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2620 return strcmp (sname
, ".toc") == 0;
2622 return strcmp (sname
, ".got") == 0;
2625 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2629 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2631 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2635 /* Check we don't already exist. */
2636 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2637 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2640 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2642 if (ppc_apuinfo_num_alloc
== 0)
2644 ppc_apuinfo_num_alloc
= 4;
2645 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2649 ppc_apuinfo_num_alloc
+= 4;
2650 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2651 ppc_apuinfo_num_alloc
);
2654 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2660 /* We need to keep a list of fixups. We can't simply generate them as
2661 we go, because that would require us to first create the frag, and
2662 that would screw up references to ``.''. */
2668 bfd_reloc_code_real_type reloc
;
2671 #define MAX_INSN_FIXUPS (5)
2673 /* This routine is called for each instruction to be assembled. */
2676 md_assemble (char *str
)
2679 const struct powerpc_opcode
*opcode
;
2681 const unsigned char *opindex_ptr
;
2685 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
2690 unsigned int insn_length
;
2692 /* Get the opcode. */
2693 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
2698 /* Look up the opcode in the hash table. */
2699 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
2700 if (opcode
== (const struct powerpc_opcode
*) NULL
)
2702 const struct powerpc_macro
*macro
;
2704 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
2705 if (macro
== (const struct powerpc_macro
*) NULL
)
2706 as_bad (_("unrecognized opcode: `%s'"), str
);
2708 ppc_macro (s
, macro
);
2713 insn
= opcode
->opcode
;
2716 while (ISSPACE (*str
))
2719 /* PowerPC operands are just expressions. The only real issue is
2720 that a few operand types are optional. All cases which might use
2721 an optional operand separate the operands only with commas (in some
2722 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2723 have optional operands). Most instructions with optional operands
2724 have only one. Those that have more than one optional operand can
2725 take either all their operands or none. So, before we start seriously
2726 parsing the operands, we check to see if we have optional operands,
2727 and if we do, we count the number of commas to see which operands
2728 have been omitted. */
2730 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2732 const struct powerpc_operand
*operand
;
2734 operand
= &powerpc_operands
[*opindex_ptr
];
2735 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2736 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
2738 unsigned int opcount
;
2739 unsigned int num_operands_expected
;
2741 /* There is an optional operand. Count the number of
2742 commas in the input line. */
2749 while ((s
= strchr (s
, ',')) != (char *) NULL
)
2756 /* Compute the number of expected operands.
2757 Do not count fake operands. */
2758 for (num_operands_expected
= 0, i
= 0; opcode
->operands
[i
]; i
++)
2759 if ((powerpc_operands
[opcode
->operands
[i
]].flags
& PPC_OPERAND_FAKE
) == 0)
2760 ++ num_operands_expected
;
2762 /* If there are fewer operands in the line then are called
2763 for by the instruction, we want to skip the optional
2765 if (opcount
< num_operands_expected
)
2772 /* Gather the operands. */
2776 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2778 const struct powerpc_operand
*operand
;
2784 if (next_opindex
== 0)
2785 operand
= &powerpc_operands
[*opindex_ptr
];
2788 operand
= &powerpc_operands
[next_opindex
];
2793 /* If this is a fake operand, then we do not expect anything
2795 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
2797 insn
= (*operand
->insert
) (insn
, 0L, ppc_cpu
, &errmsg
);
2798 if (errmsg
!= (const char *) NULL
)
2799 as_bad ("%s", errmsg
);
2803 /* If this is an optional operand, and we are skipping it, just
2805 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2806 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
)
2809 long val
= ppc_optional_operand_value (operand
);
2810 if (operand
->insert
)
2812 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
2813 if (errmsg
!= (const char *) NULL
)
2814 as_bad ("%s", errmsg
);
2816 else if (operand
->shift
>= 0)
2817 insn
|= ((long) val
& operand
->bitm
) << operand
->shift
;
2819 insn
|= ((long) val
& operand
->bitm
) >> -operand
->shift
;
2821 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
2822 next_opindex
= *opindex_ptr
+ 1;
2826 /* Gather the operand. */
2827 hold
= input_line_pointer
;
2828 input_line_pointer
= str
;
2831 if (*input_line_pointer
== '[')
2833 /* We are expecting something like the second argument here:
2835 * lwz r4,[toc].GS.0.static_int(rtoc)
2836 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2837 * The argument following the `]' must be a symbol name, and the
2838 * register must be the toc register: 'rtoc' or '2'
2840 * The effect is to 0 as the displacement field
2841 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2842 * the appropriate variation) reloc against it based on the symbol.
2843 * The linker will build the toc, and insert the resolved toc offset.
2846 * o The size of the toc entry is currently assumed to be
2847 * 32 bits. This should not be assumed to be a hard coded
2849 * o In an effort to cope with a change from 32 to 64 bits,
2850 * there are also toc entries that are specified to be
2851 * either 32 or 64 bits:
2852 * lwz r4,[toc32].GS.0.static_int(rtoc)
2853 * lwz r4,[toc64].GS.0.static_int(rtoc)
2854 * These demand toc entries of the specified size, and the
2855 * instruction probably requires it.
2859 enum toc_size_qualifier toc_kind
;
2860 bfd_reloc_code_real_type toc_reloc
;
2862 /* Go parse off the [tocXX] part. */
2863 valid_toc
= parse_toc_entry (&toc_kind
);
2867 ignore_rest_of_line ();
2871 /* Now get the symbol following the ']'. */
2877 /* In this case, we may not have seen the symbol yet,
2878 since it is allowed to appear on a .extern or .globl
2879 or just be a label in the .data section. */
2880 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2883 /* 1. The symbol must be defined and either in the toc
2884 section, or a global.
2885 2. The reloc generated must have the TOCDEFN flag set
2886 in upper bit mess of the reloc type.
2887 FIXME: It's a little confusing what the tocv
2888 qualifier can be used for. At the very least, I've
2889 seen three uses, only one of which I'm sure I can
2891 if (ex
.X_op
== O_symbol
)
2893 gas_assert (ex
.X_add_symbol
!= NULL
);
2894 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
2897 as_bad (_("[tocv] symbol is not a toc symbol"));
2901 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2904 /* FIXME: these next two specifically specify 32/64 bit
2905 toc entries. We don't support them today. Is this
2906 the right way to say that? */
2907 toc_reloc
= BFD_RELOC_NONE
;
2908 as_bad (_("unimplemented toc32 expression modifier"));
2911 /* FIXME: see above. */
2912 toc_reloc
= BFD_RELOC_NONE
;
2913 as_bad (_("unimplemented toc64 expression modifier"));
2917 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2923 /* We need to generate a fixup for this expression. */
2924 if (fc
>= MAX_INSN_FIXUPS
)
2925 as_fatal (_("too many fixups"));
2927 fixups
[fc
].reloc
= toc_reloc
;
2928 fixups
[fc
].exp
= ex
;
2929 fixups
[fc
].opindex
= *opindex_ptr
;
2932 /* Ok. We've set up the fixup for the instruction. Now make it
2933 look like the constant 0 was found here. */
2935 ex
.X_op
= O_constant
;
2936 ex
.X_add_number
= 0;
2937 ex
.X_add_symbol
= NULL
;
2938 ex
.X_op_symbol
= NULL
;
2945 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
2946 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
2947 || !register_name (&ex
))
2949 char save_lex
= lex_type
['%'];
2951 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
2952 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
2955 lex_type
['%'] |= LEX_BEGIN_NAME
;
2959 lex_type
['%'] = save_lex
;
2963 str
= input_line_pointer
;
2964 input_line_pointer
= hold
;
2966 if (ex
.X_op
== O_illegal
)
2967 as_bad (_("illegal operand"));
2968 else if (ex
.X_op
== O_absent
)
2969 as_bad (_("missing operand"));
2970 else if (ex
.X_op
== O_register
)
2974 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
2975 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
2976 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
2977 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
2978 && ex
.X_add_number
!= 0
2979 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
2980 as_warn (_("invalid register expression"));
2981 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
& 0xff,
2982 ppc_cpu
, (char *) NULL
, 0);
2984 else if (ex
.X_op
== O_constant
)
2987 /* Allow @HA, @L, @H on constants. */
2988 bfd_reloc_code_real_type reloc
;
2989 char *orig_str
= str
;
2991 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
2998 case BFD_RELOC_LO16
:
2999 ex
.X_add_number
&= 0xffff;
3000 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3001 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3004 case BFD_RELOC_HI16
:
3005 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3007 /* PowerPC64 @h is tested for overflow. */
3008 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3009 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3011 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3013 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3019 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3020 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3021 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3022 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3025 case BFD_RELOC_HI16_S
:
3026 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3028 /* PowerPC64 @ha is tested for overflow. */
3030 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3031 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3033 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3035 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3041 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3042 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3043 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3044 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3047 case BFD_RELOC_PPC64_HIGHER
:
3048 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3049 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3050 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3053 case BFD_RELOC_PPC64_HIGHER_S
:
3054 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3055 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3056 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3059 case BFD_RELOC_PPC64_HIGHEST
:
3060 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3061 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3062 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3065 case BFD_RELOC_PPC64_HIGHEST_S
:
3066 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3067 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3068 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3071 #endif /* OBJ_ELF */
3072 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3073 ppc_cpu
, (char *) NULL
, 0);
3077 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3079 if (ex
.X_op
== O_symbol
&& str
[0] == '(')
3081 const char *sym_name
= S_GET_NAME (ex
.X_add_symbol
);
3082 if (sym_name
[0] == '.')
3085 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3087 expressionS tls_exp
;
3089 hold
= input_line_pointer
;
3090 input_line_pointer
= str
+ 1;
3091 expression (&tls_exp
);
3092 if (tls_exp
.X_op
== O_symbol
)
3094 reloc
= BFD_RELOC_NONE
;
3095 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3097 reloc
= BFD_RELOC_PPC_TLSGD
;
3098 input_line_pointer
+= 7;
3100 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3102 reloc
= BFD_RELOC_PPC_TLSLD
;
3103 input_line_pointer
+= 7;
3105 if (reloc
!= BFD_RELOC_NONE
)
3108 str
= input_line_pointer
;
3110 if (fc
>= MAX_INSN_FIXUPS
)
3111 as_fatal (_("too many fixups"));
3112 fixups
[fc
].exp
= tls_exp
;
3113 fixups
[fc
].opindex
= *opindex_ptr
;
3114 fixups
[fc
].reloc
= reloc
;
3118 input_line_pointer
= hold
;
3122 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3124 /* Some TLS tweaks. */
3130 case BFD_RELOC_PPC_TLS
:
3131 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3132 as_bad (_("@tls may not be used with \"%s\" operands"),
3134 else if (operand
->shift
!= 11)
3135 as_bad (_("@tls may only be used in last operand"));
3137 insn
= ppc_insert_operand (insn
, operand
,
3139 ppc_cpu
, (char *) NULL
, 0);
3142 /* We'll only use the 32 (or 64) bit form of these relocations
3143 in constants. Instructions get the 16 bit form. */
3144 case BFD_RELOC_PPC_DTPREL
:
3145 reloc
= BFD_RELOC_PPC_DTPREL16
;
3147 case BFD_RELOC_PPC_TPREL
:
3148 reloc
= BFD_RELOC_PPC_TPREL16
;
3153 if (opcode
->opcode
== (19 << 26) + (2 << 1)
3154 && reloc
== BFD_RELOC_HI16_S
)
3155 reloc
= BFD_RELOC_PPC_16DX_HA
;
3157 /* If VLE-mode convert LO/HI/HA relocations. */
3158 if (opcode
->flags
& PPC_OPCODE_VLE
)
3160 int tmp_insn
= insn
& opcode
->mask
;
3162 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3163 || tmp_insn
== E_AND2I_DOT_INSN
3164 || tmp_insn
== E_OR2IS_INSN
3165 || tmp_insn
== E_LIS_INSN
3166 || tmp_insn
== E_AND2IS_DOT_INSN
);
3169 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3170 || tmp_insn
== E_ADD2IS_INSN
3171 || tmp_insn
== E_CMP16I_INSN
3172 || tmp_insn
== E_MULL2I_INSN
3173 || tmp_insn
== E_CMPL16I_INSN
3174 || tmp_insn
== E_CMPH16I_INSN
3175 || tmp_insn
== E_CMPHL16I_INSN
);
3182 case BFD_RELOC_PPC_EMB_SDA21
:
3183 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3186 case BFD_RELOC_LO16
:
3188 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3189 else if (use_a_reloc
)
3190 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3193 case BFD_RELOC_HI16
:
3195 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3196 else if (use_a_reloc
)
3197 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3200 case BFD_RELOC_HI16_S
:
3202 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3203 else if (use_a_reloc
)
3204 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3207 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3209 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3212 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3214 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3217 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3219 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3224 #endif /* OBJ_ELF */
3226 if (reloc
!= BFD_RELOC_NONE
)
3228 /* Determine a BFD reloc value based on the operand information.
3229 We are only prepared to turn a few of the operands into
3231 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3232 | PPC_OPERAND_ABSOLUTE
)) != 0
3233 && operand
->bitm
== 0x3fffffc
3234 && operand
->shift
== 0)
3235 reloc
= BFD_RELOC_PPC_B26
;
3236 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3237 | PPC_OPERAND_ABSOLUTE
)) != 0
3238 && operand
->bitm
== 0xfffc
3239 && operand
->shift
== 0)
3240 reloc
= BFD_RELOC_PPC_B16
;
3241 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3242 && operand
->bitm
== 0x1fe
3243 && operand
->shift
== -1)
3244 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3245 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3246 && operand
->bitm
== 0xfffe
3247 && operand
->shift
== 0)
3248 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3249 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3250 && operand
->bitm
== 0x1fffffe
3251 && operand
->shift
== 0)
3252 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3253 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3254 && (operand
->bitm
& 0xfff0) == 0xfff0
3255 && operand
->shift
== 0)
3257 reloc
= BFD_RELOC_16
;
3258 #if defined OBJ_XCOFF || defined OBJ_ELF
3259 /* Note: the symbol may be not yet defined. */
3260 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3261 && ppc_is_toc_sym (ex
.X_add_symbol
))
3263 reloc
= BFD_RELOC_PPC_TOC16
;
3265 as_warn (_("assuming %s on symbol"),
3266 ppc_obj64
? "@toc" : "@xgot");
3272 /* For the absolute forms of branches, convert the PC
3273 relative form back into the absolute. */
3274 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3278 case BFD_RELOC_PPC_B26
:
3279 reloc
= BFD_RELOC_PPC_BA26
;
3281 case BFD_RELOC_PPC_B16
:
3282 reloc
= BFD_RELOC_PPC_BA16
;
3285 case BFD_RELOC_PPC_B16_BRTAKEN
:
3286 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3288 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3289 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3300 case BFD_RELOC_PPC_TOC16
:
3301 toc_reloc_types
|= has_small_toc_reloc
;
3303 case BFD_RELOC_PPC64_TOC16_LO
:
3304 case BFD_RELOC_PPC64_TOC16_HI
:
3305 case BFD_RELOC_PPC64_TOC16_HA
:
3306 toc_reloc_types
|= has_large_toc_reloc
;
3313 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3318 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3320 case BFD_RELOC_LO16
:
3321 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3323 case BFD_RELOC_16_GOTOFF
:
3324 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3326 case BFD_RELOC_LO16_GOTOFF
:
3327 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3329 case BFD_RELOC_LO16_PLTOFF
:
3330 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3332 case BFD_RELOC_16_BASEREL
:
3333 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3335 case BFD_RELOC_LO16_BASEREL
:
3336 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3338 case BFD_RELOC_PPC_TOC16
:
3339 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3341 case BFD_RELOC_PPC64_TOC16_LO
:
3342 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3344 case BFD_RELOC_PPC64_PLTGOT16
:
3345 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3347 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3348 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3350 case BFD_RELOC_PPC_DTPREL16
:
3351 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3353 case BFD_RELOC_PPC_DTPREL16_LO
:
3354 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3356 case BFD_RELOC_PPC_TPREL16
:
3357 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3359 case BFD_RELOC_PPC_TPREL16_LO
:
3360 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3362 case BFD_RELOC_PPC_GOT_DTPREL16
:
3363 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3364 case BFD_RELOC_PPC_GOT_TPREL16
:
3365 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3368 as_bad (_("unsupported relocation for DS offset field"));
3374 /* We need to generate a fixup for this expression. */
3375 if (fc
>= MAX_INSN_FIXUPS
)
3376 as_fatal (_("too many fixups"));
3377 fixups
[fc
].exp
= ex
;
3378 fixups
[fc
].opindex
= *opindex_ptr
;
3379 fixups
[fc
].reloc
= reloc
;
3387 /* If expecting more operands, then we want to see "),". */
3388 if (*str
== endc
&& opindex_ptr
[1] != 0)
3392 while (ISSPACE (*str
));
3396 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3404 /* The call to expression should have advanced str past any
3407 && (endc
!= ',' || *str
!= '\0'))
3410 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3412 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3420 while (ISSPACE (*str
))
3424 as_bad (_("junk at end of line: `%s'"), str
);
3427 /* Do we need/want an APUinfo section? */
3428 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3431 /* These are all version "1". */
3432 if (opcode
->flags
& PPC_OPCODE_SPE
)
3433 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3434 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3435 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3436 if (opcode
->flags
& PPC_OPCODE_EFS
)
3437 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3438 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3439 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3440 if (opcode
->flags
& PPC_OPCODE_PMR
)
3441 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3442 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3443 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3444 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3445 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3446 /* Only set the VLE flag if the instruction has been pulled via
3447 the VLE instruction set. This way the flag is guaranteed to
3448 be set for VLE-only instructions or for VLE-only processors,
3449 however it'll remain clear for dual-mode instructions on
3450 dual-mode and, more importantly, standard-mode processors. */
3451 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3453 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3454 if (elf_section_data (now_seg
) != NULL
)
3455 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3460 /* Write out the instruction. */
3461 /* Differentiate between two and four byte insns. */
3462 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3464 if (PPC_OP_SE_VLE (insn
))
3468 addr_mod
= frag_now_fix () & 1;
3473 addr_mod
= frag_now_fix () & 3;
3475 /* All instructions can start on a 2 byte boundary for VLE. */
3476 f
= frag_more (insn_length
);
3477 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
3479 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3480 as_bad (_("instruction address is not a multiple of 2"));
3482 as_bad (_("instruction address is not a multiple of 4"));
3484 frag_now
->insn_addr
= addr_mod
;
3485 frag_now
->has_code
= 1;
3486 md_number_to_chars (f
, insn
, insn_length
);
3489 last_subseg
= now_subseg
;
3492 dwarf2_emit_insn (insn_length
);
3495 /* Create any fixups. */
3496 for (i
= 0; i
< fc
; i
++)
3499 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3501 reloc_howto_type
*reloc_howto
;
3505 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, fixups
[i
].reloc
);
3509 size
= bfd_get_reloc_size (reloc_howto
);
3510 offset
= target_big_endian
? (insn_length
- size
) : 0;
3512 fixP
= fix_new_exp (frag_now
,
3513 f
- frag_now
->fr_literal
+ offset
,
3516 reloc_howto
->pc_relative
,
3521 const struct powerpc_operand
*operand
;
3523 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3524 fixP
= fix_new_exp (frag_now
,
3525 f
- frag_now
->fr_literal
,
3528 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3531 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3535 /* Handle a macro. Gather all the operands, transform them as
3536 described by the macro, and call md_assemble recursively. All the
3537 operands are separated by commas; we don't accept parentheses
3538 around operands here. */
3541 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
3552 /* Gather the users operands into the operands array. */
3557 if (count
>= sizeof operands
/ sizeof operands
[0])
3559 operands
[count
++] = s
;
3560 s
= strchr (s
, ',');
3561 if (s
== (char *) NULL
)
3566 if (count
!= macro
->operands
)
3568 as_bad (_("wrong number of operands"));
3572 /* Work out how large the string must be (the size is unbounded
3573 because it includes user input). */
3575 format
= macro
->format
;
3576 while (*format
!= '\0')
3585 arg
= strtol (format
+ 1, &send
, 10);
3586 know (send
!= format
&& arg
< count
);
3587 len
+= strlen (operands
[arg
]);
3592 /* Put the string together. */
3593 complete
= s
= XNEWVEC (char, len
+ 1);
3594 format
= macro
->format
;
3595 while (*format
!= '\0')
3601 arg
= strtol (format
+ 1, &send
, 10);
3602 strcpy (s
, operands
[arg
]);
3609 /* Assemble the constructed instruction. */
3610 md_assemble (complete
);
3615 /* For ELF, add support for SHT_ORDERED. */
3618 ppc_section_type (char *str
, size_t len
)
3620 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
3627 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
3629 if (type
== SHT_ORDERED
)
3630 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
3634 #endif /* OBJ_ELF */
3637 /* Pseudo-op handling. */
3639 /* The .byte pseudo-op. This is similar to the normal .byte
3640 pseudo-op, but it can also take a single ASCII string. */
3643 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
3647 if (*input_line_pointer
!= '\"')
3653 /* Gather characters. A real double quote is doubled. Unusual
3654 characters are not permitted. */
3655 ++input_line_pointer
;
3660 c
= *input_line_pointer
++;
3664 if (*input_line_pointer
!= '\"')
3666 ++input_line_pointer
;
3669 FRAG_APPEND_1_CHAR (c
);
3673 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
3674 as_warn (_("data in executable section"));
3675 demand_empty_rest_of_line ();
3680 /* XCOFF specific pseudo-op handling. */
3682 /* This is set if we are creating a .stabx symbol, since we don't want
3683 to handle symbol suffixes for such symbols. */
3684 static bfd_boolean ppc_stab_symbol
;
3686 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3687 symbols in the .bss segment as though they were local common
3688 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3689 aligns .comm and .lcomm to 4 bytes. */
3692 ppc_comm (int lcomm
)
3694 asection
*current_seg
= now_seg
;
3695 subsegT current_subseg
= now_subseg
;
3701 symbolS
*lcomm_sym
= NULL
;
3705 endc
= get_symbol_name (&name
);
3706 end_name
= input_line_pointer
;
3707 (void) restore_line_pointer (endc
);
3709 if (*input_line_pointer
!= ',')
3711 as_bad (_("missing size"));
3712 ignore_rest_of_line ();
3715 ++input_line_pointer
;
3717 size
= get_absolute_expression ();
3720 as_bad (_("negative size"));
3721 ignore_rest_of_line ();
3727 /* The third argument to .comm is the alignment. */
3728 if (*input_line_pointer
!= ',')
3732 ++input_line_pointer
;
3733 align
= get_absolute_expression ();
3736 as_warn (_("ignoring bad alignment"));
3746 /* The third argument to .lcomm appears to be the real local
3747 common symbol to create. References to the symbol named in
3748 the first argument are turned into references to the third
3750 if (*input_line_pointer
!= ',')
3752 as_bad (_("missing real symbol name"));
3753 ignore_rest_of_line ();
3756 ++input_line_pointer
;
3758 lcomm_endc
= get_symbol_name (&lcomm_name
);
3760 lcomm_sym
= symbol_find_or_make (lcomm_name
);
3762 (void) restore_line_pointer (lcomm_endc
);
3764 /* The fourth argument to .lcomm is the alignment. */
3765 if (*input_line_pointer
!= ',')
3774 ++input_line_pointer
;
3775 align
= get_absolute_expression ();
3778 as_warn (_("ignoring bad alignment"));
3785 sym
= symbol_find_or_make (name
);
3788 if (S_IS_DEFINED (sym
)
3789 || S_GET_VALUE (sym
) != 0)
3791 as_bad (_("attempt to redefine symbol"));
3792 ignore_rest_of_line ();
3796 record_alignment (bss_section
, align
);
3799 || ! S_IS_DEFINED (lcomm_sym
))
3808 S_SET_EXTERNAL (sym
);
3812 symbol_get_tc (lcomm_sym
)->output
= 1;
3813 def_sym
= lcomm_sym
;
3817 subseg_set (bss_section
, 1);
3818 frag_align (align
, 0, 0);
3820 symbol_set_frag (def_sym
, frag_now
);
3821 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
3822 def_size
, (char *) NULL
);
3824 S_SET_SEGMENT (def_sym
, bss_section
);
3825 symbol_get_tc (def_sym
)->align
= align
;
3829 /* Align the size of lcomm_sym. */
3830 symbol_get_frag (lcomm_sym
)->fr_offset
=
3831 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
3832 &~ ((1 << align
) - 1));
3833 if (align
> symbol_get_tc (lcomm_sym
)->align
)
3834 symbol_get_tc (lcomm_sym
)->align
= align
;
3839 /* Make sym an offset from lcomm_sym. */
3840 S_SET_SEGMENT (sym
, bss_section
);
3841 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
3842 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
3843 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
3846 subseg_set (current_seg
, current_subseg
);
3848 demand_empty_rest_of_line ();
3851 /* The .csect pseudo-op. This switches us into a different
3852 subsegment. The first argument is a symbol whose value is the
3853 start of the .csect. In COFF, csect symbols get special aux
3854 entries defined by the x_csect field of union internal_auxent. The
3855 optional second argument is the alignment (the default is 2). */
3858 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
3865 endc
= get_symbol_name (&name
);
3867 sym
= symbol_find_or_make (name
);
3869 (void) restore_line_pointer (endc
);
3871 if (S_GET_NAME (sym
)[0] == '\0')
3873 /* An unnamed csect is assumed to be [PR]. */
3874 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
3878 if (*input_line_pointer
== ',')
3880 ++input_line_pointer
;
3881 align
= get_absolute_expression ();
3884 ppc_change_csect (sym
, align
);
3886 demand_empty_rest_of_line ();
3889 /* Change to a different csect. */
3892 ppc_change_csect (symbolS
*sym
, offsetT align
)
3894 if (S_IS_DEFINED (sym
))
3895 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
3905 /* This is a new csect. We need to look at the symbol class to
3906 figure out whether it should go in the text section or the
3910 switch (symbol_get_tc (sym
)->symbol_class
)
3920 S_SET_SEGMENT (sym
, text_section
);
3921 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
3922 ++ppc_text_subsegment
;
3923 list_ptr
= &ppc_text_csects
;
3933 if (ppc_toc_csect
!= NULL
3934 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
3935 == ppc_data_subsegment
))
3937 S_SET_SEGMENT (sym
, data_section
);
3938 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
3939 ++ppc_data_subsegment
;
3940 list_ptr
= &ppc_data_csects
;
3946 /* We set the obstack chunk size to a small value before
3947 changing subsegments, so that we don't use a lot of memory
3948 space for what may be a small section. */
3949 hold_chunksize
= chunksize
;
3952 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
3953 symbol_get_tc (sym
)->subseg
);
3955 chunksize
= hold_chunksize
;
3958 ppc_after_toc_frag
= frag_now
;
3960 record_alignment (sec
, align
);
3962 frag_align_code (align
, 0);
3964 frag_align (align
, 0, 0);
3966 symbol_set_frag (sym
, frag_now
);
3967 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
3969 symbol_get_tc (sym
)->align
= align
;
3970 symbol_get_tc (sym
)->output
= 1;
3971 symbol_get_tc (sym
)->within
= sym
;
3973 for (list
= *list_ptr
;
3974 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
3975 list
= symbol_get_tc (list
)->next
)
3977 symbol_get_tc (list
)->next
= sym
;
3979 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
3980 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
3984 ppc_current_csect
= sym
;
3988 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
3992 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
3994 sec
= subseg_new (dw
->name
, subseg
);
3995 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
3996 if (oldflags
== SEC_NO_FLAGS
)
3998 /* Just created section. */
3999 gas_assert (dw_sections
[idx
].sect
== NULL
);
4001 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4002 bfd_set_section_alignment (stdoutput
, sec
, 0);
4003 dw_sections
[idx
].sect
= sec
;
4006 /* Not anymore in a csect. */
4007 ppc_current_csect
= NULL
;
4010 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4011 .dwsect flag [, opt-label ]
4015 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4019 const struct xcoff_dwsect_name
*dw
;
4020 struct dw_subsection
*subseg
;
4021 struct dw_section
*dws
;
4025 flag
= get_absolute_expression ();
4027 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4028 if (xcoff_dwsect_names
[i
].flag
== flag
)
4030 dw
= &xcoff_dwsect_names
[i
];
4034 /* Parse opt-label. */
4035 if (*input_line_pointer
== ',')
4040 ++input_line_pointer
;
4042 c
= get_symbol_name (&label
);
4043 opt_label
= symbol_find_or_make (label
);
4044 (void) restore_line_pointer (c
);
4049 demand_empty_rest_of_line ();
4051 /* Return now in case of unknown subsection. */
4054 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4059 /* Find the subsection. */
4060 dws
= &dw_sections
[i
];
4062 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4064 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4065 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4067 as_bad (_("label %s was not defined in this dwarf section"),
4068 S_GET_NAME (opt_label
));
4069 subseg
= dws
->anon_subseg
;
4073 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4078 /* Switch to the subsection. */
4079 ppc_change_debug_section (i
, subseg
->subseg
);
4083 /* Create a new dw subsection. */
4084 subseg
= XNEW (struct dw_subsection
);
4086 if (opt_label
== NULL
)
4088 /* The anonymous one. */
4090 subseg
->link
= NULL
;
4091 dws
->anon_subseg
= subseg
;
4096 if (dws
->list_subseg
!= NULL
)
4097 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4101 subseg
->link
= dws
->list_subseg
;
4102 dws
->list_subseg
= subseg
;
4103 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4106 ppc_change_debug_section (i
, subseg
->subseg
);
4110 /* Add the length field. */
4111 expressionS
*exp
= &subseg
->end_exp
;
4114 if (opt_label
!= NULL
)
4115 symbol_set_value_now (opt_label
);
4117 /* Add the length field. Note that according to the AIX assembler
4118 manual, the size of the length field is 4 for powerpc32 but
4119 12 for powerpc64. */
4122 /* Write the 64bit marker. */
4123 md_number_to_chars (frag_more (4), -1, 4);
4126 exp
->X_op
= O_subtract
;
4127 exp
->X_op_symbol
= symbol_temp_new_now ();
4128 exp
->X_add_symbol
= symbol_temp_make ();
4130 sz
= ppc_obj64
? 8 : 4;
4131 exp
->X_add_number
= -sz
;
4132 emit_expr (exp
, sz
);
4137 /* This function handles the .text and .data pseudo-ops. These
4138 pseudo-ops aren't really used by XCOFF; we implement them for the
4139 convenience of people who aren't used to XCOFF. */
4142 ppc_section (int type
)
4149 else if (type
== 'd')
4154 sym
= symbol_find_or_make (name
);
4156 ppc_change_csect (sym
, 2);
4158 demand_empty_rest_of_line ();
4161 /* This function handles the .section pseudo-op. This is mostly to
4162 give an error, since XCOFF only supports .text, .data and .bss, but
4163 we do permit the user to name the text or data section. */
4166 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4169 const char *real_name
;
4173 c
= get_symbol_name (&user_name
);
4175 if (strcmp (user_name
, ".text") == 0)
4176 real_name
= ".text[PR]";
4177 else if (strcmp (user_name
, ".data") == 0)
4178 real_name
= ".data[RW]";
4181 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4182 (void) restore_line_pointer (c
);
4183 ignore_rest_of_line ();
4187 (void) restore_line_pointer (c
);
4189 sym
= symbol_find_or_make (real_name
);
4191 ppc_change_csect (sym
, 2);
4193 demand_empty_rest_of_line ();
4196 /* The .extern pseudo-op. We create an undefined symbol. */
4199 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4204 endc
= get_symbol_name (&name
);
4206 (void) symbol_find_or_make (name
);
4208 (void) restore_line_pointer (endc
);
4210 demand_empty_rest_of_line ();
4213 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4216 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4222 endc
= get_symbol_name (&name
);
4224 sym
= symbol_find_or_make (name
);
4226 (void) restore_line_pointer (endc
);
4228 symbol_get_tc (sym
)->output
= 1;
4230 demand_empty_rest_of_line ();
4233 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4234 relocations at the beginning of the current csect.
4236 (In principle, there's no reason why the relocations _have_ to be at
4237 the beginning. Anywhere in the csect would do. However, inserting
4238 at the beginning is what the native assembler does, and it helps to
4239 deal with cases where the .ref statements follow the section contents.)
4241 ??? .refs don't work for empty .csects. However, the native assembler
4242 doesn't report an error in this case, and neither yet do we. */
4245 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4250 if (ppc_current_csect
== NULL
)
4252 as_bad (_(".ref outside .csect"));
4253 ignore_rest_of_line ();
4259 c
= get_symbol_name (&name
);
4261 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4262 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4264 *input_line_pointer
= c
;
4265 SKIP_WHITESPACE_AFTER_NAME ();
4266 c
= *input_line_pointer
;
4269 input_line_pointer
++;
4271 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4273 as_bad (_("missing symbol name"));
4274 ignore_rest_of_line ();
4281 demand_empty_rest_of_line ();
4284 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4285 although I don't know why it bothers. */
4288 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4295 endc
= get_symbol_name (&name
);
4297 sym
= symbol_find_or_make (name
);
4299 (void) restore_line_pointer (endc
);
4301 if (*input_line_pointer
!= ',')
4303 as_bad (_("missing rename string"));
4304 ignore_rest_of_line ();
4307 ++input_line_pointer
;
4309 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4311 demand_empty_rest_of_line ();
4314 /* The .stabx pseudo-op. This is similar to a normal .stabs
4315 pseudo-op, but slightly different. A sample is
4316 .stabx "main:F-1",.main,142,0
4317 The first argument is the symbol name to create. The second is the
4318 value, and the third is the storage class. The fourth seems to be
4319 always zero, and I am assuming it is the type. */
4322 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4329 name
= demand_copy_C_string (&len
);
4331 if (*input_line_pointer
!= ',')
4333 as_bad (_("missing value"));
4336 ++input_line_pointer
;
4338 ppc_stab_symbol
= TRUE
;
4339 sym
= symbol_make (name
);
4340 ppc_stab_symbol
= FALSE
;
4342 symbol_get_tc (sym
)->real_name
= name
;
4344 (void) expression (&exp
);
4351 as_bad (_("illegal .stabx expression; zero assumed"));
4352 exp
.X_add_number
= 0;
4355 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4356 symbol_set_frag (sym
, &zero_address_frag
);
4360 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4361 symbol_set_value_expression (sym
, &exp
);
4365 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4366 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4371 /* The value is some complex expression. This will probably
4372 fail at some later point, but this is probably the right
4373 thing to do here. */
4374 symbol_set_value_expression (sym
, &exp
);
4378 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4379 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4381 if (*input_line_pointer
!= ',')
4383 as_bad (_("missing class"));
4386 ++input_line_pointer
;
4388 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4390 if (*input_line_pointer
!= ',')
4392 as_bad (_("missing type"));
4395 ++input_line_pointer
;
4397 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4399 symbol_get_tc (sym
)->output
= 1;
4401 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4406 .stabx "z",arrays_,133,0
4409 .comm arrays_,13768,3
4411 resolve_symbol_value will copy the exp's "within" into sym's when the
4412 offset is 0. Since this seems to be corner case problem,
4413 only do the correction for storage class C_STSYM. A better solution
4414 would be to have the tc field updated in ppc_symbol_new_hook. */
4416 if (exp
.X_op
== O_symbol
)
4418 if (ppc_current_block
== NULL
)
4419 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4421 symbol_get_tc (sym
)->within
= ppc_current_block
;
4422 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4426 if (exp
.X_op
!= O_symbol
4427 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4428 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4429 ppc_frob_label (sym
);
4432 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4433 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4434 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4435 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4438 demand_empty_rest_of_line ();
4441 /* The .function pseudo-op. This takes several arguments. The first
4442 argument seems to be the external name of the symbol. The second
4443 argument seems to be the label for the start of the function. gcc
4444 uses the same name for both. I have no idea what the third and
4445 fourth arguments are meant to be. The optional fifth argument is
4446 an expression for the size of the function. In COFF this symbol
4447 gets an aux entry like that used for a csect. */
4450 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4458 endc
= get_symbol_name (&name
);
4460 /* Ignore any [PR] suffix. */
4461 name
= ppc_canonicalize_symbol_name (name
);
4462 s
= strchr (name
, '[');
4463 if (s
!= (char *) NULL
4464 && strcmp (s
+ 1, "PR]") == 0)
4467 ext_sym
= symbol_find_or_make (name
);
4469 (void) restore_line_pointer (endc
);
4471 if (*input_line_pointer
!= ',')
4473 as_bad (_("missing symbol name"));
4474 ignore_rest_of_line ();
4477 ++input_line_pointer
;
4479 endc
= get_symbol_name (&name
);
4481 lab_sym
= symbol_find_or_make (name
);
4483 (void) restore_line_pointer (endc
);
4485 if (ext_sym
!= lab_sym
)
4489 exp
.X_op
= O_symbol
;
4490 exp
.X_add_symbol
= lab_sym
;
4491 exp
.X_op_symbol
= NULL
;
4492 exp
.X_add_number
= 0;
4494 symbol_set_value_expression (ext_sym
, &exp
);
4497 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4498 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4499 symbol_get_tc (ext_sym
)->output
= 1;
4501 if (*input_line_pointer
== ',')
4505 /* Ignore the third argument. */
4506 ++input_line_pointer
;
4508 if (*input_line_pointer
== ',')
4510 /* Ignore the fourth argument. */
4511 ++input_line_pointer
;
4513 if (*input_line_pointer
== ',')
4515 /* The fifth argument is the function size. */
4516 ++input_line_pointer
;
4517 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
4518 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
4519 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4524 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4525 SF_SET_FUNCTION (ext_sym
);
4526 SF_SET_PROCESS (ext_sym
);
4527 coff_add_linesym (ext_sym
);
4529 demand_empty_rest_of_line ();
4532 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4533 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4534 with the correct line number */
4536 static symbolS
*saved_bi_sym
= 0;
4539 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
4543 sym
= symbol_make (".bf");
4544 S_SET_SEGMENT (sym
, text_section
);
4545 symbol_set_frag (sym
, frag_now
);
4546 S_SET_VALUE (sym
, frag_now_fix ());
4547 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4549 coff_line_base
= get_absolute_expression ();
4551 S_SET_NUMBER_AUXILIARY (sym
, 1);
4552 SA_SET_SYM_LNNO (sym
, coff_line_base
);
4554 /* Line number for bi. */
4557 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
4562 symbol_get_tc (sym
)->output
= 1;
4564 ppc_frob_label (sym
);
4566 demand_empty_rest_of_line ();
4569 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4570 ".ef", except that the line number is absolute, not relative to the
4571 most recent ".bf" symbol. */
4574 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
4578 sym
= symbol_make (".ef");
4579 S_SET_SEGMENT (sym
, text_section
);
4580 symbol_set_frag (sym
, frag_now
);
4581 S_SET_VALUE (sym
, frag_now_fix ());
4582 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4583 S_SET_NUMBER_AUXILIARY (sym
, 1);
4584 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4585 symbol_get_tc (sym
)->output
= 1;
4587 ppc_frob_label (sym
);
4589 demand_empty_rest_of_line ();
4592 /* The .bi and .ei pseudo-ops. These take a string argument and
4593 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4594 the symbol list. The value of .bi will be know when the next .bf
4600 static symbolS
*last_biei
;
4607 name
= demand_copy_C_string (&len
);
4609 /* The value of these symbols is actually file offset. Here we set
4610 the value to the index into the line number entries. In
4611 ppc_frob_symbols we set the fix_line field, which will cause BFD
4612 to do the right thing. */
4614 sym
= symbol_make (name
);
4615 /* obj-coff.c currently only handles line numbers correctly in the
4617 S_SET_SEGMENT (sym
, text_section
);
4618 S_SET_VALUE (sym
, coff_n_line_nos
);
4619 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4621 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
4622 symbol_get_tc (sym
)->output
= 1;
4630 for (look
= last_biei
? last_biei
: symbol_rootP
;
4631 (look
!= (symbolS
*) NULL
4632 && (S_GET_STORAGE_CLASS (look
) == C_FILE
4633 || S_GET_STORAGE_CLASS (look
) == C_BINCL
4634 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
4635 look
= symbol_next (look
))
4637 if (look
!= (symbolS
*) NULL
)
4639 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4640 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
4644 demand_empty_rest_of_line ();
4647 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4648 There is one argument, which is a csect symbol. The value of the
4649 .bs symbol is the index of this csect symbol. */
4652 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
4659 if (ppc_current_block
!= NULL
)
4660 as_bad (_("nested .bs blocks"));
4662 endc
= get_symbol_name (&name
);
4664 csect
= symbol_find_or_make (name
);
4666 (void) restore_line_pointer (endc
);
4668 sym
= symbol_make (".bs");
4669 S_SET_SEGMENT (sym
, now_seg
);
4670 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
4671 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4672 symbol_get_tc (sym
)->output
= 1;
4674 symbol_get_tc (sym
)->within
= csect
;
4676 ppc_frob_label (sym
);
4678 ppc_current_block
= sym
;
4680 demand_empty_rest_of_line ();
4683 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4686 ppc_es (int ignore ATTRIBUTE_UNUSED
)
4690 if (ppc_current_block
== NULL
)
4691 as_bad (_(".es without preceding .bs"));
4693 sym
= symbol_make (".es");
4694 S_SET_SEGMENT (sym
, now_seg
);
4695 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
4696 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4697 symbol_get_tc (sym
)->output
= 1;
4699 ppc_frob_label (sym
);
4701 ppc_current_block
= NULL
;
4703 demand_empty_rest_of_line ();
4706 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4710 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
4714 sym
= symbol_make (".bb");
4715 S_SET_SEGMENT (sym
, text_section
);
4716 symbol_set_frag (sym
, frag_now
);
4717 S_SET_VALUE (sym
, frag_now_fix ());
4718 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4720 S_SET_NUMBER_AUXILIARY (sym
, 1);
4721 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4723 symbol_get_tc (sym
)->output
= 1;
4725 SF_SET_PROCESS (sym
);
4727 ppc_frob_label (sym
);
4729 demand_empty_rest_of_line ();
4732 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4736 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
4740 sym
= symbol_make (".eb");
4741 S_SET_SEGMENT (sym
, text_section
);
4742 symbol_set_frag (sym
, frag_now
);
4743 S_SET_VALUE (sym
, frag_now_fix ());
4744 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4745 S_SET_NUMBER_AUXILIARY (sym
, 1);
4746 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4747 symbol_get_tc (sym
)->output
= 1;
4749 SF_SET_PROCESS (sym
);
4751 ppc_frob_label (sym
);
4753 demand_empty_rest_of_line ();
4756 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4760 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
4766 name
= demand_copy_C_string (&len
);
4767 sym
= symbol_make (name
);
4768 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4769 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4770 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
4771 S_SET_VALUE (sym
, 0);
4772 symbol_get_tc (sym
)->output
= 1;
4774 ppc_frob_label (sym
);
4776 demand_empty_rest_of_line ();
4779 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4782 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
4786 sym
= symbol_make (".ec");
4787 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4788 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4789 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
4790 S_SET_VALUE (sym
, 0);
4791 symbol_get_tc (sym
)->output
= 1;
4793 ppc_frob_label (sym
);
4795 demand_empty_rest_of_line ();
4798 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4801 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
4803 if (ppc_toc_csect
!= (symbolS
*) NULL
)
4804 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
4811 subseg
= ppc_data_subsegment
;
4812 ++ppc_data_subsegment
;
4814 subseg_new (segment_name (data_section
), subseg
);
4815 ppc_toc_frag
= frag_now
;
4817 sym
= symbol_find_or_make ("TOC[TC0]");
4818 symbol_set_frag (sym
, frag_now
);
4819 S_SET_SEGMENT (sym
, data_section
);
4820 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4821 symbol_get_tc (sym
)->subseg
= subseg
;
4822 symbol_get_tc (sym
)->output
= 1;
4823 symbol_get_tc (sym
)->within
= sym
;
4825 ppc_toc_csect
= sym
;
4827 for (list
= ppc_data_csects
;
4828 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4829 list
= symbol_get_tc (list
)->next
)
4831 symbol_get_tc (list
)->next
= sym
;
4833 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4834 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4838 ppc_current_csect
= ppc_toc_csect
;
4840 demand_empty_rest_of_line ();
4843 /* The AIX assembler automatically aligns the operands of a .long or
4844 .short pseudo-op, and we want to be compatible. */
4847 ppc_xcoff_cons (int log_size
)
4849 frag_align (log_size
, 0, 0);
4850 record_alignment (now_seg
, log_size
);
4851 cons (1 << log_size
);
4855 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
4860 (void) expression (&exp
);
4862 if (exp
.X_op
!= O_constant
)
4864 as_bad (_("non-constant byte count"));
4868 byte_count
= exp
.X_add_number
;
4870 if (*input_line_pointer
!= ',')
4872 as_bad (_("missing value"));
4876 ++input_line_pointer
;
4881 ppc_xcoff_end (void)
4885 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4887 struct dw_section
*dws
= &dw_sections
[i
];
4888 struct dw_subsection
*dwss
;
4890 if (dws
->anon_subseg
)
4892 dwss
= dws
->anon_subseg
;
4893 dwss
->link
= dws
->list_subseg
;
4896 dwss
= dws
->list_subseg
;
4898 for (; dwss
!= NULL
; dwss
= dwss
->link
)
4899 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
4901 subseg_set (dws
->sect
, dwss
->subseg
);
4902 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
4907 #endif /* OBJ_XCOFF */
4908 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4910 /* The .tc pseudo-op. This is used when generating either XCOFF or
4911 ELF. This takes two or more arguments.
4913 When generating XCOFF output, the first argument is the name to
4914 give to this location in the toc; this will be a symbol with class
4915 TC. The rest of the arguments are N-byte values to actually put at
4916 this location in the TOC; often there is just one more argument, a
4917 relocatable symbol reference. The size of the value to store
4918 depends on target word size. A 32-bit target uses 4-byte values, a
4919 64-bit target uses 8-byte values.
4921 When not generating XCOFF output, the arguments are the same, but
4922 the first argument is simply ignored. */
4925 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
4929 /* Define the TOC symbol name. */
4935 if (ppc_toc_csect
== (symbolS
*) NULL
4936 || ppc_toc_csect
!= ppc_current_csect
)
4938 as_bad (_(".tc not in .toc section"));
4939 ignore_rest_of_line ();
4943 endc
= get_symbol_name (&name
);
4945 sym
= symbol_find_or_make (name
);
4947 (void) restore_line_pointer (endc
);
4949 if (S_IS_DEFINED (sym
))
4953 label
= symbol_get_tc (ppc_current_csect
)->within
;
4954 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
4956 as_bad (_(".tc with no label"));
4957 ignore_rest_of_line ();
4961 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
4962 symbol_set_frag (label
, symbol_get_frag (sym
));
4963 S_SET_VALUE (label
, S_GET_VALUE (sym
));
4965 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
4966 ++input_line_pointer
;
4971 S_SET_SEGMENT (sym
, now_seg
);
4972 symbol_set_frag (sym
, frag_now
);
4973 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4974 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
4975 symbol_get_tc (sym
)->output
= 1;
4977 ppc_frob_label (sym
);
4980 #endif /* OBJ_XCOFF */
4984 /* Skip the TOC symbol name. */
4985 while (is_part_of_name (*input_line_pointer
)
4986 || *input_line_pointer
== ' '
4987 || *input_line_pointer
== '['
4988 || *input_line_pointer
== ']'
4989 || *input_line_pointer
== '{'
4990 || *input_line_pointer
== '}')
4991 ++input_line_pointer
;
4993 /* Align to a four/eight byte boundary. */
4994 align
= ppc_obj64
? 3 : 2;
4995 frag_align (align
, 0, 0);
4996 record_alignment (now_seg
, align
);
4997 #endif /* OBJ_ELF */
4999 if (*input_line_pointer
!= ',')
5000 demand_empty_rest_of_line ();
5003 ++input_line_pointer
;
5004 cons (ppc_obj64
? 8 : 4);
5008 /* Pseudo-op .machine. */
5011 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5015 #define MAX_HISTORY 100
5016 static ppc_cpu_t
*cpu_history
;
5017 static int curr_hist
;
5021 c
= get_symbol_name (&cpu_string
);
5022 cpu_string
= xstrdup (cpu_string
);
5023 (void) restore_line_pointer (c
);
5025 if (cpu_string
!= NULL
)
5027 ppc_cpu_t old_cpu
= ppc_cpu
;
5031 for (p
= cpu_string
; *p
!= 0; p
++)
5034 if (strcmp (cpu_string
, "push") == 0)
5036 if (cpu_history
== NULL
)
5037 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5039 if (curr_hist
>= MAX_HISTORY
)
5040 as_bad (_(".machine stack overflow"));
5042 cpu_history
[curr_hist
++] = ppc_cpu
;
5044 else if (strcmp (cpu_string
, "pop") == 0)
5047 as_bad (_(".machine stack underflow"));
5049 ppc_cpu
= cpu_history
[--curr_hist
];
5051 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5054 as_bad (_("invalid machine `%s'"), cpu_string
);
5056 if (ppc_cpu
!= old_cpu
)
5057 ppc_setup_opcodes ();
5060 demand_empty_rest_of_line ();
5062 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5066 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5068 /* Set the current section. */
5070 ppc_set_current_section (segT
new)
5072 ppc_previous_section
= ppc_current_section
;
5073 ppc_current_section
= new;
5076 /* pseudo-op: .previous
5077 behaviour: toggles the current section with the previous section.
5079 warnings: "No previous section" */
5082 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5084 if (ppc_previous_section
== NULL
)
5086 as_warn (_("no previous section to return to, ignored."));
5090 subseg_set (ppc_previous_section
, 0);
5092 ppc_set_current_section (ppc_previous_section
);
5095 /* pseudo-op: .pdata
5096 behaviour: predefined read only data section
5100 initial: .section .pdata "adr3"
5101 a - don't know -- maybe a misprint
5102 d - initialized data
5104 3 - double word aligned (that would be 4 byte boundary)
5107 Tag index tables (also known as the function table) for exception
5108 handling, debugging, etc. */
5111 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5113 if (pdata_section
== 0)
5115 pdata_section
= subseg_new (".pdata", 0);
5117 bfd_set_section_flags (stdoutput
, pdata_section
,
5118 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5119 | SEC_READONLY
| SEC_DATA
));
5121 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5125 pdata_section
= subseg_new (".pdata", 0);
5127 ppc_set_current_section (pdata_section
);
5130 /* pseudo-op: .ydata
5131 behaviour: predefined read only data section
5135 initial: .section .ydata "drw3"
5136 a - don't know -- maybe a misprint
5137 d - initialized data
5139 3 - double word aligned (that would be 4 byte boundary)
5141 Tag tables (also known as the scope table) for exception handling,
5145 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5147 if (ydata_section
== 0)
5149 ydata_section
= subseg_new (".ydata", 0);
5150 bfd_set_section_flags (stdoutput
, ydata_section
,
5151 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5152 | SEC_READONLY
| SEC_DATA
));
5154 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5158 ydata_section
= subseg_new (".ydata", 0);
5160 ppc_set_current_section (ydata_section
);
5163 /* pseudo-op: .reldata
5164 behaviour: predefined read write data section
5165 double word aligned (4-byte)
5166 FIXME: relocation is applied to it
5167 FIXME: what's the difference between this and .data?
5170 initial: .section .reldata "drw3"
5171 d - initialized data
5174 3 - double word aligned (that would be 8 byte boundary)
5177 Like .data, but intended to hold data subject to relocation, such as
5178 function descriptors, etc. */
5181 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5183 if (reldata_section
== 0)
5185 reldata_section
= subseg_new (".reldata", 0);
5187 bfd_set_section_flags (stdoutput
, reldata_section
,
5188 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5191 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5195 reldata_section
= subseg_new (".reldata", 0);
5197 ppc_set_current_section (reldata_section
);
5200 /* pseudo-op: .rdata
5201 behaviour: predefined read only data section
5205 initial: .section .rdata "dr3"
5206 d - initialized data
5208 3 - double word aligned (that would be 4 byte boundary) */
5211 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5213 if (rdata_section
== 0)
5215 rdata_section
= subseg_new (".rdata", 0);
5216 bfd_set_section_flags (stdoutput
, rdata_section
,
5217 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5218 | SEC_READONLY
| SEC_DATA
));
5220 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5224 rdata_section
= subseg_new (".rdata", 0);
5226 ppc_set_current_section (rdata_section
);
5229 /* pseudo-op: .ualong
5230 behaviour: much like .int, with the exception that no alignment is
5232 FIXME: test the alignment statement
5237 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5243 /* pseudo-op: .znop <symbol name>
5244 behaviour: Issue a nop instruction
5245 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5246 the supplied symbol name.
5248 warnings: Missing symbol name */
5251 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5254 const struct powerpc_opcode
*opcode
;
5261 /* Strip out the symbol name. */
5262 c
= get_symbol_name (&symbol_name
);
5264 name
= xstrdup (symbol_name
);
5266 sym
= symbol_find_or_make (name
);
5268 *input_line_pointer
= c
;
5270 SKIP_WHITESPACE_AFTER_NAME ();
5272 /* Look up the opcode in the hash table. */
5273 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5275 /* Stick in the nop. */
5276 insn
= opcode
->opcode
;
5278 /* Write out the instruction. */
5280 md_number_to_chars (f
, insn
, 4);
5282 f
- frag_now
->fr_literal
,
5287 BFD_RELOC_16_GOT_PCREL
);
5297 ppc_pe_comm (int lcomm
)
5306 c
= get_symbol_name (&name
);
5308 /* just after name is now '\0'. */
5309 p
= input_line_pointer
;
5311 SKIP_WHITESPACE_AFTER_NAME ();
5312 if (*input_line_pointer
!= ',')
5314 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5315 ignore_rest_of_line ();
5319 input_line_pointer
++; /* skip ',' */
5320 if ((temp
= get_absolute_expression ()) < 0)
5322 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5323 ignore_rest_of_line ();
5329 /* The third argument to .comm is the alignment. */
5330 if (*input_line_pointer
!= ',')
5334 ++input_line_pointer
;
5335 align
= get_absolute_expression ();
5338 as_warn (_("ignoring bad alignment"));
5345 symbolP
= symbol_find_or_make (name
);
5348 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5350 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5351 S_GET_NAME (symbolP
));
5352 ignore_rest_of_line ();
5356 if (S_GET_VALUE (symbolP
))
5358 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5359 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5360 S_GET_NAME (symbolP
),
5361 (long) S_GET_VALUE (symbolP
),
5366 S_SET_VALUE (symbolP
, (valueT
) temp
);
5367 S_SET_EXTERNAL (symbolP
);
5368 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5371 demand_empty_rest_of_line ();
5375 * implement the .section pseudo op:
5376 * .section name {, "flags"}
5378 * | +--- optional flags: 'b' for bss
5380 * +-- section name 'l' for lib
5384 * 'd' (apparently m88k for data)
5386 * But if the argument is not a quoted string, treat it as a
5387 * subsegment number.
5389 * FIXME: this is a copy of the section processing from obj-coff.c, with
5390 * additions/changes for the moto-pas assembler support. There are three
5393 * FIXME: I just noticed this. This doesn't work at all really. It it
5394 * setting bits that bfd probably neither understands or uses. The
5395 * correct approach (?) will have to incorporate extra fields attached
5396 * to the section to hold the system specific stuff. (krk)
5399 * 'a' - unknown - referred to in documentation, but no definition supplied
5400 * 'c' - section has code
5401 * 'd' - section has initialized data
5402 * 'u' - section has uninitialized data
5403 * 'i' - section contains directives (info)
5404 * 'n' - section can be discarded
5405 * 'R' - remove section at link time
5407 * Section Protection:
5408 * 'r' - section is readable
5409 * 'w' - section is writable
5410 * 'x' - section is executable
5411 * 's' - section is sharable
5413 * Section Alignment:
5414 * '0' - align to byte boundary
5415 * '1' - align to halfword boundary
5416 * '2' - align to word boundary
5417 * '3' - align to doubleword boundary
5418 * '4' - align to quadword boundary
5419 * '5' - align to 32 byte boundary
5420 * '6' - align to 64 byte boundary
5425 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5427 /* Strip out the section name. */
5436 c
= get_symbol_name (§ion_name
);
5438 name
= xstrdup (section_name
);
5440 *input_line_pointer
= c
;
5442 SKIP_WHITESPACE_AFTER_NAME ();
5445 flags
= SEC_NO_FLAGS
;
5447 if (strcmp (name
, ".idata$2") == 0)
5451 else if (strcmp (name
, ".idata$3") == 0)
5455 else if (strcmp (name
, ".idata$4") == 0)
5459 else if (strcmp (name
, ".idata$5") == 0)
5463 else if (strcmp (name
, ".idata$6") == 0)
5468 /* Default alignment to 16 byte boundary. */
5471 if (*input_line_pointer
== ',')
5473 ++input_line_pointer
;
5475 if (*input_line_pointer
!= '"')
5476 exp
= get_absolute_expression ();
5479 ++input_line_pointer
;
5480 while (*input_line_pointer
!= '"'
5481 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5483 switch (*input_line_pointer
)
5485 /* Section Contents */
5486 case 'a': /* unknown */
5487 as_bad (_("unsupported section attribute -- 'a'"));
5489 case 'c': /* code section */
5492 case 'd': /* section has initialized data */
5495 case 'u': /* section has uninitialized data */
5496 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5500 case 'i': /* section contains directives (info) */
5501 /* FIXME: This is IMAGE_SCN_LNK_INFO
5503 flags
|= SEC_HAS_CONTENTS
;
5505 case 'n': /* section can be discarded */
5508 case 'R': /* Remove section at link time */
5509 flags
|= SEC_NEVER_LOAD
;
5511 #if IFLICT_BRAIN_DAMAGE
5512 /* Section Protection */
5513 case 'r': /* section is readable */
5514 flags
|= IMAGE_SCN_MEM_READ
;
5516 case 'w': /* section is writable */
5517 flags
|= IMAGE_SCN_MEM_WRITE
;
5519 case 'x': /* section is executable */
5520 flags
|= IMAGE_SCN_MEM_EXECUTE
;
5522 case 's': /* section is sharable */
5523 flags
|= IMAGE_SCN_MEM_SHARED
;
5526 /* Section Alignment */
5527 case '0': /* align to byte boundary */
5528 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
5531 case '1': /* align to halfword boundary */
5532 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
5535 case '2': /* align to word boundary */
5536 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
5539 case '3': /* align to doubleword boundary */
5540 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
5543 case '4': /* align to quadword boundary */
5544 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
5547 case '5': /* align to 32 byte boundary */
5548 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
5551 case '6': /* align to 64 byte boundary */
5552 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
5557 as_bad (_("unknown section attribute '%c'"),
5558 *input_line_pointer
);
5561 ++input_line_pointer
;
5563 if (*input_line_pointer
== '"')
5564 ++input_line_pointer
;
5568 sec
= subseg_new (name
, (subsegT
) exp
);
5570 ppc_set_current_section (sec
);
5572 if (flags
!= SEC_NO_FLAGS
)
5574 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
5575 as_bad (_("error setting flags for \"%s\": %s"),
5576 bfd_section_name (stdoutput
, sec
),
5577 bfd_errmsg (bfd_get_error ()));
5580 bfd_set_section_alignment (stdoutput
, sec
, align
);
5584 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
5590 endc
= get_symbol_name (&name
);
5592 ext_sym
= symbol_find_or_make (name
);
5594 (void) restore_line_pointer (endc
);
5596 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5597 SF_SET_FUNCTION (ext_sym
);
5598 SF_SET_PROCESS (ext_sym
);
5599 coff_add_linesym (ext_sym
);
5601 demand_empty_rest_of_line ();
5605 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
5607 if (tocdata_section
== 0)
5609 tocdata_section
= subseg_new (".tocd", 0);
5610 /* FIXME: section flags won't work. */
5611 bfd_set_section_flags (stdoutput
, tocdata_section
,
5612 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5613 | SEC_READONLY
| SEC_DATA
));
5615 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
5619 rdata_section
= subseg_new (".tocd", 0);
5622 ppc_set_current_section (tocdata_section
);
5624 demand_empty_rest_of_line ();
5627 /* Don't adjust TOC relocs to use the section symbol. */
5630 ppc_pe_fix_adjustable (fixS
*fix
)
5632 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
5639 /* XCOFF specific symbol and file handling. */
5641 /* Canonicalize the symbol name. We use the to force the suffix, if
5642 any, to use square brackets, and to be in upper case. */
5645 ppc_canonicalize_symbol_name (char *name
)
5649 if (ppc_stab_symbol
)
5652 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5666 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5669 if (*s
== '\0' || s
[1] != '\0')
5670 as_bad (_("bad symbol suffix"));
5678 /* Set the class of a symbol based on the suffix, if any. This is
5679 called whenever a new symbol is created. */
5682 ppc_symbol_new_hook (symbolS
*sym
)
5684 struct ppc_tc_sy
*tc
;
5687 tc
= symbol_get_tc (sym
);
5690 tc
->symbol_class
= -1;
5691 tc
->real_name
= NULL
;
5698 if (ppc_stab_symbol
)
5701 s
= strchr (S_GET_NAME (sym
), '[');
5702 if (s
== (const char *) NULL
)
5704 /* There is no suffix. */
5713 if (strcmp (s
, "BS]") == 0)
5714 tc
->symbol_class
= XMC_BS
;
5717 if (strcmp (s
, "DB]") == 0)
5718 tc
->symbol_class
= XMC_DB
;
5719 else if (strcmp (s
, "DS]") == 0)
5720 tc
->symbol_class
= XMC_DS
;
5723 if (strcmp (s
, "GL]") == 0)
5724 tc
->symbol_class
= XMC_GL
;
5727 if (strcmp (s
, "PR]") == 0)
5728 tc
->symbol_class
= XMC_PR
;
5731 if (strcmp (s
, "RO]") == 0)
5732 tc
->symbol_class
= XMC_RO
;
5733 else if (strcmp (s
, "RW]") == 0)
5734 tc
->symbol_class
= XMC_RW
;
5737 if (strcmp (s
, "SV]") == 0)
5738 tc
->symbol_class
= XMC_SV
;
5741 if (strcmp (s
, "TC]") == 0)
5742 tc
->symbol_class
= XMC_TC
;
5743 else if (strcmp (s
, "TI]") == 0)
5744 tc
->symbol_class
= XMC_TI
;
5745 else if (strcmp (s
, "TB]") == 0)
5746 tc
->symbol_class
= XMC_TB
;
5747 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5748 tc
->symbol_class
= XMC_TC0
;
5751 if (strcmp (s
, "UA]") == 0)
5752 tc
->symbol_class
= XMC_UA
;
5753 else if (strcmp (s
, "UC]") == 0)
5754 tc
->symbol_class
= XMC_UC
;
5757 if (strcmp (s
, "XO]") == 0)
5758 tc
->symbol_class
= XMC_XO
;
5762 if (tc
->symbol_class
== -1)
5763 as_bad (_("unrecognized symbol suffix"));
5766 /* Set the class of a label based on where it is defined. This
5767 handles symbols without suffixes. Also, move the symbol so that it
5768 follows the csect symbol. */
5771 ppc_frob_label (symbolS
*sym
)
5773 if (ppc_current_csect
!= (symbolS
*) NULL
)
5775 if (symbol_get_tc (sym
)->symbol_class
== -1)
5776 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
5778 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5779 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
5780 &symbol_rootP
, &symbol_lastP
);
5781 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5782 symbol_get_tc (sym
)->within
= ppc_current_csect
;
5786 dwarf2_emit_label (sym
);
5790 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5791 seen. It tells ppc_adjust_symtab whether it needs to look through
5794 static bfd_boolean ppc_saw_abs
;
5796 /* Change the name of a symbol just before writing it out. Set the
5797 real name if the .rename pseudo-op was used. Otherwise, remove any
5798 class suffix. Return 1 if the symbol should not be included in the
5802 ppc_frob_symbol (symbolS
*sym
)
5804 static symbolS
*ppc_last_function
;
5805 static symbolS
*set_end
;
5807 /* Discard symbols that should not be included in the output symbol
5809 if (! symbol_used_in_reloc_p (sym
)
5810 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5811 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5812 && ! symbol_get_tc (sym
)->output
5813 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5816 /* This one will disappear anyway. Don't make a csect sym for it. */
5817 if (sym
== abs_section_sym
)
5820 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5821 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5827 name
= S_GET_NAME (sym
);
5828 s
= strchr (name
, '[');
5829 if (s
!= (char *) NULL
)
5835 snew
= xstrndup (name
, len
);
5837 S_SET_NAME (sym
, snew
);
5841 if (set_end
!= (symbolS
*) NULL
)
5843 SA_SET_SYM_ENDNDX (set_end
, sym
);
5847 if (SF_GET_FUNCTION (sym
))
5849 if (ppc_last_function
!= (symbolS
*) NULL
)
5850 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5851 ppc_last_function
= sym
;
5852 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5854 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5855 SA_SET_SYM_FSIZE (sym
,
5856 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5859 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5860 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5862 if (ppc_last_function
== (symbolS
*) NULL
)
5863 as_bad (_(".ef with no preceding .function"));
5866 set_end
= ppc_last_function
;
5867 ppc_last_function
= NULL
;
5869 /* We don't have a C_EFCN symbol, but we need to force the
5870 COFF backend to believe that it has seen one. */
5871 coff_last_function
= NULL
;
5875 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5876 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5877 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5878 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5879 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5880 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5881 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5882 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5883 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5884 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5885 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5887 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5888 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5889 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5892 union internal_auxent
*a
;
5894 /* Create a csect aux. */
5895 i
= S_GET_NUMBER_AUXILIARY (sym
);
5896 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5897 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5898 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5900 /* This is the TOC table. */
5901 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5902 a
->x_csect
.x_scnlen
.l
= 0;
5903 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5905 else if (symbol_get_tc (sym
)->subseg
!= 0)
5907 /* This is a csect symbol. x_scnlen is the size of the
5909 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5910 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5911 S_GET_SEGMENT (sym
))
5912 - S_GET_VALUE (sym
));
5915 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5916 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5917 - S_GET_VALUE (sym
));
5919 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
5921 else if (S_GET_SEGMENT (sym
) == bss_section
)
5923 /* This is a common symbol. */
5924 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
5925 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
5926 if (S_IS_EXTERNAL (sym
))
5927 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
5929 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
5931 else if (S_GET_SEGMENT (sym
) == absolute_section
)
5933 /* This is an absolute symbol. The csect will be created by
5934 ppc_adjust_symtab. */
5936 a
->x_csect
.x_smtyp
= XTY_LD
;
5937 if (symbol_get_tc (sym
)->symbol_class
== -1)
5938 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
5940 else if (! S_IS_DEFINED (sym
))
5942 /* This is an external symbol. */
5943 a
->x_csect
.x_scnlen
.l
= 0;
5944 a
->x_csect
.x_smtyp
= XTY_ER
;
5946 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
5950 /* This is a TOC definition. x_scnlen is the size of the
5952 next
= symbol_next (sym
);
5953 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
5954 next
= symbol_next (next
);
5955 if (next
== (symbolS
*) NULL
5956 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
5958 if (ppc_after_toc_frag
== (fragS
*) NULL
)
5959 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5961 - S_GET_VALUE (sym
));
5963 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
5964 - S_GET_VALUE (sym
));
5968 resolve_symbol_value (next
);
5969 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
5970 - S_GET_VALUE (sym
));
5972 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5978 /* This is a normal symbol definition. x_scnlen is the
5979 symbol index of the containing csect. */
5980 if (S_GET_SEGMENT (sym
) == text_section
)
5981 csect
= ppc_text_csects
;
5982 else if (S_GET_SEGMENT (sym
) == data_section
)
5983 csect
= ppc_data_csects
;
5987 /* Skip the initial dummy symbol. */
5988 csect
= symbol_get_tc (csect
)->next
;
5990 if (csect
== (symbolS
*) NULL
)
5992 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
5993 a
->x_csect
.x_scnlen
.l
= 0;
5997 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
5999 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6000 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6001 > S_GET_VALUE (sym
))
6003 csect
= symbol_get_tc (csect
)->next
;
6006 a
->x_csect
.x_scnlen
.p
=
6007 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6008 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6011 a
->x_csect
.x_smtyp
= XTY_LD
;
6014 a
->x_csect
.x_parmhash
= 0;
6015 a
->x_csect
.x_snhash
= 0;
6016 if (symbol_get_tc (sym
)->symbol_class
== -1)
6017 a
->x_csect
.x_smclas
= XMC_PR
;
6019 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6020 a
->x_csect
.x_stab
= 0;
6021 a
->x_csect
.x_snstab
= 0;
6023 /* Don't let the COFF backend resort these symbols. */
6024 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6026 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6028 /* We want the value to be the symbol index of the referenced
6029 csect symbol. BFD will do that for us if we set the right
6031 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6032 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6034 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6035 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6037 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6042 block
= symbol_get_tc (sym
)->within
;
6045 /* The value is the offset from the enclosing csect. */
6048 csect
= symbol_get_tc (block
)->within
;
6049 resolve_symbol_value (csect
);
6050 base
= S_GET_VALUE (csect
);
6055 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6057 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6058 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6060 /* We want the value to be a file offset into the line numbers.
6061 BFD will do that for us if we set the right flags. We have
6062 already set the value correctly. */
6063 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6069 /* Adjust the symbol table. This creates csect symbols for all
6070 absolute symbols. */
6073 ppc_adjust_symtab (void)
6080 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6084 union internal_auxent
*a
;
6086 if (S_GET_SEGMENT (sym
) != absolute_section
)
6089 csect
= symbol_create (".abs[XO]", absolute_section
,
6090 S_GET_VALUE (sym
), &zero_address_frag
);
6091 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6092 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6093 i
= S_GET_NUMBER_AUXILIARY (csect
);
6094 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6095 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6096 a
->x_csect
.x_scnlen
.l
= 0;
6097 a
->x_csect
.x_smtyp
= XTY_SD
;
6098 a
->x_csect
.x_parmhash
= 0;
6099 a
->x_csect
.x_snhash
= 0;
6100 a
->x_csect
.x_smclas
= XMC_XO
;
6101 a
->x_csect
.x_stab
= 0;
6102 a
->x_csect
.x_snstab
= 0;
6104 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6106 i
= S_GET_NUMBER_AUXILIARY (sym
);
6107 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6108 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6109 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6112 ppc_saw_abs
= FALSE
;
6115 /* Set the VMA for a section. This is called on all the sections in
6119 ppc_frob_section (asection
*sec
)
6121 static bfd_vma vma
= 0;
6123 /* Dwarf sections start at 0. */
6124 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6127 vma
= md_section_align (sec
, vma
);
6128 bfd_set_section_vma (stdoutput
, sec
, vma
);
6129 vma
+= bfd_section_size (stdoutput
, sec
);
6132 #endif /* OBJ_XCOFF */
6135 md_atof (int type
, char *litp
, int *sizep
)
6137 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6140 /* Write a value out to the object file, using the appropriate
6144 md_number_to_chars (char *buf
, valueT val
, int n
)
6146 if (target_big_endian
)
6147 number_to_chars_bigendian (buf
, val
, n
);
6149 number_to_chars_littleendian (buf
, val
, n
);
6152 /* Align a section (I don't know why this is machine dependent). */
6155 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6160 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6162 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6166 /* We don't have any form of relaxing. */
6169 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6170 asection
*seg ATTRIBUTE_UNUSED
)
6176 /* Convert a machine dependent frag. We never generate these. */
6179 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6180 asection
*sec ATTRIBUTE_UNUSED
,
6181 fragS
*fragp ATTRIBUTE_UNUSED
)
6186 /* We have no need to default values of symbols. */
6189 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6194 /* Functions concerning relocs. */
6196 /* The location from which a PC relative jump should be calculated,
6197 given a PC relative reloc. */
6200 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6202 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6207 /* This is called to see whether a fixup should be adjusted to use a
6208 section symbol. We take the opportunity to change a fixup against
6209 a symbol in the TOC subsegment into a reloc against the
6210 corresponding .tc symbol. */
6213 ppc_fix_adjustable (fixS
*fix
)
6215 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6216 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6217 TC_SYMFIELD_TYPE
*tc
;
6219 if (symseg
== absolute_section
)
6222 /* Always adjust symbols in debugging sections. */
6223 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6226 if (ppc_toc_csect
!= (symbolS
*) NULL
6227 && fix
->fx_addsy
!= ppc_toc_csect
6228 && symseg
== data_section
6229 && val
>= ppc_toc_frag
->fr_address
6230 && (ppc_after_toc_frag
== (fragS
*) NULL
6231 || val
< ppc_after_toc_frag
->fr_address
))
6235 for (sy
= symbol_next (ppc_toc_csect
);
6236 sy
!= (symbolS
*) NULL
;
6237 sy
= symbol_next (sy
))
6239 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6241 if (sy_tc
->symbol_class
== XMC_TC0
)
6243 if (sy_tc
->symbol_class
!= XMC_TC
)
6245 if (val
== resolve_symbol_value (sy
))
6248 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6253 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6254 _("symbol in .toc does not match any .tc"));
6257 /* Possibly adjust the reloc to be against the csect. */
6258 tc
= symbol_get_tc (fix
->fx_addsy
);
6260 && tc
->symbol_class
!= XMC_TC0
6261 && tc
->symbol_class
!= XMC_TC
6262 && symseg
!= bss_section
6263 /* Don't adjust if this is a reloc in the toc section. */
6264 && (symseg
!= data_section
6265 || ppc_toc_csect
== NULL
6266 || val
< ppc_toc_frag
->fr_address
6267 || (ppc_after_toc_frag
!= NULL
6268 && val
>= ppc_after_toc_frag
->fr_address
)))
6270 symbolS
*csect
= tc
->within
;
6272 /* If the symbol was not declared by a label (eg: a section symbol),
6273 use the section instead of the csect. This doesn't happen in
6274 normal AIX assembly code. */
6276 csect
= seg_info (symseg
)->sym
;
6278 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6279 fix
->fx_addsy
= csect
;
6284 /* Adjust a reloc against a .lcomm symbol to be against the base
6286 if (symseg
== bss_section
6287 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6289 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6291 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6298 /* A reloc from one csect to another must be kept. The assembler
6299 will, of course, keep relocs between sections, and it will keep
6300 absolute relocs, but we need to force it to keep PC relative relocs
6301 between two csects in the same section. */
6304 ppc_force_relocation (fixS
*fix
)
6306 /* At this point fix->fx_addsy should already have been converted to
6307 a csect symbol. If the csect does not include the fragment, then
6308 we need to force the relocation. */
6310 && fix
->fx_addsy
!= NULL
6311 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6312 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6313 > fix
->fx_frag
->fr_address
)
6314 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6315 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6316 <= fix
->fx_frag
->fr_address
))))
6319 return generic_force_reloc (fix
);
6323 ppc_new_dot_label (symbolS
*sym
)
6325 /* Anchor this label to the current csect for relocations. */
6326 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6329 #endif /* OBJ_XCOFF */
6332 /* If this function returns non-zero, it guarantees that a relocation
6333 will be emitted for a fixup. */
6336 ppc_force_relocation (fixS
*fix
)
6338 /* Branch prediction relocations must force a relocation, as must
6339 the vtable description relocs. */
6340 switch (fix
->fx_r_type
)
6342 case BFD_RELOC_PPC_B16_BRTAKEN
:
6343 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6344 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6345 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6346 case BFD_RELOC_24_PLT_PCREL
:
6347 case BFD_RELOC_PPC64_TOC
:
6349 case BFD_RELOC_PPC_B26
:
6350 case BFD_RELOC_PPC_BA26
:
6351 case BFD_RELOC_PPC_B16
:
6352 case BFD_RELOC_PPC_BA16
:
6353 /* All branch fixups targeting a localentry symbol must
6354 force a relocation. */
6357 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6358 elf_symbol_type
*elfsym
6359 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6360 gas_assert (elfsym
);
6361 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6369 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6370 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6373 return generic_force_reloc (fix
);
6377 ppc_fix_adjustable (fixS
*fix
)
6379 switch (fix
->fx_r_type
)
6381 /* All branch fixups targeting a localentry symbol must
6382 continue using the symbol. */
6383 case BFD_RELOC_PPC_B26
:
6384 case BFD_RELOC_PPC_BA26
:
6385 case BFD_RELOC_PPC_B16
:
6386 case BFD_RELOC_PPC_BA16
:
6387 case BFD_RELOC_PPC_B16_BRTAKEN
:
6388 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6389 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6390 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6393 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6394 elf_symbol_type
*elfsym
6395 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6396 gas_assert (elfsym
);
6397 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6405 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6406 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6407 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6408 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6409 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6410 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6411 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6412 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6413 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6414 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6415 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6420 ppc_frag_check (struct frag
*fragP
)
6422 if (!fragP
->has_code
)
6425 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6427 if (((fragP
->fr_address
+ fragP
->insn_addr
) & 1) != 0)
6428 as_bad (_("instruction address is not a multiple of 2"));
6432 if (((fragP
->fr_address
+ fragP
->insn_addr
) & 3) != 0)
6433 as_bad (_("instruction address is not a multiple of 4"));
6437 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6438 rs_align_code frag. */
6441 ppc_handle_align (struct frag
*fragP
)
6443 valueT count
= (fragP
->fr_next
->fr_address
6444 - (fragP
->fr_address
+ fragP
->fr_fix
));
6446 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6448 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6451 md_number_to_chars (dest
, 0x4400, 2);
6453 else if (count
!= 0 && (count
& 3) == 0)
6455 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6459 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6463 /* Make a branch, then follow with nops. Insert another
6464 frag to handle the nops. */
6465 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6470 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6471 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6472 fragP
->fr_next
= rest
;
6474 rest
->fr_address
+= rest
->fr_fix
+ 4;
6476 /* If we leave the next frag as rs_align_code we'll come here
6477 again, resulting in a bunch of branches rather than a
6478 branch followed by nops. */
6479 rest
->fr_type
= rs_align
;
6480 dest
= rest
->fr_literal
;
6483 md_number_to_chars (dest
, 0x60000000, 4);
6485 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6486 || (ppc_cpu
& PPC_OPCODE_POWER7
) != 0
6487 || (ppc_cpu
& PPC_OPCODE_POWER8
) != 0
6488 || (ppc_cpu
& PPC_OPCODE_POWER9
) != 0)
6490 /* For power6, power7, power8 and power9, we want the last nop to be
6491 a group terminating one. Do this by inserting an rs_fill frag
6492 immediately after this one, with its address set to the last nop
6493 location. This will automatically reduce the number of nops in
6494 the current frag by one. */
6497 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6499 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6500 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6501 group_nop
->fr_fix
= 0;
6502 group_nop
->fr_offset
= 1;
6503 group_nop
->fr_type
= rs_fill
;
6504 fragP
->fr_next
= group_nop
;
6505 dest
= group_nop
->fr_literal
;
6508 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0
6509 || (ppc_cpu
& PPC_OPCODE_POWER8
) != 0
6510 || (ppc_cpu
& PPC_OPCODE_POWER9
) != 0)
6512 if (ppc_cpu
& PPC_OPCODE_E500MC
)
6513 /* e500mc group terminating nop: "ori 0,0,0". */
6514 md_number_to_chars (dest
, 0x60000000, 4);
6516 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
6517 md_number_to_chars (dest
, 0x60420000, 4);
6520 /* power6 group terminating nop: "ori 1,1,0". */
6521 md_number_to_chars (dest
, 0x60210000, 4);
6526 /* Apply a fixup to the object code. This is called for all the
6527 fixups we generated by the calls to fix_new_exp, above. */
6530 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6532 valueT value
= * valP
;
6534 const struct powerpc_operand
*operand
;
6537 if (fixP
->fx_addsy
!= NULL
)
6539 /* Hack around bfd_install_relocation brain damage. */
6541 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6543 if (fixP
->fx_addsy
== abs_section_sym
)
6549 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6550 the symbol values. If we are doing this relocation the code in
6551 write.c is going to call bfd_install_relocation, which is also
6552 going to use the symbol value. That means that if the reloc is
6553 fully resolved we want to use *valP since bfd_install_relocation is
6555 However, if the reloc is not fully resolved we do not want to
6556 use *valP, and must use fx_offset instead. If the relocation
6557 is PC-relative, we then need to re-apply md_pcrel_from_section
6558 to this new relocation value. */
6559 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6564 value
= fixP
->fx_offset
;
6566 value
-= md_pcrel_from_section (fixP
, seg
);
6570 /* We are only able to convert some relocs to pc-relative. */
6573 switch (fixP
->fx_r_type
)
6575 case BFD_RELOC_LO16
:
6576 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6579 case BFD_RELOC_HI16
:
6580 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6583 case BFD_RELOC_HI16_S
:
6584 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6588 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6592 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6596 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6599 case BFD_RELOC_PPC_16DX_HA
:
6600 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6607 else if (!fixP
->fx_done
6608 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6610 /* addpcis is relative to next insn address. */
6612 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6617 if (fixP
->fx_pcrel_adjust
!= 0)
6619 /* This is a fixup on an instruction. */
6620 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6622 operand
= &powerpc_operands
[opindex
];
6624 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6625 does not generate a reloc. It uses the offset of `sym' within its
6626 csect. Other usages, such as `.long sym', generate relocs. This
6627 is the documented behaviour of non-TOC symbols. */
6628 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6629 && (operand
->bitm
& 0xfff0) == 0xfff0
6630 && operand
->shift
== 0
6631 && (operand
->insert
== NULL
|| ppc_obj64
)
6632 && fixP
->fx_addsy
!= NULL
6633 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6634 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6635 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6636 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6638 value
= fixP
->fx_offset
;
6642 /* During parsing of instructions, a TOC16 reloc is generated for
6643 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6644 in the toc. But at parse time, SYM may be not yet defined, so
6645 check again here. */
6646 if (fixP
->fx_r_type
== BFD_RELOC_16
6647 && fixP
->fx_addsy
!= NULL
6648 && ppc_is_toc_sym (fixP
->fx_addsy
))
6649 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6653 /* Calculate value to be stored in field. */
6655 switch (fixP
->fx_r_type
)
6658 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6659 case BFD_RELOC_PPC_VLE_LO16A
:
6660 case BFD_RELOC_PPC_VLE_LO16D
:
6662 case BFD_RELOC_LO16
:
6663 case BFD_RELOC_LO16_PCREL
:
6664 fieldval
= value
& 0xffff;
6666 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6667 fieldval
= SEX16 (fieldval
);
6668 fixP
->fx_no_overflow
= 1;
6671 case BFD_RELOC_HI16
:
6672 case BFD_RELOC_HI16_PCREL
:
6674 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6676 fieldval
= value
>> 16;
6677 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6679 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6680 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6686 case BFD_RELOC_PPC_VLE_HI16A
:
6687 case BFD_RELOC_PPC_VLE_HI16D
:
6688 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6690 fieldval
= PPC_HI (value
);
6691 goto sign_extend_16
;
6693 case BFD_RELOC_HI16_S
:
6694 case BFD_RELOC_HI16_S_PCREL
:
6695 case BFD_RELOC_PPC_16DX_HA
:
6696 case BFD_RELOC_PPC_REL16DX_HA
:
6698 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6700 fieldval
= (value
+ 0x8000) >> 16;
6701 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6703 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6704 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6710 case BFD_RELOC_PPC_VLE_HA16A
:
6711 case BFD_RELOC_PPC_VLE_HA16D
:
6712 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6714 fieldval
= PPC_HA (value
);
6715 goto sign_extend_16
;
6718 case BFD_RELOC_PPC64_HIGHER
:
6719 fieldval
= PPC_HIGHER (value
);
6720 goto sign_extend_16
;
6722 case BFD_RELOC_PPC64_HIGHER_S
:
6723 fieldval
= PPC_HIGHERA (value
);
6724 goto sign_extend_16
;
6726 case BFD_RELOC_PPC64_HIGHEST
:
6727 fieldval
= PPC_HIGHEST (value
);
6728 goto sign_extend_16
;
6730 case BFD_RELOC_PPC64_HIGHEST_S
:
6731 fieldval
= PPC_HIGHESTA (value
);
6732 goto sign_extend_16
;
6739 if (operand
!= NULL
)
6741 /* Handle relocs in an insn. */
6742 switch (fixP
->fx_r_type
)
6745 /* The following relocs can't be calculated by the assembler.
6746 Leave the field zero. */
6747 case BFD_RELOC_PPC_TPREL16
:
6748 case BFD_RELOC_PPC_TPREL16_LO
:
6749 case BFD_RELOC_PPC_TPREL16_HI
:
6750 case BFD_RELOC_PPC_TPREL16_HA
:
6751 case BFD_RELOC_PPC_DTPREL16
:
6752 case BFD_RELOC_PPC_DTPREL16_LO
:
6753 case BFD_RELOC_PPC_DTPREL16_HI
:
6754 case BFD_RELOC_PPC_DTPREL16_HA
:
6755 case BFD_RELOC_PPC_GOT_TLSGD16
:
6756 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6757 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6758 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6759 case BFD_RELOC_PPC_GOT_TLSLD16
:
6760 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6761 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6762 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6763 case BFD_RELOC_PPC_GOT_TPREL16
:
6764 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6765 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6766 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6767 case BFD_RELOC_PPC_GOT_DTPREL16
:
6768 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6769 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6770 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6771 case BFD_RELOC_PPC64_TPREL16_DS
:
6772 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6773 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6774 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6775 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6776 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6777 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6778 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6779 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6780 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6781 case BFD_RELOC_PPC64_DTPREL16_DS
:
6782 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6783 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6784 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6785 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6786 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6787 gas_assert (fixP
->fx_addsy
!= NULL
);
6788 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6792 /* These also should leave the field zero for the same
6793 reason. Note that older versions of gas wrote values
6794 here. If we want to go back to the old behaviour, then
6795 all _LO and _LO_DS cases will need to be treated like
6796 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6797 case BFD_RELOC_16_GOTOFF
:
6798 case BFD_RELOC_LO16_GOTOFF
:
6799 case BFD_RELOC_HI16_GOTOFF
:
6800 case BFD_RELOC_HI16_S_GOTOFF
:
6801 case BFD_RELOC_LO16_PLTOFF
:
6802 case BFD_RELOC_HI16_PLTOFF
:
6803 case BFD_RELOC_HI16_S_PLTOFF
:
6804 case BFD_RELOC_GPREL16
:
6805 case BFD_RELOC_16_BASEREL
:
6806 case BFD_RELOC_LO16_BASEREL
:
6807 case BFD_RELOC_HI16_BASEREL
:
6808 case BFD_RELOC_HI16_S_BASEREL
:
6809 case BFD_RELOC_PPC_TOC16
:
6810 case BFD_RELOC_PPC64_TOC16_LO
:
6811 case BFD_RELOC_PPC64_TOC16_HI
:
6812 case BFD_RELOC_PPC64_TOC16_HA
:
6813 case BFD_RELOC_PPC64_PLTGOT16
:
6814 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6815 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6816 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6817 case BFD_RELOC_PPC64_GOT16_DS
:
6818 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6819 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6820 case BFD_RELOC_PPC64_SECTOFF_DS
:
6821 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6822 case BFD_RELOC_PPC64_TOC16_DS
:
6823 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6824 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6825 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6826 case BFD_RELOC_PPC_EMB_NADDR16
:
6827 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6828 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6829 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6830 case BFD_RELOC_PPC_EMB_SDAI16
:
6831 case BFD_RELOC_PPC_EMB_SDA2I16
:
6832 case BFD_RELOC_PPC_EMB_SDA2REL
:
6833 case BFD_RELOC_PPC_EMB_SDA21
:
6834 case BFD_RELOC_PPC_EMB_MRKREF
:
6835 case BFD_RELOC_PPC_EMB_RELSEC16
:
6836 case BFD_RELOC_PPC_EMB_RELST_LO
:
6837 case BFD_RELOC_PPC_EMB_RELST_HI
:
6838 case BFD_RELOC_PPC_EMB_RELST_HA
:
6839 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6840 case BFD_RELOC_PPC_EMB_RELSDA
:
6841 case BFD_RELOC_PPC_VLE_SDA21
:
6842 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6843 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6844 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6845 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6846 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6847 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6848 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6849 gas_assert (fixP
->fx_addsy
!= NULL
);
6852 case BFD_RELOC_PPC_TLS
:
6853 case BFD_RELOC_PPC_TLSGD
:
6854 case BFD_RELOC_PPC_TLSLD
:
6860 case BFD_RELOC_PPC_B16
:
6861 /* Adjust the offset to the instruction boundary. */
6866 case BFD_RELOC_VTABLE_INHERIT
:
6867 case BFD_RELOC_VTABLE_ENTRY
:
6868 case BFD_RELOC_PPC_DTPMOD
:
6869 case BFD_RELOC_PPC_TPREL
:
6870 case BFD_RELOC_PPC_DTPREL
:
6871 case BFD_RELOC_PPC_COPY
:
6872 case BFD_RELOC_PPC_GLOB_DAT
:
6873 case BFD_RELOC_32_PLT_PCREL
:
6874 case BFD_RELOC_PPC_EMB_NADDR32
:
6875 case BFD_RELOC_PPC64_TOC
:
6876 case BFD_RELOC_CTOR
:
6878 case BFD_RELOC_32_PCREL
:
6881 case BFD_RELOC_64_PCREL
:
6882 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6883 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6884 _("%s unsupported as instruction fixup"),
6885 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6894 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6895 contents can stay at zero. */
6896 #define APPLY_RELOC fixP->fx_done
6898 #define APPLY_RELOC 1
6900 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
6903 unsigned char *where
;
6905 /* Fetch the instruction, insert the fully resolved operand
6906 value, and stuff the instruction back again. */
6907 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
6908 if (target_big_endian
)
6910 if (fixP
->fx_size
== 4)
6911 insn
= bfd_getb32 (where
);
6913 insn
= bfd_getb16 (where
);
6917 if (fixP
->fx_size
== 4)
6918 insn
= bfd_getl32 (where
);
6920 insn
= bfd_getl16 (where
);
6922 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
6923 fixP
->tc_fix_data
.ppc_cpu
,
6924 fixP
->fx_file
, fixP
->fx_line
);
6925 if (target_big_endian
)
6927 if (fixP
->fx_size
== 4)
6928 bfd_putb32 (insn
, where
);
6930 bfd_putb16 (insn
, where
);
6934 if (fixP
->fx_size
== 4)
6935 bfd_putl32 (insn
, where
);
6937 bfd_putl16 (insn
, where
);
6942 /* Nothing else to do here. */
6945 gas_assert (fixP
->fx_addsy
!= NULL
);
6946 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
6951 /* Use expr_symbol_where to see if this is an expression
6953 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
6954 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6955 _("unresolved expression that must be resolved"));
6957 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6958 _("unsupported relocation against %s"),
6959 S_GET_NAME (fixP
->fx_addsy
));
6966 /* Handle relocs in data. */
6967 switch (fixP
->fx_r_type
)
6969 case BFD_RELOC_VTABLE_INHERIT
:
6971 && !S_IS_DEFINED (fixP
->fx_addsy
)
6972 && !S_IS_WEAK (fixP
->fx_addsy
))
6973 S_SET_WEAK (fixP
->fx_addsy
);
6976 case BFD_RELOC_VTABLE_ENTRY
:
6981 /* These can appear with @l etc. in data. */
6982 case BFD_RELOC_LO16
:
6983 case BFD_RELOC_LO16_PCREL
:
6984 case BFD_RELOC_HI16
:
6985 case BFD_RELOC_HI16_PCREL
:
6986 case BFD_RELOC_HI16_S
:
6987 case BFD_RELOC_HI16_S_PCREL
:
6988 case BFD_RELOC_PPC64_HIGHER
:
6989 case BFD_RELOC_PPC64_HIGHER_S
:
6990 case BFD_RELOC_PPC64_HIGHEST
:
6991 case BFD_RELOC_PPC64_HIGHEST_S
:
6992 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6993 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6994 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6997 case BFD_RELOC_PPC_DTPMOD
:
6998 case BFD_RELOC_PPC_TPREL
:
6999 case BFD_RELOC_PPC_DTPREL
:
7000 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7003 /* Just punt all of these to the linker. */
7004 case BFD_RELOC_PPC_B16_BRTAKEN
:
7005 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7006 case BFD_RELOC_16_GOTOFF
:
7007 case BFD_RELOC_LO16_GOTOFF
:
7008 case BFD_RELOC_HI16_GOTOFF
:
7009 case BFD_RELOC_HI16_S_GOTOFF
:
7010 case BFD_RELOC_LO16_PLTOFF
:
7011 case BFD_RELOC_HI16_PLTOFF
:
7012 case BFD_RELOC_HI16_S_PLTOFF
:
7013 case BFD_RELOC_PPC_COPY
:
7014 case BFD_RELOC_PPC_GLOB_DAT
:
7015 case BFD_RELOC_16_BASEREL
:
7016 case BFD_RELOC_LO16_BASEREL
:
7017 case BFD_RELOC_HI16_BASEREL
:
7018 case BFD_RELOC_HI16_S_BASEREL
:
7019 case BFD_RELOC_PPC_TLS
:
7020 case BFD_RELOC_PPC_DTPREL16_LO
:
7021 case BFD_RELOC_PPC_DTPREL16_HI
:
7022 case BFD_RELOC_PPC_DTPREL16_HA
:
7023 case BFD_RELOC_PPC_TPREL16_LO
:
7024 case BFD_RELOC_PPC_TPREL16_HI
:
7025 case BFD_RELOC_PPC_TPREL16_HA
:
7026 case BFD_RELOC_PPC_GOT_TLSGD16
:
7027 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7028 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7029 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7030 case BFD_RELOC_PPC_GOT_TLSLD16
:
7031 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7032 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7033 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7034 case BFD_RELOC_PPC_GOT_DTPREL16
:
7035 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7036 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7037 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7038 case BFD_RELOC_PPC_GOT_TPREL16
:
7039 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7040 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7041 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7042 case BFD_RELOC_24_PLT_PCREL
:
7043 case BFD_RELOC_PPC_LOCAL24PC
:
7044 case BFD_RELOC_32_PLT_PCREL
:
7045 case BFD_RELOC_GPREL16
:
7046 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7047 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7048 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7049 case BFD_RELOC_PPC_EMB_NADDR32
:
7050 case BFD_RELOC_PPC_EMB_NADDR16
:
7051 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7052 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7053 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7054 case BFD_RELOC_PPC_EMB_SDAI16
:
7055 case BFD_RELOC_PPC_EMB_SDA2REL
:
7056 case BFD_RELOC_PPC_EMB_SDA2I16
:
7057 case BFD_RELOC_PPC_EMB_SDA21
:
7058 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7059 case BFD_RELOC_PPC_EMB_MRKREF
:
7060 case BFD_RELOC_PPC_EMB_RELSEC16
:
7061 case BFD_RELOC_PPC_EMB_RELST_LO
:
7062 case BFD_RELOC_PPC_EMB_RELST_HI
:
7063 case BFD_RELOC_PPC_EMB_RELST_HA
:
7064 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7065 case BFD_RELOC_PPC_EMB_RELSDA
:
7066 case BFD_RELOC_PPC64_TOC
:
7067 case BFD_RELOC_PPC_TOC16
:
7068 case BFD_RELOC_PPC64_TOC16_LO
:
7069 case BFD_RELOC_PPC64_TOC16_HI
:
7070 case BFD_RELOC_PPC64_TOC16_HA
:
7071 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7072 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7073 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7074 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7075 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7076 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7077 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7078 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7079 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7080 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7081 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7082 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7088 case BFD_RELOC_NONE
:
7090 case BFD_RELOC_CTOR
:
7092 case BFD_RELOC_32_PCREL
:
7095 case BFD_RELOC_64_PCREL
:
7097 case BFD_RELOC_16_PCREL
:
7103 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7108 if (fixP
->fx_size
&& APPLY_RELOC
)
7109 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7110 fieldval
, fixP
->fx_size
);
7112 && (seg
->flags
& SEC_CODE
) != 0
7113 && fixP
->fx_size
== 4
7116 && (fixP
->fx_r_type
== BFD_RELOC_32
7117 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7118 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7119 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7120 _("data in executable section"));
7124 ppc_elf_validate_fix (fixP
, seg
);
7125 fixP
->fx_addnumber
= value
;
7127 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7128 from the section contents. If we are going to be emitting a reloc
7129 then the section contents are immaterial, so don't warn if they
7130 happen to overflow. Leave such warnings to ld. */
7133 fixP
->fx_no_overflow
= 1;
7135 /* Arrange to emit .TOC. as a normal symbol if used in anything
7136 but .TOC.@tocbase. */
7138 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7139 && fixP
->fx_addsy
!= NULL
7140 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7141 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7144 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7145 fixP
->fx_addnumber
= 0;
7149 fixP
->fx_addnumber
= 0;
7151 /* We want to use the offset within the toc, not the actual VMA
7153 fixP
->fx_addnumber
=
7154 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7155 - S_GET_VALUE (ppc_toc_csect
);
7156 /* Set *valP to avoid errors. */
7163 /* Generate a reloc for a fixup. */
7166 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7170 reloc
= XNEW (arelent
);
7172 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7173 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7174 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7175 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7176 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7178 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7179 _("reloc %d not supported by object file format"),
7180 (int) fixp
->fx_r_type
);
7183 reloc
->addend
= fixp
->fx_addnumber
;
7189 ppc_cfi_frame_initial_instructions (void)
7191 cfi_add_CFA_def_cfa (1, 0);
7195 tc_ppc_regname_to_dw2regnum (char *regname
)
7197 unsigned int regnum
= -1;
7201 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7203 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7204 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7205 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7206 { "spe_acc", 111 }, { "spefscr", 112 }
7209 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7210 if (strcmp (regnames
[i
].name
, regname
) == 0)
7211 return regnames
[i
].dw2regnum
;
7213 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7215 p
= regname
+ 1 + (regname
[1] == '.');
7216 regnum
= strtoul (p
, &q
, 10);
7217 if (p
== q
|| *q
|| regnum
>= 32)
7219 if (regname
[0] == 'f')
7221 else if (regname
[0] == 'v')
7224 else if (regname
[0] == 'c' && regname
[1] == 'r')
7226 p
= regname
+ 2 + (regname
[2] == '.');
7227 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7229 regnum
= p
[0] - '0' + 68;