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include/opcode/
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27 #include "dw2gencfi.h"
28 #include "opcode/ppc.h"
29
30 #ifdef OBJ_ELF
31 #include "elf/ppc.h"
32 #include "dwarf2dbg.h"
33 #endif
34
35 #ifdef TE_PE
36 #include "coff/pe.h"
37 #endif
38
39 #ifdef OBJ_XCOFF
40 #include "coff/xcoff.h"
41 #include "libxcoff.h"
42 #endif
43
44 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46 /* Tell the main code what the endianness is. */
47 extern int target_big_endian;
48
49 /* Whether or not, we've set target_big_endian. */
50 static int set_target_endian = 0;
51
52 /* Whether to use user friendly register names. */
53 #ifndef TARGET_REG_NAMES_P
54 #ifdef TE_PE
55 #define TARGET_REG_NAMES_P TRUE
56 #else
57 #define TARGET_REG_NAMES_P FALSE
58 #endif
59 #endif
60
61 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64 /* #lo(value) denotes the least significant 16 bits of the indicated. */
65 #define PPC_LO(v) ((v) & 0xffff)
66
67 /* Split the indicated value with the msbs in bits 11-15
68 and the lsbs in bits 21-31. */
69 #define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff)
70
71 /* Split the indicated value with the msbs in bits 6-10
72 and the lsbs in bits 21-31. */
73 #define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff)
74
75 /* #lo(value) denotes the lsb 16 bits in split16a format. */
76 #define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v))
77
78 /* #lo(value) denotes the lsb 16 bits in split16d format. */
79 #define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v))
80
81 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
82 #define PPC_HI(v) (((v) >> 16) & 0xffff)
83
84 /* #lo(value) denotes the msb 16 bits in split16a format. */
85 #define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v))
86
87 /* #lo(value) denotes the msb 16 bits in split16d format. */
88 #define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v))
89
90 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
91 the indicated value, compensating for #lo() being treated as a
92 signed number. */
93 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
94
95 /* #ha(value) denotes the high adjusted value in split16a format. */
96 #define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v))
97
98 /* #ha(value) denotes the high adjusted value in split16d format. */
99 #define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v))
100
101 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
102 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
103
104 /* #highera(value) denotes bits 32 through 47 of the indicated value,
105 compensating for #lo() being treated as a signed number. */
106 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
107
108 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
109 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
110
111 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
112 compensating for #lo being treated as a signed number. */
113 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
114
115 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
116
117 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
118
119 static void ppc_macro (char *, const struct powerpc_macro *);
120 static void ppc_byte (int);
121
122 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
123 static void ppc_tc (int);
124 static void ppc_machine (int);
125 #endif
126
127 #ifdef OBJ_XCOFF
128 static void ppc_comm (int);
129 static void ppc_bb (int);
130 static void ppc_bc (int);
131 static void ppc_bf (int);
132 static void ppc_biei (int);
133 static void ppc_bs (int);
134 static void ppc_eb (int);
135 static void ppc_ec (int);
136 static void ppc_ef (int);
137 static void ppc_es (int);
138 static void ppc_csect (int);
139 static void ppc_dwsect (int);
140 static void ppc_change_csect (symbolS *, offsetT);
141 static void ppc_function (int);
142 static void ppc_extern (int);
143 static void ppc_lglobl (int);
144 static void ppc_ref (int);
145 static void ppc_section (int);
146 static void ppc_named_section (int);
147 static void ppc_stabx (int);
148 static void ppc_rename (int);
149 static void ppc_toc (int);
150 static void ppc_xcoff_cons (int);
151 static void ppc_vbyte (int);
152 #endif
153
154 #ifdef OBJ_ELF
155 static void ppc_elf_cons (int);
156 static void ppc_elf_rdata (int);
157 static void ppc_elf_lcomm (int);
158 #endif
159
160 #ifdef TE_PE
161 static void ppc_previous (int);
162 static void ppc_pdata (int);
163 static void ppc_ydata (int);
164 static void ppc_reldata (int);
165 static void ppc_rdata (int);
166 static void ppc_ualong (int);
167 static void ppc_znop (int);
168 static void ppc_pe_comm (int);
169 static void ppc_pe_section (int);
170 static void ppc_pe_function (int);
171 static void ppc_pe_tocd (int);
172 #endif
173 \f
174 /* Generic assembler global variables which must be defined by all
175 targets. */
176
177 #ifdef OBJ_ELF
178 /* This string holds the chars that always start a comment. If the
179 pre-processor is disabled, these aren't very useful. The macro
180 tc_comment_chars points to this. We use this, rather than the
181 usual comment_chars, so that we can switch for Solaris conventions. */
182 static const char ppc_solaris_comment_chars[] = "#!";
183 static const char ppc_eabi_comment_chars[] = "#";
184
185 #ifdef TARGET_SOLARIS_COMMENT
186 const char *ppc_comment_chars = ppc_solaris_comment_chars;
187 #else
188 const char *ppc_comment_chars = ppc_eabi_comment_chars;
189 #endif
190 #else
191 const char comment_chars[] = "#";
192 #endif
193
194 /* Characters which start a comment at the beginning of a line. */
195 const char line_comment_chars[] = "#";
196
197 /* Characters which may be used to separate multiple commands on a
198 single line. */
199 const char line_separator_chars[] = ";";
200
201 /* Characters which are used to indicate an exponent in a floating
202 point number. */
203 const char EXP_CHARS[] = "eE";
204
205 /* Characters which mean that a number is a floating point constant,
206 as in 0d1.0. */
207 const char FLT_CHARS[] = "dD";
208
209 /* Anything that can start an operand needs to be mentioned here,
210 to stop the input scrubber eating whitespace. */
211 const char ppc_symbol_chars[] = "%[";
212
213 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
214 int ppc_cie_data_alignment;
215
216 /* The dwarf2 minimum instruction length. */
217 int ppc_dwarf2_line_min_insn_length;
218
219 /* More than this number of nops in an alignment op gets a branch
220 instead. */
221 unsigned long nop_limit = 4;
222
223 /* The type of processor we are assembling for. This is one or more
224 of the PPC_OPCODE flags defined in opcode/ppc.h. */
225 ppc_cpu_t ppc_cpu = 0;
226 ppc_cpu_t sticky = 0;
227
228 /* Flags set on encountering toc relocs. */
229 enum {
230 has_large_toc_reloc = 1,
231 has_small_toc_reloc = 2
232 } toc_reloc_types;
233 \f
234 /* The target specific pseudo-ops which we support. */
235
236 const pseudo_typeS md_pseudo_table[] =
237 {
238 /* Pseudo-ops which must be overridden. */
239 { "byte", ppc_byte, 0 },
240
241 #ifdef OBJ_XCOFF
242 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
243 legitimately belong in the obj-*.c file. However, XCOFF is based
244 on COFF, and is only implemented for the RS/6000. We just use
245 obj-coff.c, and add what we need here. */
246 { "comm", ppc_comm, 0 },
247 { "lcomm", ppc_comm, 1 },
248 { "bb", ppc_bb, 0 },
249 { "bc", ppc_bc, 0 },
250 { "bf", ppc_bf, 0 },
251 { "bi", ppc_biei, 0 },
252 { "bs", ppc_bs, 0 },
253 { "csect", ppc_csect, 0 },
254 { "dwsect", ppc_dwsect, 0 },
255 { "data", ppc_section, 'd' },
256 { "eb", ppc_eb, 0 },
257 { "ec", ppc_ec, 0 },
258 { "ef", ppc_ef, 0 },
259 { "ei", ppc_biei, 1 },
260 { "es", ppc_es, 0 },
261 { "extern", ppc_extern, 0 },
262 { "function", ppc_function, 0 },
263 { "lglobl", ppc_lglobl, 0 },
264 { "ref", ppc_ref, 0 },
265 { "rename", ppc_rename, 0 },
266 { "section", ppc_named_section, 0 },
267 { "stabx", ppc_stabx, 0 },
268 { "text", ppc_section, 't' },
269 { "toc", ppc_toc, 0 },
270 { "long", ppc_xcoff_cons, 2 },
271 { "llong", ppc_xcoff_cons, 3 },
272 { "word", ppc_xcoff_cons, 1 },
273 { "short", ppc_xcoff_cons, 1 },
274 { "vbyte", ppc_vbyte, 0 },
275 #endif
276
277 #ifdef OBJ_ELF
278 { "llong", ppc_elf_cons, 8 },
279 { "quad", ppc_elf_cons, 8 },
280 { "long", ppc_elf_cons, 4 },
281 { "word", ppc_elf_cons, 2 },
282 { "short", ppc_elf_cons, 2 },
283 { "rdata", ppc_elf_rdata, 0 },
284 { "rodata", ppc_elf_rdata, 0 },
285 { "lcomm", ppc_elf_lcomm, 0 },
286 #endif
287
288 #ifdef TE_PE
289 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
290 { "previous", ppc_previous, 0 },
291 { "pdata", ppc_pdata, 0 },
292 { "ydata", ppc_ydata, 0 },
293 { "reldata", ppc_reldata, 0 },
294 { "rdata", ppc_rdata, 0 },
295 { "ualong", ppc_ualong, 0 },
296 { "znop", ppc_znop, 0 },
297 { "comm", ppc_pe_comm, 0 },
298 { "lcomm", ppc_pe_comm, 1 },
299 { "section", ppc_pe_section, 0 },
300 { "function", ppc_pe_function,0 },
301 { "tocd", ppc_pe_tocd, 0 },
302 #endif
303
304 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
305 { "tc", ppc_tc, 0 },
306 { "machine", ppc_machine, 0 },
307 #endif
308
309 { NULL, NULL, 0 }
310 };
311
312 \f
313 /* Predefined register names if -mregnames (or default for Windows NT).
314 In general, there are lots of them, in an attempt to be compatible
315 with a number of other Windows NT assemblers. */
316
317 /* Structure to hold information about predefined registers. */
318 struct pd_reg
319 {
320 char *name;
321 int value;
322 };
323
324 /* List of registers that are pre-defined:
325
326 Each general register has predefined names of the form:
327 1. r<reg_num> which has the value <reg_num>.
328 2. r.<reg_num> which has the value <reg_num>.
329
330 Each floating point register has predefined names of the form:
331 1. f<reg_num> which has the value <reg_num>.
332 2. f.<reg_num> which has the value <reg_num>.
333
334 Each vector unit register has predefined names of the form:
335 1. v<reg_num> which has the value <reg_num>.
336 2. v.<reg_num> which has the value <reg_num>.
337
338 Each condition register has predefined names of the form:
339 1. cr<reg_num> which has the value <reg_num>.
340 2. cr.<reg_num> which has the value <reg_num>.
341
342 There are individual registers as well:
343 sp or r.sp has the value 1
344 rtoc or r.toc has the value 2
345 fpscr has the value 0
346 xer has the value 1
347 lr has the value 8
348 ctr has the value 9
349 pmr has the value 0
350 dar has the value 19
351 dsisr has the value 18
352 dec has the value 22
353 sdr1 has the value 25
354 srr0 has the value 26
355 srr1 has the value 27
356
357 The table is sorted. Suitable for searching by a binary search. */
358
359 static const struct pd_reg pre_defined_registers[] =
360 {
361 { "cr.0", 0 }, /* Condition Registers */
362 { "cr.1", 1 },
363 { "cr.2", 2 },
364 { "cr.3", 3 },
365 { "cr.4", 4 },
366 { "cr.5", 5 },
367 { "cr.6", 6 },
368 { "cr.7", 7 },
369
370 { "cr0", 0 },
371 { "cr1", 1 },
372 { "cr2", 2 },
373 { "cr3", 3 },
374 { "cr4", 4 },
375 { "cr5", 5 },
376 { "cr6", 6 },
377 { "cr7", 7 },
378
379 { "ctr", 9 },
380
381 { "dar", 19 }, /* Data Access Register */
382 { "dec", 22 }, /* Decrementer */
383 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
384
385 { "f.0", 0 }, /* Floating point registers */
386 { "f.1", 1 },
387 { "f.10", 10 },
388 { "f.11", 11 },
389 { "f.12", 12 },
390 { "f.13", 13 },
391 { "f.14", 14 },
392 { "f.15", 15 },
393 { "f.16", 16 },
394 { "f.17", 17 },
395 { "f.18", 18 },
396 { "f.19", 19 },
397 { "f.2", 2 },
398 { "f.20", 20 },
399 { "f.21", 21 },
400 { "f.22", 22 },
401 { "f.23", 23 },
402 { "f.24", 24 },
403 { "f.25", 25 },
404 { "f.26", 26 },
405 { "f.27", 27 },
406 { "f.28", 28 },
407 { "f.29", 29 },
408 { "f.3", 3 },
409 { "f.30", 30 },
410 { "f.31", 31 },
411
412 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
413 { "f.33", 33 },
414 { "f.34", 34 },
415 { "f.35", 35 },
416 { "f.36", 36 },
417 { "f.37", 37 },
418 { "f.38", 38 },
419 { "f.39", 39 },
420 { "f.4", 4 },
421 { "f.40", 40 },
422 { "f.41", 41 },
423 { "f.42", 42 },
424 { "f.43", 43 },
425 { "f.44", 44 },
426 { "f.45", 45 },
427 { "f.46", 46 },
428 { "f.47", 47 },
429 { "f.48", 48 },
430 { "f.49", 49 },
431 { "f.5", 5 },
432 { "f.50", 50 },
433 { "f.51", 51 },
434 { "f.52", 52 },
435 { "f.53", 53 },
436 { "f.54", 54 },
437 { "f.55", 55 },
438 { "f.56", 56 },
439 { "f.57", 57 },
440 { "f.58", 58 },
441 { "f.59", 59 },
442 { "f.6", 6 },
443 { "f.60", 60 },
444 { "f.61", 61 },
445 { "f.62", 62 },
446 { "f.63", 63 },
447 { "f.7", 7 },
448 { "f.8", 8 },
449 { "f.9", 9 },
450
451 { "f0", 0 },
452 { "f1", 1 },
453 { "f10", 10 },
454 { "f11", 11 },
455 { "f12", 12 },
456 { "f13", 13 },
457 { "f14", 14 },
458 { "f15", 15 },
459 { "f16", 16 },
460 { "f17", 17 },
461 { "f18", 18 },
462 { "f19", 19 },
463 { "f2", 2 },
464 { "f20", 20 },
465 { "f21", 21 },
466 { "f22", 22 },
467 { "f23", 23 },
468 { "f24", 24 },
469 { "f25", 25 },
470 { "f26", 26 },
471 { "f27", 27 },
472 { "f28", 28 },
473 { "f29", 29 },
474 { "f3", 3 },
475 { "f30", 30 },
476 { "f31", 31 },
477
478 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
479 { "f33", 33 },
480 { "f34", 34 },
481 { "f35", 35 },
482 { "f36", 36 },
483 { "f37", 37 },
484 { "f38", 38 },
485 { "f39", 39 },
486 { "f4", 4 },
487 { "f40", 40 },
488 { "f41", 41 },
489 { "f42", 42 },
490 { "f43", 43 },
491 { "f44", 44 },
492 { "f45", 45 },
493 { "f46", 46 },
494 { "f47", 47 },
495 { "f48", 48 },
496 { "f49", 49 },
497 { "f5", 5 },
498 { "f50", 50 },
499 { "f51", 51 },
500 { "f52", 52 },
501 { "f53", 53 },
502 { "f54", 54 },
503 { "f55", 55 },
504 { "f56", 56 },
505 { "f57", 57 },
506 { "f58", 58 },
507 { "f59", 59 },
508 { "f6", 6 },
509 { "f60", 60 },
510 { "f61", 61 },
511 { "f62", 62 },
512 { "f63", 63 },
513 { "f7", 7 },
514 { "f8", 8 },
515 { "f9", 9 },
516
517 { "fpscr", 0 },
518
519 /* Quantization registers used with pair single instructions. */
520 { "gqr.0", 0 },
521 { "gqr.1", 1 },
522 { "gqr.2", 2 },
523 { "gqr.3", 3 },
524 { "gqr.4", 4 },
525 { "gqr.5", 5 },
526 { "gqr.6", 6 },
527 { "gqr.7", 7 },
528 { "gqr0", 0 },
529 { "gqr1", 1 },
530 { "gqr2", 2 },
531 { "gqr3", 3 },
532 { "gqr4", 4 },
533 { "gqr5", 5 },
534 { "gqr6", 6 },
535 { "gqr7", 7 },
536
537 { "lr", 8 }, /* Link Register */
538
539 { "pmr", 0 },
540
541 { "r.0", 0 }, /* General Purpose Registers */
542 { "r.1", 1 },
543 { "r.10", 10 },
544 { "r.11", 11 },
545 { "r.12", 12 },
546 { "r.13", 13 },
547 { "r.14", 14 },
548 { "r.15", 15 },
549 { "r.16", 16 },
550 { "r.17", 17 },
551 { "r.18", 18 },
552 { "r.19", 19 },
553 { "r.2", 2 },
554 { "r.20", 20 },
555 { "r.21", 21 },
556 { "r.22", 22 },
557 { "r.23", 23 },
558 { "r.24", 24 },
559 { "r.25", 25 },
560 { "r.26", 26 },
561 { "r.27", 27 },
562 { "r.28", 28 },
563 { "r.29", 29 },
564 { "r.3", 3 },
565 { "r.30", 30 },
566 { "r.31", 31 },
567 { "r.4", 4 },
568 { "r.5", 5 },
569 { "r.6", 6 },
570 { "r.7", 7 },
571 { "r.8", 8 },
572 { "r.9", 9 },
573
574 { "r.sp", 1 }, /* Stack Pointer */
575
576 { "r.toc", 2 }, /* Pointer to the table of contents */
577
578 { "r0", 0 }, /* More general purpose registers */
579 { "r1", 1 },
580 { "r10", 10 },
581 { "r11", 11 },
582 { "r12", 12 },
583 { "r13", 13 },
584 { "r14", 14 },
585 { "r15", 15 },
586 { "r16", 16 },
587 { "r17", 17 },
588 { "r18", 18 },
589 { "r19", 19 },
590 { "r2", 2 },
591 { "r20", 20 },
592 { "r21", 21 },
593 { "r22", 22 },
594 { "r23", 23 },
595 { "r24", 24 },
596 { "r25", 25 },
597 { "r26", 26 },
598 { "r27", 27 },
599 { "r28", 28 },
600 { "r29", 29 },
601 { "r3", 3 },
602 { "r30", 30 },
603 { "r31", 31 },
604 { "r4", 4 },
605 { "r5", 5 },
606 { "r6", 6 },
607 { "r7", 7 },
608 { "r8", 8 },
609 { "r9", 9 },
610
611 { "rtoc", 2 }, /* Table of contents */
612
613 { "sdr1", 25 }, /* Storage Description Register 1 */
614
615 { "sp", 1 },
616
617 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
618 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
619
620 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
621 { "v.1", 1 },
622 { "v.10", 10 },
623 { "v.11", 11 },
624 { "v.12", 12 },
625 { "v.13", 13 },
626 { "v.14", 14 },
627 { "v.15", 15 },
628 { "v.16", 16 },
629 { "v.17", 17 },
630 { "v.18", 18 },
631 { "v.19", 19 },
632 { "v.2", 2 },
633 { "v.20", 20 },
634 { "v.21", 21 },
635 { "v.22", 22 },
636 { "v.23", 23 },
637 { "v.24", 24 },
638 { "v.25", 25 },
639 { "v.26", 26 },
640 { "v.27", 27 },
641 { "v.28", 28 },
642 { "v.29", 29 },
643 { "v.3", 3 },
644 { "v.30", 30 },
645 { "v.31", 31 },
646 { "v.4", 4 },
647 { "v.5", 5 },
648 { "v.6", 6 },
649 { "v.7", 7 },
650 { "v.8", 8 },
651 { "v.9", 9 },
652
653 { "v0", 0 },
654 { "v1", 1 },
655 { "v10", 10 },
656 { "v11", 11 },
657 { "v12", 12 },
658 { "v13", 13 },
659 { "v14", 14 },
660 { "v15", 15 },
661 { "v16", 16 },
662 { "v17", 17 },
663 { "v18", 18 },
664 { "v19", 19 },
665 { "v2", 2 },
666 { "v20", 20 },
667 { "v21", 21 },
668 { "v22", 22 },
669 { "v23", 23 },
670 { "v24", 24 },
671 { "v25", 25 },
672 { "v26", 26 },
673 { "v27", 27 },
674 { "v28", 28 },
675 { "v29", 29 },
676 { "v3", 3 },
677 { "v30", 30 },
678 { "v31", 31 },
679 { "v4", 4 },
680 { "v5", 5 },
681 { "v6", 6 },
682 { "v7", 7 },
683 { "v8", 8 },
684 { "v9", 9 },
685
686 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
687 { "vs.1", 1 },
688 { "vs.10", 10 },
689 { "vs.11", 11 },
690 { "vs.12", 12 },
691 { "vs.13", 13 },
692 { "vs.14", 14 },
693 { "vs.15", 15 },
694 { "vs.16", 16 },
695 { "vs.17", 17 },
696 { "vs.18", 18 },
697 { "vs.19", 19 },
698 { "vs.2", 2 },
699 { "vs.20", 20 },
700 { "vs.21", 21 },
701 { "vs.22", 22 },
702 { "vs.23", 23 },
703 { "vs.24", 24 },
704 { "vs.25", 25 },
705 { "vs.26", 26 },
706 { "vs.27", 27 },
707 { "vs.28", 28 },
708 { "vs.29", 29 },
709 { "vs.3", 3 },
710 { "vs.30", 30 },
711 { "vs.31", 31 },
712 { "vs.32", 32 },
713 { "vs.33", 33 },
714 { "vs.34", 34 },
715 { "vs.35", 35 },
716 { "vs.36", 36 },
717 { "vs.37", 37 },
718 { "vs.38", 38 },
719 { "vs.39", 39 },
720 { "vs.4", 4 },
721 { "vs.40", 40 },
722 { "vs.41", 41 },
723 { "vs.42", 42 },
724 { "vs.43", 43 },
725 { "vs.44", 44 },
726 { "vs.45", 45 },
727 { "vs.46", 46 },
728 { "vs.47", 47 },
729 { "vs.48", 48 },
730 { "vs.49", 49 },
731 { "vs.5", 5 },
732 { "vs.50", 50 },
733 { "vs.51", 51 },
734 { "vs.52", 52 },
735 { "vs.53", 53 },
736 { "vs.54", 54 },
737 { "vs.55", 55 },
738 { "vs.56", 56 },
739 { "vs.57", 57 },
740 { "vs.58", 58 },
741 { "vs.59", 59 },
742 { "vs.6", 6 },
743 { "vs.60", 60 },
744 { "vs.61", 61 },
745 { "vs.62", 62 },
746 { "vs.63", 63 },
747 { "vs.7", 7 },
748 { "vs.8", 8 },
749 { "vs.9", 9 },
750
751 { "vs0", 0 },
752 { "vs1", 1 },
753 { "vs10", 10 },
754 { "vs11", 11 },
755 { "vs12", 12 },
756 { "vs13", 13 },
757 { "vs14", 14 },
758 { "vs15", 15 },
759 { "vs16", 16 },
760 { "vs17", 17 },
761 { "vs18", 18 },
762 { "vs19", 19 },
763 { "vs2", 2 },
764 { "vs20", 20 },
765 { "vs21", 21 },
766 { "vs22", 22 },
767 { "vs23", 23 },
768 { "vs24", 24 },
769 { "vs25", 25 },
770 { "vs26", 26 },
771 { "vs27", 27 },
772 { "vs28", 28 },
773 { "vs29", 29 },
774 { "vs3", 3 },
775 { "vs30", 30 },
776 { "vs31", 31 },
777 { "vs32", 32 },
778 { "vs33", 33 },
779 { "vs34", 34 },
780 { "vs35", 35 },
781 { "vs36", 36 },
782 { "vs37", 37 },
783 { "vs38", 38 },
784 { "vs39", 39 },
785 { "vs4", 4 },
786 { "vs40", 40 },
787 { "vs41", 41 },
788 { "vs42", 42 },
789 { "vs43", 43 },
790 { "vs44", 44 },
791 { "vs45", 45 },
792 { "vs46", 46 },
793 { "vs47", 47 },
794 { "vs48", 48 },
795 { "vs49", 49 },
796 { "vs5", 5 },
797 { "vs50", 50 },
798 { "vs51", 51 },
799 { "vs52", 52 },
800 { "vs53", 53 },
801 { "vs54", 54 },
802 { "vs55", 55 },
803 { "vs56", 56 },
804 { "vs57", 57 },
805 { "vs58", 58 },
806 { "vs59", 59 },
807 { "vs6", 6 },
808 { "vs60", 60 },
809 { "vs61", 61 },
810 { "vs62", 62 },
811 { "vs63", 63 },
812 { "vs7", 7 },
813 { "vs8", 8 },
814 { "vs9", 9 },
815
816 { "xer", 1 },
817
818 };
819
820 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
821
822 /* Given NAME, find the register number associated with that name, return
823 the integer value associated with the given name or -1 on failure. */
824
825 static int
826 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
827 {
828 int middle, low, high;
829 int cmp;
830
831 low = 0;
832 high = regcount - 1;
833
834 do
835 {
836 middle = (low + high) / 2;
837 cmp = strcasecmp (name, regs[middle].name);
838 if (cmp < 0)
839 high = middle - 1;
840 else if (cmp > 0)
841 low = middle + 1;
842 else
843 return regs[middle].value;
844 }
845 while (low <= high);
846
847 return -1;
848 }
849
850 /*
851 * Summary of register_name.
852 *
853 * in: Input_line_pointer points to 1st char of operand.
854 *
855 * out: A expressionS.
856 * The operand may have been a register: in this case, X_op == O_register,
857 * X_add_number is set to the register number, and truth is returned.
858 * Input_line_pointer->(next non-blank) char after operand, or is in its
859 * original state.
860 */
861
862 static bfd_boolean
863 register_name (expressionS *expressionP)
864 {
865 int reg_number;
866 char *name;
867 char *start;
868 char c;
869
870 /* Find the spelling of the operand. */
871 start = name = input_line_pointer;
872 if (name[0] == '%' && ISALPHA (name[1]))
873 name = ++input_line_pointer;
874
875 else if (!reg_names_p || !ISALPHA (name[0]))
876 return FALSE;
877
878 c = get_symbol_end ();
879 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
880
881 /* Put back the delimiting char. */
882 *input_line_pointer = c;
883
884 /* Look to see if it's in the register table. */
885 if (reg_number >= 0)
886 {
887 expressionP->X_op = O_register;
888 expressionP->X_add_number = reg_number;
889
890 /* Make the rest nice. */
891 expressionP->X_add_symbol = NULL;
892 expressionP->X_op_symbol = NULL;
893 return TRUE;
894 }
895
896 /* Reset the line as if we had not done anything. */
897 input_line_pointer = start;
898 return FALSE;
899 }
900 \f
901 /* This function is called for each symbol seen in an expression. It
902 handles the special parsing which PowerPC assemblers are supposed
903 to use for condition codes. */
904
905 /* Whether to do the special parsing. */
906 static bfd_boolean cr_operand;
907
908 /* Names to recognize in a condition code. This table is sorted. */
909 static const struct pd_reg cr_names[] =
910 {
911 { "cr0", 0 },
912 { "cr1", 1 },
913 { "cr2", 2 },
914 { "cr3", 3 },
915 { "cr4", 4 },
916 { "cr5", 5 },
917 { "cr6", 6 },
918 { "cr7", 7 },
919 { "eq", 2 },
920 { "gt", 1 },
921 { "lt", 0 },
922 { "so", 3 },
923 { "un", 3 }
924 };
925
926 /* Parsing function. This returns non-zero if it recognized an
927 expression. */
928
929 int
930 ppc_parse_name (const char *name, expressionS *exp)
931 {
932 int val;
933
934 if (! cr_operand)
935 return 0;
936
937 if (*name == '%')
938 ++name;
939 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
940 name);
941 if (val < 0)
942 return 0;
943
944 exp->X_op = O_constant;
945 exp->X_add_number = val;
946
947 return 1;
948 }
949 \f
950 /* Local variables. */
951
952 /* Whether to target xcoff64/elf64. */
953 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
954
955 /* Opcode hash table. */
956 static struct hash_control *ppc_hash;
957
958 /* Macro hash table. */
959 static struct hash_control *ppc_macro_hash;
960
961 #ifdef OBJ_ELF
962 /* What type of shared library support to use. */
963 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
964
965 /* Flags to set in the elf header. */
966 static flagword ppc_flags = 0;
967
968 /* Whether this is Solaris or not. */
969 #ifdef TARGET_SOLARIS_COMMENT
970 #define SOLARIS_P TRUE
971 #else
972 #define SOLARIS_P FALSE
973 #endif
974
975 static bfd_boolean msolaris = SOLARIS_P;
976 #endif
977
978 #ifdef OBJ_XCOFF
979
980 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
981 using a bunch of different sections. These assembler sections,
982 however, are all encompassed within the .text or .data sections of
983 the final output file. We handle this by using different
984 subsegments within these main segments. */
985
986 /* Next subsegment to allocate within the .text segment. */
987 static subsegT ppc_text_subsegment = 2;
988
989 /* Linked list of csects in the text section. */
990 static symbolS *ppc_text_csects;
991
992 /* Next subsegment to allocate within the .data segment. */
993 static subsegT ppc_data_subsegment = 2;
994
995 /* Linked list of csects in the data section. */
996 static symbolS *ppc_data_csects;
997
998 /* The current csect. */
999 static symbolS *ppc_current_csect;
1000
1001 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1002 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1003 A special relocation is used when accessing TOC entries. We handle
1004 the TOC as a subsegment within the .data segment. We set it up if
1005 we see a .toc pseudo-op, and save the csect symbol here. */
1006 static symbolS *ppc_toc_csect;
1007
1008 /* The first frag in the TOC subsegment. */
1009 static fragS *ppc_toc_frag;
1010
1011 /* The first frag in the first subsegment after the TOC in the .data
1012 segment. NULL if there are no subsegments after the TOC. */
1013 static fragS *ppc_after_toc_frag;
1014
1015 /* The current static block. */
1016 static symbolS *ppc_current_block;
1017
1018 /* The COFF debugging section; set by md_begin. This is not the
1019 .debug section, but is instead the secret BFD section which will
1020 cause BFD to set the section number of a symbol to N_DEBUG. */
1021 static asection *ppc_coff_debug_section;
1022
1023 /* Structure to set the length field of the dwarf sections. */
1024 struct dw_subsection {
1025 /* Subsections are simply linked. */
1026 struct dw_subsection *link;
1027
1028 /* The subsection number. */
1029 subsegT subseg;
1030
1031 /* Expression to compute the length of the section. */
1032 expressionS end_exp;
1033 };
1034
1035 static struct dw_section {
1036 /* Corresponding section. */
1037 segT sect;
1038
1039 /* Simply linked list of subsections with a label. */
1040 struct dw_subsection *list_subseg;
1041
1042 /* The anonymous subsection. */
1043 struct dw_subsection *anon_subseg;
1044 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1045 #endif /* OBJ_XCOFF */
1046
1047 #ifdef TE_PE
1048
1049 /* Various sections that we need for PE coff support. */
1050 static segT ydata_section;
1051 static segT pdata_section;
1052 static segT reldata_section;
1053 static segT rdata_section;
1054 static segT tocdata_section;
1055
1056 /* The current section and the previous section. See ppc_previous. */
1057 static segT ppc_previous_section;
1058 static segT ppc_current_section;
1059
1060 #endif /* TE_PE */
1061
1062 #ifdef OBJ_ELF
1063 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1064 #define PPC_APUINFO_ISEL 0x40
1065 #define PPC_APUINFO_PMR 0x41
1066 #define PPC_APUINFO_RFMCI 0x42
1067 #define PPC_APUINFO_CACHELCK 0x43
1068 #define PPC_APUINFO_SPE 0x100
1069 #define PPC_APUINFO_EFS 0x101
1070 #define PPC_APUINFO_BRLOCK 0x102
1071 #define PPC_APUINFO_VLE 0x104
1072
1073 /*
1074 * We keep a list of APUinfo
1075 */
1076 unsigned long *ppc_apuinfo_list;
1077 unsigned int ppc_apuinfo_num;
1078 unsigned int ppc_apuinfo_num_alloc;
1079 #endif /* OBJ_ELF */
1080 \f
1081 #ifdef OBJ_ELF
1082 const char *const md_shortopts = "b:l:usm:K:VQ:";
1083 #else
1084 const char *const md_shortopts = "um:";
1085 #endif
1086 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1087 const struct option md_longopts[] = {
1088 {"nops", required_argument, NULL, OPTION_NOPS},
1089 {NULL, no_argument, NULL, 0}
1090 };
1091 const size_t md_longopts_size = sizeof (md_longopts);
1092
1093 int
1094 md_parse_option (int c, char *arg)
1095 {
1096 ppc_cpu_t new_cpu;
1097
1098 switch (c)
1099 {
1100 case 'u':
1101 /* -u means that any undefined symbols should be treated as
1102 external, which is the default for gas anyhow. */
1103 break;
1104
1105 #ifdef OBJ_ELF
1106 case 'l':
1107 /* Solaris as takes -le (presumably for little endian). For completeness
1108 sake, recognize -be also. */
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 0;
1112 set_target_endian = 1;
1113 if (ppc_cpu & PPC_OPCODE_VLE)
1114 as_bad (_("the use of -mvle requires big endian."));
1115 }
1116 else
1117 return 0;
1118
1119 break;
1120
1121 case 'b':
1122 if (strcmp (arg, "e") == 0)
1123 {
1124 target_big_endian = 1;
1125 set_target_endian = 1;
1126 }
1127 else
1128 return 0;
1129
1130 break;
1131
1132 case 'K':
1133 /* Recognize -K PIC. */
1134 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1135 {
1136 shlib = SHLIB_PIC;
1137 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1138 }
1139 else
1140 return 0;
1141
1142 break;
1143 #endif
1144
1145 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1146 case 'a':
1147 if (strcmp (arg, "64") == 0)
1148 {
1149 #ifdef BFD64
1150 ppc_obj64 = 1;
1151 if (ppc_cpu & PPC_OPCODE_VLE)
1152 as_bad (_("the use of -mvle requires -a32."));
1153 #else
1154 as_fatal (_("%s unsupported"), "-a64");
1155 #endif
1156 }
1157 else if (strcmp (arg, "32") == 0)
1158 ppc_obj64 = 0;
1159 else
1160 return 0;
1161 break;
1162
1163 case 'm':
1164 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1165 if (new_cpu != 0)
1166 {
1167 ppc_cpu = new_cpu;
1168 if (strcmp (arg, "vle") == 0)
1169 {
1170 if (set_target_endian && target_big_endian == 0)
1171 as_bad (_("the use of -mvle requires big endian."));
1172 if (ppc_obj64)
1173 as_bad (_("the use of -mvle requires -a32."));
1174 }
1175 }
1176
1177 else if (strcmp (arg, "regnames") == 0)
1178 reg_names_p = TRUE;
1179
1180 else if (strcmp (arg, "no-regnames") == 0)
1181 reg_names_p = FALSE;
1182
1183 #ifdef OBJ_ELF
1184 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1185 that require relocation. */
1186 else if (strcmp (arg, "relocatable") == 0)
1187 {
1188 shlib = SHLIB_MRELOCATABLE;
1189 ppc_flags |= EF_PPC_RELOCATABLE;
1190 }
1191
1192 else if (strcmp (arg, "relocatable-lib") == 0)
1193 {
1194 shlib = SHLIB_MRELOCATABLE;
1195 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1196 }
1197
1198 /* -memb, set embedded bit. */
1199 else if (strcmp (arg, "emb") == 0)
1200 ppc_flags |= EF_PPC_EMB;
1201
1202 /* -mlittle/-mbig set the endianness. */
1203 else if (strcmp (arg, "little") == 0
1204 || strcmp (arg, "little-endian") == 0)
1205 {
1206 target_big_endian = 0;
1207 set_target_endian = 1;
1208 if (ppc_cpu & PPC_OPCODE_VLE)
1209 as_bad (_("the use of -mvle requires big endian."));
1210 }
1211
1212 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1213 {
1214 target_big_endian = 1;
1215 set_target_endian = 1;
1216 }
1217
1218 else if (strcmp (arg, "solaris") == 0)
1219 {
1220 msolaris = TRUE;
1221 ppc_comment_chars = ppc_solaris_comment_chars;
1222 }
1223
1224 else if (strcmp (arg, "no-solaris") == 0)
1225 {
1226 msolaris = FALSE;
1227 ppc_comment_chars = ppc_eabi_comment_chars;
1228 }
1229 #endif
1230 else
1231 {
1232 as_bad (_("invalid switch -m%s"), arg);
1233 return 0;
1234 }
1235 break;
1236
1237 #ifdef OBJ_ELF
1238 /* -V: SVR4 argument to print version ID. */
1239 case 'V':
1240 print_version_id ();
1241 break;
1242
1243 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1244 should be emitted or not. FIXME: Not implemented. */
1245 case 'Q':
1246 break;
1247
1248 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1249 rather than .stabs.excl, which is ignored by the linker.
1250 FIXME: Not implemented. */
1251 case 's':
1252 if (arg)
1253 return 0;
1254
1255 break;
1256 #endif
1257
1258 case OPTION_NOPS:
1259 {
1260 char *end;
1261 nop_limit = strtoul (optarg, &end, 0);
1262 if (*end)
1263 as_bad (_("--nops needs a numeric argument"));
1264 }
1265 break;
1266
1267 default:
1268 return 0;
1269 }
1270
1271 return 1;
1272 }
1273
1274 void
1275 md_show_usage (FILE *stream)
1276 {
1277 fprintf (stream, _("\
1278 PowerPC options:\n\
1279 -a32 generate ELF32/XCOFF32\n\
1280 -a64 generate ELF64/XCOFF64\n\
1281 -u ignored\n\
1282 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1283 -mpwr generate code for POWER (RIOS1)\n\
1284 -m601 generate code for PowerPC 601\n\
1285 -mppc, -mppc32, -m603, -m604\n\
1286 generate code for PowerPC 603/604\n\
1287 -m403 generate code for PowerPC 403\n\
1288 -m405 generate code for PowerPC 405\n\
1289 -m440 generate code for PowerPC 440\n\
1290 -m464 generate code for PowerPC 464\n\
1291 -m476 generate code for PowerPC 476\n\
1292 -m7400, -m7410, -m7450, -m7455\n\
1293 generate code for PowerPC 7400/7410/7450/7455\n\
1294 -m750cl generate code for PowerPC 750cl\n"));
1295 fprintf (stream, _("\
1296 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1297 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1298 -mbooke generate code for 32-bit PowerPC BookE\n\
1299 -ma2 generate code for A2 architecture\n\
1300 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1301 -mpower5, -mpwr5, -mpwr5x\n\
1302 generate code for Power5 architecture\n\
1303 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1304 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1305 -mcell generate code for Cell Broadband Engine architecture\n\
1306 -mcom generate code Power/PowerPC common instructions\n\
1307 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1308 fprintf (stream, _("\
1309 -maltivec generate code for AltiVec\n\
1310 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1311 -me300 generate code for PowerPC e300 family\n\
1312 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1313 -me500mc, generate code for Freescale e500mc core complex\n\
1314 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1315 -me5500, generate code for Freescale e5500 core complex\n\
1316 -me6500, generate code for Freescale e6500 core complex\n\
1317 -mspe generate code for Motorola SPE instructions\n\
1318 -mvle generate code for Freescale VLE instructions\n\
1319 -mtitan generate code for AppliedMicro Titan core complex\n\
1320 -mregnames Allow symbolic names for registers\n\
1321 -mno-regnames Do not allow symbolic names for registers\n"));
1322 #ifdef OBJ_ELF
1323 fprintf (stream, _("\
1324 -mrelocatable support for GCC's -mrelocatble option\n\
1325 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1326 -memb set PPC_EMB bit in ELF flags\n\
1327 -mlittle, -mlittle-endian, -le\n\
1328 generate code for a little endian machine\n\
1329 -mbig, -mbig-endian, -be\n\
1330 generate code for a big endian machine\n\
1331 -msolaris generate code for Solaris\n\
1332 -mno-solaris do not generate code for Solaris\n\
1333 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1334 -V print assembler version number\n\
1335 -Qy, -Qn ignored\n"));
1336 #endif
1337 fprintf (stream, _("\
1338 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1339 }
1340 \f
1341 /* Set ppc_cpu if it is not already set. */
1342
1343 static void
1344 ppc_set_cpu (void)
1345 {
1346 const char *default_os = TARGET_OS;
1347 const char *default_cpu = TARGET_CPU;
1348
1349 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1350 {
1351 if (ppc_obj64)
1352 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1353 else if (strncmp (default_os, "aix", 3) == 0
1354 && default_os[3] >= '4' && default_os[3] <= '9')
1355 ppc_cpu |= PPC_OPCODE_COMMON;
1356 else if (strncmp (default_os, "aix3", 4) == 0)
1357 ppc_cpu |= PPC_OPCODE_POWER;
1358 else if (strcmp (default_cpu, "rs6000") == 0)
1359 ppc_cpu |= PPC_OPCODE_POWER;
1360 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1361 ppc_cpu |= PPC_OPCODE_PPC;
1362 else
1363 as_fatal (_("unknown default cpu = %s, os = %s"),
1364 default_cpu, default_os);
1365 }
1366 }
1367
1368 /* Figure out the BFD architecture to use. This function and ppc_mach
1369 are called well before md_begin, when the output file is opened. */
1370
1371 enum bfd_architecture
1372 ppc_arch (void)
1373 {
1374 const char *default_cpu = TARGET_CPU;
1375 ppc_set_cpu ();
1376
1377 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1378 return bfd_arch_powerpc;
1379 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1380 return bfd_arch_powerpc;
1381 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1382 return bfd_arch_rs6000;
1383 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1384 {
1385 if (strcmp (default_cpu, "rs6000") == 0)
1386 return bfd_arch_rs6000;
1387 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1388 return bfd_arch_powerpc;
1389 }
1390
1391 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1392 return bfd_arch_unknown;
1393 }
1394
1395 unsigned long
1396 ppc_mach (void)
1397 {
1398 if (ppc_obj64)
1399 return bfd_mach_ppc64;
1400 else if (ppc_arch () == bfd_arch_rs6000)
1401 return bfd_mach_rs6k;
1402 else if (ppc_cpu & PPC_OPCODE_TITAN)
1403 return bfd_mach_ppc_titan;
1404 else if (ppc_cpu & PPC_OPCODE_VLE)
1405 return bfd_mach_ppc_vle;
1406 else
1407 return bfd_mach_ppc;
1408 }
1409
1410 extern char*
1411 ppc_target_format (void)
1412 {
1413 #ifdef OBJ_COFF
1414 #ifdef TE_PE
1415 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1416 #elif TE_POWERMAC
1417 return "xcoff-powermac";
1418 #else
1419 # ifdef TE_AIX5
1420 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1421 # else
1422 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1423 # endif
1424 #endif
1425 #endif
1426 #ifdef OBJ_ELF
1427 # ifdef TE_FreeBSD
1428 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1429 # elif defined (TE_VXWORKS)
1430 return "elf32-powerpc-vxworks";
1431 # else
1432 return (target_big_endian
1433 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1434 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1435 # endif
1436 #endif
1437 }
1438
1439 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1440 Return TRUE if there's a problem, otherwise FALSE. */
1441
1442 static bfd_boolean
1443 insn_validate (const struct powerpc_opcode *op)
1444 {
1445 const unsigned char *o;
1446 unsigned long omask = op->mask;
1447
1448 /* The mask had better not trim off opcode bits. */
1449 if ((op->opcode & omask) != op->opcode)
1450 {
1451 as_bad (_("mask trims opcode bits for %s"), op->name);
1452 return TRUE;
1453 }
1454
1455 /* The operands must not overlap the opcode or each other. */
1456 for (o = op->operands; *o; ++o)
1457 {
1458 if (*o >= num_powerpc_operands)
1459 {
1460 as_bad (_("operand index error for %s"), op->name);
1461 return TRUE;
1462 }
1463 else
1464 {
1465 const struct powerpc_operand *operand = &powerpc_operands[*o];
1466 if (operand->shift != PPC_OPSHIFT_INV)
1467 {
1468 unsigned long mask;
1469
1470 if (operand->shift >= 0)
1471 mask = operand->bitm << operand->shift;
1472 else
1473 mask = operand->bitm >> -operand->shift;
1474 if (omask & mask)
1475 {
1476 as_bad (_("operand %d overlap in %s"),
1477 (int) (o - op->operands), op->name);
1478 return TRUE;
1479 }
1480 omask |= mask;
1481 }
1482 }
1483 }
1484 return FALSE;
1485 }
1486
1487 /* Insert opcodes and macros into hash tables. Called at startup and
1488 for .machine pseudo. */
1489
1490 static void
1491 ppc_setup_opcodes (void)
1492 {
1493 const struct powerpc_opcode *op;
1494 const struct powerpc_opcode *op_end;
1495 const struct powerpc_macro *macro;
1496 const struct powerpc_macro *macro_end;
1497 bfd_boolean bad_insn = FALSE;
1498
1499 if (ppc_hash != NULL)
1500 hash_die (ppc_hash);
1501 if (ppc_macro_hash != NULL)
1502 hash_die (ppc_macro_hash);
1503
1504 /* Insert the opcodes into a hash table. */
1505 ppc_hash = hash_new ();
1506
1507 if (ENABLE_CHECKING)
1508 {
1509 unsigned int i;
1510
1511 /* An index into powerpc_operands is stored in struct fix
1512 fx_pcrel_adjust which is 8 bits wide. */
1513 gas_assert (num_powerpc_operands < 256);
1514
1515 /* Check operand masks. Code here and in the disassembler assumes
1516 all the 1's in the mask are contiguous. */
1517 for (i = 0; i < num_powerpc_operands; ++i)
1518 {
1519 unsigned long mask = powerpc_operands[i].bitm;
1520 unsigned long right_bit;
1521 unsigned int j;
1522
1523 right_bit = mask & -mask;
1524 mask += right_bit;
1525 right_bit = mask & -mask;
1526 if (mask != right_bit)
1527 {
1528 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1529 bad_insn = TRUE;
1530 }
1531 for (j = i + 1; j < num_powerpc_operands; ++j)
1532 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1533 sizeof (powerpc_operands[0])) == 0)
1534 {
1535 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1536 j, i);
1537 bad_insn = TRUE;
1538 }
1539 }
1540 }
1541
1542 op_end = powerpc_opcodes + powerpc_num_opcodes;
1543 for (op = powerpc_opcodes; op < op_end; op++)
1544 {
1545 if (ENABLE_CHECKING)
1546 {
1547 if (op != powerpc_opcodes)
1548 {
1549 int old_opcode = PPC_OP (op[-1].opcode);
1550 int new_opcode = PPC_OP (op[0].opcode);
1551
1552 #ifdef PRINT_OPCODE_TABLE
1553 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1554 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1555 (unsigned int) op->opcode, (unsigned int) op->mask,
1556 (unsigned long long) op->flags);
1557 #endif
1558
1559 /* The major opcodes had better be sorted. Code in the
1560 disassembler assumes the insns are sorted according to
1561 major opcode. */
1562 if (new_opcode < old_opcode)
1563 {
1564 as_bad (_("major opcode is not sorted for %s"),
1565 op->name);
1566 bad_insn = TRUE;
1567 }
1568 }
1569 bad_insn |= insn_validate (op);
1570 }
1571
1572 if ((ppc_cpu & op->flags) != 0
1573 && !(ppc_cpu & op->deprecated))
1574 {
1575 const char *retval;
1576
1577 retval = hash_insert (ppc_hash, op->name, (void *) op);
1578 if (retval != NULL)
1579 {
1580 as_bad (_("duplicate instruction %s"),
1581 op->name);
1582 bad_insn = TRUE;
1583 }
1584 }
1585 }
1586
1587 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1588 for (op = powerpc_opcodes; op < op_end; op++)
1589 hash_insert (ppc_hash, op->name, (void *) op);
1590
1591 op_end = vle_opcodes + vle_num_opcodes;
1592 for (op = vle_opcodes; op < op_end; op++)
1593 {
1594 if (ENABLE_CHECKING)
1595 {
1596 if (op != vle_opcodes)
1597 {
1598 unsigned old_seg, new_seg;
1599
1600 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1601 old_seg = VLE_OP_TO_SEG (old_seg);
1602 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1603 new_seg = VLE_OP_TO_SEG (new_seg);
1604
1605 #ifdef PRINT_OPCODE_TABLE
1606 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1607 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1608 (unsigned int) op->opcode, (unsigned int) op->mask,
1609 (unsigned long long) op->flags);
1610 #endif
1611 /* The major opcodes had better be sorted. Code in the
1612 disassembler assumes the insns are sorted according to
1613 major opcode. */
1614 if (new_seg < old_seg)
1615 {
1616 as_bad (_("major opcode is not sorted for %s"),
1617 op->name);
1618 bad_insn = TRUE;
1619 }
1620 }
1621
1622 bad_insn |= insn_validate (op);
1623 }
1624
1625 if ((ppc_cpu & op->flags) != 0
1626 && !(ppc_cpu & op->deprecated))
1627 {
1628 const char *retval;
1629
1630 retval = hash_insert (ppc_hash, op->name, (void *) op);
1631 if (retval != NULL)
1632 {
1633 as_bad (_("duplicate instruction %s"),
1634 op->name);
1635 bad_insn = TRUE;
1636 }
1637 }
1638 }
1639
1640 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1641 for (op = vle_opcodes; op < op_end; op++)
1642 hash_insert (ppc_hash, op->name, (void *) op);
1643
1644 /* Insert the macros into a hash table. */
1645 ppc_macro_hash = hash_new ();
1646
1647 macro_end = powerpc_macros + powerpc_num_macros;
1648 for (macro = powerpc_macros; macro < macro_end; macro++)
1649 {
1650 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1651 {
1652 const char *retval;
1653
1654 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1655 if (retval != (const char *) NULL)
1656 {
1657 as_bad (_("duplicate macro %s"), macro->name);
1658 bad_insn = TRUE;
1659 }
1660 }
1661 }
1662
1663 if (bad_insn)
1664 abort ();
1665 }
1666
1667 /* This function is called when the assembler starts up. It is called
1668 after the options have been parsed and the output file has been
1669 opened. */
1670
1671 void
1672 md_begin (void)
1673 {
1674 ppc_set_cpu ();
1675
1676 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1677 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1678
1679 #ifdef OBJ_ELF
1680 /* Set the ELF flags if desired. */
1681 if (ppc_flags && !msolaris)
1682 bfd_set_private_flags (stdoutput, ppc_flags);
1683 #endif
1684
1685 ppc_setup_opcodes ();
1686
1687 /* Tell the main code what the endianness is if it is not overridden
1688 by the user. */
1689 if (!set_target_endian)
1690 {
1691 set_target_endian = 1;
1692 target_big_endian = PPC_BIG_ENDIAN;
1693 }
1694
1695 #ifdef OBJ_XCOFF
1696 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1697
1698 /* Create dummy symbols to serve as initial csects. This forces the
1699 text csects to precede the data csects. These symbols will not
1700 be output. */
1701 ppc_text_csects = symbol_make ("dummy\001");
1702 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1703 ppc_data_csects = symbol_make ("dummy\001");
1704 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1705 #endif
1706
1707 #ifdef TE_PE
1708
1709 ppc_current_section = text_section;
1710 ppc_previous_section = 0;
1711
1712 #endif
1713 }
1714
1715 void
1716 ppc_cleanup (void)
1717 {
1718 #ifdef OBJ_ELF
1719 if (ppc_apuinfo_list == NULL)
1720 return;
1721
1722 /* Ok, so write the section info out. We have this layout:
1723
1724 byte data what
1725 ---- ---- ----
1726 0 8 length of "APUinfo\0"
1727 4 (n*4) number of APU's (4 bytes each)
1728 8 2 note type 2
1729 12 "APUinfo\0" name
1730 20 APU#1 first APU's info
1731 24 APU#2 second APU's info
1732 ... ...
1733 */
1734 {
1735 char *p;
1736 asection *seg = now_seg;
1737 subsegT subseg = now_subseg;
1738 asection *apuinfo_secp = (asection *) NULL;
1739 unsigned int i;
1740
1741 /* Create the .PPC.EMB.apuinfo section. */
1742 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1743 bfd_set_section_flags (stdoutput,
1744 apuinfo_secp,
1745 SEC_HAS_CONTENTS | SEC_READONLY);
1746
1747 p = frag_more (4);
1748 md_number_to_chars (p, (valueT) 8, 4);
1749
1750 p = frag_more (4);
1751 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1752
1753 p = frag_more (4);
1754 md_number_to_chars (p, (valueT) 2, 4);
1755
1756 p = frag_more (8);
1757 strcpy (p, "APUinfo");
1758
1759 for (i = 0; i < ppc_apuinfo_num; i++)
1760 {
1761 p = frag_more (4);
1762 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1763 }
1764
1765 frag_align (2, 0, 0);
1766
1767 /* We probably can't restore the current segment, for there likely
1768 isn't one yet... */
1769 if (seg && subseg)
1770 subseg_set (seg, subseg);
1771 }
1772 #endif
1773 }
1774
1775 /* Insert an operand value into an instruction. */
1776
1777 static unsigned long
1778 ppc_insert_operand (unsigned long insn,
1779 const struct powerpc_operand *operand,
1780 offsetT val,
1781 ppc_cpu_t cpu,
1782 char *file,
1783 unsigned int line)
1784 {
1785 long min, max, right;
1786
1787 max = operand->bitm;
1788 right = max & -max;
1789 min = 0;
1790
1791 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1792 {
1793 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1794 max = (max >> 1) & -right;
1795 min = ~max & -right;
1796 }
1797
1798 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1799 max++;
1800
1801 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1802 {
1803 long tmp = min;
1804 min = -max;
1805 max = -tmp;
1806 }
1807
1808 if (min <= max)
1809 {
1810 /* Some people write constants with the sign extension done by
1811 hand but only up to 32 bits. This shouldn't really be valid,
1812 but, to permit this code to assemble on a 64-bit host, we
1813 sign extend the 32-bit value to 64 bits if so doing makes the
1814 value valid. */
1815 if (val > max
1816 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1817 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1818 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1819 val = val - 0x80000000 - 0x80000000;
1820
1821 /* Similarly, people write expressions like ~(1<<15), and expect
1822 this to be OK for a 32-bit unsigned value. */
1823 else if (val < min
1824 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1825 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1826 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1827 val = val + 0x80000000 + 0x80000000;
1828
1829 else if (val < min
1830 || val > max
1831 || (val & (right - 1)) != 0)
1832 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1833 }
1834
1835 if (operand->insert)
1836 {
1837 const char *errmsg;
1838
1839 errmsg = NULL;
1840 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1841 if (errmsg != (const char *) NULL)
1842 as_bad_where (file, line, "%s", errmsg);
1843 }
1844 else if (operand->shift >= 0)
1845 insn |= ((long) val & operand->bitm) << operand->shift;
1846 else
1847 insn |= ((long) val & operand->bitm) >> -operand->shift;
1848
1849 return insn;
1850 }
1851
1852 \f
1853 #ifdef OBJ_ELF
1854 /* Parse @got, etc. and return the desired relocation. */
1855 static bfd_reloc_code_real_type
1856 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1857 {
1858 struct map_bfd {
1859 char *string;
1860 unsigned int length : 8;
1861 unsigned int valid32 : 1;
1862 unsigned int valid64 : 1;
1863 unsigned int reloc;
1864 };
1865
1866 char ident[20];
1867 char *str = *str_p;
1868 char *str2;
1869 int ch;
1870 int len;
1871 const struct map_bfd *ptr;
1872
1873 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1874 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1875 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1876
1877 static const struct map_bfd mapping[] = {
1878 MAP ("l", BFD_RELOC_LO16),
1879 MAP ("h", BFD_RELOC_HI16),
1880 MAP ("ha", BFD_RELOC_HI16_S),
1881 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1882 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1883 MAP ("got", BFD_RELOC_16_GOTOFF),
1884 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1885 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1886 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1887 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1888 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1889 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1890 MAP ("copy", BFD_RELOC_PPC_COPY),
1891 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1892 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1893 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1894 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1895 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1896 MAP ("tls", BFD_RELOC_PPC_TLS),
1897 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1898 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1899 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1900 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1901 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1902 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1903 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1904 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1905 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1906 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1907 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1908 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1909 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1910 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1911 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1912 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1913 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1914 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1915 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1916 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1917 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1918 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1919 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1920 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1921 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1922 MAP32 ("fixup", BFD_RELOC_CTOR),
1923 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1924 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1925 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1926 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1927 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1928 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1929 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1930 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1931 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1932 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1933 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1934 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1935 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1936 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1937 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1938 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1939 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1940 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1941 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1942 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1943 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1944 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1945 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1946 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1947 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1948 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1949 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1950 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1951 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1952 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1953 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1954 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1955 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1956 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1957 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1958 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1959 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1960 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1961 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1962 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1963 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1964 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1965 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1966 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1967 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1968 };
1969
1970 if (*str++ != '@')
1971 return BFD_RELOC_UNUSED;
1972
1973 for (ch = *str, str2 = ident;
1974 (str2 < ident + sizeof (ident) - 1
1975 && (ISALNUM (ch) || ch == '@'));
1976 ch = *++str)
1977 {
1978 *str2++ = TOLOWER (ch);
1979 }
1980
1981 *str2 = '\0';
1982 len = str2 - ident;
1983
1984 ch = ident[0];
1985 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1986 if (ch == ptr->string[0]
1987 && len == ptr->length
1988 && memcmp (ident, ptr->string, ptr->length) == 0
1989 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1990 {
1991 int reloc = ptr->reloc;
1992
1993 if (!ppc_obj64 && exp_p->X_add_number != 0)
1994 {
1995 switch (reloc)
1996 {
1997 case BFD_RELOC_16_GOTOFF:
1998 case BFD_RELOC_LO16_GOTOFF:
1999 case BFD_RELOC_HI16_GOTOFF:
2000 case BFD_RELOC_HI16_S_GOTOFF:
2001 as_warn (_("identifier+constant@got means "
2002 "identifier@got+constant"));
2003 break;
2004
2005 case BFD_RELOC_PPC_GOT_TLSGD16:
2006 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2007 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2008 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2009 case BFD_RELOC_PPC_GOT_TLSLD16:
2010 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2011 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2012 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2013 case BFD_RELOC_PPC_GOT_DTPREL16:
2014 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2015 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2016 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2017 case BFD_RELOC_PPC_GOT_TPREL16:
2018 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2019 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2020 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2021 as_bad (_("symbol+offset not supported for got tls"));
2022 break;
2023 }
2024 }
2025
2026 /* Now check for identifier@suffix+constant. */
2027 if (*str == '-' || *str == '+')
2028 {
2029 char *orig_line = input_line_pointer;
2030 expressionS new_exp;
2031
2032 input_line_pointer = str;
2033 expression (&new_exp);
2034 if (new_exp.X_op == O_constant)
2035 {
2036 exp_p->X_add_number += new_exp.X_add_number;
2037 str = input_line_pointer;
2038 }
2039
2040 if (&input_line_pointer != str_p)
2041 input_line_pointer = orig_line;
2042 }
2043 *str_p = str;
2044
2045 if (reloc == (int) BFD_RELOC_PPC64_TOC
2046 && exp_p->X_op == O_symbol
2047 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2048 {
2049 /* Change the symbol so that the dummy .TOC. symbol can be
2050 omitted from the object file. */
2051 exp_p->X_add_symbol = &abs_symbol;
2052 }
2053
2054 return (bfd_reloc_code_real_type) reloc;
2055 }
2056
2057 return BFD_RELOC_UNUSED;
2058 }
2059
2060 /* Like normal .long/.short/.word, except support @got, etc.
2061 Clobbers input_line_pointer, checks end-of-line. */
2062 static void
2063 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
2064 {
2065 expressionS exp;
2066 bfd_reloc_code_real_type reloc;
2067
2068 if (is_it_end_of_statement ())
2069 {
2070 demand_empty_rest_of_line ();
2071 return;
2072 }
2073
2074 do
2075 {
2076 expression (&exp);
2077 if (exp.X_op == O_symbol
2078 && *input_line_pointer == '@'
2079 && (reloc = ppc_elf_suffix (&input_line_pointer,
2080 &exp)) != BFD_RELOC_UNUSED)
2081 {
2082 reloc_howto_type *reloc_howto;
2083 int size;
2084
2085 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2086 size = bfd_get_reloc_size (reloc_howto);
2087
2088 if (size > nbytes)
2089 {
2090 as_bad (_("%s relocations do not fit in %d bytes\n"),
2091 reloc_howto->name, nbytes);
2092 }
2093 else
2094 {
2095 char *p;
2096 int offset;
2097
2098 p = frag_more (nbytes);
2099 memset (p, 0, nbytes);
2100 offset = 0;
2101 if (target_big_endian)
2102 offset = nbytes - size;
2103 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2104 &exp, 0, reloc);
2105 }
2106 }
2107 else
2108 emit_expr (&exp, (unsigned int) nbytes);
2109 }
2110 while (*input_line_pointer++ == ',');
2111
2112 /* Put terminator back into stream. */
2113 input_line_pointer--;
2114 demand_empty_rest_of_line ();
2115 }
2116
2117 /* Solaris pseduo op to change to the .rodata section. */
2118 static void
2119 ppc_elf_rdata (int xxx)
2120 {
2121 char *save_line = input_line_pointer;
2122 static char section[] = ".rodata\n";
2123
2124 /* Just pretend this is .section .rodata */
2125 input_line_pointer = section;
2126 obj_elf_section (xxx);
2127
2128 input_line_pointer = save_line;
2129 }
2130
2131 /* Pseudo op to make file scope bss items. */
2132 static void
2133 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2134 {
2135 char *name;
2136 char c;
2137 char *p;
2138 offsetT size;
2139 symbolS *symbolP;
2140 offsetT align;
2141 segT old_sec;
2142 int old_subsec;
2143 char *pfrag;
2144 int align2;
2145
2146 name = input_line_pointer;
2147 c = get_symbol_end ();
2148
2149 /* just after name is now '\0'. */
2150 p = input_line_pointer;
2151 *p = c;
2152 SKIP_WHITESPACE ();
2153 if (*input_line_pointer != ',')
2154 {
2155 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2156 ignore_rest_of_line ();
2157 return;
2158 }
2159
2160 input_line_pointer++; /* skip ',' */
2161 if ((size = get_absolute_expression ()) < 0)
2162 {
2163 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2164 ignore_rest_of_line ();
2165 return;
2166 }
2167
2168 /* The third argument to .lcomm is the alignment. */
2169 if (*input_line_pointer != ',')
2170 align = 8;
2171 else
2172 {
2173 ++input_line_pointer;
2174 align = get_absolute_expression ();
2175 if (align <= 0)
2176 {
2177 as_warn (_("ignoring bad alignment"));
2178 align = 8;
2179 }
2180 }
2181
2182 *p = 0;
2183 symbolP = symbol_find_or_make (name);
2184 *p = c;
2185
2186 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2187 {
2188 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2189 S_GET_NAME (symbolP));
2190 ignore_rest_of_line ();
2191 return;
2192 }
2193
2194 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2195 {
2196 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2197 S_GET_NAME (symbolP),
2198 (long) S_GET_VALUE (symbolP),
2199 (long) size);
2200
2201 ignore_rest_of_line ();
2202 return;
2203 }
2204
2205 /* Allocate_bss. */
2206 old_sec = now_seg;
2207 old_subsec = now_subseg;
2208 if (align)
2209 {
2210 /* Convert to a power of 2 alignment. */
2211 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2212 if (align != 1)
2213 {
2214 as_bad (_("common alignment not a power of 2"));
2215 ignore_rest_of_line ();
2216 return;
2217 }
2218 }
2219 else
2220 align2 = 0;
2221
2222 record_alignment (bss_section, align2);
2223 subseg_set (bss_section, 0);
2224 if (align2)
2225 frag_align (align2, 0, 0);
2226 if (S_GET_SEGMENT (symbolP) == bss_section)
2227 symbol_get_frag (symbolP)->fr_symbol = 0;
2228 symbol_set_frag (symbolP, frag_now);
2229 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2230 (char *) 0);
2231 *pfrag = 0;
2232 S_SET_SIZE (symbolP, size);
2233 S_SET_SEGMENT (symbolP, bss_section);
2234 subseg_set (old_sec, old_subsec);
2235 demand_empty_rest_of_line ();
2236 }
2237
2238 /* Validate any relocations emitted for -mrelocatable, possibly adding
2239 fixups for word relocations in writable segments, so we can adjust
2240 them at runtime. */
2241 static void
2242 ppc_elf_validate_fix (fixS *fixp, segT seg)
2243 {
2244 if (fixp->fx_done || fixp->fx_pcrel)
2245 return;
2246
2247 switch (shlib)
2248 {
2249 case SHLIB_NONE:
2250 case SHLIB_PIC:
2251 return;
2252
2253 case SHLIB_MRELOCATABLE:
2254 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2255 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2256 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2257 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2258 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2259 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2260 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2261 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2262 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2263 && (seg->flags & SEC_LOAD) != 0
2264 && strcmp (segment_name (seg), ".got2") != 0
2265 && strcmp (segment_name (seg), ".dtors") != 0
2266 && strcmp (segment_name (seg), ".ctors") != 0
2267 && strcmp (segment_name (seg), ".fixup") != 0
2268 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2269 && strcmp (segment_name (seg), ".eh_frame") != 0
2270 && strcmp (segment_name (seg), ".ex_shared") != 0)
2271 {
2272 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2273 || fixp->fx_r_type != BFD_RELOC_CTOR)
2274 {
2275 as_bad_where (fixp->fx_file, fixp->fx_line,
2276 _("relocation cannot be done when using -mrelocatable"));
2277 }
2278 }
2279 return;
2280 }
2281 }
2282
2283 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2284 function descriptor sym if the corresponding code sym is used. */
2285
2286 void
2287 ppc_frob_file_before_adjust (void)
2288 {
2289 symbolS *symp;
2290 asection *toc;
2291
2292 if (!ppc_obj64)
2293 return;
2294
2295 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2296 {
2297 const char *name;
2298 char *dotname;
2299 symbolS *dotsym;
2300 size_t len;
2301
2302 name = S_GET_NAME (symp);
2303 if (name[0] == '.')
2304 continue;
2305
2306 if (! S_IS_WEAK (symp)
2307 || S_IS_DEFINED (symp))
2308 continue;
2309
2310 len = strlen (name) + 1;
2311 dotname = xmalloc (len + 1);
2312 dotname[0] = '.';
2313 memcpy (dotname + 1, name, len);
2314 dotsym = symbol_find_noref (dotname, 1);
2315 free (dotname);
2316 if (dotsym != NULL && (symbol_used_p (dotsym)
2317 || symbol_used_in_reloc_p (dotsym)))
2318 symbol_mark_used (symp);
2319
2320 }
2321
2322 toc = bfd_get_section_by_name (stdoutput, ".toc");
2323 if (toc != NULL
2324 && toc_reloc_types != has_large_toc_reloc
2325 && bfd_section_size (stdoutput, toc) > 0x10000)
2326 as_warn (_("TOC section size exceeds 64k"));
2327 }
2328
2329 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2330 emitted. Other uses of .TOC. will cause the symbol to be marked
2331 with BSF_KEEP in md_apply_fix. */
2332
2333 void
2334 ppc_elf_adjust_symtab (void)
2335 {
2336 if (ppc_obj64)
2337 {
2338 symbolS *symp;
2339 symp = symbol_find (".TOC.");
2340 if (symp != NULL)
2341 {
2342 asymbol *bsym = symbol_get_bfdsym (symp);
2343 if ((bsym->flags & BSF_KEEP) == 0)
2344 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2345 else
2346 S_SET_WEAK (symp);
2347 }
2348 }
2349 }
2350 #endif /* OBJ_ELF */
2351 \f
2352 #ifdef TE_PE
2353
2354 /*
2355 * Summary of parse_toc_entry.
2356 *
2357 * in: Input_line_pointer points to the '[' in one of:
2358 *
2359 * [toc] [tocv] [toc32] [toc64]
2360 *
2361 * Anything else is an error of one kind or another.
2362 *
2363 * out:
2364 * return value: success or failure
2365 * toc_kind: kind of toc reference
2366 * input_line_pointer:
2367 * success: first char after the ']'
2368 * failure: unchanged
2369 *
2370 * settings:
2371 *
2372 * [toc] - rv == success, toc_kind = default_toc
2373 * [tocv] - rv == success, toc_kind = data_in_toc
2374 * [toc32] - rv == success, toc_kind = must_be_32
2375 * [toc64] - rv == success, toc_kind = must_be_64
2376 *
2377 */
2378
2379 enum toc_size_qualifier
2380 {
2381 default_toc, /* The toc cell constructed should be the system default size */
2382 data_in_toc, /* This is a direct reference to a toc cell */
2383 must_be_32, /* The toc cell constructed must be 32 bits wide */
2384 must_be_64 /* The toc cell constructed must be 64 bits wide */
2385 };
2386
2387 static int
2388 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2389 {
2390 char *start;
2391 char *toc_spec;
2392 char c;
2393 enum toc_size_qualifier t;
2394
2395 /* Save the input_line_pointer. */
2396 start = input_line_pointer;
2397
2398 /* Skip over the '[' , and whitespace. */
2399 ++input_line_pointer;
2400 SKIP_WHITESPACE ();
2401
2402 /* Find the spelling of the operand. */
2403 toc_spec = input_line_pointer;
2404 c = get_symbol_end ();
2405
2406 if (strcmp (toc_spec, "toc") == 0)
2407 {
2408 t = default_toc;
2409 }
2410 else if (strcmp (toc_spec, "tocv") == 0)
2411 {
2412 t = data_in_toc;
2413 }
2414 else if (strcmp (toc_spec, "toc32") == 0)
2415 {
2416 t = must_be_32;
2417 }
2418 else if (strcmp (toc_spec, "toc64") == 0)
2419 {
2420 t = must_be_64;
2421 }
2422 else
2423 {
2424 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2425 *input_line_pointer = c;
2426 input_line_pointer = start;
2427 return 0;
2428 }
2429
2430 /* Now find the ']'. */
2431 *input_line_pointer = c;
2432
2433 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2434 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2435
2436 if (c != ']')
2437 {
2438 as_bad (_("syntax error: expected `]', found `%c'"), c);
2439 input_line_pointer = start;
2440 return 0;
2441 }
2442
2443 *toc_kind = t;
2444 return 1;
2445 }
2446 #endif
2447
2448 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2449 /* See whether a symbol is in the TOC section. */
2450
2451 static int
2452 ppc_is_toc_sym (symbolS *sym)
2453 {
2454 #ifdef OBJ_XCOFF
2455 return symbol_get_tc (sym)->symbol_class == XMC_TC;
2456 #endif
2457 #ifdef OBJ_ELF
2458 const char *sname = segment_name (S_GET_SEGMENT (sym));
2459 if (ppc_obj64)
2460 return strcmp (sname, ".toc") == 0;
2461 else
2462 return strcmp (sname, ".got") == 0;
2463 #endif
2464 }
2465 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2466 \f
2467
2468 #ifdef OBJ_ELF
2469 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2470 static void
2471 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2472 {
2473 unsigned int i;
2474
2475 /* Check we don't already exist. */
2476 for (i = 0; i < ppc_apuinfo_num; i++)
2477 if (ppc_apuinfo_list[i] == APUID (apu, version))
2478 return;
2479
2480 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2481 {
2482 if (ppc_apuinfo_num_alloc == 0)
2483 {
2484 ppc_apuinfo_num_alloc = 4;
2485 ppc_apuinfo_list = (unsigned long *)
2486 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2487 }
2488 else
2489 {
2490 ppc_apuinfo_num_alloc += 4;
2491 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2492 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2493 }
2494 }
2495 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2496 }
2497 #undef APUID
2498 #endif
2499 \f
2500
2501 /* We need to keep a list of fixups. We can't simply generate them as
2502 we go, because that would require us to first create the frag, and
2503 that would screw up references to ``.''. */
2504
2505 struct ppc_fixup
2506 {
2507 expressionS exp;
2508 int opindex;
2509 bfd_reloc_code_real_type reloc;
2510 };
2511
2512 #define MAX_INSN_FIXUPS (5)
2513
2514 /* Form I16L. */
2515 #define E_OR2I_INSN 0x7000C000
2516 #define E_AND2I_DOT_INSN 0x7000C800
2517 #define E_OR2IS_INSN 0x7000D000
2518 #define E_LIS_INSN 0x7000E000
2519 #define E_AND2IS_DOT_INSN 0x7000E800
2520
2521 /* Form I16A. */
2522 #define E_ADD2I_DOT_INSN 0x70008800
2523 #define E_ADD2IS_INSN 0x70009000
2524 #define E_CMP16I_INSN 0x70009800
2525 #define E_MULL2I_INSN 0x7000A000
2526 #define E_CMPL16I_INSN 0x7000A800
2527 #define E_CMPH16I_INSN 0x7000B000
2528 #define E_CMPHL16I_INSN 0x7000B800
2529
2530 /* This routine is called for each instruction to be assembled. */
2531
2532 void
2533 md_assemble (char *str)
2534 {
2535 char *s;
2536 const struct powerpc_opcode *opcode;
2537 unsigned long insn;
2538 const unsigned char *opindex_ptr;
2539 int skip_optional;
2540 int need_paren;
2541 int next_opindex;
2542 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2543 int fc;
2544 char *f;
2545 int addr_mod;
2546 int i;
2547 unsigned int insn_length;
2548
2549 /* Get the opcode. */
2550 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2551 ;
2552 if (*s != '\0')
2553 *s++ = '\0';
2554
2555 /* Look up the opcode in the hash table. */
2556 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2557 if (opcode == (const struct powerpc_opcode *) NULL)
2558 {
2559 const struct powerpc_macro *macro;
2560
2561 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2562 if (macro == (const struct powerpc_macro *) NULL)
2563 as_bad (_("unrecognized opcode: `%s'"), str);
2564 else
2565 ppc_macro (s, macro);
2566
2567 return;
2568 }
2569
2570 insn = opcode->opcode;
2571
2572 str = s;
2573 while (ISSPACE (*str))
2574 ++str;
2575
2576 /* PowerPC operands are just expressions. The only real issue is
2577 that a few operand types are optional. All cases which might use
2578 an optional operand separate the operands only with commas (in some
2579 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2580 have optional operands). Most instructions with optional operands
2581 have only one. Those that have more than one optional operand can
2582 take either all their operands or none. So, before we start seriously
2583 parsing the operands, we check to see if we have optional operands,
2584 and if we do, we count the number of commas to see which operands
2585 have been omitted. */
2586 skip_optional = 0;
2587 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2588 {
2589 const struct powerpc_operand *operand;
2590
2591 operand = &powerpc_operands[*opindex_ptr];
2592 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2593 {
2594 unsigned int opcount;
2595 unsigned int num_operands_expected;
2596
2597 /* There is an optional operand. Count the number of
2598 commas in the input line. */
2599 if (*str == '\0')
2600 opcount = 0;
2601 else
2602 {
2603 opcount = 1;
2604 s = str;
2605 while ((s = strchr (s, ',')) != (char *) NULL)
2606 {
2607 ++opcount;
2608 ++s;
2609 }
2610 }
2611
2612 /* Compute the number of expected operands.
2613 Do not count fake operands. */
2614 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2615 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2616 ++ num_operands_expected;
2617
2618 /* If there are fewer operands in the line then are called
2619 for by the instruction, we want to skip the optional
2620 operands. */
2621 if (opcount < num_operands_expected)
2622 skip_optional = 1;
2623
2624 break;
2625 }
2626 }
2627
2628 /* Gather the operands. */
2629 need_paren = 0;
2630 next_opindex = 0;
2631 fc = 0;
2632 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2633 {
2634 const struct powerpc_operand *operand;
2635 const char *errmsg;
2636 char *hold;
2637 expressionS ex;
2638 char endc;
2639
2640 if (next_opindex == 0)
2641 operand = &powerpc_operands[*opindex_ptr];
2642 else
2643 {
2644 operand = &powerpc_operands[next_opindex];
2645 next_opindex = 0;
2646 }
2647 errmsg = NULL;
2648
2649 /* If this is a fake operand, then we do not expect anything
2650 from the input. */
2651 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2652 {
2653 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2654 if (errmsg != (const char *) NULL)
2655 as_bad ("%s", errmsg);
2656 continue;
2657 }
2658
2659 /* If this is an optional operand, and we are skipping it, just
2660 insert a zero. */
2661 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2662 && skip_optional)
2663 {
2664 if (operand->insert)
2665 {
2666 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2667 if (errmsg != (const char *) NULL)
2668 as_bad ("%s", errmsg);
2669 }
2670 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2671 next_opindex = *opindex_ptr + 1;
2672 continue;
2673 }
2674
2675 /* Gather the operand. */
2676 hold = input_line_pointer;
2677 input_line_pointer = str;
2678
2679 #ifdef TE_PE
2680 if (*input_line_pointer == '[')
2681 {
2682 /* We are expecting something like the second argument here:
2683 *
2684 * lwz r4,[toc].GS.0.static_int(rtoc)
2685 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2686 * The argument following the `]' must be a symbol name, and the
2687 * register must be the toc register: 'rtoc' or '2'
2688 *
2689 * The effect is to 0 as the displacement field
2690 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2691 * the appropriate variation) reloc against it based on the symbol.
2692 * The linker will build the toc, and insert the resolved toc offset.
2693 *
2694 * Note:
2695 * o The size of the toc entry is currently assumed to be
2696 * 32 bits. This should not be assumed to be a hard coded
2697 * number.
2698 * o In an effort to cope with a change from 32 to 64 bits,
2699 * there are also toc entries that are specified to be
2700 * either 32 or 64 bits:
2701 * lwz r4,[toc32].GS.0.static_int(rtoc)
2702 * lwz r4,[toc64].GS.0.static_int(rtoc)
2703 * These demand toc entries of the specified size, and the
2704 * instruction probably requires it.
2705 */
2706
2707 int valid_toc;
2708 enum toc_size_qualifier toc_kind;
2709 bfd_reloc_code_real_type toc_reloc;
2710
2711 /* Go parse off the [tocXX] part. */
2712 valid_toc = parse_toc_entry (&toc_kind);
2713
2714 if (!valid_toc)
2715 {
2716 /* Note: message has already been issued.
2717 FIXME: what sort of recovery should we do?
2718 demand_rest_of_line (); return; ? */
2719 }
2720
2721 /* Now get the symbol following the ']'. */
2722 expression (&ex);
2723
2724 switch (toc_kind)
2725 {
2726 case default_toc:
2727 /* In this case, we may not have seen the symbol yet,
2728 since it is allowed to appear on a .extern or .globl
2729 or just be a label in the .data section. */
2730 toc_reloc = BFD_RELOC_PPC_TOC16;
2731 break;
2732 case data_in_toc:
2733 /* 1. The symbol must be defined and either in the toc
2734 section, or a global.
2735 2. The reloc generated must have the TOCDEFN flag set
2736 in upper bit mess of the reloc type.
2737 FIXME: It's a little confusing what the tocv
2738 qualifier can be used for. At the very least, I've
2739 seen three uses, only one of which I'm sure I can
2740 explain. */
2741 if (ex.X_op == O_symbol)
2742 {
2743 gas_assert (ex.X_add_symbol != NULL);
2744 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2745 != tocdata_section)
2746 {
2747 as_bad (_("[tocv] symbol is not a toc symbol"));
2748 }
2749 }
2750
2751 toc_reloc = BFD_RELOC_PPC_TOC16;
2752 break;
2753 case must_be_32:
2754 /* FIXME: these next two specifically specify 32/64 bit
2755 toc entries. We don't support them today. Is this
2756 the right way to say that? */
2757 toc_reloc = BFD_RELOC_UNUSED;
2758 as_bad (_("unimplemented toc32 expression modifier"));
2759 break;
2760 case must_be_64:
2761 /* FIXME: see above. */
2762 toc_reloc = BFD_RELOC_UNUSED;
2763 as_bad (_("unimplemented toc64 expression modifier"));
2764 break;
2765 default:
2766 fprintf (stderr,
2767 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2768 toc_kind);
2769 abort ();
2770 break;
2771 }
2772
2773 /* We need to generate a fixup for this expression. */
2774 if (fc >= MAX_INSN_FIXUPS)
2775 as_fatal (_("too many fixups"));
2776
2777 fixups[fc].reloc = toc_reloc;
2778 fixups[fc].exp = ex;
2779 fixups[fc].opindex = *opindex_ptr;
2780 ++fc;
2781
2782 /* Ok. We've set up the fixup for the instruction. Now make it
2783 look like the constant 0 was found here. */
2784 ex.X_unsigned = 1;
2785 ex.X_op = O_constant;
2786 ex.X_add_number = 0;
2787 ex.X_add_symbol = NULL;
2788 ex.X_op_symbol = NULL;
2789 }
2790
2791 else
2792 #endif /* TE_PE */
2793 {
2794 if ((reg_names_p
2795 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2796 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2797 || !register_name (&ex))
2798 {
2799 char save_lex = lex_type['%'];
2800
2801 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2802 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2803 {
2804 cr_operand = TRUE;
2805 lex_type['%'] |= LEX_BEGIN_NAME;
2806 }
2807 expression (&ex);
2808 cr_operand = FALSE;
2809 lex_type['%'] = save_lex;
2810 }
2811 }
2812
2813 str = input_line_pointer;
2814 input_line_pointer = hold;
2815
2816 if (ex.X_op == O_illegal)
2817 as_bad (_("illegal operand"));
2818 else if (ex.X_op == O_absent)
2819 as_bad (_("missing operand"));
2820 else if (ex.X_op == O_register)
2821 {
2822 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2823 ppc_cpu, (char *) NULL, 0);
2824 }
2825 else if (ex.X_op == O_constant)
2826 {
2827 #ifdef OBJ_ELF
2828 /* Allow @HA, @L, @H on constants. */
2829 bfd_reloc_code_real_type reloc;
2830 char *orig_str = str;
2831
2832 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2833 switch (reloc)
2834 {
2835 default:
2836 str = orig_str;
2837 break;
2838
2839 case BFD_RELOC_LO16:
2840 /* X_unsigned is the default, so if the user has done
2841 something which cleared it, we always produce a
2842 signed value. */
2843 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2844 ex.X_add_number &= 0xffff;
2845 else
2846 ex.X_add_number = SEX16 (ex.X_add_number);
2847 break;
2848
2849 case BFD_RELOC_HI16:
2850 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2851 ex.X_add_number = PPC_HI (ex.X_add_number);
2852 else
2853 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2854 break;
2855
2856 case BFD_RELOC_HI16_S:
2857 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2858 ex.X_add_number = PPC_HA (ex.X_add_number);
2859 else
2860 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2861 break;
2862
2863 case BFD_RELOC_PPC64_HIGHER:
2864 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2865 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2866 else
2867 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2868 break;
2869
2870 case BFD_RELOC_PPC64_HIGHER_S:
2871 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2872 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2873 else
2874 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2875 break;
2876
2877 case BFD_RELOC_PPC64_HIGHEST:
2878 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2879 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2880 else
2881 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2882 break;
2883
2884 case BFD_RELOC_PPC64_HIGHEST_S:
2885 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2886 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2887 else
2888 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2889 break;
2890 }
2891 #endif /* OBJ_ELF */
2892 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2893 ppc_cpu, (char *) NULL, 0);
2894 }
2895 else
2896 {
2897 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2898 #ifdef OBJ_ELF
2899 if (ex.X_op == O_symbol && str[0] == '(')
2900 {
2901 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2902 if (sym_name[0] == '.')
2903 ++sym_name;
2904
2905 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
2906 {
2907 expressionS tls_exp;
2908
2909 hold = input_line_pointer;
2910 input_line_pointer = str + 1;
2911 expression (&tls_exp);
2912 if (tls_exp.X_op == O_symbol)
2913 {
2914 reloc = BFD_RELOC_UNUSED;
2915 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2916 {
2917 reloc = BFD_RELOC_PPC_TLSGD;
2918 input_line_pointer += 7;
2919 }
2920 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2921 {
2922 reloc = BFD_RELOC_PPC_TLSLD;
2923 input_line_pointer += 7;
2924 }
2925 if (reloc != BFD_RELOC_UNUSED)
2926 {
2927 SKIP_WHITESPACE ();
2928 str = input_line_pointer;
2929
2930 if (fc >= MAX_INSN_FIXUPS)
2931 as_fatal (_("too many fixups"));
2932 fixups[fc].exp = tls_exp;
2933 fixups[fc].opindex = *opindex_ptr;
2934 fixups[fc].reloc = reloc;
2935 ++fc;
2936 }
2937 }
2938 input_line_pointer = hold;
2939 }
2940 }
2941
2942 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2943 {
2944 /* Some TLS tweaks. */
2945 switch (reloc)
2946 {
2947 default:
2948 break;
2949
2950 case BFD_RELOC_PPC_TLS:
2951 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2952 as_bad (_("@tls may not be used with \"%s\" operands"),
2953 opcode->name);
2954 else if (operand->shift != 11)
2955 as_bad (_("@tls may only be used in last operand"));
2956 else
2957 insn = ppc_insert_operand (insn, operand,
2958 ppc_obj64 ? 13 : 2,
2959 ppc_cpu, (char *) NULL, 0);
2960 break;
2961
2962 /* We'll only use the 32 (or 64) bit form of these relocations
2963 in constants. Instructions get the 16 bit form. */
2964 case BFD_RELOC_PPC_DTPREL:
2965 reloc = BFD_RELOC_PPC_DTPREL16;
2966 break;
2967 case BFD_RELOC_PPC_TPREL:
2968 reloc = BFD_RELOC_PPC_TPREL16;
2969 break;
2970 }
2971
2972 /* If VLE-mode convert LO/HI/HA relocations. */
2973 if (opcode->flags & PPC_OPCODE_VLE)
2974 {
2975 int tmp_insn = insn & opcode->mask;
2976
2977 int use_d_reloc = (tmp_insn == E_OR2I_INSN
2978 || tmp_insn == E_AND2I_DOT_INSN
2979 || tmp_insn == E_OR2IS_INSN
2980 || tmp_insn == E_LIS_INSN
2981 || tmp_insn == E_AND2IS_DOT_INSN);
2982
2983
2984 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
2985 || tmp_insn == E_ADD2IS_INSN
2986 || tmp_insn == E_CMP16I_INSN
2987 || tmp_insn == E_MULL2I_INSN
2988 || tmp_insn == E_CMPL16I_INSN
2989 || tmp_insn == E_CMPH16I_INSN
2990 || tmp_insn == E_CMPHL16I_INSN);
2991
2992 switch (reloc)
2993 {
2994 default:
2995 break;
2996
2997 case BFD_RELOC_PPC_EMB_SDA21:
2998 reloc = BFD_RELOC_PPC_VLE_SDA21;
2999 break;
3000
3001 case BFD_RELOC_LO16:
3002 if (use_d_reloc)
3003 reloc = BFD_RELOC_PPC_VLE_LO16D;
3004 else if (use_a_reloc)
3005 reloc = BFD_RELOC_PPC_VLE_LO16A;
3006 break;
3007
3008 case BFD_RELOC_HI16:
3009 if (use_d_reloc)
3010 reloc = BFD_RELOC_PPC_VLE_HI16D;
3011 else if (use_a_reloc)
3012 reloc = BFD_RELOC_PPC_VLE_HI16A;
3013 break;
3014
3015 case BFD_RELOC_HI16_S:
3016 if (use_d_reloc)
3017 reloc = BFD_RELOC_PPC_VLE_HA16D;
3018 else if (use_a_reloc)
3019 reloc = BFD_RELOC_PPC_VLE_HA16A;
3020 break;
3021
3022 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3023 if (use_d_reloc)
3024 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3025 break;
3026
3027 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3028 if (use_d_reloc)
3029 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3030 break;
3031
3032 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3033 if (use_d_reloc)
3034 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3035 break;
3036 }
3037 }
3038
3039 /* For the absolute forms of branches, convert the PC
3040 relative form back into the absolute. */
3041 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3042 {
3043 switch (reloc)
3044 {
3045 case BFD_RELOC_PPC_B26:
3046 reloc = BFD_RELOC_PPC_BA26;
3047 break;
3048 case BFD_RELOC_PPC_B16:
3049 reloc = BFD_RELOC_PPC_BA16;
3050 break;
3051 case BFD_RELOC_PPC_B16_BRTAKEN:
3052 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3053 break;
3054 case BFD_RELOC_PPC_B16_BRNTAKEN:
3055 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3056 break;
3057 default:
3058 break;
3059 }
3060 }
3061
3062 switch (reloc)
3063 {
3064 case BFD_RELOC_PPC_TOC16:
3065 toc_reloc_types |= has_small_toc_reloc;
3066 break;
3067 case BFD_RELOC_PPC64_TOC16_LO:
3068 case BFD_RELOC_PPC64_TOC16_HI:
3069 case BFD_RELOC_PPC64_TOC16_HA:
3070 toc_reloc_types |= has_large_toc_reloc;
3071 break;
3072 default:
3073 break;
3074 }
3075
3076 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3077 {
3078 switch (reloc)
3079 {
3080 case BFD_RELOC_16:
3081 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3082 break;
3083 case BFD_RELOC_LO16:
3084 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3085 break;
3086 case BFD_RELOC_16_GOTOFF:
3087 reloc = BFD_RELOC_PPC64_GOT16_DS;
3088 break;
3089 case BFD_RELOC_LO16_GOTOFF:
3090 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3091 break;
3092 case BFD_RELOC_LO16_PLTOFF:
3093 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3094 break;
3095 case BFD_RELOC_16_BASEREL:
3096 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3097 break;
3098 case BFD_RELOC_LO16_BASEREL:
3099 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3100 break;
3101 case BFD_RELOC_PPC_TOC16:
3102 reloc = BFD_RELOC_PPC64_TOC16_DS;
3103 break;
3104 case BFD_RELOC_PPC64_TOC16_LO:
3105 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3106 break;
3107 case BFD_RELOC_PPC64_PLTGOT16:
3108 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3109 break;
3110 case BFD_RELOC_PPC64_PLTGOT16_LO:
3111 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3112 break;
3113 case BFD_RELOC_PPC_DTPREL16:
3114 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3115 break;
3116 case BFD_RELOC_PPC_DTPREL16_LO:
3117 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3118 break;
3119 case BFD_RELOC_PPC_TPREL16:
3120 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3121 break;
3122 case BFD_RELOC_PPC_TPREL16_LO:
3123 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3124 break;
3125 case BFD_RELOC_PPC_GOT_DTPREL16:
3126 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3127 case BFD_RELOC_PPC_GOT_TPREL16:
3128 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3129 break;
3130 default:
3131 as_bad (_("unsupported relocation for DS offset field"));
3132 break;
3133 }
3134 }
3135 }
3136 #endif /* OBJ_ELF */
3137
3138 if (reloc != BFD_RELOC_UNUSED)
3139 ;
3140 /* Determine a BFD reloc value based on the operand information.
3141 We are only prepared to turn a few of the operands into
3142 relocs. */
3143 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3144 && operand->bitm == 0x3fffffc
3145 && operand->shift == 0)
3146 reloc = BFD_RELOC_PPC_B26;
3147 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3148 && operand->bitm == 0xfffc
3149 && operand->shift == 0)
3150 reloc = BFD_RELOC_PPC_B16;
3151 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3152 && operand->bitm == 0x1fe
3153 && operand->shift == -1)
3154 reloc = BFD_RELOC_PPC_VLE_REL8;
3155 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3156 && operand->bitm == 0xfffe
3157 && operand->shift == 0)
3158 reloc = BFD_RELOC_PPC_VLE_REL15;
3159 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3160 && operand->bitm == 0x1fffffe
3161 && operand->shift == 0)
3162 reloc = BFD_RELOC_PPC_VLE_REL24;
3163 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3164 && operand->bitm == 0x3fffffc
3165 && operand->shift == 0)
3166 reloc = BFD_RELOC_PPC_BA26;
3167 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3168 && operand->bitm == 0xfffc
3169 && operand->shift == 0)
3170 reloc = BFD_RELOC_PPC_BA16;
3171 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3172 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3173 && (operand->bitm & 0xfff0) == 0xfff0
3174 && operand->shift == 0)
3175 {
3176 if (ppc_is_toc_sym (ex.X_add_symbol))
3177 {
3178 reloc = BFD_RELOC_PPC_TOC16;
3179 #ifdef OBJ_ELF
3180 if (ppc_obj64
3181 && (operand->flags & PPC_OPERAND_DS) != 0)
3182 reloc = BFD_RELOC_PPC64_TOC16_DS;
3183 #endif
3184 }
3185 else
3186 {
3187 reloc = BFD_RELOC_16;
3188 #ifdef OBJ_ELF
3189 if (ppc_obj64
3190 && (operand->flags & PPC_OPERAND_DS) != 0)
3191 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3192 #endif
3193 }
3194 }
3195 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
3196
3197 /* We need to generate a fixup for this expression. */
3198 if (fc >= MAX_INSN_FIXUPS)
3199 as_fatal (_("too many fixups"));
3200 fixups[fc].exp = ex;
3201 fixups[fc].opindex = *opindex_ptr;
3202 fixups[fc].reloc = reloc;
3203 ++fc;
3204 }
3205
3206 if (need_paren)
3207 {
3208 endc = ')';
3209 need_paren = 0;
3210 /* If expecting more operands, then we want to see "),". */
3211 if (*str == endc && opindex_ptr[1] != 0)
3212 {
3213 do
3214 ++str;
3215 while (ISSPACE (*str));
3216 endc = ',';
3217 }
3218 }
3219 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3220 {
3221 endc = '(';
3222 need_paren = 1;
3223 }
3224 else
3225 endc = ',';
3226
3227 /* The call to expression should have advanced str past any
3228 whitespace. */
3229 if (*str != endc
3230 && (endc != ',' || *str != '\0'))
3231 {
3232 if (*str == '\0')
3233 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3234 else
3235 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3236 break;
3237 }
3238
3239 if (*str != '\0')
3240 ++str;
3241 }
3242
3243 while (ISSPACE (*str))
3244 ++str;
3245
3246 if (*str != '\0')
3247 as_bad (_("junk at end of line: `%s'"), str);
3248
3249 #ifdef OBJ_ELF
3250 /* Do we need/want an APUinfo section? */
3251 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0)
3252 {
3253 /* These are all version "1". */
3254 if (opcode->flags & PPC_OPCODE_SPE)
3255 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3256 if (opcode->flags & PPC_OPCODE_ISEL)
3257 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3258 if (opcode->flags & PPC_OPCODE_EFS)
3259 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3260 if (opcode->flags & PPC_OPCODE_BRLOCK)
3261 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3262 if (opcode->flags & PPC_OPCODE_PMR)
3263 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3264 if (opcode->flags & PPC_OPCODE_CACHELCK)
3265 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3266 if (opcode->flags & PPC_OPCODE_RFMCI)
3267 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3268 if (opcode->flags & PPC_OPCODE_VLE)
3269 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3270 }
3271 #endif
3272
3273 /* Write out the instruction. */
3274 /* Differentiate between two and four byte insns. */
3275 if (ppc_mach () == bfd_mach_ppc_vle)
3276 {
3277 if (PPC_OP_SE_VLE (insn))
3278 insn_length = 2;
3279 else
3280 insn_length = 4;
3281 addr_mod = frag_now_fix () & 1;
3282 }
3283 else
3284 {
3285 insn_length = 4;
3286 addr_mod = frag_now_fix () & 3;
3287 }
3288 /* All instructions can start on a 2 byte boundary for VLE. */
3289 f = frag_more (insn_length);
3290 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3291 {
3292 if (ppc_mach() == bfd_mach_ppc_vle)
3293 as_bad (_("instruction address is not a multiple of 2"));
3294 else
3295 as_bad (_("instruction address is not a multiple of 4"));
3296 }
3297 frag_now->insn_addr = addr_mod;
3298 frag_now->has_code = 1;
3299 md_number_to_chars (f, insn, insn_length);
3300
3301 #ifdef OBJ_ELF
3302 dwarf2_emit_insn (insn_length);
3303 #endif
3304
3305 /* Create any fixups. */
3306 for (i = 0; i < fc; i++)
3307 {
3308 fixS *fixP;
3309 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3310 {
3311 reloc_howto_type *reloc_howto;
3312 int size;
3313 int offset;
3314
3315 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3316 if (!reloc_howto)
3317 abort ();
3318
3319 size = bfd_get_reloc_size (reloc_howto);
3320 offset = target_big_endian ? (insn_length - size) : 0;
3321
3322 if (size < 1 || size > 4)
3323 abort ();
3324
3325 fixP = fix_new_exp (frag_now,
3326 f - frag_now->fr_literal + offset,
3327 size,
3328 &fixups[i].exp,
3329 reloc_howto->pc_relative,
3330 fixups[i].reloc);
3331 }
3332 else
3333 {
3334 const struct powerpc_operand *operand;
3335
3336 operand = &powerpc_operands[fixups[i].opindex];
3337 fixP = fix_new_exp (frag_now,
3338 f - frag_now->fr_literal,
3339 insn_length,
3340 &fixups[i].exp,
3341 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3342 BFD_RELOC_UNUSED);
3343 }
3344 fixP->fx_pcrel_adjust = fixups[i].opindex;
3345 }
3346 }
3347
3348 /* Handle a macro. Gather all the operands, transform them as
3349 described by the macro, and call md_assemble recursively. All the
3350 operands are separated by commas; we don't accept parentheses
3351 around operands here. */
3352
3353 static void
3354 ppc_macro (char *str, const struct powerpc_macro *macro)
3355 {
3356 char *operands[10];
3357 unsigned int count;
3358 char *s;
3359 unsigned int len;
3360 const char *format;
3361 unsigned int arg;
3362 char *send;
3363 char *complete;
3364
3365 /* Gather the users operands into the operands array. */
3366 count = 0;
3367 s = str;
3368 while (1)
3369 {
3370 if (count >= sizeof operands / sizeof operands[0])
3371 break;
3372 operands[count++] = s;
3373 s = strchr (s, ',');
3374 if (s == (char *) NULL)
3375 break;
3376 *s++ = '\0';
3377 }
3378
3379 if (count != macro->operands)
3380 {
3381 as_bad (_("wrong number of operands"));
3382 return;
3383 }
3384
3385 /* Work out how large the string must be (the size is unbounded
3386 because it includes user input). */
3387 len = 0;
3388 format = macro->format;
3389 while (*format != '\0')
3390 {
3391 if (*format != '%')
3392 {
3393 ++len;
3394 ++format;
3395 }
3396 else
3397 {
3398 arg = strtol (format + 1, &send, 10);
3399 know (send != format && arg < count);
3400 len += strlen (operands[arg]);
3401 format = send;
3402 }
3403 }
3404
3405 /* Put the string together. */
3406 complete = s = (char *) alloca (len + 1);
3407 format = macro->format;
3408 while (*format != '\0')
3409 {
3410 if (*format != '%')
3411 *s++ = *format++;
3412 else
3413 {
3414 arg = strtol (format + 1, &send, 10);
3415 strcpy (s, operands[arg]);
3416 s += strlen (s);
3417 format = send;
3418 }
3419 }
3420 *s = '\0';
3421
3422 /* Assemble the constructed instruction. */
3423 md_assemble (complete);
3424 }
3425 \f
3426 #ifdef OBJ_ELF
3427 /* For ELF, add support for SHT_ORDERED. */
3428
3429 int
3430 ppc_section_type (char *str, size_t len)
3431 {
3432 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3433 return SHT_ORDERED;
3434
3435 return -1;
3436 }
3437
3438 int
3439 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3440 {
3441 if (type == SHT_ORDERED)
3442 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3443
3444 return flags;
3445 }
3446 #endif /* OBJ_ELF */
3447
3448 \f
3449 /* Pseudo-op handling. */
3450
3451 /* The .byte pseudo-op. This is similar to the normal .byte
3452 pseudo-op, but it can also take a single ASCII string. */
3453
3454 static void
3455 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3456 {
3457 if (*input_line_pointer != '\"')
3458 {
3459 cons (1);
3460 return;
3461 }
3462
3463 /* Gather characters. A real double quote is doubled. Unusual
3464 characters are not permitted. */
3465 ++input_line_pointer;
3466 while (1)
3467 {
3468 char c;
3469
3470 c = *input_line_pointer++;
3471
3472 if (c == '\"')
3473 {
3474 if (*input_line_pointer != '\"')
3475 break;
3476 ++input_line_pointer;
3477 }
3478
3479 FRAG_APPEND_1_CHAR (c);
3480 }
3481
3482 demand_empty_rest_of_line ();
3483 }
3484 \f
3485 #ifdef OBJ_XCOFF
3486
3487 /* XCOFF specific pseudo-op handling. */
3488
3489 /* This is set if we are creating a .stabx symbol, since we don't want
3490 to handle symbol suffixes for such symbols. */
3491 static bfd_boolean ppc_stab_symbol;
3492
3493 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3494 symbols in the .bss segment as though they were local common
3495 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3496 aligns .comm and .lcomm to 4 bytes. */
3497
3498 static void
3499 ppc_comm (int lcomm)
3500 {
3501 asection *current_seg = now_seg;
3502 subsegT current_subseg = now_subseg;
3503 char *name;
3504 char endc;
3505 char *end_name;
3506 offsetT size;
3507 offsetT align;
3508 symbolS *lcomm_sym = NULL;
3509 symbolS *sym;
3510 char *pfrag;
3511
3512 name = input_line_pointer;
3513 endc = get_symbol_end ();
3514 end_name = input_line_pointer;
3515 *end_name = endc;
3516
3517 if (*input_line_pointer != ',')
3518 {
3519 as_bad (_("missing size"));
3520 ignore_rest_of_line ();
3521 return;
3522 }
3523 ++input_line_pointer;
3524
3525 size = get_absolute_expression ();
3526 if (size < 0)
3527 {
3528 as_bad (_("negative size"));
3529 ignore_rest_of_line ();
3530 return;
3531 }
3532
3533 if (! lcomm)
3534 {
3535 /* The third argument to .comm is the alignment. */
3536 if (*input_line_pointer != ',')
3537 align = 2;
3538 else
3539 {
3540 ++input_line_pointer;
3541 align = get_absolute_expression ();
3542 if (align <= 0)
3543 {
3544 as_warn (_("ignoring bad alignment"));
3545 align = 2;
3546 }
3547 }
3548 }
3549 else
3550 {
3551 char *lcomm_name;
3552 char lcomm_endc;
3553
3554 if (size <= 4)
3555 align = 2;
3556 else
3557 align = 3;
3558
3559 /* The third argument to .lcomm appears to be the real local
3560 common symbol to create. References to the symbol named in
3561 the first argument are turned into references to the third
3562 argument. */
3563 if (*input_line_pointer != ',')
3564 {
3565 as_bad (_("missing real symbol name"));
3566 ignore_rest_of_line ();
3567 return;
3568 }
3569 ++input_line_pointer;
3570
3571 lcomm_name = input_line_pointer;
3572 lcomm_endc = get_symbol_end ();
3573
3574 lcomm_sym = symbol_find_or_make (lcomm_name);
3575
3576 *input_line_pointer = lcomm_endc;
3577 }
3578
3579 *end_name = '\0';
3580 sym = symbol_find_or_make (name);
3581 *end_name = endc;
3582
3583 if (S_IS_DEFINED (sym)
3584 || S_GET_VALUE (sym) != 0)
3585 {
3586 as_bad (_("attempt to redefine symbol"));
3587 ignore_rest_of_line ();
3588 return;
3589 }
3590
3591 record_alignment (bss_section, align);
3592
3593 if (! lcomm
3594 || ! S_IS_DEFINED (lcomm_sym))
3595 {
3596 symbolS *def_sym;
3597 offsetT def_size;
3598
3599 if (! lcomm)
3600 {
3601 def_sym = sym;
3602 def_size = size;
3603 S_SET_EXTERNAL (sym);
3604 }
3605 else
3606 {
3607 symbol_get_tc (lcomm_sym)->output = 1;
3608 def_sym = lcomm_sym;
3609 def_size = 0;
3610 }
3611
3612 subseg_set (bss_section, 1);
3613 frag_align (align, 0, 0);
3614
3615 symbol_set_frag (def_sym, frag_now);
3616 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3617 def_size, (char *) NULL);
3618 *pfrag = 0;
3619 S_SET_SEGMENT (def_sym, bss_section);
3620 symbol_get_tc (def_sym)->align = align;
3621 }
3622 else if (lcomm)
3623 {
3624 /* Align the size of lcomm_sym. */
3625 symbol_get_frag (lcomm_sym)->fr_offset =
3626 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3627 &~ ((1 << align) - 1));
3628 if (align > symbol_get_tc (lcomm_sym)->align)
3629 symbol_get_tc (lcomm_sym)->align = align;
3630 }
3631
3632 if (lcomm)
3633 {
3634 /* Make sym an offset from lcomm_sym. */
3635 S_SET_SEGMENT (sym, bss_section);
3636 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3637 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3638 symbol_get_frag (lcomm_sym)->fr_offset += size;
3639 }
3640
3641 subseg_set (current_seg, current_subseg);
3642
3643 demand_empty_rest_of_line ();
3644 }
3645
3646 /* The .csect pseudo-op. This switches us into a different
3647 subsegment. The first argument is a symbol whose value is the
3648 start of the .csect. In COFF, csect symbols get special aux
3649 entries defined by the x_csect field of union internal_auxent. The
3650 optional second argument is the alignment (the default is 2). */
3651
3652 static void
3653 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3654 {
3655 char *name;
3656 char endc;
3657 symbolS *sym;
3658 offsetT align;
3659
3660 name = input_line_pointer;
3661 endc = get_symbol_end ();
3662
3663 sym = symbol_find_or_make (name);
3664
3665 *input_line_pointer = endc;
3666
3667 if (S_GET_NAME (sym)[0] == '\0')
3668 {
3669 /* An unnamed csect is assumed to be [PR]. */
3670 symbol_get_tc (sym)->symbol_class = XMC_PR;
3671 }
3672
3673 align = 2;
3674 if (*input_line_pointer == ',')
3675 {
3676 ++input_line_pointer;
3677 align = get_absolute_expression ();
3678 }
3679
3680 ppc_change_csect (sym, align);
3681
3682 demand_empty_rest_of_line ();
3683 }
3684
3685 /* Change to a different csect. */
3686
3687 static void
3688 ppc_change_csect (symbolS *sym, offsetT align)
3689 {
3690 if (S_IS_DEFINED (sym))
3691 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3692 else
3693 {
3694 symbolS **list_ptr;
3695 int after_toc;
3696 int hold_chunksize;
3697 symbolS *list;
3698 int is_code;
3699 segT sec;
3700
3701 /* This is a new csect. We need to look at the symbol class to
3702 figure out whether it should go in the text section or the
3703 data section. */
3704 after_toc = 0;
3705 is_code = 0;
3706 switch (symbol_get_tc (sym)->symbol_class)
3707 {
3708 case XMC_PR:
3709 case XMC_RO:
3710 case XMC_DB:
3711 case XMC_GL:
3712 case XMC_XO:
3713 case XMC_SV:
3714 case XMC_TI:
3715 case XMC_TB:
3716 S_SET_SEGMENT (sym, text_section);
3717 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3718 ++ppc_text_subsegment;
3719 list_ptr = &ppc_text_csects;
3720 is_code = 1;
3721 break;
3722 case XMC_RW:
3723 case XMC_TC0:
3724 case XMC_TC:
3725 case XMC_DS:
3726 case XMC_UA:
3727 case XMC_BS:
3728 case XMC_UC:
3729 if (ppc_toc_csect != NULL
3730 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3731 == ppc_data_subsegment))
3732 after_toc = 1;
3733 S_SET_SEGMENT (sym, data_section);
3734 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3735 ++ppc_data_subsegment;
3736 list_ptr = &ppc_data_csects;
3737 break;
3738 default:
3739 abort ();
3740 }
3741
3742 /* We set the obstack chunk size to a small value before
3743 changing subsegments, so that we don't use a lot of memory
3744 space for what may be a small section. */
3745 hold_chunksize = chunksize;
3746 chunksize = 64;
3747
3748 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3749 symbol_get_tc (sym)->subseg);
3750
3751 chunksize = hold_chunksize;
3752
3753 if (after_toc)
3754 ppc_after_toc_frag = frag_now;
3755
3756 record_alignment (sec, align);
3757 if (is_code)
3758 frag_align_code (align, 0);
3759 else
3760 frag_align (align, 0, 0);
3761
3762 symbol_set_frag (sym, frag_now);
3763 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3764
3765 symbol_get_tc (sym)->align = align;
3766 symbol_get_tc (sym)->output = 1;
3767 symbol_get_tc (sym)->within = sym;
3768
3769 for (list = *list_ptr;
3770 symbol_get_tc (list)->next != (symbolS *) NULL;
3771 list = symbol_get_tc (list)->next)
3772 ;
3773 symbol_get_tc (list)->next = sym;
3774
3775 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3776 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3777 &symbol_lastP);
3778 }
3779
3780 ppc_current_csect = sym;
3781 }
3782
3783 static void
3784 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3785 {
3786 segT sec;
3787 flagword oldflags;
3788 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3789
3790 sec = subseg_new (dw->name, subseg);
3791 oldflags = bfd_get_section_flags (stdoutput, sec);
3792 if (oldflags == SEC_NO_FLAGS)
3793 {
3794 /* Just created section. */
3795 gas_assert (dw_sections[idx].sect == NULL);
3796
3797 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3798 bfd_set_section_alignment (stdoutput, sec, 0);
3799 dw_sections[idx].sect = sec;
3800 }
3801
3802 /* Not anymore in a csect. */
3803 ppc_current_csect = NULL;
3804 }
3805
3806 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3807 .dwsect flag [, opt-label ]
3808 */
3809
3810 static void
3811 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3812 {
3813 offsetT flag;
3814 symbolS *opt_label;
3815 const struct xcoff_dwsect_name *dw;
3816 struct dw_subsection *subseg;
3817 struct dw_section *dws;
3818 int i;
3819
3820 /* Find section. */
3821 flag = get_absolute_expression ();
3822 dw = NULL;
3823 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3824 if (xcoff_dwsect_names[i].flag == flag)
3825 {
3826 dw = &xcoff_dwsect_names[i];
3827 break;
3828 }
3829
3830 /* Parse opt-label. */
3831 if (*input_line_pointer == ',')
3832 {
3833 const char *label;
3834 char c;
3835
3836 ++input_line_pointer;
3837
3838 label = input_line_pointer;
3839 c = get_symbol_end ();
3840 opt_label = symbol_find_or_make (label);
3841 *input_line_pointer = c;
3842 }
3843 else
3844 opt_label = NULL;
3845
3846 demand_empty_rest_of_line ();
3847
3848 /* Return now in case of unknown subsection. */
3849 if (dw == NULL)
3850 {
3851 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3852 (unsigned)flag);
3853 return;
3854 }
3855
3856 /* Find the subsection. */
3857 dws = &dw_sections[i];
3858 subseg = NULL;
3859 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3860 {
3861 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3862 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3863 {
3864 as_bad (_("label %s was not defined in this dwarf section"),
3865 S_GET_NAME (opt_label));
3866 subseg = dws->anon_subseg;
3867 opt_label = NULL;
3868 }
3869 else
3870 subseg = symbol_get_tc (opt_label)->u.dw;
3871 }
3872
3873 if (subseg != NULL)
3874 {
3875 /* Switch to the subsection. */
3876 ppc_change_debug_section (i, subseg->subseg);
3877 }
3878 else
3879 {
3880 /* Create a new dw subsection. */
3881 subseg = (struct dw_subsection *)
3882 xmalloc (sizeof (struct dw_subsection));
3883
3884 if (opt_label == NULL)
3885 {
3886 /* The anonymous one. */
3887 subseg->subseg = 0;
3888 subseg->link = NULL;
3889 dws->anon_subseg = subseg;
3890 }
3891 else
3892 {
3893 /* A named one. */
3894 if (dws->list_subseg != NULL)
3895 subseg->subseg = dws->list_subseg->subseg + 1;
3896 else
3897 subseg->subseg = 1;
3898
3899 subseg->link = dws->list_subseg;
3900 dws->list_subseg = subseg;
3901 symbol_get_tc (opt_label)->u.dw = subseg;
3902 }
3903
3904 ppc_change_debug_section (i, subseg->subseg);
3905
3906 if (dw->def_size)
3907 {
3908 /* Add the length field. */
3909 expressionS *exp = &subseg->end_exp;
3910 int sz;
3911
3912 if (opt_label != NULL)
3913 symbol_set_value_now (opt_label);
3914
3915 /* Add the length field. Note that according to the AIX assembler
3916 manual, the size of the length field is 4 for powerpc32 but
3917 12 for powerpc64. */
3918 if (ppc_obj64)
3919 {
3920 /* Write the 64bit marker. */
3921 md_number_to_chars (frag_more (4), -1, 4);
3922 }
3923
3924 exp->X_op = O_subtract;
3925 exp->X_op_symbol = symbol_temp_new_now ();
3926 exp->X_add_symbol = symbol_temp_make ();
3927
3928 sz = ppc_obj64 ? 8 : 4;
3929 exp->X_add_number = -sz;
3930 emit_expr (exp, sz);
3931 }
3932 }
3933 }
3934
3935 /* This function handles the .text and .data pseudo-ops. These
3936 pseudo-ops aren't really used by XCOFF; we implement them for the
3937 convenience of people who aren't used to XCOFF. */
3938
3939 static void
3940 ppc_section (int type)
3941 {
3942 const char *name;
3943 symbolS *sym;
3944
3945 if (type == 't')
3946 name = ".text[PR]";
3947 else if (type == 'd')
3948 name = ".data[RW]";
3949 else
3950 abort ();
3951
3952 sym = symbol_find_or_make (name);
3953
3954 ppc_change_csect (sym, 2);
3955
3956 demand_empty_rest_of_line ();
3957 }
3958
3959 /* This function handles the .section pseudo-op. This is mostly to
3960 give an error, since XCOFF only supports .text, .data and .bss, but
3961 we do permit the user to name the text or data section. */
3962
3963 static void
3964 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3965 {
3966 char *user_name;
3967 const char *real_name;
3968 char c;
3969 symbolS *sym;
3970
3971 user_name = input_line_pointer;
3972 c = get_symbol_end ();
3973
3974 if (strcmp (user_name, ".text") == 0)
3975 real_name = ".text[PR]";
3976 else if (strcmp (user_name, ".data") == 0)
3977 real_name = ".data[RW]";
3978 else
3979 {
3980 as_bad (_("the XCOFF file format does not support arbitrary sections"));
3981 *input_line_pointer = c;
3982 ignore_rest_of_line ();
3983 return;
3984 }
3985
3986 *input_line_pointer = c;
3987
3988 sym = symbol_find_or_make (real_name);
3989
3990 ppc_change_csect (sym, 2);
3991
3992 demand_empty_rest_of_line ();
3993 }
3994
3995 /* The .extern pseudo-op. We create an undefined symbol. */
3996
3997 static void
3998 ppc_extern (int ignore ATTRIBUTE_UNUSED)
3999 {
4000 char *name;
4001 char endc;
4002
4003 name = input_line_pointer;
4004 endc = get_symbol_end ();
4005
4006 (void) symbol_find_or_make (name);
4007
4008 *input_line_pointer = endc;
4009
4010 demand_empty_rest_of_line ();
4011 }
4012
4013 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4014
4015 static void
4016 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4017 {
4018 char *name;
4019 char endc;
4020 symbolS *sym;
4021
4022 name = input_line_pointer;
4023 endc = get_symbol_end ();
4024
4025 sym = symbol_find_or_make (name);
4026
4027 *input_line_pointer = endc;
4028
4029 symbol_get_tc (sym)->output = 1;
4030
4031 demand_empty_rest_of_line ();
4032 }
4033
4034 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4035 relocations at the beginning of the current csect.
4036
4037 (In principle, there's no reason why the relocations _have_ to be at
4038 the beginning. Anywhere in the csect would do. However, inserting
4039 at the beginning is what the native assmebler does, and it helps to
4040 deal with cases where the .ref statements follow the section contents.)
4041
4042 ??? .refs don't work for empty .csects. However, the native assembler
4043 doesn't report an error in this case, and neither yet do we. */
4044
4045 static void
4046 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4047 {
4048 char *name;
4049 char c;
4050
4051 if (ppc_current_csect == NULL)
4052 {
4053 as_bad (_(".ref outside .csect"));
4054 ignore_rest_of_line ();
4055 return;
4056 }
4057
4058 do
4059 {
4060 name = input_line_pointer;
4061 c = get_symbol_end ();
4062
4063 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4064 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4065
4066 *input_line_pointer = c;
4067 SKIP_WHITESPACE ();
4068 c = *input_line_pointer;
4069 if (c == ',')
4070 {
4071 input_line_pointer++;
4072 SKIP_WHITESPACE ();
4073 if (is_end_of_line[(unsigned char) *input_line_pointer])
4074 {
4075 as_bad (_("missing symbol name"));
4076 ignore_rest_of_line ();
4077 return;
4078 }
4079 }
4080 }
4081 while (c == ',');
4082
4083 demand_empty_rest_of_line ();
4084 }
4085
4086 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4087 although I don't know why it bothers. */
4088
4089 static void
4090 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4091 {
4092 char *name;
4093 char endc;
4094 symbolS *sym;
4095 int len;
4096
4097 name = input_line_pointer;
4098 endc = get_symbol_end ();
4099
4100 sym = symbol_find_or_make (name);
4101
4102 *input_line_pointer = endc;
4103
4104 if (*input_line_pointer != ',')
4105 {
4106 as_bad (_("missing rename string"));
4107 ignore_rest_of_line ();
4108 return;
4109 }
4110 ++input_line_pointer;
4111
4112 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4113
4114 demand_empty_rest_of_line ();
4115 }
4116
4117 /* The .stabx pseudo-op. This is similar to a normal .stabs
4118 pseudo-op, but slightly different. A sample is
4119 .stabx "main:F-1",.main,142,0
4120 The first argument is the symbol name to create. The second is the
4121 value, and the third is the storage class. The fourth seems to be
4122 always zero, and I am assuming it is the type. */
4123
4124 static void
4125 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4126 {
4127 char *name;
4128 int len;
4129 symbolS *sym;
4130 expressionS exp;
4131
4132 name = demand_copy_C_string (&len);
4133
4134 if (*input_line_pointer != ',')
4135 {
4136 as_bad (_("missing value"));
4137 return;
4138 }
4139 ++input_line_pointer;
4140
4141 ppc_stab_symbol = TRUE;
4142 sym = symbol_make (name);
4143 ppc_stab_symbol = FALSE;
4144
4145 symbol_get_tc (sym)->real_name = name;
4146
4147 (void) expression (&exp);
4148
4149 switch (exp.X_op)
4150 {
4151 case O_illegal:
4152 case O_absent:
4153 case O_big:
4154 as_bad (_("illegal .stabx expression; zero assumed"));
4155 exp.X_add_number = 0;
4156 /* Fall through. */
4157 case O_constant:
4158 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4159 symbol_set_frag (sym, &zero_address_frag);
4160 break;
4161
4162 case O_symbol:
4163 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4164 symbol_set_value_expression (sym, &exp);
4165 else
4166 {
4167 S_SET_VALUE (sym,
4168 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4169 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4170 }
4171 break;
4172
4173 default:
4174 /* The value is some complex expression. This will probably
4175 fail at some later point, but this is probably the right
4176 thing to do here. */
4177 symbol_set_value_expression (sym, &exp);
4178 break;
4179 }
4180
4181 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4182 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4183
4184 if (*input_line_pointer != ',')
4185 {
4186 as_bad (_("missing class"));
4187 return;
4188 }
4189 ++input_line_pointer;
4190
4191 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4192
4193 if (*input_line_pointer != ',')
4194 {
4195 as_bad (_("missing type"));
4196 return;
4197 }
4198 ++input_line_pointer;
4199
4200 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4201
4202 symbol_get_tc (sym)->output = 1;
4203
4204 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4205 {
4206 /* In this case :
4207
4208 .bs name
4209 .stabx "z",arrays_,133,0
4210 .es
4211
4212 .comm arrays_,13768,3
4213
4214 resolve_symbol_value will copy the exp's "within" into sym's when the
4215 offset is 0. Since this seems to be corner case problem,
4216 only do the correction for storage class C_STSYM. A better solution
4217 would be to have the tc field updated in ppc_symbol_new_hook. */
4218
4219 if (exp.X_op == O_symbol)
4220 {
4221 if (ppc_current_block == NULL)
4222 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4223
4224 symbol_get_tc (sym)->within = ppc_current_block;
4225 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4226 }
4227 }
4228
4229 if (exp.X_op != O_symbol
4230 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4231 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4232 ppc_frob_label (sym);
4233 else
4234 {
4235 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4236 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4237 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4238 symbol_get_tc (ppc_current_csect)->within = sym;
4239 }
4240
4241 demand_empty_rest_of_line ();
4242 }
4243
4244 /* The .function pseudo-op. This takes several arguments. The first
4245 argument seems to be the external name of the symbol. The second
4246 argument seems to be the label for the start of the function. gcc
4247 uses the same name for both. I have no idea what the third and
4248 fourth arguments are meant to be. The optional fifth argument is
4249 an expression for the size of the function. In COFF this symbol
4250 gets an aux entry like that used for a csect. */
4251
4252 static void
4253 ppc_function (int ignore ATTRIBUTE_UNUSED)
4254 {
4255 char *name;
4256 char endc;
4257 char *s;
4258 symbolS *ext_sym;
4259 symbolS *lab_sym;
4260
4261 name = input_line_pointer;
4262 endc = get_symbol_end ();
4263
4264 /* Ignore any [PR] suffix. */
4265 name = ppc_canonicalize_symbol_name (name);
4266 s = strchr (name, '[');
4267 if (s != (char *) NULL
4268 && strcmp (s + 1, "PR]") == 0)
4269 *s = '\0';
4270
4271 ext_sym = symbol_find_or_make (name);
4272
4273 *input_line_pointer = endc;
4274
4275 if (*input_line_pointer != ',')
4276 {
4277 as_bad (_("missing symbol name"));
4278 ignore_rest_of_line ();
4279 return;
4280 }
4281 ++input_line_pointer;
4282
4283 name = input_line_pointer;
4284 endc = get_symbol_end ();
4285
4286 lab_sym = symbol_find_or_make (name);
4287
4288 *input_line_pointer = endc;
4289
4290 if (ext_sym != lab_sym)
4291 {
4292 expressionS exp;
4293
4294 exp.X_op = O_symbol;
4295 exp.X_add_symbol = lab_sym;
4296 exp.X_op_symbol = NULL;
4297 exp.X_add_number = 0;
4298 exp.X_unsigned = 0;
4299 symbol_set_value_expression (ext_sym, &exp);
4300 }
4301
4302 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4303 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4304 symbol_get_tc (ext_sym)->output = 1;
4305
4306 if (*input_line_pointer == ',')
4307 {
4308 expressionS exp;
4309
4310 /* Ignore the third argument. */
4311 ++input_line_pointer;
4312 expression (& exp);
4313 if (*input_line_pointer == ',')
4314 {
4315 /* Ignore the fourth argument. */
4316 ++input_line_pointer;
4317 expression (& exp);
4318 if (*input_line_pointer == ',')
4319 {
4320 /* The fifth argument is the function size. */
4321 ++input_line_pointer;
4322 symbol_get_tc (ext_sym)->u.size = symbol_new
4323 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4324 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4325 }
4326 }
4327 }
4328
4329 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4330 SF_SET_FUNCTION (ext_sym);
4331 SF_SET_PROCESS (ext_sym);
4332 coff_add_linesym (ext_sym);
4333
4334 demand_empty_rest_of_line ();
4335 }
4336
4337 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4338 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4339 with the correct line number */
4340
4341 static symbolS *saved_bi_sym = 0;
4342
4343 static void
4344 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4345 {
4346 symbolS *sym;
4347
4348 sym = symbol_make (".bf");
4349 S_SET_SEGMENT (sym, text_section);
4350 symbol_set_frag (sym, frag_now);
4351 S_SET_VALUE (sym, frag_now_fix ());
4352 S_SET_STORAGE_CLASS (sym, C_FCN);
4353
4354 coff_line_base = get_absolute_expression ();
4355
4356 S_SET_NUMBER_AUXILIARY (sym, 1);
4357 SA_SET_SYM_LNNO (sym, coff_line_base);
4358
4359 /* Line number for bi. */
4360 if (saved_bi_sym)
4361 {
4362 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4363 saved_bi_sym = 0;
4364 }
4365
4366
4367 symbol_get_tc (sym)->output = 1;
4368
4369 ppc_frob_label (sym);
4370
4371 demand_empty_rest_of_line ();
4372 }
4373
4374 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4375 ".ef", except that the line number is absolute, not relative to the
4376 most recent ".bf" symbol. */
4377
4378 static void
4379 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4380 {
4381 symbolS *sym;
4382
4383 sym = symbol_make (".ef");
4384 S_SET_SEGMENT (sym, text_section);
4385 symbol_set_frag (sym, frag_now);
4386 S_SET_VALUE (sym, frag_now_fix ());
4387 S_SET_STORAGE_CLASS (sym, C_FCN);
4388 S_SET_NUMBER_AUXILIARY (sym, 1);
4389 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4390 symbol_get_tc (sym)->output = 1;
4391
4392 ppc_frob_label (sym);
4393
4394 demand_empty_rest_of_line ();
4395 }
4396
4397 /* The .bi and .ei pseudo-ops. These take a string argument and
4398 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4399 the symbol list. The value of .bi will be know when the next .bf
4400 is encountered. */
4401
4402 static void
4403 ppc_biei (int ei)
4404 {
4405 static symbolS *last_biei;
4406
4407 char *name;
4408 int len;
4409 symbolS *sym;
4410 symbolS *look;
4411
4412 name = demand_copy_C_string (&len);
4413
4414 /* The value of these symbols is actually file offset. Here we set
4415 the value to the index into the line number entries. In
4416 ppc_frob_symbols we set the fix_line field, which will cause BFD
4417 to do the right thing. */
4418
4419 sym = symbol_make (name);
4420 /* obj-coff.c currently only handles line numbers correctly in the
4421 .text section. */
4422 S_SET_SEGMENT (sym, text_section);
4423 S_SET_VALUE (sym, coff_n_line_nos);
4424 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4425
4426 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4427 symbol_get_tc (sym)->output = 1;
4428
4429 /* Save bi. */
4430 if (ei)
4431 saved_bi_sym = 0;
4432 else
4433 saved_bi_sym = sym;
4434
4435 for (look = last_biei ? last_biei : symbol_rootP;
4436 (look != (symbolS *) NULL
4437 && (S_GET_STORAGE_CLASS (look) == C_FILE
4438 || S_GET_STORAGE_CLASS (look) == C_BINCL
4439 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4440 look = symbol_next (look))
4441 ;
4442 if (look != (symbolS *) NULL)
4443 {
4444 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4445 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4446 last_biei = sym;
4447 }
4448
4449 demand_empty_rest_of_line ();
4450 }
4451
4452 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4453 There is one argument, which is a csect symbol. The value of the
4454 .bs symbol is the index of this csect symbol. */
4455
4456 static void
4457 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4458 {
4459 char *name;
4460 char endc;
4461 symbolS *csect;
4462 symbolS *sym;
4463
4464 if (ppc_current_block != NULL)
4465 as_bad (_("nested .bs blocks"));
4466
4467 name = input_line_pointer;
4468 endc = get_symbol_end ();
4469
4470 csect = symbol_find_or_make (name);
4471
4472 *input_line_pointer = endc;
4473
4474 sym = symbol_make (".bs");
4475 S_SET_SEGMENT (sym, now_seg);
4476 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4477 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4478 symbol_get_tc (sym)->output = 1;
4479
4480 symbol_get_tc (sym)->within = csect;
4481
4482 ppc_frob_label (sym);
4483
4484 ppc_current_block = sym;
4485
4486 demand_empty_rest_of_line ();
4487 }
4488
4489 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4490
4491 static void
4492 ppc_es (int ignore ATTRIBUTE_UNUSED)
4493 {
4494 symbolS *sym;
4495
4496 if (ppc_current_block == NULL)
4497 as_bad (_(".es without preceding .bs"));
4498
4499 sym = symbol_make (".es");
4500 S_SET_SEGMENT (sym, now_seg);
4501 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4502 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4503 symbol_get_tc (sym)->output = 1;
4504
4505 ppc_frob_label (sym);
4506
4507 ppc_current_block = NULL;
4508
4509 demand_empty_rest_of_line ();
4510 }
4511
4512 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4513 line number. */
4514
4515 static void
4516 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4517 {
4518 symbolS *sym;
4519
4520 sym = symbol_make (".bb");
4521 S_SET_SEGMENT (sym, text_section);
4522 symbol_set_frag (sym, frag_now);
4523 S_SET_VALUE (sym, frag_now_fix ());
4524 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4525
4526 S_SET_NUMBER_AUXILIARY (sym, 1);
4527 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4528
4529 symbol_get_tc (sym)->output = 1;
4530
4531 SF_SET_PROCESS (sym);
4532
4533 ppc_frob_label (sym);
4534
4535 demand_empty_rest_of_line ();
4536 }
4537
4538 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4539 line number. */
4540
4541 static void
4542 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4543 {
4544 symbolS *sym;
4545
4546 sym = symbol_make (".eb");
4547 S_SET_SEGMENT (sym, text_section);
4548 symbol_set_frag (sym, frag_now);
4549 S_SET_VALUE (sym, frag_now_fix ());
4550 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4551 S_SET_NUMBER_AUXILIARY (sym, 1);
4552 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4553 symbol_get_tc (sym)->output = 1;
4554
4555 SF_SET_PROCESS (sym);
4556
4557 ppc_frob_label (sym);
4558
4559 demand_empty_rest_of_line ();
4560 }
4561
4562 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4563 specified name. */
4564
4565 static void
4566 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4567 {
4568 char *name;
4569 int len;
4570 symbolS *sym;
4571
4572 name = demand_copy_C_string (&len);
4573 sym = symbol_make (name);
4574 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4575 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4576 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4577 S_SET_VALUE (sym, 0);
4578 symbol_get_tc (sym)->output = 1;
4579
4580 ppc_frob_label (sym);
4581
4582 demand_empty_rest_of_line ();
4583 }
4584
4585 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4586
4587 static void
4588 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4589 {
4590 symbolS *sym;
4591
4592 sym = symbol_make (".ec");
4593 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4594 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4595 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4596 S_SET_VALUE (sym, 0);
4597 symbol_get_tc (sym)->output = 1;
4598
4599 ppc_frob_label (sym);
4600
4601 demand_empty_rest_of_line ();
4602 }
4603
4604 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4605
4606 static void
4607 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4608 {
4609 if (ppc_toc_csect != (symbolS *) NULL)
4610 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4611 else
4612 {
4613 subsegT subseg;
4614 symbolS *sym;
4615 symbolS *list;
4616
4617 subseg = ppc_data_subsegment;
4618 ++ppc_data_subsegment;
4619
4620 subseg_new (segment_name (data_section), subseg);
4621 ppc_toc_frag = frag_now;
4622
4623 sym = symbol_find_or_make ("TOC[TC0]");
4624 symbol_set_frag (sym, frag_now);
4625 S_SET_SEGMENT (sym, data_section);
4626 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4627 symbol_get_tc (sym)->subseg = subseg;
4628 symbol_get_tc (sym)->output = 1;
4629 symbol_get_tc (sym)->within = sym;
4630
4631 ppc_toc_csect = sym;
4632
4633 for (list = ppc_data_csects;
4634 symbol_get_tc (list)->next != (symbolS *) NULL;
4635 list = symbol_get_tc (list)->next)
4636 ;
4637 symbol_get_tc (list)->next = sym;
4638
4639 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4640 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4641 &symbol_lastP);
4642 }
4643
4644 ppc_current_csect = ppc_toc_csect;
4645
4646 demand_empty_rest_of_line ();
4647 }
4648
4649 /* The AIX assembler automatically aligns the operands of a .long or
4650 .short pseudo-op, and we want to be compatible. */
4651
4652 static void
4653 ppc_xcoff_cons (int log_size)
4654 {
4655 frag_align (log_size, 0, 0);
4656 record_alignment (now_seg, log_size);
4657 cons (1 << log_size);
4658 }
4659
4660 static void
4661 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4662 {
4663 expressionS exp;
4664 int byte_count;
4665
4666 (void) expression (&exp);
4667
4668 if (exp.X_op != O_constant)
4669 {
4670 as_bad (_("non-constant byte count"));
4671 return;
4672 }
4673
4674 byte_count = exp.X_add_number;
4675
4676 if (*input_line_pointer != ',')
4677 {
4678 as_bad (_("missing value"));
4679 return;
4680 }
4681
4682 ++input_line_pointer;
4683 cons (byte_count);
4684 }
4685
4686 void
4687 ppc_xcoff_end (void)
4688 {
4689 int i;
4690
4691 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4692 {
4693 struct dw_section *dws = &dw_sections[i];
4694 struct dw_subsection *dwss;
4695
4696 if (dws->anon_subseg)
4697 {
4698 dwss = dws->anon_subseg;
4699 dwss->link = dws->list_subseg;
4700 }
4701 else
4702 dwss = dws->list_subseg;
4703
4704 for (; dwss != NULL; dwss = dwss->link)
4705 if (dwss->end_exp.X_add_symbol != NULL)
4706 {
4707 subseg_set (dws->sect, dwss->subseg);
4708 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4709 }
4710 }
4711 }
4712
4713 #endif /* OBJ_XCOFF */
4714 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4715 \f
4716 /* The .tc pseudo-op. This is used when generating either XCOFF or
4717 ELF. This takes two or more arguments.
4718
4719 When generating XCOFF output, the first argument is the name to
4720 give to this location in the toc; this will be a symbol with class
4721 TC. The rest of the arguments are N-byte values to actually put at
4722 this location in the TOC; often there is just one more argument, a
4723 relocatable symbol reference. The size of the value to store
4724 depends on target word size. A 32-bit target uses 4-byte values, a
4725 64-bit target uses 8-byte values.
4726
4727 When not generating XCOFF output, the arguments are the same, but
4728 the first argument is simply ignored. */
4729
4730 static void
4731 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4732 {
4733 #ifdef OBJ_XCOFF
4734
4735 /* Define the TOC symbol name. */
4736 {
4737 char *name;
4738 char endc;
4739 symbolS *sym;
4740
4741 if (ppc_toc_csect == (symbolS *) NULL
4742 || ppc_toc_csect != ppc_current_csect)
4743 {
4744 as_bad (_(".tc not in .toc section"));
4745 ignore_rest_of_line ();
4746 return;
4747 }
4748
4749 name = input_line_pointer;
4750 endc = get_symbol_end ();
4751
4752 sym = symbol_find_or_make (name);
4753
4754 *input_line_pointer = endc;
4755
4756 if (S_IS_DEFINED (sym))
4757 {
4758 symbolS *label;
4759
4760 label = symbol_get_tc (ppc_current_csect)->within;
4761 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4762 {
4763 as_bad (_(".tc with no label"));
4764 ignore_rest_of_line ();
4765 return;
4766 }
4767
4768 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4769 symbol_set_frag (label, symbol_get_frag (sym));
4770 S_SET_VALUE (label, S_GET_VALUE (sym));
4771
4772 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4773 ++input_line_pointer;
4774
4775 return;
4776 }
4777
4778 S_SET_SEGMENT (sym, now_seg);
4779 symbol_set_frag (sym, frag_now);
4780 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4781 symbol_get_tc (sym)->symbol_class = XMC_TC;
4782 symbol_get_tc (sym)->output = 1;
4783
4784 ppc_frob_label (sym);
4785 }
4786
4787 #endif /* OBJ_XCOFF */
4788 #ifdef OBJ_ELF
4789 int align;
4790
4791 /* Skip the TOC symbol name. */
4792 while (is_part_of_name (*input_line_pointer)
4793 || *input_line_pointer == ' '
4794 || *input_line_pointer == '['
4795 || *input_line_pointer == ']'
4796 || *input_line_pointer == '{'
4797 || *input_line_pointer == '}')
4798 ++input_line_pointer;
4799
4800 /* Align to a four/eight byte boundary. */
4801 align = ppc_obj64 ? 3 : 2;
4802 frag_align (align, 0, 0);
4803 record_alignment (now_seg, align);
4804 #endif /* OBJ_ELF */
4805
4806 if (*input_line_pointer != ',')
4807 demand_empty_rest_of_line ();
4808 else
4809 {
4810 ++input_line_pointer;
4811 cons (ppc_obj64 ? 8 : 4);
4812 }
4813 }
4814
4815 /* Pseudo-op .machine. */
4816
4817 static void
4818 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4819 {
4820 char *cpu_string;
4821 #define MAX_HISTORY 100
4822 static ppc_cpu_t *cpu_history;
4823 static int curr_hist;
4824
4825 SKIP_WHITESPACE ();
4826
4827 if (*input_line_pointer == '"')
4828 {
4829 int len;
4830 cpu_string = demand_copy_C_string (&len);
4831 }
4832 else
4833 {
4834 char c;
4835 cpu_string = input_line_pointer;
4836 c = get_symbol_end ();
4837 cpu_string = xstrdup (cpu_string);
4838 *input_line_pointer = c;
4839 }
4840
4841 if (cpu_string != NULL)
4842 {
4843 ppc_cpu_t old_cpu = ppc_cpu;
4844 ppc_cpu_t new_cpu;
4845 char *p;
4846
4847 for (p = cpu_string; *p != 0; p++)
4848 *p = TOLOWER (*p);
4849
4850 if (strcmp (cpu_string, "push") == 0)
4851 {
4852 if (cpu_history == NULL)
4853 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4854
4855 if (curr_hist >= MAX_HISTORY)
4856 as_bad (_(".machine stack overflow"));
4857 else
4858 cpu_history[curr_hist++] = ppc_cpu;
4859 }
4860 else if (strcmp (cpu_string, "pop") == 0)
4861 {
4862 if (curr_hist <= 0)
4863 as_bad (_(".machine stack underflow"));
4864 else
4865 ppc_cpu = cpu_history[--curr_hist];
4866 }
4867 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4868 ppc_cpu = new_cpu;
4869 else
4870 as_bad (_("invalid machine `%s'"), cpu_string);
4871
4872 if (ppc_cpu != old_cpu)
4873 ppc_setup_opcodes ();
4874 }
4875
4876 demand_empty_rest_of_line ();
4877 }
4878 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4879 \f
4880 #ifdef TE_PE
4881
4882 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4883
4884 /* Set the current section. */
4885 static void
4886 ppc_set_current_section (segT new)
4887 {
4888 ppc_previous_section = ppc_current_section;
4889 ppc_current_section = new;
4890 }
4891
4892 /* pseudo-op: .previous
4893 behaviour: toggles the current section with the previous section.
4894 errors: None
4895 warnings: "No previous section" */
4896
4897 static void
4898 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4899 {
4900 if (ppc_previous_section == NULL)
4901 {
4902 as_warn (_("no previous section to return to, ignored."));
4903 return;
4904 }
4905
4906 subseg_set (ppc_previous_section, 0);
4907
4908 ppc_set_current_section (ppc_previous_section);
4909 }
4910
4911 /* pseudo-op: .pdata
4912 behaviour: predefined read only data section
4913 double word aligned
4914 errors: None
4915 warnings: None
4916 initial: .section .pdata "adr3"
4917 a - don't know -- maybe a misprint
4918 d - initialized data
4919 r - readable
4920 3 - double word aligned (that would be 4 byte boundary)
4921
4922 commentary:
4923 Tag index tables (also known as the function table) for exception
4924 handling, debugging, etc. */
4925
4926 static void
4927 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4928 {
4929 if (pdata_section == 0)
4930 {
4931 pdata_section = subseg_new (".pdata", 0);
4932
4933 bfd_set_section_flags (stdoutput, pdata_section,
4934 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4935 | SEC_READONLY | SEC_DATA ));
4936
4937 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4938 }
4939 else
4940 {
4941 pdata_section = subseg_new (".pdata", 0);
4942 }
4943 ppc_set_current_section (pdata_section);
4944 }
4945
4946 /* pseudo-op: .ydata
4947 behaviour: predefined read only data section
4948 double word aligned
4949 errors: None
4950 warnings: None
4951 initial: .section .ydata "drw3"
4952 a - don't know -- maybe a misprint
4953 d - initialized data
4954 r - readable
4955 3 - double word aligned (that would be 4 byte boundary)
4956 commentary:
4957 Tag tables (also known as the scope table) for exception handling,
4958 debugging, etc. */
4959
4960 static void
4961 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4962 {
4963 if (ydata_section == 0)
4964 {
4965 ydata_section = subseg_new (".ydata", 0);
4966 bfd_set_section_flags (stdoutput, ydata_section,
4967 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4968 | SEC_READONLY | SEC_DATA ));
4969
4970 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4971 }
4972 else
4973 {
4974 ydata_section = subseg_new (".ydata", 0);
4975 }
4976 ppc_set_current_section (ydata_section);
4977 }
4978
4979 /* pseudo-op: .reldata
4980 behaviour: predefined read write data section
4981 double word aligned (4-byte)
4982 FIXME: relocation is applied to it
4983 FIXME: what's the difference between this and .data?
4984 errors: None
4985 warnings: None
4986 initial: .section .reldata "drw3"
4987 d - initialized data
4988 r - readable
4989 w - writeable
4990 3 - double word aligned (that would be 8 byte boundary)
4991
4992 commentary:
4993 Like .data, but intended to hold data subject to relocation, such as
4994 function descriptors, etc. */
4995
4996 static void
4997 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
4998 {
4999 if (reldata_section == 0)
5000 {
5001 reldata_section = subseg_new (".reldata", 0);
5002
5003 bfd_set_section_flags (stdoutput, reldata_section,
5004 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5005 | SEC_DATA));
5006
5007 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5008 }
5009 else
5010 {
5011 reldata_section = subseg_new (".reldata", 0);
5012 }
5013 ppc_set_current_section (reldata_section);
5014 }
5015
5016 /* pseudo-op: .rdata
5017 behaviour: predefined read only data section
5018 double word aligned
5019 errors: None
5020 warnings: None
5021 initial: .section .rdata "dr3"
5022 d - initialized data
5023 r - readable
5024 3 - double word aligned (that would be 4 byte boundary) */
5025
5026 static void
5027 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5028 {
5029 if (rdata_section == 0)
5030 {
5031 rdata_section = subseg_new (".rdata", 0);
5032 bfd_set_section_flags (stdoutput, rdata_section,
5033 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5034 | SEC_READONLY | SEC_DATA ));
5035
5036 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5037 }
5038 else
5039 {
5040 rdata_section = subseg_new (".rdata", 0);
5041 }
5042 ppc_set_current_section (rdata_section);
5043 }
5044
5045 /* pseudo-op: .ualong
5046 behaviour: much like .int, with the exception that no alignment is
5047 performed.
5048 FIXME: test the alignment statement
5049 errors: None
5050 warnings: None */
5051
5052 static void
5053 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5054 {
5055 /* Try for long. */
5056 cons (4);
5057 }
5058
5059 /* pseudo-op: .znop <symbol name>
5060 behaviour: Issue a nop instruction
5061 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5062 the supplied symbol name.
5063 errors: None
5064 warnings: Missing symbol name */
5065
5066 static void
5067 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5068 {
5069 unsigned long insn;
5070 const struct powerpc_opcode *opcode;
5071 char *f;
5072 symbolS *sym;
5073 char *symbol_name;
5074 char c;
5075 char *name;
5076
5077 /* Strip out the symbol name. */
5078 symbol_name = input_line_pointer;
5079 c = get_symbol_end ();
5080
5081 name = xmalloc (input_line_pointer - symbol_name + 1);
5082 strcpy (name, symbol_name);
5083
5084 sym = symbol_find_or_make (name);
5085
5086 *input_line_pointer = c;
5087
5088 SKIP_WHITESPACE ();
5089
5090 /* Look up the opcode in the hash table. */
5091 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5092
5093 /* Stick in the nop. */
5094 insn = opcode->opcode;
5095
5096 /* Write out the instruction. */
5097 f = frag_more (4);
5098 md_number_to_chars (f, insn, 4);
5099 fix_new (frag_now,
5100 f - frag_now->fr_literal,
5101 4,
5102 sym,
5103 0,
5104 0,
5105 BFD_RELOC_16_GOT_PCREL);
5106
5107 }
5108
5109 /* pseudo-op:
5110 behaviour:
5111 errors:
5112 warnings: */
5113
5114 static void
5115 ppc_pe_comm (int lcomm)
5116 {
5117 char *name;
5118 char c;
5119 char *p;
5120 offsetT temp;
5121 symbolS *symbolP;
5122 offsetT align;
5123
5124 name = input_line_pointer;
5125 c = get_symbol_end ();
5126
5127 /* just after name is now '\0'. */
5128 p = input_line_pointer;
5129 *p = c;
5130 SKIP_WHITESPACE ();
5131 if (*input_line_pointer != ',')
5132 {
5133 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5134 ignore_rest_of_line ();
5135 return;
5136 }
5137
5138 input_line_pointer++; /* skip ',' */
5139 if ((temp = get_absolute_expression ()) < 0)
5140 {
5141 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5142 ignore_rest_of_line ();
5143 return;
5144 }
5145
5146 if (! lcomm)
5147 {
5148 /* The third argument to .comm is the alignment. */
5149 if (*input_line_pointer != ',')
5150 align = 3;
5151 else
5152 {
5153 ++input_line_pointer;
5154 align = get_absolute_expression ();
5155 if (align <= 0)
5156 {
5157 as_warn (_("ignoring bad alignment"));
5158 align = 3;
5159 }
5160 }
5161 }
5162
5163 *p = 0;
5164 symbolP = symbol_find_or_make (name);
5165
5166 *p = c;
5167 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5168 {
5169 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5170 S_GET_NAME (symbolP));
5171 ignore_rest_of_line ();
5172 return;
5173 }
5174
5175 if (S_GET_VALUE (symbolP))
5176 {
5177 if (S_GET_VALUE (symbolP) != (valueT) temp)
5178 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5179 S_GET_NAME (symbolP),
5180 (long) S_GET_VALUE (symbolP),
5181 (long) temp);
5182 }
5183 else
5184 {
5185 S_SET_VALUE (symbolP, (valueT) temp);
5186 S_SET_EXTERNAL (symbolP);
5187 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5188 }
5189
5190 demand_empty_rest_of_line ();
5191 }
5192
5193 /*
5194 * implement the .section pseudo op:
5195 * .section name {, "flags"}
5196 * ^ ^
5197 * | +--- optional flags: 'b' for bss
5198 * | 'i' for info
5199 * +-- section name 'l' for lib
5200 * 'n' for noload
5201 * 'o' for over
5202 * 'w' for data
5203 * 'd' (apparently m88k for data)
5204 * 'x' for text
5205 * But if the argument is not a quoted string, treat it as a
5206 * subsegment number.
5207 *
5208 * FIXME: this is a copy of the section processing from obj-coff.c, with
5209 * additions/changes for the moto-pas assembler support. There are three
5210 * categories:
5211 *
5212 * FIXME: I just noticed this. This doesn't work at all really. It it
5213 * setting bits that bfd probably neither understands or uses. The
5214 * correct approach (?) will have to incorporate extra fields attached
5215 * to the section to hold the system specific stuff. (krk)
5216 *
5217 * Section Contents:
5218 * 'a' - unknown - referred to in documentation, but no definition supplied
5219 * 'c' - section has code
5220 * 'd' - section has initialized data
5221 * 'u' - section has uninitialized data
5222 * 'i' - section contains directives (info)
5223 * 'n' - section can be discarded
5224 * 'R' - remove section at link time
5225 *
5226 * Section Protection:
5227 * 'r' - section is readable
5228 * 'w' - section is writeable
5229 * 'x' - section is executable
5230 * 's' - section is sharable
5231 *
5232 * Section Alignment:
5233 * '0' - align to byte boundary
5234 * '1' - align to halfword undary
5235 * '2' - align to word boundary
5236 * '3' - align to doubleword boundary
5237 * '4' - align to quadword boundary
5238 * '5' - align to 32 byte boundary
5239 * '6' - align to 64 byte boundary
5240 *
5241 */
5242
5243 void
5244 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5245 {
5246 /* Strip out the section name. */
5247 char *section_name;
5248 char c;
5249 char *name;
5250 unsigned int exp;
5251 flagword flags;
5252 segT sec;
5253 int align;
5254
5255 section_name = input_line_pointer;
5256 c = get_symbol_end ();
5257
5258 name = xmalloc (input_line_pointer - section_name + 1);
5259 strcpy (name, section_name);
5260
5261 *input_line_pointer = c;
5262
5263 SKIP_WHITESPACE ();
5264
5265 exp = 0;
5266 flags = SEC_NO_FLAGS;
5267
5268 if (strcmp (name, ".idata$2") == 0)
5269 {
5270 align = 0;
5271 }
5272 else if (strcmp (name, ".idata$3") == 0)
5273 {
5274 align = 0;
5275 }
5276 else if (strcmp (name, ".idata$4") == 0)
5277 {
5278 align = 2;
5279 }
5280 else if (strcmp (name, ".idata$5") == 0)
5281 {
5282 align = 2;
5283 }
5284 else if (strcmp (name, ".idata$6") == 0)
5285 {
5286 align = 1;
5287 }
5288 else
5289 /* Default alignment to 16 byte boundary. */
5290 align = 4;
5291
5292 if (*input_line_pointer == ',')
5293 {
5294 ++input_line_pointer;
5295 SKIP_WHITESPACE ();
5296 if (*input_line_pointer != '"')
5297 exp = get_absolute_expression ();
5298 else
5299 {
5300 ++input_line_pointer;
5301 while (*input_line_pointer != '"'
5302 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5303 {
5304 switch (*input_line_pointer)
5305 {
5306 /* Section Contents */
5307 case 'a': /* unknown */
5308 as_bad (_("unsupported section attribute -- 'a'"));
5309 break;
5310 case 'c': /* code section */
5311 flags |= SEC_CODE;
5312 break;
5313 case 'd': /* section has initialized data */
5314 flags |= SEC_DATA;
5315 break;
5316 case 'u': /* section has uninitialized data */
5317 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5318 in winnt.h */
5319 flags |= SEC_ROM;
5320 break;
5321 case 'i': /* section contains directives (info) */
5322 /* FIXME: This is IMAGE_SCN_LNK_INFO
5323 in winnt.h */
5324 flags |= SEC_HAS_CONTENTS;
5325 break;
5326 case 'n': /* section can be discarded */
5327 flags &=~ SEC_LOAD;
5328 break;
5329 case 'R': /* Remove section at link time */
5330 flags |= SEC_NEVER_LOAD;
5331 break;
5332 #if IFLICT_BRAIN_DAMAGE
5333 /* Section Protection */
5334 case 'r': /* section is readable */
5335 flags |= IMAGE_SCN_MEM_READ;
5336 break;
5337 case 'w': /* section is writeable */
5338 flags |= IMAGE_SCN_MEM_WRITE;
5339 break;
5340 case 'x': /* section is executable */
5341 flags |= IMAGE_SCN_MEM_EXECUTE;
5342 break;
5343 case 's': /* section is sharable */
5344 flags |= IMAGE_SCN_MEM_SHARED;
5345 break;
5346
5347 /* Section Alignment */
5348 case '0': /* align to byte boundary */
5349 flags |= IMAGE_SCN_ALIGN_1BYTES;
5350 align = 0;
5351 break;
5352 case '1': /* align to halfword boundary */
5353 flags |= IMAGE_SCN_ALIGN_2BYTES;
5354 align = 1;
5355 break;
5356 case '2': /* align to word boundary */
5357 flags |= IMAGE_SCN_ALIGN_4BYTES;
5358 align = 2;
5359 break;
5360 case '3': /* align to doubleword boundary */
5361 flags |= IMAGE_SCN_ALIGN_8BYTES;
5362 align = 3;
5363 break;
5364 case '4': /* align to quadword boundary */
5365 flags |= IMAGE_SCN_ALIGN_16BYTES;
5366 align = 4;
5367 break;
5368 case '5': /* align to 32 byte boundary */
5369 flags |= IMAGE_SCN_ALIGN_32BYTES;
5370 align = 5;
5371 break;
5372 case '6': /* align to 64 byte boundary */
5373 flags |= IMAGE_SCN_ALIGN_64BYTES;
5374 align = 6;
5375 break;
5376 #endif
5377 default:
5378 as_bad (_("unknown section attribute '%c'"),
5379 *input_line_pointer);
5380 break;
5381 }
5382 ++input_line_pointer;
5383 }
5384 if (*input_line_pointer == '"')
5385 ++input_line_pointer;
5386 }
5387 }
5388
5389 sec = subseg_new (name, (subsegT) exp);
5390
5391 ppc_set_current_section (sec);
5392
5393 if (flags != SEC_NO_FLAGS)
5394 {
5395 if (! bfd_set_section_flags (stdoutput, sec, flags))
5396 as_bad (_("error setting flags for \"%s\": %s"),
5397 bfd_section_name (stdoutput, sec),
5398 bfd_errmsg (bfd_get_error ()));
5399 }
5400
5401 bfd_set_section_alignment (stdoutput, sec, align);
5402 }
5403
5404 static void
5405 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5406 {
5407 char *name;
5408 char endc;
5409 symbolS *ext_sym;
5410
5411 name = input_line_pointer;
5412 endc = get_symbol_end ();
5413
5414 ext_sym = symbol_find_or_make (name);
5415
5416 *input_line_pointer = endc;
5417
5418 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5419 SF_SET_FUNCTION (ext_sym);
5420 SF_SET_PROCESS (ext_sym);
5421 coff_add_linesym (ext_sym);
5422
5423 demand_empty_rest_of_line ();
5424 }
5425
5426 static void
5427 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5428 {
5429 if (tocdata_section == 0)
5430 {
5431 tocdata_section = subseg_new (".tocd", 0);
5432 /* FIXME: section flags won't work. */
5433 bfd_set_section_flags (stdoutput, tocdata_section,
5434 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5435 | SEC_READONLY | SEC_DATA));
5436
5437 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5438 }
5439 else
5440 {
5441 rdata_section = subseg_new (".tocd", 0);
5442 }
5443
5444 ppc_set_current_section (tocdata_section);
5445
5446 demand_empty_rest_of_line ();
5447 }
5448
5449 /* Don't adjust TOC relocs to use the section symbol. */
5450
5451 int
5452 ppc_pe_fix_adjustable (fixS *fix)
5453 {
5454 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5455 }
5456
5457 #endif
5458 \f
5459 #ifdef OBJ_XCOFF
5460
5461 /* XCOFF specific symbol and file handling. */
5462
5463 /* Canonicalize the symbol name. We use the to force the suffix, if
5464 any, to use square brackets, and to be in upper case. */
5465
5466 char *
5467 ppc_canonicalize_symbol_name (char *name)
5468 {
5469 char *s;
5470
5471 if (ppc_stab_symbol)
5472 return name;
5473
5474 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5475 ;
5476 if (*s != '\0')
5477 {
5478 char brac;
5479
5480 if (*s == '[')
5481 brac = ']';
5482 else
5483 {
5484 *s = '[';
5485 brac = '}';
5486 }
5487
5488 for (s++; *s != '\0' && *s != brac; s++)
5489 *s = TOUPPER (*s);
5490
5491 if (*s == '\0' || s[1] != '\0')
5492 as_bad (_("bad symbol suffix"));
5493
5494 *s = ']';
5495 }
5496
5497 return name;
5498 }
5499
5500 /* Set the class of a symbol based on the suffix, if any. This is
5501 called whenever a new symbol is created. */
5502
5503 void
5504 ppc_symbol_new_hook (symbolS *sym)
5505 {
5506 struct ppc_tc_sy *tc;
5507 const char *s;
5508
5509 tc = symbol_get_tc (sym);
5510 tc->next = NULL;
5511 tc->output = 0;
5512 tc->symbol_class = -1;
5513 tc->real_name = NULL;
5514 tc->subseg = 0;
5515 tc->align = 0;
5516 tc->u.size = NULL;
5517 tc->u.dw = NULL;
5518 tc->within = NULL;
5519
5520 if (ppc_stab_symbol)
5521 return;
5522
5523 s = strchr (S_GET_NAME (sym), '[');
5524 if (s == (const char *) NULL)
5525 {
5526 /* There is no suffix. */
5527 return;
5528 }
5529
5530 ++s;
5531
5532 switch (s[0])
5533 {
5534 case 'B':
5535 if (strcmp (s, "BS]") == 0)
5536 tc->symbol_class = XMC_BS;
5537 break;
5538 case 'D':
5539 if (strcmp (s, "DB]") == 0)
5540 tc->symbol_class = XMC_DB;
5541 else if (strcmp (s, "DS]") == 0)
5542 tc->symbol_class = XMC_DS;
5543 break;
5544 case 'G':
5545 if (strcmp (s, "GL]") == 0)
5546 tc->symbol_class = XMC_GL;
5547 break;
5548 case 'P':
5549 if (strcmp (s, "PR]") == 0)
5550 tc->symbol_class = XMC_PR;
5551 break;
5552 case 'R':
5553 if (strcmp (s, "RO]") == 0)
5554 tc->symbol_class = XMC_RO;
5555 else if (strcmp (s, "RW]") == 0)
5556 tc->symbol_class = XMC_RW;
5557 break;
5558 case 'S':
5559 if (strcmp (s, "SV]") == 0)
5560 tc->symbol_class = XMC_SV;
5561 break;
5562 case 'T':
5563 if (strcmp (s, "TC]") == 0)
5564 tc->symbol_class = XMC_TC;
5565 else if (strcmp (s, "TI]") == 0)
5566 tc->symbol_class = XMC_TI;
5567 else if (strcmp (s, "TB]") == 0)
5568 tc->symbol_class = XMC_TB;
5569 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5570 tc->symbol_class = XMC_TC0;
5571 break;
5572 case 'U':
5573 if (strcmp (s, "UA]") == 0)
5574 tc->symbol_class = XMC_UA;
5575 else if (strcmp (s, "UC]") == 0)
5576 tc->symbol_class = XMC_UC;
5577 break;
5578 case 'X':
5579 if (strcmp (s, "XO]") == 0)
5580 tc->symbol_class = XMC_XO;
5581 break;
5582 }
5583
5584 if (tc->symbol_class == -1)
5585 as_bad (_("unrecognized symbol suffix"));
5586 }
5587
5588 /* Set the class of a label based on where it is defined. This
5589 handles symbols without suffixes. Also, move the symbol so that it
5590 follows the csect symbol. */
5591
5592 void
5593 ppc_frob_label (symbolS *sym)
5594 {
5595 if (ppc_current_csect != (symbolS *) NULL)
5596 {
5597 if (symbol_get_tc (sym)->symbol_class == -1)
5598 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5599
5600 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5601 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5602 &symbol_rootP, &symbol_lastP);
5603 symbol_get_tc (ppc_current_csect)->within = sym;
5604 symbol_get_tc (sym)->within = ppc_current_csect;
5605 }
5606
5607 #ifdef OBJ_ELF
5608 dwarf2_emit_label (sym);
5609 #endif
5610 }
5611
5612 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5613 seen. It tells ppc_adjust_symtab whether it needs to look through
5614 the symbols. */
5615
5616 static bfd_boolean ppc_saw_abs;
5617
5618 /* Change the name of a symbol just before writing it out. Set the
5619 real name if the .rename pseudo-op was used. Otherwise, remove any
5620 class suffix. Return 1 if the symbol should not be included in the
5621 symbol table. */
5622
5623 int
5624 ppc_frob_symbol (symbolS *sym)
5625 {
5626 static symbolS *ppc_last_function;
5627 static symbolS *set_end;
5628
5629 /* Discard symbols that should not be included in the output symbol
5630 table. */
5631 if (! symbol_used_in_reloc_p (sym)
5632 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5633 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5634 && ! symbol_get_tc (sym)->output
5635 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5636 return 1;
5637
5638 /* This one will disappear anyway. Don't make a csect sym for it. */
5639 if (sym == abs_section_sym)
5640 return 1;
5641
5642 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5643 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5644 else
5645 {
5646 const char *name;
5647 const char *s;
5648
5649 name = S_GET_NAME (sym);
5650 s = strchr (name, '[');
5651 if (s != (char *) NULL)
5652 {
5653 unsigned int len;
5654 char *snew;
5655
5656 len = s - name;
5657 snew = xmalloc (len + 1);
5658 memcpy (snew, name, len);
5659 snew[len] = '\0';
5660
5661 S_SET_NAME (sym, snew);
5662 }
5663 }
5664
5665 if (set_end != (symbolS *) NULL)
5666 {
5667 SA_SET_SYM_ENDNDX (set_end, sym);
5668 set_end = NULL;
5669 }
5670
5671 if (SF_GET_FUNCTION (sym))
5672 {
5673 if (ppc_last_function != (symbolS *) NULL)
5674 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5675 ppc_last_function = sym;
5676 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5677 {
5678 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5679 SA_SET_SYM_FSIZE (sym,
5680 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5681 }
5682 }
5683 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5684 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5685 {
5686 if (ppc_last_function == (symbolS *) NULL)
5687 as_bad (_(".ef with no preceding .function"));
5688 else
5689 {
5690 set_end = ppc_last_function;
5691 ppc_last_function = NULL;
5692
5693 /* We don't have a C_EFCN symbol, but we need to force the
5694 COFF backend to believe that it has seen one. */
5695 coff_last_function = NULL;
5696 }
5697 }
5698
5699 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5700 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5701 && S_GET_STORAGE_CLASS (sym) != C_FILE
5702 && S_GET_STORAGE_CLASS (sym) != C_FCN
5703 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5704 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5705 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5706 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5707 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5708 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5709 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5710
5711 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5712 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5713 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5714 {
5715 int i;
5716 union internal_auxent *a;
5717
5718 /* Create a csect aux. */
5719 i = S_GET_NUMBER_AUXILIARY (sym);
5720 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5721 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5722 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5723 {
5724 /* This is the TOC table. */
5725 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5726 a->x_csect.x_scnlen.l = 0;
5727 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5728 }
5729 else if (symbol_get_tc (sym)->subseg != 0)
5730 {
5731 /* This is a csect symbol. x_scnlen is the size of the
5732 csect. */
5733 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5734 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5735 S_GET_SEGMENT (sym))
5736 - S_GET_VALUE (sym));
5737 else
5738 {
5739 resolve_symbol_value (symbol_get_tc (sym)->next);
5740 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5741 - S_GET_VALUE (sym));
5742 }
5743 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5744 }
5745 else if (S_GET_SEGMENT (sym) == bss_section)
5746 {
5747 /* This is a common symbol. */
5748 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5749 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5750 if (S_IS_EXTERNAL (sym))
5751 symbol_get_tc (sym)->symbol_class = XMC_RW;
5752 else
5753 symbol_get_tc (sym)->symbol_class = XMC_BS;
5754 }
5755 else if (S_GET_SEGMENT (sym) == absolute_section)
5756 {
5757 /* This is an absolute symbol. The csect will be created by
5758 ppc_adjust_symtab. */
5759 ppc_saw_abs = TRUE;
5760 a->x_csect.x_smtyp = XTY_LD;
5761 if (symbol_get_tc (sym)->symbol_class == -1)
5762 symbol_get_tc (sym)->symbol_class = XMC_XO;
5763 }
5764 else if (! S_IS_DEFINED (sym))
5765 {
5766 /* This is an external symbol. */
5767 a->x_csect.x_scnlen.l = 0;
5768 a->x_csect.x_smtyp = XTY_ER;
5769 }
5770 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5771 {
5772 symbolS *next;
5773
5774 /* This is a TOC definition. x_scnlen is the size of the
5775 TOC entry. */
5776 next = symbol_next (sym);
5777 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5778 next = symbol_next (next);
5779 if (next == (symbolS *) NULL
5780 || symbol_get_tc (next)->symbol_class != XMC_TC)
5781 {
5782 if (ppc_after_toc_frag == (fragS *) NULL)
5783 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5784 data_section)
5785 - S_GET_VALUE (sym));
5786 else
5787 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5788 - S_GET_VALUE (sym));
5789 }
5790 else
5791 {
5792 resolve_symbol_value (next);
5793 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5794 - S_GET_VALUE (sym));
5795 }
5796 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5797 }
5798 else
5799 {
5800 symbolS *csect;
5801
5802 /* This is a normal symbol definition. x_scnlen is the
5803 symbol index of the containing csect. */
5804 if (S_GET_SEGMENT (sym) == text_section)
5805 csect = ppc_text_csects;
5806 else if (S_GET_SEGMENT (sym) == data_section)
5807 csect = ppc_data_csects;
5808 else
5809 abort ();
5810
5811 /* Skip the initial dummy symbol. */
5812 csect = symbol_get_tc (csect)->next;
5813
5814 if (csect == (symbolS *) NULL)
5815 {
5816 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5817 a->x_csect.x_scnlen.l = 0;
5818 }
5819 else
5820 {
5821 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5822 {
5823 resolve_symbol_value (symbol_get_tc (csect)->next);
5824 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5825 > S_GET_VALUE (sym))
5826 break;
5827 csect = symbol_get_tc (csect)->next;
5828 }
5829
5830 a->x_csect.x_scnlen.p =
5831 coffsymbol (symbol_get_bfdsym (csect))->native;
5832 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5833 1;
5834 }
5835 a->x_csect.x_smtyp = XTY_LD;
5836 }
5837
5838 a->x_csect.x_parmhash = 0;
5839 a->x_csect.x_snhash = 0;
5840 if (symbol_get_tc (sym)->symbol_class == -1)
5841 a->x_csect.x_smclas = XMC_PR;
5842 else
5843 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5844 a->x_csect.x_stab = 0;
5845 a->x_csect.x_snstab = 0;
5846
5847 /* Don't let the COFF backend resort these symbols. */
5848 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5849 }
5850 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5851 {
5852 /* We want the value to be the symbol index of the referenced
5853 csect symbol. BFD will do that for us if we set the right
5854 flags. */
5855 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5856 combined_entry_type *c = coffsymbol (bsym)->native;
5857
5858 S_SET_VALUE (sym, (valueT) (size_t) c);
5859 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5860 }
5861 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5862 {
5863 symbolS *block;
5864 valueT base;
5865
5866 block = symbol_get_tc (sym)->within;
5867 if (block)
5868 {
5869 /* The value is the offset from the enclosing csect. */
5870 symbolS *csect;
5871
5872 csect = symbol_get_tc (block)->within;
5873 resolve_symbol_value (csect);
5874 base = S_GET_VALUE (csect);
5875 }
5876 else
5877 base = 0;
5878
5879 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5880 }
5881 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5882 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5883 {
5884 /* We want the value to be a file offset into the line numbers.
5885 BFD will do that for us if we set the right flags. We have
5886 already set the value correctly. */
5887 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5888 }
5889
5890 return 0;
5891 }
5892
5893 /* Adjust the symbol table. This creates csect symbols for all
5894 absolute symbols. */
5895
5896 void
5897 ppc_adjust_symtab (void)
5898 {
5899 symbolS *sym;
5900
5901 if (! ppc_saw_abs)
5902 return;
5903
5904 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5905 {
5906 symbolS *csect;
5907 int i;
5908 union internal_auxent *a;
5909
5910 if (S_GET_SEGMENT (sym) != absolute_section)
5911 continue;
5912
5913 csect = symbol_create (".abs[XO]", absolute_section,
5914 S_GET_VALUE (sym), &zero_address_frag);
5915 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5916 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5917 i = S_GET_NUMBER_AUXILIARY (csect);
5918 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5919 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5920 a->x_csect.x_scnlen.l = 0;
5921 a->x_csect.x_smtyp = XTY_SD;
5922 a->x_csect.x_parmhash = 0;
5923 a->x_csect.x_snhash = 0;
5924 a->x_csect.x_smclas = XMC_XO;
5925 a->x_csect.x_stab = 0;
5926 a->x_csect.x_snstab = 0;
5927
5928 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5929
5930 i = S_GET_NUMBER_AUXILIARY (sym);
5931 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5932 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5933 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5934 }
5935
5936 ppc_saw_abs = FALSE;
5937 }
5938
5939 /* Set the VMA for a section. This is called on all the sections in
5940 turn. */
5941
5942 void
5943 ppc_frob_section (asection *sec)
5944 {
5945 static bfd_vma vma = 0;
5946
5947 /* Dwarf sections start at 0. */
5948 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5949 return;
5950
5951 vma = md_section_align (sec, vma);
5952 bfd_set_section_vma (stdoutput, sec, vma);
5953 vma += bfd_section_size (stdoutput, sec);
5954 }
5955
5956 #endif /* OBJ_XCOFF */
5957 \f
5958 char *
5959 md_atof (int type, char *litp, int *sizep)
5960 {
5961 return ieee_md_atof (type, litp, sizep, target_big_endian);
5962 }
5963
5964 /* Write a value out to the object file, using the appropriate
5965 endianness. */
5966
5967 void
5968 md_number_to_chars (char *buf, valueT val, int n)
5969 {
5970 if (target_big_endian)
5971 number_to_chars_bigendian (buf, val, n);
5972 else
5973 number_to_chars_littleendian (buf, val, n);
5974 }
5975
5976 /* Align a section (I don't know why this is machine dependent). */
5977
5978 valueT
5979 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5980 {
5981 #ifdef OBJ_ELF
5982 return addr;
5983 #else
5984 int align = bfd_get_section_alignment (stdoutput, seg);
5985
5986 return ((addr + (1 << align) - 1) & (-1 << align));
5987 #endif
5988 }
5989
5990 /* We don't have any form of relaxing. */
5991
5992 int
5993 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5994 asection *seg ATTRIBUTE_UNUSED)
5995 {
5996 abort ();
5997 return 0;
5998 }
5999
6000 /* Convert a machine dependent frag. We never generate these. */
6001
6002 void
6003 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6004 asection *sec ATTRIBUTE_UNUSED,
6005 fragS *fragp ATTRIBUTE_UNUSED)
6006 {
6007 abort ();
6008 }
6009
6010 /* We have no need to default values of symbols. */
6011
6012 symbolS *
6013 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6014 {
6015 return 0;
6016 }
6017 \f
6018 /* Functions concerning relocs. */
6019
6020 /* The location from which a PC relative jump should be calculated,
6021 given a PC relative reloc. */
6022
6023 long
6024 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6025 {
6026 return fixp->fx_frag->fr_address + fixp->fx_where;
6027 }
6028
6029 #ifdef OBJ_XCOFF
6030
6031 /* This is called to see whether a fixup should be adjusted to use a
6032 section symbol. We take the opportunity to change a fixup against
6033 a symbol in the TOC subsegment into a reloc against the
6034 corresponding .tc symbol. */
6035
6036 int
6037 ppc_fix_adjustable (fixS *fix)
6038 {
6039 valueT val = resolve_symbol_value (fix->fx_addsy);
6040 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6041 TC_SYMFIELD_TYPE *tc;
6042
6043 if (symseg == absolute_section)
6044 return 0;
6045
6046 /* Always adjust symbols in debugging sections. */
6047 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6048 return 1;
6049
6050 if (ppc_toc_csect != (symbolS *) NULL
6051 && fix->fx_addsy != ppc_toc_csect
6052 && symseg == data_section
6053 && val >= ppc_toc_frag->fr_address
6054 && (ppc_after_toc_frag == (fragS *) NULL
6055 || val < ppc_after_toc_frag->fr_address))
6056 {
6057 symbolS *sy;
6058
6059 for (sy = symbol_next (ppc_toc_csect);
6060 sy != (symbolS *) NULL;
6061 sy = symbol_next (sy))
6062 {
6063 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6064
6065 if (sy_tc->symbol_class == XMC_TC0)
6066 continue;
6067 if (sy_tc->symbol_class != XMC_TC)
6068 break;
6069 if (val == resolve_symbol_value (sy))
6070 {
6071 fix->fx_addsy = sy;
6072 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6073 return 0;
6074 }
6075 }
6076
6077 as_bad_where (fix->fx_file, fix->fx_line,
6078 _("symbol in .toc does not match any .tc"));
6079 }
6080
6081 /* Possibly adjust the reloc to be against the csect. */
6082 tc = symbol_get_tc (fix->fx_addsy);
6083 if (tc->subseg == 0
6084 && tc->symbol_class != XMC_TC0
6085 && tc->symbol_class != XMC_TC
6086 && symseg != bss_section
6087 /* Don't adjust if this is a reloc in the toc section. */
6088 && (symseg != data_section
6089 || ppc_toc_csect == NULL
6090 || val < ppc_toc_frag->fr_address
6091 || (ppc_after_toc_frag != NULL
6092 && val >= ppc_after_toc_frag->fr_address)))
6093 {
6094 symbolS *csect = tc->within;
6095
6096 /* If the symbol was not declared by a label (eg: a section symbol),
6097 use the section instead of the csect. This doesn't happen in
6098 normal AIX assembly code. */
6099 if (csect == NULL)
6100 csect = seg_info (symseg)->sym;
6101
6102 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6103 fix->fx_addsy = csect;
6104
6105 return 0;
6106 }
6107
6108 /* Adjust a reloc against a .lcomm symbol to be against the base
6109 .lcomm. */
6110 if (symseg == bss_section
6111 && ! S_IS_EXTERNAL (fix->fx_addsy))
6112 {
6113 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6114
6115 fix->fx_offset += val - resolve_symbol_value (sy);
6116 fix->fx_addsy = sy;
6117 }
6118
6119 return 0;
6120 }
6121
6122 /* A reloc from one csect to another must be kept. The assembler
6123 will, of course, keep relocs between sections, and it will keep
6124 absolute relocs, but we need to force it to keep PC relative relocs
6125 between two csects in the same section. */
6126
6127 int
6128 ppc_force_relocation (fixS *fix)
6129 {
6130 /* At this point fix->fx_addsy should already have been converted to
6131 a csect symbol. If the csect does not include the fragment, then
6132 we need to force the relocation. */
6133 if (fix->fx_pcrel
6134 && fix->fx_addsy != NULL
6135 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6136 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6137 > fix->fx_frag->fr_address)
6138 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6139 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6140 <= fix->fx_frag->fr_address))))
6141 return 1;
6142
6143 return generic_force_reloc (fix);
6144 }
6145
6146 void
6147 ppc_new_dot_label (symbolS *sym)
6148 {
6149 /* Anchor this label to the current csect for relocations. */
6150 symbol_get_tc (sym)->within = ppc_current_csect;
6151 }
6152
6153 #endif /* OBJ_XCOFF */
6154
6155 #ifdef OBJ_ELF
6156 /* If this function returns non-zero, it guarantees that a relocation
6157 will be emitted for a fixup. */
6158
6159 int
6160 ppc_force_relocation (fixS *fix)
6161 {
6162 /* Branch prediction relocations must force a relocation, as must
6163 the vtable description relocs. */
6164 switch (fix->fx_r_type)
6165 {
6166 case BFD_RELOC_PPC_B16_BRTAKEN:
6167 case BFD_RELOC_PPC_B16_BRNTAKEN:
6168 case BFD_RELOC_PPC_BA16_BRTAKEN:
6169 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6170 case BFD_RELOC_24_PLT_PCREL:
6171 case BFD_RELOC_PPC64_TOC:
6172 return 1;
6173 default:
6174 break;
6175 }
6176
6177 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6178 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6179 return 1;
6180
6181 return generic_force_reloc (fix);
6182 }
6183
6184 int
6185 ppc_fix_adjustable (fixS *fix)
6186 {
6187 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6188 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6189 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6190 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6191 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6192 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6193 && fix->fx_r_type != BFD_RELOC_GPREL16
6194 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6195 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6196 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6197 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6198 }
6199 #endif
6200
6201 void
6202 ppc_frag_check (struct frag *fragP)
6203 {
6204 if (!fragP->has_code)
6205 return;
6206
6207 if (ppc_mach() == bfd_mach_ppc_vle)
6208 {
6209 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6210 as_bad (_("instruction address is not a multiple of 2"));
6211 }
6212 else
6213 {
6214 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6215 as_bad (_("instruction address is not a multiple of 4"));
6216 }
6217 }
6218
6219 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6220 rs_align_code frag. */
6221
6222 void
6223 ppc_handle_align (struct frag *fragP)
6224 {
6225 valueT count = (fragP->fr_next->fr_address
6226 - (fragP->fr_address + fragP->fr_fix));
6227
6228 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6229 {
6230 char *dest = fragP->fr_literal + fragP->fr_fix;
6231
6232 fragP->fr_var = 2;
6233 md_number_to_chars (dest, 0x4400, 2);
6234 }
6235 else if (count != 0 && (count & 3) == 0)
6236 {
6237 char *dest = fragP->fr_literal + fragP->fr_fix;
6238
6239 fragP->fr_var = 4;
6240
6241 if (count > 4 * nop_limit && count < 0x2000000)
6242 {
6243 struct frag *rest;
6244
6245 /* Make a branch, then follow with nops. Insert another
6246 frag to handle the nops. */
6247 md_number_to_chars (dest, 0x48000000 + count, 4);
6248 count -= 4;
6249 if (count == 0)
6250 return;
6251
6252 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6253 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6254 fragP->fr_next = rest;
6255 fragP = rest;
6256 rest->fr_address += rest->fr_fix + 4;
6257 rest->fr_fix = 0;
6258 /* If we leave the next frag as rs_align_code we'll come here
6259 again, resulting in a bunch of branches rather than a
6260 branch followed by nops. */
6261 rest->fr_type = rs_align;
6262 dest = rest->fr_literal;
6263 }
6264
6265 md_number_to_chars (dest, 0x60000000, 4);
6266
6267 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6268 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
6269 {
6270 /* For power6 and power7, we want the last nop to be a group
6271 terminating one. Do this by inserting an rs_fill frag immediately
6272 after this one, with its address set to the last nop location.
6273 This will automatically reduce the number of nops in the current
6274 frag by one. */
6275 if (count > 4)
6276 {
6277 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6278
6279 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6280 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6281 group_nop->fr_fix = 0;
6282 group_nop->fr_offset = 1;
6283 group_nop->fr_type = rs_fill;
6284 fragP->fr_next = group_nop;
6285 dest = group_nop->fr_literal;
6286 }
6287
6288 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
6289 {
6290 if (ppc_cpu & PPC_OPCODE_E500MC)
6291 /* e500mc group terminating nop: "ori 0,0,0". */
6292 md_number_to_chars (dest, 0x60000000, 4);
6293 else
6294 /* power7 group terminating nop: "ori 2,2,0". */
6295 md_number_to_chars (dest, 0x60420000, 4);
6296 }
6297 else
6298 /* power6 group terminating nop: "ori 1,1,0". */
6299 md_number_to_chars (dest, 0x60210000, 4);
6300 }
6301 }
6302 }
6303
6304 /* Apply a fixup to the object code. This is called for all the
6305 fixups we generated by the calls to fix_new_exp, above. */
6306
6307 void
6308 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
6309 {
6310 valueT value = * valP;
6311
6312 #ifdef OBJ_ELF
6313 if (fixP->fx_addsy != NULL)
6314 {
6315 /* Hack around bfd_install_relocation brain damage. */
6316 if (fixP->fx_pcrel)
6317 value += fixP->fx_frag->fr_address + fixP->fx_where;
6318 }
6319 else
6320 fixP->fx_done = 1;
6321 #else
6322 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6323 the symbol values. If we are doing this relocation the code in
6324 write.c is going to call bfd_install_relocation, which is also
6325 going to use the symbol value. That means that if the reloc is
6326 fully resolved we want to use *valP since bfd_install_relocation is
6327 not being used.
6328 However, if the reloc is not fully resolved we do not want to
6329 use *valP, and must use fx_offset instead. If the relocation
6330 is PC-relative, we then need to re-apply md_pcrel_from_section
6331 to this new relocation value. */
6332 if (fixP->fx_addsy == (symbolS *) NULL)
6333 fixP->fx_done = 1;
6334
6335 else
6336 {
6337 value = fixP->fx_offset;
6338 if (fixP->fx_pcrel)
6339 value -= md_pcrel_from_section (fixP, seg);
6340 }
6341 #endif
6342
6343 if (fixP->fx_subsy != (symbolS *) NULL)
6344 {
6345 /* We can't actually support subtracting a symbol. */
6346 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6347 }
6348
6349 if (fixP->fx_pcrel_adjust != 0)
6350 {
6351 /* Handle relocs in an insn. */
6352
6353 int opindex = fixP->fx_pcrel_adjust & 0xff;
6354 const struct powerpc_operand *operand = &powerpc_operands[opindex];
6355 char *where;
6356 unsigned long insn;
6357 offsetT fieldval;
6358
6359 #ifdef OBJ_XCOFF
6360 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6361 does not generate a reloc. It uses the offset of `sym' within its
6362 csect. Other usages, such as `.long sym', generate relocs. This
6363 is the documented behaviour of non-TOC symbols. */
6364 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6365 && (operand->bitm & 0xfff0) == 0xfff0
6366 && operand->shift == 0
6367 && (operand->insert == NULL || ppc_obj64)
6368 && fixP->fx_addsy != NULL
6369 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6370 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6371 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6372 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6373 {
6374 value = fixP->fx_offset;
6375 fixP->fx_done = 1;
6376 }
6377 #endif
6378 fieldval = value;
6379 switch (fixP->fx_r_type)
6380 {
6381 #ifdef OBJ_ELF
6382 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6383 if (fixP->fx_pcrel)
6384 goto bad_pcrel;
6385 /* fall through */
6386 #endif
6387 case BFD_RELOC_LO16:
6388 if (fixP->fx_pcrel)
6389 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6390 /* fall through */
6391 case BFD_RELOC_LO16_PCREL:
6392 fieldval = SEX16 (value);
6393 break;
6394
6395 case BFD_RELOC_HI16:
6396 if (fixP->fx_pcrel)
6397 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6398 /* fall through */
6399 case BFD_RELOC_HI16_PCREL:
6400 fieldval = SEX16 (PPC_HI (value));
6401 break;
6402
6403 case BFD_RELOC_HI16_S:
6404 if (fixP->fx_pcrel)
6405 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6406 /* fall through */
6407 case BFD_RELOC_HI16_S_PCREL:
6408 fieldval = SEX16 (PPC_HA (value));
6409 break;
6410
6411 #ifdef OBJ_ELF
6412 case BFD_RELOC_PPC64_HIGHER:
6413 if (fixP->fx_pcrel)
6414 goto bad_pcrel;
6415 fieldval = SEX16 (PPC_HIGHER (value));
6416 break;
6417
6418 case BFD_RELOC_PPC64_HIGHER_S:
6419 if (fixP->fx_pcrel)
6420 goto bad_pcrel;
6421 fieldval = SEX16 (PPC_HIGHERA (value));
6422 break;
6423
6424 case BFD_RELOC_PPC64_HIGHEST:
6425 if (fixP->fx_pcrel)
6426 goto bad_pcrel;
6427 fieldval = SEX16 (PPC_HIGHEST (value));
6428 break;
6429
6430 case BFD_RELOC_PPC64_HIGHEST_S:
6431 if (fixP->fx_pcrel)
6432 goto bad_pcrel;
6433 fieldval = SEX16 (PPC_HIGHESTA (value));
6434 break;
6435
6436 /* The following relocs can't be calculated by the assembler.
6437 Leave the field zero. */
6438 case BFD_RELOC_PPC_TPREL16:
6439 case BFD_RELOC_PPC_TPREL16_LO:
6440 case BFD_RELOC_PPC_TPREL16_HI:
6441 case BFD_RELOC_PPC_TPREL16_HA:
6442 case BFD_RELOC_PPC_DTPREL16:
6443 case BFD_RELOC_PPC_DTPREL16_LO:
6444 case BFD_RELOC_PPC_DTPREL16_HI:
6445 case BFD_RELOC_PPC_DTPREL16_HA:
6446 case BFD_RELOC_PPC_GOT_TLSGD16:
6447 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6448 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6449 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6450 case BFD_RELOC_PPC_GOT_TLSLD16:
6451 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6452 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6453 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6454 case BFD_RELOC_PPC_GOT_TPREL16:
6455 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6456 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6457 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6458 case BFD_RELOC_PPC_GOT_DTPREL16:
6459 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6460 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6461 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6462 case BFD_RELOC_PPC64_TPREL16_DS:
6463 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6464 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6465 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6466 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6467 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6468 case BFD_RELOC_PPC64_DTPREL16_DS:
6469 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6470 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6471 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6472 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6473 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6474 gas_assert (fixP->fx_addsy != NULL);
6475 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6476 fieldval = 0;
6477 if (fixP->fx_pcrel)
6478 goto bad_pcrel;
6479 break;
6480
6481 /* These also should leave the field zero for the same
6482 reason. Note that older versions of gas wrote values
6483 here. If we want to go back to the old behaviour, then
6484 all _LO and _LO_DS cases will need to be treated like
6485 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6486 case BFD_RELOC_16_GOTOFF:
6487 case BFD_RELOC_LO16_GOTOFF:
6488 case BFD_RELOC_HI16_GOTOFF:
6489 case BFD_RELOC_HI16_S_GOTOFF:
6490 case BFD_RELOC_LO16_PLTOFF:
6491 case BFD_RELOC_HI16_PLTOFF:
6492 case BFD_RELOC_HI16_S_PLTOFF:
6493 case BFD_RELOC_GPREL16:
6494 case BFD_RELOC_16_BASEREL:
6495 case BFD_RELOC_LO16_BASEREL:
6496 case BFD_RELOC_HI16_BASEREL:
6497 case BFD_RELOC_HI16_S_BASEREL:
6498 case BFD_RELOC_PPC_TOC16:
6499 case BFD_RELOC_PPC64_TOC16_LO:
6500 case BFD_RELOC_PPC64_TOC16_HI:
6501 case BFD_RELOC_PPC64_TOC16_HA:
6502 case BFD_RELOC_PPC64_PLTGOT16:
6503 case BFD_RELOC_PPC64_PLTGOT16_LO:
6504 case BFD_RELOC_PPC64_PLTGOT16_HI:
6505 case BFD_RELOC_PPC64_PLTGOT16_HA:
6506 case BFD_RELOC_PPC64_GOT16_DS:
6507 case BFD_RELOC_PPC64_GOT16_LO_DS:
6508 case BFD_RELOC_PPC64_PLT16_LO_DS:
6509 case BFD_RELOC_PPC64_SECTOFF_DS:
6510 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6511 case BFD_RELOC_PPC64_TOC16_DS:
6512 case BFD_RELOC_PPC64_TOC16_LO_DS:
6513 case BFD_RELOC_PPC64_PLTGOT16_DS:
6514 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6515 case BFD_RELOC_PPC_EMB_NADDR16:
6516 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6517 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6518 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6519 case BFD_RELOC_PPC_EMB_SDAI16:
6520 case BFD_RELOC_PPC_EMB_SDA2I16:
6521 case BFD_RELOC_PPC_EMB_SDA2REL:
6522 case BFD_RELOC_PPC_EMB_SDA21:
6523 case BFD_RELOC_PPC_EMB_MRKREF:
6524 case BFD_RELOC_PPC_EMB_RELSEC16:
6525 case BFD_RELOC_PPC_EMB_RELST_LO:
6526 case BFD_RELOC_PPC_EMB_RELST_HI:
6527 case BFD_RELOC_PPC_EMB_RELST_HA:
6528 case BFD_RELOC_PPC_EMB_BIT_FLD:
6529 case BFD_RELOC_PPC_EMB_RELSDA:
6530 case BFD_RELOC_PPC_VLE_SDA21:
6531 case BFD_RELOC_PPC_VLE_SDA21_LO:
6532 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6533 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6534 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6535 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6536 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6537 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6538 gas_assert (fixP->fx_addsy != NULL);
6539 /* Fall thru */
6540
6541 case BFD_RELOC_PPC_TLS:
6542 case BFD_RELOC_PPC_TLSGD:
6543 case BFD_RELOC_PPC_TLSLD:
6544 fieldval = 0;
6545 if (fixP->fx_pcrel)
6546 goto bad_pcrel;
6547 break;
6548 #endif
6549
6550 default:
6551 break;
6552 }
6553
6554 #ifdef OBJ_ELF
6555 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6556 contents can stay at zero. */
6557 #define APPLY_RELOC fixP->fx_done
6558 #else
6559 #define APPLY_RELOC 1
6560 #endif
6561 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6562 {
6563 /* Fetch the instruction, insert the fully resolved operand
6564 value, and stuff the instruction back again. */
6565 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6566 if (target_big_endian)
6567 {
6568 if (fixP->fx_size == 4)
6569 insn = bfd_getb32 ((unsigned char *) where);
6570 else
6571 insn = bfd_getb16 ((unsigned char *) where);
6572 }
6573 else
6574 {
6575 if (fixP->fx_size == 4)
6576 insn = bfd_getl32 ((unsigned char *) where);
6577 else
6578 insn = bfd_getl16 ((unsigned char *) where);
6579 }
6580 insn = ppc_insert_operand (insn, operand, fieldval,
6581 fixP->tc_fix_data.ppc_cpu,
6582 fixP->fx_file, fixP->fx_line);
6583 if (target_big_endian)
6584 {
6585 if (fixP->fx_size == 4)
6586 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6587 else
6588 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6589 }
6590 else
6591 {
6592 if (fixP->fx_size == 4)
6593 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6594 else
6595 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6596 }
6597 }
6598
6599 if (fixP->fx_done)
6600 /* Nothing else to do here. */
6601 return;
6602
6603 gas_assert (fixP->fx_addsy != NULL);
6604 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6605 {
6606 char *sfile;
6607 unsigned int sline;
6608
6609 /* Use expr_symbol_where to see if this is an expression
6610 symbol. */
6611 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6612 as_bad_where (fixP->fx_file, fixP->fx_line,
6613 _("unresolved expression that must be resolved"));
6614 else
6615 as_bad_where (fixP->fx_file, fixP->fx_line,
6616 _("unsupported relocation against %s"),
6617 S_GET_NAME (fixP->fx_addsy));
6618 fixP->fx_done = 1;
6619 return;
6620 }
6621 }
6622 else
6623 {
6624 int size = 0;
6625 offsetT fieldval = value;
6626
6627 /* Handle relocs in data. */
6628 switch (fixP->fx_r_type)
6629 {
6630 case BFD_RELOC_CTOR:
6631 if (ppc_obj64)
6632 goto ctor64;
6633 /* fall through */
6634
6635 case BFD_RELOC_32:
6636 if (fixP->fx_pcrel)
6637 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6638 /* fall through */
6639
6640 case BFD_RELOC_32_PCREL:
6641 case BFD_RELOC_RVA:
6642 size = 4;
6643 break;
6644
6645 case BFD_RELOC_64:
6646 ctor64:
6647 if (fixP->fx_pcrel)
6648 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6649 /* fall through */
6650
6651 case BFD_RELOC_64_PCREL:
6652 size = 8;
6653 break;
6654
6655 case BFD_RELOC_16:
6656 if (fixP->fx_pcrel)
6657 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6658 /* fall through */
6659
6660 case BFD_RELOC_16_PCREL:
6661 size = 2;
6662 break;
6663
6664 case BFD_RELOC_8:
6665 if (fixP->fx_pcrel)
6666 {
6667 #ifdef OBJ_ELF
6668 bad_pcrel:
6669 #endif
6670 if (fixP->fx_addsy)
6671 {
6672 char *sfile;
6673 unsigned int sline;
6674
6675 /* Use expr_symbol_where to see if this is an
6676 expression symbol. */
6677 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6678 as_bad_where (fixP->fx_file, fixP->fx_line,
6679 _("unresolved expression that must"
6680 " be resolved"));
6681 else
6682 as_bad_where (fixP->fx_file, fixP->fx_line,
6683 _("cannot emit PC relative %s relocation"
6684 " against %s"),
6685 bfd_get_reloc_code_name (fixP->fx_r_type),
6686 S_GET_NAME (fixP->fx_addsy));
6687 }
6688 else
6689 as_bad_where (fixP->fx_file, fixP->fx_line,
6690 _("unable to resolve expression"));
6691 fixP->fx_done = 1;
6692 }
6693 else
6694 size = 1;
6695 break;
6696
6697 case BFD_RELOC_VTABLE_INHERIT:
6698 if (fixP->fx_addsy
6699 && !S_IS_DEFINED (fixP->fx_addsy)
6700 && !S_IS_WEAK (fixP->fx_addsy))
6701 S_SET_WEAK (fixP->fx_addsy);
6702 /* Fall thru */
6703
6704 case BFD_RELOC_VTABLE_ENTRY:
6705 fixP->fx_done = 0;
6706 break;
6707
6708 #ifdef OBJ_ELF
6709 /* These can appear with @l etc. in data. */
6710 case BFD_RELOC_LO16:
6711 if (fixP->fx_pcrel)
6712 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6713 case BFD_RELOC_LO16_PCREL:
6714 size = 2;
6715 break;
6716
6717 case BFD_RELOC_HI16:
6718 if (fixP->fx_pcrel)
6719 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6720 case BFD_RELOC_HI16_PCREL:
6721 size = 2;
6722 fieldval = PPC_HI (value);
6723 break;
6724
6725 case BFD_RELOC_HI16_S:
6726 if (fixP->fx_pcrel)
6727 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6728 case BFD_RELOC_HI16_S_PCREL:
6729 size = 2;
6730 fieldval = PPC_HA (value);
6731 break;
6732
6733 case BFD_RELOC_PPC64_HIGHER:
6734 if (fixP->fx_pcrel)
6735 goto bad_pcrel;
6736 size = 2;
6737 fieldval = PPC_HIGHER (value);
6738 break;
6739
6740 case BFD_RELOC_PPC64_HIGHER_S:
6741 if (fixP->fx_pcrel)
6742 goto bad_pcrel;
6743 size = 2;
6744 fieldval = PPC_HIGHERA (value);
6745 break;
6746
6747 case BFD_RELOC_PPC64_HIGHEST:
6748 if (fixP->fx_pcrel)
6749 goto bad_pcrel;
6750 size = 2;
6751 fieldval = PPC_HIGHEST (value);
6752 break;
6753
6754 case BFD_RELOC_PPC64_HIGHEST_S:
6755 if (fixP->fx_pcrel)
6756 goto bad_pcrel;
6757 size = 2;
6758 fieldval = PPC_HIGHESTA (value);
6759 break;
6760
6761 case BFD_RELOC_PPC_DTPMOD:
6762 case BFD_RELOC_PPC_TPREL:
6763 case BFD_RELOC_PPC_DTPREL:
6764 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6765 break;
6766
6767 /* Just punt all of these to the linker. */
6768 case BFD_RELOC_PPC_B16_BRTAKEN:
6769 case BFD_RELOC_PPC_B16_BRNTAKEN:
6770 case BFD_RELOC_16_GOTOFF:
6771 case BFD_RELOC_LO16_GOTOFF:
6772 case BFD_RELOC_HI16_GOTOFF:
6773 case BFD_RELOC_HI16_S_GOTOFF:
6774 case BFD_RELOC_LO16_PLTOFF:
6775 case BFD_RELOC_HI16_PLTOFF:
6776 case BFD_RELOC_HI16_S_PLTOFF:
6777 case BFD_RELOC_PPC_COPY:
6778 case BFD_RELOC_PPC_GLOB_DAT:
6779 case BFD_RELOC_16_BASEREL:
6780 case BFD_RELOC_LO16_BASEREL:
6781 case BFD_RELOC_HI16_BASEREL:
6782 case BFD_RELOC_HI16_S_BASEREL:
6783 case BFD_RELOC_PPC_TLS:
6784 case BFD_RELOC_PPC_DTPREL16_LO:
6785 case BFD_RELOC_PPC_DTPREL16_HI:
6786 case BFD_RELOC_PPC_DTPREL16_HA:
6787 case BFD_RELOC_PPC_TPREL16_LO:
6788 case BFD_RELOC_PPC_TPREL16_HI:
6789 case BFD_RELOC_PPC_TPREL16_HA:
6790 case BFD_RELOC_PPC_GOT_TLSGD16:
6791 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6792 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6793 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6794 case BFD_RELOC_PPC_GOT_TLSLD16:
6795 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6796 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6797 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6798 case BFD_RELOC_PPC_GOT_DTPREL16:
6799 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6800 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6801 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6802 case BFD_RELOC_PPC_GOT_TPREL16:
6803 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6804 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6805 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6806 case BFD_RELOC_24_PLT_PCREL:
6807 case BFD_RELOC_PPC_LOCAL24PC:
6808 case BFD_RELOC_32_PLT_PCREL:
6809 case BFD_RELOC_GPREL16:
6810 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6811 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6812 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6813 case BFD_RELOC_PPC_EMB_NADDR32:
6814 case BFD_RELOC_PPC_EMB_NADDR16:
6815 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6816 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6817 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6818 case BFD_RELOC_PPC_EMB_SDAI16:
6819 case BFD_RELOC_PPC_EMB_SDA2REL:
6820 case BFD_RELOC_PPC_EMB_SDA2I16:
6821 case BFD_RELOC_PPC_EMB_SDA21:
6822 case BFD_RELOC_PPC_VLE_SDA21_LO:
6823 case BFD_RELOC_PPC_EMB_MRKREF:
6824 case BFD_RELOC_PPC_EMB_RELSEC16:
6825 case BFD_RELOC_PPC_EMB_RELST_LO:
6826 case BFD_RELOC_PPC_EMB_RELST_HI:
6827 case BFD_RELOC_PPC_EMB_RELST_HA:
6828 case BFD_RELOC_PPC_EMB_BIT_FLD:
6829 case BFD_RELOC_PPC_EMB_RELSDA:
6830 case BFD_RELOC_PPC64_TOC:
6831 case BFD_RELOC_PPC_TOC16:
6832 case BFD_RELOC_PPC64_TOC16_LO:
6833 case BFD_RELOC_PPC64_TOC16_HI:
6834 case BFD_RELOC_PPC64_TOC16_HA:
6835 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6836 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6837 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6838 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6839 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6840 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6841 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6842 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6843 fixP->fx_done = 0;
6844 break;
6845 #endif
6846
6847 #ifdef OBJ_XCOFF
6848 case BFD_RELOC_NONE:
6849 break;
6850 #endif
6851
6852 default:
6853 fprintf (stderr,
6854 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6855 fflush (stderr);
6856 abort ();
6857 }
6858
6859 if (size && APPLY_RELOC)
6860 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6861 fieldval, size);
6862 }
6863
6864 #ifdef OBJ_ELF
6865 ppc_elf_validate_fix (fixP, seg);
6866 fixP->fx_addnumber = value;
6867
6868 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6869 from the section contents. If we are going to be emitting a reloc
6870 then the section contents are immaterial, so don't warn if they
6871 happen to overflow. Leave such warnings to ld. */
6872 if (!fixP->fx_done)
6873 {
6874 fixP->fx_no_overflow = 1;
6875
6876 /* Arrange to emit .TOC. as a normal symbol if used in anything
6877 but .TOC.@tocbase. */
6878 if (ppc_obj64
6879 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
6880 && fixP->fx_addsy != NULL
6881 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
6882 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
6883 }
6884 #else
6885 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6886 fixP->fx_addnumber = 0;
6887 else
6888 {
6889 #ifdef TE_PE
6890 fixP->fx_addnumber = 0;
6891 #else
6892 /* We want to use the offset within the toc, not the actual VMA
6893 of the symbol. */
6894 fixP->fx_addnumber =
6895 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6896 - S_GET_VALUE (ppc_toc_csect);
6897 #endif
6898 }
6899 #endif
6900 }
6901
6902 /* Generate a reloc for a fixup. */
6903
6904 arelent *
6905 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6906 {
6907 arelent *reloc;
6908
6909 reloc = (arelent *) xmalloc (sizeof (arelent));
6910
6911 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6912 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6913 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6914 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6915 if (reloc->howto == (reloc_howto_type *) NULL)
6916 {
6917 as_bad_where (fixp->fx_file, fixp->fx_line,
6918 _("reloc %d not supported by object file format"),
6919 (int) fixp->fx_r_type);
6920 return NULL;
6921 }
6922 reloc->addend = fixp->fx_addnumber;
6923
6924 return reloc;
6925 }
6926
6927 void
6928 ppc_cfi_frame_initial_instructions (void)
6929 {
6930 cfi_add_CFA_def_cfa (1, 0);
6931 }
6932
6933 int
6934 tc_ppc_regname_to_dw2regnum (char *regname)
6935 {
6936 unsigned int regnum = -1;
6937 unsigned int i;
6938 const char *p;
6939 char *q;
6940 static struct { char *name; int dw2regnum; } regnames[] =
6941 {
6942 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6943 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6944 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6945 { "spe_acc", 111 }, { "spefscr", 112 }
6946 };
6947
6948 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6949 if (strcmp (regnames[i].name, regname) == 0)
6950 return regnames[i].dw2regnum;
6951
6952 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6953 {
6954 p = regname + 1 + (regname[1] == '.');
6955 regnum = strtoul (p, &q, 10);
6956 if (p == q || *q || regnum >= 32)
6957 return -1;
6958 if (regname[0] == 'f')
6959 regnum += 32;
6960 else if (regname[0] == 'v')
6961 regnum += 77;
6962 }
6963 else if (regname[0] == 'c' && regname[1] == 'r')
6964 {
6965 p = regname + 2 + (regname[2] == '.');
6966 if (p[0] < '0' || p[0] > '7' || p[1])
6967 return -1;
6968 regnum = p[0] - '0' + 68;
6969 }
6970 return regnum;
6971 }
GDB Binutils - Deliverables
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