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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27 #include "dw2gencfi.h"
28 #include "opcode/ppc.h"
29
30 #ifdef OBJ_ELF
31 #include "elf/ppc.h"
32 #include "dwarf2dbg.h"
33 #endif
34
35 #ifdef TE_PE
36 #include "coff/pe.h"
37 #endif
38
39 #ifdef OBJ_XCOFF
40 #include "coff/xcoff.h"
41 #include "libxcoff.h"
42 #endif
43
44 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46 /* Tell the main code what the endianness is. */
47 extern int target_big_endian;
48
49 /* Whether or not, we've set target_big_endian. */
50 static int set_target_endian = 0;
51
52 /* Whether to use user friendly register names. */
53 #ifndef TARGET_REG_NAMES_P
54 #ifdef TE_PE
55 #define TARGET_REG_NAMES_P TRUE
56 #else
57 #define TARGET_REG_NAMES_P FALSE
58 #endif
59 #endif
60
61 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64 /* #lo(value) denotes the least significant 16 bits of the indicated. */
65 #define PPC_LO(v) ((v) & 0xffff)
66
67 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
68 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69
70 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
71 the indicated value, compensating for #lo() being treated as a
72 signed number. */
73 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74
75 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
76 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77
78 /* #highera(value) denotes bits 32 through 47 of the indicated value,
79 compensating for #lo() being treated as a signed number. */
80 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81
82 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
83 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84
85 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
86 compensating for #lo being treated as a signed number. */
87 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88
89 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
90
91 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
92
93 static void ppc_macro (char *, const struct powerpc_macro *);
94 static void ppc_byte (int);
95
96 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
97 static void ppc_tc (int);
98 static void ppc_machine (int);
99 #endif
100
101 #ifdef OBJ_XCOFF
102 static void ppc_comm (int);
103 static void ppc_bb (int);
104 static void ppc_bc (int);
105 static void ppc_bf (int);
106 static void ppc_biei (int);
107 static void ppc_bs (int);
108 static void ppc_eb (int);
109 static void ppc_ec (int);
110 static void ppc_ef (int);
111 static void ppc_es (int);
112 static void ppc_csect (int);
113 static void ppc_dwsect (int);
114 static void ppc_change_csect (symbolS *, offsetT);
115 static void ppc_function (int);
116 static void ppc_extern (int);
117 static void ppc_lglobl (int);
118 static void ppc_ref (int);
119 static void ppc_section (int);
120 static void ppc_named_section (int);
121 static void ppc_stabx (int);
122 static void ppc_rename (int);
123 static void ppc_toc (int);
124 static void ppc_xcoff_cons (int);
125 static void ppc_vbyte (int);
126 #endif
127
128 #ifdef OBJ_ELF
129 static void ppc_elf_cons (int);
130 static void ppc_elf_rdata (int);
131 static void ppc_elf_lcomm (int);
132 #endif
133
134 #ifdef TE_PE
135 static void ppc_previous (int);
136 static void ppc_pdata (int);
137 static void ppc_ydata (int);
138 static void ppc_reldata (int);
139 static void ppc_rdata (int);
140 static void ppc_ualong (int);
141 static void ppc_znop (int);
142 static void ppc_pe_comm (int);
143 static void ppc_pe_section (int);
144 static void ppc_pe_function (int);
145 static void ppc_pe_tocd (int);
146 #endif
147 \f
148 /* Generic assembler global variables which must be defined by all
149 targets. */
150
151 #ifdef OBJ_ELF
152 /* This string holds the chars that always start a comment. If the
153 pre-processor is disabled, these aren't very useful. The macro
154 tc_comment_chars points to this. We use this, rather than the
155 usual comment_chars, so that we can switch for Solaris conventions. */
156 static const char ppc_solaris_comment_chars[] = "#!";
157 static const char ppc_eabi_comment_chars[] = "#";
158
159 #ifdef TARGET_SOLARIS_COMMENT
160 const char *ppc_comment_chars = ppc_solaris_comment_chars;
161 #else
162 const char *ppc_comment_chars = ppc_eabi_comment_chars;
163 #endif
164 #else
165 const char comment_chars[] = "#";
166 #endif
167
168 /* Characters which start a comment at the beginning of a line. */
169 const char line_comment_chars[] = "#";
170
171 /* Characters which may be used to separate multiple commands on a
172 single line. */
173 const char line_separator_chars[] = ";";
174
175 /* Characters which are used to indicate an exponent in a floating
176 point number. */
177 const char EXP_CHARS[] = "eE";
178
179 /* Characters which mean that a number is a floating point constant,
180 as in 0d1.0. */
181 const char FLT_CHARS[] = "dD";
182
183 /* Anything that can start an operand needs to be mentioned here,
184 to stop the input scrubber eating whitespace. */
185 const char ppc_symbol_chars[] = "%[";
186
187 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
188 int ppc_cie_data_alignment;
189
190 /* The dwarf2 minimum instruction length. */
191 int ppc_dwarf2_line_min_insn_length;
192
193 /* More than this number of nops in an alignment op gets a branch
194 instead. */
195 unsigned long nop_limit = 4;
196
197 /* The type of processor we are assembling for. This is one or more
198 of the PPC_OPCODE flags defined in opcode/ppc.h. */
199 ppc_cpu_t ppc_cpu = 0;
200 ppc_cpu_t sticky = 0;
201
202 /* Flags set on encountering toc relocs. */
203 enum {
204 has_large_toc_reloc = 1,
205 has_small_toc_reloc = 2
206 } toc_reloc_types;
207 \f
208 /* The target specific pseudo-ops which we support. */
209
210 const pseudo_typeS md_pseudo_table[] =
211 {
212 /* Pseudo-ops which must be overridden. */
213 { "byte", ppc_byte, 0 },
214
215 #ifdef OBJ_XCOFF
216 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
217 legitimately belong in the obj-*.c file. However, XCOFF is based
218 on COFF, and is only implemented for the RS/6000. We just use
219 obj-coff.c, and add what we need here. */
220 { "comm", ppc_comm, 0 },
221 { "lcomm", ppc_comm, 1 },
222 { "bb", ppc_bb, 0 },
223 { "bc", ppc_bc, 0 },
224 { "bf", ppc_bf, 0 },
225 { "bi", ppc_biei, 0 },
226 { "bs", ppc_bs, 0 },
227 { "csect", ppc_csect, 0 },
228 { "dwsect", ppc_dwsect, 0 },
229 { "data", ppc_section, 'd' },
230 { "eb", ppc_eb, 0 },
231 { "ec", ppc_ec, 0 },
232 { "ef", ppc_ef, 0 },
233 { "ei", ppc_biei, 1 },
234 { "es", ppc_es, 0 },
235 { "extern", ppc_extern, 0 },
236 { "function", ppc_function, 0 },
237 { "lglobl", ppc_lglobl, 0 },
238 { "ref", ppc_ref, 0 },
239 { "rename", ppc_rename, 0 },
240 { "section", ppc_named_section, 0 },
241 { "stabx", ppc_stabx, 0 },
242 { "text", ppc_section, 't' },
243 { "toc", ppc_toc, 0 },
244 { "long", ppc_xcoff_cons, 2 },
245 { "llong", ppc_xcoff_cons, 3 },
246 { "word", ppc_xcoff_cons, 1 },
247 { "short", ppc_xcoff_cons, 1 },
248 { "vbyte", ppc_vbyte, 0 },
249 #endif
250
251 #ifdef OBJ_ELF
252 { "llong", ppc_elf_cons, 8 },
253 { "quad", ppc_elf_cons, 8 },
254 { "long", ppc_elf_cons, 4 },
255 { "word", ppc_elf_cons, 2 },
256 { "short", ppc_elf_cons, 2 },
257 { "rdata", ppc_elf_rdata, 0 },
258 { "rodata", ppc_elf_rdata, 0 },
259 { "lcomm", ppc_elf_lcomm, 0 },
260 #endif
261
262 #ifdef TE_PE
263 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
264 { "previous", ppc_previous, 0 },
265 { "pdata", ppc_pdata, 0 },
266 { "ydata", ppc_ydata, 0 },
267 { "reldata", ppc_reldata, 0 },
268 { "rdata", ppc_rdata, 0 },
269 { "ualong", ppc_ualong, 0 },
270 { "znop", ppc_znop, 0 },
271 { "comm", ppc_pe_comm, 0 },
272 { "lcomm", ppc_pe_comm, 1 },
273 { "section", ppc_pe_section, 0 },
274 { "function", ppc_pe_function,0 },
275 { "tocd", ppc_pe_tocd, 0 },
276 #endif
277
278 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
279 { "tc", ppc_tc, 0 },
280 { "machine", ppc_machine, 0 },
281 #endif
282
283 { NULL, NULL, 0 }
284 };
285
286 \f
287 /* Predefined register names if -mregnames (or default for Windows NT).
288 In general, there are lots of them, in an attempt to be compatible
289 with a number of other Windows NT assemblers. */
290
291 /* Structure to hold information about predefined registers. */
292 struct pd_reg
293 {
294 char *name;
295 int value;
296 };
297
298 /* List of registers that are pre-defined:
299
300 Each general register has predefined names of the form:
301 1. r<reg_num> which has the value <reg_num>.
302 2. r.<reg_num> which has the value <reg_num>.
303
304 Each floating point register has predefined names of the form:
305 1. f<reg_num> which has the value <reg_num>.
306 2. f.<reg_num> which has the value <reg_num>.
307
308 Each vector unit register has predefined names of the form:
309 1. v<reg_num> which has the value <reg_num>.
310 2. v.<reg_num> which has the value <reg_num>.
311
312 Each condition register has predefined names of the form:
313 1. cr<reg_num> which has the value <reg_num>.
314 2. cr.<reg_num> which has the value <reg_num>.
315
316 There are individual registers as well:
317 sp or r.sp has the value 1
318 rtoc or r.toc has the value 2
319 fpscr has the value 0
320 xer has the value 1
321 lr has the value 8
322 ctr has the value 9
323 pmr has the value 0
324 dar has the value 19
325 dsisr has the value 18
326 dec has the value 22
327 sdr1 has the value 25
328 srr0 has the value 26
329 srr1 has the value 27
330
331 The table is sorted. Suitable for searching by a binary search. */
332
333 static const struct pd_reg pre_defined_registers[] =
334 {
335 { "cr.0", 0 }, /* Condition Registers */
336 { "cr.1", 1 },
337 { "cr.2", 2 },
338 { "cr.3", 3 },
339 { "cr.4", 4 },
340 { "cr.5", 5 },
341 { "cr.6", 6 },
342 { "cr.7", 7 },
343
344 { "cr0", 0 },
345 { "cr1", 1 },
346 { "cr2", 2 },
347 { "cr3", 3 },
348 { "cr4", 4 },
349 { "cr5", 5 },
350 { "cr6", 6 },
351 { "cr7", 7 },
352
353 { "ctr", 9 },
354
355 { "dar", 19 }, /* Data Access Register */
356 { "dec", 22 }, /* Decrementer */
357 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
358
359 { "f.0", 0 }, /* Floating point registers */
360 { "f.1", 1 },
361 { "f.10", 10 },
362 { "f.11", 11 },
363 { "f.12", 12 },
364 { "f.13", 13 },
365 { "f.14", 14 },
366 { "f.15", 15 },
367 { "f.16", 16 },
368 { "f.17", 17 },
369 { "f.18", 18 },
370 { "f.19", 19 },
371 { "f.2", 2 },
372 { "f.20", 20 },
373 { "f.21", 21 },
374 { "f.22", 22 },
375 { "f.23", 23 },
376 { "f.24", 24 },
377 { "f.25", 25 },
378 { "f.26", 26 },
379 { "f.27", 27 },
380 { "f.28", 28 },
381 { "f.29", 29 },
382 { "f.3", 3 },
383 { "f.30", 30 },
384 { "f.31", 31 },
385
386 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
387 { "f.33", 33 },
388 { "f.34", 34 },
389 { "f.35", 35 },
390 { "f.36", 36 },
391 { "f.37", 37 },
392 { "f.38", 38 },
393 { "f.39", 39 },
394 { "f.4", 4 },
395 { "f.40", 40 },
396 { "f.41", 41 },
397 { "f.42", 42 },
398 { "f.43", 43 },
399 { "f.44", 44 },
400 { "f.45", 45 },
401 { "f.46", 46 },
402 { "f.47", 47 },
403 { "f.48", 48 },
404 { "f.49", 49 },
405 { "f.5", 5 },
406 { "f.50", 50 },
407 { "f.51", 51 },
408 { "f.52", 52 },
409 { "f.53", 53 },
410 { "f.54", 54 },
411 { "f.55", 55 },
412 { "f.56", 56 },
413 { "f.57", 57 },
414 { "f.58", 58 },
415 { "f.59", 59 },
416 { "f.6", 6 },
417 { "f.60", 60 },
418 { "f.61", 61 },
419 { "f.62", 62 },
420 { "f.63", 63 },
421 { "f.7", 7 },
422 { "f.8", 8 },
423 { "f.9", 9 },
424
425 { "f0", 0 },
426 { "f1", 1 },
427 { "f10", 10 },
428 { "f11", 11 },
429 { "f12", 12 },
430 { "f13", 13 },
431 { "f14", 14 },
432 { "f15", 15 },
433 { "f16", 16 },
434 { "f17", 17 },
435 { "f18", 18 },
436 { "f19", 19 },
437 { "f2", 2 },
438 { "f20", 20 },
439 { "f21", 21 },
440 { "f22", 22 },
441 { "f23", 23 },
442 { "f24", 24 },
443 { "f25", 25 },
444 { "f26", 26 },
445 { "f27", 27 },
446 { "f28", 28 },
447 { "f29", 29 },
448 { "f3", 3 },
449 { "f30", 30 },
450 { "f31", 31 },
451
452 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
453 { "f33", 33 },
454 { "f34", 34 },
455 { "f35", 35 },
456 { "f36", 36 },
457 { "f37", 37 },
458 { "f38", 38 },
459 { "f39", 39 },
460 { "f4", 4 },
461 { "f40", 40 },
462 { "f41", 41 },
463 { "f42", 42 },
464 { "f43", 43 },
465 { "f44", 44 },
466 { "f45", 45 },
467 { "f46", 46 },
468 { "f47", 47 },
469 { "f48", 48 },
470 { "f49", 49 },
471 { "f5", 5 },
472 { "f50", 50 },
473 { "f51", 51 },
474 { "f52", 52 },
475 { "f53", 53 },
476 { "f54", 54 },
477 { "f55", 55 },
478 { "f56", 56 },
479 { "f57", 57 },
480 { "f58", 58 },
481 { "f59", 59 },
482 { "f6", 6 },
483 { "f60", 60 },
484 { "f61", 61 },
485 { "f62", 62 },
486 { "f63", 63 },
487 { "f7", 7 },
488 { "f8", 8 },
489 { "f9", 9 },
490
491 { "fpscr", 0 },
492
493 /* Quantization registers used with pair single instructions. */
494 { "gqr.0", 0 },
495 { "gqr.1", 1 },
496 { "gqr.2", 2 },
497 { "gqr.3", 3 },
498 { "gqr.4", 4 },
499 { "gqr.5", 5 },
500 { "gqr.6", 6 },
501 { "gqr.7", 7 },
502 { "gqr0", 0 },
503 { "gqr1", 1 },
504 { "gqr2", 2 },
505 { "gqr3", 3 },
506 { "gqr4", 4 },
507 { "gqr5", 5 },
508 { "gqr6", 6 },
509 { "gqr7", 7 },
510
511 { "lr", 8 }, /* Link Register */
512
513 { "pmr", 0 },
514
515 { "r.0", 0 }, /* General Purpose Registers */
516 { "r.1", 1 },
517 { "r.10", 10 },
518 { "r.11", 11 },
519 { "r.12", 12 },
520 { "r.13", 13 },
521 { "r.14", 14 },
522 { "r.15", 15 },
523 { "r.16", 16 },
524 { "r.17", 17 },
525 { "r.18", 18 },
526 { "r.19", 19 },
527 { "r.2", 2 },
528 { "r.20", 20 },
529 { "r.21", 21 },
530 { "r.22", 22 },
531 { "r.23", 23 },
532 { "r.24", 24 },
533 { "r.25", 25 },
534 { "r.26", 26 },
535 { "r.27", 27 },
536 { "r.28", 28 },
537 { "r.29", 29 },
538 { "r.3", 3 },
539 { "r.30", 30 },
540 { "r.31", 31 },
541 { "r.4", 4 },
542 { "r.5", 5 },
543 { "r.6", 6 },
544 { "r.7", 7 },
545 { "r.8", 8 },
546 { "r.9", 9 },
547
548 { "r.sp", 1 }, /* Stack Pointer */
549
550 { "r.toc", 2 }, /* Pointer to the table of contents */
551
552 { "r0", 0 }, /* More general purpose registers */
553 { "r1", 1 },
554 { "r10", 10 },
555 { "r11", 11 },
556 { "r12", 12 },
557 { "r13", 13 },
558 { "r14", 14 },
559 { "r15", 15 },
560 { "r16", 16 },
561 { "r17", 17 },
562 { "r18", 18 },
563 { "r19", 19 },
564 { "r2", 2 },
565 { "r20", 20 },
566 { "r21", 21 },
567 { "r22", 22 },
568 { "r23", 23 },
569 { "r24", 24 },
570 { "r25", 25 },
571 { "r26", 26 },
572 { "r27", 27 },
573 { "r28", 28 },
574 { "r29", 29 },
575 { "r3", 3 },
576 { "r30", 30 },
577 { "r31", 31 },
578 { "r4", 4 },
579 { "r5", 5 },
580 { "r6", 6 },
581 { "r7", 7 },
582 { "r8", 8 },
583 { "r9", 9 },
584
585 { "rtoc", 2 }, /* Table of contents */
586
587 { "sdr1", 25 }, /* Storage Description Register 1 */
588
589 { "sp", 1 },
590
591 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
592 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
593
594 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
595 { "v.1", 1 },
596 { "v.10", 10 },
597 { "v.11", 11 },
598 { "v.12", 12 },
599 { "v.13", 13 },
600 { "v.14", 14 },
601 { "v.15", 15 },
602 { "v.16", 16 },
603 { "v.17", 17 },
604 { "v.18", 18 },
605 { "v.19", 19 },
606 { "v.2", 2 },
607 { "v.20", 20 },
608 { "v.21", 21 },
609 { "v.22", 22 },
610 { "v.23", 23 },
611 { "v.24", 24 },
612 { "v.25", 25 },
613 { "v.26", 26 },
614 { "v.27", 27 },
615 { "v.28", 28 },
616 { "v.29", 29 },
617 { "v.3", 3 },
618 { "v.30", 30 },
619 { "v.31", 31 },
620 { "v.4", 4 },
621 { "v.5", 5 },
622 { "v.6", 6 },
623 { "v.7", 7 },
624 { "v.8", 8 },
625 { "v.9", 9 },
626
627 { "v0", 0 },
628 { "v1", 1 },
629 { "v10", 10 },
630 { "v11", 11 },
631 { "v12", 12 },
632 { "v13", 13 },
633 { "v14", 14 },
634 { "v15", 15 },
635 { "v16", 16 },
636 { "v17", 17 },
637 { "v18", 18 },
638 { "v19", 19 },
639 { "v2", 2 },
640 { "v20", 20 },
641 { "v21", 21 },
642 { "v22", 22 },
643 { "v23", 23 },
644 { "v24", 24 },
645 { "v25", 25 },
646 { "v26", 26 },
647 { "v27", 27 },
648 { "v28", 28 },
649 { "v29", 29 },
650 { "v3", 3 },
651 { "v30", 30 },
652 { "v31", 31 },
653 { "v4", 4 },
654 { "v5", 5 },
655 { "v6", 6 },
656 { "v7", 7 },
657 { "v8", 8 },
658 { "v9", 9 },
659
660 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
661 { "vs.1", 1 },
662 { "vs.10", 10 },
663 { "vs.11", 11 },
664 { "vs.12", 12 },
665 { "vs.13", 13 },
666 { "vs.14", 14 },
667 { "vs.15", 15 },
668 { "vs.16", 16 },
669 { "vs.17", 17 },
670 { "vs.18", 18 },
671 { "vs.19", 19 },
672 { "vs.2", 2 },
673 { "vs.20", 20 },
674 { "vs.21", 21 },
675 { "vs.22", 22 },
676 { "vs.23", 23 },
677 { "vs.24", 24 },
678 { "vs.25", 25 },
679 { "vs.26", 26 },
680 { "vs.27", 27 },
681 { "vs.28", 28 },
682 { "vs.29", 29 },
683 { "vs.3", 3 },
684 { "vs.30", 30 },
685 { "vs.31", 31 },
686 { "vs.32", 32 },
687 { "vs.33", 33 },
688 { "vs.34", 34 },
689 { "vs.35", 35 },
690 { "vs.36", 36 },
691 { "vs.37", 37 },
692 { "vs.38", 38 },
693 { "vs.39", 39 },
694 { "vs.4", 4 },
695 { "vs.40", 40 },
696 { "vs.41", 41 },
697 { "vs.42", 42 },
698 { "vs.43", 43 },
699 { "vs.44", 44 },
700 { "vs.45", 45 },
701 { "vs.46", 46 },
702 { "vs.47", 47 },
703 { "vs.48", 48 },
704 { "vs.49", 49 },
705 { "vs.5", 5 },
706 { "vs.50", 50 },
707 { "vs.51", 51 },
708 { "vs.52", 52 },
709 { "vs.53", 53 },
710 { "vs.54", 54 },
711 { "vs.55", 55 },
712 { "vs.56", 56 },
713 { "vs.57", 57 },
714 { "vs.58", 58 },
715 { "vs.59", 59 },
716 { "vs.6", 6 },
717 { "vs.60", 60 },
718 { "vs.61", 61 },
719 { "vs.62", 62 },
720 { "vs.63", 63 },
721 { "vs.7", 7 },
722 { "vs.8", 8 },
723 { "vs.9", 9 },
724
725 { "vs0", 0 },
726 { "vs1", 1 },
727 { "vs10", 10 },
728 { "vs11", 11 },
729 { "vs12", 12 },
730 { "vs13", 13 },
731 { "vs14", 14 },
732 { "vs15", 15 },
733 { "vs16", 16 },
734 { "vs17", 17 },
735 { "vs18", 18 },
736 { "vs19", 19 },
737 { "vs2", 2 },
738 { "vs20", 20 },
739 { "vs21", 21 },
740 { "vs22", 22 },
741 { "vs23", 23 },
742 { "vs24", 24 },
743 { "vs25", 25 },
744 { "vs26", 26 },
745 { "vs27", 27 },
746 { "vs28", 28 },
747 { "vs29", 29 },
748 { "vs3", 3 },
749 { "vs30", 30 },
750 { "vs31", 31 },
751 { "vs32", 32 },
752 { "vs33", 33 },
753 { "vs34", 34 },
754 { "vs35", 35 },
755 { "vs36", 36 },
756 { "vs37", 37 },
757 { "vs38", 38 },
758 { "vs39", 39 },
759 { "vs4", 4 },
760 { "vs40", 40 },
761 { "vs41", 41 },
762 { "vs42", 42 },
763 { "vs43", 43 },
764 { "vs44", 44 },
765 { "vs45", 45 },
766 { "vs46", 46 },
767 { "vs47", 47 },
768 { "vs48", 48 },
769 { "vs49", 49 },
770 { "vs5", 5 },
771 { "vs50", 50 },
772 { "vs51", 51 },
773 { "vs52", 52 },
774 { "vs53", 53 },
775 { "vs54", 54 },
776 { "vs55", 55 },
777 { "vs56", 56 },
778 { "vs57", 57 },
779 { "vs58", 58 },
780 { "vs59", 59 },
781 { "vs6", 6 },
782 { "vs60", 60 },
783 { "vs61", 61 },
784 { "vs62", 62 },
785 { "vs63", 63 },
786 { "vs7", 7 },
787 { "vs8", 8 },
788 { "vs9", 9 },
789
790 { "xer", 1 },
791
792 };
793
794 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
795
796 /* Given NAME, find the register number associated with that name, return
797 the integer value associated with the given name or -1 on failure. */
798
799 static int
800 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
801 {
802 int middle, low, high;
803 int cmp;
804
805 low = 0;
806 high = regcount - 1;
807
808 do
809 {
810 middle = (low + high) / 2;
811 cmp = strcasecmp (name, regs[middle].name);
812 if (cmp < 0)
813 high = middle - 1;
814 else if (cmp > 0)
815 low = middle + 1;
816 else
817 return regs[middle].value;
818 }
819 while (low <= high);
820
821 return -1;
822 }
823
824 /*
825 * Summary of register_name.
826 *
827 * in: Input_line_pointer points to 1st char of operand.
828 *
829 * out: A expressionS.
830 * The operand may have been a register: in this case, X_op == O_register,
831 * X_add_number is set to the register number, and truth is returned.
832 * Input_line_pointer->(next non-blank) char after operand, or is in its
833 * original state.
834 */
835
836 static bfd_boolean
837 register_name (expressionS *expressionP)
838 {
839 int reg_number;
840 char *name;
841 char *start;
842 char c;
843
844 /* Find the spelling of the operand. */
845 start = name = input_line_pointer;
846 if (name[0] == '%' && ISALPHA (name[1]))
847 name = ++input_line_pointer;
848
849 else if (!reg_names_p || !ISALPHA (name[0]))
850 return FALSE;
851
852 c = get_symbol_end ();
853 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
854
855 /* Put back the delimiting char. */
856 *input_line_pointer = c;
857
858 /* Look to see if it's in the register table. */
859 if (reg_number >= 0)
860 {
861 expressionP->X_op = O_register;
862 expressionP->X_add_number = reg_number;
863
864 /* Make the rest nice. */
865 expressionP->X_add_symbol = NULL;
866 expressionP->X_op_symbol = NULL;
867 return TRUE;
868 }
869
870 /* Reset the line as if we had not done anything. */
871 input_line_pointer = start;
872 return FALSE;
873 }
874 \f
875 /* This function is called for each symbol seen in an expression. It
876 handles the special parsing which PowerPC assemblers are supposed
877 to use for condition codes. */
878
879 /* Whether to do the special parsing. */
880 static bfd_boolean cr_operand;
881
882 /* Names to recognize in a condition code. This table is sorted. */
883 static const struct pd_reg cr_names[] =
884 {
885 { "cr0", 0 },
886 { "cr1", 1 },
887 { "cr2", 2 },
888 { "cr3", 3 },
889 { "cr4", 4 },
890 { "cr5", 5 },
891 { "cr6", 6 },
892 { "cr7", 7 },
893 { "eq", 2 },
894 { "gt", 1 },
895 { "lt", 0 },
896 { "so", 3 },
897 { "un", 3 }
898 };
899
900 /* Parsing function. This returns non-zero if it recognized an
901 expression. */
902
903 int
904 ppc_parse_name (const char *name, expressionS *exp)
905 {
906 int val;
907
908 if (! cr_operand)
909 return 0;
910
911 if (*name == '%')
912 ++name;
913 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
914 name);
915 if (val < 0)
916 return 0;
917
918 exp->X_op = O_constant;
919 exp->X_add_number = val;
920
921 return 1;
922 }
923 \f
924 /* Local variables. */
925
926 /* Whether to target xcoff64/elf64. */
927 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
928
929 /* Opcode hash table. */
930 static struct hash_control *ppc_hash;
931
932 /* Macro hash table. */
933 static struct hash_control *ppc_macro_hash;
934
935 #ifdef OBJ_ELF
936 /* What type of shared library support to use. */
937 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
938
939 /* Flags to set in the elf header. */
940 static flagword ppc_flags = 0;
941
942 /* Whether this is Solaris or not. */
943 #ifdef TARGET_SOLARIS_COMMENT
944 #define SOLARIS_P TRUE
945 #else
946 #define SOLARIS_P FALSE
947 #endif
948
949 static bfd_boolean msolaris = SOLARIS_P;
950 #endif
951
952 #ifdef OBJ_XCOFF
953
954 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
955 using a bunch of different sections. These assembler sections,
956 however, are all encompassed within the .text or .data sections of
957 the final output file. We handle this by using different
958 subsegments within these main segments. */
959
960 /* Next subsegment to allocate within the .text segment. */
961 static subsegT ppc_text_subsegment = 2;
962
963 /* Linked list of csects in the text section. */
964 static symbolS *ppc_text_csects;
965
966 /* Next subsegment to allocate within the .data segment. */
967 static subsegT ppc_data_subsegment = 2;
968
969 /* Linked list of csects in the data section. */
970 static symbolS *ppc_data_csects;
971
972 /* The current csect. */
973 static symbolS *ppc_current_csect;
974
975 /* The RS/6000 assembler uses a TOC which holds addresses of functions
976 and variables. Symbols are put in the TOC with the .tc pseudo-op.
977 A special relocation is used when accessing TOC entries. We handle
978 the TOC as a subsegment within the .data segment. We set it up if
979 we see a .toc pseudo-op, and save the csect symbol here. */
980 static symbolS *ppc_toc_csect;
981
982 /* The first frag in the TOC subsegment. */
983 static fragS *ppc_toc_frag;
984
985 /* The first frag in the first subsegment after the TOC in the .data
986 segment. NULL if there are no subsegments after the TOC. */
987 static fragS *ppc_after_toc_frag;
988
989 /* The current static block. */
990 static symbolS *ppc_current_block;
991
992 /* The COFF debugging section; set by md_begin. This is not the
993 .debug section, but is instead the secret BFD section which will
994 cause BFD to set the section number of a symbol to N_DEBUG. */
995 static asection *ppc_coff_debug_section;
996
997 /* Structure to set the length field of the dwarf sections. */
998 struct dw_subsection {
999 /* Subsections are simply linked. */
1000 struct dw_subsection *link;
1001
1002 /* The subsection number. */
1003 subsegT subseg;
1004
1005 /* Expression to compute the length of the section. */
1006 expressionS end_exp;
1007 };
1008
1009 static struct dw_section {
1010 /* Corresponding section. */
1011 segT sect;
1012
1013 /* Simply linked list of subsections with a label. */
1014 struct dw_subsection *list_subseg;
1015
1016 /* The anonymous subsection. */
1017 struct dw_subsection *anon_subseg;
1018 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1019 #endif /* OBJ_XCOFF */
1020
1021 #ifdef TE_PE
1022
1023 /* Various sections that we need for PE coff support. */
1024 static segT ydata_section;
1025 static segT pdata_section;
1026 static segT reldata_section;
1027 static segT rdata_section;
1028 static segT tocdata_section;
1029
1030 /* The current section and the previous section. See ppc_previous. */
1031 static segT ppc_previous_section;
1032 static segT ppc_current_section;
1033
1034 #endif /* TE_PE */
1035
1036 #ifdef OBJ_ELF
1037 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1038 #define PPC_APUINFO_ISEL 0x40
1039 #define PPC_APUINFO_PMR 0x41
1040 #define PPC_APUINFO_RFMCI 0x42
1041 #define PPC_APUINFO_CACHELCK 0x43
1042 #define PPC_APUINFO_SPE 0x100
1043 #define PPC_APUINFO_EFS 0x101
1044 #define PPC_APUINFO_BRLOCK 0x102
1045 #define PPC_APUINFO_VLE 0x104
1046
1047 /*
1048 * We keep a list of APUinfo
1049 */
1050 unsigned long *ppc_apuinfo_list;
1051 unsigned int ppc_apuinfo_num;
1052 unsigned int ppc_apuinfo_num_alloc;
1053 #endif /* OBJ_ELF */
1054 \f
1055 #ifdef OBJ_ELF
1056 const char *const md_shortopts = "b:l:usm:K:VQ:";
1057 #else
1058 const char *const md_shortopts = "um:";
1059 #endif
1060 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1061 const struct option md_longopts[] = {
1062 {"nops", required_argument, NULL, OPTION_NOPS},
1063 {NULL, no_argument, NULL, 0}
1064 };
1065 const size_t md_longopts_size = sizeof (md_longopts);
1066
1067 int
1068 md_parse_option (int c, char *arg)
1069 {
1070 ppc_cpu_t new_cpu;
1071
1072 switch (c)
1073 {
1074 case 'u':
1075 /* -u means that any undefined symbols should be treated as
1076 external, which is the default for gas anyhow. */
1077 break;
1078
1079 #ifdef OBJ_ELF
1080 case 'l':
1081 /* Solaris as takes -le (presumably for little endian). For completeness
1082 sake, recognize -be also. */
1083 if (strcmp (arg, "e") == 0)
1084 {
1085 target_big_endian = 0;
1086 set_target_endian = 1;
1087 if (ppc_cpu & PPC_OPCODE_VLE)
1088 as_bad (_("the use of -mvle requires big endian."));
1089 }
1090 else
1091 return 0;
1092
1093 break;
1094
1095 case 'b':
1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 1;
1099 set_target_endian = 1;
1100 }
1101 else
1102 return 0;
1103
1104 break;
1105
1106 case 'K':
1107 /* Recognize -K PIC. */
1108 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1109 {
1110 shlib = SHLIB_PIC;
1111 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1112 }
1113 else
1114 return 0;
1115
1116 break;
1117 #endif
1118
1119 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1120 case 'a':
1121 if (strcmp (arg, "64") == 0)
1122 {
1123 #ifdef BFD64
1124 ppc_obj64 = 1;
1125 if (ppc_cpu & PPC_OPCODE_VLE)
1126 as_bad (_("the use of -mvle requires -a32."));
1127 #else
1128 as_fatal (_("%s unsupported"), "-a64");
1129 #endif
1130 }
1131 else if (strcmp (arg, "32") == 0)
1132 ppc_obj64 = 0;
1133 else
1134 return 0;
1135 break;
1136
1137 case 'm':
1138 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1139 if (new_cpu != 0)
1140 {
1141 ppc_cpu = new_cpu;
1142 if (strcmp (arg, "vle") == 0)
1143 {
1144 if (set_target_endian && target_big_endian == 0)
1145 as_bad (_("the use of -mvle requires big endian."));
1146 if (ppc_obj64)
1147 as_bad (_("the use of -mvle requires -a32."));
1148 }
1149 }
1150
1151 else if (strcmp (arg, "regnames") == 0)
1152 reg_names_p = TRUE;
1153
1154 else if (strcmp (arg, "no-regnames") == 0)
1155 reg_names_p = FALSE;
1156
1157 #ifdef OBJ_ELF
1158 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1159 that require relocation. */
1160 else if (strcmp (arg, "relocatable") == 0)
1161 {
1162 shlib = SHLIB_MRELOCATABLE;
1163 ppc_flags |= EF_PPC_RELOCATABLE;
1164 }
1165
1166 else if (strcmp (arg, "relocatable-lib") == 0)
1167 {
1168 shlib = SHLIB_MRELOCATABLE;
1169 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1170 }
1171
1172 /* -memb, set embedded bit. */
1173 else if (strcmp (arg, "emb") == 0)
1174 ppc_flags |= EF_PPC_EMB;
1175
1176 /* -mlittle/-mbig set the endianness. */
1177 else if (strcmp (arg, "little") == 0
1178 || strcmp (arg, "little-endian") == 0)
1179 {
1180 target_big_endian = 0;
1181 set_target_endian = 1;
1182 if (ppc_cpu & PPC_OPCODE_VLE)
1183 as_bad (_("the use of -mvle requires big endian."));
1184 }
1185
1186 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1187 {
1188 target_big_endian = 1;
1189 set_target_endian = 1;
1190 }
1191
1192 else if (strcmp (arg, "solaris") == 0)
1193 {
1194 msolaris = TRUE;
1195 ppc_comment_chars = ppc_solaris_comment_chars;
1196 }
1197
1198 else if (strcmp (arg, "no-solaris") == 0)
1199 {
1200 msolaris = FALSE;
1201 ppc_comment_chars = ppc_eabi_comment_chars;
1202 }
1203 #endif
1204 else
1205 {
1206 as_bad (_("invalid switch -m%s"), arg);
1207 return 0;
1208 }
1209 break;
1210
1211 #ifdef OBJ_ELF
1212 /* -V: SVR4 argument to print version ID. */
1213 case 'V':
1214 print_version_id ();
1215 break;
1216
1217 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1218 should be emitted or not. FIXME: Not implemented. */
1219 case 'Q':
1220 break;
1221
1222 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1223 rather than .stabs.excl, which is ignored by the linker.
1224 FIXME: Not implemented. */
1225 case 's':
1226 if (arg)
1227 return 0;
1228
1229 break;
1230 #endif
1231
1232 case OPTION_NOPS:
1233 {
1234 char *end;
1235 nop_limit = strtoul (optarg, &end, 0);
1236 if (*end)
1237 as_bad (_("--nops needs a numeric argument"));
1238 }
1239 break;
1240
1241 default:
1242 return 0;
1243 }
1244
1245 return 1;
1246 }
1247
1248 void
1249 md_show_usage (FILE *stream)
1250 {
1251 fprintf (stream, _("\
1252 PowerPC options:\n\
1253 -a32 generate ELF32/XCOFF32\n\
1254 -a64 generate ELF64/XCOFF64\n\
1255 -u ignored\n\
1256 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1257 -mpwr generate code for POWER (RIOS1)\n\
1258 -m601 generate code for PowerPC 601\n\
1259 -mppc, -mppc32, -m603, -m604\n\
1260 generate code for PowerPC 603/604\n\
1261 -m403 generate code for PowerPC 403\n\
1262 -m405 generate code for PowerPC 405\n\
1263 -m440 generate code for PowerPC 440\n\
1264 -m464 generate code for PowerPC 464\n\
1265 -m476 generate code for PowerPC 476\n\
1266 -m7400, -m7410, -m7450, -m7455\n\
1267 generate code for PowerPC 7400/7410/7450/7455\n\
1268 -m750cl generate code for PowerPC 750cl\n"));
1269 fprintf (stream, _("\
1270 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1271 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1272 -mbooke generate code for 32-bit PowerPC BookE\n\
1273 -ma2 generate code for A2 architecture\n\
1274 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1275 -mpower5, -mpwr5, -mpwr5x\n\
1276 generate code for Power5 architecture\n\
1277 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1278 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1279 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1280 -mcell generate code for Cell Broadband Engine architecture\n\
1281 -mcom generate code Power/PowerPC common instructions\n\
1282 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1283 fprintf (stream, _("\
1284 -maltivec generate code for AltiVec\n\
1285 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1286 -mhtm generate code for Hardware Transactional Memory\n\
1287 -me300 generate code for PowerPC e300 family\n\
1288 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1289 -me500mc, generate code for Freescale e500mc core complex\n\
1290 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1291 -me5500, generate code for Freescale e5500 core complex\n\
1292 -me6500, generate code for Freescale e6500 core complex\n\
1293 -mspe generate code for Motorola SPE instructions\n\
1294 -mvle generate code for Freescale VLE instructions\n\
1295 -mtitan generate code for AppliedMicro Titan core complex\n\
1296 -mregnames Allow symbolic names for registers\n\
1297 -mno-regnames Do not allow symbolic names for registers\n"));
1298 #ifdef OBJ_ELF
1299 fprintf (stream, _("\
1300 -mrelocatable support for GCC's -mrelocatble option\n\
1301 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1302 -memb set PPC_EMB bit in ELF flags\n\
1303 -mlittle, -mlittle-endian, -le\n\
1304 generate code for a little endian machine\n\
1305 -mbig, -mbig-endian, -be\n\
1306 generate code for a big endian machine\n\
1307 -msolaris generate code for Solaris\n\
1308 -mno-solaris do not generate code for Solaris\n\
1309 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1310 -V print assembler version number\n\
1311 -Qy, -Qn ignored\n"));
1312 #endif
1313 fprintf (stream, _("\
1314 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1315 }
1316 \f
1317 /* Set ppc_cpu if it is not already set. */
1318
1319 static void
1320 ppc_set_cpu (void)
1321 {
1322 const char *default_os = TARGET_OS;
1323 const char *default_cpu = TARGET_CPU;
1324
1325 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1326 {
1327 if (ppc_obj64)
1328 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1329 else if (strncmp (default_os, "aix", 3) == 0
1330 && default_os[3] >= '4' && default_os[3] <= '9')
1331 ppc_cpu |= PPC_OPCODE_COMMON;
1332 else if (strncmp (default_os, "aix3", 4) == 0)
1333 ppc_cpu |= PPC_OPCODE_POWER;
1334 else if (strcmp (default_cpu, "rs6000") == 0)
1335 ppc_cpu |= PPC_OPCODE_POWER;
1336 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1337 ppc_cpu |= PPC_OPCODE_PPC;
1338 else
1339 as_fatal (_("unknown default cpu = %s, os = %s"),
1340 default_cpu, default_os);
1341 }
1342 }
1343
1344 /* Figure out the BFD architecture to use. This function and ppc_mach
1345 are called well before md_begin, when the output file is opened. */
1346
1347 enum bfd_architecture
1348 ppc_arch (void)
1349 {
1350 const char *default_cpu = TARGET_CPU;
1351 ppc_set_cpu ();
1352
1353 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1354 return bfd_arch_powerpc;
1355 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1356 return bfd_arch_powerpc;
1357 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1358 return bfd_arch_rs6000;
1359 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1360 {
1361 if (strcmp (default_cpu, "rs6000") == 0)
1362 return bfd_arch_rs6000;
1363 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1364 return bfd_arch_powerpc;
1365 }
1366
1367 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1368 return bfd_arch_unknown;
1369 }
1370
1371 unsigned long
1372 ppc_mach (void)
1373 {
1374 if (ppc_obj64)
1375 return bfd_mach_ppc64;
1376 else if (ppc_arch () == bfd_arch_rs6000)
1377 return bfd_mach_rs6k;
1378 else if (ppc_cpu & PPC_OPCODE_TITAN)
1379 return bfd_mach_ppc_titan;
1380 else if (ppc_cpu & PPC_OPCODE_VLE)
1381 return bfd_mach_ppc_vle;
1382 else
1383 return bfd_mach_ppc;
1384 }
1385
1386 extern char*
1387 ppc_target_format (void)
1388 {
1389 #ifdef OBJ_COFF
1390 #ifdef TE_PE
1391 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1392 #elif TE_POWERMAC
1393 return "xcoff-powermac";
1394 #else
1395 # ifdef TE_AIX5
1396 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1397 # else
1398 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1399 # endif
1400 #endif
1401 #endif
1402 #ifdef OBJ_ELF
1403 # ifdef TE_FreeBSD
1404 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1405 # elif defined (TE_VXWORKS)
1406 return "elf32-powerpc-vxworks";
1407 # else
1408 return (target_big_endian
1409 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1410 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1411 # endif
1412 #endif
1413 }
1414
1415 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1416 Return TRUE if there's a problem, otherwise FALSE. */
1417
1418 static bfd_boolean
1419 insn_validate (const struct powerpc_opcode *op)
1420 {
1421 const unsigned char *o;
1422 unsigned long omask = op->mask;
1423
1424 /* The mask had better not trim off opcode bits. */
1425 if ((op->opcode & omask) != op->opcode)
1426 {
1427 as_bad (_("mask trims opcode bits for %s"), op->name);
1428 return TRUE;
1429 }
1430
1431 /* The operands must not overlap the opcode or each other. */
1432 for (o = op->operands; *o; ++o)
1433 {
1434 if (*o >= num_powerpc_operands)
1435 {
1436 as_bad (_("operand index error for %s"), op->name);
1437 return TRUE;
1438 }
1439 else
1440 {
1441 const struct powerpc_operand *operand = &powerpc_operands[*o];
1442 if (operand->shift != PPC_OPSHIFT_INV)
1443 {
1444 unsigned long mask;
1445
1446 if (operand->shift >= 0)
1447 mask = operand->bitm << operand->shift;
1448 else
1449 mask = operand->bitm >> -operand->shift;
1450 if (omask & mask)
1451 {
1452 as_bad (_("operand %d overlap in %s"),
1453 (int) (o - op->operands), op->name);
1454 return TRUE;
1455 }
1456 omask |= mask;
1457 }
1458 }
1459 }
1460 return FALSE;
1461 }
1462
1463 /* Insert opcodes and macros into hash tables. Called at startup and
1464 for .machine pseudo. */
1465
1466 static void
1467 ppc_setup_opcodes (void)
1468 {
1469 const struct powerpc_opcode *op;
1470 const struct powerpc_opcode *op_end;
1471 const struct powerpc_macro *macro;
1472 const struct powerpc_macro *macro_end;
1473 bfd_boolean bad_insn = FALSE;
1474
1475 if (ppc_hash != NULL)
1476 hash_die (ppc_hash);
1477 if (ppc_macro_hash != NULL)
1478 hash_die (ppc_macro_hash);
1479
1480 /* Insert the opcodes into a hash table. */
1481 ppc_hash = hash_new ();
1482
1483 if (ENABLE_CHECKING)
1484 {
1485 unsigned int i;
1486
1487 /* An index into powerpc_operands is stored in struct fix
1488 fx_pcrel_adjust which is 8 bits wide. */
1489 gas_assert (num_powerpc_operands < 256);
1490
1491 /* Check operand masks. Code here and in the disassembler assumes
1492 all the 1's in the mask are contiguous. */
1493 for (i = 0; i < num_powerpc_operands; ++i)
1494 {
1495 unsigned long mask = powerpc_operands[i].bitm;
1496 unsigned long right_bit;
1497 unsigned int j;
1498
1499 right_bit = mask & -mask;
1500 mask += right_bit;
1501 right_bit = mask & -mask;
1502 if (mask != right_bit)
1503 {
1504 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1505 bad_insn = TRUE;
1506 }
1507 for (j = i + 1; j < num_powerpc_operands; ++j)
1508 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1509 sizeof (powerpc_operands[0])) == 0)
1510 {
1511 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1512 j, i);
1513 bad_insn = TRUE;
1514 }
1515 }
1516 }
1517
1518 op_end = powerpc_opcodes + powerpc_num_opcodes;
1519 for (op = powerpc_opcodes; op < op_end; op++)
1520 {
1521 if (ENABLE_CHECKING)
1522 {
1523 if (op != powerpc_opcodes)
1524 {
1525 int old_opcode = PPC_OP (op[-1].opcode);
1526 int new_opcode = PPC_OP (op[0].opcode);
1527
1528 #ifdef PRINT_OPCODE_TABLE
1529 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1530 op->name, (unsigned int) (op - powerpc_opcodes),
1531 (unsigned int) new_opcode, (unsigned int) op->opcode,
1532 (unsigned int) op->mask, (unsigned long long) op->flags);
1533 #endif
1534
1535 /* The major opcodes had better be sorted. Code in the
1536 disassembler assumes the insns are sorted according to
1537 major opcode. */
1538 if (new_opcode < old_opcode)
1539 {
1540 as_bad (_("major opcode is not sorted for %s"),
1541 op->name);
1542 bad_insn = TRUE;
1543 }
1544 }
1545 bad_insn |= insn_validate (op);
1546 }
1547
1548 if ((ppc_cpu & op->flags) != 0
1549 && !(ppc_cpu & op->deprecated))
1550 {
1551 const char *retval;
1552
1553 retval = hash_insert (ppc_hash, op->name, (void *) op);
1554 if (retval != NULL)
1555 {
1556 as_bad (_("duplicate instruction %s"),
1557 op->name);
1558 bad_insn = TRUE;
1559 }
1560 }
1561 }
1562
1563 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1564 for (op = powerpc_opcodes; op < op_end; op++)
1565 hash_insert (ppc_hash, op->name, (void *) op);
1566
1567 op_end = vle_opcodes + vle_num_opcodes;
1568 for (op = vle_opcodes; op < op_end; op++)
1569 {
1570 if (ENABLE_CHECKING)
1571 {
1572 if (op != vle_opcodes)
1573 {
1574 unsigned old_seg, new_seg;
1575
1576 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1577 old_seg = VLE_OP_TO_SEG (old_seg);
1578 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1579 new_seg = VLE_OP_TO_SEG (new_seg);
1580
1581 #ifdef PRINT_OPCODE_TABLE
1582 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1583 op->name, (unsigned int) (op - powerpc_opcodes),
1584 (unsigned int) new_seg, (unsigned int) op->opcode,
1585 (unsigned int) op->mask, (unsigned long long) op->flags);
1586 #endif
1587 /* The major opcodes had better be sorted. Code in the
1588 disassembler assumes the insns are sorted according to
1589 major opcode. */
1590 if (new_seg < old_seg)
1591 {
1592 as_bad (_("major opcode is not sorted for %s"),
1593 op->name);
1594 bad_insn = TRUE;
1595 }
1596 }
1597
1598 bad_insn |= insn_validate (op);
1599 }
1600
1601 if ((ppc_cpu & op->flags) != 0
1602 && !(ppc_cpu & op->deprecated))
1603 {
1604 const char *retval;
1605
1606 retval = hash_insert (ppc_hash, op->name, (void *) op);
1607 if (retval != NULL)
1608 {
1609 as_bad (_("duplicate instruction %s"),
1610 op->name);
1611 bad_insn = TRUE;
1612 }
1613 }
1614 }
1615
1616 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1617 for (op = vle_opcodes; op < op_end; op++)
1618 hash_insert (ppc_hash, op->name, (void *) op);
1619
1620 /* Insert the macros into a hash table. */
1621 ppc_macro_hash = hash_new ();
1622
1623 macro_end = powerpc_macros + powerpc_num_macros;
1624 for (macro = powerpc_macros; macro < macro_end; macro++)
1625 {
1626 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1627 {
1628 const char *retval;
1629
1630 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1631 if (retval != (const char *) NULL)
1632 {
1633 as_bad (_("duplicate macro %s"), macro->name);
1634 bad_insn = TRUE;
1635 }
1636 }
1637 }
1638
1639 if (bad_insn)
1640 abort ();
1641 }
1642
1643 /* This function is called when the assembler starts up. It is called
1644 after the options have been parsed and the output file has been
1645 opened. */
1646
1647 void
1648 md_begin (void)
1649 {
1650 ppc_set_cpu ();
1651
1652 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1653 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1654
1655 #ifdef OBJ_ELF
1656 /* Set the ELF flags if desired. */
1657 if (ppc_flags && !msolaris)
1658 bfd_set_private_flags (stdoutput, ppc_flags);
1659 #endif
1660
1661 ppc_setup_opcodes ();
1662
1663 /* Tell the main code what the endianness is if it is not overridden
1664 by the user. */
1665 if (!set_target_endian)
1666 {
1667 set_target_endian = 1;
1668 target_big_endian = PPC_BIG_ENDIAN;
1669 }
1670
1671 #ifdef OBJ_XCOFF
1672 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1673
1674 /* Create dummy symbols to serve as initial csects. This forces the
1675 text csects to precede the data csects. These symbols will not
1676 be output. */
1677 ppc_text_csects = symbol_make ("dummy\001");
1678 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1679 ppc_data_csects = symbol_make ("dummy\001");
1680 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1681 #endif
1682
1683 #ifdef TE_PE
1684
1685 ppc_current_section = text_section;
1686 ppc_previous_section = 0;
1687
1688 #endif
1689 }
1690
1691 void
1692 ppc_cleanup (void)
1693 {
1694 #ifdef OBJ_ELF
1695 if (ppc_apuinfo_list == NULL)
1696 return;
1697
1698 /* Ok, so write the section info out. We have this layout:
1699
1700 byte data what
1701 ---- ---- ----
1702 0 8 length of "APUinfo\0"
1703 4 (n*4) number of APU's (4 bytes each)
1704 8 2 note type 2
1705 12 "APUinfo\0" name
1706 20 APU#1 first APU's info
1707 24 APU#2 second APU's info
1708 ... ...
1709 */
1710 {
1711 char *p;
1712 asection *seg = now_seg;
1713 subsegT subseg = now_subseg;
1714 asection *apuinfo_secp = (asection *) NULL;
1715 unsigned int i;
1716
1717 /* Create the .PPC.EMB.apuinfo section. */
1718 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1719 bfd_set_section_flags (stdoutput,
1720 apuinfo_secp,
1721 SEC_HAS_CONTENTS | SEC_READONLY);
1722
1723 p = frag_more (4);
1724 md_number_to_chars (p, (valueT) 8, 4);
1725
1726 p = frag_more (4);
1727 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1728
1729 p = frag_more (4);
1730 md_number_to_chars (p, (valueT) 2, 4);
1731
1732 p = frag_more (8);
1733 strcpy (p, "APUinfo");
1734
1735 for (i = 0; i < ppc_apuinfo_num; i++)
1736 {
1737 p = frag_more (4);
1738 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1739 }
1740
1741 frag_align (2, 0, 0);
1742
1743 /* We probably can't restore the current segment, for there likely
1744 isn't one yet... */
1745 if (seg && subseg)
1746 subseg_set (seg, subseg);
1747 }
1748 #endif
1749 }
1750
1751 /* Insert an operand value into an instruction. */
1752
1753 static unsigned long
1754 ppc_insert_operand (unsigned long insn,
1755 const struct powerpc_operand *operand,
1756 offsetT val,
1757 ppc_cpu_t cpu,
1758 char *file,
1759 unsigned int line)
1760 {
1761 long min, max, right;
1762
1763 max = operand->bitm;
1764 right = max & -max;
1765 min = 0;
1766
1767 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1768 {
1769 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1770 max = (max >> 1) & -right;
1771 min = ~max & -right;
1772 }
1773
1774 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1775 max++;
1776
1777 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1778 {
1779 long tmp = min;
1780 min = -max;
1781 max = -tmp;
1782 }
1783
1784 if (min <= max)
1785 {
1786 /* Some people write constants with the sign extension done by
1787 hand but only up to 32 bits. This shouldn't really be valid,
1788 but, to permit this code to assemble on a 64-bit host, we
1789 sign extend the 32-bit value to 64 bits if so doing makes the
1790 value valid. */
1791 if (val > max
1792 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1793 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1794 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1795 val = val - 0x80000000 - 0x80000000;
1796
1797 /* Similarly, people write expressions like ~(1<<15), and expect
1798 this to be OK for a 32-bit unsigned value. */
1799 else if (val < min
1800 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1801 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1802 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1803 val = val + 0x80000000 + 0x80000000;
1804
1805 else if (val < min
1806 || val > max
1807 || (val & (right - 1)) != 0)
1808 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1809 }
1810
1811 if (operand->insert)
1812 {
1813 const char *errmsg;
1814
1815 errmsg = NULL;
1816 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1817 if (errmsg != (const char *) NULL)
1818 as_bad_where (file, line, "%s", errmsg);
1819 }
1820 else if (operand->shift >= 0)
1821 insn |= ((long) val & operand->bitm) << operand->shift;
1822 else
1823 insn |= ((long) val & operand->bitm) >> -operand->shift;
1824
1825 return insn;
1826 }
1827
1828 \f
1829 #ifdef OBJ_ELF
1830 /* Parse @got, etc. and return the desired relocation. */
1831 static bfd_reloc_code_real_type
1832 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1833 {
1834 struct map_bfd {
1835 char *string;
1836 unsigned int length : 8;
1837 unsigned int valid32 : 1;
1838 unsigned int valid64 : 1;
1839 unsigned int reloc;
1840 };
1841
1842 char ident[20];
1843 char *str = *str_p;
1844 char *str2;
1845 int ch;
1846 int len;
1847 const struct map_bfd *ptr;
1848
1849 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1850 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1851 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1852
1853 static const struct map_bfd mapping[] = {
1854 MAP ("l", BFD_RELOC_LO16),
1855 MAP ("h", BFD_RELOC_HI16),
1856 MAP ("ha", BFD_RELOC_HI16_S),
1857 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1858 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1859 MAP ("got", BFD_RELOC_16_GOTOFF),
1860 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1861 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1862 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1863 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1864 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1865 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1866 MAP ("copy", BFD_RELOC_PPC_COPY),
1867 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1868 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1869 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1870 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1871 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1872 MAP ("tls", BFD_RELOC_PPC_TLS),
1873 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1874 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1875 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1876 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1877 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1878 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1879 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1880 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1881 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1882 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1883 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1884 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1885 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1886 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1887 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1888 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1889 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1890 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1891 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1892 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1893 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1894 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1895 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1896 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1897 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1898 MAP32 ("fixup", BFD_RELOC_CTOR),
1899 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1900 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1901 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1902 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1903 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1904 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1905 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1906 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1907 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1908 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1909 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1910 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1911 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1912 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1913 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1914 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1915 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1916 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1917 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1918 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1919 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1920 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1921 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1922 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1923 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1924 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1925 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1926 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1927 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1928 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1929 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1930 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1931 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1932 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1933 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1934 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1935 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1936 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1937 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1938 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1939 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1940 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1941 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1942 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1943 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1944 };
1945
1946 if (*str++ != '@')
1947 return BFD_RELOC_UNUSED;
1948
1949 for (ch = *str, str2 = ident;
1950 (str2 < ident + sizeof (ident) - 1
1951 && (ISALNUM (ch) || ch == '@'));
1952 ch = *++str)
1953 {
1954 *str2++ = TOLOWER (ch);
1955 }
1956
1957 *str2 = '\0';
1958 len = str2 - ident;
1959
1960 ch = ident[0];
1961 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1962 if (ch == ptr->string[0]
1963 && len == ptr->length
1964 && memcmp (ident, ptr->string, ptr->length) == 0
1965 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1966 {
1967 int reloc = ptr->reloc;
1968
1969 if (!ppc_obj64 && exp_p->X_add_number != 0)
1970 {
1971 switch (reloc)
1972 {
1973 case BFD_RELOC_16_GOTOFF:
1974 case BFD_RELOC_LO16_GOTOFF:
1975 case BFD_RELOC_HI16_GOTOFF:
1976 case BFD_RELOC_HI16_S_GOTOFF:
1977 as_warn (_("identifier+constant@got means "
1978 "identifier@got+constant"));
1979 break;
1980
1981 case BFD_RELOC_PPC_GOT_TLSGD16:
1982 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1983 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1984 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1985 case BFD_RELOC_PPC_GOT_TLSLD16:
1986 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1987 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1988 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1989 case BFD_RELOC_PPC_GOT_DTPREL16:
1990 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1991 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1992 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1993 case BFD_RELOC_PPC_GOT_TPREL16:
1994 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1995 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1996 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1997 as_bad (_("symbol+offset not supported for got tls"));
1998 break;
1999 }
2000 }
2001
2002 /* Now check for identifier@suffix+constant. */
2003 if (*str == '-' || *str == '+')
2004 {
2005 char *orig_line = input_line_pointer;
2006 expressionS new_exp;
2007
2008 input_line_pointer = str;
2009 expression (&new_exp);
2010 if (new_exp.X_op == O_constant)
2011 {
2012 exp_p->X_add_number += new_exp.X_add_number;
2013 str = input_line_pointer;
2014 }
2015
2016 if (&input_line_pointer != str_p)
2017 input_line_pointer = orig_line;
2018 }
2019 *str_p = str;
2020
2021 if (reloc == (int) BFD_RELOC_PPC64_TOC
2022 && exp_p->X_op == O_symbol
2023 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2024 {
2025 /* Change the symbol so that the dummy .TOC. symbol can be
2026 omitted from the object file. */
2027 exp_p->X_add_symbol = &abs_symbol;
2028 }
2029
2030 return (bfd_reloc_code_real_type) reloc;
2031 }
2032
2033 return BFD_RELOC_UNUSED;
2034 }
2035
2036 /* Like normal .long/.short/.word, except support @got, etc.
2037 Clobbers input_line_pointer, checks end-of-line. */
2038 static void
2039 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
2040 {
2041 expressionS exp;
2042 bfd_reloc_code_real_type reloc;
2043
2044 if (is_it_end_of_statement ())
2045 {
2046 demand_empty_rest_of_line ();
2047 return;
2048 }
2049
2050 do
2051 {
2052 expression (&exp);
2053 if (exp.X_op == O_symbol
2054 && *input_line_pointer == '@'
2055 && (reloc = ppc_elf_suffix (&input_line_pointer,
2056 &exp)) != BFD_RELOC_UNUSED)
2057 {
2058 reloc_howto_type *reloc_howto;
2059 int size;
2060
2061 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2062 size = bfd_get_reloc_size (reloc_howto);
2063
2064 if (size > nbytes)
2065 {
2066 as_bad (_("%s relocations do not fit in %d bytes\n"),
2067 reloc_howto->name, nbytes);
2068 }
2069 else
2070 {
2071 char *p;
2072 int offset;
2073
2074 p = frag_more (nbytes);
2075 memset (p, 0, nbytes);
2076 offset = 0;
2077 if (target_big_endian)
2078 offset = nbytes - size;
2079 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2080 &exp, 0, reloc);
2081 }
2082 }
2083 else
2084 emit_expr (&exp, (unsigned int) nbytes);
2085 }
2086 while (*input_line_pointer++ == ',');
2087
2088 /* Put terminator back into stream. */
2089 input_line_pointer--;
2090 demand_empty_rest_of_line ();
2091 }
2092
2093 /* Solaris pseduo op to change to the .rodata section. */
2094 static void
2095 ppc_elf_rdata (int xxx)
2096 {
2097 char *save_line = input_line_pointer;
2098 static char section[] = ".rodata\n";
2099
2100 /* Just pretend this is .section .rodata */
2101 input_line_pointer = section;
2102 obj_elf_section (xxx);
2103
2104 input_line_pointer = save_line;
2105 }
2106
2107 /* Pseudo op to make file scope bss items. */
2108 static void
2109 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2110 {
2111 char *name;
2112 char c;
2113 char *p;
2114 offsetT size;
2115 symbolS *symbolP;
2116 offsetT align;
2117 segT old_sec;
2118 int old_subsec;
2119 char *pfrag;
2120 int align2;
2121
2122 name = input_line_pointer;
2123 c = get_symbol_end ();
2124
2125 /* just after name is now '\0'. */
2126 p = input_line_pointer;
2127 *p = c;
2128 SKIP_WHITESPACE ();
2129 if (*input_line_pointer != ',')
2130 {
2131 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2132 ignore_rest_of_line ();
2133 return;
2134 }
2135
2136 input_line_pointer++; /* skip ',' */
2137 if ((size = get_absolute_expression ()) < 0)
2138 {
2139 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2140 ignore_rest_of_line ();
2141 return;
2142 }
2143
2144 /* The third argument to .lcomm is the alignment. */
2145 if (*input_line_pointer != ',')
2146 align = 8;
2147 else
2148 {
2149 ++input_line_pointer;
2150 align = get_absolute_expression ();
2151 if (align <= 0)
2152 {
2153 as_warn (_("ignoring bad alignment"));
2154 align = 8;
2155 }
2156 }
2157
2158 *p = 0;
2159 symbolP = symbol_find_or_make (name);
2160 *p = c;
2161
2162 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2163 {
2164 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2165 S_GET_NAME (symbolP));
2166 ignore_rest_of_line ();
2167 return;
2168 }
2169
2170 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2171 {
2172 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2173 S_GET_NAME (symbolP),
2174 (long) S_GET_VALUE (symbolP),
2175 (long) size);
2176
2177 ignore_rest_of_line ();
2178 return;
2179 }
2180
2181 /* Allocate_bss. */
2182 old_sec = now_seg;
2183 old_subsec = now_subseg;
2184 if (align)
2185 {
2186 /* Convert to a power of 2 alignment. */
2187 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2188 if (align != 1)
2189 {
2190 as_bad (_("common alignment not a power of 2"));
2191 ignore_rest_of_line ();
2192 return;
2193 }
2194 }
2195 else
2196 align2 = 0;
2197
2198 record_alignment (bss_section, align2);
2199 subseg_set (bss_section, 0);
2200 if (align2)
2201 frag_align (align2, 0, 0);
2202 if (S_GET_SEGMENT (symbolP) == bss_section)
2203 symbol_get_frag (symbolP)->fr_symbol = 0;
2204 symbol_set_frag (symbolP, frag_now);
2205 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2206 (char *) 0);
2207 *pfrag = 0;
2208 S_SET_SIZE (symbolP, size);
2209 S_SET_SEGMENT (symbolP, bss_section);
2210 subseg_set (old_sec, old_subsec);
2211 demand_empty_rest_of_line ();
2212 }
2213
2214 /* Validate any relocations emitted for -mrelocatable, possibly adding
2215 fixups for word relocations in writable segments, so we can adjust
2216 them at runtime. */
2217 static void
2218 ppc_elf_validate_fix (fixS *fixp, segT seg)
2219 {
2220 if (fixp->fx_done || fixp->fx_pcrel)
2221 return;
2222
2223 switch (shlib)
2224 {
2225 case SHLIB_NONE:
2226 case SHLIB_PIC:
2227 return;
2228
2229 case SHLIB_MRELOCATABLE:
2230 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2231 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2232 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2233 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2234 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2235 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2236 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2237 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2238 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2239 && (seg->flags & SEC_LOAD) != 0
2240 && strcmp (segment_name (seg), ".got2") != 0
2241 && strcmp (segment_name (seg), ".dtors") != 0
2242 && strcmp (segment_name (seg), ".ctors") != 0
2243 && strcmp (segment_name (seg), ".fixup") != 0
2244 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2245 && strcmp (segment_name (seg), ".eh_frame") != 0
2246 && strcmp (segment_name (seg), ".ex_shared") != 0)
2247 {
2248 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2249 || fixp->fx_r_type != BFD_RELOC_CTOR)
2250 {
2251 as_bad_where (fixp->fx_file, fixp->fx_line,
2252 _("relocation cannot be done when using -mrelocatable"));
2253 }
2254 }
2255 return;
2256 }
2257 }
2258
2259 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2260 function descriptor sym if the corresponding code sym is used. */
2261
2262 void
2263 ppc_frob_file_before_adjust (void)
2264 {
2265 symbolS *symp;
2266 asection *toc;
2267
2268 if (!ppc_obj64)
2269 return;
2270
2271 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2272 {
2273 const char *name;
2274 char *dotname;
2275 symbolS *dotsym;
2276 size_t len;
2277
2278 name = S_GET_NAME (symp);
2279 if (name[0] == '.')
2280 continue;
2281
2282 if (! S_IS_WEAK (symp)
2283 || S_IS_DEFINED (symp))
2284 continue;
2285
2286 len = strlen (name) + 1;
2287 dotname = xmalloc (len + 1);
2288 dotname[0] = '.';
2289 memcpy (dotname + 1, name, len);
2290 dotsym = symbol_find_noref (dotname, 1);
2291 free (dotname);
2292 if (dotsym != NULL && (symbol_used_p (dotsym)
2293 || symbol_used_in_reloc_p (dotsym)))
2294 symbol_mark_used (symp);
2295
2296 }
2297
2298 toc = bfd_get_section_by_name (stdoutput, ".toc");
2299 if (toc != NULL
2300 && toc_reloc_types != has_large_toc_reloc
2301 && bfd_section_size (stdoutput, toc) > 0x10000)
2302 as_warn (_("TOC section size exceeds 64k"));
2303 }
2304
2305 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2306 emitted. Other uses of .TOC. will cause the symbol to be marked
2307 with BSF_KEEP in md_apply_fix. */
2308
2309 void
2310 ppc_elf_adjust_symtab (void)
2311 {
2312 if (ppc_obj64)
2313 {
2314 symbolS *symp;
2315 symp = symbol_find (".TOC.");
2316 if (symp != NULL)
2317 {
2318 asymbol *bsym = symbol_get_bfdsym (symp);
2319 if ((bsym->flags & BSF_KEEP) == 0)
2320 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2321 }
2322 }
2323 }
2324 #endif /* OBJ_ELF */
2325 \f
2326 #ifdef TE_PE
2327
2328 /*
2329 * Summary of parse_toc_entry.
2330 *
2331 * in: Input_line_pointer points to the '[' in one of:
2332 *
2333 * [toc] [tocv] [toc32] [toc64]
2334 *
2335 * Anything else is an error of one kind or another.
2336 *
2337 * out:
2338 * return value: success or failure
2339 * toc_kind: kind of toc reference
2340 * input_line_pointer:
2341 * success: first char after the ']'
2342 * failure: unchanged
2343 *
2344 * settings:
2345 *
2346 * [toc] - rv == success, toc_kind = default_toc
2347 * [tocv] - rv == success, toc_kind = data_in_toc
2348 * [toc32] - rv == success, toc_kind = must_be_32
2349 * [toc64] - rv == success, toc_kind = must_be_64
2350 *
2351 */
2352
2353 enum toc_size_qualifier
2354 {
2355 default_toc, /* The toc cell constructed should be the system default size */
2356 data_in_toc, /* This is a direct reference to a toc cell */
2357 must_be_32, /* The toc cell constructed must be 32 bits wide */
2358 must_be_64 /* The toc cell constructed must be 64 bits wide */
2359 };
2360
2361 static int
2362 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2363 {
2364 char *start;
2365 char *toc_spec;
2366 char c;
2367 enum toc_size_qualifier t;
2368
2369 /* Save the input_line_pointer. */
2370 start = input_line_pointer;
2371
2372 /* Skip over the '[' , and whitespace. */
2373 ++input_line_pointer;
2374 SKIP_WHITESPACE ();
2375
2376 /* Find the spelling of the operand. */
2377 toc_spec = input_line_pointer;
2378 c = get_symbol_end ();
2379
2380 if (strcmp (toc_spec, "toc") == 0)
2381 {
2382 t = default_toc;
2383 }
2384 else if (strcmp (toc_spec, "tocv") == 0)
2385 {
2386 t = data_in_toc;
2387 }
2388 else if (strcmp (toc_spec, "toc32") == 0)
2389 {
2390 t = must_be_32;
2391 }
2392 else if (strcmp (toc_spec, "toc64") == 0)
2393 {
2394 t = must_be_64;
2395 }
2396 else
2397 {
2398 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2399 *input_line_pointer = c;
2400 input_line_pointer = start;
2401 return 0;
2402 }
2403
2404 /* Now find the ']'. */
2405 *input_line_pointer = c;
2406
2407 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2408 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2409
2410 if (c != ']')
2411 {
2412 as_bad (_("syntax error: expected `]', found `%c'"), c);
2413 input_line_pointer = start;
2414 return 0;
2415 }
2416
2417 *toc_kind = t;
2418 return 1;
2419 }
2420 #endif
2421
2422 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2423 /* See whether a symbol is in the TOC section. */
2424
2425 static int
2426 ppc_is_toc_sym (symbolS *sym)
2427 {
2428 #ifdef OBJ_XCOFF
2429 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2430 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2431 #endif
2432 #ifdef OBJ_ELF
2433 const char *sname = segment_name (S_GET_SEGMENT (sym));
2434 if (ppc_obj64)
2435 return strcmp (sname, ".toc") == 0;
2436 else
2437 return strcmp (sname, ".got") == 0;
2438 #endif
2439 }
2440 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2441 \f
2442
2443 #ifdef OBJ_ELF
2444 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2445 static void
2446 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2447 {
2448 unsigned int i;
2449
2450 /* Check we don't already exist. */
2451 for (i = 0; i < ppc_apuinfo_num; i++)
2452 if (ppc_apuinfo_list[i] == APUID (apu, version))
2453 return;
2454
2455 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2456 {
2457 if (ppc_apuinfo_num_alloc == 0)
2458 {
2459 ppc_apuinfo_num_alloc = 4;
2460 ppc_apuinfo_list = (unsigned long *)
2461 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2462 }
2463 else
2464 {
2465 ppc_apuinfo_num_alloc += 4;
2466 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2467 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2468 }
2469 }
2470 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2471 }
2472 #undef APUID
2473 #endif
2474 \f
2475
2476 /* We need to keep a list of fixups. We can't simply generate them as
2477 we go, because that would require us to first create the frag, and
2478 that would screw up references to ``.''. */
2479
2480 struct ppc_fixup
2481 {
2482 expressionS exp;
2483 int opindex;
2484 bfd_reloc_code_real_type reloc;
2485 };
2486
2487 #define MAX_INSN_FIXUPS (5)
2488
2489 /* Form I16L. */
2490 #define E_OR2I_INSN 0x7000C000
2491 #define E_AND2I_DOT_INSN 0x7000C800
2492 #define E_OR2IS_INSN 0x7000D000
2493 #define E_LIS_INSN 0x7000E000
2494 #define E_AND2IS_DOT_INSN 0x7000E800
2495
2496 /* Form I16A. */
2497 #define E_ADD2I_DOT_INSN 0x70008800
2498 #define E_ADD2IS_INSN 0x70009000
2499 #define E_CMP16I_INSN 0x70009800
2500 #define E_MULL2I_INSN 0x7000A000
2501 #define E_CMPL16I_INSN 0x7000A800
2502 #define E_CMPH16I_INSN 0x7000B000
2503 #define E_CMPHL16I_INSN 0x7000B800
2504
2505 /* This routine is called for each instruction to be assembled. */
2506
2507 void
2508 md_assemble (char *str)
2509 {
2510 char *s;
2511 const struct powerpc_opcode *opcode;
2512 unsigned long insn;
2513 const unsigned char *opindex_ptr;
2514 int skip_optional;
2515 int need_paren;
2516 int next_opindex;
2517 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2518 int fc;
2519 char *f;
2520 int addr_mod;
2521 int i;
2522 unsigned int insn_length;
2523
2524 /* Get the opcode. */
2525 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2526 ;
2527 if (*s != '\0')
2528 *s++ = '\0';
2529
2530 /* Look up the opcode in the hash table. */
2531 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2532 if (opcode == (const struct powerpc_opcode *) NULL)
2533 {
2534 const struct powerpc_macro *macro;
2535
2536 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2537 if (macro == (const struct powerpc_macro *) NULL)
2538 as_bad (_("unrecognized opcode: `%s'"), str);
2539 else
2540 ppc_macro (s, macro);
2541
2542 return;
2543 }
2544
2545 insn = opcode->opcode;
2546
2547 str = s;
2548 while (ISSPACE (*str))
2549 ++str;
2550
2551 /* PowerPC operands are just expressions. The only real issue is
2552 that a few operand types are optional. All cases which might use
2553 an optional operand separate the operands only with commas (in some
2554 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2555 have optional operands). Most instructions with optional operands
2556 have only one. Those that have more than one optional operand can
2557 take either all their operands or none. So, before we start seriously
2558 parsing the operands, we check to see if we have optional operands,
2559 and if we do, we count the number of commas to see which operands
2560 have been omitted. */
2561 skip_optional = 0;
2562 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2563 {
2564 const struct powerpc_operand *operand;
2565
2566 operand = &powerpc_operands[*opindex_ptr];
2567 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2568 {
2569 unsigned int opcount;
2570 unsigned int num_operands_expected;
2571
2572 /* There is an optional operand. Count the number of
2573 commas in the input line. */
2574 if (*str == '\0')
2575 opcount = 0;
2576 else
2577 {
2578 opcount = 1;
2579 s = str;
2580 while ((s = strchr (s, ',')) != (char *) NULL)
2581 {
2582 ++opcount;
2583 ++s;
2584 }
2585 }
2586
2587 /* Compute the number of expected operands.
2588 Do not count fake operands. */
2589 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2590 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2591 ++ num_operands_expected;
2592
2593 /* If there are fewer operands in the line then are called
2594 for by the instruction, we want to skip the optional
2595 operands. */
2596 if (opcount < num_operands_expected)
2597 skip_optional = 1;
2598
2599 break;
2600 }
2601 }
2602
2603 /* Gather the operands. */
2604 need_paren = 0;
2605 next_opindex = 0;
2606 fc = 0;
2607 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2608 {
2609 const struct powerpc_operand *operand;
2610 const char *errmsg;
2611 char *hold;
2612 expressionS ex;
2613 char endc;
2614
2615 if (next_opindex == 0)
2616 operand = &powerpc_operands[*opindex_ptr];
2617 else
2618 {
2619 operand = &powerpc_operands[next_opindex];
2620 next_opindex = 0;
2621 }
2622 errmsg = NULL;
2623
2624 /* If this is a fake operand, then we do not expect anything
2625 from the input. */
2626 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2627 {
2628 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2629 if (errmsg != (const char *) NULL)
2630 as_bad ("%s", errmsg);
2631 continue;
2632 }
2633
2634 /* If this is an optional operand, and we are skipping it, just
2635 insert a zero. */
2636 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2637 && skip_optional)
2638 {
2639 if (operand->insert)
2640 {
2641 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2642 if (errmsg != (const char *) NULL)
2643 as_bad ("%s", errmsg);
2644 }
2645 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2646 next_opindex = *opindex_ptr + 1;
2647 continue;
2648 }
2649
2650 /* Gather the operand. */
2651 hold = input_line_pointer;
2652 input_line_pointer = str;
2653
2654 #ifdef TE_PE
2655 if (*input_line_pointer == '[')
2656 {
2657 /* We are expecting something like the second argument here:
2658 *
2659 * lwz r4,[toc].GS.0.static_int(rtoc)
2660 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2661 * The argument following the `]' must be a symbol name, and the
2662 * register must be the toc register: 'rtoc' or '2'
2663 *
2664 * The effect is to 0 as the displacement field
2665 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2666 * the appropriate variation) reloc against it based on the symbol.
2667 * The linker will build the toc, and insert the resolved toc offset.
2668 *
2669 * Note:
2670 * o The size of the toc entry is currently assumed to be
2671 * 32 bits. This should not be assumed to be a hard coded
2672 * number.
2673 * o In an effort to cope with a change from 32 to 64 bits,
2674 * there are also toc entries that are specified to be
2675 * either 32 or 64 bits:
2676 * lwz r4,[toc32].GS.0.static_int(rtoc)
2677 * lwz r4,[toc64].GS.0.static_int(rtoc)
2678 * These demand toc entries of the specified size, and the
2679 * instruction probably requires it.
2680 */
2681
2682 int valid_toc;
2683 enum toc_size_qualifier toc_kind;
2684 bfd_reloc_code_real_type toc_reloc;
2685
2686 /* Go parse off the [tocXX] part. */
2687 valid_toc = parse_toc_entry (&toc_kind);
2688
2689 if (!valid_toc)
2690 {
2691 ignore_rest_of_line ();
2692 break;
2693 }
2694
2695 /* Now get the symbol following the ']'. */
2696 expression (&ex);
2697
2698 switch (toc_kind)
2699 {
2700 case default_toc:
2701 /* In this case, we may not have seen the symbol yet,
2702 since it is allowed to appear on a .extern or .globl
2703 or just be a label in the .data section. */
2704 toc_reloc = BFD_RELOC_PPC_TOC16;
2705 break;
2706 case data_in_toc:
2707 /* 1. The symbol must be defined and either in the toc
2708 section, or a global.
2709 2. The reloc generated must have the TOCDEFN flag set
2710 in upper bit mess of the reloc type.
2711 FIXME: It's a little confusing what the tocv
2712 qualifier can be used for. At the very least, I've
2713 seen three uses, only one of which I'm sure I can
2714 explain. */
2715 if (ex.X_op == O_symbol)
2716 {
2717 gas_assert (ex.X_add_symbol != NULL);
2718 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2719 != tocdata_section)
2720 {
2721 as_bad (_("[tocv] symbol is not a toc symbol"));
2722 }
2723 }
2724
2725 toc_reloc = BFD_RELOC_PPC_TOC16;
2726 break;
2727 case must_be_32:
2728 /* FIXME: these next two specifically specify 32/64 bit
2729 toc entries. We don't support them today. Is this
2730 the right way to say that? */
2731 toc_reloc = BFD_RELOC_UNUSED;
2732 as_bad (_("unimplemented toc32 expression modifier"));
2733 break;
2734 case must_be_64:
2735 /* FIXME: see above. */
2736 toc_reloc = BFD_RELOC_UNUSED;
2737 as_bad (_("unimplemented toc64 expression modifier"));
2738 break;
2739 default:
2740 fprintf (stderr,
2741 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2742 toc_kind);
2743 abort ();
2744 break;
2745 }
2746
2747 /* We need to generate a fixup for this expression. */
2748 if (fc >= MAX_INSN_FIXUPS)
2749 as_fatal (_("too many fixups"));
2750
2751 fixups[fc].reloc = toc_reloc;
2752 fixups[fc].exp = ex;
2753 fixups[fc].opindex = *opindex_ptr;
2754 ++fc;
2755
2756 /* Ok. We've set up the fixup for the instruction. Now make it
2757 look like the constant 0 was found here. */
2758 ex.X_unsigned = 1;
2759 ex.X_op = O_constant;
2760 ex.X_add_number = 0;
2761 ex.X_add_symbol = NULL;
2762 ex.X_op_symbol = NULL;
2763 }
2764
2765 else
2766 #endif /* TE_PE */
2767 {
2768 if ((reg_names_p
2769 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2770 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2771 || !register_name (&ex))
2772 {
2773 char save_lex = lex_type['%'];
2774
2775 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2776 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2777 {
2778 cr_operand = TRUE;
2779 lex_type['%'] |= LEX_BEGIN_NAME;
2780 }
2781 expression (&ex);
2782 cr_operand = FALSE;
2783 lex_type['%'] = save_lex;
2784 }
2785 }
2786
2787 str = input_line_pointer;
2788 input_line_pointer = hold;
2789
2790 if (ex.X_op == O_illegal)
2791 as_bad (_("illegal operand"));
2792 else if (ex.X_op == O_absent)
2793 as_bad (_("missing operand"));
2794 else if (ex.X_op == O_register)
2795 {
2796 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2797 ppc_cpu, (char *) NULL, 0);
2798 }
2799 else if (ex.X_op == O_constant)
2800 {
2801 #ifdef OBJ_ELF
2802 /* Allow @HA, @L, @H on constants. */
2803 bfd_reloc_code_real_type reloc;
2804 char *orig_str = str;
2805
2806 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2807 switch (reloc)
2808 {
2809 default:
2810 str = orig_str;
2811 break;
2812
2813 case BFD_RELOC_LO16:
2814 /* X_unsigned is the default, so if the user has done
2815 something which cleared it, we always produce a
2816 signed value. */
2817 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2818 ex.X_add_number &= 0xffff;
2819 else
2820 ex.X_add_number = SEX16 (ex.X_add_number);
2821 break;
2822
2823 case BFD_RELOC_HI16:
2824 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2825 ex.X_add_number = PPC_HI (ex.X_add_number);
2826 else
2827 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2828 break;
2829
2830 case BFD_RELOC_HI16_S:
2831 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2832 ex.X_add_number = PPC_HA (ex.X_add_number);
2833 else
2834 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2835 break;
2836
2837 case BFD_RELOC_PPC64_HIGHER:
2838 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2839 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2840 else
2841 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2842 break;
2843
2844 case BFD_RELOC_PPC64_HIGHER_S:
2845 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2846 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2847 else
2848 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2849 break;
2850
2851 case BFD_RELOC_PPC64_HIGHEST:
2852 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2853 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2854 else
2855 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2856 break;
2857
2858 case BFD_RELOC_PPC64_HIGHEST_S:
2859 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2860 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2861 else
2862 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2863 break;
2864 }
2865 #endif /* OBJ_ELF */
2866 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2867 ppc_cpu, (char *) NULL, 0);
2868 }
2869 else
2870 {
2871 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2872 #ifdef OBJ_ELF
2873 if (ex.X_op == O_symbol && str[0] == '(')
2874 {
2875 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2876 if (sym_name[0] == '.')
2877 ++sym_name;
2878
2879 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
2880 {
2881 expressionS tls_exp;
2882
2883 hold = input_line_pointer;
2884 input_line_pointer = str + 1;
2885 expression (&tls_exp);
2886 if (tls_exp.X_op == O_symbol)
2887 {
2888 reloc = BFD_RELOC_UNUSED;
2889 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2890 {
2891 reloc = BFD_RELOC_PPC_TLSGD;
2892 input_line_pointer += 7;
2893 }
2894 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2895 {
2896 reloc = BFD_RELOC_PPC_TLSLD;
2897 input_line_pointer += 7;
2898 }
2899 if (reloc != BFD_RELOC_UNUSED)
2900 {
2901 SKIP_WHITESPACE ();
2902 str = input_line_pointer;
2903
2904 if (fc >= MAX_INSN_FIXUPS)
2905 as_fatal (_("too many fixups"));
2906 fixups[fc].exp = tls_exp;
2907 fixups[fc].opindex = *opindex_ptr;
2908 fixups[fc].reloc = reloc;
2909 ++fc;
2910 }
2911 }
2912 input_line_pointer = hold;
2913 }
2914 }
2915
2916 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2917 {
2918 /* Some TLS tweaks. */
2919 switch (reloc)
2920 {
2921 default:
2922 break;
2923
2924 case BFD_RELOC_PPC_TLS:
2925 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2926 as_bad (_("@tls may not be used with \"%s\" operands"),
2927 opcode->name);
2928 else if (operand->shift != 11)
2929 as_bad (_("@tls may only be used in last operand"));
2930 else
2931 insn = ppc_insert_operand (insn, operand,
2932 ppc_obj64 ? 13 : 2,
2933 ppc_cpu, (char *) NULL, 0);
2934 break;
2935
2936 /* We'll only use the 32 (or 64) bit form of these relocations
2937 in constants. Instructions get the 16 bit form. */
2938 case BFD_RELOC_PPC_DTPREL:
2939 reloc = BFD_RELOC_PPC_DTPREL16;
2940 break;
2941 case BFD_RELOC_PPC_TPREL:
2942 reloc = BFD_RELOC_PPC_TPREL16;
2943 break;
2944 }
2945
2946 /* If VLE-mode convert LO/HI/HA relocations. */
2947 if (opcode->flags & PPC_OPCODE_VLE)
2948 {
2949 int tmp_insn = insn & opcode->mask;
2950
2951 int use_d_reloc = (tmp_insn == E_OR2I_INSN
2952 || tmp_insn == E_AND2I_DOT_INSN
2953 || tmp_insn == E_OR2IS_INSN
2954 || tmp_insn == E_LIS_INSN
2955 || tmp_insn == E_AND2IS_DOT_INSN);
2956
2957
2958 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
2959 || tmp_insn == E_ADD2IS_INSN
2960 || tmp_insn == E_CMP16I_INSN
2961 || tmp_insn == E_MULL2I_INSN
2962 || tmp_insn == E_CMPL16I_INSN
2963 || tmp_insn == E_CMPH16I_INSN
2964 || tmp_insn == E_CMPHL16I_INSN);
2965
2966 switch (reloc)
2967 {
2968 default:
2969 break;
2970
2971 case BFD_RELOC_PPC_EMB_SDA21:
2972 reloc = BFD_RELOC_PPC_VLE_SDA21;
2973 break;
2974
2975 case BFD_RELOC_LO16:
2976 if (use_d_reloc)
2977 reloc = BFD_RELOC_PPC_VLE_LO16D;
2978 else if (use_a_reloc)
2979 reloc = BFD_RELOC_PPC_VLE_LO16A;
2980 break;
2981
2982 case BFD_RELOC_HI16:
2983 if (use_d_reloc)
2984 reloc = BFD_RELOC_PPC_VLE_HI16D;
2985 else if (use_a_reloc)
2986 reloc = BFD_RELOC_PPC_VLE_HI16A;
2987 break;
2988
2989 case BFD_RELOC_HI16_S:
2990 if (use_d_reloc)
2991 reloc = BFD_RELOC_PPC_VLE_HA16D;
2992 else if (use_a_reloc)
2993 reloc = BFD_RELOC_PPC_VLE_HA16A;
2994 break;
2995
2996 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
2997 if (use_d_reloc)
2998 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
2999 break;
3000
3001 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3002 if (use_d_reloc)
3003 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3004 break;
3005
3006 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3007 if (use_d_reloc)
3008 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3009 break;
3010 }
3011 }
3012
3013 /* For the absolute forms of branches, convert the PC
3014 relative form back into the absolute. */
3015 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3016 {
3017 switch (reloc)
3018 {
3019 case BFD_RELOC_PPC_B26:
3020 reloc = BFD_RELOC_PPC_BA26;
3021 break;
3022 case BFD_RELOC_PPC_B16:
3023 reloc = BFD_RELOC_PPC_BA16;
3024 break;
3025 case BFD_RELOC_PPC_B16_BRTAKEN:
3026 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3027 break;
3028 case BFD_RELOC_PPC_B16_BRNTAKEN:
3029 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3030 break;
3031 default:
3032 break;
3033 }
3034 }
3035
3036 switch (reloc)
3037 {
3038 case BFD_RELOC_PPC_TOC16:
3039 toc_reloc_types |= has_small_toc_reloc;
3040 break;
3041 case BFD_RELOC_PPC64_TOC16_LO:
3042 case BFD_RELOC_PPC64_TOC16_HI:
3043 case BFD_RELOC_PPC64_TOC16_HA:
3044 toc_reloc_types |= has_large_toc_reloc;
3045 break;
3046 default:
3047 break;
3048 }
3049
3050 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3051 {
3052 switch (reloc)
3053 {
3054 case BFD_RELOC_16:
3055 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3056 break;
3057 case BFD_RELOC_LO16:
3058 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3059 break;
3060 case BFD_RELOC_16_GOTOFF:
3061 reloc = BFD_RELOC_PPC64_GOT16_DS;
3062 break;
3063 case BFD_RELOC_LO16_GOTOFF:
3064 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3065 break;
3066 case BFD_RELOC_LO16_PLTOFF:
3067 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3068 break;
3069 case BFD_RELOC_16_BASEREL:
3070 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3071 break;
3072 case BFD_RELOC_LO16_BASEREL:
3073 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3074 break;
3075 case BFD_RELOC_PPC_TOC16:
3076 reloc = BFD_RELOC_PPC64_TOC16_DS;
3077 break;
3078 case BFD_RELOC_PPC64_TOC16_LO:
3079 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3080 break;
3081 case BFD_RELOC_PPC64_PLTGOT16:
3082 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3083 break;
3084 case BFD_RELOC_PPC64_PLTGOT16_LO:
3085 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3086 break;
3087 case BFD_RELOC_PPC_DTPREL16:
3088 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3089 break;
3090 case BFD_RELOC_PPC_DTPREL16_LO:
3091 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3092 break;
3093 case BFD_RELOC_PPC_TPREL16:
3094 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3095 break;
3096 case BFD_RELOC_PPC_TPREL16_LO:
3097 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3098 break;
3099 case BFD_RELOC_PPC_GOT_DTPREL16:
3100 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3101 case BFD_RELOC_PPC_GOT_TPREL16:
3102 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3103 break;
3104 default:
3105 as_bad (_("unsupported relocation for DS offset field"));
3106 break;
3107 }
3108 }
3109 }
3110 #endif /* OBJ_ELF */
3111
3112 if (reloc != BFD_RELOC_UNUSED)
3113 ;
3114 /* Determine a BFD reloc value based on the operand information.
3115 We are only prepared to turn a few of the operands into
3116 relocs. */
3117 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3118 && operand->bitm == 0x3fffffc
3119 && operand->shift == 0)
3120 reloc = BFD_RELOC_PPC_B26;
3121 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3122 && operand->bitm == 0xfffc
3123 && operand->shift == 0)
3124 reloc = BFD_RELOC_PPC_B16;
3125 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3126 && operand->bitm == 0x1fe
3127 && operand->shift == -1)
3128 reloc = BFD_RELOC_PPC_VLE_REL8;
3129 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3130 && operand->bitm == 0xfffe
3131 && operand->shift == 0)
3132 reloc = BFD_RELOC_PPC_VLE_REL15;
3133 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3134 && operand->bitm == 0x1fffffe
3135 && operand->shift == 0)
3136 reloc = BFD_RELOC_PPC_VLE_REL24;
3137 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3138 && operand->bitm == 0x3fffffc
3139 && operand->shift == 0)
3140 reloc = BFD_RELOC_PPC_BA26;
3141 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3142 && operand->bitm == 0xfffc
3143 && operand->shift == 0)
3144 reloc = BFD_RELOC_PPC_BA16;
3145 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3146 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3147 && (operand->bitm & 0xfff0) == 0xfff0
3148 && operand->shift == 0)
3149 {
3150 if (ppc_is_toc_sym (ex.X_add_symbol))
3151 {
3152 reloc = BFD_RELOC_PPC_TOC16;
3153 #ifdef OBJ_ELF
3154 if (ppc_obj64
3155 && (operand->flags & PPC_OPERAND_DS) != 0)
3156 reloc = BFD_RELOC_PPC64_TOC16_DS;
3157 #endif
3158 }
3159 else
3160 {
3161 reloc = BFD_RELOC_16;
3162 #ifdef OBJ_ELF
3163 if (ppc_obj64
3164 && (operand->flags & PPC_OPERAND_DS) != 0)
3165 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3166 #endif
3167 }
3168 }
3169 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
3170
3171 /* We need to generate a fixup for this expression. */
3172 if (fc >= MAX_INSN_FIXUPS)
3173 as_fatal (_("too many fixups"));
3174 fixups[fc].exp = ex;
3175 fixups[fc].opindex = *opindex_ptr;
3176 fixups[fc].reloc = reloc;
3177 ++fc;
3178 }
3179
3180 if (need_paren)
3181 {
3182 endc = ')';
3183 need_paren = 0;
3184 /* If expecting more operands, then we want to see "),". */
3185 if (*str == endc && opindex_ptr[1] != 0)
3186 {
3187 do
3188 ++str;
3189 while (ISSPACE (*str));
3190 endc = ',';
3191 }
3192 }
3193 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3194 {
3195 endc = '(';
3196 need_paren = 1;
3197 }
3198 else
3199 endc = ',';
3200
3201 /* The call to expression should have advanced str past any
3202 whitespace. */
3203 if (*str != endc
3204 && (endc != ',' || *str != '\0'))
3205 {
3206 if (*str == '\0')
3207 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3208 else
3209 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3210 break;
3211 }
3212
3213 if (*str != '\0')
3214 ++str;
3215 }
3216
3217 while (ISSPACE (*str))
3218 ++str;
3219
3220 if (*str != '\0')
3221 as_bad (_("junk at end of line: `%s'"), str);
3222
3223 #ifdef OBJ_ELF
3224 /* Do we need/want an APUinfo section? */
3225 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3226 && !ppc_obj64)
3227 {
3228 /* These are all version "1". */
3229 if (opcode->flags & PPC_OPCODE_SPE)
3230 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3231 if (opcode->flags & PPC_OPCODE_ISEL)
3232 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3233 if (opcode->flags & PPC_OPCODE_EFS)
3234 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3235 if (opcode->flags & PPC_OPCODE_BRLOCK)
3236 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3237 if (opcode->flags & PPC_OPCODE_PMR)
3238 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3239 if (opcode->flags & PPC_OPCODE_CACHELCK)
3240 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3241 if (opcode->flags & PPC_OPCODE_RFMCI)
3242 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3243 if (opcode->flags & PPC_OPCODE_VLE)
3244 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3245 }
3246 #endif
3247
3248 /* Write out the instruction. */
3249 /* Differentiate between two and four byte insns. */
3250 if (ppc_mach () == bfd_mach_ppc_vle)
3251 {
3252 if (PPC_OP_SE_VLE (insn))
3253 insn_length = 2;
3254 else
3255 insn_length = 4;
3256 addr_mod = frag_now_fix () & 1;
3257 }
3258 else
3259 {
3260 insn_length = 4;
3261 addr_mod = frag_now_fix () & 3;
3262 }
3263 /* All instructions can start on a 2 byte boundary for VLE. */
3264 f = frag_more (insn_length);
3265 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3266 {
3267 if (ppc_mach() == bfd_mach_ppc_vle)
3268 as_bad (_("instruction address is not a multiple of 2"));
3269 else
3270 as_bad (_("instruction address is not a multiple of 4"));
3271 }
3272 frag_now->insn_addr = addr_mod;
3273 frag_now->has_code = 1;
3274 md_number_to_chars (f, insn, insn_length);
3275
3276 #ifdef OBJ_ELF
3277 dwarf2_emit_insn (insn_length);
3278 #endif
3279
3280 /* Create any fixups. */
3281 for (i = 0; i < fc; i++)
3282 {
3283 fixS *fixP;
3284 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3285 {
3286 reloc_howto_type *reloc_howto;
3287 int size;
3288 int offset;
3289
3290 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3291 if (!reloc_howto)
3292 abort ();
3293
3294 size = bfd_get_reloc_size (reloc_howto);
3295 offset = target_big_endian ? (insn_length - size) : 0;
3296
3297 if (size < 1 || size > 4)
3298 abort ();
3299
3300 fixP = fix_new_exp (frag_now,
3301 f - frag_now->fr_literal + offset,
3302 size,
3303 &fixups[i].exp,
3304 reloc_howto->pc_relative,
3305 fixups[i].reloc);
3306 }
3307 else
3308 {
3309 const struct powerpc_operand *operand;
3310
3311 operand = &powerpc_operands[fixups[i].opindex];
3312 fixP = fix_new_exp (frag_now,
3313 f - frag_now->fr_literal,
3314 insn_length,
3315 &fixups[i].exp,
3316 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3317 BFD_RELOC_UNUSED);
3318 }
3319 fixP->fx_pcrel_adjust = fixups[i].opindex;
3320 }
3321 }
3322
3323 /* Handle a macro. Gather all the operands, transform them as
3324 described by the macro, and call md_assemble recursively. All the
3325 operands are separated by commas; we don't accept parentheses
3326 around operands here. */
3327
3328 static void
3329 ppc_macro (char *str, const struct powerpc_macro *macro)
3330 {
3331 char *operands[10];
3332 unsigned int count;
3333 char *s;
3334 unsigned int len;
3335 const char *format;
3336 unsigned int arg;
3337 char *send;
3338 char *complete;
3339
3340 /* Gather the users operands into the operands array. */
3341 count = 0;
3342 s = str;
3343 while (1)
3344 {
3345 if (count >= sizeof operands / sizeof operands[0])
3346 break;
3347 operands[count++] = s;
3348 s = strchr (s, ',');
3349 if (s == (char *) NULL)
3350 break;
3351 *s++ = '\0';
3352 }
3353
3354 if (count != macro->operands)
3355 {
3356 as_bad (_("wrong number of operands"));
3357 return;
3358 }
3359
3360 /* Work out how large the string must be (the size is unbounded
3361 because it includes user input). */
3362 len = 0;
3363 format = macro->format;
3364 while (*format != '\0')
3365 {
3366 if (*format != '%')
3367 {
3368 ++len;
3369 ++format;
3370 }
3371 else
3372 {
3373 arg = strtol (format + 1, &send, 10);
3374 know (send != format && arg < count);
3375 len += strlen (operands[arg]);
3376 format = send;
3377 }
3378 }
3379
3380 /* Put the string together. */
3381 complete = s = (char *) alloca (len + 1);
3382 format = macro->format;
3383 while (*format != '\0')
3384 {
3385 if (*format != '%')
3386 *s++ = *format++;
3387 else
3388 {
3389 arg = strtol (format + 1, &send, 10);
3390 strcpy (s, operands[arg]);
3391 s += strlen (s);
3392 format = send;
3393 }
3394 }
3395 *s = '\0';
3396
3397 /* Assemble the constructed instruction. */
3398 md_assemble (complete);
3399 }
3400 \f
3401 #ifdef OBJ_ELF
3402 /* For ELF, add support for SHT_ORDERED. */
3403
3404 int
3405 ppc_section_type (char *str, size_t len)
3406 {
3407 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3408 return SHT_ORDERED;
3409
3410 return -1;
3411 }
3412
3413 int
3414 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3415 {
3416 if (type == SHT_ORDERED)
3417 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3418
3419 return flags;
3420 }
3421 #endif /* OBJ_ELF */
3422
3423 \f
3424 /* Pseudo-op handling. */
3425
3426 /* The .byte pseudo-op. This is similar to the normal .byte
3427 pseudo-op, but it can also take a single ASCII string. */
3428
3429 static void
3430 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3431 {
3432 if (*input_line_pointer != '\"')
3433 {
3434 cons (1);
3435 return;
3436 }
3437
3438 /* Gather characters. A real double quote is doubled. Unusual
3439 characters are not permitted. */
3440 ++input_line_pointer;
3441 while (1)
3442 {
3443 char c;
3444
3445 c = *input_line_pointer++;
3446
3447 if (c == '\"')
3448 {
3449 if (*input_line_pointer != '\"')
3450 break;
3451 ++input_line_pointer;
3452 }
3453
3454 FRAG_APPEND_1_CHAR (c);
3455 }
3456
3457 demand_empty_rest_of_line ();
3458 }
3459 \f
3460 #ifdef OBJ_XCOFF
3461
3462 /* XCOFF specific pseudo-op handling. */
3463
3464 /* This is set if we are creating a .stabx symbol, since we don't want
3465 to handle symbol suffixes for such symbols. */
3466 static bfd_boolean ppc_stab_symbol;
3467
3468 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3469 symbols in the .bss segment as though they were local common
3470 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3471 aligns .comm and .lcomm to 4 bytes. */
3472
3473 static void
3474 ppc_comm (int lcomm)
3475 {
3476 asection *current_seg = now_seg;
3477 subsegT current_subseg = now_subseg;
3478 char *name;
3479 char endc;
3480 char *end_name;
3481 offsetT size;
3482 offsetT align;
3483 symbolS *lcomm_sym = NULL;
3484 symbolS *sym;
3485 char *pfrag;
3486
3487 name = input_line_pointer;
3488 endc = get_symbol_end ();
3489 end_name = input_line_pointer;
3490 *end_name = endc;
3491
3492 if (*input_line_pointer != ',')
3493 {
3494 as_bad (_("missing size"));
3495 ignore_rest_of_line ();
3496 return;
3497 }
3498 ++input_line_pointer;
3499
3500 size = get_absolute_expression ();
3501 if (size < 0)
3502 {
3503 as_bad (_("negative size"));
3504 ignore_rest_of_line ();
3505 return;
3506 }
3507
3508 if (! lcomm)
3509 {
3510 /* The third argument to .comm is the alignment. */
3511 if (*input_line_pointer != ',')
3512 align = 2;
3513 else
3514 {
3515 ++input_line_pointer;
3516 align = get_absolute_expression ();
3517 if (align <= 0)
3518 {
3519 as_warn (_("ignoring bad alignment"));
3520 align = 2;
3521 }
3522 }
3523 }
3524 else
3525 {
3526 char *lcomm_name;
3527 char lcomm_endc;
3528
3529 if (size <= 4)
3530 align = 2;
3531 else
3532 align = 3;
3533
3534 /* The third argument to .lcomm appears to be the real local
3535 common symbol to create. References to the symbol named in
3536 the first argument are turned into references to the third
3537 argument. */
3538 if (*input_line_pointer != ',')
3539 {
3540 as_bad (_("missing real symbol name"));
3541 ignore_rest_of_line ();
3542 return;
3543 }
3544 ++input_line_pointer;
3545
3546 lcomm_name = input_line_pointer;
3547 lcomm_endc = get_symbol_end ();
3548
3549 lcomm_sym = symbol_find_or_make (lcomm_name);
3550
3551 *input_line_pointer = lcomm_endc;
3552 }
3553
3554 *end_name = '\0';
3555 sym = symbol_find_or_make (name);
3556 *end_name = endc;
3557
3558 if (S_IS_DEFINED (sym)
3559 || S_GET_VALUE (sym) != 0)
3560 {
3561 as_bad (_("attempt to redefine symbol"));
3562 ignore_rest_of_line ();
3563 return;
3564 }
3565
3566 record_alignment (bss_section, align);
3567
3568 if (! lcomm
3569 || ! S_IS_DEFINED (lcomm_sym))
3570 {
3571 symbolS *def_sym;
3572 offsetT def_size;
3573
3574 if (! lcomm)
3575 {
3576 def_sym = sym;
3577 def_size = size;
3578 S_SET_EXTERNAL (sym);
3579 }
3580 else
3581 {
3582 symbol_get_tc (lcomm_sym)->output = 1;
3583 def_sym = lcomm_sym;
3584 def_size = 0;
3585 }
3586
3587 subseg_set (bss_section, 1);
3588 frag_align (align, 0, 0);
3589
3590 symbol_set_frag (def_sym, frag_now);
3591 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3592 def_size, (char *) NULL);
3593 *pfrag = 0;
3594 S_SET_SEGMENT (def_sym, bss_section);
3595 symbol_get_tc (def_sym)->align = align;
3596 }
3597 else if (lcomm)
3598 {
3599 /* Align the size of lcomm_sym. */
3600 symbol_get_frag (lcomm_sym)->fr_offset =
3601 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3602 &~ ((1 << align) - 1));
3603 if (align > symbol_get_tc (lcomm_sym)->align)
3604 symbol_get_tc (lcomm_sym)->align = align;
3605 }
3606
3607 if (lcomm)
3608 {
3609 /* Make sym an offset from lcomm_sym. */
3610 S_SET_SEGMENT (sym, bss_section);
3611 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3612 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3613 symbol_get_frag (lcomm_sym)->fr_offset += size;
3614 }
3615
3616 subseg_set (current_seg, current_subseg);
3617
3618 demand_empty_rest_of_line ();
3619 }
3620
3621 /* The .csect pseudo-op. This switches us into a different
3622 subsegment. The first argument is a symbol whose value is the
3623 start of the .csect. In COFF, csect symbols get special aux
3624 entries defined by the x_csect field of union internal_auxent. The
3625 optional second argument is the alignment (the default is 2). */
3626
3627 static void
3628 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3629 {
3630 char *name;
3631 char endc;
3632 symbolS *sym;
3633 offsetT align;
3634
3635 name = input_line_pointer;
3636 endc = get_symbol_end ();
3637
3638 sym = symbol_find_or_make (name);
3639
3640 *input_line_pointer = endc;
3641
3642 if (S_GET_NAME (sym)[0] == '\0')
3643 {
3644 /* An unnamed csect is assumed to be [PR]. */
3645 symbol_get_tc (sym)->symbol_class = XMC_PR;
3646 }
3647
3648 align = 2;
3649 if (*input_line_pointer == ',')
3650 {
3651 ++input_line_pointer;
3652 align = get_absolute_expression ();
3653 }
3654
3655 ppc_change_csect (sym, align);
3656
3657 demand_empty_rest_of_line ();
3658 }
3659
3660 /* Change to a different csect. */
3661
3662 static void
3663 ppc_change_csect (symbolS *sym, offsetT align)
3664 {
3665 if (S_IS_DEFINED (sym))
3666 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3667 else
3668 {
3669 symbolS **list_ptr;
3670 int after_toc;
3671 int hold_chunksize;
3672 symbolS *list;
3673 int is_code;
3674 segT sec;
3675
3676 /* This is a new csect. We need to look at the symbol class to
3677 figure out whether it should go in the text section or the
3678 data section. */
3679 after_toc = 0;
3680 is_code = 0;
3681 switch (symbol_get_tc (sym)->symbol_class)
3682 {
3683 case XMC_PR:
3684 case XMC_RO:
3685 case XMC_DB:
3686 case XMC_GL:
3687 case XMC_XO:
3688 case XMC_SV:
3689 case XMC_TI:
3690 case XMC_TB:
3691 S_SET_SEGMENT (sym, text_section);
3692 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3693 ++ppc_text_subsegment;
3694 list_ptr = &ppc_text_csects;
3695 is_code = 1;
3696 break;
3697 case XMC_RW:
3698 case XMC_TC0:
3699 case XMC_TC:
3700 case XMC_DS:
3701 case XMC_UA:
3702 case XMC_BS:
3703 case XMC_UC:
3704 if (ppc_toc_csect != NULL
3705 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3706 == ppc_data_subsegment))
3707 after_toc = 1;
3708 S_SET_SEGMENT (sym, data_section);
3709 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3710 ++ppc_data_subsegment;
3711 list_ptr = &ppc_data_csects;
3712 break;
3713 default:
3714 abort ();
3715 }
3716
3717 /* We set the obstack chunk size to a small value before
3718 changing subsegments, so that we don't use a lot of memory
3719 space for what may be a small section. */
3720 hold_chunksize = chunksize;
3721 chunksize = 64;
3722
3723 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3724 symbol_get_tc (sym)->subseg);
3725
3726 chunksize = hold_chunksize;
3727
3728 if (after_toc)
3729 ppc_after_toc_frag = frag_now;
3730
3731 record_alignment (sec, align);
3732 if (is_code)
3733 frag_align_code (align, 0);
3734 else
3735 frag_align (align, 0, 0);
3736
3737 symbol_set_frag (sym, frag_now);
3738 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3739
3740 symbol_get_tc (sym)->align = align;
3741 symbol_get_tc (sym)->output = 1;
3742 symbol_get_tc (sym)->within = sym;
3743
3744 for (list = *list_ptr;
3745 symbol_get_tc (list)->next != (symbolS *) NULL;
3746 list = symbol_get_tc (list)->next)
3747 ;
3748 symbol_get_tc (list)->next = sym;
3749
3750 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3751 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3752 &symbol_lastP);
3753 }
3754
3755 ppc_current_csect = sym;
3756 }
3757
3758 static void
3759 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3760 {
3761 segT sec;
3762 flagword oldflags;
3763 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3764
3765 sec = subseg_new (dw->name, subseg);
3766 oldflags = bfd_get_section_flags (stdoutput, sec);
3767 if (oldflags == SEC_NO_FLAGS)
3768 {
3769 /* Just created section. */
3770 gas_assert (dw_sections[idx].sect == NULL);
3771
3772 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3773 bfd_set_section_alignment (stdoutput, sec, 0);
3774 dw_sections[idx].sect = sec;
3775 }
3776
3777 /* Not anymore in a csect. */
3778 ppc_current_csect = NULL;
3779 }
3780
3781 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3782 .dwsect flag [, opt-label ]
3783 */
3784
3785 static void
3786 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3787 {
3788 offsetT flag;
3789 symbolS *opt_label;
3790 const struct xcoff_dwsect_name *dw;
3791 struct dw_subsection *subseg;
3792 struct dw_section *dws;
3793 int i;
3794
3795 /* Find section. */
3796 flag = get_absolute_expression ();
3797 dw = NULL;
3798 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3799 if (xcoff_dwsect_names[i].flag == flag)
3800 {
3801 dw = &xcoff_dwsect_names[i];
3802 break;
3803 }
3804
3805 /* Parse opt-label. */
3806 if (*input_line_pointer == ',')
3807 {
3808 const char *label;
3809 char c;
3810
3811 ++input_line_pointer;
3812
3813 label = input_line_pointer;
3814 c = get_symbol_end ();
3815 opt_label = symbol_find_or_make (label);
3816 *input_line_pointer = c;
3817 }
3818 else
3819 opt_label = NULL;
3820
3821 demand_empty_rest_of_line ();
3822
3823 /* Return now in case of unknown subsection. */
3824 if (dw == NULL)
3825 {
3826 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3827 (unsigned)flag);
3828 return;
3829 }
3830
3831 /* Find the subsection. */
3832 dws = &dw_sections[i];
3833 subseg = NULL;
3834 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3835 {
3836 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3837 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3838 {
3839 as_bad (_("label %s was not defined in this dwarf section"),
3840 S_GET_NAME (opt_label));
3841 subseg = dws->anon_subseg;
3842 opt_label = NULL;
3843 }
3844 else
3845 subseg = symbol_get_tc (opt_label)->u.dw;
3846 }
3847
3848 if (subseg != NULL)
3849 {
3850 /* Switch to the subsection. */
3851 ppc_change_debug_section (i, subseg->subseg);
3852 }
3853 else
3854 {
3855 /* Create a new dw subsection. */
3856 subseg = (struct dw_subsection *)
3857 xmalloc (sizeof (struct dw_subsection));
3858
3859 if (opt_label == NULL)
3860 {
3861 /* The anonymous one. */
3862 subseg->subseg = 0;
3863 subseg->link = NULL;
3864 dws->anon_subseg = subseg;
3865 }
3866 else
3867 {
3868 /* A named one. */
3869 if (dws->list_subseg != NULL)
3870 subseg->subseg = dws->list_subseg->subseg + 1;
3871 else
3872 subseg->subseg = 1;
3873
3874 subseg->link = dws->list_subseg;
3875 dws->list_subseg = subseg;
3876 symbol_get_tc (opt_label)->u.dw = subseg;
3877 }
3878
3879 ppc_change_debug_section (i, subseg->subseg);
3880
3881 if (dw->def_size)
3882 {
3883 /* Add the length field. */
3884 expressionS *exp = &subseg->end_exp;
3885 int sz;
3886
3887 if (opt_label != NULL)
3888 symbol_set_value_now (opt_label);
3889
3890 /* Add the length field. Note that according to the AIX assembler
3891 manual, the size of the length field is 4 for powerpc32 but
3892 12 for powerpc64. */
3893 if (ppc_obj64)
3894 {
3895 /* Write the 64bit marker. */
3896 md_number_to_chars (frag_more (4), -1, 4);
3897 }
3898
3899 exp->X_op = O_subtract;
3900 exp->X_op_symbol = symbol_temp_new_now ();
3901 exp->X_add_symbol = symbol_temp_make ();
3902
3903 sz = ppc_obj64 ? 8 : 4;
3904 exp->X_add_number = -sz;
3905 emit_expr (exp, sz);
3906 }
3907 }
3908 }
3909
3910 /* This function handles the .text and .data pseudo-ops. These
3911 pseudo-ops aren't really used by XCOFF; we implement them for the
3912 convenience of people who aren't used to XCOFF. */
3913
3914 static void
3915 ppc_section (int type)
3916 {
3917 const char *name;
3918 symbolS *sym;
3919
3920 if (type == 't')
3921 name = ".text[PR]";
3922 else if (type == 'd')
3923 name = ".data[RW]";
3924 else
3925 abort ();
3926
3927 sym = symbol_find_or_make (name);
3928
3929 ppc_change_csect (sym, 2);
3930
3931 demand_empty_rest_of_line ();
3932 }
3933
3934 /* This function handles the .section pseudo-op. This is mostly to
3935 give an error, since XCOFF only supports .text, .data and .bss, but
3936 we do permit the user to name the text or data section. */
3937
3938 static void
3939 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3940 {
3941 char *user_name;
3942 const char *real_name;
3943 char c;
3944 symbolS *sym;
3945
3946 user_name = input_line_pointer;
3947 c = get_symbol_end ();
3948
3949 if (strcmp (user_name, ".text") == 0)
3950 real_name = ".text[PR]";
3951 else if (strcmp (user_name, ".data") == 0)
3952 real_name = ".data[RW]";
3953 else
3954 {
3955 as_bad (_("the XCOFF file format does not support arbitrary sections"));
3956 *input_line_pointer = c;
3957 ignore_rest_of_line ();
3958 return;
3959 }
3960
3961 *input_line_pointer = c;
3962
3963 sym = symbol_find_or_make (real_name);
3964
3965 ppc_change_csect (sym, 2);
3966
3967 demand_empty_rest_of_line ();
3968 }
3969
3970 /* The .extern pseudo-op. We create an undefined symbol. */
3971
3972 static void
3973 ppc_extern (int ignore ATTRIBUTE_UNUSED)
3974 {
3975 char *name;
3976 char endc;
3977
3978 name = input_line_pointer;
3979 endc = get_symbol_end ();
3980
3981 (void) symbol_find_or_make (name);
3982
3983 *input_line_pointer = endc;
3984
3985 demand_empty_rest_of_line ();
3986 }
3987
3988 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3989
3990 static void
3991 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
3992 {
3993 char *name;
3994 char endc;
3995 symbolS *sym;
3996
3997 name = input_line_pointer;
3998 endc = get_symbol_end ();
3999
4000 sym = symbol_find_or_make (name);
4001
4002 *input_line_pointer = endc;
4003
4004 symbol_get_tc (sym)->output = 1;
4005
4006 demand_empty_rest_of_line ();
4007 }
4008
4009 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4010 relocations at the beginning of the current csect.
4011
4012 (In principle, there's no reason why the relocations _have_ to be at
4013 the beginning. Anywhere in the csect would do. However, inserting
4014 at the beginning is what the native assmebler does, and it helps to
4015 deal with cases where the .ref statements follow the section contents.)
4016
4017 ??? .refs don't work for empty .csects. However, the native assembler
4018 doesn't report an error in this case, and neither yet do we. */
4019
4020 static void
4021 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4022 {
4023 char *name;
4024 char c;
4025
4026 if (ppc_current_csect == NULL)
4027 {
4028 as_bad (_(".ref outside .csect"));
4029 ignore_rest_of_line ();
4030 return;
4031 }
4032
4033 do
4034 {
4035 name = input_line_pointer;
4036 c = get_symbol_end ();
4037
4038 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4039 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4040
4041 *input_line_pointer = c;
4042 SKIP_WHITESPACE ();
4043 c = *input_line_pointer;
4044 if (c == ',')
4045 {
4046 input_line_pointer++;
4047 SKIP_WHITESPACE ();
4048 if (is_end_of_line[(unsigned char) *input_line_pointer])
4049 {
4050 as_bad (_("missing symbol name"));
4051 ignore_rest_of_line ();
4052 return;
4053 }
4054 }
4055 }
4056 while (c == ',');
4057
4058 demand_empty_rest_of_line ();
4059 }
4060
4061 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4062 although I don't know why it bothers. */
4063
4064 static void
4065 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4066 {
4067 char *name;
4068 char endc;
4069 symbolS *sym;
4070 int len;
4071
4072 name = input_line_pointer;
4073 endc = get_symbol_end ();
4074
4075 sym = symbol_find_or_make (name);
4076
4077 *input_line_pointer = endc;
4078
4079 if (*input_line_pointer != ',')
4080 {
4081 as_bad (_("missing rename string"));
4082 ignore_rest_of_line ();
4083 return;
4084 }
4085 ++input_line_pointer;
4086
4087 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4088
4089 demand_empty_rest_of_line ();
4090 }
4091
4092 /* The .stabx pseudo-op. This is similar to a normal .stabs
4093 pseudo-op, but slightly different. A sample is
4094 .stabx "main:F-1",.main,142,0
4095 The first argument is the symbol name to create. The second is the
4096 value, and the third is the storage class. The fourth seems to be
4097 always zero, and I am assuming it is the type. */
4098
4099 static void
4100 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4101 {
4102 char *name;
4103 int len;
4104 symbolS *sym;
4105 expressionS exp;
4106
4107 name = demand_copy_C_string (&len);
4108
4109 if (*input_line_pointer != ',')
4110 {
4111 as_bad (_("missing value"));
4112 return;
4113 }
4114 ++input_line_pointer;
4115
4116 ppc_stab_symbol = TRUE;
4117 sym = symbol_make (name);
4118 ppc_stab_symbol = FALSE;
4119
4120 symbol_get_tc (sym)->real_name = name;
4121
4122 (void) expression (&exp);
4123
4124 switch (exp.X_op)
4125 {
4126 case O_illegal:
4127 case O_absent:
4128 case O_big:
4129 as_bad (_("illegal .stabx expression; zero assumed"));
4130 exp.X_add_number = 0;
4131 /* Fall through. */
4132 case O_constant:
4133 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4134 symbol_set_frag (sym, &zero_address_frag);
4135 break;
4136
4137 case O_symbol:
4138 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4139 symbol_set_value_expression (sym, &exp);
4140 else
4141 {
4142 S_SET_VALUE (sym,
4143 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4144 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4145 }
4146 break;
4147
4148 default:
4149 /* The value is some complex expression. This will probably
4150 fail at some later point, but this is probably the right
4151 thing to do here. */
4152 symbol_set_value_expression (sym, &exp);
4153 break;
4154 }
4155
4156 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4157 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4158
4159 if (*input_line_pointer != ',')
4160 {
4161 as_bad (_("missing class"));
4162 return;
4163 }
4164 ++input_line_pointer;
4165
4166 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4167
4168 if (*input_line_pointer != ',')
4169 {
4170 as_bad (_("missing type"));
4171 return;
4172 }
4173 ++input_line_pointer;
4174
4175 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4176
4177 symbol_get_tc (sym)->output = 1;
4178
4179 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4180 {
4181 /* In this case :
4182
4183 .bs name
4184 .stabx "z",arrays_,133,0
4185 .es
4186
4187 .comm arrays_,13768,3
4188
4189 resolve_symbol_value will copy the exp's "within" into sym's when the
4190 offset is 0. Since this seems to be corner case problem,
4191 only do the correction for storage class C_STSYM. A better solution
4192 would be to have the tc field updated in ppc_symbol_new_hook. */
4193
4194 if (exp.X_op == O_symbol)
4195 {
4196 if (ppc_current_block == NULL)
4197 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4198
4199 symbol_get_tc (sym)->within = ppc_current_block;
4200 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4201 }
4202 }
4203
4204 if (exp.X_op != O_symbol
4205 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4206 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4207 ppc_frob_label (sym);
4208 else
4209 {
4210 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4211 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4212 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4213 symbol_get_tc (ppc_current_csect)->within = sym;
4214 }
4215
4216 demand_empty_rest_of_line ();
4217 }
4218
4219 /* The .function pseudo-op. This takes several arguments. The first
4220 argument seems to be the external name of the symbol. The second
4221 argument seems to be the label for the start of the function. gcc
4222 uses the same name for both. I have no idea what the third and
4223 fourth arguments are meant to be. The optional fifth argument is
4224 an expression for the size of the function. In COFF this symbol
4225 gets an aux entry like that used for a csect. */
4226
4227 static void
4228 ppc_function (int ignore ATTRIBUTE_UNUSED)
4229 {
4230 char *name;
4231 char endc;
4232 char *s;
4233 symbolS *ext_sym;
4234 symbolS *lab_sym;
4235
4236 name = input_line_pointer;
4237 endc = get_symbol_end ();
4238
4239 /* Ignore any [PR] suffix. */
4240 name = ppc_canonicalize_symbol_name (name);
4241 s = strchr (name, '[');
4242 if (s != (char *) NULL
4243 && strcmp (s + 1, "PR]") == 0)
4244 *s = '\0';
4245
4246 ext_sym = symbol_find_or_make (name);
4247
4248 *input_line_pointer = endc;
4249
4250 if (*input_line_pointer != ',')
4251 {
4252 as_bad (_("missing symbol name"));
4253 ignore_rest_of_line ();
4254 return;
4255 }
4256 ++input_line_pointer;
4257
4258 name = input_line_pointer;
4259 endc = get_symbol_end ();
4260
4261 lab_sym = symbol_find_or_make (name);
4262
4263 *input_line_pointer = endc;
4264
4265 if (ext_sym != lab_sym)
4266 {
4267 expressionS exp;
4268
4269 exp.X_op = O_symbol;
4270 exp.X_add_symbol = lab_sym;
4271 exp.X_op_symbol = NULL;
4272 exp.X_add_number = 0;
4273 exp.X_unsigned = 0;
4274 symbol_set_value_expression (ext_sym, &exp);
4275 }
4276
4277 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4278 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4279 symbol_get_tc (ext_sym)->output = 1;
4280
4281 if (*input_line_pointer == ',')
4282 {
4283 expressionS exp;
4284
4285 /* Ignore the third argument. */
4286 ++input_line_pointer;
4287 expression (& exp);
4288 if (*input_line_pointer == ',')
4289 {
4290 /* Ignore the fourth argument. */
4291 ++input_line_pointer;
4292 expression (& exp);
4293 if (*input_line_pointer == ',')
4294 {
4295 /* The fifth argument is the function size. */
4296 ++input_line_pointer;
4297 symbol_get_tc (ext_sym)->u.size = symbol_new
4298 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4299 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4300 }
4301 }
4302 }
4303
4304 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4305 SF_SET_FUNCTION (ext_sym);
4306 SF_SET_PROCESS (ext_sym);
4307 coff_add_linesym (ext_sym);
4308
4309 demand_empty_rest_of_line ();
4310 }
4311
4312 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4313 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4314 with the correct line number */
4315
4316 static symbolS *saved_bi_sym = 0;
4317
4318 static void
4319 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4320 {
4321 symbolS *sym;
4322
4323 sym = symbol_make (".bf");
4324 S_SET_SEGMENT (sym, text_section);
4325 symbol_set_frag (sym, frag_now);
4326 S_SET_VALUE (sym, frag_now_fix ());
4327 S_SET_STORAGE_CLASS (sym, C_FCN);
4328
4329 coff_line_base = get_absolute_expression ();
4330
4331 S_SET_NUMBER_AUXILIARY (sym, 1);
4332 SA_SET_SYM_LNNO (sym, coff_line_base);
4333
4334 /* Line number for bi. */
4335 if (saved_bi_sym)
4336 {
4337 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4338 saved_bi_sym = 0;
4339 }
4340
4341
4342 symbol_get_tc (sym)->output = 1;
4343
4344 ppc_frob_label (sym);
4345
4346 demand_empty_rest_of_line ();
4347 }
4348
4349 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4350 ".ef", except that the line number is absolute, not relative to the
4351 most recent ".bf" symbol. */
4352
4353 static void
4354 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4355 {
4356 symbolS *sym;
4357
4358 sym = symbol_make (".ef");
4359 S_SET_SEGMENT (sym, text_section);
4360 symbol_set_frag (sym, frag_now);
4361 S_SET_VALUE (sym, frag_now_fix ());
4362 S_SET_STORAGE_CLASS (sym, C_FCN);
4363 S_SET_NUMBER_AUXILIARY (sym, 1);
4364 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4365 symbol_get_tc (sym)->output = 1;
4366
4367 ppc_frob_label (sym);
4368
4369 demand_empty_rest_of_line ();
4370 }
4371
4372 /* The .bi and .ei pseudo-ops. These take a string argument and
4373 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4374 the symbol list. The value of .bi will be know when the next .bf
4375 is encountered. */
4376
4377 static void
4378 ppc_biei (int ei)
4379 {
4380 static symbolS *last_biei;
4381
4382 char *name;
4383 int len;
4384 symbolS *sym;
4385 symbolS *look;
4386
4387 name = demand_copy_C_string (&len);
4388
4389 /* The value of these symbols is actually file offset. Here we set
4390 the value to the index into the line number entries. In
4391 ppc_frob_symbols we set the fix_line field, which will cause BFD
4392 to do the right thing. */
4393
4394 sym = symbol_make (name);
4395 /* obj-coff.c currently only handles line numbers correctly in the
4396 .text section. */
4397 S_SET_SEGMENT (sym, text_section);
4398 S_SET_VALUE (sym, coff_n_line_nos);
4399 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4400
4401 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4402 symbol_get_tc (sym)->output = 1;
4403
4404 /* Save bi. */
4405 if (ei)
4406 saved_bi_sym = 0;
4407 else
4408 saved_bi_sym = sym;
4409
4410 for (look = last_biei ? last_biei : symbol_rootP;
4411 (look != (symbolS *) NULL
4412 && (S_GET_STORAGE_CLASS (look) == C_FILE
4413 || S_GET_STORAGE_CLASS (look) == C_BINCL
4414 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4415 look = symbol_next (look))
4416 ;
4417 if (look != (symbolS *) NULL)
4418 {
4419 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4420 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4421 last_biei = sym;
4422 }
4423
4424 demand_empty_rest_of_line ();
4425 }
4426
4427 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4428 There is one argument, which is a csect symbol. The value of the
4429 .bs symbol is the index of this csect symbol. */
4430
4431 static void
4432 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4433 {
4434 char *name;
4435 char endc;
4436 symbolS *csect;
4437 symbolS *sym;
4438
4439 if (ppc_current_block != NULL)
4440 as_bad (_("nested .bs blocks"));
4441
4442 name = input_line_pointer;
4443 endc = get_symbol_end ();
4444
4445 csect = symbol_find_or_make (name);
4446
4447 *input_line_pointer = endc;
4448
4449 sym = symbol_make (".bs");
4450 S_SET_SEGMENT (sym, now_seg);
4451 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4452 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4453 symbol_get_tc (sym)->output = 1;
4454
4455 symbol_get_tc (sym)->within = csect;
4456
4457 ppc_frob_label (sym);
4458
4459 ppc_current_block = sym;
4460
4461 demand_empty_rest_of_line ();
4462 }
4463
4464 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4465
4466 static void
4467 ppc_es (int ignore ATTRIBUTE_UNUSED)
4468 {
4469 symbolS *sym;
4470
4471 if (ppc_current_block == NULL)
4472 as_bad (_(".es without preceding .bs"));
4473
4474 sym = symbol_make (".es");
4475 S_SET_SEGMENT (sym, now_seg);
4476 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4477 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4478 symbol_get_tc (sym)->output = 1;
4479
4480 ppc_frob_label (sym);
4481
4482 ppc_current_block = NULL;
4483
4484 demand_empty_rest_of_line ();
4485 }
4486
4487 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4488 line number. */
4489
4490 static void
4491 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4492 {
4493 symbolS *sym;
4494
4495 sym = symbol_make (".bb");
4496 S_SET_SEGMENT (sym, text_section);
4497 symbol_set_frag (sym, frag_now);
4498 S_SET_VALUE (sym, frag_now_fix ());
4499 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4500
4501 S_SET_NUMBER_AUXILIARY (sym, 1);
4502 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4503
4504 symbol_get_tc (sym)->output = 1;
4505
4506 SF_SET_PROCESS (sym);
4507
4508 ppc_frob_label (sym);
4509
4510 demand_empty_rest_of_line ();
4511 }
4512
4513 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4514 line number. */
4515
4516 static void
4517 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4518 {
4519 symbolS *sym;
4520
4521 sym = symbol_make (".eb");
4522 S_SET_SEGMENT (sym, text_section);
4523 symbol_set_frag (sym, frag_now);
4524 S_SET_VALUE (sym, frag_now_fix ());
4525 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4526 S_SET_NUMBER_AUXILIARY (sym, 1);
4527 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4528 symbol_get_tc (sym)->output = 1;
4529
4530 SF_SET_PROCESS (sym);
4531
4532 ppc_frob_label (sym);
4533
4534 demand_empty_rest_of_line ();
4535 }
4536
4537 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4538 specified name. */
4539
4540 static void
4541 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4542 {
4543 char *name;
4544 int len;
4545 symbolS *sym;
4546
4547 name = demand_copy_C_string (&len);
4548 sym = symbol_make (name);
4549 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4550 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4551 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4552 S_SET_VALUE (sym, 0);
4553 symbol_get_tc (sym)->output = 1;
4554
4555 ppc_frob_label (sym);
4556
4557 demand_empty_rest_of_line ();
4558 }
4559
4560 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4561
4562 static void
4563 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4564 {
4565 symbolS *sym;
4566
4567 sym = symbol_make (".ec");
4568 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4569 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4570 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4571 S_SET_VALUE (sym, 0);
4572 symbol_get_tc (sym)->output = 1;
4573
4574 ppc_frob_label (sym);
4575
4576 demand_empty_rest_of_line ();
4577 }
4578
4579 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4580
4581 static void
4582 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4583 {
4584 if (ppc_toc_csect != (symbolS *) NULL)
4585 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4586 else
4587 {
4588 subsegT subseg;
4589 symbolS *sym;
4590 symbolS *list;
4591
4592 subseg = ppc_data_subsegment;
4593 ++ppc_data_subsegment;
4594
4595 subseg_new (segment_name (data_section), subseg);
4596 ppc_toc_frag = frag_now;
4597
4598 sym = symbol_find_or_make ("TOC[TC0]");
4599 symbol_set_frag (sym, frag_now);
4600 S_SET_SEGMENT (sym, data_section);
4601 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4602 symbol_get_tc (sym)->subseg = subseg;
4603 symbol_get_tc (sym)->output = 1;
4604 symbol_get_tc (sym)->within = sym;
4605
4606 ppc_toc_csect = sym;
4607
4608 for (list = ppc_data_csects;
4609 symbol_get_tc (list)->next != (symbolS *) NULL;
4610 list = symbol_get_tc (list)->next)
4611 ;
4612 symbol_get_tc (list)->next = sym;
4613
4614 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4615 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4616 &symbol_lastP);
4617 }
4618
4619 ppc_current_csect = ppc_toc_csect;
4620
4621 demand_empty_rest_of_line ();
4622 }
4623
4624 /* The AIX assembler automatically aligns the operands of a .long or
4625 .short pseudo-op, and we want to be compatible. */
4626
4627 static void
4628 ppc_xcoff_cons (int log_size)
4629 {
4630 frag_align (log_size, 0, 0);
4631 record_alignment (now_seg, log_size);
4632 cons (1 << log_size);
4633 }
4634
4635 static void
4636 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4637 {
4638 expressionS exp;
4639 int byte_count;
4640
4641 (void) expression (&exp);
4642
4643 if (exp.X_op != O_constant)
4644 {
4645 as_bad (_("non-constant byte count"));
4646 return;
4647 }
4648
4649 byte_count = exp.X_add_number;
4650
4651 if (*input_line_pointer != ',')
4652 {
4653 as_bad (_("missing value"));
4654 return;
4655 }
4656
4657 ++input_line_pointer;
4658 cons (byte_count);
4659 }
4660
4661 void
4662 ppc_xcoff_end (void)
4663 {
4664 int i;
4665
4666 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4667 {
4668 struct dw_section *dws = &dw_sections[i];
4669 struct dw_subsection *dwss;
4670
4671 if (dws->anon_subseg)
4672 {
4673 dwss = dws->anon_subseg;
4674 dwss->link = dws->list_subseg;
4675 }
4676 else
4677 dwss = dws->list_subseg;
4678
4679 for (; dwss != NULL; dwss = dwss->link)
4680 if (dwss->end_exp.X_add_symbol != NULL)
4681 {
4682 subseg_set (dws->sect, dwss->subseg);
4683 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4684 }
4685 }
4686 }
4687
4688 #endif /* OBJ_XCOFF */
4689 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4690 \f
4691 /* The .tc pseudo-op. This is used when generating either XCOFF or
4692 ELF. This takes two or more arguments.
4693
4694 When generating XCOFF output, the first argument is the name to
4695 give to this location in the toc; this will be a symbol with class
4696 TC. The rest of the arguments are N-byte values to actually put at
4697 this location in the TOC; often there is just one more argument, a
4698 relocatable symbol reference. The size of the value to store
4699 depends on target word size. A 32-bit target uses 4-byte values, a
4700 64-bit target uses 8-byte values.
4701
4702 When not generating XCOFF output, the arguments are the same, but
4703 the first argument is simply ignored. */
4704
4705 static void
4706 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4707 {
4708 #ifdef OBJ_XCOFF
4709
4710 /* Define the TOC symbol name. */
4711 {
4712 char *name;
4713 char endc;
4714 symbolS *sym;
4715
4716 if (ppc_toc_csect == (symbolS *) NULL
4717 || ppc_toc_csect != ppc_current_csect)
4718 {
4719 as_bad (_(".tc not in .toc section"));
4720 ignore_rest_of_line ();
4721 return;
4722 }
4723
4724 name = input_line_pointer;
4725 endc = get_symbol_end ();
4726
4727 sym = symbol_find_or_make (name);
4728
4729 *input_line_pointer = endc;
4730
4731 if (S_IS_DEFINED (sym))
4732 {
4733 symbolS *label;
4734
4735 label = symbol_get_tc (ppc_current_csect)->within;
4736 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4737 {
4738 as_bad (_(".tc with no label"));
4739 ignore_rest_of_line ();
4740 return;
4741 }
4742
4743 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4744 symbol_set_frag (label, symbol_get_frag (sym));
4745 S_SET_VALUE (label, S_GET_VALUE (sym));
4746
4747 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4748 ++input_line_pointer;
4749
4750 return;
4751 }
4752
4753 S_SET_SEGMENT (sym, now_seg);
4754 symbol_set_frag (sym, frag_now);
4755 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4756 symbol_get_tc (sym)->symbol_class = XMC_TC;
4757 symbol_get_tc (sym)->output = 1;
4758
4759 ppc_frob_label (sym);
4760 }
4761
4762 #endif /* OBJ_XCOFF */
4763 #ifdef OBJ_ELF
4764 int align;
4765
4766 /* Skip the TOC symbol name. */
4767 while (is_part_of_name (*input_line_pointer)
4768 || *input_line_pointer == ' '
4769 || *input_line_pointer == '['
4770 || *input_line_pointer == ']'
4771 || *input_line_pointer == '{'
4772 || *input_line_pointer == '}')
4773 ++input_line_pointer;
4774
4775 /* Align to a four/eight byte boundary. */
4776 align = ppc_obj64 ? 3 : 2;
4777 frag_align (align, 0, 0);
4778 record_alignment (now_seg, align);
4779 #endif /* OBJ_ELF */
4780
4781 if (*input_line_pointer != ',')
4782 demand_empty_rest_of_line ();
4783 else
4784 {
4785 ++input_line_pointer;
4786 cons (ppc_obj64 ? 8 : 4);
4787 }
4788 }
4789
4790 /* Pseudo-op .machine. */
4791
4792 static void
4793 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4794 {
4795 char *cpu_string;
4796 #define MAX_HISTORY 100
4797 static ppc_cpu_t *cpu_history;
4798 static int curr_hist;
4799
4800 SKIP_WHITESPACE ();
4801
4802 if (*input_line_pointer == '"')
4803 {
4804 int len;
4805 cpu_string = demand_copy_C_string (&len);
4806 }
4807 else
4808 {
4809 char c;
4810 cpu_string = input_line_pointer;
4811 c = get_symbol_end ();
4812 cpu_string = xstrdup (cpu_string);
4813 *input_line_pointer = c;
4814 }
4815
4816 if (cpu_string != NULL)
4817 {
4818 ppc_cpu_t old_cpu = ppc_cpu;
4819 ppc_cpu_t new_cpu;
4820 char *p;
4821
4822 for (p = cpu_string; *p != 0; p++)
4823 *p = TOLOWER (*p);
4824
4825 if (strcmp (cpu_string, "push") == 0)
4826 {
4827 if (cpu_history == NULL)
4828 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4829
4830 if (curr_hist >= MAX_HISTORY)
4831 as_bad (_(".machine stack overflow"));
4832 else
4833 cpu_history[curr_hist++] = ppc_cpu;
4834 }
4835 else if (strcmp (cpu_string, "pop") == 0)
4836 {
4837 if (curr_hist <= 0)
4838 as_bad (_(".machine stack underflow"));
4839 else
4840 ppc_cpu = cpu_history[--curr_hist];
4841 }
4842 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4843 ppc_cpu = new_cpu;
4844 else
4845 as_bad (_("invalid machine `%s'"), cpu_string);
4846
4847 if (ppc_cpu != old_cpu)
4848 ppc_setup_opcodes ();
4849 }
4850
4851 demand_empty_rest_of_line ();
4852 }
4853 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4854 \f
4855 #ifdef TE_PE
4856
4857 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4858
4859 /* Set the current section. */
4860 static void
4861 ppc_set_current_section (segT new)
4862 {
4863 ppc_previous_section = ppc_current_section;
4864 ppc_current_section = new;
4865 }
4866
4867 /* pseudo-op: .previous
4868 behaviour: toggles the current section with the previous section.
4869 errors: None
4870 warnings: "No previous section" */
4871
4872 static void
4873 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4874 {
4875 if (ppc_previous_section == NULL)
4876 {
4877 as_warn (_("no previous section to return to, ignored."));
4878 return;
4879 }
4880
4881 subseg_set (ppc_previous_section, 0);
4882
4883 ppc_set_current_section (ppc_previous_section);
4884 }
4885
4886 /* pseudo-op: .pdata
4887 behaviour: predefined read only data section
4888 double word aligned
4889 errors: None
4890 warnings: None
4891 initial: .section .pdata "adr3"
4892 a - don't know -- maybe a misprint
4893 d - initialized data
4894 r - readable
4895 3 - double word aligned (that would be 4 byte boundary)
4896
4897 commentary:
4898 Tag index tables (also known as the function table) for exception
4899 handling, debugging, etc. */
4900
4901 static void
4902 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4903 {
4904 if (pdata_section == 0)
4905 {
4906 pdata_section = subseg_new (".pdata", 0);
4907
4908 bfd_set_section_flags (stdoutput, pdata_section,
4909 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4910 | SEC_READONLY | SEC_DATA ));
4911
4912 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4913 }
4914 else
4915 {
4916 pdata_section = subseg_new (".pdata", 0);
4917 }
4918 ppc_set_current_section (pdata_section);
4919 }
4920
4921 /* pseudo-op: .ydata
4922 behaviour: predefined read only data section
4923 double word aligned
4924 errors: None
4925 warnings: None
4926 initial: .section .ydata "drw3"
4927 a - don't know -- maybe a misprint
4928 d - initialized data
4929 r - readable
4930 3 - double word aligned (that would be 4 byte boundary)
4931 commentary:
4932 Tag tables (also known as the scope table) for exception handling,
4933 debugging, etc. */
4934
4935 static void
4936 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4937 {
4938 if (ydata_section == 0)
4939 {
4940 ydata_section = subseg_new (".ydata", 0);
4941 bfd_set_section_flags (stdoutput, ydata_section,
4942 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4943 | SEC_READONLY | SEC_DATA ));
4944
4945 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4946 }
4947 else
4948 {
4949 ydata_section = subseg_new (".ydata", 0);
4950 }
4951 ppc_set_current_section (ydata_section);
4952 }
4953
4954 /* pseudo-op: .reldata
4955 behaviour: predefined read write data section
4956 double word aligned (4-byte)
4957 FIXME: relocation is applied to it
4958 FIXME: what's the difference between this and .data?
4959 errors: None
4960 warnings: None
4961 initial: .section .reldata "drw3"
4962 d - initialized data
4963 r - readable
4964 w - writeable
4965 3 - double word aligned (that would be 8 byte boundary)
4966
4967 commentary:
4968 Like .data, but intended to hold data subject to relocation, such as
4969 function descriptors, etc. */
4970
4971 static void
4972 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
4973 {
4974 if (reldata_section == 0)
4975 {
4976 reldata_section = subseg_new (".reldata", 0);
4977
4978 bfd_set_section_flags (stdoutput, reldata_section,
4979 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4980 | SEC_DATA));
4981
4982 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4983 }
4984 else
4985 {
4986 reldata_section = subseg_new (".reldata", 0);
4987 }
4988 ppc_set_current_section (reldata_section);
4989 }
4990
4991 /* pseudo-op: .rdata
4992 behaviour: predefined read only data section
4993 double word aligned
4994 errors: None
4995 warnings: None
4996 initial: .section .rdata "dr3"
4997 d - initialized data
4998 r - readable
4999 3 - double word aligned (that would be 4 byte boundary) */
5000
5001 static void
5002 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5003 {
5004 if (rdata_section == 0)
5005 {
5006 rdata_section = subseg_new (".rdata", 0);
5007 bfd_set_section_flags (stdoutput, rdata_section,
5008 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5009 | SEC_READONLY | SEC_DATA ));
5010
5011 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5012 }
5013 else
5014 {
5015 rdata_section = subseg_new (".rdata", 0);
5016 }
5017 ppc_set_current_section (rdata_section);
5018 }
5019
5020 /* pseudo-op: .ualong
5021 behaviour: much like .int, with the exception that no alignment is
5022 performed.
5023 FIXME: test the alignment statement
5024 errors: None
5025 warnings: None */
5026
5027 static void
5028 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5029 {
5030 /* Try for long. */
5031 cons (4);
5032 }
5033
5034 /* pseudo-op: .znop <symbol name>
5035 behaviour: Issue a nop instruction
5036 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5037 the supplied symbol name.
5038 errors: None
5039 warnings: Missing symbol name */
5040
5041 static void
5042 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5043 {
5044 unsigned long insn;
5045 const struct powerpc_opcode *opcode;
5046 char *f;
5047 symbolS *sym;
5048 char *symbol_name;
5049 char c;
5050 char *name;
5051
5052 /* Strip out the symbol name. */
5053 symbol_name = input_line_pointer;
5054 c = get_symbol_end ();
5055
5056 name = xmalloc (input_line_pointer - symbol_name + 1);
5057 strcpy (name, symbol_name);
5058
5059 sym = symbol_find_or_make (name);
5060
5061 *input_line_pointer = c;
5062
5063 SKIP_WHITESPACE ();
5064
5065 /* Look up the opcode in the hash table. */
5066 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5067
5068 /* Stick in the nop. */
5069 insn = opcode->opcode;
5070
5071 /* Write out the instruction. */
5072 f = frag_more (4);
5073 md_number_to_chars (f, insn, 4);
5074 fix_new (frag_now,
5075 f - frag_now->fr_literal,
5076 4,
5077 sym,
5078 0,
5079 0,
5080 BFD_RELOC_16_GOT_PCREL);
5081
5082 }
5083
5084 /* pseudo-op:
5085 behaviour:
5086 errors:
5087 warnings: */
5088
5089 static void
5090 ppc_pe_comm (int lcomm)
5091 {
5092 char *name;
5093 char c;
5094 char *p;
5095 offsetT temp;
5096 symbolS *symbolP;
5097 offsetT align;
5098
5099 name = input_line_pointer;
5100 c = get_symbol_end ();
5101
5102 /* just after name is now '\0'. */
5103 p = input_line_pointer;
5104 *p = c;
5105 SKIP_WHITESPACE ();
5106 if (*input_line_pointer != ',')
5107 {
5108 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5109 ignore_rest_of_line ();
5110 return;
5111 }
5112
5113 input_line_pointer++; /* skip ',' */
5114 if ((temp = get_absolute_expression ()) < 0)
5115 {
5116 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5117 ignore_rest_of_line ();
5118 return;
5119 }
5120
5121 if (! lcomm)
5122 {
5123 /* The third argument to .comm is the alignment. */
5124 if (*input_line_pointer != ',')
5125 align = 3;
5126 else
5127 {
5128 ++input_line_pointer;
5129 align = get_absolute_expression ();
5130 if (align <= 0)
5131 {
5132 as_warn (_("ignoring bad alignment"));
5133 align = 3;
5134 }
5135 }
5136 }
5137
5138 *p = 0;
5139 symbolP = symbol_find_or_make (name);
5140
5141 *p = c;
5142 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5143 {
5144 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5145 S_GET_NAME (symbolP));
5146 ignore_rest_of_line ();
5147 return;
5148 }
5149
5150 if (S_GET_VALUE (symbolP))
5151 {
5152 if (S_GET_VALUE (symbolP) != (valueT) temp)
5153 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5154 S_GET_NAME (symbolP),
5155 (long) S_GET_VALUE (symbolP),
5156 (long) temp);
5157 }
5158 else
5159 {
5160 S_SET_VALUE (symbolP, (valueT) temp);
5161 S_SET_EXTERNAL (symbolP);
5162 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5163 }
5164
5165 demand_empty_rest_of_line ();
5166 }
5167
5168 /*
5169 * implement the .section pseudo op:
5170 * .section name {, "flags"}
5171 * ^ ^
5172 * | +--- optional flags: 'b' for bss
5173 * | 'i' for info
5174 * +-- section name 'l' for lib
5175 * 'n' for noload
5176 * 'o' for over
5177 * 'w' for data
5178 * 'd' (apparently m88k for data)
5179 * 'x' for text
5180 * But if the argument is not a quoted string, treat it as a
5181 * subsegment number.
5182 *
5183 * FIXME: this is a copy of the section processing from obj-coff.c, with
5184 * additions/changes for the moto-pas assembler support. There are three
5185 * categories:
5186 *
5187 * FIXME: I just noticed this. This doesn't work at all really. It it
5188 * setting bits that bfd probably neither understands or uses. The
5189 * correct approach (?) will have to incorporate extra fields attached
5190 * to the section to hold the system specific stuff. (krk)
5191 *
5192 * Section Contents:
5193 * 'a' - unknown - referred to in documentation, but no definition supplied
5194 * 'c' - section has code
5195 * 'd' - section has initialized data
5196 * 'u' - section has uninitialized data
5197 * 'i' - section contains directives (info)
5198 * 'n' - section can be discarded
5199 * 'R' - remove section at link time
5200 *
5201 * Section Protection:
5202 * 'r' - section is readable
5203 * 'w' - section is writeable
5204 * 'x' - section is executable
5205 * 's' - section is sharable
5206 *
5207 * Section Alignment:
5208 * '0' - align to byte boundary
5209 * '1' - align to halfword undary
5210 * '2' - align to word boundary
5211 * '3' - align to doubleword boundary
5212 * '4' - align to quadword boundary
5213 * '5' - align to 32 byte boundary
5214 * '6' - align to 64 byte boundary
5215 *
5216 */
5217
5218 void
5219 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5220 {
5221 /* Strip out the section name. */
5222 char *section_name;
5223 char c;
5224 char *name;
5225 unsigned int exp;
5226 flagword flags;
5227 segT sec;
5228 int align;
5229
5230 section_name = input_line_pointer;
5231 c = get_symbol_end ();
5232
5233 name = xmalloc (input_line_pointer - section_name + 1);
5234 strcpy (name, section_name);
5235
5236 *input_line_pointer = c;
5237
5238 SKIP_WHITESPACE ();
5239
5240 exp = 0;
5241 flags = SEC_NO_FLAGS;
5242
5243 if (strcmp (name, ".idata$2") == 0)
5244 {
5245 align = 0;
5246 }
5247 else if (strcmp (name, ".idata$3") == 0)
5248 {
5249 align = 0;
5250 }
5251 else if (strcmp (name, ".idata$4") == 0)
5252 {
5253 align = 2;
5254 }
5255 else if (strcmp (name, ".idata$5") == 0)
5256 {
5257 align = 2;
5258 }
5259 else if (strcmp (name, ".idata$6") == 0)
5260 {
5261 align = 1;
5262 }
5263 else
5264 /* Default alignment to 16 byte boundary. */
5265 align = 4;
5266
5267 if (*input_line_pointer == ',')
5268 {
5269 ++input_line_pointer;
5270 SKIP_WHITESPACE ();
5271 if (*input_line_pointer != '"')
5272 exp = get_absolute_expression ();
5273 else
5274 {
5275 ++input_line_pointer;
5276 while (*input_line_pointer != '"'
5277 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5278 {
5279 switch (*input_line_pointer)
5280 {
5281 /* Section Contents */
5282 case 'a': /* unknown */
5283 as_bad (_("unsupported section attribute -- 'a'"));
5284 break;
5285 case 'c': /* code section */
5286 flags |= SEC_CODE;
5287 break;
5288 case 'd': /* section has initialized data */
5289 flags |= SEC_DATA;
5290 break;
5291 case 'u': /* section has uninitialized data */
5292 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5293 in winnt.h */
5294 flags |= SEC_ROM;
5295 break;
5296 case 'i': /* section contains directives (info) */
5297 /* FIXME: This is IMAGE_SCN_LNK_INFO
5298 in winnt.h */
5299 flags |= SEC_HAS_CONTENTS;
5300 break;
5301 case 'n': /* section can be discarded */
5302 flags &=~ SEC_LOAD;
5303 break;
5304 case 'R': /* Remove section at link time */
5305 flags |= SEC_NEVER_LOAD;
5306 break;
5307 #if IFLICT_BRAIN_DAMAGE
5308 /* Section Protection */
5309 case 'r': /* section is readable */
5310 flags |= IMAGE_SCN_MEM_READ;
5311 break;
5312 case 'w': /* section is writeable */
5313 flags |= IMAGE_SCN_MEM_WRITE;
5314 break;
5315 case 'x': /* section is executable */
5316 flags |= IMAGE_SCN_MEM_EXECUTE;
5317 break;
5318 case 's': /* section is sharable */
5319 flags |= IMAGE_SCN_MEM_SHARED;
5320 break;
5321
5322 /* Section Alignment */
5323 case '0': /* align to byte boundary */
5324 flags |= IMAGE_SCN_ALIGN_1BYTES;
5325 align = 0;
5326 break;
5327 case '1': /* align to halfword boundary */
5328 flags |= IMAGE_SCN_ALIGN_2BYTES;
5329 align = 1;
5330 break;
5331 case '2': /* align to word boundary */
5332 flags |= IMAGE_SCN_ALIGN_4BYTES;
5333 align = 2;
5334 break;
5335 case '3': /* align to doubleword boundary */
5336 flags |= IMAGE_SCN_ALIGN_8BYTES;
5337 align = 3;
5338 break;
5339 case '4': /* align to quadword boundary */
5340 flags |= IMAGE_SCN_ALIGN_16BYTES;
5341 align = 4;
5342 break;
5343 case '5': /* align to 32 byte boundary */
5344 flags |= IMAGE_SCN_ALIGN_32BYTES;
5345 align = 5;
5346 break;
5347 case '6': /* align to 64 byte boundary */
5348 flags |= IMAGE_SCN_ALIGN_64BYTES;
5349 align = 6;
5350 break;
5351 #endif
5352 default:
5353 as_bad (_("unknown section attribute '%c'"),
5354 *input_line_pointer);
5355 break;
5356 }
5357 ++input_line_pointer;
5358 }
5359 if (*input_line_pointer == '"')
5360 ++input_line_pointer;
5361 }
5362 }
5363
5364 sec = subseg_new (name, (subsegT) exp);
5365
5366 ppc_set_current_section (sec);
5367
5368 if (flags != SEC_NO_FLAGS)
5369 {
5370 if (! bfd_set_section_flags (stdoutput, sec, flags))
5371 as_bad (_("error setting flags for \"%s\": %s"),
5372 bfd_section_name (stdoutput, sec),
5373 bfd_errmsg (bfd_get_error ()));
5374 }
5375
5376 bfd_set_section_alignment (stdoutput, sec, align);
5377 }
5378
5379 static void
5380 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5381 {
5382 char *name;
5383 char endc;
5384 symbolS *ext_sym;
5385
5386 name = input_line_pointer;
5387 endc = get_symbol_end ();
5388
5389 ext_sym = symbol_find_or_make (name);
5390
5391 *input_line_pointer = endc;
5392
5393 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5394 SF_SET_FUNCTION (ext_sym);
5395 SF_SET_PROCESS (ext_sym);
5396 coff_add_linesym (ext_sym);
5397
5398 demand_empty_rest_of_line ();
5399 }
5400
5401 static void
5402 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5403 {
5404 if (tocdata_section == 0)
5405 {
5406 tocdata_section = subseg_new (".tocd", 0);
5407 /* FIXME: section flags won't work. */
5408 bfd_set_section_flags (stdoutput, tocdata_section,
5409 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5410 | SEC_READONLY | SEC_DATA));
5411
5412 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5413 }
5414 else
5415 {
5416 rdata_section = subseg_new (".tocd", 0);
5417 }
5418
5419 ppc_set_current_section (tocdata_section);
5420
5421 demand_empty_rest_of_line ();
5422 }
5423
5424 /* Don't adjust TOC relocs to use the section symbol. */
5425
5426 int
5427 ppc_pe_fix_adjustable (fixS *fix)
5428 {
5429 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5430 }
5431
5432 #endif
5433 \f
5434 #ifdef OBJ_XCOFF
5435
5436 /* XCOFF specific symbol and file handling. */
5437
5438 /* Canonicalize the symbol name. We use the to force the suffix, if
5439 any, to use square brackets, and to be in upper case. */
5440
5441 char *
5442 ppc_canonicalize_symbol_name (char *name)
5443 {
5444 char *s;
5445
5446 if (ppc_stab_symbol)
5447 return name;
5448
5449 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5450 ;
5451 if (*s != '\0')
5452 {
5453 char brac;
5454
5455 if (*s == '[')
5456 brac = ']';
5457 else
5458 {
5459 *s = '[';
5460 brac = '}';
5461 }
5462
5463 for (s++; *s != '\0' && *s != brac; s++)
5464 *s = TOUPPER (*s);
5465
5466 if (*s == '\0' || s[1] != '\0')
5467 as_bad (_("bad symbol suffix"));
5468
5469 *s = ']';
5470 }
5471
5472 return name;
5473 }
5474
5475 /* Set the class of a symbol based on the suffix, if any. This is
5476 called whenever a new symbol is created. */
5477
5478 void
5479 ppc_symbol_new_hook (symbolS *sym)
5480 {
5481 struct ppc_tc_sy *tc;
5482 const char *s;
5483
5484 tc = symbol_get_tc (sym);
5485 tc->next = NULL;
5486 tc->output = 0;
5487 tc->symbol_class = -1;
5488 tc->real_name = NULL;
5489 tc->subseg = 0;
5490 tc->align = 0;
5491 tc->u.size = NULL;
5492 tc->u.dw = NULL;
5493 tc->within = NULL;
5494
5495 if (ppc_stab_symbol)
5496 return;
5497
5498 s = strchr (S_GET_NAME (sym), '[');
5499 if (s == (const char *) NULL)
5500 {
5501 /* There is no suffix. */
5502 return;
5503 }
5504
5505 ++s;
5506
5507 switch (s[0])
5508 {
5509 case 'B':
5510 if (strcmp (s, "BS]") == 0)
5511 tc->symbol_class = XMC_BS;
5512 break;
5513 case 'D':
5514 if (strcmp (s, "DB]") == 0)
5515 tc->symbol_class = XMC_DB;
5516 else if (strcmp (s, "DS]") == 0)
5517 tc->symbol_class = XMC_DS;
5518 break;
5519 case 'G':
5520 if (strcmp (s, "GL]") == 0)
5521 tc->symbol_class = XMC_GL;
5522 break;
5523 case 'P':
5524 if (strcmp (s, "PR]") == 0)
5525 tc->symbol_class = XMC_PR;
5526 break;
5527 case 'R':
5528 if (strcmp (s, "RO]") == 0)
5529 tc->symbol_class = XMC_RO;
5530 else if (strcmp (s, "RW]") == 0)
5531 tc->symbol_class = XMC_RW;
5532 break;
5533 case 'S':
5534 if (strcmp (s, "SV]") == 0)
5535 tc->symbol_class = XMC_SV;
5536 break;
5537 case 'T':
5538 if (strcmp (s, "TC]") == 0)
5539 tc->symbol_class = XMC_TC;
5540 else if (strcmp (s, "TI]") == 0)
5541 tc->symbol_class = XMC_TI;
5542 else if (strcmp (s, "TB]") == 0)
5543 tc->symbol_class = XMC_TB;
5544 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5545 tc->symbol_class = XMC_TC0;
5546 break;
5547 case 'U':
5548 if (strcmp (s, "UA]") == 0)
5549 tc->symbol_class = XMC_UA;
5550 else if (strcmp (s, "UC]") == 0)
5551 tc->symbol_class = XMC_UC;
5552 break;
5553 case 'X':
5554 if (strcmp (s, "XO]") == 0)
5555 tc->symbol_class = XMC_XO;
5556 break;
5557 }
5558
5559 if (tc->symbol_class == -1)
5560 as_bad (_("unrecognized symbol suffix"));
5561 }
5562
5563 /* Set the class of a label based on where it is defined. This
5564 handles symbols without suffixes. Also, move the symbol so that it
5565 follows the csect symbol. */
5566
5567 void
5568 ppc_frob_label (symbolS *sym)
5569 {
5570 if (ppc_current_csect != (symbolS *) NULL)
5571 {
5572 if (symbol_get_tc (sym)->symbol_class == -1)
5573 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5574
5575 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5576 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5577 &symbol_rootP, &symbol_lastP);
5578 symbol_get_tc (ppc_current_csect)->within = sym;
5579 symbol_get_tc (sym)->within = ppc_current_csect;
5580 }
5581
5582 #ifdef OBJ_ELF
5583 dwarf2_emit_label (sym);
5584 #endif
5585 }
5586
5587 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5588 seen. It tells ppc_adjust_symtab whether it needs to look through
5589 the symbols. */
5590
5591 static bfd_boolean ppc_saw_abs;
5592
5593 /* Change the name of a symbol just before writing it out. Set the
5594 real name if the .rename pseudo-op was used. Otherwise, remove any
5595 class suffix. Return 1 if the symbol should not be included in the
5596 symbol table. */
5597
5598 int
5599 ppc_frob_symbol (symbolS *sym)
5600 {
5601 static symbolS *ppc_last_function;
5602 static symbolS *set_end;
5603
5604 /* Discard symbols that should not be included in the output symbol
5605 table. */
5606 if (! symbol_used_in_reloc_p (sym)
5607 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5608 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5609 && ! symbol_get_tc (sym)->output
5610 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5611 return 1;
5612
5613 /* This one will disappear anyway. Don't make a csect sym for it. */
5614 if (sym == abs_section_sym)
5615 return 1;
5616
5617 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5618 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5619 else
5620 {
5621 const char *name;
5622 const char *s;
5623
5624 name = S_GET_NAME (sym);
5625 s = strchr (name, '[');
5626 if (s != (char *) NULL)
5627 {
5628 unsigned int len;
5629 char *snew;
5630
5631 len = s - name;
5632 snew = xmalloc (len + 1);
5633 memcpy (snew, name, len);
5634 snew[len] = '\0';
5635
5636 S_SET_NAME (sym, snew);
5637 }
5638 }
5639
5640 if (set_end != (symbolS *) NULL)
5641 {
5642 SA_SET_SYM_ENDNDX (set_end, sym);
5643 set_end = NULL;
5644 }
5645
5646 if (SF_GET_FUNCTION (sym))
5647 {
5648 if (ppc_last_function != (symbolS *) NULL)
5649 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5650 ppc_last_function = sym;
5651 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5652 {
5653 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5654 SA_SET_SYM_FSIZE (sym,
5655 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5656 }
5657 }
5658 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5659 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5660 {
5661 if (ppc_last_function == (symbolS *) NULL)
5662 as_bad (_(".ef with no preceding .function"));
5663 else
5664 {
5665 set_end = ppc_last_function;
5666 ppc_last_function = NULL;
5667
5668 /* We don't have a C_EFCN symbol, but we need to force the
5669 COFF backend to believe that it has seen one. */
5670 coff_last_function = NULL;
5671 }
5672 }
5673
5674 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5675 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5676 && S_GET_STORAGE_CLASS (sym) != C_FILE
5677 && S_GET_STORAGE_CLASS (sym) != C_FCN
5678 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5679 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5680 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5681 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5682 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5683 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5684 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5685
5686 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5687 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5688 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5689 {
5690 int i;
5691 union internal_auxent *a;
5692
5693 /* Create a csect aux. */
5694 i = S_GET_NUMBER_AUXILIARY (sym);
5695 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5696 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5697 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5698 {
5699 /* This is the TOC table. */
5700 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5701 a->x_csect.x_scnlen.l = 0;
5702 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5703 }
5704 else if (symbol_get_tc (sym)->subseg != 0)
5705 {
5706 /* This is a csect symbol. x_scnlen is the size of the
5707 csect. */
5708 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5709 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5710 S_GET_SEGMENT (sym))
5711 - S_GET_VALUE (sym));
5712 else
5713 {
5714 resolve_symbol_value (symbol_get_tc (sym)->next);
5715 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5716 - S_GET_VALUE (sym));
5717 }
5718 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5719 }
5720 else if (S_GET_SEGMENT (sym) == bss_section)
5721 {
5722 /* This is a common symbol. */
5723 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5724 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5725 if (S_IS_EXTERNAL (sym))
5726 symbol_get_tc (sym)->symbol_class = XMC_RW;
5727 else
5728 symbol_get_tc (sym)->symbol_class = XMC_BS;
5729 }
5730 else if (S_GET_SEGMENT (sym) == absolute_section)
5731 {
5732 /* This is an absolute symbol. The csect will be created by
5733 ppc_adjust_symtab. */
5734 ppc_saw_abs = TRUE;
5735 a->x_csect.x_smtyp = XTY_LD;
5736 if (symbol_get_tc (sym)->symbol_class == -1)
5737 symbol_get_tc (sym)->symbol_class = XMC_XO;
5738 }
5739 else if (! S_IS_DEFINED (sym))
5740 {
5741 /* This is an external symbol. */
5742 a->x_csect.x_scnlen.l = 0;
5743 a->x_csect.x_smtyp = XTY_ER;
5744 }
5745 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5746 {
5747 symbolS *next;
5748
5749 /* This is a TOC definition. x_scnlen is the size of the
5750 TOC entry. */
5751 next = symbol_next (sym);
5752 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5753 next = symbol_next (next);
5754 if (next == (symbolS *) NULL
5755 || symbol_get_tc (next)->symbol_class != XMC_TC)
5756 {
5757 if (ppc_after_toc_frag == (fragS *) NULL)
5758 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5759 data_section)
5760 - S_GET_VALUE (sym));
5761 else
5762 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5763 - S_GET_VALUE (sym));
5764 }
5765 else
5766 {
5767 resolve_symbol_value (next);
5768 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5769 - S_GET_VALUE (sym));
5770 }
5771 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5772 }
5773 else
5774 {
5775 symbolS *csect;
5776
5777 /* This is a normal symbol definition. x_scnlen is the
5778 symbol index of the containing csect. */
5779 if (S_GET_SEGMENT (sym) == text_section)
5780 csect = ppc_text_csects;
5781 else if (S_GET_SEGMENT (sym) == data_section)
5782 csect = ppc_data_csects;
5783 else
5784 abort ();
5785
5786 /* Skip the initial dummy symbol. */
5787 csect = symbol_get_tc (csect)->next;
5788
5789 if (csect == (symbolS *) NULL)
5790 {
5791 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5792 a->x_csect.x_scnlen.l = 0;
5793 }
5794 else
5795 {
5796 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5797 {
5798 resolve_symbol_value (symbol_get_tc (csect)->next);
5799 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5800 > S_GET_VALUE (sym))
5801 break;
5802 csect = symbol_get_tc (csect)->next;
5803 }
5804
5805 a->x_csect.x_scnlen.p =
5806 coffsymbol (symbol_get_bfdsym (csect))->native;
5807 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5808 1;
5809 }
5810 a->x_csect.x_smtyp = XTY_LD;
5811 }
5812
5813 a->x_csect.x_parmhash = 0;
5814 a->x_csect.x_snhash = 0;
5815 if (symbol_get_tc (sym)->symbol_class == -1)
5816 a->x_csect.x_smclas = XMC_PR;
5817 else
5818 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5819 a->x_csect.x_stab = 0;
5820 a->x_csect.x_snstab = 0;
5821
5822 /* Don't let the COFF backend resort these symbols. */
5823 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5824 }
5825 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5826 {
5827 /* We want the value to be the symbol index of the referenced
5828 csect symbol. BFD will do that for us if we set the right
5829 flags. */
5830 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5831 combined_entry_type *c = coffsymbol (bsym)->native;
5832
5833 S_SET_VALUE (sym, (valueT) (size_t) c);
5834 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5835 }
5836 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5837 {
5838 symbolS *block;
5839 valueT base;
5840
5841 block = symbol_get_tc (sym)->within;
5842 if (block)
5843 {
5844 /* The value is the offset from the enclosing csect. */
5845 symbolS *csect;
5846
5847 csect = symbol_get_tc (block)->within;
5848 resolve_symbol_value (csect);
5849 base = S_GET_VALUE (csect);
5850 }
5851 else
5852 base = 0;
5853
5854 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5855 }
5856 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5857 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5858 {
5859 /* We want the value to be a file offset into the line numbers.
5860 BFD will do that for us if we set the right flags. We have
5861 already set the value correctly. */
5862 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5863 }
5864
5865 return 0;
5866 }
5867
5868 /* Adjust the symbol table. This creates csect symbols for all
5869 absolute symbols. */
5870
5871 void
5872 ppc_adjust_symtab (void)
5873 {
5874 symbolS *sym;
5875
5876 if (! ppc_saw_abs)
5877 return;
5878
5879 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5880 {
5881 symbolS *csect;
5882 int i;
5883 union internal_auxent *a;
5884
5885 if (S_GET_SEGMENT (sym) != absolute_section)
5886 continue;
5887
5888 csect = symbol_create (".abs[XO]", absolute_section,
5889 S_GET_VALUE (sym), &zero_address_frag);
5890 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5891 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5892 i = S_GET_NUMBER_AUXILIARY (csect);
5893 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5894 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5895 a->x_csect.x_scnlen.l = 0;
5896 a->x_csect.x_smtyp = XTY_SD;
5897 a->x_csect.x_parmhash = 0;
5898 a->x_csect.x_snhash = 0;
5899 a->x_csect.x_smclas = XMC_XO;
5900 a->x_csect.x_stab = 0;
5901 a->x_csect.x_snstab = 0;
5902
5903 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5904
5905 i = S_GET_NUMBER_AUXILIARY (sym);
5906 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5907 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5908 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5909 }
5910
5911 ppc_saw_abs = FALSE;
5912 }
5913
5914 /* Set the VMA for a section. This is called on all the sections in
5915 turn. */
5916
5917 void
5918 ppc_frob_section (asection *sec)
5919 {
5920 static bfd_vma vma = 0;
5921
5922 /* Dwarf sections start at 0. */
5923 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5924 return;
5925
5926 vma = md_section_align (sec, vma);
5927 bfd_set_section_vma (stdoutput, sec, vma);
5928 vma += bfd_section_size (stdoutput, sec);
5929 }
5930
5931 #endif /* OBJ_XCOFF */
5932 \f
5933 char *
5934 md_atof (int type, char *litp, int *sizep)
5935 {
5936 return ieee_md_atof (type, litp, sizep, target_big_endian);
5937 }
5938
5939 /* Write a value out to the object file, using the appropriate
5940 endianness. */
5941
5942 void
5943 md_number_to_chars (char *buf, valueT val, int n)
5944 {
5945 if (target_big_endian)
5946 number_to_chars_bigendian (buf, val, n);
5947 else
5948 number_to_chars_littleendian (buf, val, n);
5949 }
5950
5951 /* Align a section (I don't know why this is machine dependent). */
5952
5953 valueT
5954 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5955 {
5956 #ifdef OBJ_ELF
5957 return addr;
5958 #else
5959 int align = bfd_get_section_alignment (stdoutput, seg);
5960
5961 return ((addr + (1 << align) - 1) & (-1 << align));
5962 #endif
5963 }
5964
5965 /* We don't have any form of relaxing. */
5966
5967 int
5968 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5969 asection *seg ATTRIBUTE_UNUSED)
5970 {
5971 abort ();
5972 return 0;
5973 }
5974
5975 /* Convert a machine dependent frag. We never generate these. */
5976
5977 void
5978 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5979 asection *sec ATTRIBUTE_UNUSED,
5980 fragS *fragp ATTRIBUTE_UNUSED)
5981 {
5982 abort ();
5983 }
5984
5985 /* We have no need to default values of symbols. */
5986
5987 symbolS *
5988 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
5989 {
5990 return 0;
5991 }
5992 \f
5993 /* Functions concerning relocs. */
5994
5995 /* The location from which a PC relative jump should be calculated,
5996 given a PC relative reloc. */
5997
5998 long
5999 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6000 {
6001 return fixp->fx_frag->fr_address + fixp->fx_where;
6002 }
6003
6004 #ifdef OBJ_XCOFF
6005
6006 /* This is called to see whether a fixup should be adjusted to use a
6007 section symbol. We take the opportunity to change a fixup against
6008 a symbol in the TOC subsegment into a reloc against the
6009 corresponding .tc symbol. */
6010
6011 int
6012 ppc_fix_adjustable (fixS *fix)
6013 {
6014 valueT val = resolve_symbol_value (fix->fx_addsy);
6015 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6016 TC_SYMFIELD_TYPE *tc;
6017
6018 if (symseg == absolute_section)
6019 return 0;
6020
6021 /* Always adjust symbols in debugging sections. */
6022 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6023 return 1;
6024
6025 if (ppc_toc_csect != (symbolS *) NULL
6026 && fix->fx_addsy != ppc_toc_csect
6027 && symseg == data_section
6028 && val >= ppc_toc_frag->fr_address
6029 && (ppc_after_toc_frag == (fragS *) NULL
6030 || val < ppc_after_toc_frag->fr_address))
6031 {
6032 symbolS *sy;
6033
6034 for (sy = symbol_next (ppc_toc_csect);
6035 sy != (symbolS *) NULL;
6036 sy = symbol_next (sy))
6037 {
6038 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6039
6040 if (sy_tc->symbol_class == XMC_TC0)
6041 continue;
6042 if (sy_tc->symbol_class != XMC_TC)
6043 break;
6044 if (val == resolve_symbol_value (sy))
6045 {
6046 fix->fx_addsy = sy;
6047 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6048 return 0;
6049 }
6050 }
6051
6052 as_bad_where (fix->fx_file, fix->fx_line,
6053 _("symbol in .toc does not match any .tc"));
6054 }
6055
6056 /* Possibly adjust the reloc to be against the csect. */
6057 tc = symbol_get_tc (fix->fx_addsy);
6058 if (tc->subseg == 0
6059 && tc->symbol_class != XMC_TC0
6060 && tc->symbol_class != XMC_TC
6061 && symseg != bss_section
6062 /* Don't adjust if this is a reloc in the toc section. */
6063 && (symseg != data_section
6064 || ppc_toc_csect == NULL
6065 || val < ppc_toc_frag->fr_address
6066 || (ppc_after_toc_frag != NULL
6067 && val >= ppc_after_toc_frag->fr_address)))
6068 {
6069 symbolS *csect = tc->within;
6070
6071 /* If the symbol was not declared by a label (eg: a section symbol),
6072 use the section instead of the csect. This doesn't happen in
6073 normal AIX assembly code. */
6074 if (csect == NULL)
6075 csect = seg_info (symseg)->sym;
6076
6077 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6078 fix->fx_addsy = csect;
6079
6080 return 0;
6081 }
6082
6083 /* Adjust a reloc against a .lcomm symbol to be against the base
6084 .lcomm. */
6085 if (symseg == bss_section
6086 && ! S_IS_EXTERNAL (fix->fx_addsy))
6087 {
6088 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6089
6090 fix->fx_offset += val - resolve_symbol_value (sy);
6091 fix->fx_addsy = sy;
6092 }
6093
6094 return 0;
6095 }
6096
6097 /* A reloc from one csect to another must be kept. The assembler
6098 will, of course, keep relocs between sections, and it will keep
6099 absolute relocs, but we need to force it to keep PC relative relocs
6100 between two csects in the same section. */
6101
6102 int
6103 ppc_force_relocation (fixS *fix)
6104 {
6105 /* At this point fix->fx_addsy should already have been converted to
6106 a csect symbol. If the csect does not include the fragment, then
6107 we need to force the relocation. */
6108 if (fix->fx_pcrel
6109 && fix->fx_addsy != NULL
6110 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6111 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6112 > fix->fx_frag->fr_address)
6113 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6114 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6115 <= fix->fx_frag->fr_address))))
6116 return 1;
6117
6118 return generic_force_reloc (fix);
6119 }
6120
6121 void
6122 ppc_new_dot_label (symbolS *sym)
6123 {
6124 /* Anchor this label to the current csect for relocations. */
6125 symbol_get_tc (sym)->within = ppc_current_csect;
6126 }
6127
6128 #endif /* OBJ_XCOFF */
6129
6130 #ifdef OBJ_ELF
6131 /* If this function returns non-zero, it guarantees that a relocation
6132 will be emitted for a fixup. */
6133
6134 int
6135 ppc_force_relocation (fixS *fix)
6136 {
6137 /* Branch prediction relocations must force a relocation, as must
6138 the vtable description relocs. */
6139 switch (fix->fx_r_type)
6140 {
6141 case BFD_RELOC_PPC_B16_BRTAKEN:
6142 case BFD_RELOC_PPC_B16_BRNTAKEN:
6143 case BFD_RELOC_PPC_BA16_BRTAKEN:
6144 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6145 case BFD_RELOC_24_PLT_PCREL:
6146 case BFD_RELOC_PPC64_TOC:
6147 return 1;
6148 default:
6149 break;
6150 }
6151
6152 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6153 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6154 return 1;
6155
6156 return generic_force_reloc (fix);
6157 }
6158
6159 int
6160 ppc_fix_adjustable (fixS *fix)
6161 {
6162 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6163 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6164 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6165 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6166 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6167 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6168 && fix->fx_r_type != BFD_RELOC_GPREL16
6169 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6170 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6171 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6172 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6173 }
6174 #endif
6175
6176 void
6177 ppc_frag_check (struct frag *fragP)
6178 {
6179 if (!fragP->has_code)
6180 return;
6181
6182 if (ppc_mach() == bfd_mach_ppc_vle)
6183 {
6184 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6185 as_bad (_("instruction address is not a multiple of 2"));
6186 }
6187 else
6188 {
6189 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6190 as_bad (_("instruction address is not a multiple of 4"));
6191 }
6192 }
6193
6194 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6195 rs_align_code frag. */
6196
6197 void
6198 ppc_handle_align (struct frag *fragP)
6199 {
6200 valueT count = (fragP->fr_next->fr_address
6201 - (fragP->fr_address + fragP->fr_fix));
6202
6203 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6204 {
6205 char *dest = fragP->fr_literal + fragP->fr_fix;
6206
6207 fragP->fr_var = 2;
6208 md_number_to_chars (dest, 0x4400, 2);
6209 }
6210 else if (count != 0 && (count & 3) == 0)
6211 {
6212 char *dest = fragP->fr_literal + fragP->fr_fix;
6213
6214 fragP->fr_var = 4;
6215
6216 if (count > 4 * nop_limit && count < 0x2000000)
6217 {
6218 struct frag *rest;
6219
6220 /* Make a branch, then follow with nops. Insert another
6221 frag to handle the nops. */
6222 md_number_to_chars (dest, 0x48000000 + count, 4);
6223 count -= 4;
6224 if (count == 0)
6225 return;
6226
6227 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6228 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6229 fragP->fr_next = rest;
6230 fragP = rest;
6231 rest->fr_address += rest->fr_fix + 4;
6232 rest->fr_fix = 0;
6233 /* If we leave the next frag as rs_align_code we'll come here
6234 again, resulting in a bunch of branches rather than a
6235 branch followed by nops. */
6236 rest->fr_type = rs_align;
6237 dest = rest->fr_literal;
6238 }
6239
6240 md_number_to_chars (dest, 0x60000000, 4);
6241
6242 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6243 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6244 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6245 {
6246 /* For power6, power7 and power8, we want the last nop to be a group
6247 terminating one. Do this by inserting an rs_fill frag immediately
6248 after this one, with its address set to the last nop location.
6249 This will automatically reduce the number of nops in the current
6250 frag by one. */
6251 if (count > 4)
6252 {
6253 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6254
6255 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6256 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6257 group_nop->fr_fix = 0;
6258 group_nop->fr_offset = 1;
6259 group_nop->fr_type = rs_fill;
6260 fragP->fr_next = group_nop;
6261 dest = group_nop->fr_literal;
6262 }
6263
6264 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6265 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6266 {
6267 if (ppc_cpu & PPC_OPCODE_E500MC)
6268 /* e500mc group terminating nop: "ori 0,0,0". */
6269 md_number_to_chars (dest, 0x60000000, 4);
6270 else
6271 /* power7/power8 group terminating nop: "ori 2,2,0". */
6272 md_number_to_chars (dest, 0x60420000, 4);
6273 }
6274 else
6275 /* power6 group terminating nop: "ori 1,1,0". */
6276 md_number_to_chars (dest, 0x60210000, 4);
6277 }
6278 }
6279 }
6280
6281 /* Apply a fixup to the object code. This is called for all the
6282 fixups we generated by the calls to fix_new_exp, above. */
6283
6284 void
6285 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
6286 {
6287 valueT value = * valP;
6288 offsetT fieldval;
6289 const struct powerpc_operand *operand;
6290
6291 #ifdef OBJ_ELF
6292 if (fixP->fx_addsy != NULL)
6293 {
6294 /* Hack around bfd_install_relocation brain damage. */
6295 if (fixP->fx_pcrel)
6296 value += fixP->fx_frag->fr_address + fixP->fx_where;
6297 }
6298 else
6299 fixP->fx_done = 1;
6300 #else
6301 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6302 the symbol values. If we are doing this relocation the code in
6303 write.c is going to call bfd_install_relocation, which is also
6304 going to use the symbol value. That means that if the reloc is
6305 fully resolved we want to use *valP since bfd_install_relocation is
6306 not being used.
6307 However, if the reloc is not fully resolved we do not want to
6308 use *valP, and must use fx_offset instead. If the relocation
6309 is PC-relative, we then need to re-apply md_pcrel_from_section
6310 to this new relocation value. */
6311 if (fixP->fx_addsy == (symbolS *) NULL)
6312 fixP->fx_done = 1;
6313
6314 else
6315 {
6316 value = fixP->fx_offset;
6317 if (fixP->fx_pcrel)
6318 value -= md_pcrel_from_section (fixP, seg);
6319 }
6320 #endif
6321
6322 if (fixP->fx_subsy != (symbolS *) NULL)
6323 {
6324 /* We can't actually support subtracting a symbol. */
6325 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6326 }
6327
6328 operand = NULL;
6329 if (fixP->fx_pcrel_adjust != 0)
6330 {
6331 /* This is a fixup on an instruction. */
6332 int opindex = fixP->fx_pcrel_adjust & 0xff;
6333
6334 operand = &powerpc_operands[opindex];
6335 #ifdef OBJ_XCOFF
6336 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6337 does not generate a reloc. It uses the offset of `sym' within its
6338 csect. Other usages, such as `.long sym', generate relocs. This
6339 is the documented behaviour of non-TOC symbols. */
6340 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6341 && (operand->bitm & 0xfff0) == 0xfff0
6342 && operand->shift == 0
6343 && (operand->insert == NULL || ppc_obj64)
6344 && fixP->fx_addsy != NULL
6345 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6346 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6347 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6348 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6349 {
6350 value = fixP->fx_offset;
6351 fixP->fx_done = 1;
6352 }
6353 #endif
6354 }
6355
6356 /* Calculate value to be stored in field. */
6357 fieldval = value;
6358 switch (fixP->fx_r_type)
6359 {
6360 #ifdef OBJ_ELF
6361 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6362 case BFD_RELOC_PPC_VLE_LO16A:
6363 case BFD_RELOC_PPC_VLE_LO16D:
6364 #endif
6365 case BFD_RELOC_LO16:
6366 case BFD_RELOC_LO16_PCREL:
6367 fieldval = value & 0xffff;
6368 sign_extend_16:
6369 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6370 fieldval = (fieldval ^ 0x8000) - 0x8000;
6371 fixP->fx_no_overflow = 1;
6372 break;
6373
6374 #ifdef OBJ_ELF
6375 case BFD_RELOC_PPC_VLE_HI16A:
6376 case BFD_RELOC_PPC_VLE_HI16D:
6377 #endif
6378 case BFD_RELOC_HI16:
6379 case BFD_RELOC_HI16_PCREL:
6380 fieldval = PPC_HI (value);
6381 goto sign_extend_16;
6382
6383 #ifdef OBJ_ELF
6384 case BFD_RELOC_PPC_VLE_HA16A:
6385 case BFD_RELOC_PPC_VLE_HA16D:
6386 #endif
6387 case BFD_RELOC_HI16_S:
6388 case BFD_RELOC_HI16_S_PCREL:
6389 fieldval = PPC_HA (value);
6390 goto sign_extend_16;
6391
6392 #ifdef OBJ_ELF
6393 case BFD_RELOC_PPC64_HIGHER:
6394 fieldval = PPC_HIGHER (value);
6395 goto sign_extend_16;
6396
6397 case BFD_RELOC_PPC64_HIGHER_S:
6398 fieldval = PPC_HIGHERA (value);
6399 goto sign_extend_16;
6400
6401 case BFD_RELOC_PPC64_HIGHEST:
6402 fieldval = PPC_HIGHEST (value);
6403 goto sign_extend_16;
6404
6405 case BFD_RELOC_PPC64_HIGHEST_S:
6406 fieldval = PPC_HIGHESTA (value);
6407 goto sign_extend_16;
6408 #endif
6409
6410 default:
6411 break;
6412 }
6413
6414 if (operand != NULL)
6415 {
6416 /* Handle relocs in an insn. */
6417 char *where;
6418 unsigned long insn;
6419
6420 switch (fixP->fx_r_type)
6421 {
6422 #ifdef OBJ_ELF
6423 /* The following relocs can't be calculated by the assembler.
6424 Leave the field zero. */
6425 case BFD_RELOC_PPC_TPREL16:
6426 case BFD_RELOC_PPC_TPREL16_LO:
6427 case BFD_RELOC_PPC_TPREL16_HI:
6428 case BFD_RELOC_PPC_TPREL16_HA:
6429 case BFD_RELOC_PPC_DTPREL16:
6430 case BFD_RELOC_PPC_DTPREL16_LO:
6431 case BFD_RELOC_PPC_DTPREL16_HI:
6432 case BFD_RELOC_PPC_DTPREL16_HA:
6433 case BFD_RELOC_PPC_GOT_TLSGD16:
6434 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6435 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6436 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6437 case BFD_RELOC_PPC_GOT_TLSLD16:
6438 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6439 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6440 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6441 case BFD_RELOC_PPC_GOT_TPREL16:
6442 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6443 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6444 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6445 case BFD_RELOC_PPC_GOT_DTPREL16:
6446 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6447 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6448 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6449 case BFD_RELOC_PPC64_TPREL16_DS:
6450 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6451 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6452 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6453 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6454 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6455 case BFD_RELOC_PPC64_DTPREL16_DS:
6456 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6457 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6458 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6459 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6460 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6461 gas_assert (fixP->fx_addsy != NULL);
6462 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6463 fieldval = 0;
6464 break;
6465
6466 /* These also should leave the field zero for the same
6467 reason. Note that older versions of gas wrote values
6468 here. If we want to go back to the old behaviour, then
6469 all _LO and _LO_DS cases will need to be treated like
6470 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6471 case BFD_RELOC_16_GOTOFF:
6472 case BFD_RELOC_LO16_GOTOFF:
6473 case BFD_RELOC_HI16_GOTOFF:
6474 case BFD_RELOC_HI16_S_GOTOFF:
6475 case BFD_RELOC_LO16_PLTOFF:
6476 case BFD_RELOC_HI16_PLTOFF:
6477 case BFD_RELOC_HI16_S_PLTOFF:
6478 case BFD_RELOC_GPREL16:
6479 case BFD_RELOC_16_BASEREL:
6480 case BFD_RELOC_LO16_BASEREL:
6481 case BFD_RELOC_HI16_BASEREL:
6482 case BFD_RELOC_HI16_S_BASEREL:
6483 case BFD_RELOC_PPC_TOC16:
6484 case BFD_RELOC_PPC64_TOC16_LO:
6485 case BFD_RELOC_PPC64_TOC16_HI:
6486 case BFD_RELOC_PPC64_TOC16_HA:
6487 case BFD_RELOC_PPC64_PLTGOT16:
6488 case BFD_RELOC_PPC64_PLTGOT16_LO:
6489 case BFD_RELOC_PPC64_PLTGOT16_HI:
6490 case BFD_RELOC_PPC64_PLTGOT16_HA:
6491 case BFD_RELOC_PPC64_GOT16_DS:
6492 case BFD_RELOC_PPC64_GOT16_LO_DS:
6493 case BFD_RELOC_PPC64_PLT16_LO_DS:
6494 case BFD_RELOC_PPC64_SECTOFF_DS:
6495 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6496 case BFD_RELOC_PPC64_TOC16_DS:
6497 case BFD_RELOC_PPC64_TOC16_LO_DS:
6498 case BFD_RELOC_PPC64_PLTGOT16_DS:
6499 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6500 case BFD_RELOC_PPC_EMB_NADDR16:
6501 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6502 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6503 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6504 case BFD_RELOC_PPC_EMB_SDAI16:
6505 case BFD_RELOC_PPC_EMB_SDA2I16:
6506 case BFD_RELOC_PPC_EMB_SDA2REL:
6507 case BFD_RELOC_PPC_EMB_SDA21:
6508 case BFD_RELOC_PPC_EMB_MRKREF:
6509 case BFD_RELOC_PPC_EMB_RELSEC16:
6510 case BFD_RELOC_PPC_EMB_RELST_LO:
6511 case BFD_RELOC_PPC_EMB_RELST_HI:
6512 case BFD_RELOC_PPC_EMB_RELST_HA:
6513 case BFD_RELOC_PPC_EMB_BIT_FLD:
6514 case BFD_RELOC_PPC_EMB_RELSDA:
6515 case BFD_RELOC_PPC_VLE_SDA21:
6516 case BFD_RELOC_PPC_VLE_SDA21_LO:
6517 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6518 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6519 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6520 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6521 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6522 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6523 gas_assert (fixP->fx_addsy != NULL);
6524 /* Fall thru */
6525
6526 case BFD_RELOC_PPC_TLS:
6527 case BFD_RELOC_PPC_TLSGD:
6528 case BFD_RELOC_PPC_TLSLD:
6529 fieldval = 0;
6530 break;
6531 #endif
6532
6533 #ifdef OBJ_XCOFF
6534 case BFD_RELOC_PPC_B16:
6535 /* Adjust the offset to the instruction boundary. */
6536 fieldval += 2;
6537 break;
6538 #endif
6539
6540 default:
6541 break;
6542 }
6543
6544 #ifdef OBJ_ELF
6545 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6546 contents can stay at zero. */
6547 #define APPLY_RELOC fixP->fx_done
6548 #else
6549 #define APPLY_RELOC 1
6550 #endif
6551 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6552 {
6553 /* Fetch the instruction, insert the fully resolved operand
6554 value, and stuff the instruction back again. */
6555 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6556 if (target_big_endian)
6557 {
6558 if (fixP->fx_size == 4)
6559 insn = bfd_getb32 ((unsigned char *) where);
6560 else
6561 insn = bfd_getb16 ((unsigned char *) where);
6562 }
6563 else
6564 {
6565 if (fixP->fx_size == 4)
6566 insn = bfd_getl32 ((unsigned char *) where);
6567 else
6568 insn = bfd_getl16 ((unsigned char *) where);
6569 }
6570 insn = ppc_insert_operand (insn, operand, fieldval,
6571 fixP->tc_fix_data.ppc_cpu,
6572 fixP->fx_file, fixP->fx_line);
6573 if (target_big_endian)
6574 {
6575 if (fixP->fx_size == 4)
6576 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6577 else
6578 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6579 }
6580 else
6581 {
6582 if (fixP->fx_size == 4)
6583 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6584 else
6585 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6586 }
6587 }
6588
6589 if (fixP->fx_done)
6590 /* Nothing else to do here. */
6591 return;
6592
6593 gas_assert (fixP->fx_addsy != NULL);
6594 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6595 {
6596 char *sfile;
6597 unsigned int sline;
6598
6599 /* Use expr_symbol_where to see if this is an expression
6600 symbol. */
6601 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6602 as_bad_where (fixP->fx_file, fixP->fx_line,
6603 _("unresolved expression that must be resolved"));
6604 else
6605 as_bad_where (fixP->fx_file, fixP->fx_line,
6606 _("unsupported relocation against %s"),
6607 S_GET_NAME (fixP->fx_addsy));
6608 fixP->fx_done = 1;
6609 return;
6610 }
6611 }
6612 else
6613 {
6614 /* Handle relocs in data. */
6615 switch (fixP->fx_r_type)
6616 {
6617 case BFD_RELOC_VTABLE_INHERIT:
6618 if (fixP->fx_addsy
6619 && !S_IS_DEFINED (fixP->fx_addsy)
6620 && !S_IS_WEAK (fixP->fx_addsy))
6621 S_SET_WEAK (fixP->fx_addsy);
6622 /* Fall thru */
6623
6624 case BFD_RELOC_VTABLE_ENTRY:
6625 fixP->fx_done = 0;
6626 break;
6627
6628 #ifdef OBJ_ELF
6629 /* These can appear with @l etc. in data. */
6630 case BFD_RELOC_LO16:
6631 case BFD_RELOC_LO16_PCREL:
6632 case BFD_RELOC_HI16:
6633 case BFD_RELOC_HI16_PCREL:
6634 case BFD_RELOC_HI16_S:
6635 case BFD_RELOC_HI16_S_PCREL:
6636 case BFD_RELOC_PPC64_HIGHER:
6637 case BFD_RELOC_PPC64_HIGHER_S:
6638 case BFD_RELOC_PPC64_HIGHEST:
6639 case BFD_RELOC_PPC64_HIGHEST_S:
6640 break;
6641
6642 case BFD_RELOC_PPC_DTPMOD:
6643 case BFD_RELOC_PPC_TPREL:
6644 case BFD_RELOC_PPC_DTPREL:
6645 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6646 break;
6647
6648 /* Just punt all of these to the linker. */
6649 case BFD_RELOC_PPC_B16_BRTAKEN:
6650 case BFD_RELOC_PPC_B16_BRNTAKEN:
6651 case BFD_RELOC_16_GOTOFF:
6652 case BFD_RELOC_LO16_GOTOFF:
6653 case BFD_RELOC_HI16_GOTOFF:
6654 case BFD_RELOC_HI16_S_GOTOFF:
6655 case BFD_RELOC_LO16_PLTOFF:
6656 case BFD_RELOC_HI16_PLTOFF:
6657 case BFD_RELOC_HI16_S_PLTOFF:
6658 case BFD_RELOC_PPC_COPY:
6659 case BFD_RELOC_PPC_GLOB_DAT:
6660 case BFD_RELOC_16_BASEREL:
6661 case BFD_RELOC_LO16_BASEREL:
6662 case BFD_RELOC_HI16_BASEREL:
6663 case BFD_RELOC_HI16_S_BASEREL:
6664 case BFD_RELOC_PPC_TLS:
6665 case BFD_RELOC_PPC_DTPREL16_LO:
6666 case BFD_RELOC_PPC_DTPREL16_HI:
6667 case BFD_RELOC_PPC_DTPREL16_HA:
6668 case BFD_RELOC_PPC_TPREL16_LO:
6669 case BFD_RELOC_PPC_TPREL16_HI:
6670 case BFD_RELOC_PPC_TPREL16_HA:
6671 case BFD_RELOC_PPC_GOT_TLSGD16:
6672 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6673 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6674 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6675 case BFD_RELOC_PPC_GOT_TLSLD16:
6676 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6677 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6678 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6679 case BFD_RELOC_PPC_GOT_DTPREL16:
6680 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6681 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6682 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6683 case BFD_RELOC_PPC_GOT_TPREL16:
6684 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6685 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6686 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6687 case BFD_RELOC_24_PLT_PCREL:
6688 case BFD_RELOC_PPC_LOCAL24PC:
6689 case BFD_RELOC_32_PLT_PCREL:
6690 case BFD_RELOC_GPREL16:
6691 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6692 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6693 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6694 case BFD_RELOC_PPC_EMB_NADDR32:
6695 case BFD_RELOC_PPC_EMB_NADDR16:
6696 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6697 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6698 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6699 case BFD_RELOC_PPC_EMB_SDAI16:
6700 case BFD_RELOC_PPC_EMB_SDA2REL:
6701 case BFD_RELOC_PPC_EMB_SDA2I16:
6702 case BFD_RELOC_PPC_EMB_SDA21:
6703 case BFD_RELOC_PPC_VLE_SDA21_LO:
6704 case BFD_RELOC_PPC_EMB_MRKREF:
6705 case BFD_RELOC_PPC_EMB_RELSEC16:
6706 case BFD_RELOC_PPC_EMB_RELST_LO:
6707 case BFD_RELOC_PPC_EMB_RELST_HI:
6708 case BFD_RELOC_PPC_EMB_RELST_HA:
6709 case BFD_RELOC_PPC_EMB_BIT_FLD:
6710 case BFD_RELOC_PPC_EMB_RELSDA:
6711 case BFD_RELOC_PPC64_TOC:
6712 case BFD_RELOC_PPC_TOC16:
6713 case BFD_RELOC_PPC64_TOC16_LO:
6714 case BFD_RELOC_PPC64_TOC16_HI:
6715 case BFD_RELOC_PPC64_TOC16_HA:
6716 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6717 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6718 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6719 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6720 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6721 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6722 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6723 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6724 fixP->fx_done = 0;
6725 break;
6726 #endif
6727
6728 #ifdef OBJ_XCOFF
6729 case BFD_RELOC_NONE:
6730 #endif
6731 case BFD_RELOC_CTOR:
6732 case BFD_RELOC_32:
6733 case BFD_RELOC_32_PCREL:
6734 case BFD_RELOC_RVA:
6735 case BFD_RELOC_64:
6736 case BFD_RELOC_64_PCREL:
6737 case BFD_RELOC_16:
6738 case BFD_RELOC_16_PCREL:
6739 case BFD_RELOC_8:
6740 break;
6741
6742 default:
6743 fprintf (stderr,
6744 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6745 fflush (stderr);
6746 abort ();
6747 }
6748
6749 if (fixP->fx_size && APPLY_RELOC)
6750 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6751 fieldval, fixP->fx_size);
6752 }
6753
6754 /* We are only able to convert some relocs to pc-relative. */
6755 if (!fixP->fx_done && fixP->fx_pcrel)
6756 {
6757 switch (fixP->fx_r_type)
6758 {
6759 case BFD_RELOC_LO16:
6760 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6761 break;
6762
6763 case BFD_RELOC_HI16:
6764 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6765 break;
6766
6767 case BFD_RELOC_HI16_S:
6768 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6769 break;
6770
6771 case BFD_RELOC_64:
6772 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6773 break;
6774
6775 case BFD_RELOC_32:
6776 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6777 break;
6778
6779 case BFD_RELOC_16:
6780 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6781 break;
6782
6783 /* Some of course are already pc-relative. */
6784 case BFD_RELOC_LO16_PCREL:
6785 case BFD_RELOC_HI16_PCREL:
6786 case BFD_RELOC_HI16_S_PCREL:
6787 case BFD_RELOC_64_PCREL:
6788 case BFD_RELOC_32_PCREL:
6789 case BFD_RELOC_16_PCREL:
6790 case BFD_RELOC_PPC_B16:
6791 case BFD_RELOC_PPC_B16_BRTAKEN:
6792 case BFD_RELOC_PPC_B16_BRNTAKEN:
6793 case BFD_RELOC_PPC_B26:
6794 case BFD_RELOC_PPC_LOCAL24PC:
6795 case BFD_RELOC_24_PLT_PCREL:
6796 case BFD_RELOC_32_PLT_PCREL:
6797 case BFD_RELOC_64_PLT_PCREL:
6798 case BFD_RELOC_PPC_VLE_REL8:
6799 case BFD_RELOC_PPC_VLE_REL15:
6800 case BFD_RELOC_PPC_VLE_REL24:
6801 break;
6802
6803 default:
6804 if (fixP->fx_addsy)
6805 {
6806 char *sfile;
6807 unsigned int sline;
6808
6809 /* Use expr_symbol_where to see if this is an
6810 expression symbol. */
6811 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6812 as_bad_where (fixP->fx_file, fixP->fx_line,
6813 _("unresolved expression that must"
6814 " be resolved"));
6815 else
6816 as_bad_where (fixP->fx_file, fixP->fx_line,
6817 _("cannot emit PC relative %s relocation"
6818 " against %s"),
6819 bfd_get_reloc_code_name (fixP->fx_r_type),
6820 S_GET_NAME (fixP->fx_addsy));
6821 }
6822 else
6823 as_bad_where (fixP->fx_file, fixP->fx_line,
6824 _("unable to resolve expression"));
6825 fixP->fx_done = 1;
6826 break;
6827 }
6828 }
6829
6830 #ifdef OBJ_ELF
6831 ppc_elf_validate_fix (fixP, seg);
6832 fixP->fx_addnumber = value;
6833
6834 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6835 from the section contents. If we are going to be emitting a reloc
6836 then the section contents are immaterial, so don't warn if they
6837 happen to overflow. Leave such warnings to ld. */
6838 if (!fixP->fx_done)
6839 {
6840 fixP->fx_no_overflow = 1;
6841
6842 /* Arrange to emit .TOC. as a normal symbol if used in anything
6843 but .TOC.@tocbase. */
6844 if (ppc_obj64
6845 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
6846 && fixP->fx_addsy != NULL
6847 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
6848 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
6849 }
6850 #else
6851 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6852 fixP->fx_addnumber = 0;
6853 else
6854 {
6855 #ifdef TE_PE
6856 fixP->fx_addnumber = 0;
6857 #else
6858 /* We want to use the offset within the toc, not the actual VMA
6859 of the symbol. */
6860 fixP->fx_addnumber =
6861 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6862 - S_GET_VALUE (ppc_toc_csect);
6863 #endif
6864 }
6865 #endif
6866 }
6867
6868 /* Generate a reloc for a fixup. */
6869
6870 arelent *
6871 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6872 {
6873 arelent *reloc;
6874
6875 reloc = (arelent *) xmalloc (sizeof (arelent));
6876
6877 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6878 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6879 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6880 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6881 if (reloc->howto == (reloc_howto_type *) NULL)
6882 {
6883 as_bad_where (fixp->fx_file, fixp->fx_line,
6884 _("reloc %d not supported by object file format"),
6885 (int) fixp->fx_r_type);
6886 return NULL;
6887 }
6888 reloc->addend = fixp->fx_addnumber;
6889
6890 return reloc;
6891 }
6892
6893 void
6894 ppc_cfi_frame_initial_instructions (void)
6895 {
6896 cfi_add_CFA_def_cfa (1, 0);
6897 }
6898
6899 int
6900 tc_ppc_regname_to_dw2regnum (char *regname)
6901 {
6902 unsigned int regnum = -1;
6903 unsigned int i;
6904 const char *p;
6905 char *q;
6906 static struct { char *name; int dw2regnum; } regnames[] =
6907 {
6908 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6909 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6910 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6911 { "spe_acc", 111 }, { "spefscr", 112 }
6912 };
6913
6914 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6915 if (strcmp (regnames[i].name, regname) == 0)
6916 return regnames[i].dw2regnum;
6917
6918 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6919 {
6920 p = regname + 1 + (regname[1] == '.');
6921 regnum = strtoul (p, &q, 10);
6922 if (p == q || *q || regnum >= 32)
6923 return -1;
6924 if (regname[0] == 'f')
6925 regnum += 32;
6926 else if (regname[0] == 'v')
6927 regnum += 77;
6928 }
6929 else if (regname[0] == 'c' && regname[1] == 'r')
6930 {
6931 p = regname + 2 + (regname[2] == '.');
6932 if (p[0] < '0' || p[0] > '7' || p[1])
6933 return -1;
6934 regnum = p[0] - '0' + 68;
6935 }
6936 return regnum;
6937 }
GDB Binutils - Deliverables
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