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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "dw2gencfi.h"
27 #include "opcode/ppc.h"
28
29 #ifdef OBJ_ELF
30 #include "elf/ppc.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40 /* Tell the main code what the endianness is. */
41 extern int target_big_endian;
42
43 /* Whether or not, we've set target_big_endian. */
44 static int set_target_endian = 0;
45
46 /* Whether to use user friendly register names. */
47 #ifndef TARGET_REG_NAMES_P
48 #ifdef TE_PE
49 #define TARGET_REG_NAMES_P TRUE
50 #else
51 #define TARGET_REG_NAMES_P FALSE
52 #endif
53 #endif
54
55 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58 /* #lo(value) denotes the least significant 16 bits of the indicated. */
59 #define PPC_LO(v) ((v) & 0xffff)
60
61 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
62 #define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
67 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
68
69 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
70 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
71
72 /* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
74 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
75
76 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
77 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
78
79 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
80 compensating for #lo being treated as a signed number. */
81 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
82
83 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
85 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
86
87 static void ppc_macro (char *, const struct powerpc_macro *);
88 static void ppc_byte (int);
89
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
93 #endif
94
95 #ifdef OBJ_XCOFF
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_change_csect (symbolS *, offsetT);
108 static void ppc_function (int);
109 static void ppc_extern (int);
110 static void ppc_lglobl (int);
111 static void ppc_ref (int);
112 static void ppc_section (int);
113 static void ppc_named_section (int);
114 static void ppc_stabx (int);
115 static void ppc_rename (int);
116 static void ppc_toc (int);
117 static void ppc_xcoff_cons (int);
118 static void ppc_vbyte (int);
119 #endif
120
121 #ifdef OBJ_ELF
122 static void ppc_elf_cons (int);
123 static void ppc_elf_rdata (int);
124 static void ppc_elf_lcomm (int);
125 #endif
126
127 #ifdef TE_PE
128 static void ppc_previous (int);
129 static void ppc_pdata (int);
130 static void ppc_ydata (int);
131 static void ppc_reldata (int);
132 static void ppc_rdata (int);
133 static void ppc_ualong (int);
134 static void ppc_znop (int);
135 static void ppc_pe_comm (int);
136 static void ppc_pe_section (int);
137 static void ppc_pe_function (int);
138 static void ppc_pe_tocd (int);
139 #endif
140 \f
141 /* Generic assembler global variables which must be defined by all
142 targets. */
143
144 #ifdef OBJ_ELF
145 /* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149 static const char ppc_solaris_comment_chars[] = "#!";
150 static const char ppc_eabi_comment_chars[] = "#";
151
152 #ifdef TARGET_SOLARIS_COMMENT
153 const char *ppc_comment_chars = ppc_solaris_comment_chars;
154 #else
155 const char *ppc_comment_chars = ppc_eabi_comment_chars;
156 #endif
157 #else
158 const char comment_chars[] = "#";
159 #endif
160
161 /* Characters which start a comment at the beginning of a line. */
162 const char line_comment_chars[] = "#";
163
164 /* Characters which may be used to separate multiple commands on a
165 single line. */
166 const char line_separator_chars[] = ";";
167
168 /* Characters which are used to indicate an exponent in a floating
169 point number. */
170 const char EXP_CHARS[] = "eE";
171
172 /* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174 const char FLT_CHARS[] = "dD";
175
176 /* Anything that can start an operand needs to be mentioned here,
177 to stop the input scrubber eating whitespace. */
178 const char ppc_symbol_chars[] = "%[";
179
180 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181 int ppc_cie_data_alignment;
182
183 /* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
185 ppc_cpu_t ppc_cpu = 0;
186 \f
187 /* The target specific pseudo-ops which we support. */
188
189 const pseudo_typeS md_pseudo_table[] =
190 {
191 /* Pseudo-ops which must be overridden. */
192 { "byte", ppc_byte, 0 },
193
194 #ifdef OBJ_XCOFF
195 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
196 legitimately belong in the obj-*.c file. However, XCOFF is based
197 on COFF, and is only implemented for the RS/6000. We just use
198 obj-coff.c, and add what we need here. */
199 { "comm", ppc_comm, 0 },
200 { "lcomm", ppc_comm, 1 },
201 { "bb", ppc_bb, 0 },
202 { "bc", ppc_bc, 0 },
203 { "bf", ppc_bf, 0 },
204 { "bi", ppc_biei, 0 },
205 { "bs", ppc_bs, 0 },
206 { "csect", ppc_csect, 0 },
207 { "data", ppc_section, 'd' },
208 { "eb", ppc_eb, 0 },
209 { "ec", ppc_ec, 0 },
210 { "ef", ppc_ef, 0 },
211 { "ei", ppc_biei, 1 },
212 { "es", ppc_es, 0 },
213 { "extern", ppc_extern, 0 },
214 { "function", ppc_function, 0 },
215 { "lglobl", ppc_lglobl, 0 },
216 { "ref", ppc_ref, 0 },
217 { "rename", ppc_rename, 0 },
218 { "section", ppc_named_section, 0 },
219 { "stabx", ppc_stabx, 0 },
220 { "text", ppc_section, 't' },
221 { "toc", ppc_toc, 0 },
222 { "long", ppc_xcoff_cons, 2 },
223 { "llong", ppc_xcoff_cons, 3 },
224 { "word", ppc_xcoff_cons, 1 },
225 { "short", ppc_xcoff_cons, 1 },
226 { "vbyte", ppc_vbyte, 0 },
227 #endif
228
229 #ifdef OBJ_ELF
230 { "llong", ppc_elf_cons, 8 },
231 { "quad", ppc_elf_cons, 8 },
232 { "long", ppc_elf_cons, 4 },
233 { "word", ppc_elf_cons, 2 },
234 { "short", ppc_elf_cons, 2 },
235 { "rdata", ppc_elf_rdata, 0 },
236 { "rodata", ppc_elf_rdata, 0 },
237 { "lcomm", ppc_elf_lcomm, 0 },
238 #endif
239
240 #ifdef TE_PE
241 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
242 { "previous", ppc_previous, 0 },
243 { "pdata", ppc_pdata, 0 },
244 { "ydata", ppc_ydata, 0 },
245 { "reldata", ppc_reldata, 0 },
246 { "rdata", ppc_rdata, 0 },
247 { "ualong", ppc_ualong, 0 },
248 { "znop", ppc_znop, 0 },
249 { "comm", ppc_pe_comm, 0 },
250 { "lcomm", ppc_pe_comm, 1 },
251 { "section", ppc_pe_section, 0 },
252 { "function", ppc_pe_function,0 },
253 { "tocd", ppc_pe_tocd, 0 },
254 #endif
255
256 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
257 { "tc", ppc_tc, 0 },
258 { "machine", ppc_machine, 0 },
259 #endif
260
261 { NULL, NULL, 0 }
262 };
263
264 \f
265 /* Predefined register names if -mregnames (or default for Windows NT).
266 In general, there are lots of them, in an attempt to be compatible
267 with a number of other Windows NT assemblers. */
268
269 /* Structure to hold information about predefined registers. */
270 struct pd_reg
271 {
272 char *name;
273 int value;
274 };
275
276 /* List of registers that are pre-defined:
277
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
281
282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
285
286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
289
290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
293
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
297 fpscr has the value 0
298 xer has the value 1
299 lr has the value 8
300 ctr has the value 9
301 pmr has the value 0
302 dar has the value 19
303 dsisr has the value 18
304 dec has the value 22
305 sdr1 has the value 25
306 srr0 has the value 26
307 srr1 has the value 27
308
309 The table is sorted. Suitable for searching by a binary search. */
310
311 static const struct pd_reg pre_defined_registers[] =
312 {
313 { "cr.0", 0 }, /* Condition Registers */
314 { "cr.1", 1 },
315 { "cr.2", 2 },
316 { "cr.3", 3 },
317 { "cr.4", 4 },
318 { "cr.5", 5 },
319 { "cr.6", 6 },
320 { "cr.7", 7 },
321
322 { "cr0", 0 },
323 { "cr1", 1 },
324 { "cr2", 2 },
325 { "cr3", 3 },
326 { "cr4", 4 },
327 { "cr5", 5 },
328 { "cr6", 6 },
329 { "cr7", 7 },
330
331 { "ctr", 9 },
332
333 { "dar", 19 }, /* Data Access Register */
334 { "dec", 22 }, /* Decrementer */
335 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
336
337 { "f.0", 0 }, /* Floating point registers */
338 { "f.1", 1 },
339 { "f.10", 10 },
340 { "f.11", 11 },
341 { "f.12", 12 },
342 { "f.13", 13 },
343 { "f.14", 14 },
344 { "f.15", 15 },
345 { "f.16", 16 },
346 { "f.17", 17 },
347 { "f.18", 18 },
348 { "f.19", 19 },
349 { "f.2", 2 },
350 { "f.20", 20 },
351 { "f.21", 21 },
352 { "f.22", 22 },
353 { "f.23", 23 },
354 { "f.24", 24 },
355 { "f.25", 25 },
356 { "f.26", 26 },
357 { "f.27", 27 },
358 { "f.28", 28 },
359 { "f.29", 29 },
360 { "f.3", 3 },
361 { "f.30", 30 },
362 { "f.31", 31 },
363
364 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
365 { "f.33", 33 },
366 { "f.34", 34 },
367 { "f.35", 35 },
368 { "f.36", 36 },
369 { "f.37", 37 },
370 { "f.38", 38 },
371 { "f.39", 39 },
372 { "f.4", 4 },
373 { "f.40", 40 },
374 { "f.41", 41 },
375 { "f.42", 42 },
376 { "f.43", 43 },
377 { "f.44", 44 },
378 { "f.45", 45 },
379 { "f.46", 46 },
380 { "f.47", 47 },
381 { "f.48", 48 },
382 { "f.49", 49 },
383 { "f.5", 5 },
384 { "f.50", 50 },
385 { "f.51", 51 },
386 { "f.52", 52 },
387 { "f.53", 53 },
388 { "f.54", 54 },
389 { "f.55", 55 },
390 { "f.56", 56 },
391 { "f.57", 57 },
392 { "f.58", 58 },
393 { "f.59", 59 },
394 { "f.6", 6 },
395 { "f.60", 60 },
396 { "f.61", 61 },
397 { "f.62", 62 },
398 { "f.63", 63 },
399 { "f.7", 7 },
400 { "f.8", 8 },
401 { "f.9", 9 },
402
403 { "f0", 0 },
404 { "f1", 1 },
405 { "f10", 10 },
406 { "f11", 11 },
407 { "f12", 12 },
408 { "f13", 13 },
409 { "f14", 14 },
410 { "f15", 15 },
411 { "f16", 16 },
412 { "f17", 17 },
413 { "f18", 18 },
414 { "f19", 19 },
415 { "f2", 2 },
416 { "f20", 20 },
417 { "f21", 21 },
418 { "f22", 22 },
419 { "f23", 23 },
420 { "f24", 24 },
421 { "f25", 25 },
422 { "f26", 26 },
423 { "f27", 27 },
424 { "f28", 28 },
425 { "f29", 29 },
426 { "f3", 3 },
427 { "f30", 30 },
428 { "f31", 31 },
429
430 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
431 { "f33", 33 },
432 { "f34", 34 },
433 { "f35", 35 },
434 { "f36", 36 },
435 { "f37", 37 },
436 { "f38", 38 },
437 { "f39", 39 },
438 { "f4", 4 },
439 { "f40", 40 },
440 { "f41", 41 },
441 { "f42", 42 },
442 { "f43", 43 },
443 { "f44", 44 },
444 { "f45", 45 },
445 { "f46", 46 },
446 { "f47", 47 },
447 { "f48", 48 },
448 { "f49", 49 },
449 { "f5", 5 },
450 { "f50", 50 },
451 { "f51", 51 },
452 { "f52", 52 },
453 { "f53", 53 },
454 { "f54", 54 },
455 { "f55", 55 },
456 { "f56", 56 },
457 { "f57", 57 },
458 { "f58", 58 },
459 { "f59", 59 },
460 { "f6", 6 },
461 { "f60", 60 },
462 { "f61", 61 },
463 { "f62", 62 },
464 { "f63", 63 },
465 { "f7", 7 },
466 { "f8", 8 },
467 { "f9", 9 },
468
469 { "fpscr", 0 },
470
471 /* Quantization registers used with pair single instructions. */
472 { "gqr.0", 0 },
473 { "gqr.1", 1 },
474 { "gqr.2", 2 },
475 { "gqr.3", 3 },
476 { "gqr.4", 4 },
477 { "gqr.5", 5 },
478 { "gqr.6", 6 },
479 { "gqr.7", 7 },
480 { "gqr0", 0 },
481 { "gqr1", 1 },
482 { "gqr2", 2 },
483 { "gqr3", 3 },
484 { "gqr4", 4 },
485 { "gqr5", 5 },
486 { "gqr6", 6 },
487 { "gqr7", 7 },
488
489 { "lr", 8 }, /* Link Register */
490
491 { "pmr", 0 },
492
493 { "r.0", 0 }, /* General Purpose Registers */
494 { "r.1", 1 },
495 { "r.10", 10 },
496 { "r.11", 11 },
497 { "r.12", 12 },
498 { "r.13", 13 },
499 { "r.14", 14 },
500 { "r.15", 15 },
501 { "r.16", 16 },
502 { "r.17", 17 },
503 { "r.18", 18 },
504 { "r.19", 19 },
505 { "r.2", 2 },
506 { "r.20", 20 },
507 { "r.21", 21 },
508 { "r.22", 22 },
509 { "r.23", 23 },
510 { "r.24", 24 },
511 { "r.25", 25 },
512 { "r.26", 26 },
513 { "r.27", 27 },
514 { "r.28", 28 },
515 { "r.29", 29 },
516 { "r.3", 3 },
517 { "r.30", 30 },
518 { "r.31", 31 },
519 { "r.4", 4 },
520 { "r.5", 5 },
521 { "r.6", 6 },
522 { "r.7", 7 },
523 { "r.8", 8 },
524 { "r.9", 9 },
525
526 { "r.sp", 1 }, /* Stack Pointer */
527
528 { "r.toc", 2 }, /* Pointer to the table of contents */
529
530 { "r0", 0 }, /* More general purpose registers */
531 { "r1", 1 },
532 { "r10", 10 },
533 { "r11", 11 },
534 { "r12", 12 },
535 { "r13", 13 },
536 { "r14", 14 },
537 { "r15", 15 },
538 { "r16", 16 },
539 { "r17", 17 },
540 { "r18", 18 },
541 { "r19", 19 },
542 { "r2", 2 },
543 { "r20", 20 },
544 { "r21", 21 },
545 { "r22", 22 },
546 { "r23", 23 },
547 { "r24", 24 },
548 { "r25", 25 },
549 { "r26", 26 },
550 { "r27", 27 },
551 { "r28", 28 },
552 { "r29", 29 },
553 { "r3", 3 },
554 { "r30", 30 },
555 { "r31", 31 },
556 { "r4", 4 },
557 { "r5", 5 },
558 { "r6", 6 },
559 { "r7", 7 },
560 { "r8", 8 },
561 { "r9", 9 },
562
563 { "rtoc", 2 }, /* Table of contents */
564
565 { "sdr1", 25 }, /* Storage Description Register 1 */
566
567 { "sp", 1 },
568
569 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
570 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
571
572 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
573 { "v.1", 1 },
574 { "v.10", 10 },
575 { "v.11", 11 },
576 { "v.12", 12 },
577 { "v.13", 13 },
578 { "v.14", 14 },
579 { "v.15", 15 },
580 { "v.16", 16 },
581 { "v.17", 17 },
582 { "v.18", 18 },
583 { "v.19", 19 },
584 { "v.2", 2 },
585 { "v.20", 20 },
586 { "v.21", 21 },
587 { "v.22", 22 },
588 { "v.23", 23 },
589 { "v.24", 24 },
590 { "v.25", 25 },
591 { "v.26", 26 },
592 { "v.27", 27 },
593 { "v.28", 28 },
594 { "v.29", 29 },
595 { "v.3", 3 },
596 { "v.30", 30 },
597 { "v.31", 31 },
598 { "v.4", 4 },
599 { "v.5", 5 },
600 { "v.6", 6 },
601 { "v.7", 7 },
602 { "v.8", 8 },
603 { "v.9", 9 },
604
605 { "v0", 0 },
606 { "v1", 1 },
607 { "v10", 10 },
608 { "v11", 11 },
609 { "v12", 12 },
610 { "v13", 13 },
611 { "v14", 14 },
612 { "v15", 15 },
613 { "v16", 16 },
614 { "v17", 17 },
615 { "v18", 18 },
616 { "v19", 19 },
617 { "v2", 2 },
618 { "v20", 20 },
619 { "v21", 21 },
620 { "v22", 22 },
621 { "v23", 23 },
622 { "v24", 24 },
623 { "v25", 25 },
624 { "v26", 26 },
625 { "v27", 27 },
626 { "v28", 28 },
627 { "v29", 29 },
628 { "v3", 3 },
629 { "v30", 30 },
630 { "v31", 31 },
631 { "v4", 4 },
632 { "v5", 5 },
633 { "v6", 6 },
634 { "v7", 7 },
635 { "v8", 8 },
636 { "v9", 9 },
637
638 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
639 { "vs.1", 1 },
640 { "vs.10", 10 },
641 { "vs.11", 11 },
642 { "vs.12", 12 },
643 { "vs.13", 13 },
644 { "vs.14", 14 },
645 { "vs.15", 15 },
646 { "vs.16", 16 },
647 { "vs.17", 17 },
648 { "vs.18", 18 },
649 { "vs.19", 19 },
650 { "vs.2", 2 },
651 { "vs.20", 20 },
652 { "vs.21", 21 },
653 { "vs.22", 22 },
654 { "vs.23", 23 },
655 { "vs.24", 24 },
656 { "vs.25", 25 },
657 { "vs.26", 26 },
658 { "vs.27", 27 },
659 { "vs.28", 28 },
660 { "vs.29", 29 },
661 { "vs.3", 3 },
662 { "vs.30", 30 },
663 { "vs.31", 31 },
664 { "vs.32", 32 },
665 { "vs.33", 33 },
666 { "vs.34", 34 },
667 { "vs.35", 35 },
668 { "vs.36", 36 },
669 { "vs.37", 37 },
670 { "vs.38", 38 },
671 { "vs.39", 39 },
672 { "vs.4", 4 },
673 { "vs.40", 40 },
674 { "vs.41", 41 },
675 { "vs.42", 42 },
676 { "vs.43", 43 },
677 { "vs.44", 44 },
678 { "vs.45", 45 },
679 { "vs.46", 46 },
680 { "vs.47", 47 },
681 { "vs.48", 48 },
682 { "vs.49", 49 },
683 { "vs.5", 5 },
684 { "vs.50", 50 },
685 { "vs.51", 51 },
686 { "vs.52", 52 },
687 { "vs.53", 53 },
688 { "vs.54", 54 },
689 { "vs.55", 55 },
690 { "vs.56", 56 },
691 { "vs.57", 57 },
692 { "vs.58", 58 },
693 { "vs.59", 59 },
694 { "vs.6", 6 },
695 { "vs.60", 60 },
696 { "vs.61", 61 },
697 { "vs.62", 62 },
698 { "vs.63", 63 },
699 { "vs.7", 7 },
700 { "vs.8", 8 },
701 { "vs.9", 9 },
702
703 { "vs0", 0 },
704 { "vs1", 1 },
705 { "vs10", 10 },
706 { "vs11", 11 },
707 { "vs12", 12 },
708 { "vs13", 13 },
709 { "vs14", 14 },
710 { "vs15", 15 },
711 { "vs16", 16 },
712 { "vs17", 17 },
713 { "vs18", 18 },
714 { "vs19", 19 },
715 { "vs2", 2 },
716 { "vs20", 20 },
717 { "vs21", 21 },
718 { "vs22", 22 },
719 { "vs23", 23 },
720 { "vs24", 24 },
721 { "vs25", 25 },
722 { "vs26", 26 },
723 { "vs27", 27 },
724 { "vs28", 28 },
725 { "vs29", 29 },
726 { "vs3", 3 },
727 { "vs30", 30 },
728 { "vs31", 31 },
729 { "vs32", 32 },
730 { "vs33", 33 },
731 { "vs34", 34 },
732 { "vs35", 35 },
733 { "vs36", 36 },
734 { "vs37", 37 },
735 { "vs38", 38 },
736 { "vs39", 39 },
737 { "vs4", 4 },
738 { "vs40", 40 },
739 { "vs41", 41 },
740 { "vs42", 42 },
741 { "vs43", 43 },
742 { "vs44", 44 },
743 { "vs45", 45 },
744 { "vs46", 46 },
745 { "vs47", 47 },
746 { "vs48", 48 },
747 { "vs49", 49 },
748 { "vs5", 5 },
749 { "vs50", 50 },
750 { "vs51", 51 },
751 { "vs52", 52 },
752 { "vs53", 53 },
753 { "vs54", 54 },
754 { "vs55", 55 },
755 { "vs56", 56 },
756 { "vs57", 57 },
757 { "vs58", 58 },
758 { "vs59", 59 },
759 { "vs6", 6 },
760 { "vs60", 60 },
761 { "vs61", 61 },
762 { "vs62", 62 },
763 { "vs63", 63 },
764 { "vs7", 7 },
765 { "vs8", 8 },
766 { "vs9", 9 },
767
768 { "xer", 1 },
769
770 };
771
772 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
773
774 /* Given NAME, find the register number associated with that name, return
775 the integer value associated with the given name or -1 on failure. */
776
777 static int
778 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
779 {
780 int middle, low, high;
781 int cmp;
782
783 low = 0;
784 high = regcount - 1;
785
786 do
787 {
788 middle = (low + high) / 2;
789 cmp = strcasecmp (name, regs[middle].name);
790 if (cmp < 0)
791 high = middle - 1;
792 else if (cmp > 0)
793 low = middle + 1;
794 else
795 return regs[middle].value;
796 }
797 while (low <= high);
798
799 return -1;
800 }
801
802 /*
803 * Summary of register_name.
804 *
805 * in: Input_line_pointer points to 1st char of operand.
806 *
807 * out: A expressionS.
808 * The operand may have been a register: in this case, X_op == O_register,
809 * X_add_number is set to the register number, and truth is returned.
810 * Input_line_pointer->(next non-blank) char after operand, or is in its
811 * original state.
812 */
813
814 static bfd_boolean
815 register_name (expressionS *expressionP)
816 {
817 int reg_number;
818 char *name;
819 char *start;
820 char c;
821
822 /* Find the spelling of the operand. */
823 start = name = input_line_pointer;
824 if (name[0] == '%' && ISALPHA (name[1]))
825 name = ++input_line_pointer;
826
827 else if (!reg_names_p || !ISALPHA (name[0]))
828 return FALSE;
829
830 c = get_symbol_end ();
831 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
832
833 /* Put back the delimiting char. */
834 *input_line_pointer = c;
835
836 /* Look to see if it's in the register table. */
837 if (reg_number >= 0)
838 {
839 expressionP->X_op = O_register;
840 expressionP->X_add_number = reg_number;
841
842 /* Make the rest nice. */
843 expressionP->X_add_symbol = NULL;
844 expressionP->X_op_symbol = NULL;
845 return TRUE;
846 }
847
848 /* Reset the line as if we had not done anything. */
849 input_line_pointer = start;
850 return FALSE;
851 }
852 \f
853 /* This function is called for each symbol seen in an expression. It
854 handles the special parsing which PowerPC assemblers are supposed
855 to use for condition codes. */
856
857 /* Whether to do the special parsing. */
858 static bfd_boolean cr_operand;
859
860 /* Names to recognize in a condition code. This table is sorted. */
861 static const struct pd_reg cr_names[] =
862 {
863 { "cr0", 0 },
864 { "cr1", 1 },
865 { "cr2", 2 },
866 { "cr3", 3 },
867 { "cr4", 4 },
868 { "cr5", 5 },
869 { "cr6", 6 },
870 { "cr7", 7 },
871 { "eq", 2 },
872 { "gt", 1 },
873 { "lt", 0 },
874 { "so", 3 },
875 { "un", 3 }
876 };
877
878 /* Parsing function. This returns non-zero if it recognized an
879 expression. */
880
881 int
882 ppc_parse_name (const char *name, expressionS *exp)
883 {
884 int val;
885
886 if (! cr_operand)
887 return 0;
888
889 if (*name == '%')
890 ++name;
891 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
892 name);
893 if (val < 0)
894 return 0;
895
896 exp->X_op = O_constant;
897 exp->X_add_number = val;
898
899 return 1;
900 }
901 \f
902 /* Local variables. */
903
904 /* Whether to target xcoff64/elf64. */
905 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
906
907 /* Opcode hash table. */
908 static struct hash_control *ppc_hash;
909
910 /* Macro hash table. */
911 static struct hash_control *ppc_macro_hash;
912
913 #ifdef OBJ_ELF
914 /* What type of shared library support to use. */
915 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
916
917 /* Flags to set in the elf header. */
918 static flagword ppc_flags = 0;
919
920 /* Whether this is Solaris or not. */
921 #ifdef TARGET_SOLARIS_COMMENT
922 #define SOLARIS_P TRUE
923 #else
924 #define SOLARIS_P FALSE
925 #endif
926
927 static bfd_boolean msolaris = SOLARIS_P;
928 #endif
929
930 #ifdef OBJ_XCOFF
931
932 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
933 using a bunch of different sections. These assembler sections,
934 however, are all encompassed within the .text or .data sections of
935 the final output file. We handle this by using different
936 subsegments within these main segments. */
937
938 /* Next subsegment to allocate within the .text segment. */
939 static subsegT ppc_text_subsegment = 2;
940
941 /* Linked list of csects in the text section. */
942 static symbolS *ppc_text_csects;
943
944 /* Next subsegment to allocate within the .data segment. */
945 static subsegT ppc_data_subsegment = 2;
946
947 /* Linked list of csects in the data section. */
948 static symbolS *ppc_data_csects;
949
950 /* The current csect. */
951 static symbolS *ppc_current_csect;
952
953 /* The RS/6000 assembler uses a TOC which holds addresses of functions
954 and variables. Symbols are put in the TOC with the .tc pseudo-op.
955 A special relocation is used when accessing TOC entries. We handle
956 the TOC as a subsegment within the .data segment. We set it up if
957 we see a .toc pseudo-op, and save the csect symbol here. */
958 static symbolS *ppc_toc_csect;
959
960 /* The first frag in the TOC subsegment. */
961 static fragS *ppc_toc_frag;
962
963 /* The first frag in the first subsegment after the TOC in the .data
964 segment. NULL if there are no subsegments after the TOC. */
965 static fragS *ppc_after_toc_frag;
966
967 /* The current static block. */
968 static symbolS *ppc_current_block;
969
970 /* The COFF debugging section; set by md_begin. This is not the
971 .debug section, but is instead the secret BFD section which will
972 cause BFD to set the section number of a symbol to N_DEBUG. */
973 static asection *ppc_coff_debug_section;
974
975 #endif /* OBJ_XCOFF */
976
977 #ifdef TE_PE
978
979 /* Various sections that we need for PE coff support. */
980 static segT ydata_section;
981 static segT pdata_section;
982 static segT reldata_section;
983 static segT rdata_section;
984 static segT tocdata_section;
985
986 /* The current section and the previous section. See ppc_previous. */
987 static segT ppc_previous_section;
988 static segT ppc_current_section;
989
990 #endif /* TE_PE */
991
992 #ifdef OBJ_ELF
993 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
994 #define PPC_APUINFO_ISEL 0x40
995 #define PPC_APUINFO_PMR 0x41
996 #define PPC_APUINFO_RFMCI 0x42
997 #define PPC_APUINFO_CACHELCK 0x43
998 #define PPC_APUINFO_SPE 0x100
999 #define PPC_APUINFO_EFS 0x101
1000 #define PPC_APUINFO_BRLOCK 0x102
1001
1002 /*
1003 * We keep a list of APUinfo
1004 */
1005 unsigned long *ppc_apuinfo_list;
1006 unsigned int ppc_apuinfo_num;
1007 unsigned int ppc_apuinfo_num_alloc;
1008 #endif /* OBJ_ELF */
1009 \f
1010 #ifdef OBJ_ELF
1011 const char *const md_shortopts = "b:l:usm:K:VQ:";
1012 #else
1013 const char *const md_shortopts = "um:";
1014 #endif
1015 const struct option md_longopts[] = {
1016 {NULL, no_argument, NULL, 0}
1017 };
1018 const size_t md_longopts_size = sizeof (md_longopts);
1019
1020 int
1021 md_parse_option (int c, char *arg)
1022 {
1023 ppc_cpu_t new_cpu;
1024
1025 switch (c)
1026 {
1027 case 'u':
1028 /* -u means that any undefined symbols should be treated as
1029 external, which is the default for gas anyhow. */
1030 break;
1031
1032 #ifdef OBJ_ELF
1033 case 'l':
1034 /* Solaris as takes -le (presumably for little endian). For completeness
1035 sake, recognize -be also. */
1036 if (strcmp (arg, "e") == 0)
1037 {
1038 target_big_endian = 0;
1039 set_target_endian = 1;
1040 }
1041 else
1042 return 0;
1043
1044 break;
1045
1046 case 'b':
1047 if (strcmp (arg, "e") == 0)
1048 {
1049 target_big_endian = 1;
1050 set_target_endian = 1;
1051 }
1052 else
1053 return 0;
1054
1055 break;
1056
1057 case 'K':
1058 /* Recognize -K PIC. */
1059 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1060 {
1061 shlib = SHLIB_PIC;
1062 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1063 }
1064 else
1065 return 0;
1066
1067 break;
1068 #endif
1069
1070 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1071 case 'a':
1072 if (strcmp (arg, "64") == 0)
1073 {
1074 #ifdef BFD64
1075 ppc_obj64 = 1;
1076 #else
1077 as_fatal (_("%s unsupported"), "-a64");
1078 #endif
1079 }
1080 else if (strcmp (arg, "32") == 0)
1081 ppc_obj64 = 0;
1082 else
1083 return 0;
1084 break;
1085
1086 case 'm':
1087 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1088 ppc_cpu = new_cpu;
1089
1090 else if (strcmp (arg, "regnames") == 0)
1091 reg_names_p = TRUE;
1092
1093 else if (strcmp (arg, "no-regnames") == 0)
1094 reg_names_p = FALSE;
1095
1096 #ifdef OBJ_ELF
1097 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1098 that require relocation. */
1099 else if (strcmp (arg, "relocatable") == 0)
1100 {
1101 shlib = SHLIB_MRELOCATABLE;
1102 ppc_flags |= EF_PPC_RELOCATABLE;
1103 }
1104
1105 else if (strcmp (arg, "relocatable-lib") == 0)
1106 {
1107 shlib = SHLIB_MRELOCATABLE;
1108 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1109 }
1110
1111 /* -memb, set embedded bit. */
1112 else if (strcmp (arg, "emb") == 0)
1113 ppc_flags |= EF_PPC_EMB;
1114
1115 /* -mlittle/-mbig set the endianess. */
1116 else if (strcmp (arg, "little") == 0
1117 || strcmp (arg, "little-endian") == 0)
1118 {
1119 target_big_endian = 0;
1120 set_target_endian = 1;
1121 }
1122
1123 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1124 {
1125 target_big_endian = 1;
1126 set_target_endian = 1;
1127 }
1128
1129 else if (strcmp (arg, "solaris") == 0)
1130 {
1131 msolaris = TRUE;
1132 ppc_comment_chars = ppc_solaris_comment_chars;
1133 }
1134
1135 else if (strcmp (arg, "no-solaris") == 0)
1136 {
1137 msolaris = FALSE;
1138 ppc_comment_chars = ppc_eabi_comment_chars;
1139 }
1140 #endif
1141 else
1142 {
1143 as_bad (_("invalid switch -m%s"), arg);
1144 return 0;
1145 }
1146 break;
1147
1148 #ifdef OBJ_ELF
1149 /* -V: SVR4 argument to print version ID. */
1150 case 'V':
1151 print_version_id ();
1152 break;
1153
1154 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1155 should be emitted or not. FIXME: Not implemented. */
1156 case 'Q':
1157 break;
1158
1159 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1160 rather than .stabs.excl, which is ignored by the linker.
1161 FIXME: Not implemented. */
1162 case 's':
1163 if (arg)
1164 return 0;
1165
1166 break;
1167 #endif
1168
1169 default:
1170 return 0;
1171 }
1172
1173 return 1;
1174 }
1175
1176 void
1177 md_show_usage (FILE *stream)
1178 {
1179 fprintf (stream, _("\
1180 PowerPC options:\n\
1181 -a32 generate ELF32/XCOFF32\n\
1182 -a64 generate ELF64/XCOFF64\n\
1183 -u ignored\n\
1184 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1185 -mpwr generate code for POWER (RIOS1)\n\
1186 -m601 generate code for PowerPC 601\n\
1187 -mppc, -mppc32, -m603, -m604\n\
1188 generate code for PowerPC 603/604\n\
1189 -m403 generate code for PowerPC 403\n\
1190 -m405 generate code for PowerPC 405\n\
1191 -m440 generate code for PowerPC 440\n\
1192 -m464 generate code for PowerPC 464\n\
1193 -m476 generate code for PowerPC 476\n\
1194 -m7400, -m7410, -m7450, -m7455\n\
1195 generate code for PowerPC 7400/7410/7450/7455\n\
1196 -m750cl generate code for PowerPC 750cl\n"));
1197 fprintf (stream, _("\
1198 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1199 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1200 -mbooke generate code for 32-bit PowerPC BookE\n\
1201 -ma2 generate code for A2 architecture\n\
1202 -mpower4 generate code for Power4 architecture\n\
1203 -mpower5 generate code for Power5 architecture\n\
1204 -mpower6 generate code for Power6 architecture\n\
1205 -mpower7 generate code for Power7 architecture\n\
1206 -mcell generate code for Cell Broadband Engine architecture\n\
1207 -mcom generate code Power/PowerPC common instructions\n\
1208 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1209 fprintf (stream, _("\
1210 -maltivec generate code for AltiVec\n\
1211 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1212 -me300 generate code for PowerPC e300 family\n\
1213 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1214 -me500mc, generate code for Freescale e500mc core complex\n\
1215 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1216 -mspe generate code for Motorola SPE instructions\n\
1217 -mtitan generate code for AppliedMicro Titan core complex\n\
1218 -mregnames Allow symbolic names for registers\n\
1219 -mno-regnames Do not allow symbolic names for registers\n"));
1220 #ifdef OBJ_ELF
1221 fprintf (stream, _("\
1222 -mrelocatable support for GCC's -mrelocatble option\n\
1223 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1224 -memb set PPC_EMB bit in ELF flags\n\
1225 -mlittle, -mlittle-endian, -l, -le\n\
1226 generate code for a little endian machine\n\
1227 -mbig, -mbig-endian, -b, -be\n\
1228 generate code for a big endian machine\n\
1229 -msolaris generate code for Solaris\n\
1230 -mno-solaris do not generate code for Solaris\n\
1231 -V print assembler version number\n\
1232 -Qy, -Qn ignored\n"));
1233 #endif
1234 }
1235 \f
1236 /* Set ppc_cpu if it is not already set. */
1237
1238 static void
1239 ppc_set_cpu (void)
1240 {
1241 const char *default_os = TARGET_OS;
1242 const char *default_cpu = TARGET_CPU;
1243
1244 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
1245 {
1246 if (ppc_obj64)
1247 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1248 else if (strncmp (default_os, "aix", 3) == 0
1249 && default_os[3] >= '4' && default_os[3] <= '9')
1250 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
1251 else if (strncmp (default_os, "aix3", 4) == 0)
1252 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1253 else if (strcmp (default_cpu, "rs6000") == 0)
1254 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1255 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1256 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1257 else
1258 as_fatal (_("Unknown default cpu = %s, os = %s"),
1259 default_cpu, default_os);
1260 }
1261 }
1262
1263 /* Figure out the BFD architecture to use. This function and ppc_mach
1264 are called well before md_begin, when the output file is opened. */
1265
1266 enum bfd_architecture
1267 ppc_arch (void)
1268 {
1269 const char *default_cpu = TARGET_CPU;
1270 ppc_set_cpu ();
1271
1272 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1273 return bfd_arch_powerpc;
1274 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1275 return bfd_arch_rs6000;
1276 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1277 {
1278 if (strcmp (default_cpu, "rs6000") == 0)
1279 return bfd_arch_rs6000;
1280 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1281 return bfd_arch_powerpc;
1282 }
1283
1284 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1285 return bfd_arch_unknown;
1286 }
1287
1288 unsigned long
1289 ppc_mach (void)
1290 {
1291 if (ppc_obj64)
1292 return bfd_mach_ppc64;
1293 else if (ppc_arch () == bfd_arch_rs6000)
1294 return bfd_mach_rs6k;
1295 else if (ppc_cpu & PPC_OPCODE_TITAN)
1296 return bfd_mach_ppc_titan;
1297 else
1298 return bfd_mach_ppc;
1299 }
1300
1301 extern char*
1302 ppc_target_format (void)
1303 {
1304 #ifdef OBJ_COFF
1305 #ifdef TE_PE
1306 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1307 #elif TE_POWERMAC
1308 return "xcoff-powermac";
1309 #else
1310 # ifdef TE_AIX5
1311 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1312 # else
1313 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1314 # endif
1315 #endif
1316 #endif
1317 #ifdef OBJ_ELF
1318 # ifdef TE_VXWORKS
1319 return "elf32-powerpc-vxworks";
1320 # else
1321 return (target_big_endian
1322 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1323 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1324 # endif
1325 #endif
1326 }
1327
1328 /* Insert opcodes and macros into hash tables. Called at startup and
1329 for .cpu pseudo. */
1330
1331 static void
1332 ppc_setup_opcodes (void)
1333 {
1334 const struct powerpc_opcode *op;
1335 const struct powerpc_opcode *op_end;
1336 const struct powerpc_macro *macro;
1337 const struct powerpc_macro *macro_end;
1338 bfd_boolean bad_insn = FALSE;
1339
1340 if (ppc_hash != NULL)
1341 hash_die (ppc_hash);
1342 if (ppc_macro_hash != NULL)
1343 hash_die (ppc_macro_hash);
1344
1345 /* Insert the opcodes into a hash table. */
1346 ppc_hash = hash_new ();
1347
1348 if (ENABLE_CHECKING)
1349 {
1350 unsigned int i;
1351
1352 /* Check operand masks. Code here and in the disassembler assumes
1353 all the 1's in the mask are contiguous. */
1354 for (i = 0; i < num_powerpc_operands; ++i)
1355 {
1356 unsigned long mask = powerpc_operands[i].bitm;
1357 unsigned long right_bit;
1358 unsigned int j;
1359
1360 right_bit = mask & -mask;
1361 mask += right_bit;
1362 right_bit = mask & -mask;
1363 if (mask != right_bit)
1364 {
1365 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1366 bad_insn = TRUE;
1367 }
1368 for (j = i + 1; j < num_powerpc_operands; ++j)
1369 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1370 sizeof (powerpc_operands[0])) == 0)
1371 {
1372 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1373 j, i);
1374 bad_insn = TRUE;
1375 }
1376 }
1377 }
1378
1379 op_end = powerpc_opcodes + powerpc_num_opcodes;
1380 for (op = powerpc_opcodes; op < op_end; op++)
1381 {
1382 if (ENABLE_CHECKING)
1383 {
1384 const unsigned char *o;
1385 unsigned long omask = op->mask;
1386
1387 if (op != powerpc_opcodes)
1388 {
1389 /* The major opcodes had better be sorted. Code in the
1390 disassembler assumes the insns are sorted according to
1391 major opcode. */
1392 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1393 {
1394 as_bad (_("major opcode is not sorted for %s"),
1395 op->name);
1396 bad_insn = TRUE;
1397 }
1398
1399 /* Warn if the table isn't more strictly ordered.
1400 Unfortunately it doesn't seem possible to order the
1401 table on much more than the major opcode, which makes
1402 it difficult to implement a binary search in the
1403 disassembler. The problem is that we have multiple
1404 ways to disassemble instructions, and we usually want
1405 to choose a more specific form (with more bits set in
1406 the opcode) than a more general form. eg. all of the
1407 following are equivalent:
1408 bne label # opcode = 0x40820000, mask = 0xff830003
1409 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1410 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1411
1412 There are also cases where the table needs to be out
1413 of order to disassemble the correct instruction for
1414 processor variants. */
1415 else if (0)
1416 {
1417 unsigned long t1 = op[0].opcode;
1418 unsigned long t2 = op[-1].opcode;
1419
1420 if (((t1 ^ t2) & 0xfc0007ff) == 0
1421 && (t1 & 0xfc0006df) == 0x7c000286)
1422 {
1423 /* spr field is split. */
1424 t1 = ((t1 & ~0x1ff800)
1425 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1426 t2 = ((t2 & ~0x1ff800)
1427 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1428 }
1429 if (t1 < t2)
1430 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1431 op[0].name, op[0].opcode, op[0].mask,
1432 op[-1].name, op[-1].opcode, op[-1].mask);
1433 }
1434 }
1435
1436 /* The mask had better not trim off opcode bits. */
1437 if ((op->opcode & omask) != op->opcode)
1438 {
1439 as_bad (_("mask trims opcode bits for %s"),
1440 op->name);
1441 bad_insn = TRUE;
1442 }
1443
1444 /* The operands must not overlap the opcode or each other. */
1445 for (o = op->operands; *o; ++o)
1446 if (*o >= num_powerpc_operands)
1447 {
1448 as_bad (_("operand index error for %s"),
1449 op->name);
1450 bad_insn = TRUE;
1451 }
1452 else
1453 {
1454 const struct powerpc_operand *operand = &powerpc_operands[*o];
1455 if (operand->shift >= 0)
1456 {
1457 unsigned long mask = operand->bitm << operand->shift;
1458 if (omask & mask)
1459 {
1460 as_bad (_("operand %d overlap in %s"),
1461 (int) (o - op->operands), op->name);
1462 bad_insn = TRUE;
1463 }
1464 omask |= mask;
1465 }
1466 }
1467 }
1468
1469 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
1470 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
1471 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1472 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
1473 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1474 && !(ppc_cpu & op->deprecated))
1475 {
1476 const char *retval;
1477
1478 retval = hash_insert (ppc_hash, op->name, (void *) op);
1479 if (retval != NULL)
1480 {
1481 /* Ignore Power duplicates for -m601. */
1482 if ((ppc_cpu & PPC_OPCODE_601) != 0
1483 && (op->flags & PPC_OPCODE_POWER) != 0)
1484 continue;
1485
1486 as_bad (_("duplicate instruction %s"),
1487 op->name);
1488 bad_insn = TRUE;
1489 }
1490 }
1491 }
1492
1493 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1494 for (op = powerpc_opcodes; op < op_end; op++)
1495 hash_insert (ppc_hash, op->name, (void *) op);
1496
1497 /* Insert the macros into a hash table. */
1498 ppc_macro_hash = hash_new ();
1499
1500 macro_end = powerpc_macros + powerpc_num_macros;
1501 for (macro = powerpc_macros; macro < macro_end; macro++)
1502 {
1503 if ((macro->flags & ppc_cpu) != 0)
1504 {
1505 const char *retval;
1506
1507 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1508 if (retval != (const char *) NULL)
1509 {
1510 as_bad (_("duplicate macro %s"), macro->name);
1511 bad_insn = TRUE;
1512 }
1513 }
1514 }
1515
1516 if (bad_insn)
1517 abort ();
1518 }
1519
1520 /* This function is called when the assembler starts up. It is called
1521 after the options have been parsed and the output file has been
1522 opened. */
1523
1524 void
1525 md_begin (void)
1526 {
1527 ppc_set_cpu ();
1528
1529 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1530
1531 #ifdef OBJ_ELF
1532 /* Set the ELF flags if desired. */
1533 if (ppc_flags && !msolaris)
1534 bfd_set_private_flags (stdoutput, ppc_flags);
1535 #endif
1536
1537 ppc_setup_opcodes ();
1538
1539 /* Tell the main code what the endianness is if it is not overridden
1540 by the user. */
1541 if (!set_target_endian)
1542 {
1543 set_target_endian = 1;
1544 target_big_endian = PPC_BIG_ENDIAN;
1545 }
1546
1547 #ifdef OBJ_XCOFF
1548 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1549
1550 /* Create dummy symbols to serve as initial csects. This forces the
1551 text csects to precede the data csects. These symbols will not
1552 be output. */
1553 ppc_text_csects = symbol_make ("dummy\001");
1554 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1555 ppc_data_csects = symbol_make ("dummy\001");
1556 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1557 #endif
1558
1559 #ifdef TE_PE
1560
1561 ppc_current_section = text_section;
1562 ppc_previous_section = 0;
1563
1564 #endif
1565 }
1566
1567 void
1568 ppc_cleanup (void)
1569 {
1570 #ifdef OBJ_ELF
1571 if (ppc_apuinfo_list == NULL)
1572 return;
1573
1574 /* Ok, so write the section info out. We have this layout:
1575
1576 byte data what
1577 ---- ---- ----
1578 0 8 length of "APUinfo\0"
1579 4 (n*4) number of APU's (4 bytes each)
1580 8 2 note type 2
1581 12 "APUinfo\0" name
1582 20 APU#1 first APU's info
1583 24 APU#2 second APU's info
1584 ... ...
1585 */
1586 {
1587 char *p;
1588 asection *seg = now_seg;
1589 subsegT subseg = now_subseg;
1590 asection *apuinfo_secp = (asection *) NULL;
1591 unsigned int i;
1592
1593 /* Create the .PPC.EMB.apuinfo section. */
1594 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1595 bfd_set_section_flags (stdoutput,
1596 apuinfo_secp,
1597 SEC_HAS_CONTENTS | SEC_READONLY);
1598
1599 p = frag_more (4);
1600 md_number_to_chars (p, (valueT) 8, 4);
1601
1602 p = frag_more (4);
1603 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1604
1605 p = frag_more (4);
1606 md_number_to_chars (p, (valueT) 2, 4);
1607
1608 p = frag_more (8);
1609 strcpy (p, "APUinfo");
1610
1611 for (i = 0; i < ppc_apuinfo_num; i++)
1612 {
1613 p = frag_more (4);
1614 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1615 }
1616
1617 frag_align (2, 0, 0);
1618
1619 /* We probably can't restore the current segment, for there likely
1620 isn't one yet... */
1621 if (seg && subseg)
1622 subseg_set (seg, subseg);
1623 }
1624 #endif
1625 }
1626
1627 /* Insert an operand value into an instruction. */
1628
1629 static unsigned long
1630 ppc_insert_operand (unsigned long insn,
1631 const struct powerpc_operand *operand,
1632 offsetT val,
1633 ppc_cpu_t cpu,
1634 char *file,
1635 unsigned int line)
1636 {
1637 long min, max, right;
1638
1639 max = operand->bitm;
1640 right = max & -max;
1641 min = 0;
1642
1643 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1644 {
1645 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1646 max = (max >> 1) & -right;
1647 min = ~max & -right;
1648 }
1649
1650 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1651 max++;
1652
1653 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1654 {
1655 long tmp = min;
1656 min = -max;
1657 max = -tmp;
1658 }
1659
1660 if (min <= max)
1661 {
1662 /* Some people write constants with the sign extension done by
1663 hand but only up to 32 bits. This shouldn't really be valid,
1664 but, to permit this code to assemble on a 64-bit host, we
1665 sign extend the 32-bit value to 64 bits if so doing makes the
1666 value valid. */
1667 if (val > max
1668 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1669 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1670 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1671 val = val - 0x80000000 - 0x80000000;
1672
1673 /* Similarly, people write expressions like ~(1<<15), and expect
1674 this to be OK for a 32-bit unsigned value. */
1675 else if (val < min
1676 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1677 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1678 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1679 val = val + 0x80000000 + 0x80000000;
1680
1681 else if (val < min
1682 || val > max
1683 || (val & (right - 1)) != 0)
1684 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1685 }
1686
1687 if (operand->insert)
1688 {
1689 const char *errmsg;
1690
1691 errmsg = NULL;
1692 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1693 if (errmsg != (const char *) NULL)
1694 as_bad_where (file, line, "%s", errmsg);
1695 }
1696 else
1697 insn |= ((long) val & operand->bitm) << operand->shift;
1698
1699 return insn;
1700 }
1701
1702 \f
1703 #ifdef OBJ_ELF
1704 /* Parse @got, etc. and return the desired relocation. */
1705 static bfd_reloc_code_real_type
1706 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1707 {
1708 struct map_bfd {
1709 char *string;
1710 unsigned int length : 8;
1711 unsigned int valid32 : 1;
1712 unsigned int valid64 : 1;
1713 unsigned int reloc;
1714 };
1715
1716 char ident[20];
1717 char *str = *str_p;
1718 char *str2;
1719 int ch;
1720 int len;
1721 const struct map_bfd *ptr;
1722
1723 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1724 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1725 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1726
1727 static const struct map_bfd mapping[] = {
1728 MAP ("l", BFD_RELOC_LO16),
1729 MAP ("h", BFD_RELOC_HI16),
1730 MAP ("ha", BFD_RELOC_HI16_S),
1731 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1732 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1733 MAP ("got", BFD_RELOC_16_GOTOFF),
1734 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1735 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1736 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1737 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1738 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1739 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1740 MAP ("copy", BFD_RELOC_PPC_COPY),
1741 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1742 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1743 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1744 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1745 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1746 MAP ("tls", BFD_RELOC_PPC_TLS),
1747 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1748 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1749 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1750 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1751 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1752 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1753 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1754 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1755 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1756 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1757 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1758 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1759 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1760 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1761 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1762 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1763 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1764 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1765 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1766 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1767 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1768 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1769 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1770 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1771 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1772 MAP32 ("fixup", BFD_RELOC_CTOR),
1773 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1774 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1775 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1776 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1777 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1778 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1779 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1780 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1781 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1782 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1783 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1784 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1785 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1786 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1787 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1788 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1789 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1790 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1791 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1792 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1793 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1794 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1795 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1796 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1797 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1798 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1799 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1800 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1801 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1802 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1803 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1804 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1805 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1806 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1807 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1808 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1809 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1810 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1811 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1812 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1813 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1814 };
1815
1816 if (*str++ != '@')
1817 return BFD_RELOC_UNUSED;
1818
1819 for (ch = *str, str2 = ident;
1820 (str2 < ident + sizeof (ident) - 1
1821 && (ISALNUM (ch) || ch == '@'));
1822 ch = *++str)
1823 {
1824 *str2++ = TOLOWER (ch);
1825 }
1826
1827 *str2 = '\0';
1828 len = str2 - ident;
1829
1830 ch = ident[0];
1831 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1832 if (ch == ptr->string[0]
1833 && len == ptr->length
1834 && memcmp (ident, ptr->string, ptr->length) == 0
1835 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1836 {
1837 int reloc = ptr->reloc;
1838
1839 if (!ppc_obj64 && exp_p->X_add_number != 0)
1840 {
1841 switch (reloc)
1842 {
1843 case BFD_RELOC_16_GOTOFF:
1844 case BFD_RELOC_LO16_GOTOFF:
1845 case BFD_RELOC_HI16_GOTOFF:
1846 case BFD_RELOC_HI16_S_GOTOFF:
1847 as_warn (_("identifier+constant@got means "
1848 "identifier@got+constant"));
1849 break;
1850
1851 case BFD_RELOC_PPC_GOT_TLSGD16:
1852 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1853 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1854 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1855 case BFD_RELOC_PPC_GOT_TLSLD16:
1856 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1857 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1858 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1859 case BFD_RELOC_PPC_GOT_DTPREL16:
1860 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1861 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1862 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1863 case BFD_RELOC_PPC_GOT_TPREL16:
1864 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1865 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1866 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1867 as_bad (_("symbol+offset not supported for got tls"));
1868 break;
1869 }
1870 }
1871
1872 /* Now check for identifier@suffix+constant. */
1873 if (*str == '-' || *str == '+')
1874 {
1875 char *orig_line = input_line_pointer;
1876 expressionS new_exp;
1877
1878 input_line_pointer = str;
1879 expression (&new_exp);
1880 if (new_exp.X_op == O_constant)
1881 {
1882 exp_p->X_add_number += new_exp.X_add_number;
1883 str = input_line_pointer;
1884 }
1885
1886 if (&input_line_pointer != str_p)
1887 input_line_pointer = orig_line;
1888 }
1889 *str_p = str;
1890
1891 if (reloc == (int) BFD_RELOC_PPC64_TOC
1892 && exp_p->X_op == O_symbol
1893 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
1894 {
1895 /* Change the symbol so that the dummy .TOC. symbol can be
1896 omitted from the object file. */
1897 exp_p->X_add_symbol = &abs_symbol;
1898 }
1899
1900 return (bfd_reloc_code_real_type) reloc;
1901 }
1902
1903 return BFD_RELOC_UNUSED;
1904 }
1905
1906 /* Like normal .long/.short/.word, except support @got, etc.
1907 Clobbers input_line_pointer, checks end-of-line. */
1908 static void
1909 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
1910 {
1911 expressionS exp;
1912 bfd_reloc_code_real_type reloc;
1913
1914 if (is_it_end_of_statement ())
1915 {
1916 demand_empty_rest_of_line ();
1917 return;
1918 }
1919
1920 do
1921 {
1922 expression (&exp);
1923 if (exp.X_op == O_symbol
1924 && *input_line_pointer == '@'
1925 && (reloc = ppc_elf_suffix (&input_line_pointer,
1926 &exp)) != BFD_RELOC_UNUSED)
1927 {
1928 reloc_howto_type *reloc_howto;
1929 int size;
1930
1931 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1932 size = bfd_get_reloc_size (reloc_howto);
1933
1934 if (size > nbytes)
1935 {
1936 as_bad (_("%s relocations do not fit in %d bytes\n"),
1937 reloc_howto->name, nbytes);
1938 }
1939 else
1940 {
1941 char *p;
1942 int offset;
1943
1944 p = frag_more (nbytes);
1945 offset = 0;
1946 if (target_big_endian)
1947 offset = nbytes - size;
1948 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1949 &exp, 0, reloc);
1950 }
1951 }
1952 else
1953 emit_expr (&exp, (unsigned int) nbytes);
1954 }
1955 while (*input_line_pointer++ == ',');
1956
1957 /* Put terminator back into stream. */
1958 input_line_pointer--;
1959 demand_empty_rest_of_line ();
1960 }
1961
1962 /* Solaris pseduo op to change to the .rodata section. */
1963 static void
1964 ppc_elf_rdata (int xxx)
1965 {
1966 char *save_line = input_line_pointer;
1967 static char section[] = ".rodata\n";
1968
1969 /* Just pretend this is .section .rodata */
1970 input_line_pointer = section;
1971 obj_elf_section (xxx);
1972
1973 input_line_pointer = save_line;
1974 }
1975
1976 /* Pseudo op to make file scope bss items. */
1977 static void
1978 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
1979 {
1980 char *name;
1981 char c;
1982 char *p;
1983 offsetT size;
1984 symbolS *symbolP;
1985 offsetT align;
1986 segT old_sec;
1987 int old_subsec;
1988 char *pfrag;
1989 int align2;
1990
1991 name = input_line_pointer;
1992 c = get_symbol_end ();
1993
1994 /* just after name is now '\0'. */
1995 p = input_line_pointer;
1996 *p = c;
1997 SKIP_WHITESPACE ();
1998 if (*input_line_pointer != ',')
1999 {
2000 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2001 ignore_rest_of_line ();
2002 return;
2003 }
2004
2005 input_line_pointer++; /* skip ',' */
2006 if ((size = get_absolute_expression ()) < 0)
2007 {
2008 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2009 ignore_rest_of_line ();
2010 return;
2011 }
2012
2013 /* The third argument to .lcomm is the alignment. */
2014 if (*input_line_pointer != ',')
2015 align = 8;
2016 else
2017 {
2018 ++input_line_pointer;
2019 align = get_absolute_expression ();
2020 if (align <= 0)
2021 {
2022 as_warn (_("ignoring bad alignment"));
2023 align = 8;
2024 }
2025 }
2026
2027 *p = 0;
2028 symbolP = symbol_find_or_make (name);
2029 *p = c;
2030
2031 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2032 {
2033 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2034 S_GET_NAME (symbolP));
2035 ignore_rest_of_line ();
2036 return;
2037 }
2038
2039 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2040 {
2041 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2042 S_GET_NAME (symbolP),
2043 (long) S_GET_VALUE (symbolP),
2044 (long) size);
2045
2046 ignore_rest_of_line ();
2047 return;
2048 }
2049
2050 /* Allocate_bss. */
2051 old_sec = now_seg;
2052 old_subsec = now_subseg;
2053 if (align)
2054 {
2055 /* Convert to a power of 2 alignment. */
2056 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2057 if (align != 1)
2058 {
2059 as_bad (_("Common alignment not a power of 2"));
2060 ignore_rest_of_line ();
2061 return;
2062 }
2063 }
2064 else
2065 align2 = 0;
2066
2067 record_alignment (bss_section, align2);
2068 subseg_set (bss_section, 0);
2069 if (align2)
2070 frag_align (align2, 0, 0);
2071 if (S_GET_SEGMENT (symbolP) == bss_section)
2072 symbol_get_frag (symbolP)->fr_symbol = 0;
2073 symbol_set_frag (symbolP, frag_now);
2074 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2075 (char *) 0);
2076 *pfrag = 0;
2077 S_SET_SIZE (symbolP, size);
2078 S_SET_SEGMENT (symbolP, bss_section);
2079 subseg_set (old_sec, old_subsec);
2080 demand_empty_rest_of_line ();
2081 }
2082
2083 /* Validate any relocations emitted for -mrelocatable, possibly adding
2084 fixups for word relocations in writable segments, so we can adjust
2085 them at runtime. */
2086 static void
2087 ppc_elf_validate_fix (fixS *fixp, segT seg)
2088 {
2089 if (fixp->fx_done || fixp->fx_pcrel)
2090 return;
2091
2092 switch (shlib)
2093 {
2094 case SHLIB_NONE:
2095 case SHLIB_PIC:
2096 return;
2097
2098 case SHLIB_MRELOCATABLE:
2099 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2100 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2101 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2102 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2103 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2104 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2105 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2106 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2107 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2108 && (seg->flags & SEC_LOAD) != 0
2109 && strcmp (segment_name (seg), ".got2") != 0
2110 && strcmp (segment_name (seg), ".dtors") != 0
2111 && strcmp (segment_name (seg), ".ctors") != 0
2112 && strcmp (segment_name (seg), ".fixup") != 0
2113 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2114 && strcmp (segment_name (seg), ".eh_frame") != 0
2115 && strcmp (segment_name (seg), ".ex_shared") != 0)
2116 {
2117 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2118 || fixp->fx_r_type != BFD_RELOC_CTOR)
2119 {
2120 as_bad_where (fixp->fx_file, fixp->fx_line,
2121 _("Relocation cannot be done when using -mrelocatable"));
2122 }
2123 }
2124 return;
2125 }
2126 }
2127
2128 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2129 function descriptor sym if the corresponding code sym is used. */
2130
2131 void
2132 ppc_frob_file_before_adjust (void)
2133 {
2134 symbolS *symp;
2135 asection *toc;
2136
2137 if (!ppc_obj64)
2138 return;
2139
2140 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2141 {
2142 const char *name;
2143 char *dotname;
2144 symbolS *dotsym;
2145 size_t len;
2146
2147 name = S_GET_NAME (symp);
2148 if (name[0] == '.')
2149 continue;
2150
2151 if (! S_IS_WEAK (symp)
2152 || S_IS_DEFINED (symp))
2153 continue;
2154
2155 len = strlen (name) + 1;
2156 dotname = xmalloc (len + 1);
2157 dotname[0] = '.';
2158 memcpy (dotname + 1, name, len);
2159 dotsym = symbol_find_noref (dotname, 1);
2160 free (dotname);
2161 if (dotsym != NULL && (symbol_used_p (dotsym)
2162 || symbol_used_in_reloc_p (dotsym)))
2163 symbol_mark_used (symp);
2164
2165 }
2166
2167 toc = bfd_get_section_by_name (stdoutput, ".toc");
2168 if (toc != NULL
2169 && bfd_section_size (stdoutput, toc) > 0x10000)
2170 as_warn (_("TOC section size exceeds 64k"));
2171
2172 /* Don't emit .TOC. symbol. */
2173 symp = symbol_find (".TOC.");
2174 if (symp != NULL)
2175 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2176 }
2177 #endif /* OBJ_ELF */
2178 \f
2179 #ifdef TE_PE
2180
2181 /*
2182 * Summary of parse_toc_entry.
2183 *
2184 * in: Input_line_pointer points to the '[' in one of:
2185 *
2186 * [toc] [tocv] [toc32] [toc64]
2187 *
2188 * Anything else is an error of one kind or another.
2189 *
2190 * out:
2191 * return value: success or failure
2192 * toc_kind: kind of toc reference
2193 * input_line_pointer:
2194 * success: first char after the ']'
2195 * failure: unchanged
2196 *
2197 * settings:
2198 *
2199 * [toc] - rv == success, toc_kind = default_toc
2200 * [tocv] - rv == success, toc_kind = data_in_toc
2201 * [toc32] - rv == success, toc_kind = must_be_32
2202 * [toc64] - rv == success, toc_kind = must_be_64
2203 *
2204 */
2205
2206 enum toc_size_qualifier
2207 {
2208 default_toc, /* The toc cell constructed should be the system default size */
2209 data_in_toc, /* This is a direct reference to a toc cell */
2210 must_be_32, /* The toc cell constructed must be 32 bits wide */
2211 must_be_64 /* The toc cell constructed must be 64 bits wide */
2212 };
2213
2214 static int
2215 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2216 {
2217 char *start;
2218 char *toc_spec;
2219 char c;
2220 enum toc_size_qualifier t;
2221
2222 /* Save the input_line_pointer. */
2223 start = input_line_pointer;
2224
2225 /* Skip over the '[' , and whitespace. */
2226 ++input_line_pointer;
2227 SKIP_WHITESPACE ();
2228
2229 /* Find the spelling of the operand. */
2230 toc_spec = input_line_pointer;
2231 c = get_symbol_end ();
2232
2233 if (strcmp (toc_spec, "toc") == 0)
2234 {
2235 t = default_toc;
2236 }
2237 else if (strcmp (toc_spec, "tocv") == 0)
2238 {
2239 t = data_in_toc;
2240 }
2241 else if (strcmp (toc_spec, "toc32") == 0)
2242 {
2243 t = must_be_32;
2244 }
2245 else if (strcmp (toc_spec, "toc64") == 0)
2246 {
2247 t = must_be_64;
2248 }
2249 else
2250 {
2251 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2252 *input_line_pointer = c;
2253 input_line_pointer = start;
2254 return 0;
2255 }
2256
2257 /* Now find the ']'. */
2258 *input_line_pointer = c;
2259
2260 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2261 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2262
2263 if (c != ']')
2264 {
2265 as_bad (_("syntax error: expected `]', found `%c'"), c);
2266 input_line_pointer = start;
2267 return 0;
2268 }
2269
2270 *toc_kind = t;
2271 return 1;
2272 }
2273 #endif
2274 \f
2275
2276 #ifdef OBJ_ELF
2277 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2278 static void
2279 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2280 {
2281 unsigned int i;
2282
2283 /* Check we don't already exist. */
2284 for (i = 0; i < ppc_apuinfo_num; i++)
2285 if (ppc_apuinfo_list[i] == APUID (apu, version))
2286 return;
2287
2288 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2289 {
2290 if (ppc_apuinfo_num_alloc == 0)
2291 {
2292 ppc_apuinfo_num_alloc = 4;
2293 ppc_apuinfo_list = (unsigned long *)
2294 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2295 }
2296 else
2297 {
2298 ppc_apuinfo_num_alloc += 4;
2299 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2300 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2301 }
2302 }
2303 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2304 }
2305 #undef APUID
2306 #endif
2307 \f
2308
2309 /* We need to keep a list of fixups. We can't simply generate them as
2310 we go, because that would require us to first create the frag, and
2311 that would screw up references to ``.''. */
2312
2313 struct ppc_fixup
2314 {
2315 expressionS exp;
2316 int opindex;
2317 bfd_reloc_code_real_type reloc;
2318 };
2319
2320 #define MAX_INSN_FIXUPS (5)
2321
2322 /* This routine is called for each instruction to be assembled. */
2323
2324 void
2325 md_assemble (char *str)
2326 {
2327 char *s;
2328 const struct powerpc_opcode *opcode;
2329 unsigned long insn;
2330 const unsigned char *opindex_ptr;
2331 int skip_optional;
2332 int need_paren;
2333 int next_opindex;
2334 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2335 int fc;
2336 char *f;
2337 int addr_mod;
2338 int i;
2339 #ifdef OBJ_ELF
2340 bfd_reloc_code_real_type reloc;
2341 #endif
2342
2343 /* Get the opcode. */
2344 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2345 ;
2346 if (*s != '\0')
2347 *s++ = '\0';
2348
2349 /* Look up the opcode in the hash table. */
2350 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2351 if (opcode == (const struct powerpc_opcode *) NULL)
2352 {
2353 const struct powerpc_macro *macro;
2354
2355 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2356 if (macro == (const struct powerpc_macro *) NULL)
2357 as_bad (_("Unrecognized opcode: `%s'"), str);
2358 else
2359 ppc_macro (s, macro);
2360
2361 return;
2362 }
2363
2364 insn = opcode->opcode;
2365
2366 str = s;
2367 while (ISSPACE (*str))
2368 ++str;
2369
2370 /* PowerPC operands are just expressions. The only real issue is
2371 that a few operand types are optional. All cases which might use
2372 an optional operand separate the operands only with commas (in some
2373 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2374 have optional operands). Most instructions with optional operands
2375 have only one. Those that have more than one optional operand can
2376 take either all their operands or none. So, before we start seriously
2377 parsing the operands, we check to see if we have optional operands,
2378 and if we do, we count the number of commas to see which operands
2379 have been omitted. */
2380 skip_optional = 0;
2381 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2382 {
2383 const struct powerpc_operand *operand;
2384
2385 operand = &powerpc_operands[*opindex_ptr];
2386 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2387 {
2388 unsigned int opcount;
2389 unsigned int num_operands_expected;
2390
2391 /* There is an optional operand. Count the number of
2392 commas in the input line. */
2393 if (*str == '\0')
2394 opcount = 0;
2395 else
2396 {
2397 opcount = 1;
2398 s = str;
2399 while ((s = strchr (s, ',')) != (char *) NULL)
2400 {
2401 ++opcount;
2402 ++s;
2403 }
2404 }
2405
2406 /* Compute the number of expected operands.
2407 Do not count fake operands. */
2408 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2409 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2410 ++ num_operands_expected;
2411
2412 /* If there are fewer operands in the line then are called
2413 for by the instruction, we want to skip the optional
2414 operands. */
2415 if (opcount < num_operands_expected)
2416 skip_optional = 1;
2417
2418 break;
2419 }
2420 }
2421
2422 /* Gather the operands. */
2423 need_paren = 0;
2424 next_opindex = 0;
2425 fc = 0;
2426 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2427 {
2428 const struct powerpc_operand *operand;
2429 const char *errmsg;
2430 char *hold;
2431 expressionS ex;
2432 char endc;
2433
2434 if (next_opindex == 0)
2435 operand = &powerpc_operands[*opindex_ptr];
2436 else
2437 {
2438 operand = &powerpc_operands[next_opindex];
2439 next_opindex = 0;
2440 }
2441 errmsg = NULL;
2442
2443 /* If this is a fake operand, then we do not expect anything
2444 from the input. */
2445 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2446 {
2447 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2448 if (errmsg != (const char *) NULL)
2449 as_bad ("%s", errmsg);
2450 continue;
2451 }
2452
2453 /* If this is an optional operand, and we are skipping it, just
2454 insert a zero. */
2455 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2456 && skip_optional)
2457 {
2458 if (operand->insert)
2459 {
2460 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2461 if (errmsg != (const char *) NULL)
2462 as_bad ("%s", errmsg);
2463 }
2464 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2465 next_opindex = *opindex_ptr + 1;
2466 continue;
2467 }
2468
2469 /* Gather the operand. */
2470 hold = input_line_pointer;
2471 input_line_pointer = str;
2472
2473 #ifdef TE_PE
2474 if (*input_line_pointer == '[')
2475 {
2476 /* We are expecting something like the second argument here:
2477 *
2478 * lwz r4,[toc].GS.0.static_int(rtoc)
2479 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2480 * The argument following the `]' must be a symbol name, and the
2481 * register must be the toc register: 'rtoc' or '2'
2482 *
2483 * The effect is to 0 as the displacement field
2484 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2485 * the appropriate variation) reloc against it based on the symbol.
2486 * The linker will build the toc, and insert the resolved toc offset.
2487 *
2488 * Note:
2489 * o The size of the toc entry is currently assumed to be
2490 * 32 bits. This should not be assumed to be a hard coded
2491 * number.
2492 * o In an effort to cope with a change from 32 to 64 bits,
2493 * there are also toc entries that are specified to be
2494 * either 32 or 64 bits:
2495 * lwz r4,[toc32].GS.0.static_int(rtoc)
2496 * lwz r4,[toc64].GS.0.static_int(rtoc)
2497 * These demand toc entries of the specified size, and the
2498 * instruction probably requires it.
2499 */
2500
2501 int valid_toc;
2502 enum toc_size_qualifier toc_kind;
2503 bfd_reloc_code_real_type toc_reloc;
2504
2505 /* Go parse off the [tocXX] part. */
2506 valid_toc = parse_toc_entry (&toc_kind);
2507
2508 if (!valid_toc)
2509 {
2510 /* Note: message has already been issued.
2511 FIXME: what sort of recovery should we do?
2512 demand_rest_of_line (); return; ? */
2513 }
2514
2515 /* Now get the symbol following the ']'. */
2516 expression (&ex);
2517
2518 switch (toc_kind)
2519 {
2520 case default_toc:
2521 /* In this case, we may not have seen the symbol yet,
2522 since it is allowed to appear on a .extern or .globl
2523 or just be a label in the .data section. */
2524 toc_reloc = BFD_RELOC_PPC_TOC16;
2525 break;
2526 case data_in_toc:
2527 /* 1. The symbol must be defined and either in the toc
2528 section, or a global.
2529 2. The reloc generated must have the TOCDEFN flag set
2530 in upper bit mess of the reloc type.
2531 FIXME: It's a little confusing what the tocv
2532 qualifier can be used for. At the very least, I've
2533 seen three uses, only one of which I'm sure I can
2534 explain. */
2535 if (ex.X_op == O_symbol)
2536 {
2537 gas_assert (ex.X_add_symbol != NULL);
2538 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2539 != tocdata_section)
2540 {
2541 as_bad (_("[tocv] symbol is not a toc symbol"));
2542 }
2543 }
2544
2545 toc_reloc = BFD_RELOC_PPC_TOC16;
2546 break;
2547 case must_be_32:
2548 /* FIXME: these next two specifically specify 32/64 bit
2549 toc entries. We don't support them today. Is this
2550 the right way to say that? */
2551 toc_reloc = BFD_RELOC_UNUSED;
2552 as_bad (_("Unimplemented toc32 expression modifier"));
2553 break;
2554 case must_be_64:
2555 /* FIXME: see above. */
2556 toc_reloc = BFD_RELOC_UNUSED;
2557 as_bad (_("Unimplemented toc64 expression modifier"));
2558 break;
2559 default:
2560 fprintf (stderr,
2561 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2562 toc_kind);
2563 abort ();
2564 break;
2565 }
2566
2567 /* We need to generate a fixup for this expression. */
2568 if (fc >= MAX_INSN_FIXUPS)
2569 as_fatal (_("too many fixups"));
2570
2571 fixups[fc].reloc = toc_reloc;
2572 fixups[fc].exp = ex;
2573 fixups[fc].opindex = *opindex_ptr;
2574 ++fc;
2575
2576 /* Ok. We've set up the fixup for the instruction. Now make it
2577 look like the constant 0 was found here. */
2578 ex.X_unsigned = 1;
2579 ex.X_op = O_constant;
2580 ex.X_add_number = 0;
2581 ex.X_add_symbol = NULL;
2582 ex.X_op_symbol = NULL;
2583 }
2584
2585 else
2586 #endif /* TE_PE */
2587 {
2588 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2589 || !register_name (&ex))
2590 {
2591 char save_lex = lex_type['%'];
2592
2593 if ((operand->flags & PPC_OPERAND_CR) != 0)
2594 {
2595 cr_operand = TRUE;
2596 lex_type['%'] |= LEX_BEGIN_NAME;
2597 }
2598 expression (&ex);
2599 cr_operand = FALSE;
2600 lex_type['%'] = save_lex;
2601 }
2602 }
2603
2604 str = input_line_pointer;
2605 input_line_pointer = hold;
2606
2607 if (ex.X_op == O_illegal)
2608 as_bad (_("illegal operand"));
2609 else if (ex.X_op == O_absent)
2610 as_bad (_("missing operand"));
2611 else if (ex.X_op == O_register)
2612 {
2613 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2614 ppc_cpu, (char *) NULL, 0);
2615 }
2616 else if (ex.X_op == O_constant)
2617 {
2618 #ifdef OBJ_ELF
2619 /* Allow @HA, @L, @H on constants. */
2620 char *orig_str = str;
2621
2622 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2623 switch (reloc)
2624 {
2625 default:
2626 str = orig_str;
2627 break;
2628
2629 case BFD_RELOC_LO16:
2630 /* X_unsigned is the default, so if the user has done
2631 something which cleared it, we always produce a
2632 signed value. */
2633 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2634 ex.X_add_number &= 0xffff;
2635 else
2636 ex.X_add_number = SEX16 (ex.X_add_number);
2637 break;
2638
2639 case BFD_RELOC_HI16:
2640 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2641 ex.X_add_number = PPC_HI (ex.X_add_number);
2642 else
2643 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2644 break;
2645
2646 case BFD_RELOC_HI16_S:
2647 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2648 ex.X_add_number = PPC_HA (ex.X_add_number);
2649 else
2650 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2651 break;
2652
2653 case BFD_RELOC_PPC64_HIGHER:
2654 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2655 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2656 else
2657 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2658 break;
2659
2660 case BFD_RELOC_PPC64_HIGHER_S:
2661 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2662 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2663 else
2664 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2665 break;
2666
2667 case BFD_RELOC_PPC64_HIGHEST:
2668 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2669 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2670 else
2671 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2672 break;
2673
2674 case BFD_RELOC_PPC64_HIGHEST_S:
2675 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2676 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2677 else
2678 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2679 break;
2680 }
2681 #endif /* OBJ_ELF */
2682 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2683 ppc_cpu, (char *) NULL, 0);
2684 }
2685 #ifdef OBJ_ELF
2686 else
2687 {
2688 if (ex.X_op == O_symbol && str[0] == '(')
2689 {
2690 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2691 if (sym_name[0] == '.')
2692 ++sym_name;
2693
2694 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
2695 {
2696 expressionS tls_exp;
2697
2698 hold = input_line_pointer;
2699 input_line_pointer = str + 1;
2700 expression (&tls_exp);
2701 if (tls_exp.X_op == O_symbol)
2702 {
2703 reloc = BFD_RELOC_UNUSED;
2704 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2705 {
2706 reloc = BFD_RELOC_PPC_TLSGD;
2707 input_line_pointer += 7;
2708 }
2709 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2710 {
2711 reloc = BFD_RELOC_PPC_TLSLD;
2712 input_line_pointer += 7;
2713 }
2714 if (reloc != BFD_RELOC_UNUSED)
2715 {
2716 SKIP_WHITESPACE ();
2717 str = input_line_pointer;
2718
2719 if (fc >= MAX_INSN_FIXUPS)
2720 as_fatal (_("too many fixups"));
2721 fixups[fc].exp = tls_exp;
2722 fixups[fc].opindex = *opindex_ptr;
2723 fixups[fc].reloc = reloc;
2724 ++fc;
2725 }
2726 }
2727 input_line_pointer = hold;
2728 }
2729 }
2730
2731 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2732 {
2733 /* Some TLS tweaks. */
2734 switch (reloc)
2735 {
2736 default:
2737 break;
2738
2739 case BFD_RELOC_PPC_TLS:
2740 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2741 as_bad (_("@tls may not be used with \"%s\" operands"),
2742 opcode->name);
2743 else if (operand->shift != 11)
2744 as_bad (_("@tls may only be used in last operand"));
2745 else
2746 insn = ppc_insert_operand (insn, operand,
2747 ppc_obj64 ? 13 : 2,
2748 ppc_cpu, (char *) NULL, 0);
2749 break;
2750
2751 /* We'll only use the 32 (or 64) bit form of these relocations
2752 in constants. Instructions get the 16 bit form. */
2753 case BFD_RELOC_PPC_DTPREL:
2754 reloc = BFD_RELOC_PPC_DTPREL16;
2755 break;
2756 case BFD_RELOC_PPC_TPREL:
2757 reloc = BFD_RELOC_PPC_TPREL16;
2758 break;
2759 }
2760
2761 /* For the absolute forms of branches, convert the PC
2762 relative form back into the absolute. */
2763 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2764 {
2765 switch (reloc)
2766 {
2767 case BFD_RELOC_PPC_B26:
2768 reloc = BFD_RELOC_PPC_BA26;
2769 break;
2770 case BFD_RELOC_PPC_B16:
2771 reloc = BFD_RELOC_PPC_BA16;
2772 break;
2773 case BFD_RELOC_PPC_B16_BRTAKEN:
2774 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2775 break;
2776 case BFD_RELOC_PPC_B16_BRNTAKEN:
2777 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2778 break;
2779 default:
2780 break;
2781 }
2782 }
2783
2784 if (ppc_obj64
2785 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2786 {
2787 switch (reloc)
2788 {
2789 case BFD_RELOC_16:
2790 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2791 break;
2792 case BFD_RELOC_LO16:
2793 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2794 break;
2795 case BFD_RELOC_16_GOTOFF:
2796 reloc = BFD_RELOC_PPC64_GOT16_DS;
2797 break;
2798 case BFD_RELOC_LO16_GOTOFF:
2799 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2800 break;
2801 case BFD_RELOC_LO16_PLTOFF:
2802 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2803 break;
2804 case BFD_RELOC_16_BASEREL:
2805 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2806 break;
2807 case BFD_RELOC_LO16_BASEREL:
2808 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2809 break;
2810 case BFD_RELOC_PPC_TOC16:
2811 reloc = BFD_RELOC_PPC64_TOC16_DS;
2812 break;
2813 case BFD_RELOC_PPC64_TOC16_LO:
2814 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2815 break;
2816 case BFD_RELOC_PPC64_PLTGOT16:
2817 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2818 break;
2819 case BFD_RELOC_PPC64_PLTGOT16_LO:
2820 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2821 break;
2822 case BFD_RELOC_PPC_DTPREL16:
2823 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2824 break;
2825 case BFD_RELOC_PPC_DTPREL16_LO:
2826 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2827 break;
2828 case BFD_RELOC_PPC_TPREL16:
2829 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2830 break;
2831 case BFD_RELOC_PPC_TPREL16_LO:
2832 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2833 break;
2834 case BFD_RELOC_PPC_GOT_DTPREL16:
2835 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2836 case BFD_RELOC_PPC_GOT_TPREL16:
2837 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2838 break;
2839 default:
2840 as_bad (_("unsupported relocation for DS offset field"));
2841 break;
2842 }
2843 }
2844 }
2845
2846 /* We need to generate a fixup for this expression. */
2847 if (fc >= MAX_INSN_FIXUPS)
2848 as_fatal (_("too many fixups"));
2849 fixups[fc].exp = ex;
2850 fixups[fc].opindex = *opindex_ptr;
2851 fixups[fc].reloc = reloc;
2852 ++fc;
2853 }
2854 #else /* OBJ_ELF */
2855 else
2856 {
2857 /* We need to generate a fixup for this expression. */
2858 if (fc >= MAX_INSN_FIXUPS)
2859 as_fatal (_("too many fixups"));
2860 fixups[fc].exp = ex;
2861 fixups[fc].opindex = *opindex_ptr;
2862 fixups[fc].reloc = BFD_RELOC_UNUSED;
2863 ++fc;
2864 }
2865 #endif /* OBJ_ELF */
2866
2867 if (need_paren)
2868 {
2869 endc = ')';
2870 need_paren = 0;
2871 /* If expecting more operands, then we want to see "),". */
2872 if (*str == endc && opindex_ptr[1] != 0)
2873 {
2874 do
2875 ++str;
2876 while (ISSPACE (*str));
2877 endc = ',';
2878 }
2879 }
2880 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2881 {
2882 endc = '(';
2883 need_paren = 1;
2884 }
2885 else
2886 endc = ',';
2887
2888 /* The call to expression should have advanced str past any
2889 whitespace. */
2890 if (*str != endc
2891 && (endc != ',' || *str != '\0'))
2892 {
2893 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2894 break;
2895 }
2896
2897 if (*str != '\0')
2898 ++str;
2899 }
2900
2901 while (ISSPACE (*str))
2902 ++str;
2903
2904 if (*str != '\0')
2905 as_bad (_("junk at end of line: `%s'"), str);
2906
2907 #ifdef OBJ_ELF
2908 /* Do we need/want a APUinfo section? */
2909 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
2910 {
2911 /* These are all version "1". */
2912 if (opcode->flags & PPC_OPCODE_SPE)
2913 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
2914 if (opcode->flags & PPC_OPCODE_ISEL)
2915 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
2916 if (opcode->flags & PPC_OPCODE_EFS)
2917 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
2918 if (opcode->flags & PPC_OPCODE_BRLOCK)
2919 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
2920 if (opcode->flags & PPC_OPCODE_PMR)
2921 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
2922 if (opcode->flags & PPC_OPCODE_CACHELCK)
2923 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
2924 if (opcode->flags & PPC_OPCODE_RFMCI)
2925 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
2926 }
2927 #endif
2928
2929 /* Write out the instruction. */
2930 f = frag_more (4);
2931 addr_mod = frag_now_fix () & 3;
2932 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2933 as_bad (_("instruction address is not a multiple of 4"));
2934 frag_now->insn_addr = addr_mod;
2935 frag_now->has_code = 1;
2936 md_number_to_chars (f, insn, 4);
2937
2938 #ifdef OBJ_ELF
2939 dwarf2_emit_insn (4);
2940 #endif
2941
2942 /* Create any fixups. At this point we do not use a
2943 bfd_reloc_code_real_type, but instead just use the
2944 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2945 handle fixups for any operand type, although that is admittedly
2946 not a very exciting feature. We pick a BFD reloc type in
2947 md_apply_fix. */
2948 for (i = 0; i < fc; i++)
2949 {
2950 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2951 {
2952 reloc_howto_type *reloc_howto;
2953 int size;
2954 int offset;
2955 fixS *fixP;
2956
2957 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
2958 if (!reloc_howto)
2959 abort ();
2960
2961 size = bfd_get_reloc_size (reloc_howto);
2962 offset = target_big_endian ? (4 - size) : 0;
2963
2964 if (size < 1 || size > 4)
2965 abort ();
2966
2967 fixP = fix_new_exp (frag_now,
2968 f - frag_now->fr_literal + offset,
2969 size,
2970 &fixups[i].exp,
2971 reloc_howto->pc_relative,
2972 fixups[i].reloc);
2973
2974 /* Turn off complaints that the addend is too large for things like
2975 foo+100000@ha. */
2976 switch (fixups[i].reloc)
2977 {
2978 case BFD_RELOC_16_GOTOFF:
2979 case BFD_RELOC_PPC_TOC16:
2980 case BFD_RELOC_LO16:
2981 case BFD_RELOC_HI16:
2982 case BFD_RELOC_HI16_S:
2983 #ifdef OBJ_ELF
2984 case BFD_RELOC_PPC64_HIGHER:
2985 case BFD_RELOC_PPC64_HIGHER_S:
2986 case BFD_RELOC_PPC64_HIGHEST:
2987 case BFD_RELOC_PPC64_HIGHEST_S:
2988 #endif
2989 fixP->fx_no_overflow = 1;
2990 break;
2991 default:
2992 break;
2993 }
2994 }
2995 else
2996 {
2997 const struct powerpc_operand *operand;
2998
2999 operand = &powerpc_operands[fixups[i].opindex];
3000 fix_new_exp (frag_now,
3001 f - frag_now->fr_literal,
3002 4,
3003 &fixups[i].exp,
3004 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3005 ((bfd_reloc_code_real_type)
3006 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3007 }
3008 }
3009 }
3010
3011 /* Handle a macro. Gather all the operands, transform them as
3012 described by the macro, and call md_assemble recursively. All the
3013 operands are separated by commas; we don't accept parentheses
3014 around operands here. */
3015
3016 static void
3017 ppc_macro (char *str, const struct powerpc_macro *macro)
3018 {
3019 char *operands[10];
3020 unsigned int count;
3021 char *s;
3022 unsigned int len;
3023 const char *format;
3024 unsigned int arg;
3025 char *send;
3026 char *complete;
3027
3028 /* Gather the users operands into the operands array. */
3029 count = 0;
3030 s = str;
3031 while (1)
3032 {
3033 if (count >= sizeof operands / sizeof operands[0])
3034 break;
3035 operands[count++] = s;
3036 s = strchr (s, ',');
3037 if (s == (char *) NULL)
3038 break;
3039 *s++ = '\0';
3040 }
3041
3042 if (count != macro->operands)
3043 {
3044 as_bad (_("wrong number of operands"));
3045 return;
3046 }
3047
3048 /* Work out how large the string must be (the size is unbounded
3049 because it includes user input). */
3050 len = 0;
3051 format = macro->format;
3052 while (*format != '\0')
3053 {
3054 if (*format != '%')
3055 {
3056 ++len;
3057 ++format;
3058 }
3059 else
3060 {
3061 arg = strtol (format + 1, &send, 10);
3062 know (send != format && arg < count);
3063 len += strlen (operands[arg]);
3064 format = send;
3065 }
3066 }
3067
3068 /* Put the string together. */
3069 complete = s = (char *) alloca (len + 1);
3070 format = macro->format;
3071 while (*format != '\0')
3072 {
3073 if (*format != '%')
3074 *s++ = *format++;
3075 else
3076 {
3077 arg = strtol (format + 1, &send, 10);
3078 strcpy (s, operands[arg]);
3079 s += strlen (s);
3080 format = send;
3081 }
3082 }
3083 *s = '\0';
3084
3085 /* Assemble the constructed instruction. */
3086 md_assemble (complete);
3087 }
3088 \f
3089 #ifdef OBJ_ELF
3090 /* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
3091
3092 bfd_vma
3093 ppc_section_letter (int letter, char **ptr_msg)
3094 {
3095 if (letter == 'e')
3096 return SHF_EXCLUDE;
3097
3098 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
3099 return -1;
3100 }
3101
3102 bfd_vma
3103 ppc_section_word (char *str, size_t len)
3104 {
3105 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3106 return SHF_EXCLUDE;
3107
3108 return -1;
3109 }
3110
3111 int
3112 ppc_section_type (char *str, size_t len)
3113 {
3114 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3115 return SHT_ORDERED;
3116
3117 return -1;
3118 }
3119
3120 int
3121 ppc_section_flags (flagword flags, bfd_vma attr, int type)
3122 {
3123 if (type == SHT_ORDERED)
3124 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3125
3126 if (attr & SHF_EXCLUDE)
3127 flags |= SEC_EXCLUDE;
3128
3129 return flags;
3130 }
3131 #endif /* OBJ_ELF */
3132
3133 \f
3134 /* Pseudo-op handling. */
3135
3136 /* The .byte pseudo-op. This is similar to the normal .byte
3137 pseudo-op, but it can also take a single ASCII string. */
3138
3139 static void
3140 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3141 {
3142 if (*input_line_pointer != '\"')
3143 {
3144 cons (1);
3145 return;
3146 }
3147
3148 /* Gather characters. A real double quote is doubled. Unusual
3149 characters are not permitted. */
3150 ++input_line_pointer;
3151 while (1)
3152 {
3153 char c;
3154
3155 c = *input_line_pointer++;
3156
3157 if (c == '\"')
3158 {
3159 if (*input_line_pointer != '\"')
3160 break;
3161 ++input_line_pointer;
3162 }
3163
3164 FRAG_APPEND_1_CHAR (c);
3165 }
3166
3167 demand_empty_rest_of_line ();
3168 }
3169 \f
3170 #ifdef OBJ_XCOFF
3171
3172 /* XCOFF specific pseudo-op handling. */
3173
3174 /* This is set if we are creating a .stabx symbol, since we don't want
3175 to handle symbol suffixes for such symbols. */
3176 static bfd_boolean ppc_stab_symbol;
3177
3178 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3179 symbols in the .bss segment as though they were local common
3180 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3181 aligns .comm and .lcomm to 4 bytes. */
3182
3183 static void
3184 ppc_comm (int lcomm)
3185 {
3186 asection *current_seg = now_seg;
3187 subsegT current_subseg = now_subseg;
3188 char *name;
3189 char endc;
3190 char *end_name;
3191 offsetT size;
3192 offsetT align;
3193 symbolS *lcomm_sym = NULL;
3194 symbolS *sym;
3195 char *pfrag;
3196
3197 name = input_line_pointer;
3198 endc = get_symbol_end ();
3199 end_name = input_line_pointer;
3200 *end_name = endc;
3201
3202 if (*input_line_pointer != ',')
3203 {
3204 as_bad (_("missing size"));
3205 ignore_rest_of_line ();
3206 return;
3207 }
3208 ++input_line_pointer;
3209
3210 size = get_absolute_expression ();
3211 if (size < 0)
3212 {
3213 as_bad (_("negative size"));
3214 ignore_rest_of_line ();
3215 return;
3216 }
3217
3218 if (! lcomm)
3219 {
3220 /* The third argument to .comm is the alignment. */
3221 if (*input_line_pointer != ',')
3222 align = 2;
3223 else
3224 {
3225 ++input_line_pointer;
3226 align = get_absolute_expression ();
3227 if (align <= 0)
3228 {
3229 as_warn (_("ignoring bad alignment"));
3230 align = 2;
3231 }
3232 }
3233 }
3234 else
3235 {
3236 char *lcomm_name;
3237 char lcomm_endc;
3238
3239 if (size <= 4)
3240 align = 2;
3241 else
3242 align = 3;
3243
3244 /* The third argument to .lcomm appears to be the real local
3245 common symbol to create. References to the symbol named in
3246 the first argument are turned into references to the third
3247 argument. */
3248 if (*input_line_pointer != ',')
3249 {
3250 as_bad (_("missing real symbol name"));
3251 ignore_rest_of_line ();
3252 return;
3253 }
3254 ++input_line_pointer;
3255
3256 lcomm_name = input_line_pointer;
3257 lcomm_endc = get_symbol_end ();
3258
3259 lcomm_sym = symbol_find_or_make (lcomm_name);
3260
3261 *input_line_pointer = lcomm_endc;
3262 }
3263
3264 *end_name = '\0';
3265 sym = symbol_find_or_make (name);
3266 *end_name = endc;
3267
3268 if (S_IS_DEFINED (sym)
3269 || S_GET_VALUE (sym) != 0)
3270 {
3271 as_bad (_("attempt to redefine symbol"));
3272 ignore_rest_of_line ();
3273 return;
3274 }
3275
3276 record_alignment (bss_section, align);
3277
3278 if (! lcomm
3279 || ! S_IS_DEFINED (lcomm_sym))
3280 {
3281 symbolS *def_sym;
3282 offsetT def_size;
3283
3284 if (! lcomm)
3285 {
3286 def_sym = sym;
3287 def_size = size;
3288 S_SET_EXTERNAL (sym);
3289 }
3290 else
3291 {
3292 symbol_get_tc (lcomm_sym)->output = 1;
3293 def_sym = lcomm_sym;
3294 def_size = 0;
3295 }
3296
3297 subseg_set (bss_section, 1);
3298 frag_align (align, 0, 0);
3299
3300 symbol_set_frag (def_sym, frag_now);
3301 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3302 def_size, (char *) NULL);
3303 *pfrag = 0;
3304 S_SET_SEGMENT (def_sym, bss_section);
3305 symbol_get_tc (def_sym)->align = align;
3306 }
3307 else if (lcomm)
3308 {
3309 /* Align the size of lcomm_sym. */
3310 symbol_get_frag (lcomm_sym)->fr_offset =
3311 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3312 &~ ((1 << align) - 1));
3313 if (align > symbol_get_tc (lcomm_sym)->align)
3314 symbol_get_tc (lcomm_sym)->align = align;
3315 }
3316
3317 if (lcomm)
3318 {
3319 /* Make sym an offset from lcomm_sym. */
3320 S_SET_SEGMENT (sym, bss_section);
3321 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3322 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3323 symbol_get_frag (lcomm_sym)->fr_offset += size;
3324 }
3325
3326 subseg_set (current_seg, current_subseg);
3327
3328 demand_empty_rest_of_line ();
3329 }
3330
3331 /* The .csect pseudo-op. This switches us into a different
3332 subsegment. The first argument is a symbol whose value is the
3333 start of the .csect. In COFF, csect symbols get special aux
3334 entries defined by the x_csect field of union internal_auxent. The
3335 optional second argument is the alignment (the default is 2). */
3336
3337 static void
3338 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3339 {
3340 char *name;
3341 char endc;
3342 symbolS *sym;
3343 offsetT align;
3344
3345 name = input_line_pointer;
3346 endc = get_symbol_end ();
3347
3348 sym = symbol_find_or_make (name);
3349
3350 *input_line_pointer = endc;
3351
3352 if (S_GET_NAME (sym)[0] == '\0')
3353 {
3354 /* An unnamed csect is assumed to be [PR]. */
3355 symbol_get_tc (sym)->symbol_class = XMC_PR;
3356 }
3357
3358 align = 2;
3359 if (*input_line_pointer == ',')
3360 {
3361 ++input_line_pointer;
3362 align = get_absolute_expression ();
3363 }
3364
3365 ppc_change_csect (sym, align);
3366
3367 demand_empty_rest_of_line ();
3368 }
3369
3370 /* Change to a different csect. */
3371
3372 static void
3373 ppc_change_csect (symbolS *sym, offsetT align)
3374 {
3375 if (S_IS_DEFINED (sym))
3376 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3377 else
3378 {
3379 symbolS **list_ptr;
3380 int after_toc;
3381 int hold_chunksize;
3382 symbolS *list;
3383 int is_code;
3384 segT sec;
3385
3386 /* This is a new csect. We need to look at the symbol class to
3387 figure out whether it should go in the text section or the
3388 data section. */
3389 after_toc = 0;
3390 is_code = 0;
3391 switch (symbol_get_tc (sym)->symbol_class)
3392 {
3393 case XMC_PR:
3394 case XMC_RO:
3395 case XMC_DB:
3396 case XMC_GL:
3397 case XMC_XO:
3398 case XMC_SV:
3399 case XMC_TI:
3400 case XMC_TB:
3401 S_SET_SEGMENT (sym, text_section);
3402 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3403 ++ppc_text_subsegment;
3404 list_ptr = &ppc_text_csects;
3405 is_code = 1;
3406 break;
3407 case XMC_RW:
3408 case XMC_TC0:
3409 case XMC_TC:
3410 case XMC_DS:
3411 case XMC_UA:
3412 case XMC_BS:
3413 case XMC_UC:
3414 if (ppc_toc_csect != NULL
3415 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3416 == ppc_data_subsegment))
3417 after_toc = 1;
3418 S_SET_SEGMENT (sym, data_section);
3419 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3420 ++ppc_data_subsegment;
3421 list_ptr = &ppc_data_csects;
3422 break;
3423 default:
3424 abort ();
3425 }
3426
3427 /* We set the obstack chunk size to a small value before
3428 changing subsegments, so that we don't use a lot of memory
3429 space for what may be a small section. */
3430 hold_chunksize = chunksize;
3431 chunksize = 64;
3432
3433 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3434 symbol_get_tc (sym)->subseg);
3435
3436 chunksize = hold_chunksize;
3437
3438 if (after_toc)
3439 ppc_after_toc_frag = frag_now;
3440
3441 record_alignment (sec, align);
3442 if (is_code)
3443 frag_align_code (align, 0);
3444 else
3445 frag_align (align, 0, 0);
3446
3447 symbol_set_frag (sym, frag_now);
3448 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3449
3450 symbol_get_tc (sym)->align = align;
3451 symbol_get_tc (sym)->output = 1;
3452 symbol_get_tc (sym)->within = sym;
3453
3454 for (list = *list_ptr;
3455 symbol_get_tc (list)->next != (symbolS *) NULL;
3456 list = symbol_get_tc (list)->next)
3457 ;
3458 symbol_get_tc (list)->next = sym;
3459
3460 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3461 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3462 &symbol_lastP);
3463 }
3464
3465 ppc_current_csect = sym;
3466 }
3467
3468 /* This function handles the .text and .data pseudo-ops. These
3469 pseudo-ops aren't really used by XCOFF; we implement them for the
3470 convenience of people who aren't used to XCOFF. */
3471
3472 static void
3473 ppc_section (int type)
3474 {
3475 const char *name;
3476 symbolS *sym;
3477
3478 if (type == 't')
3479 name = ".text[PR]";
3480 else if (type == 'd')
3481 name = ".data[RW]";
3482 else
3483 abort ();
3484
3485 sym = symbol_find_or_make (name);
3486
3487 ppc_change_csect (sym, 2);
3488
3489 demand_empty_rest_of_line ();
3490 }
3491
3492 /* This function handles the .section pseudo-op. This is mostly to
3493 give an error, since XCOFF only supports .text, .data and .bss, but
3494 we do permit the user to name the text or data section. */
3495
3496 static void
3497 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3498 {
3499 char *user_name;
3500 const char *real_name;
3501 char c;
3502 symbolS *sym;
3503
3504 user_name = input_line_pointer;
3505 c = get_symbol_end ();
3506
3507 if (strcmp (user_name, ".text") == 0)
3508 real_name = ".text[PR]";
3509 else if (strcmp (user_name, ".data") == 0)
3510 real_name = ".data[RW]";
3511 else
3512 {
3513 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3514 *input_line_pointer = c;
3515 ignore_rest_of_line ();
3516 return;
3517 }
3518
3519 *input_line_pointer = c;
3520
3521 sym = symbol_find_or_make (real_name);
3522
3523 ppc_change_csect (sym, 2);
3524
3525 demand_empty_rest_of_line ();
3526 }
3527
3528 /* The .extern pseudo-op. We create an undefined symbol. */
3529
3530 static void
3531 ppc_extern (int ignore ATTRIBUTE_UNUSED)
3532 {
3533 char *name;
3534 char endc;
3535
3536 name = input_line_pointer;
3537 endc = get_symbol_end ();
3538
3539 (void) symbol_find_or_make (name);
3540
3541 *input_line_pointer = endc;
3542
3543 demand_empty_rest_of_line ();
3544 }
3545
3546 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3547
3548 static void
3549 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
3550 {
3551 char *name;
3552 char endc;
3553 symbolS *sym;
3554
3555 name = input_line_pointer;
3556 endc = get_symbol_end ();
3557
3558 sym = symbol_find_or_make (name);
3559
3560 *input_line_pointer = endc;
3561
3562 symbol_get_tc (sym)->output = 1;
3563
3564 demand_empty_rest_of_line ();
3565 }
3566
3567 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3568 relocations at the beginning of the current csect.
3569
3570 (In principle, there's no reason why the relocations _have_ to be at
3571 the beginning. Anywhere in the csect would do. However, inserting
3572 at the beginning is what the native assmebler does, and it helps to
3573 deal with cases where the .ref statements follow the section contents.)
3574
3575 ??? .refs don't work for empty .csects. However, the native assembler
3576 doesn't report an error in this case, and neither yet do we. */
3577
3578 static void
3579 ppc_ref (int ignore ATTRIBUTE_UNUSED)
3580 {
3581 char *name;
3582 char c;
3583
3584 if (ppc_current_csect == NULL)
3585 {
3586 as_bad (_(".ref outside .csect"));
3587 ignore_rest_of_line ();
3588 return;
3589 }
3590
3591 do
3592 {
3593 name = input_line_pointer;
3594 c = get_symbol_end ();
3595
3596 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3597 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3598
3599 *input_line_pointer = c;
3600 SKIP_WHITESPACE ();
3601 c = *input_line_pointer;
3602 if (c == ',')
3603 {
3604 input_line_pointer++;
3605 SKIP_WHITESPACE ();
3606 if (is_end_of_line[(unsigned char) *input_line_pointer])
3607 {
3608 as_bad (_("missing symbol name"));
3609 ignore_rest_of_line ();
3610 return;
3611 }
3612 }
3613 }
3614 while (c == ',');
3615
3616 demand_empty_rest_of_line ();
3617 }
3618
3619 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3620 although I don't know why it bothers. */
3621
3622 static void
3623 ppc_rename (int ignore ATTRIBUTE_UNUSED)
3624 {
3625 char *name;
3626 char endc;
3627 symbolS *sym;
3628 int len;
3629
3630 name = input_line_pointer;
3631 endc = get_symbol_end ();
3632
3633 sym = symbol_find_or_make (name);
3634
3635 *input_line_pointer = endc;
3636
3637 if (*input_line_pointer != ',')
3638 {
3639 as_bad (_("missing rename string"));
3640 ignore_rest_of_line ();
3641 return;
3642 }
3643 ++input_line_pointer;
3644
3645 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
3646
3647 demand_empty_rest_of_line ();
3648 }
3649
3650 /* The .stabx pseudo-op. This is similar to a normal .stabs
3651 pseudo-op, but slightly different. A sample is
3652 .stabx "main:F-1",.main,142,0
3653 The first argument is the symbol name to create. The second is the
3654 value, and the third is the storage class. The fourth seems to be
3655 always zero, and I am assuming it is the type. */
3656
3657 static void
3658 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
3659 {
3660 char *name;
3661 int len;
3662 symbolS *sym;
3663 expressionS exp;
3664
3665 name = demand_copy_C_string (&len);
3666
3667 if (*input_line_pointer != ',')
3668 {
3669 as_bad (_("missing value"));
3670 return;
3671 }
3672 ++input_line_pointer;
3673
3674 ppc_stab_symbol = TRUE;
3675 sym = symbol_make (name);
3676 ppc_stab_symbol = FALSE;
3677
3678 symbol_get_tc (sym)->real_name = name;
3679
3680 (void) expression (&exp);
3681
3682 switch (exp.X_op)
3683 {
3684 case O_illegal:
3685 case O_absent:
3686 case O_big:
3687 as_bad (_("illegal .stabx expression; zero assumed"));
3688 exp.X_add_number = 0;
3689 /* Fall through. */
3690 case O_constant:
3691 S_SET_VALUE (sym, (valueT) exp.X_add_number);
3692 symbol_set_frag (sym, &zero_address_frag);
3693 break;
3694
3695 case O_symbol:
3696 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
3697 symbol_set_value_expression (sym, &exp);
3698 else
3699 {
3700 S_SET_VALUE (sym,
3701 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
3702 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
3703 }
3704 break;
3705
3706 default:
3707 /* The value is some complex expression. This will probably
3708 fail at some later point, but this is probably the right
3709 thing to do here. */
3710 symbol_set_value_expression (sym, &exp);
3711 break;
3712 }
3713
3714 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3715 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3716
3717 if (*input_line_pointer != ',')
3718 {
3719 as_bad (_("missing class"));
3720 return;
3721 }
3722 ++input_line_pointer;
3723
3724 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3725
3726 if (*input_line_pointer != ',')
3727 {
3728 as_bad (_("missing type"));
3729 return;
3730 }
3731 ++input_line_pointer;
3732
3733 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3734
3735 symbol_get_tc (sym)->output = 1;
3736
3737 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
3738
3739 symbol_get_tc (sym)->within = ppc_current_block;
3740
3741 /* In this case :
3742
3743 .bs name
3744 .stabx "z",arrays_,133,0
3745 .es
3746
3747 .comm arrays_,13768,3
3748
3749 resolve_symbol_value will copy the exp's "within" into sym's when the
3750 offset is 0. Since this seems to be corner case problem,
3751 only do the correction for storage class C_STSYM. A better solution
3752 would be to have the tc field updated in ppc_symbol_new_hook. */
3753
3754 if (exp.X_op == O_symbol)
3755 {
3756 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3757 }
3758 }
3759
3760 if (exp.X_op != O_symbol
3761 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3762 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3763 ppc_frob_label (sym);
3764 else
3765 {
3766 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3767 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
3768 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3769 symbol_get_tc (ppc_current_csect)->within = sym;
3770 }
3771
3772 demand_empty_rest_of_line ();
3773 }
3774
3775 /* The .function pseudo-op. This takes several arguments. The first
3776 argument seems to be the external name of the symbol. The second
3777 argument seems to be the label for the start of the function. gcc
3778 uses the same name for both. I have no idea what the third and
3779 fourth arguments are meant to be. The optional fifth argument is
3780 an expression for the size of the function. In COFF this symbol
3781 gets an aux entry like that used for a csect. */
3782
3783 static void
3784 ppc_function (int ignore ATTRIBUTE_UNUSED)
3785 {
3786 char *name;
3787 char endc;
3788 char *s;
3789 symbolS *ext_sym;
3790 symbolS *lab_sym;
3791
3792 name = input_line_pointer;
3793 endc = get_symbol_end ();
3794
3795 /* Ignore any [PR] suffix. */
3796 name = ppc_canonicalize_symbol_name (name);
3797 s = strchr (name, '[');
3798 if (s != (char *) NULL
3799 && strcmp (s + 1, "PR]") == 0)
3800 *s = '\0';
3801
3802 ext_sym = symbol_find_or_make (name);
3803
3804 *input_line_pointer = endc;
3805
3806 if (*input_line_pointer != ',')
3807 {
3808 as_bad (_("missing symbol name"));
3809 ignore_rest_of_line ();
3810 return;
3811 }
3812 ++input_line_pointer;
3813
3814 name = input_line_pointer;
3815 endc = get_symbol_end ();
3816
3817 lab_sym = symbol_find_or_make (name);
3818
3819 *input_line_pointer = endc;
3820
3821 if (ext_sym != lab_sym)
3822 {
3823 expressionS exp;
3824
3825 exp.X_op = O_symbol;
3826 exp.X_add_symbol = lab_sym;
3827 exp.X_op_symbol = NULL;
3828 exp.X_add_number = 0;
3829 exp.X_unsigned = 0;
3830 symbol_set_value_expression (ext_sym, &exp);
3831 }
3832
3833 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3834 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
3835 symbol_get_tc (ext_sym)->output = 1;
3836
3837 if (*input_line_pointer == ',')
3838 {
3839 expressionS exp;
3840
3841 /* Ignore the third argument. */
3842 ++input_line_pointer;
3843 expression (& exp);
3844 if (*input_line_pointer == ',')
3845 {
3846 /* Ignore the fourth argument. */
3847 ++input_line_pointer;
3848 expression (& exp);
3849 if (*input_line_pointer == ',')
3850 {
3851 /* The fifth argument is the function size. */
3852 ++input_line_pointer;
3853 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3854 absolute_section,
3855 (valueT) 0,
3856 &zero_address_frag);
3857 pseudo_set (symbol_get_tc (ext_sym)->size);
3858 }
3859 }
3860 }
3861
3862 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3863 SF_SET_FUNCTION (ext_sym);
3864 SF_SET_PROCESS (ext_sym);
3865 coff_add_linesym (ext_sym);
3866
3867 demand_empty_rest_of_line ();
3868 }
3869
3870 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
3871 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3872 with the correct line number */
3873
3874 static symbolS *saved_bi_sym = 0;
3875
3876 static void
3877 ppc_bf (int ignore ATTRIBUTE_UNUSED)
3878 {
3879 symbolS *sym;
3880
3881 sym = symbol_make (".bf");
3882 S_SET_SEGMENT (sym, text_section);
3883 symbol_set_frag (sym, frag_now);
3884 S_SET_VALUE (sym, frag_now_fix ());
3885 S_SET_STORAGE_CLASS (sym, C_FCN);
3886
3887 coff_line_base = get_absolute_expression ();
3888
3889 S_SET_NUMBER_AUXILIARY (sym, 1);
3890 SA_SET_SYM_LNNO (sym, coff_line_base);
3891
3892 /* Line number for bi. */
3893 if (saved_bi_sym)
3894 {
3895 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3896 saved_bi_sym = 0;
3897 }
3898
3899
3900 symbol_get_tc (sym)->output = 1;
3901
3902 ppc_frob_label (sym);
3903
3904 demand_empty_rest_of_line ();
3905 }
3906
3907 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3908 ".ef", except that the line number is absolute, not relative to the
3909 most recent ".bf" symbol. */
3910
3911 static void
3912 ppc_ef (int ignore ATTRIBUTE_UNUSED)
3913 {
3914 symbolS *sym;
3915
3916 sym = symbol_make (".ef");
3917 S_SET_SEGMENT (sym, text_section);
3918 symbol_set_frag (sym, frag_now);
3919 S_SET_VALUE (sym, frag_now_fix ());
3920 S_SET_STORAGE_CLASS (sym, C_FCN);
3921 S_SET_NUMBER_AUXILIARY (sym, 1);
3922 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3923 symbol_get_tc (sym)->output = 1;
3924
3925 ppc_frob_label (sym);
3926
3927 demand_empty_rest_of_line ();
3928 }
3929
3930 /* The .bi and .ei pseudo-ops. These take a string argument and
3931 generates a C_BINCL or C_EINCL symbol, which goes at the start of
3932 the symbol list. The value of .bi will be know when the next .bf
3933 is encountered. */
3934
3935 static void
3936 ppc_biei (int ei)
3937 {
3938 static symbolS *last_biei;
3939
3940 char *name;
3941 int len;
3942 symbolS *sym;
3943 symbolS *look;
3944
3945 name = demand_copy_C_string (&len);
3946
3947 /* The value of these symbols is actually file offset. Here we set
3948 the value to the index into the line number entries. In
3949 ppc_frob_symbols we set the fix_line field, which will cause BFD
3950 to do the right thing. */
3951
3952 sym = symbol_make (name);
3953 /* obj-coff.c currently only handles line numbers correctly in the
3954 .text section. */
3955 S_SET_SEGMENT (sym, text_section);
3956 S_SET_VALUE (sym, coff_n_line_nos);
3957 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3958
3959 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
3960 symbol_get_tc (sym)->output = 1;
3961
3962 /* Save bi. */
3963 if (ei)
3964 saved_bi_sym = 0;
3965 else
3966 saved_bi_sym = sym;
3967
3968 for (look = last_biei ? last_biei : symbol_rootP;
3969 (look != (symbolS *) NULL
3970 && (S_GET_STORAGE_CLASS (look) == C_FILE
3971 || S_GET_STORAGE_CLASS (look) == C_BINCL
3972 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3973 look = symbol_next (look))
3974 ;
3975 if (look != (symbolS *) NULL)
3976 {
3977 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3978 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3979 last_biei = sym;
3980 }
3981
3982 demand_empty_rest_of_line ();
3983 }
3984
3985 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3986 There is one argument, which is a csect symbol. The value of the
3987 .bs symbol is the index of this csect symbol. */
3988
3989 static void
3990 ppc_bs (int ignore ATTRIBUTE_UNUSED)
3991 {
3992 char *name;
3993 char endc;
3994 symbolS *csect;
3995 symbolS *sym;
3996
3997 if (ppc_current_block != NULL)
3998 as_bad (_("nested .bs blocks"));
3999
4000 name = input_line_pointer;
4001 endc = get_symbol_end ();
4002
4003 csect = symbol_find_or_make (name);
4004
4005 *input_line_pointer = endc;
4006
4007 sym = symbol_make (".bs");
4008 S_SET_SEGMENT (sym, now_seg);
4009 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4010 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4011 symbol_get_tc (sym)->output = 1;
4012
4013 symbol_get_tc (sym)->within = csect;
4014
4015 ppc_frob_label (sym);
4016
4017 ppc_current_block = sym;
4018
4019 demand_empty_rest_of_line ();
4020 }
4021
4022 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4023
4024 static void
4025 ppc_es (int ignore ATTRIBUTE_UNUSED)
4026 {
4027 symbolS *sym;
4028
4029 if (ppc_current_block == NULL)
4030 as_bad (_(".es without preceding .bs"));
4031
4032 sym = symbol_make (".es");
4033 S_SET_SEGMENT (sym, now_seg);
4034 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4035 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4036 symbol_get_tc (sym)->output = 1;
4037
4038 ppc_frob_label (sym);
4039
4040 ppc_current_block = NULL;
4041
4042 demand_empty_rest_of_line ();
4043 }
4044
4045 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4046 line number. */
4047
4048 static void
4049 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4050 {
4051 symbolS *sym;
4052
4053 sym = symbol_make (".bb");
4054 S_SET_SEGMENT (sym, text_section);
4055 symbol_set_frag (sym, frag_now);
4056 S_SET_VALUE (sym, frag_now_fix ());
4057 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4058
4059 S_SET_NUMBER_AUXILIARY (sym, 1);
4060 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4061
4062 symbol_get_tc (sym)->output = 1;
4063
4064 SF_SET_PROCESS (sym);
4065
4066 ppc_frob_label (sym);
4067
4068 demand_empty_rest_of_line ();
4069 }
4070
4071 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4072 line number. */
4073
4074 static void
4075 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4076 {
4077 symbolS *sym;
4078
4079 sym = symbol_make (".eb");
4080 S_SET_SEGMENT (sym, text_section);
4081 symbol_set_frag (sym, frag_now);
4082 S_SET_VALUE (sym, frag_now_fix ());
4083 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4084 S_SET_NUMBER_AUXILIARY (sym, 1);
4085 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4086 symbol_get_tc (sym)->output = 1;
4087
4088 SF_SET_PROCESS (sym);
4089
4090 ppc_frob_label (sym);
4091
4092 demand_empty_rest_of_line ();
4093 }
4094
4095 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4096 specified name. */
4097
4098 static void
4099 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4100 {
4101 char *name;
4102 int len;
4103 symbolS *sym;
4104
4105 name = demand_copy_C_string (&len);
4106 sym = symbol_make (name);
4107 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4108 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4109 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4110 S_SET_VALUE (sym, 0);
4111 symbol_get_tc (sym)->output = 1;
4112
4113 ppc_frob_label (sym);
4114
4115 demand_empty_rest_of_line ();
4116 }
4117
4118 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4119
4120 static void
4121 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4122 {
4123 symbolS *sym;
4124
4125 sym = symbol_make (".ec");
4126 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4127 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4128 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4129 S_SET_VALUE (sym, 0);
4130 symbol_get_tc (sym)->output = 1;
4131
4132 ppc_frob_label (sym);
4133
4134 demand_empty_rest_of_line ();
4135 }
4136
4137 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4138
4139 static void
4140 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4141 {
4142 if (ppc_toc_csect != (symbolS *) NULL)
4143 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4144 else
4145 {
4146 subsegT subseg;
4147 symbolS *sym;
4148 symbolS *list;
4149
4150 subseg = ppc_data_subsegment;
4151 ++ppc_data_subsegment;
4152
4153 subseg_new (segment_name (data_section), subseg);
4154 ppc_toc_frag = frag_now;
4155
4156 sym = symbol_find_or_make ("TOC[TC0]");
4157 symbol_set_frag (sym, frag_now);
4158 S_SET_SEGMENT (sym, data_section);
4159 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4160 symbol_get_tc (sym)->subseg = subseg;
4161 symbol_get_tc (sym)->output = 1;
4162 symbol_get_tc (sym)->within = sym;
4163
4164 ppc_toc_csect = sym;
4165
4166 for (list = ppc_data_csects;
4167 symbol_get_tc (list)->next != (symbolS *) NULL;
4168 list = symbol_get_tc (list)->next)
4169 ;
4170 symbol_get_tc (list)->next = sym;
4171
4172 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4173 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4174 &symbol_lastP);
4175 }
4176
4177 ppc_current_csect = ppc_toc_csect;
4178
4179 demand_empty_rest_of_line ();
4180 }
4181
4182 /* The AIX assembler automatically aligns the operands of a .long or
4183 .short pseudo-op, and we want to be compatible. */
4184
4185 static void
4186 ppc_xcoff_cons (int log_size)
4187 {
4188 frag_align (log_size, 0, 0);
4189 record_alignment (now_seg, log_size);
4190 cons (1 << log_size);
4191 }
4192
4193 static void
4194 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4195 {
4196 expressionS exp;
4197 int byte_count;
4198
4199 (void) expression (&exp);
4200
4201 if (exp.X_op != O_constant)
4202 {
4203 as_bad (_("non-constant byte count"));
4204 return;
4205 }
4206
4207 byte_count = exp.X_add_number;
4208
4209 if (*input_line_pointer != ',')
4210 {
4211 as_bad (_("missing value"));
4212 return;
4213 }
4214
4215 ++input_line_pointer;
4216 cons (byte_count);
4217 }
4218
4219 #endif /* OBJ_XCOFF */
4220 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4221 \f
4222 /* The .tc pseudo-op. This is used when generating either XCOFF or
4223 ELF. This takes two or more arguments.
4224
4225 When generating XCOFF output, the first argument is the name to
4226 give to this location in the toc; this will be a symbol with class
4227 TC. The rest of the arguments are N-byte values to actually put at
4228 this location in the TOC; often there is just one more argument, a
4229 relocatable symbol reference. The size of the value to store
4230 depends on target word size. A 32-bit target uses 4-byte values, a
4231 64-bit target uses 8-byte values.
4232
4233 When not generating XCOFF output, the arguments are the same, but
4234 the first argument is simply ignored. */
4235
4236 static void
4237 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4238 {
4239 #ifdef OBJ_XCOFF
4240
4241 /* Define the TOC symbol name. */
4242 {
4243 char *name;
4244 char endc;
4245 symbolS *sym;
4246
4247 if (ppc_toc_csect == (symbolS *) NULL
4248 || ppc_toc_csect != ppc_current_csect)
4249 {
4250 as_bad (_(".tc not in .toc section"));
4251 ignore_rest_of_line ();
4252 return;
4253 }
4254
4255 name = input_line_pointer;
4256 endc = get_symbol_end ();
4257
4258 sym = symbol_find_or_make (name);
4259
4260 *input_line_pointer = endc;
4261
4262 if (S_IS_DEFINED (sym))
4263 {
4264 symbolS *label;
4265
4266 label = symbol_get_tc (ppc_current_csect)->within;
4267 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4268 {
4269 as_bad (_(".tc with no label"));
4270 ignore_rest_of_line ();
4271 return;
4272 }
4273
4274 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4275 symbol_set_frag (label, symbol_get_frag (sym));
4276 S_SET_VALUE (label, S_GET_VALUE (sym));
4277
4278 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4279 ++input_line_pointer;
4280
4281 return;
4282 }
4283
4284 S_SET_SEGMENT (sym, now_seg);
4285 symbol_set_frag (sym, frag_now);
4286 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4287 symbol_get_tc (sym)->symbol_class = XMC_TC;
4288 symbol_get_tc (sym)->output = 1;
4289
4290 ppc_frob_label (sym);
4291 }
4292
4293 #endif /* OBJ_XCOFF */
4294 #ifdef OBJ_ELF
4295 int align;
4296
4297 /* Skip the TOC symbol name. */
4298 while (is_part_of_name (*input_line_pointer)
4299 || *input_line_pointer == ' '
4300 || *input_line_pointer == '['
4301 || *input_line_pointer == ']'
4302 || *input_line_pointer == '{'
4303 || *input_line_pointer == '}')
4304 ++input_line_pointer;
4305
4306 /* Align to a four/eight byte boundary. */
4307 align = ppc_obj64 ? 3 : 2;
4308 frag_align (align, 0, 0);
4309 record_alignment (now_seg, align);
4310 #endif /* OBJ_ELF */
4311
4312 if (*input_line_pointer != ',')
4313 demand_empty_rest_of_line ();
4314 else
4315 {
4316 ++input_line_pointer;
4317 cons (ppc_obj64 ? 8 : 4);
4318 }
4319 }
4320
4321 /* Pseudo-op .machine. */
4322
4323 static void
4324 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4325 {
4326 char *cpu_string;
4327 #define MAX_HISTORY 100
4328 static ppc_cpu_t *cpu_history;
4329 static int curr_hist;
4330
4331 SKIP_WHITESPACE ();
4332
4333 if (*input_line_pointer == '"')
4334 {
4335 int len;
4336 cpu_string = demand_copy_C_string (&len);
4337 }
4338 else
4339 {
4340 char c;
4341 cpu_string = input_line_pointer;
4342 c = get_symbol_end ();
4343 cpu_string = xstrdup (cpu_string);
4344 *input_line_pointer = c;
4345 }
4346
4347 if (cpu_string != NULL)
4348 {
4349 ppc_cpu_t old_cpu = ppc_cpu;
4350 ppc_cpu_t new_cpu;
4351 char *p;
4352
4353 for (p = cpu_string; *p != 0; p++)
4354 *p = TOLOWER (*p);
4355
4356 if (strcmp (cpu_string, "push") == 0)
4357 {
4358 if (cpu_history == NULL)
4359 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4360
4361 if (curr_hist >= MAX_HISTORY)
4362 as_bad (_(".machine stack overflow"));
4363 else
4364 cpu_history[curr_hist++] = ppc_cpu;
4365 }
4366 else if (strcmp (cpu_string, "pop") == 0)
4367 {
4368 if (curr_hist <= 0)
4369 as_bad (_(".machine stack underflow"));
4370 else
4371 ppc_cpu = cpu_history[--curr_hist];
4372 }
4373 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4374 ppc_cpu = new_cpu;
4375 else
4376 as_bad (_("invalid machine `%s'"), cpu_string);
4377
4378 if (ppc_cpu != old_cpu)
4379 ppc_setup_opcodes ();
4380 }
4381
4382 demand_empty_rest_of_line ();
4383 }
4384
4385 /* See whether a symbol is in the TOC section. */
4386
4387 static int
4388 ppc_is_toc_sym (symbolS *sym)
4389 {
4390 #ifdef OBJ_XCOFF
4391 return symbol_get_tc (sym)->symbol_class == XMC_TC;
4392 #endif
4393 #ifdef OBJ_ELF
4394 const char *sname = segment_name (S_GET_SEGMENT (sym));
4395 if (ppc_obj64)
4396 return strcmp (sname, ".toc") == 0;
4397 else
4398 return strcmp (sname, ".got") == 0;
4399 #endif
4400 }
4401 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4402 \f
4403 #ifdef TE_PE
4404
4405 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4406
4407 /* Set the current section. */
4408 static void
4409 ppc_set_current_section (segT new)
4410 {
4411 ppc_previous_section = ppc_current_section;
4412 ppc_current_section = new;
4413 }
4414
4415 /* pseudo-op: .previous
4416 behaviour: toggles the current section with the previous section.
4417 errors: None
4418 warnings: "No previous section" */
4419
4420 static void
4421 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4422 {
4423 symbolS *tmp;
4424
4425 if (ppc_previous_section == NULL)
4426 {
4427 as_warn (_("No previous section to return to. Directive ignored."));
4428 return;
4429 }
4430
4431 subseg_set (ppc_previous_section, 0);
4432
4433 ppc_set_current_section (ppc_previous_section);
4434 }
4435
4436 /* pseudo-op: .pdata
4437 behaviour: predefined read only data section
4438 double word aligned
4439 errors: None
4440 warnings: None
4441 initial: .section .pdata "adr3"
4442 a - don't know -- maybe a misprint
4443 d - initialized data
4444 r - readable
4445 3 - double word aligned (that would be 4 byte boundary)
4446
4447 commentary:
4448 Tag index tables (also known as the function table) for exception
4449 handling, debugging, etc. */
4450
4451 static void
4452 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4453 {
4454 if (pdata_section == 0)
4455 {
4456 pdata_section = subseg_new (".pdata", 0);
4457
4458 bfd_set_section_flags (stdoutput, pdata_section,
4459 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4460 | SEC_READONLY | SEC_DATA ));
4461
4462 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4463 }
4464 else
4465 {
4466 pdata_section = subseg_new (".pdata", 0);
4467 }
4468 ppc_set_current_section (pdata_section);
4469 }
4470
4471 /* pseudo-op: .ydata
4472 behaviour: predefined read only data section
4473 double word aligned
4474 errors: None
4475 warnings: None
4476 initial: .section .ydata "drw3"
4477 a - don't know -- maybe a misprint
4478 d - initialized data
4479 r - readable
4480 3 - double word aligned (that would be 4 byte boundary)
4481 commentary:
4482 Tag tables (also known as the scope table) for exception handling,
4483 debugging, etc. */
4484
4485 static void
4486 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4487 {
4488 if (ydata_section == 0)
4489 {
4490 ydata_section = subseg_new (".ydata", 0);
4491 bfd_set_section_flags (stdoutput, ydata_section,
4492 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4493 | SEC_READONLY | SEC_DATA ));
4494
4495 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4496 }
4497 else
4498 {
4499 ydata_section = subseg_new (".ydata", 0);
4500 }
4501 ppc_set_current_section (ydata_section);
4502 }
4503
4504 /* pseudo-op: .reldata
4505 behaviour: predefined read write data section
4506 double word aligned (4-byte)
4507 FIXME: relocation is applied to it
4508 FIXME: what's the difference between this and .data?
4509 errors: None
4510 warnings: None
4511 initial: .section .reldata "drw3"
4512 d - initialized data
4513 r - readable
4514 w - writeable
4515 3 - double word aligned (that would be 8 byte boundary)
4516
4517 commentary:
4518 Like .data, but intended to hold data subject to relocation, such as
4519 function descriptors, etc. */
4520
4521 static void
4522 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
4523 {
4524 if (reldata_section == 0)
4525 {
4526 reldata_section = subseg_new (".reldata", 0);
4527
4528 bfd_set_section_flags (stdoutput, reldata_section,
4529 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4530 | SEC_DATA));
4531
4532 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4533 }
4534 else
4535 {
4536 reldata_section = subseg_new (".reldata", 0);
4537 }
4538 ppc_set_current_section (reldata_section);
4539 }
4540
4541 /* pseudo-op: .rdata
4542 behaviour: predefined read only data section
4543 double word aligned
4544 errors: None
4545 warnings: None
4546 initial: .section .rdata "dr3"
4547 d - initialized data
4548 r - readable
4549 3 - double word aligned (that would be 4 byte boundary) */
4550
4551 static void
4552 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
4553 {
4554 if (rdata_section == 0)
4555 {
4556 rdata_section = subseg_new (".rdata", 0);
4557 bfd_set_section_flags (stdoutput, rdata_section,
4558 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4559 | SEC_READONLY | SEC_DATA ));
4560
4561 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4562 }
4563 else
4564 {
4565 rdata_section = subseg_new (".rdata", 0);
4566 }
4567 ppc_set_current_section (rdata_section);
4568 }
4569
4570 /* pseudo-op: .ualong
4571 behaviour: much like .int, with the exception that no alignment is
4572 performed.
4573 FIXME: test the alignment statement
4574 errors: None
4575 warnings: None */
4576
4577 static void
4578 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
4579 {
4580 /* Try for long. */
4581 cons (4);
4582 }
4583
4584 /* pseudo-op: .znop <symbol name>
4585 behaviour: Issue a nop instruction
4586 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
4587 the supplied symbol name.
4588 errors: None
4589 warnings: Missing symbol name */
4590
4591 static void
4592 ppc_znop (int ignore ATTRIBUTE_UNUSED)
4593 {
4594 unsigned long insn;
4595 const struct powerpc_opcode *opcode;
4596 expressionS ex;
4597 char *f;
4598 symbolS *sym;
4599 char *symbol_name;
4600 char c;
4601 char *name;
4602 unsigned int exp;
4603 flagword flags;
4604 asection *sec;
4605
4606 /* Strip out the symbol name. */
4607 symbol_name = input_line_pointer;
4608 c = get_symbol_end ();
4609
4610 name = xmalloc (input_line_pointer - symbol_name + 1);
4611 strcpy (name, symbol_name);
4612
4613 sym = symbol_find_or_make (name);
4614
4615 *input_line_pointer = c;
4616
4617 SKIP_WHITESPACE ();
4618
4619 /* Look up the opcode in the hash table. */
4620 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4621
4622 /* Stick in the nop. */
4623 insn = opcode->opcode;
4624
4625 /* Write out the instruction. */
4626 f = frag_more (4);
4627 md_number_to_chars (f, insn, 4);
4628 fix_new (frag_now,
4629 f - frag_now->fr_literal,
4630 4,
4631 sym,
4632 0,
4633 0,
4634 BFD_RELOC_16_GOT_PCREL);
4635
4636 }
4637
4638 /* pseudo-op:
4639 behaviour:
4640 errors:
4641 warnings: */
4642
4643 static void
4644 ppc_pe_comm (int lcomm)
4645 {
4646 char *name;
4647 char c;
4648 char *p;
4649 offsetT temp;
4650 symbolS *symbolP;
4651 offsetT align;
4652
4653 name = input_line_pointer;
4654 c = get_symbol_end ();
4655
4656 /* just after name is now '\0'. */
4657 p = input_line_pointer;
4658 *p = c;
4659 SKIP_WHITESPACE ();
4660 if (*input_line_pointer != ',')
4661 {
4662 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4663 ignore_rest_of_line ();
4664 return;
4665 }
4666
4667 input_line_pointer++; /* skip ',' */
4668 if ((temp = get_absolute_expression ()) < 0)
4669 {
4670 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4671 ignore_rest_of_line ();
4672 return;
4673 }
4674
4675 if (! lcomm)
4676 {
4677 /* The third argument to .comm is the alignment. */
4678 if (*input_line_pointer != ',')
4679 align = 3;
4680 else
4681 {
4682 ++input_line_pointer;
4683 align = get_absolute_expression ();
4684 if (align <= 0)
4685 {
4686 as_warn (_("ignoring bad alignment"));
4687 align = 3;
4688 }
4689 }
4690 }
4691
4692 *p = 0;
4693 symbolP = symbol_find_or_make (name);
4694
4695 *p = c;
4696 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4697 {
4698 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4699 S_GET_NAME (symbolP));
4700 ignore_rest_of_line ();
4701 return;
4702 }
4703
4704 if (S_GET_VALUE (symbolP))
4705 {
4706 if (S_GET_VALUE (symbolP) != (valueT) temp)
4707 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4708 S_GET_NAME (symbolP),
4709 (long) S_GET_VALUE (symbolP),
4710 (long) temp);
4711 }
4712 else
4713 {
4714 S_SET_VALUE (symbolP, (valueT) temp);
4715 S_SET_EXTERNAL (symbolP);
4716 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
4717 }
4718
4719 demand_empty_rest_of_line ();
4720 }
4721
4722 /*
4723 * implement the .section pseudo op:
4724 * .section name {, "flags"}
4725 * ^ ^
4726 * | +--- optional flags: 'b' for bss
4727 * | 'i' for info
4728 * +-- section name 'l' for lib
4729 * 'n' for noload
4730 * 'o' for over
4731 * 'w' for data
4732 * 'd' (apparently m88k for data)
4733 * 'x' for text
4734 * But if the argument is not a quoted string, treat it as a
4735 * subsegment number.
4736 *
4737 * FIXME: this is a copy of the section processing from obj-coff.c, with
4738 * additions/changes for the moto-pas assembler support. There are three
4739 * categories:
4740 *
4741 * FIXME: I just noticed this. This doesn't work at all really. It it
4742 * setting bits that bfd probably neither understands or uses. The
4743 * correct approach (?) will have to incorporate extra fields attached
4744 * to the section to hold the system specific stuff. (krk)
4745 *
4746 * Section Contents:
4747 * 'a' - unknown - referred to in documentation, but no definition supplied
4748 * 'c' - section has code
4749 * 'd' - section has initialized data
4750 * 'u' - section has uninitialized data
4751 * 'i' - section contains directives (info)
4752 * 'n' - section can be discarded
4753 * 'R' - remove section at link time
4754 *
4755 * Section Protection:
4756 * 'r' - section is readable
4757 * 'w' - section is writeable
4758 * 'x' - section is executable
4759 * 's' - section is sharable
4760 *
4761 * Section Alignment:
4762 * '0' - align to byte boundary
4763 * '1' - align to halfword undary
4764 * '2' - align to word boundary
4765 * '3' - align to doubleword boundary
4766 * '4' - align to quadword boundary
4767 * '5' - align to 32 byte boundary
4768 * '6' - align to 64 byte boundary
4769 *
4770 */
4771
4772 void
4773 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
4774 {
4775 /* Strip out the section name. */
4776 char *section_name;
4777 char c;
4778 char *name;
4779 unsigned int exp;
4780 flagword flags;
4781 segT sec;
4782 int align;
4783
4784 section_name = input_line_pointer;
4785 c = get_symbol_end ();
4786
4787 name = xmalloc (input_line_pointer - section_name + 1);
4788 strcpy (name, section_name);
4789
4790 *input_line_pointer = c;
4791
4792 SKIP_WHITESPACE ();
4793
4794 exp = 0;
4795 flags = SEC_NO_FLAGS;
4796
4797 if (strcmp (name, ".idata$2") == 0)
4798 {
4799 align = 0;
4800 }
4801 else if (strcmp (name, ".idata$3") == 0)
4802 {
4803 align = 0;
4804 }
4805 else if (strcmp (name, ".idata$4") == 0)
4806 {
4807 align = 2;
4808 }
4809 else if (strcmp (name, ".idata$5") == 0)
4810 {
4811 align = 2;
4812 }
4813 else if (strcmp (name, ".idata$6") == 0)
4814 {
4815 align = 1;
4816 }
4817 else
4818 /* Default alignment to 16 byte boundary. */
4819 align = 4;
4820
4821 if (*input_line_pointer == ',')
4822 {
4823 ++input_line_pointer;
4824 SKIP_WHITESPACE ();
4825 if (*input_line_pointer != '"')
4826 exp = get_absolute_expression ();
4827 else
4828 {
4829 ++input_line_pointer;
4830 while (*input_line_pointer != '"'
4831 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4832 {
4833 switch (*input_line_pointer)
4834 {
4835 /* Section Contents */
4836 case 'a': /* unknown */
4837 as_bad (_("Unsupported section attribute -- 'a'"));
4838 break;
4839 case 'c': /* code section */
4840 flags |= SEC_CODE;
4841 break;
4842 case 'd': /* section has initialized data */
4843 flags |= SEC_DATA;
4844 break;
4845 case 'u': /* section has uninitialized data */
4846 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4847 in winnt.h */
4848 flags |= SEC_ROM;
4849 break;
4850 case 'i': /* section contains directives (info) */
4851 /* FIXME: This is IMAGE_SCN_LNK_INFO
4852 in winnt.h */
4853 flags |= SEC_HAS_CONTENTS;
4854 break;
4855 case 'n': /* section can be discarded */
4856 flags &=~ SEC_LOAD;
4857 break;
4858 case 'R': /* Remove section at link time */
4859 flags |= SEC_NEVER_LOAD;
4860 break;
4861 #if IFLICT_BRAIN_DAMAGE
4862 /* Section Protection */
4863 case 'r': /* section is readable */
4864 flags |= IMAGE_SCN_MEM_READ;
4865 break;
4866 case 'w': /* section is writeable */
4867 flags |= IMAGE_SCN_MEM_WRITE;
4868 break;
4869 case 'x': /* section is executable */
4870 flags |= IMAGE_SCN_MEM_EXECUTE;
4871 break;
4872 case 's': /* section is sharable */
4873 flags |= IMAGE_SCN_MEM_SHARED;
4874 break;
4875
4876 /* Section Alignment */
4877 case '0': /* align to byte boundary */
4878 flags |= IMAGE_SCN_ALIGN_1BYTES;
4879 align = 0;
4880 break;
4881 case '1': /* align to halfword boundary */
4882 flags |= IMAGE_SCN_ALIGN_2BYTES;
4883 align = 1;
4884 break;
4885 case '2': /* align to word boundary */
4886 flags |= IMAGE_SCN_ALIGN_4BYTES;
4887 align = 2;
4888 break;
4889 case '3': /* align to doubleword boundary */
4890 flags |= IMAGE_SCN_ALIGN_8BYTES;
4891 align = 3;
4892 break;
4893 case '4': /* align to quadword boundary */
4894 flags |= IMAGE_SCN_ALIGN_16BYTES;
4895 align = 4;
4896 break;
4897 case '5': /* align to 32 byte boundary */
4898 flags |= IMAGE_SCN_ALIGN_32BYTES;
4899 align = 5;
4900 break;
4901 case '6': /* align to 64 byte boundary */
4902 flags |= IMAGE_SCN_ALIGN_64BYTES;
4903 align = 6;
4904 break;
4905 #endif
4906 default:
4907 as_bad (_("unknown section attribute '%c'"),
4908 *input_line_pointer);
4909 break;
4910 }
4911 ++input_line_pointer;
4912 }
4913 if (*input_line_pointer == '"')
4914 ++input_line_pointer;
4915 }
4916 }
4917
4918 sec = subseg_new (name, (subsegT) exp);
4919
4920 ppc_set_current_section (sec);
4921
4922 if (flags != SEC_NO_FLAGS)
4923 {
4924 if (! bfd_set_section_flags (stdoutput, sec, flags))
4925 as_bad (_("error setting flags for \"%s\": %s"),
4926 bfd_section_name (stdoutput, sec),
4927 bfd_errmsg (bfd_get_error ()));
4928 }
4929
4930 bfd_set_section_alignment (stdoutput, sec, align);
4931 }
4932
4933 static void
4934 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
4935 {
4936 char *name;
4937 char endc;
4938 symbolS *ext_sym;
4939
4940 name = input_line_pointer;
4941 endc = get_symbol_end ();
4942
4943 ext_sym = symbol_find_or_make (name);
4944
4945 *input_line_pointer = endc;
4946
4947 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4948 SF_SET_FUNCTION (ext_sym);
4949 SF_SET_PROCESS (ext_sym);
4950 coff_add_linesym (ext_sym);
4951
4952 demand_empty_rest_of_line ();
4953 }
4954
4955 static void
4956 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
4957 {
4958 if (tocdata_section == 0)
4959 {
4960 tocdata_section = subseg_new (".tocd", 0);
4961 /* FIXME: section flags won't work. */
4962 bfd_set_section_flags (stdoutput, tocdata_section,
4963 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4964 | SEC_READONLY | SEC_DATA));
4965
4966 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4967 }
4968 else
4969 {
4970 rdata_section = subseg_new (".tocd", 0);
4971 }
4972
4973 ppc_set_current_section (tocdata_section);
4974
4975 demand_empty_rest_of_line ();
4976 }
4977
4978 /* Don't adjust TOC relocs to use the section symbol. */
4979
4980 int
4981 ppc_pe_fix_adjustable (fixS *fix)
4982 {
4983 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4984 }
4985
4986 #endif
4987 \f
4988 #ifdef OBJ_XCOFF
4989
4990 /* XCOFF specific symbol and file handling. */
4991
4992 /* Canonicalize the symbol name. We use the to force the suffix, if
4993 any, to use square brackets, and to be in upper case. */
4994
4995 char *
4996 ppc_canonicalize_symbol_name (char *name)
4997 {
4998 char *s;
4999
5000 if (ppc_stab_symbol)
5001 return name;
5002
5003 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5004 ;
5005 if (*s != '\0')
5006 {
5007 char brac;
5008
5009 if (*s == '[')
5010 brac = ']';
5011 else
5012 {
5013 *s = '[';
5014 brac = '}';
5015 }
5016
5017 for (s++; *s != '\0' && *s != brac; s++)
5018 *s = TOUPPER (*s);
5019
5020 if (*s == '\0' || s[1] != '\0')
5021 as_bad (_("bad symbol suffix"));
5022
5023 *s = ']';
5024 }
5025
5026 return name;
5027 }
5028
5029 /* Set the class of a symbol based on the suffix, if any. This is
5030 called whenever a new symbol is created. */
5031
5032 void
5033 ppc_symbol_new_hook (symbolS *sym)
5034 {
5035 struct ppc_tc_sy *tc;
5036 const char *s;
5037
5038 tc = symbol_get_tc (sym);
5039 tc->next = NULL;
5040 tc->output = 0;
5041 tc->symbol_class = -1;
5042 tc->real_name = NULL;
5043 tc->subseg = 0;
5044 tc->align = 0;
5045 tc->size = NULL;
5046 tc->within = NULL;
5047
5048 if (ppc_stab_symbol)
5049 return;
5050
5051 s = strchr (S_GET_NAME (sym), '[');
5052 if (s == (const char *) NULL)
5053 {
5054 /* There is no suffix. */
5055 return;
5056 }
5057
5058 ++s;
5059
5060 switch (s[0])
5061 {
5062 case 'B':
5063 if (strcmp (s, "BS]") == 0)
5064 tc->symbol_class = XMC_BS;
5065 break;
5066 case 'D':
5067 if (strcmp (s, "DB]") == 0)
5068 tc->symbol_class = XMC_DB;
5069 else if (strcmp (s, "DS]") == 0)
5070 tc->symbol_class = XMC_DS;
5071 break;
5072 case 'G':
5073 if (strcmp (s, "GL]") == 0)
5074 tc->symbol_class = XMC_GL;
5075 break;
5076 case 'P':
5077 if (strcmp (s, "PR]") == 0)
5078 tc->symbol_class = XMC_PR;
5079 break;
5080 case 'R':
5081 if (strcmp (s, "RO]") == 0)
5082 tc->symbol_class = XMC_RO;
5083 else if (strcmp (s, "RW]") == 0)
5084 tc->symbol_class = XMC_RW;
5085 break;
5086 case 'S':
5087 if (strcmp (s, "SV]") == 0)
5088 tc->symbol_class = XMC_SV;
5089 break;
5090 case 'T':
5091 if (strcmp (s, "TC]") == 0)
5092 tc->symbol_class = XMC_TC;
5093 else if (strcmp (s, "TI]") == 0)
5094 tc->symbol_class = XMC_TI;
5095 else if (strcmp (s, "TB]") == 0)
5096 tc->symbol_class = XMC_TB;
5097 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5098 tc->symbol_class = XMC_TC0;
5099 break;
5100 case 'U':
5101 if (strcmp (s, "UA]") == 0)
5102 tc->symbol_class = XMC_UA;
5103 else if (strcmp (s, "UC]") == 0)
5104 tc->symbol_class = XMC_UC;
5105 break;
5106 case 'X':
5107 if (strcmp (s, "XO]") == 0)
5108 tc->symbol_class = XMC_XO;
5109 break;
5110 }
5111
5112 if (tc->symbol_class == -1)
5113 as_bad (_("Unrecognized symbol suffix"));
5114 }
5115
5116 /* Set the class of a label based on where it is defined. This
5117 handles symbols without suffixes. Also, move the symbol so that it
5118 follows the csect symbol. */
5119
5120 void
5121 ppc_frob_label (symbolS *sym)
5122 {
5123 if (ppc_current_csect != (symbolS *) NULL)
5124 {
5125 if (symbol_get_tc (sym)->symbol_class == -1)
5126 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5127
5128 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5129 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5130 &symbol_rootP, &symbol_lastP);
5131 symbol_get_tc (ppc_current_csect)->within = sym;
5132 }
5133
5134 #ifdef OBJ_ELF
5135 dwarf2_emit_label (sym);
5136 #endif
5137 }
5138
5139 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5140 seen. It tells ppc_adjust_symtab whether it needs to look through
5141 the symbols. */
5142
5143 static bfd_boolean ppc_saw_abs;
5144
5145 /* Change the name of a symbol just before writing it out. Set the
5146 real name if the .rename pseudo-op was used. Otherwise, remove any
5147 class suffix. Return 1 if the symbol should not be included in the
5148 symbol table. */
5149
5150 int
5151 ppc_frob_symbol (symbolS *sym)
5152 {
5153 static symbolS *ppc_last_function;
5154 static symbolS *set_end;
5155
5156 /* Discard symbols that should not be included in the output symbol
5157 table. */
5158 if (! symbol_used_in_reloc_p (sym)
5159 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5160 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5161 && ! symbol_get_tc (sym)->output
5162 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5163 return 1;
5164
5165 /* This one will disappear anyway. Don't make a csect sym for it. */
5166 if (sym == abs_section_sym)
5167 return 1;
5168
5169 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5170 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5171 else
5172 {
5173 const char *name;
5174 const char *s;
5175
5176 name = S_GET_NAME (sym);
5177 s = strchr (name, '[');
5178 if (s != (char *) NULL)
5179 {
5180 unsigned int len;
5181 char *snew;
5182
5183 len = s - name;
5184 snew = xmalloc (len + 1);
5185 memcpy (snew, name, len);
5186 snew[len] = '\0';
5187
5188 S_SET_NAME (sym, snew);
5189 }
5190 }
5191
5192 if (set_end != (symbolS *) NULL)
5193 {
5194 SA_SET_SYM_ENDNDX (set_end, sym);
5195 set_end = NULL;
5196 }
5197
5198 if (SF_GET_FUNCTION (sym))
5199 {
5200 if (ppc_last_function != (symbolS *) NULL)
5201 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5202 ppc_last_function = sym;
5203 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
5204 {
5205 resolve_symbol_value (symbol_get_tc (sym)->size);
5206 SA_SET_SYM_FSIZE (sym,
5207 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
5208 }
5209 }
5210 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5211 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5212 {
5213 if (ppc_last_function == (symbolS *) NULL)
5214 as_bad (_(".ef with no preceding .function"));
5215 else
5216 {
5217 set_end = ppc_last_function;
5218 ppc_last_function = NULL;
5219
5220 /* We don't have a C_EFCN symbol, but we need to force the
5221 COFF backend to believe that it has seen one. */
5222 coff_last_function = NULL;
5223 }
5224 }
5225
5226 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5227 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5228 && S_GET_STORAGE_CLASS (sym) != C_FILE
5229 && S_GET_STORAGE_CLASS (sym) != C_FCN
5230 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5231 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5232 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5233 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5234 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5235 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5236 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5237
5238 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5239 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5240 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5241 {
5242 int i;
5243 union internal_auxent *a;
5244
5245 /* Create a csect aux. */
5246 i = S_GET_NUMBER_AUXILIARY (sym);
5247 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5248 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5249 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5250 {
5251 /* This is the TOC table. */
5252 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5253 a->x_csect.x_scnlen.l = 0;
5254 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5255 }
5256 else if (symbol_get_tc (sym)->subseg != 0)
5257 {
5258 /* This is a csect symbol. x_scnlen is the size of the
5259 csect. */
5260 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5261 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5262 S_GET_SEGMENT (sym))
5263 - S_GET_VALUE (sym));
5264 else
5265 {
5266 resolve_symbol_value (symbol_get_tc (sym)->next);
5267 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5268 - S_GET_VALUE (sym));
5269 }
5270 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5271 }
5272 else if (S_GET_SEGMENT (sym) == bss_section)
5273 {
5274 /* This is a common symbol. */
5275 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5276 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5277 if (S_IS_EXTERNAL (sym))
5278 symbol_get_tc (sym)->symbol_class = XMC_RW;
5279 else
5280 symbol_get_tc (sym)->symbol_class = XMC_BS;
5281 }
5282 else if (S_GET_SEGMENT (sym) == absolute_section)
5283 {
5284 /* This is an absolute symbol. The csect will be created by
5285 ppc_adjust_symtab. */
5286 ppc_saw_abs = TRUE;
5287 a->x_csect.x_smtyp = XTY_LD;
5288 if (symbol_get_tc (sym)->symbol_class == -1)
5289 symbol_get_tc (sym)->symbol_class = XMC_XO;
5290 }
5291 else if (! S_IS_DEFINED (sym))
5292 {
5293 /* This is an external symbol. */
5294 a->x_csect.x_scnlen.l = 0;
5295 a->x_csect.x_smtyp = XTY_ER;
5296 }
5297 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5298 {
5299 symbolS *next;
5300
5301 /* This is a TOC definition. x_scnlen is the size of the
5302 TOC entry. */
5303 next = symbol_next (sym);
5304 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5305 next = symbol_next (next);
5306 if (next == (symbolS *) NULL
5307 || symbol_get_tc (next)->symbol_class != XMC_TC)
5308 {
5309 if (ppc_after_toc_frag == (fragS *) NULL)
5310 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5311 data_section)
5312 - S_GET_VALUE (sym));
5313 else
5314 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5315 - S_GET_VALUE (sym));
5316 }
5317 else
5318 {
5319 resolve_symbol_value (next);
5320 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5321 - S_GET_VALUE (sym));
5322 }
5323 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5324 }
5325 else
5326 {
5327 symbolS *csect;
5328
5329 /* This is a normal symbol definition. x_scnlen is the
5330 symbol index of the containing csect. */
5331 if (S_GET_SEGMENT (sym) == text_section)
5332 csect = ppc_text_csects;
5333 else if (S_GET_SEGMENT (sym) == data_section)
5334 csect = ppc_data_csects;
5335 else
5336 abort ();
5337
5338 /* Skip the initial dummy symbol. */
5339 csect = symbol_get_tc (csect)->next;
5340
5341 if (csect == (symbolS *) NULL)
5342 {
5343 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5344 a->x_csect.x_scnlen.l = 0;
5345 }
5346 else
5347 {
5348 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5349 {
5350 resolve_symbol_value (symbol_get_tc (csect)->next);
5351 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5352 > S_GET_VALUE (sym))
5353 break;
5354 csect = symbol_get_tc (csect)->next;
5355 }
5356
5357 a->x_csect.x_scnlen.p =
5358 coffsymbol (symbol_get_bfdsym (csect))->native;
5359 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5360 1;
5361 }
5362 a->x_csect.x_smtyp = XTY_LD;
5363 }
5364
5365 a->x_csect.x_parmhash = 0;
5366 a->x_csect.x_snhash = 0;
5367 if (symbol_get_tc (sym)->symbol_class == -1)
5368 a->x_csect.x_smclas = XMC_PR;
5369 else
5370 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5371 a->x_csect.x_stab = 0;
5372 a->x_csect.x_snstab = 0;
5373
5374 /* Don't let the COFF backend resort these symbols. */
5375 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5376 }
5377 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5378 {
5379 /* We want the value to be the symbol index of the referenced
5380 csect symbol. BFD will do that for us if we set the right
5381 flags. */
5382 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5383 combined_entry_type *c = coffsymbol (bsym)->native;
5384
5385 S_SET_VALUE (sym, (valueT) (size_t) c);
5386 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5387 }
5388 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5389 {
5390 symbolS *block;
5391 symbolS *csect;
5392
5393 /* The value is the offset from the enclosing csect. */
5394 block = symbol_get_tc (sym)->within;
5395 csect = symbol_get_tc (block)->within;
5396 resolve_symbol_value (csect);
5397 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5398 }
5399 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5400 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5401 {
5402 /* We want the value to be a file offset into the line numbers.
5403 BFD will do that for us if we set the right flags. We have
5404 already set the value correctly. */
5405 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5406 }
5407
5408 return 0;
5409 }
5410
5411 /* Adjust the symbol table. This creates csect symbols for all
5412 absolute symbols. */
5413
5414 void
5415 ppc_adjust_symtab (void)
5416 {
5417 symbolS *sym;
5418
5419 if (! ppc_saw_abs)
5420 return;
5421
5422 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5423 {
5424 symbolS *csect;
5425 int i;
5426 union internal_auxent *a;
5427
5428 if (S_GET_SEGMENT (sym) != absolute_section)
5429 continue;
5430
5431 csect = symbol_create (".abs[XO]", absolute_section,
5432 S_GET_VALUE (sym), &zero_address_frag);
5433 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5434 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5435 i = S_GET_NUMBER_AUXILIARY (csect);
5436 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5437 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5438 a->x_csect.x_scnlen.l = 0;
5439 a->x_csect.x_smtyp = XTY_SD;
5440 a->x_csect.x_parmhash = 0;
5441 a->x_csect.x_snhash = 0;
5442 a->x_csect.x_smclas = XMC_XO;
5443 a->x_csect.x_stab = 0;
5444 a->x_csect.x_snstab = 0;
5445
5446 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5447
5448 i = S_GET_NUMBER_AUXILIARY (sym);
5449 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5450 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5451 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5452 }
5453
5454 ppc_saw_abs = FALSE;
5455 }
5456
5457 /* Set the VMA for a section. This is called on all the sections in
5458 turn. */
5459
5460 void
5461 ppc_frob_section (asection *sec)
5462 {
5463 static bfd_vma vma = 0;
5464
5465 vma = md_section_align (sec, vma);
5466 bfd_set_section_vma (stdoutput, sec, vma);
5467 vma += bfd_section_size (stdoutput, sec);
5468 }
5469
5470 #endif /* OBJ_XCOFF */
5471 \f
5472 char *
5473 md_atof (int type, char *litp, int *sizep)
5474 {
5475 return ieee_md_atof (type, litp, sizep, target_big_endian);
5476 }
5477
5478 /* Write a value out to the object file, using the appropriate
5479 endianness. */
5480
5481 void
5482 md_number_to_chars (char *buf, valueT val, int n)
5483 {
5484 if (target_big_endian)
5485 number_to_chars_bigendian (buf, val, n);
5486 else
5487 number_to_chars_littleendian (buf, val, n);
5488 }
5489
5490 /* Align a section (I don't know why this is machine dependent). */
5491
5492 valueT
5493 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5494 {
5495 #ifdef OBJ_ELF
5496 return addr;
5497 #else
5498 int align = bfd_get_section_alignment (stdoutput, seg);
5499
5500 return ((addr + (1 << align) - 1) & (-1 << align));
5501 #endif
5502 }
5503
5504 /* We don't have any form of relaxing. */
5505
5506 int
5507 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5508 asection *seg ATTRIBUTE_UNUSED)
5509 {
5510 abort ();
5511 return 0;
5512 }
5513
5514 /* Convert a machine dependent frag. We never generate these. */
5515
5516 void
5517 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5518 asection *sec ATTRIBUTE_UNUSED,
5519 fragS *fragp ATTRIBUTE_UNUSED)
5520 {
5521 abort ();
5522 }
5523
5524 /* We have no need to default values of symbols. */
5525
5526 symbolS *
5527 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
5528 {
5529 return 0;
5530 }
5531 \f
5532 /* Functions concerning relocs. */
5533
5534 /* The location from which a PC relative jump should be calculated,
5535 given a PC relative reloc. */
5536
5537 long
5538 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
5539 {
5540 return fixp->fx_frag->fr_address + fixp->fx_where;
5541 }
5542
5543 #ifdef OBJ_XCOFF
5544
5545 /* This is called to see whether a fixup should be adjusted to use a
5546 section symbol. We take the opportunity to change a fixup against
5547 a symbol in the TOC subsegment into a reloc against the
5548 corresponding .tc symbol. */
5549
5550 int
5551 ppc_fix_adjustable (fixS *fix)
5552 {
5553 valueT val = resolve_symbol_value (fix->fx_addsy);
5554 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5555 TC_SYMFIELD_TYPE *tc;
5556
5557 if (symseg == absolute_section)
5558 return 0;
5559
5560 if (ppc_toc_csect != (symbolS *) NULL
5561 && fix->fx_addsy != ppc_toc_csect
5562 && symseg == data_section
5563 && val >= ppc_toc_frag->fr_address
5564 && (ppc_after_toc_frag == (fragS *) NULL
5565 || val < ppc_after_toc_frag->fr_address))
5566 {
5567 symbolS *sy;
5568
5569 for (sy = symbol_next (ppc_toc_csect);
5570 sy != (symbolS *) NULL;
5571 sy = symbol_next (sy))
5572 {
5573 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5574
5575 if (sy_tc->symbol_class == XMC_TC0)
5576 continue;
5577 if (sy_tc->symbol_class != XMC_TC)
5578 break;
5579 if (val == resolve_symbol_value (sy))
5580 {
5581 fix->fx_addsy = sy;
5582 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5583 return 0;
5584 }
5585 }
5586
5587 as_bad_where (fix->fx_file, fix->fx_line,
5588 _("symbol in .toc does not match any .tc"));
5589 }
5590
5591 /* Possibly adjust the reloc to be against the csect. */
5592 tc = symbol_get_tc (fix->fx_addsy);
5593 if (tc->subseg == 0
5594 && tc->symbol_class != XMC_TC0
5595 && tc->symbol_class != XMC_TC
5596 && symseg != bss_section
5597 /* Don't adjust if this is a reloc in the toc section. */
5598 && (symseg != data_section
5599 || ppc_toc_csect == NULL
5600 || val < ppc_toc_frag->fr_address
5601 || (ppc_after_toc_frag != NULL
5602 && val >= ppc_after_toc_frag->fr_address)))
5603 {
5604 symbolS *csect;
5605 symbolS *next_csect;
5606
5607 if (symseg == text_section)
5608 csect = ppc_text_csects;
5609 else if (symseg == data_section)
5610 csect = ppc_data_csects;
5611 else
5612 abort ();
5613
5614 /* Skip the initial dummy symbol. */
5615 csect = symbol_get_tc (csect)->next;
5616
5617 if (csect != (symbolS *) NULL)
5618 {
5619 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5620 && (symbol_get_frag (next_csect)->fr_address <= val))
5621 {
5622 /* If the csect address equals the symbol value, then we
5623 have to look through the full symbol table to see
5624 whether this is the csect we want. Note that we will
5625 only get here if the csect has zero length. */
5626 if (symbol_get_frag (csect)->fr_address == val
5627 && S_GET_VALUE (csect) == val)
5628 {
5629 symbolS *scan;
5630
5631 for (scan = symbol_next (csect);
5632 scan != NULL;
5633 scan = symbol_next (scan))
5634 {
5635 if (symbol_get_tc (scan)->subseg != 0)
5636 break;
5637 if (scan == fix->fx_addsy)
5638 break;
5639 }
5640
5641 /* If we found the symbol before the next csect
5642 symbol, then this is the csect we want. */
5643 if (scan == fix->fx_addsy)
5644 break;
5645 }
5646
5647 csect = next_csect;
5648 }
5649
5650 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5651 fix->fx_addsy = csect;
5652 }
5653 return 0;
5654 }
5655
5656 /* Adjust a reloc against a .lcomm symbol to be against the base
5657 .lcomm. */
5658 if (symseg == bss_section
5659 && ! S_IS_EXTERNAL (fix->fx_addsy))
5660 {
5661 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5662
5663 fix->fx_offset += val - resolve_symbol_value (sy);
5664 fix->fx_addsy = sy;
5665 }
5666
5667 return 0;
5668 }
5669
5670 /* A reloc from one csect to another must be kept. The assembler
5671 will, of course, keep relocs between sections, and it will keep
5672 absolute relocs, but we need to force it to keep PC relative relocs
5673 between two csects in the same section. */
5674
5675 int
5676 ppc_force_relocation (fixS *fix)
5677 {
5678 /* At this point fix->fx_addsy should already have been converted to
5679 a csect symbol. If the csect does not include the fragment, then
5680 we need to force the relocation. */
5681 if (fix->fx_pcrel
5682 && fix->fx_addsy != NULL
5683 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5684 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5685 > fix->fx_frag->fr_address)
5686 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5687 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
5688 <= fix->fx_frag->fr_address))))
5689 return 1;
5690
5691 return generic_force_reloc (fix);
5692 }
5693
5694 #endif /* OBJ_XCOFF */
5695
5696 #ifdef OBJ_ELF
5697 /* If this function returns non-zero, it guarantees that a relocation
5698 will be emitted for a fixup. */
5699
5700 int
5701 ppc_force_relocation (fixS *fix)
5702 {
5703 /* Branch prediction relocations must force a relocation, as must
5704 the vtable description relocs. */
5705 switch (fix->fx_r_type)
5706 {
5707 case BFD_RELOC_PPC_B16_BRTAKEN:
5708 case BFD_RELOC_PPC_B16_BRNTAKEN:
5709 case BFD_RELOC_PPC_BA16_BRTAKEN:
5710 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5711 case BFD_RELOC_24_PLT_PCREL:
5712 case BFD_RELOC_PPC64_TOC:
5713 return 1;
5714 default:
5715 break;
5716 }
5717
5718 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5719 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5720 return 1;
5721
5722 return generic_force_reloc (fix);
5723 }
5724
5725 int
5726 ppc_fix_adjustable (fixS *fix)
5727 {
5728 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5729 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5730 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5731 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5732 && fix->fx_r_type != BFD_RELOC_GPREL16
5733 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5734 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
5735 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5736 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
5737 }
5738 #endif
5739
5740 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5741 rs_align_code frag. */
5742
5743 void
5744 ppc_handle_align (struct frag *fragP)
5745 {
5746 valueT count = (fragP->fr_next->fr_address
5747 - (fragP->fr_address + fragP->fr_fix));
5748
5749 if (count != 0 && (count & 3) == 0)
5750 {
5751 char *dest = fragP->fr_literal + fragP->fr_fix;
5752
5753 fragP->fr_var = 4;
5754 md_number_to_chars (dest, 0x60000000, 4);
5755
5756 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5757 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
5758 {
5759 /* For power6 and power7, we want the last nop to be a group
5760 terminating one. Do this by inserting an rs_fill frag immediately
5761 after this one, with its address set to the last nop location.
5762 This will automatically reduce the number of nops in the current
5763 frag by one. */
5764 if (count > 4)
5765 {
5766 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5767
5768 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5769 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5770 group_nop->fr_fix = 0;
5771 group_nop->fr_offset = 1;
5772 group_nop->fr_type = rs_fill;
5773 fragP->fr_next = group_nop;
5774 dest = group_nop->fr_literal;
5775 }
5776
5777 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5778 /* power7 group terminating nop: "ori 2,2,0". */
5779 md_number_to_chars (dest, 0x60420000, 4);
5780 else
5781 /* power6 group terminating nop: "ori 1,1,0". */
5782 md_number_to_chars (dest, 0x60210000, 4);
5783 }
5784 }
5785 }
5786
5787 /* Apply a fixup to the object code. This is called for all the
5788 fixups we generated by the call to fix_new_exp, above. In the call
5789 above we used a reloc code which was the largest legal reloc code
5790 plus the operand index. Here we undo that to recover the operand
5791 index. At this point all symbol values should be fully resolved,
5792 and we attempt to completely resolve the reloc. If we can not do
5793 that, we determine the correct reloc code and put it back in the
5794 fixup. */
5795
5796 void
5797 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
5798 {
5799 valueT value = * valP;
5800
5801 #ifdef OBJ_ELF
5802 if (fixP->fx_addsy != NULL)
5803 {
5804 /* Hack around bfd_install_relocation brain damage. */
5805 if (fixP->fx_pcrel)
5806 value += fixP->fx_frag->fr_address + fixP->fx_where;
5807 }
5808 else
5809 fixP->fx_done = 1;
5810 #else
5811 /* FIXME FIXME FIXME: The value we are passed in *valP includes
5812 the symbol values. If we are doing this relocation the code in
5813 write.c is going to call bfd_install_relocation, which is also
5814 going to use the symbol value. That means that if the reloc is
5815 fully resolved we want to use *valP since bfd_install_relocation is
5816 not being used.
5817 However, if the reloc is not fully resolved we do not want to
5818 use *valP, and must use fx_offset instead. If the relocation
5819 is PC-relative, we then need to re-apply md_pcrel_from_section
5820 to this new relocation value. */
5821 if (fixP->fx_addsy == (symbolS *) NULL)
5822 fixP->fx_done = 1;
5823
5824 else
5825 {
5826 value = fixP->fx_offset;
5827 if (fixP->fx_pcrel)
5828 value -= md_pcrel_from_section (fixP, seg);
5829 }
5830 #endif
5831
5832 if (fixP->fx_subsy != (symbolS *) NULL)
5833 {
5834 /* We can't actually support subtracting a symbol. */
5835 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
5836 }
5837
5838 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
5839 {
5840 int opindex;
5841 const struct powerpc_operand *operand;
5842 char *where;
5843 unsigned long insn;
5844
5845 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
5846
5847 operand = &powerpc_operands[opindex];
5848
5849 #ifdef OBJ_XCOFF
5850 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5851 does not generate a reloc. It uses the offset of `sym' within its
5852 csect. Other usages, such as `.long sym', generate relocs. This
5853 is the documented behaviour of non-TOC symbols. */
5854 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5855 && (operand->bitm & 0xfff0) == 0xfff0
5856 && operand->shift == 0
5857 && (operand->insert == NULL || ppc_obj64)
5858 && fixP->fx_addsy != NULL
5859 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5860 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5861 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
5862 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
5863 {
5864 value = fixP->fx_offset;
5865 fixP->fx_done = 1;
5866 }
5867 #endif
5868
5869 /* Fetch the instruction, insert the fully resolved operand
5870 value, and stuff the instruction back again. */
5871 where = fixP->fx_frag->fr_literal + fixP->fx_where;
5872 if (target_big_endian)
5873 insn = bfd_getb32 ((unsigned char *) where);
5874 else
5875 insn = bfd_getl32 ((unsigned char *) where);
5876 insn = ppc_insert_operand (insn, operand, (offsetT) value,
5877 fixP->tc_fix_data.ppc_cpu,
5878 fixP->fx_file, fixP->fx_line);
5879 if (target_big_endian)
5880 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5881 else
5882 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5883
5884 if (fixP->fx_done)
5885 /* Nothing else to do here. */
5886 return;
5887
5888 gas_assert (fixP->fx_addsy != NULL);
5889
5890 /* Determine a BFD reloc value based on the operand information.
5891 We are only prepared to turn a few of the operands into
5892 relocs. */
5893 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5894 && operand->bitm == 0x3fffffc
5895 && operand->shift == 0)
5896 fixP->fx_r_type = BFD_RELOC_PPC_B26;
5897 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5898 && operand->bitm == 0xfffc
5899 && operand->shift == 0)
5900 {
5901 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5902 #ifdef OBJ_XCOFF
5903 fixP->fx_size = 2;
5904 if (target_big_endian)
5905 fixP->fx_where += 2;
5906 #endif
5907 }
5908 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5909 && operand->bitm == 0x3fffffc
5910 && operand->shift == 0)
5911 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
5912 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5913 && operand->bitm == 0xfffc
5914 && operand->shift == 0)
5915 {
5916 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5917 #ifdef OBJ_XCOFF
5918 fixP->fx_size = 2;
5919 if (target_big_endian)
5920 fixP->fx_where += 2;
5921 #endif
5922 }
5923 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5924 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5925 && (operand->bitm & 0xfff0) == 0xfff0
5926 && operand->shift == 0)
5927 {
5928 if (ppc_is_toc_sym (fixP->fx_addsy))
5929 {
5930 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
5931 #ifdef OBJ_ELF
5932 if (ppc_obj64
5933 && (operand->flags & PPC_OPERAND_DS) != 0)
5934 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5935 #endif
5936 }
5937 else
5938 {
5939 fixP->fx_r_type = BFD_RELOC_16;
5940 #ifdef OBJ_ELF
5941 if (ppc_obj64
5942 && (operand->flags & PPC_OPERAND_DS) != 0)
5943 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
5944 #endif
5945 }
5946 fixP->fx_size = 2;
5947 if (target_big_endian)
5948 fixP->fx_where += 2;
5949 }
5950 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5951 else
5952 {
5953 char *sfile;
5954 unsigned int sline;
5955
5956 /* Use expr_symbol_where to see if this is an expression
5957 symbol. */
5958 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5959 as_bad_where (fixP->fx_file, fixP->fx_line,
5960 _("unresolved expression that must be resolved"));
5961 else
5962 as_bad_where (fixP->fx_file, fixP->fx_line,
5963 _("unsupported relocation against %s"),
5964 S_GET_NAME (fixP->fx_addsy));
5965 fixP->fx_done = 1;
5966 return;
5967 }
5968 }
5969 else
5970 {
5971 #ifdef OBJ_ELF
5972 ppc_elf_validate_fix (fixP, seg);
5973 #endif
5974 switch (fixP->fx_r_type)
5975 {
5976 case BFD_RELOC_CTOR:
5977 if (ppc_obj64)
5978 goto ctor64;
5979 /* fall through */
5980
5981 case BFD_RELOC_32:
5982 if (fixP->fx_pcrel)
5983 fixP->fx_r_type = BFD_RELOC_32_PCREL;
5984 /* fall through */
5985
5986 case BFD_RELOC_RVA:
5987 case BFD_RELOC_32_PCREL:
5988 case BFD_RELOC_PPC_EMB_NADDR32:
5989 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5990 value, 4);
5991 break;
5992
5993 case BFD_RELOC_64:
5994 ctor64:
5995 if (fixP->fx_pcrel)
5996 fixP->fx_r_type = BFD_RELOC_64_PCREL;
5997 /* fall through */
5998
5999 case BFD_RELOC_64_PCREL:
6000 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6001 value, 8);
6002 break;
6003
6004 case BFD_RELOC_GPREL16:
6005 case BFD_RELOC_16_GOT_PCREL:
6006 case BFD_RELOC_16_GOTOFF:
6007 case BFD_RELOC_LO16_GOTOFF:
6008 case BFD_RELOC_HI16_GOTOFF:
6009 case BFD_RELOC_HI16_S_GOTOFF:
6010 case BFD_RELOC_16_BASEREL:
6011 case BFD_RELOC_LO16_BASEREL:
6012 case BFD_RELOC_HI16_BASEREL:
6013 case BFD_RELOC_HI16_S_BASEREL:
6014 case BFD_RELOC_PPC_EMB_NADDR16:
6015 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6016 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6017 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6018 case BFD_RELOC_PPC_EMB_SDAI16:
6019 case BFD_RELOC_PPC_EMB_SDA2REL:
6020 case BFD_RELOC_PPC_EMB_SDA2I16:
6021 case BFD_RELOC_PPC_EMB_RELSEC16:
6022 case BFD_RELOC_PPC_EMB_RELST_LO:
6023 case BFD_RELOC_PPC_EMB_RELST_HI:
6024 case BFD_RELOC_PPC_EMB_RELST_HA:
6025 case BFD_RELOC_PPC_EMB_RELSDA:
6026 case BFD_RELOC_PPC_TOC16:
6027 #ifdef OBJ_ELF
6028 case BFD_RELOC_PPC64_TOC16_LO:
6029 case BFD_RELOC_PPC64_TOC16_HI:
6030 case BFD_RELOC_PPC64_TOC16_HA:
6031 #endif
6032 if (fixP->fx_pcrel)
6033 {
6034 if (fixP->fx_addsy != NULL)
6035 as_bad_where (fixP->fx_file, fixP->fx_line,
6036 _("cannot emit PC relative %s relocation against %s"),
6037 bfd_get_reloc_code_name (fixP->fx_r_type),
6038 S_GET_NAME (fixP->fx_addsy));
6039 else
6040 as_bad_where (fixP->fx_file, fixP->fx_line,
6041 _("cannot emit PC relative %s relocation"),
6042 bfd_get_reloc_code_name (fixP->fx_r_type));
6043 }
6044
6045 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6046 value, 2);
6047 break;
6048
6049 case BFD_RELOC_16:
6050 if (fixP->fx_pcrel)
6051 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6052 /* fall through */
6053
6054 case BFD_RELOC_16_PCREL:
6055 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6056 value, 2);
6057 break;
6058
6059 case BFD_RELOC_LO16:
6060 if (fixP->fx_pcrel)
6061 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6062 /* fall through */
6063
6064 case BFD_RELOC_LO16_PCREL:
6065 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6066 value, 2);
6067 break;
6068
6069 /* This case happens when you write, for example,
6070 lis %r3,(L1-L2)@ha
6071 where L1 and L2 are defined later. */
6072 case BFD_RELOC_HI16:
6073 if (fixP->fx_pcrel)
6074 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6075 /* fall through */
6076
6077 case BFD_RELOC_HI16_PCREL:
6078 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6079 PPC_HI (value), 2);
6080 break;
6081
6082 case BFD_RELOC_HI16_S:
6083 if (fixP->fx_pcrel)
6084 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6085 /* fall through */
6086
6087 case BFD_RELOC_HI16_S_PCREL:
6088 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6089 PPC_HA (value), 2);
6090 break;
6091
6092 #ifdef OBJ_XCOFF
6093 case BFD_RELOC_NONE:
6094 break;
6095 #endif
6096
6097 #ifdef OBJ_ELF
6098 case BFD_RELOC_PPC64_HIGHER:
6099 if (fixP->fx_pcrel)
6100 abort ();
6101 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6102 PPC_HIGHER (value), 2);
6103 break;
6104
6105 case BFD_RELOC_PPC64_HIGHER_S:
6106 if (fixP->fx_pcrel)
6107 abort ();
6108 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6109 PPC_HIGHERA (value), 2);
6110 break;
6111
6112 case BFD_RELOC_PPC64_HIGHEST:
6113 if (fixP->fx_pcrel)
6114 abort ();
6115 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6116 PPC_HIGHEST (value), 2);
6117 break;
6118
6119 case BFD_RELOC_PPC64_HIGHEST_S:
6120 if (fixP->fx_pcrel)
6121 abort ();
6122 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6123 PPC_HIGHESTA (value), 2);
6124 break;
6125
6126 case BFD_RELOC_PPC64_ADDR16_DS:
6127 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6128 case BFD_RELOC_PPC64_GOT16_DS:
6129 case BFD_RELOC_PPC64_GOT16_LO_DS:
6130 case BFD_RELOC_PPC64_PLT16_LO_DS:
6131 case BFD_RELOC_PPC64_SECTOFF_DS:
6132 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6133 case BFD_RELOC_PPC64_TOC16_DS:
6134 case BFD_RELOC_PPC64_TOC16_LO_DS:
6135 case BFD_RELOC_PPC64_PLTGOT16_DS:
6136 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6137 if (fixP->fx_pcrel)
6138 abort ();
6139 {
6140 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
6141 unsigned long val, mask;
6142
6143 if (target_big_endian)
6144 val = bfd_getb32 (where - 2);
6145 else
6146 val = bfd_getl32 (where);
6147 mask = 0xfffc;
6148 /* lq insns reserve the four lsbs. */
6149 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
6150 && (val & (0x3f << 26)) == (56u << 26))
6151 mask = 0xfff0;
6152 val |= value & mask;
6153 if (target_big_endian)
6154 bfd_putb16 ((bfd_vma) val, where);
6155 else
6156 bfd_putl16 ((bfd_vma) val, where);
6157 }
6158 break;
6159
6160 case BFD_RELOC_PPC_B16_BRTAKEN:
6161 case BFD_RELOC_PPC_B16_BRNTAKEN:
6162 case BFD_RELOC_PPC_BA16_BRTAKEN:
6163 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6164 break;
6165
6166 case BFD_RELOC_PPC_TLS:
6167 case BFD_RELOC_PPC_TLSGD:
6168 case BFD_RELOC_PPC_TLSLD:
6169 break;
6170
6171 case BFD_RELOC_PPC_DTPMOD:
6172 case BFD_RELOC_PPC_TPREL16:
6173 case BFD_RELOC_PPC_TPREL16_LO:
6174 case BFD_RELOC_PPC_TPREL16_HI:
6175 case BFD_RELOC_PPC_TPREL16_HA:
6176 case BFD_RELOC_PPC_TPREL:
6177 case BFD_RELOC_PPC_DTPREL16:
6178 case BFD_RELOC_PPC_DTPREL16_LO:
6179 case BFD_RELOC_PPC_DTPREL16_HI:
6180 case BFD_RELOC_PPC_DTPREL16_HA:
6181 case BFD_RELOC_PPC_DTPREL:
6182 case BFD_RELOC_PPC_GOT_TLSGD16:
6183 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6184 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6185 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6186 case BFD_RELOC_PPC_GOT_TLSLD16:
6187 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6188 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6189 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6190 case BFD_RELOC_PPC_GOT_TPREL16:
6191 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6192 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6193 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6194 case BFD_RELOC_PPC_GOT_DTPREL16:
6195 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6196 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6197 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6198 case BFD_RELOC_PPC64_TPREL16_DS:
6199 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6200 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6201 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6202 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6203 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6204 case BFD_RELOC_PPC64_DTPREL16_DS:
6205 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6206 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6207 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6208 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6209 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6210 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6211 break;
6212 #endif
6213 /* Because SDA21 modifies the register field, the size is set to 4
6214 bytes, rather than 2, so offset it here appropriately. */
6215 case BFD_RELOC_PPC_EMB_SDA21:
6216 if (fixP->fx_pcrel)
6217 abort ();
6218
6219 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
6220 + ((target_big_endian) ? 2 : 0),
6221 value, 2);
6222 break;
6223
6224 case BFD_RELOC_8:
6225 if (fixP->fx_pcrel)
6226 {
6227 /* This can occur if there is a bug in the input assembler, eg:
6228 ".byte <undefined_symbol> - ." */
6229 if (fixP->fx_addsy)
6230 as_bad (_("Unable to handle reference to symbol %s"),
6231 S_GET_NAME (fixP->fx_addsy));
6232 else
6233 as_bad (_("Unable to resolve expression"));
6234 fixP->fx_done = 1;
6235 }
6236 else
6237 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6238 value, 1);
6239 break;
6240
6241 case BFD_RELOC_24_PLT_PCREL:
6242 case BFD_RELOC_PPC_LOCAL24PC:
6243 if (!fixP->fx_pcrel && !fixP->fx_done)
6244 abort ();
6245
6246 if (fixP->fx_done)
6247 {
6248 char *where;
6249 unsigned long insn;
6250
6251 /* Fetch the instruction, insert the fully resolved operand
6252 value, and stuff the instruction back again. */
6253 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6254 if (target_big_endian)
6255 insn = bfd_getb32 ((unsigned char *) where);
6256 else
6257 insn = bfd_getl32 ((unsigned char *) where);
6258 if ((value & 3) != 0)
6259 as_bad_where (fixP->fx_file, fixP->fx_line,
6260 _("must branch to an address a multiple of 4"));
6261 if ((offsetT) value < -0x40000000
6262 || (offsetT) value >= 0x40000000)
6263 as_bad_where (fixP->fx_file, fixP->fx_line,
6264 _("@local or @plt branch destination is too far away, %ld bytes"),
6265 (long) value);
6266 insn = insn | (value & 0x03fffffc);
6267 if (target_big_endian)
6268 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6269 else
6270 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6271 }
6272 break;
6273
6274 case BFD_RELOC_VTABLE_INHERIT:
6275 fixP->fx_done = 0;
6276 if (fixP->fx_addsy
6277 && !S_IS_DEFINED (fixP->fx_addsy)
6278 && !S_IS_WEAK (fixP->fx_addsy))
6279 S_SET_WEAK (fixP->fx_addsy);
6280 break;
6281
6282 case BFD_RELOC_VTABLE_ENTRY:
6283 fixP->fx_done = 0;
6284 break;
6285
6286 #ifdef OBJ_ELF
6287 /* Generated by reference to `sym@tocbase'. The sym is
6288 ignored by the linker. */
6289 case BFD_RELOC_PPC64_TOC:
6290 fixP->fx_done = 0;
6291 break;
6292 #endif
6293 default:
6294 fprintf (stderr,
6295 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6296 fflush (stderr);
6297 abort ();
6298 }
6299 }
6300
6301 #ifdef OBJ_ELF
6302 fixP->fx_addnumber = value;
6303
6304 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6305 from the section contents. If we are going to be emitting a reloc
6306 then the section contents are immaterial, so don't warn if they
6307 happen to overflow. Leave such warnings to ld. */
6308 if (!fixP->fx_done)
6309 fixP->fx_no_overflow = 1;
6310 #else
6311 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6312 fixP->fx_addnumber = 0;
6313 else
6314 {
6315 #ifdef TE_PE
6316 fixP->fx_addnumber = 0;
6317 #else
6318 /* We want to use the offset within the toc, not the actual VMA
6319 of the symbol. */
6320 fixP->fx_addnumber =
6321 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6322 - S_GET_VALUE (ppc_toc_csect);
6323 #endif
6324 }
6325 #endif
6326 }
6327
6328 /* Generate a reloc for a fixup. */
6329
6330 arelent *
6331 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6332 {
6333 arelent *reloc;
6334
6335 reloc = (arelent *) xmalloc (sizeof (arelent));
6336
6337 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6338 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6339 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6340 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6341 if (reloc->howto == (reloc_howto_type *) NULL)
6342 {
6343 as_bad_where (fixp->fx_file, fixp->fx_line,
6344 _("reloc %d not supported by object file format"),
6345 (int) fixp->fx_r_type);
6346 return NULL;
6347 }
6348 reloc->addend = fixp->fx_addnumber;
6349
6350 return reloc;
6351 }
6352
6353 void
6354 ppc_cfi_frame_initial_instructions (void)
6355 {
6356 cfi_add_CFA_def_cfa (1, 0);
6357 }
6358
6359 int
6360 tc_ppc_regname_to_dw2regnum (char *regname)
6361 {
6362 unsigned int regnum = -1;
6363 unsigned int i;
6364 const char *p;
6365 char *q;
6366 static struct { char *name; int dw2regnum; } regnames[] =
6367 {
6368 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6369 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6370 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6371 { "spe_acc", 111 }, { "spefscr", 112 }
6372 };
6373
6374 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6375 if (strcmp (regnames[i].name, regname) == 0)
6376 return regnames[i].dw2regnum;
6377
6378 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6379 {
6380 p = regname + 1 + (regname[1] == '.');
6381 regnum = strtoul (p, &q, 10);
6382 if (p == q || *q || regnum >= 32)
6383 return -1;
6384 if (regname[0] == 'f')
6385 regnum += 32;
6386 else if (regname[0] == 'v')
6387 regnum += 77;
6388 }
6389 else if (regname[0] == 'c' && regname[1] == 'r')
6390 {
6391 p = regname + 2 + (regname[2] == '.');
6392 if (p[0] < '0' || p[0] > '7' || p[1])
6393 return -1;
6394 regnum = p[0] - '0' + 68;
6395 }
6396 return regnum;
6397 }
GDB Binutils - Deliverables
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