1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses (int);
52 static void s_uacons (int);
55 static void sh_elf_cons (int);
57 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
61 big (int ignore ATTRIBUTE_UNUSED
)
63 if (! target_big_endian
)
64 as_bad (_("directive .big encountered when option -big required"));
66 /* Stop further messages. */
67 target_big_endian
= 1;
71 little (int ignore ATTRIBUTE_UNUSED
)
73 if (target_big_endian
)
74 as_bad (_("directive .little encountered when option -little required"));
76 /* Stop further messages. */
77 target_big_endian
= 0;
80 /* This table describes all the machine specific pseudo-ops the assembler
81 has to support. The fields are:
82 pseudo-op name without dot
83 function to call to execute this pseudo-op
84 Integer arg to pass to the function. */
86 const pseudo_typeS md_pseudo_table
[] =
89 {"long", sh_elf_cons
, 4},
90 {"int", sh_elf_cons
, 4},
91 {"word", sh_elf_cons
, 2},
92 {"short", sh_elf_cons
, 2},
98 {"form", listing_psize
, 0},
99 {"little", little
, 0},
100 {"heading", listing_title
, 0},
101 {"import", s_ignore
, 0},
102 {"page", listing_eject
, 0},
103 {"program", s_ignore
, 0},
105 {"uaword", s_uacons
, 2},
106 {"ualong", s_uacons
, 4},
107 {"uaquad", s_uacons
, 8},
108 {"2byte", s_uacons
, 2},
109 {"4byte", s_uacons
, 4},
110 {"8byte", s_uacons
, 8},
112 {"mode", s_sh64_mode
, 0 },
114 /* Have the old name too. */
115 {"isa", s_sh64_mode
, 0 },
117 /* Assert that the right ABI is used. */
118 {"abi", s_sh64_abi
, 0 },
120 { "vtable_inherit", sh64_vtable_inherit
, 0 },
121 { "vtable_entry", sh64_vtable_entry
, 0 },
122 #endif /* HAVE_SH64 */
126 /*int md_reloc_size; */
128 int sh_relax
; /* set if -relax seen */
130 /* Whether -small was seen. */
134 /* preset architecture set, if given; zero otherwise. */
136 static int preset_target_arch
;
138 /* The bit mask of architectures that could
139 accommodate the insns seen so far. */
140 static int valid_arch
;
142 const char EXP_CHARS
[] = "eE";
144 /* Chars that mean this number is a floating point constant. */
147 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
149 #define C(a,b) ENCODE_RELAX(a,b)
151 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
152 #define GET_WHAT(x) ((x>>4))
154 /* These are the three types of relaxable instruction. */
155 /* These are the types of relaxable instructions; except for END which is
158 #define COND_JUMP_DELAY 2
159 #define UNCOND_JUMP 3
163 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
164 #define SH64PCREL16_32 4
165 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
166 #define SH64PCREL16_64 5
168 /* Variants of the above for adjusting the insn to PTA or PTB according to
170 #define SH64PCREL16PT_32 6
171 #define SH64PCREL16PT_64 7
173 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
174 #define MOVI_IMM_32 8
175 #define MOVI_IMM_32_PCREL 9
176 #define MOVI_IMM_64 10
177 #define MOVI_IMM_64_PCREL 11
180 #else /* HAVE_SH64 */
184 #endif /* HAVE_SH64 */
190 #define UNDEF_WORD_DISP 4
196 #define UNDEF_SH64PCREL 0
197 #define SH64PCREL16 1
198 #define SH64PCREL32 2
199 #define SH64PCREL48 3
200 #define SH64PCREL64 4
201 #define SH64PCRELPLT 5
209 #define MOVI_GOTOFF 6
211 #endif /* HAVE_SH64 */
213 /* Branch displacements are from the address of the branch plus
214 four, thus all minimum and maximum values have 4 added to them. */
217 #define COND8_LENGTH 2
219 /* There is one extra instruction before the branch, so we must add
220 two more bytes to account for it. */
221 #define COND12_F 4100
222 #define COND12_M -4090
223 #define COND12_LENGTH 6
225 #define COND12_DELAY_LENGTH 4
227 /* ??? The minimum and maximum values are wrong, but this does not matter
228 since this relocation type is not supported yet. */
229 #define COND32_F (1<<30)
230 #define COND32_M -(1<<30)
231 #define COND32_LENGTH 14
233 #define UNCOND12_F 4098
234 #define UNCOND12_M -4092
235 #define UNCOND12_LENGTH 2
237 /* ??? The minimum and maximum values are wrong, but this does not matter
238 since this relocation type is not supported yet. */
239 #define UNCOND32_F (1<<30)
240 #define UNCOND32_M -(1<<30)
241 #define UNCOND32_LENGTH 14
244 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
245 TRd" as is the current insn, so no extra length. Note that the "reach"
246 is calculated from the address *after* that insn, but the offset in the
247 insn is calculated from the beginning of the insn. We also need to
248 take into account the implicit 1 coded as the "A" in PTA when counting
249 forward. If PTB reaches an odd address, we trap that as an error
250 elsewhere, so we don't have to have different relaxation entries. We
251 don't add a one to the negative range, since PTB would then have the
252 farthest backward-reaching value skipped, not generated at relaxation. */
253 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
254 #define SH64PCREL16_M (-32768 * 4 - 4)
255 #define SH64PCREL16_LENGTH 0
257 /* The next step is to change that PT insn into
258 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
259 SHORI (label - datalabel Ln) & 65535, R25
262 which means two extra insns, 8 extra bytes. This is the limit for the
265 The expressions look a bit bad since we have to adjust this to avoid overflow on a
267 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
268 #define SH64PCREL32_LENGTH (2 * 4)
270 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
272 #if BFD_HOST_64BIT_LONG
273 /* The "reach" type is long, so we can only do this for a 64-bit-long
275 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
276 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
277 #define SH64PCREL48_M (((long) -1 << 47) - 4)
278 #define SH64PCREL48_LENGTH (3 * 4)
280 /* If the host does not have 64-bit longs, just make this state identical
281 in reach to the 32-bit state. Note that we have a slightly incorrect
282 reach, but the correct one above will overflow a 32-bit number. */
283 #define SH64PCREL32_M (((long) -1 << 30) * 2)
284 #define SH64PCREL48_F SH64PCREL32_F
285 #define SH64PCREL48_M SH64PCREL32_M
286 #define SH64PCREL48_LENGTH (3 * 4)
287 #endif /* BFD_HOST_64BIT_LONG */
289 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
291 #define SH64PCREL64_LENGTH (4 * 4)
293 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
294 SH64PCREL expansions. The PCREL one is similar, but the other has no
295 pc-relative reach; it must be fully expanded in
296 shmedia_md_estimate_size_before_relax. */
297 #define MOVI_16_LENGTH 0
298 #define MOVI_16_F (32767 - 4)
299 #define MOVI_16_M (-32768 - 4)
300 #define MOVI_32_LENGTH 4
301 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
302 #define MOVI_48_LENGTH 8
304 #if BFD_HOST_64BIT_LONG
305 /* The "reach" type is long, so we can only do this for a 64-bit-long
307 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
308 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
309 #define MOVI_48_M (((long) -1 << 47) - 4)
311 /* If the host does not have 64-bit longs, just make this state identical
312 in reach to the 32-bit state. Note that we have a slightly incorrect
313 reach, but the correct one above will overflow a 32-bit number. */
314 #define MOVI_32_M (((long) -1 << 30) * 2)
315 #define MOVI_48_F MOVI_32_F
316 #define MOVI_48_M MOVI_32_M
317 #endif /* BFD_HOST_64BIT_LONG */
319 #define MOVI_64_LENGTH 12
320 #endif /* HAVE_SH64 */
322 #define EMPTY { 0, 0, 0, 0 }
324 const relax_typeS md_relax_table
[C (END
, 0)] = {
325 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
326 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
329 /* C (COND_JUMP, COND8) */
330 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
331 /* C (COND_JUMP, COND12) */
332 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
333 /* C (COND_JUMP, COND32) */
334 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
335 /* C (COND_JUMP, UNDEF_WORD_DISP) */
336 { 0, 0, COND32_LENGTH
, 0, },
338 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
341 /* C (COND_JUMP_DELAY, COND8) */
342 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
343 /* C (COND_JUMP_DELAY, COND12) */
344 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
345 /* C (COND_JUMP_DELAY, COND32) */
346 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
347 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
348 { 0, 0, COND32_LENGTH
, 0, },
350 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
353 /* C (UNCOND_JUMP, UNCOND12) */
354 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
355 /* C (UNCOND_JUMP, UNCOND32) */
356 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
358 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
359 { 0, 0, UNCOND32_LENGTH
, 0, },
361 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
364 /* C (SH64PCREL16_32, SH64PCREL16) */
366 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
367 /* C (SH64PCREL16_32, SH64PCREL32) */
368 { 0, 0, SH64PCREL32_LENGTH
, 0 },
370 /* C (SH64PCREL16_32, SH64PCRELPLT) */
371 { 0, 0, SH64PCREL32_LENGTH
, 0 },
373 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
375 /* C (SH64PCREL16_64, SH64PCREL16) */
377 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
378 /* C (SH64PCREL16_64, SH64PCREL32) */
379 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
380 /* C (SH64PCREL16_64, SH64PCREL48) */
381 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
382 /* C (SH64PCREL16_64, SH64PCREL64) */
383 { 0, 0, SH64PCREL64_LENGTH
, 0 },
384 /* C (SH64PCREL16_64, SH64PCRELPLT) */
385 { 0, 0, SH64PCREL64_LENGTH
, 0 },
387 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
389 /* C (SH64PCREL16PT_32, SH64PCREL16) */
391 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
392 /* C (SH64PCREL16PT_32, SH64PCREL32) */
393 { 0, 0, SH64PCREL32_LENGTH
, 0 },
395 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
396 { 0, 0, SH64PCREL32_LENGTH
, 0 },
398 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
400 /* C (SH64PCREL16PT_64, SH64PCREL16) */
402 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
403 /* C (SH64PCREL16PT_64, SH64PCREL32) */
407 C (SH64PCREL16PT_64
, SH64PCREL48
) },
408 /* C (SH64PCREL16PT_64, SH64PCREL48) */
409 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
410 /* C (SH64PCREL16PT_64, SH64PCREL64) */
411 { 0, 0, SH64PCREL64_LENGTH
, 0 },
412 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
413 { 0, 0, SH64PCREL64_LENGTH
, 0},
415 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
417 /* C (MOVI_IMM_32, UNDEF_MOVI) */
418 { 0, 0, MOVI_32_LENGTH
, 0 },
419 /* C (MOVI_IMM_32, MOVI_16) */
420 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
421 /* C (MOVI_IMM_32, MOVI_32) */
422 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
424 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
425 { 0, 0, MOVI_32_LENGTH
, 0 },
426 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
428 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
430 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
431 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
432 { 0, 0, MOVI_32_LENGTH
, 0 },
434 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
435 { 0, 0, MOVI_32_LENGTH
, 0 },
437 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
438 { 0, 0, MOVI_32_LENGTH
, 0 },
439 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
441 /* C (MOVI_IMM_64, UNDEF_MOVI) */
442 { 0, 0, MOVI_64_LENGTH
, 0 },
443 /* C (MOVI_IMM_64, MOVI_16) */
444 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
445 /* C (MOVI_IMM_64, MOVI_32) */
446 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
447 /* C (MOVI_IMM_64, MOVI_48) */
448 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
449 /* C (MOVI_IMM_64, MOVI_64) */
450 { 0, 0, MOVI_64_LENGTH
, 0 },
452 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
453 { 0, 0, MOVI_64_LENGTH
, 0 },
454 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
456 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
458 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
459 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
460 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
461 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
462 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
463 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
464 { 0, 0, MOVI_64_LENGTH
, 0 },
465 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
466 { 0, 0, MOVI_64_LENGTH
, 0 },
468 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
470 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
472 #endif /* HAVE_SH64 */
478 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
482 /* Determinet whether the symbol needs any kind of PIC relocation. */
485 sh_PIC_related_p (symbolS
*sym
)
492 if (sym
== GOT_symbol
)
496 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
500 exp
= symbol_get_value_expression (sym
);
502 return (exp
->X_op
== O_PIC_reloc
503 || sh_PIC_related_p (exp
->X_add_symbol
)
504 || sh_PIC_related_p (exp
->X_op_symbol
));
507 /* Determine the relocation type to be used to represent the
508 expression, that may be rearranged. */
511 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
513 expressionS
*exp
= main_exp
;
515 /* This is here for backward-compatibility only. GCC used to generated:
517 f@PLT + . - (.LPCS# + 2)
519 but we'd rather be able to handle this as a PIC-related reference
520 plus/minus a symbol. However, gas' parser gives us:
522 O_subtract (O_add (f@PLT, .), .LPCS#+2)
524 so we attempt to transform this into:
526 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
528 which we can handle simply below. */
529 if (exp
->X_op
== O_subtract
)
531 if (sh_PIC_related_p (exp
->X_op_symbol
))
534 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
536 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
539 if (exp
&& exp
->X_op
== O_add
540 && sh_PIC_related_p (exp
->X_add_symbol
))
542 symbolS
*sym
= exp
->X_add_symbol
;
544 exp
->X_op
= O_subtract
;
545 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
547 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
548 main_exp
->X_add_symbol
= sym
;
550 main_exp
->X_add_number
+= exp
->X_add_number
;
551 exp
->X_add_number
= 0;
556 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
559 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
562 if (exp
->X_add_symbol
563 && (exp
->X_add_symbol
== GOT_symbol
565 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
569 case BFD_RELOC_SH_IMM_LOW16
:
570 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
573 case BFD_RELOC_SH_IMM_MEDLOW16
:
574 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
577 case BFD_RELOC_SH_IMM_MEDHI16
:
578 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
581 case BFD_RELOC_SH_IMM_HI16
:
582 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
586 case BFD_RELOC_UNUSED
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC
;
596 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
598 *r_type_p
= BFD_RELOC_SH_GOTPC
;
602 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
607 if (exp
->X_op
== O_PIC_reloc
)
613 case BFD_RELOC_UNUSED
:
614 *r_type_p
= exp
->X_md
;
617 case BFD_RELOC_SH_IMM_LOW16
:
620 case BFD_RELOC_32_GOTOFF
:
621 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
624 case BFD_RELOC_SH_GOTPLT32
:
625 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
628 case BFD_RELOC_32_GOT_PCREL
:
629 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
632 case BFD_RELOC_32_PLT_PCREL
:
633 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
641 case BFD_RELOC_SH_IMM_MEDLOW16
:
644 case BFD_RELOC_32_GOTOFF
:
645 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
648 case BFD_RELOC_SH_GOTPLT32
:
649 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
652 case BFD_RELOC_32_GOT_PCREL
:
653 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
656 case BFD_RELOC_32_PLT_PCREL
:
657 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
665 case BFD_RELOC_SH_IMM_MEDHI16
:
668 case BFD_RELOC_32_GOTOFF
:
669 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
672 case BFD_RELOC_SH_GOTPLT32
:
673 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
676 case BFD_RELOC_32_GOT_PCREL
:
677 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
680 case BFD_RELOC_32_PLT_PCREL
:
681 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
689 case BFD_RELOC_SH_IMM_HI16
:
692 case BFD_RELOC_32_GOTOFF
:
693 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
696 case BFD_RELOC_SH_GOTPLT32
:
697 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
700 case BFD_RELOC_32_GOT_PCREL
:
701 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
704 case BFD_RELOC_32_PLT_PCREL
:
705 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
717 *r_type_p
= exp
->X_md
;
720 exp
->X_op
= O_symbol
;
723 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
724 main_exp
->X_add_number
+= exp
->X_add_number
;
728 return (sh_PIC_related_p (exp
->X_add_symbol
)
729 || sh_PIC_related_p (exp
->X_op_symbol
));
734 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
737 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
739 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
741 if (sh_check_fixup (exp
, &r_type
))
742 as_bad (_("Invalid PIC expression."));
744 if (r_type
== BFD_RELOC_UNUSED
)
748 r_type
= BFD_RELOC_8
;
752 r_type
= BFD_RELOC_16
;
756 r_type
= BFD_RELOC_32
;
761 r_type
= BFD_RELOC_64
;
771 as_bad (_("unsupported BFD relocation size %u"), size
);
772 r_type
= BFD_RELOC_UNUSED
;
775 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
778 /* The regular cons() function, that reads constants, doesn't support
779 suffixes such as @GOT, @GOTOFF and @PLT, that generate
780 machine-specific relocation types. So we must define it here. */
781 /* Clobbers input_line_pointer, checks end-of-line. */
782 /* NBYTES 1=.byte, 2=.word, 4=.long */
784 sh_elf_cons (register int nbytes
)
790 /* Update existing range to include a previous insn, if there was one. */
791 sh64_update_contents_mark (TRUE
);
793 /* We need to make sure the contents type is set to data. */
796 #endif /* HAVE_SH64 */
798 if (is_it_end_of_statement ())
800 demand_empty_rest_of_line ();
805 md_cons_align (nbytes
);
811 emit_expr (&exp
, (unsigned int) nbytes
);
813 while (*input_line_pointer
++ == ',');
815 input_line_pointer
--; /* Put terminator back into stream. */
816 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
818 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
821 demand_empty_rest_of_line ();
826 /* This function is called once, at assembler startup time. This should
827 set up all the tables, etc that the MD part of the assembler needs. */
832 const sh_opcode_info
*opcode
;
833 char *prev_name
= "";
837 = preset_target_arch
? preset_target_arch
: arch_sh1_up
& ~arch_sh_dsp_up
;
838 valid_arch
= target_arch
;
844 opcode_hash_control
= hash_new ();
846 /* Insert unique names into hash table. */
847 for (opcode
= sh_table
; opcode
->name
; opcode
++)
849 if (strcmp (prev_name
, opcode
->name
) != 0)
851 if (! (opcode
->arch
& target_arch
))
853 prev_name
= opcode
->name
;
854 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
861 static int reg_x
, reg_y
;
865 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
867 /* Try to parse a reg name. Return the number of chars consumed. */
870 parse_reg (char *src
, int *mode
, int *reg
)
872 char l0
= TOLOWER (src
[0]);
873 char l1
= l0
? TOLOWER (src
[1]) : 0;
875 /* We use ! IDENT_CHAR for the next character after the register name, to
876 make sure that we won't accidentally recognize a symbol name such as
877 'sram' or sr_ram as being a reference to the register 'sr'. */
883 if (src
[2] >= '0' && src
[2] <= '5'
884 && ! IDENT_CHAR ((unsigned char) src
[3]))
887 *reg
= 10 + src
[2] - '0';
891 if (l1
>= '0' && l1
<= '9'
892 && ! IDENT_CHAR ((unsigned char) src
[2]))
898 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
899 && ! IDENT_CHAR ((unsigned char) src
[7]))
906 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
911 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
922 if (! IDENT_CHAR ((unsigned char) src
[2]))
928 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
937 if (! IDENT_CHAR ((unsigned char) src
[2]))
943 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
951 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
952 && ! IDENT_CHAR ((unsigned char) src
[3]))
955 *reg
= 4 + (l1
- '0');
958 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
959 && ! IDENT_CHAR ((unsigned char) src
[3]))
962 *reg
= 6 + (l1
- '0');
965 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
966 && ! IDENT_CHAR ((unsigned char) src
[3]))
971 *reg
= n
| ((~n
& 2) << 1);
976 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
998 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
999 && ! IDENT_CHAR ((unsigned char) src
[2]))
1002 *reg
= A_X0_NUM
+ l1
- '0';
1006 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1007 && ! IDENT_CHAR ((unsigned char) src
[2]))
1010 *reg
= A_Y0_NUM
+ l1
- '0';
1014 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1015 && ! IDENT_CHAR ((unsigned char) src
[2]))
1018 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1024 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1030 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1031 && ! IDENT_CHAR ((unsigned char) src
[3]))
1037 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1038 && ! IDENT_CHAR ((unsigned char) src
[3]))
1044 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1045 && ! IDENT_CHAR ((unsigned char) src
[3]))
1051 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1052 && ! IDENT_CHAR ((unsigned char) src
[3]))
1058 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1064 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1071 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1076 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1078 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1079 and use an uninitialized immediate. */
1083 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1084 && ! IDENT_CHAR ((unsigned char) src
[3]))
1089 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1090 && ! IDENT_CHAR ((unsigned char) src
[3]))
1096 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1097 && ! IDENT_CHAR ((unsigned char) src
[4]))
1099 if (TOLOWER (src
[3]) == 'l')
1104 if (TOLOWER (src
[3]) == 'h')
1110 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1111 && ! IDENT_CHAR ((unsigned char) src
[3]))
1116 if (l0
== 'f' && l1
== 'r')
1120 if (src
[3] >= '0' && src
[3] <= '5'
1121 && ! IDENT_CHAR ((unsigned char) src
[4]))
1124 *reg
= 10 + src
[3] - '0';
1128 if (src
[2] >= '0' && src
[2] <= '9'
1129 && ! IDENT_CHAR ((unsigned char) src
[3]))
1132 *reg
= (src
[2] - '0');
1136 if (l0
== 'd' && l1
== 'r')
1140 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1141 && ! IDENT_CHAR ((unsigned char) src
[4]))
1144 *reg
= 10 + src
[3] - '0';
1148 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1149 && ! IDENT_CHAR ((unsigned char) src
[3]))
1152 *reg
= (src
[2] - '0');
1156 if (l0
== 'x' && l1
== 'd')
1160 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1161 && ! IDENT_CHAR ((unsigned char) src
[4]))
1164 *reg
= 11 + src
[3] - '0';
1168 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1169 && ! IDENT_CHAR ((unsigned char) src
[3]))
1172 *reg
= (src
[2] - '0') + 1;
1176 if (l0
== 'f' && l1
== 'v')
1178 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1184 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1185 && ! IDENT_CHAR ((unsigned char) src
[3]))
1188 *reg
= (src
[2] - '0');
1192 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1193 && TOLOWER (src
[3]) == 'l'
1194 && ! IDENT_CHAR ((unsigned char) src
[4]))
1200 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1201 && TOLOWER (src
[3]) == 'c'
1202 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1208 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1209 && TOLOWER (src
[3]) == 'r'
1210 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1220 parse_exp (char *s
, sh_operand_info
*op
)
1225 save
= input_line_pointer
;
1226 input_line_pointer
= s
;
1227 expression (&op
->immediate
);
1228 if (op
->immediate
.X_op
== O_absent
)
1229 as_bad (_("missing operand"));
1231 else if (op
->immediate
.X_op
== O_PIC_reloc
1232 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1233 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1234 as_bad (_("misplaced PIC operand"));
1236 new = input_line_pointer
;
1237 input_line_pointer
= save
;
1241 /* The many forms of operand:
1244 @Rn Register indirect
1257 pr, gbr, vbr, macl, mach
1261 parse_at (char *src
, sh_operand_info
*op
)
1268 /* Must be predecrement. */
1271 len
= parse_reg (src
, &mode
, &(op
->reg
));
1272 if (mode
!= A_REG_N
)
1273 as_bad (_("illegal register after @-"));
1278 else if (src
[0] == '(')
1280 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1283 len
= parse_reg (src
, &mode
, &(op
->reg
));
1284 if (len
&& mode
== A_REG_N
)
1289 as_bad (_("must be @(r0,...)"));
1294 /* Now can be rn or gbr. */
1295 len
= parse_reg (src
, &mode
, &(op
->reg
));
1305 op
->type
= A_R0_GBR
;
1307 else if (mode
== A_REG_N
)
1309 op
->type
= A_IND_R0_REG_N
;
1313 as_bad (_("syntax error in @(r0,...)"));
1318 as_bad (_("syntax error in @(r0...)"));
1323 /* Must be an @(disp,.. thing). */
1324 src
= parse_exp (src
, op
);
1327 /* Now can be rn, gbr or pc. */
1328 len
= parse_reg (src
, &mode
, &op
->reg
);
1331 if (mode
== A_REG_N
)
1333 op
->type
= A_DISP_REG_N
;
1335 else if (mode
== A_GBR
)
1337 op
->type
= A_DISP_GBR
;
1339 else if (mode
== A_PC
)
1341 /* We want @(expr, pc) to uniformly address . + expr,
1342 no matter if expr is a constant, or a more complex
1343 expression, e.g. sym-. or sym1-sym2.
1344 However, we also used to accept @(sym,pc)
1345 as addressing sym, i.e. meaning the same as plain sym.
1346 Some existing code does use the @(sym,pc) syntax, so
1347 we give it the old semantics for now, but warn about
1348 its use, so that users have some time to fix their code.
1350 Note that due to this backward compatibility hack,
1351 we'll get unexpected results when @(offset, pc) is used,
1352 and offset is a symbol that is set later to an an address
1353 difference, or an external symbol that is set to an
1354 address difference in another source file, so we want to
1355 eventually remove it. */
1356 if (op
->immediate
.X_op
== O_symbol
)
1358 op
->type
= A_DISP_PC
;
1359 as_warn (_("Deprecated syntax."));
1363 op
->type
= A_DISP_PC_ABS
;
1364 /* Such operands don't get corrected for PC==.+4, so
1365 make the correction here. */
1366 op
->immediate
.X_add_number
-= 4;
1371 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1376 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1381 as_bad (_("expecting )"));
1387 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1388 if (mode
!= A_REG_N
)
1389 as_bad (_("illegal register after @"));
1396 l0
= TOLOWER (src
[0]);
1397 l1
= TOLOWER (src
[1]);
1399 if ((l0
== 'r' && l1
== '8')
1400 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1403 op
->type
= AX_PMOD_N
;
1405 else if ( (l0
== 'r' && l1
== '9')
1406 || (l0
== 'i' && l1
== 'y'))
1409 op
->type
= AY_PMOD_N
;
1421 get_operand (char **ptr
, sh_operand_info
*op
)
1430 *ptr
= parse_exp (src
, op
);
1435 else if (src
[0] == '@')
1437 *ptr
= parse_at (src
, op
);
1440 len
= parse_reg (src
, &mode
, &(op
->reg
));
1449 /* Not a reg, the only thing left is a displacement. */
1450 *ptr
= parse_exp (src
, op
);
1451 op
->type
= A_DISP_PC
;
1457 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1462 /* The pre-processor will eliminate whitespace in front of '@'
1463 after the first argument; we may be called multiple times
1464 from assemble_ppi, so don't insist on finding whitespace here. */
1468 get_operand (&ptr
, operand
+ 0);
1475 get_operand (&ptr
, operand
+ 1);
1476 /* ??? Hack: psha/pshl have a varying operand number depending on
1477 the type of the first operand. We handle this by having the
1478 three-operand version first and reducing the number of operands
1479 parsed to two if we see that the first operand is an immediate.
1480 This works because no insn with three operands has an immediate
1481 as first operand. */
1482 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1488 get_operand (&ptr
, operand
+ 2);
1492 operand
[2].type
= 0;
1497 operand
[1].type
= 0;
1498 operand
[2].type
= 0;
1503 operand
[0].type
= 0;
1504 operand
[1].type
= 0;
1505 operand
[2].type
= 0;
1510 /* Passed a pointer to a list of opcodes which use different
1511 addressing modes, return the opcode which matches the opcodes
1514 static sh_opcode_info
*
1515 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1517 sh_opcode_info
*this_try
= opcode
;
1518 char *name
= opcode
->name
;
1521 while (opcode
->name
)
1523 this_try
= opcode
++;
1524 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1526 /* We've looked so far down the table that we've run out of
1527 opcodes with the same name. */
1531 /* Look at both operands needed by the opcodes and provided by
1532 the user - since an arg test will often fail on the same arg
1533 again and again, we'll try and test the last failing arg the
1534 first on each opcode try. */
1535 for (n
= 0; this_try
->arg
[n
]; n
++)
1537 sh_operand_info
*user
= operands
+ n
;
1538 sh_arg_type arg
= this_try
->arg
[n
];
1543 if (user
->type
== A_DISP_PC_ABS
)
1553 if (user
->type
!= arg
)
1557 /* opcode needs r0 */
1558 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1562 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1566 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1574 case A_IND_R0_REG_N
:
1583 /* Opcode needs rn */
1584 if (user
->type
!= arg
)
1589 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1604 if (user
->type
!= arg
)
1609 if (user
->type
!= arg
)
1618 case A_IND_R0_REG_M
:
1621 /* Opcode needs rn */
1622 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1628 if (user
->type
!= A_DEC_N
)
1630 if (user
->reg
< 2 || user
->reg
> 5)
1636 if (user
->type
!= A_INC_N
)
1638 if (user
->reg
< 2 || user
->reg
> 5)
1644 if (user
->type
!= A_IND_N
)
1646 if (user
->reg
< 2 || user
->reg
> 5)
1652 if (user
->type
!= AX_PMOD_N
)
1654 if (user
->reg
< 2 || user
->reg
> 5)
1660 if (user
->type
!= A_INC_N
)
1662 if (user
->reg
< 4 || user
->reg
> 5)
1668 if (user
->type
!= A_IND_N
)
1670 if (user
->reg
< 4 || user
->reg
> 5)
1676 if (user
->type
!= AX_PMOD_N
)
1678 if (user
->reg
< 4 || user
->reg
> 5)
1684 if (user
->type
!= A_INC_N
)
1686 if ((user
->reg
< 4 || user
->reg
> 5)
1687 && (user
->reg
< 0 || user
->reg
> 1))
1693 if (user
->type
!= A_IND_N
)
1695 if ((user
->reg
< 4 || user
->reg
> 5)
1696 && (user
->reg
< 0 || user
->reg
> 1))
1702 if (user
->type
!= AX_PMOD_N
)
1704 if ((user
->reg
< 4 || user
->reg
> 5)
1705 && (user
->reg
< 0 || user
->reg
> 1))
1711 if (user
->type
!= A_INC_N
)
1713 if (user
->reg
< 6 || user
->reg
> 7)
1719 if (user
->type
!= A_IND_N
)
1721 if (user
->reg
< 6 || user
->reg
> 7)
1727 if (user
->type
!= AY_PMOD_N
)
1729 if (user
->reg
< 6 || user
->reg
> 7)
1735 if (user
->type
!= A_INC_N
)
1737 if ((user
->reg
< 6 || user
->reg
> 7)
1738 && (user
->reg
< 2 || user
->reg
> 3))
1744 if (user
->type
!= A_IND_N
)
1746 if ((user
->reg
< 6 || user
->reg
> 7)
1747 && (user
->reg
< 2 || user
->reg
> 3))
1753 if (user
->type
!= AY_PMOD_N
)
1755 if ((user
->reg
< 6 || user
->reg
> 7)
1756 && (user
->reg
< 2 || user
->reg
> 3))
1762 if (user
->type
!= DSP_REG_N
)
1764 if (user
->reg
!= A_A0_NUM
1765 && user
->reg
!= A_A1_NUM
)
1771 if (user
->type
!= DSP_REG_N
)
1793 if (user
->type
!= DSP_REG_N
)
1815 if (user
->type
!= DSP_REG_N
)
1837 if (user
->type
!= DSP_REG_N
)
1859 if (user
->type
!= DSP_REG_N
)
1881 if (user
->type
!= DSP_REG_N
)
1903 if (user
->type
!= DSP_REG_N
)
1925 if (user
->type
!= DSP_REG_N
)
1947 if (user
->type
!= DSP_REG_N
)
1969 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1973 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1977 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1981 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1985 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1995 /* Opcode needs rn */
1996 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2001 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2006 if (user
->type
!= XMTRX_M4
)
2012 printf (_("unhandled %d\n"), arg
);
2016 if ( !(valid_arch
& this_try
->arch
))
2018 valid_arch
&= this_try
->arch
;
2028 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2030 fix_new_exp (frag_now
,
2031 where
- frag_now
->fr_literal
,
2039 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2041 int high_byte
= target_big_endian
? 0 : 1;
2044 if (opcode
->arg
[0] == A_BDISP8
)
2046 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2047 p
= frag_var (rs_machine_dependent
,
2048 md_relax_table
[C (what
, COND32
)].rlx_length
,
2049 md_relax_table
[C (what
, COND8
)].rlx_length
,
2051 op
->immediate
.X_add_symbol
,
2052 op
->immediate
.X_add_number
,
2054 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2056 else if (opcode
->arg
[0] == A_BDISP12
)
2058 p
= frag_var (rs_machine_dependent
,
2059 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2060 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2062 op
->immediate
.X_add_symbol
,
2063 op
->immediate
.X_add_number
,
2065 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2070 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2073 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2078 /* Since the low byte of the opcode will be overwritten by the reloc, we
2079 can just stash the high byte into both bytes and ignore endianness. */
2082 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2083 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2087 static int count
= 0;
2089 /* If the last loop insn is a two-byte-insn, it is in danger of being
2090 swapped with the insn after it. To prevent this, create a new
2091 symbol - complete with SH_LABEL reloc - after the last loop insn.
2092 If the last loop insn is four bytes long, the symbol will be
2093 right in the middle, but four byte insns are not swapped anyways. */
2094 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2095 Hence a 9 digit number should be enough to count all REPEATs. */
2097 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2098 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2099 /* Make this a local symbol. */
2101 SF_SET_LOCAL (end_sym
);
2102 #endif /* OBJ_COFF */
2103 symbol_table_insert (end_sym
);
2104 end_sym
->sy_value
= operand
[1].immediate
;
2105 end_sym
->sy_value
.X_add_number
+= 2;
2106 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2109 output
= frag_more (2);
2112 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2113 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2115 return frag_more (2);
2118 /* Now we know what sort of opcodes it is, let's build the bytes. */
2121 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2125 char *output
= frag_more (2);
2126 unsigned int size
= 2;
2127 int low_byte
= target_big_endian
? 1 : 0;
2133 for (index
= 0; index
< 4; index
++)
2135 sh_nibble_type i
= opcode
->nibbles
[index
];
2146 nbuf
[index
] = reg_n
;
2149 nbuf
[index
] = reg_m
;
2152 if (reg_n
< 2 || reg_n
> 5)
2153 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2154 nbuf
[index
] = (reg_n
& 3) | 4;
2157 nbuf
[index
] = reg_n
| (reg_m
>> 2);
2160 nbuf
[index
] = reg_b
| 0x08;
2163 nbuf
[index
] = reg_n
| 0x01;
2166 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2169 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2172 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2175 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2178 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2181 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2184 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2187 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2190 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2193 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2196 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2199 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2202 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2203 operand
->type
!= A_DISP_PC_ABS
, operand
);
2206 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2207 operand
->type
!= A_DISP_PC_ABS
, operand
);
2210 output
= insert_loop_bounds (output
, operand
);
2211 nbuf
[index
] = opcode
->nibbles
[3];
2215 printf (_("failed for %d\n"), i
);
2219 if (!target_big_endian
)
2221 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2222 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2226 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2227 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2232 /* Find an opcode at the start of *STR_P in the hash table, and set
2233 *STR_P to the first character after the last one read. */
2235 static sh_opcode_info
*
2236 find_cooked_opcode (char **str_p
)
2239 unsigned char *op_start
;
2240 unsigned char *op_end
;
2244 /* Drop leading whitespace. */
2248 /* Find the op code end.
2249 The pre-processor will eliminate whitespace in front of
2250 any '@' after the first argument; we may be called from
2251 assemble_ppi, so the opcode might be terminated by an '@'. */
2252 for (op_start
= op_end
= (unsigned char *) (str
);
2255 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2258 unsigned char c
= op_start
[nlen
];
2260 /* The machine independent code will convert CMP/EQ into cmp/EQ
2261 because it thinks the '/' is the end of the symbol. Moreover,
2262 all but the first sub-insn is a parallel processing insn won't
2263 be capitalized. Instead of hacking up the machine independent
2264 code, we just deal with it here. */
2274 as_bad (_("can't find opcode "));
2276 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2279 /* Assemble a parallel processing insn. */
2280 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2283 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2295 sh_operand_info operand
[3];
2297 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2298 Make sure we encode a defined insn pattern. */
2303 if (opcode
->arg
[0] != A_END
)
2304 op_end
= get_operands (opcode
, op_end
, operand
);
2306 opcode
= get_specific (opcode
, operand
);
2309 /* Couldn't find an opcode which matched the operands. */
2310 char *where
= frag_more (2);
2315 as_bad (_("invalid operands for opcode"));
2319 if (opcode
->nibbles
[0] != PPI
)
2320 as_bad (_("insn can't be combined with parallel processing insn"));
2322 switch (opcode
->nibbles
[1])
2327 as_bad (_("multiple movx specifications"));
2332 as_bad (_("multiple movy specifications"));
2338 as_bad (_("multiple movx specifications"));
2339 if ((reg_n
< 4 || reg_n
> 5)
2340 && (reg_n
< 0 || reg_n
> 1))
2341 as_bad (_("invalid movx address register"));
2342 if (movy
&& movy
!= DDT_BASE
)
2343 as_bad (_("insn cannot be combined with non-nopy"));
2344 movx
= ((((reg_n
& 1) != 0) << 9)
2345 + (((reg_n
& 4) == 0) << 8)
2347 + (opcode
->nibbles
[2] << 4)
2348 + opcode
->nibbles
[3]
2354 as_bad (_("multiple movy specifications"));
2355 if ((reg_n
< 6 || reg_n
> 7)
2356 && (reg_n
< 2 || reg_n
> 3))
2357 as_bad (_("invalid movy address register"));
2358 if (movx
&& movx
!= DDT_BASE
)
2359 as_bad (_("insn cannot be combined with non-nopx"));
2360 movy
= ((((reg_n
& 1) != 0) << 8)
2361 + (((reg_n
& 4) == 0) << 9)
2363 + (opcode
->nibbles
[2] << 4)
2364 + opcode
->nibbles
[3]
2370 as_bad (_("multiple movx specifications"));
2372 as_bad (_("previous movy requires nopx"));
2373 if (reg_n
< 4 || reg_n
> 5)
2374 as_bad (_("invalid movx address register"));
2375 if (opcode
->nibbles
[2] & 8)
2377 if (reg_m
== A_A1_NUM
)
2379 else if (reg_m
!= A_A0_NUM
)
2380 as_bad (_("invalid movx dsp register"));
2385 as_bad (_("invalid movx dsp register"));
2388 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2393 as_bad (_("multiple movy specifications"));
2395 as_bad (_("previous movx requires nopy"));
2396 if (opcode
->nibbles
[2] & 8)
2398 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2401 if (reg_m
== A_A1_NUM
)
2403 else if (reg_m
!= A_A0_NUM
)
2404 as_bad (_("invalid movy dsp register"));
2409 as_bad (_("invalid movy dsp register"));
2412 if (reg_n
< 6 || reg_n
> 7)
2413 as_bad (_("invalid movy address register"));
2414 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2418 if (operand
[0].immediate
.X_op
!= O_constant
)
2419 as_bad (_("dsp immediate shift value not constant"));
2420 field_b
= ((opcode
->nibbles
[2] << 12)
2421 | (operand
[0].immediate
.X_add_number
& 127) << 4
2428 goto try_another_opcode
;
2433 as_bad (_("multiple parallel processing specifications"));
2434 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2435 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2436 switch (opcode
->nibbles
[4])
2444 field_b
+= opcode
->nibbles
[4] << 4;
2452 as_bad (_("multiple condition specifications"));
2453 cond
= opcode
->nibbles
[2] << 8;
2455 goto skip_cond_check
;
2459 as_bad (_("multiple parallel processing specifications"));
2460 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2461 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2463 switch (opcode
->nibbles
[4])
2471 field_b
+= opcode
->nibbles
[4] << 4;
2480 if ((field_b
& 0xef00) == 0xa100)
2482 /* pclr Dz pmuls Se,Sf,Dg */
2483 else if ((field_b
& 0xff00) == 0x8d00
2484 && (valid_arch
& arch_sh4al_dsp_up
))
2486 valid_arch
&= arch_sh4al_dsp_up
;
2490 as_bad (_("insn cannot be combined with pmuls"));
2491 switch (field_b
& 0xf)
2494 field_b
+= 0 - A_X0_NUM
;
2497 field_b
+= 1 - A_Y0_NUM
;
2500 field_b
+= 2 - A_A0_NUM
;
2503 field_b
+= 3 - A_A1_NUM
;
2506 as_bad (_("bad combined pmuls output operand"));
2508 /* Generate warning if the destination register for padd / psub
2509 and pmuls is the same ( only for A0 or A1 ).
2510 If the last nibble is 1010 then A0 is used in both
2511 padd / psub and pmuls. If it is 1111 then A1 is used
2512 as destination register in both padd / psub and pmuls. */
2514 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2515 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2516 as_warn (_("destination register is same for parallel insns"));
2518 field_b
+= 0x4000 + reg_efg
;
2525 as_bad (_("condition not followed by conditionalizable insn"));
2531 opcode
= find_cooked_opcode (&op_end
);
2535 (_("unrecognized characters at end of parallel processing insn")));
2540 move_code
= movx
| movy
;
2543 /* Parallel processing insn. */
2544 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2546 output
= frag_more (4);
2548 if (! target_big_endian
)
2550 output
[3] = ppi_code
>> 8;
2551 output
[2] = ppi_code
;
2555 output
[2] = ppi_code
>> 8;
2556 output
[3] = ppi_code
;
2558 move_code
|= 0xf800;
2562 /* Just a double data transfer. */
2563 output
= frag_more (2);
2566 if (! target_big_endian
)
2568 output
[1] = move_code
>> 8;
2569 output
[0] = move_code
;
2573 output
[0] = move_code
>> 8;
2574 output
[1] = move_code
;
2579 /* This is the guts of the machine-dependent assembler. STR points to a
2580 machine dependent instruction. This function is supposed to emit
2581 the frags/bytes it assembles to. */
2584 md_assemble (char *str
)
2586 unsigned char *op_end
;
2587 sh_operand_info operand
[3];
2588 sh_opcode_info
*opcode
;
2589 unsigned int size
= 0;
2592 if (sh64_isa_mode
== sh64_isa_shmedia
)
2594 shmedia_md_assemble (str
);
2599 /* If we've seen pseudo-directives, make sure any emitted data or
2600 frags are marked as data. */
2603 sh64_update_contents_mark (TRUE
);
2604 sh64_set_contents_type (CRT_SH5_ISA16
);
2609 #endif /* HAVE_SH64 */
2611 opcode
= find_cooked_opcode (&str
);
2616 as_bad (_("unknown opcode"));
2621 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2623 /* Output a CODE reloc to tell the linker that the following
2624 bytes are instructions, not data. */
2625 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2627 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2630 if (opcode
->nibbles
[0] == PPI
)
2632 size
= assemble_ppi (op_end
, opcode
);
2636 if (opcode
->arg
[0] == A_BDISP12
2637 || opcode
->arg
[0] == A_BDISP8
)
2639 /* Since we skip get_specific here, we have to check & update
2641 if (valid_arch
& opcode
->arch
)
2642 valid_arch
&= opcode
->arch
;
2644 as_bad (_("Delayed branches not available on SH1"));
2645 parse_exp (op_end
+ 1, &operand
[0]);
2646 build_relax (opcode
, &operand
[0]);
2650 if (opcode
->arg
[0] == A_END
)
2652 /* Ignore trailing whitespace. If there is any, it has already
2653 been compressed to a single space. */
2659 op_end
= get_operands (opcode
, op_end
, operand
);
2661 opcode
= get_specific (opcode
, operand
);
2665 /* Couldn't find an opcode which matched the operands. */
2666 char *where
= frag_more (2);
2671 as_bad (_("invalid operands for opcode"));
2676 as_bad (_("excess operands: '%s'"), op_end
);
2678 size
= build_Mytes (opcode
, operand
);
2683 #ifdef BFD_ASSEMBLER
2684 dwarf2_emit_insn (size
);
2688 /* This routine is called each time a label definition is seen. It
2689 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2692 sh_frob_label (void)
2694 static fragS
*last_label_frag
;
2695 static int last_label_offset
;
2698 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2702 offset
= frag_now_fix ();
2703 if (frag_now
!= last_label_frag
2704 || offset
!= last_label_offset
)
2706 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2707 last_label_frag
= frag_now
;
2708 last_label_offset
= offset
;
2713 /* This routine is called when the assembler is about to output some
2714 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2717 sh_flush_pending_output (void)
2720 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2722 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2724 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2729 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2735 #ifndef BFD_ASSEMBLER
2738 tc_crawl_symbol_chain (object_headers
*headers ATTRIBUTE_UNUSED
)
2740 printf (_("call to tc_crawl_symbol_chain \n"));
2744 tc_headers_hook (object_headers
*headers ATTRIBUTE_UNUSED
)
2746 printf (_("call to tc_headers_hook \n"));
2752 /* Various routines to kill one day. */
2753 /* Equal to MAX_PRECISION in atof-ieee.c. */
2754 #define MAX_LITTLENUMS 6
2756 /* Turn a string in input_line_pointer into a floating point constant
2757 of type TYPE, and store the appropriate bytes in *LITP. The number
2758 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2759 returned, or NULL on OK. */
2762 md_atof (int type
, char *litP
, int *sizeP
)
2765 LITTLENUM_TYPE words
[4];
2781 return _("bad call to md_atof");
2784 t
= atof_ieee (input_line_pointer
, type
, words
);
2786 input_line_pointer
= t
;
2790 if (! target_big_endian
)
2792 for (i
= prec
- 1; i
>= 0; i
--)
2794 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2800 for (i
= 0; i
< prec
; i
++)
2802 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2810 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2811 call instruction. It refers to a label of the instruction which
2812 loads the register which the call uses. We use it to generate a
2813 special reloc for the linker. */
2816 s_uses (int ignore ATTRIBUTE_UNUSED
)
2821 as_warn (_(".uses pseudo-op seen when not relaxing"));
2825 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2827 as_bad (_("bad .uses format"));
2828 ignore_rest_of_line ();
2832 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2834 demand_empty_rest_of_line ();
2837 const char *md_shortopts
= "";
2838 struct option md_longopts
[] =
2840 #define OPTION_RELAX (OPTION_MD_BASE)
2841 #define OPTION_BIG (OPTION_MD_BASE + 1)
2842 #define OPTION_LITTLE (OPTION_BIG + 1)
2843 #define OPTION_SMALL (OPTION_LITTLE + 1)
2844 #define OPTION_DSP (OPTION_SMALL + 1)
2845 #define OPTION_ISA (OPTION_DSP + 1)
2847 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2848 {"big", no_argument
, NULL
, OPTION_BIG
},
2849 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2850 {"small", no_argument
, NULL
, OPTION_SMALL
},
2851 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2852 {"isa", required_argument
, NULL
, OPTION_ISA
},
2854 #define OPTION_ABI (OPTION_ISA + 1)
2855 #define OPTION_NO_MIX (OPTION_ABI + 1)
2856 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2857 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2858 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2859 {"abi", required_argument
, NULL
, OPTION_ABI
},
2860 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
2861 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
2862 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
2863 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
2864 #endif /* HAVE_SH64 */
2866 {NULL
, no_argument
, NULL
, 0}
2868 size_t md_longopts_size
= sizeof (md_longopts
);
2871 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
2880 target_big_endian
= 1;
2884 target_big_endian
= 0;
2892 preset_target_arch
= arch_sh1_up
& ~arch_sh2e_up
;
2896 if (strcasecmp (arg
, "sh4") == 0)
2897 preset_target_arch
= arch_sh4
;
2898 else if (strcasecmp (arg
, "sh4a") == 0)
2899 preset_target_arch
= arch_sh4a
;
2900 else if (strcasecmp (arg
, "dsp") == 0)
2901 preset_target_arch
= arch_sh1_up
& ~arch_sh2e_up
;
2902 else if (strcasecmp (arg
, "fp") == 0)
2903 preset_target_arch
= arch_sh2e_up
;
2904 else if (strcasecmp (arg
, "any") == 0)
2905 preset_target_arch
= arch_sh1_up
;
2907 else if (strcasecmp (arg
, "shmedia") == 0)
2909 if (sh64_isa_mode
== sh64_isa_shcompact
)
2910 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2911 sh64_isa_mode
= sh64_isa_shmedia
;
2913 else if (strcasecmp (arg
, "shcompact") == 0)
2915 if (sh64_isa_mode
== sh64_isa_shmedia
)
2916 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2917 if (sh64_abi
== sh64_abi_64
)
2918 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2919 sh64_isa_mode
= sh64_isa_shcompact
;
2921 #endif /* HAVE_SH64 */
2923 as_bad ("Invalid argument to --isa option: %s", arg
);
2928 if (strcmp (arg
, "32") == 0)
2930 if (sh64_abi
== sh64_abi_64
)
2931 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2932 sh64_abi
= sh64_abi_32
;
2934 else if (strcmp (arg
, "64") == 0)
2936 if (sh64_abi
== sh64_abi_32
)
2937 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2938 if (sh64_isa_mode
== sh64_isa_shcompact
)
2939 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2940 sh64_abi
= sh64_abi_64
;
2943 as_bad ("Invalid argument to --abi option: %s", arg
);
2950 case OPTION_SHCOMPACT_CONST_CRANGE
:
2951 sh64_shcompact_const_crange
= TRUE
;
2954 case OPTION_NO_EXPAND
:
2955 sh64_expand
= FALSE
;
2961 #endif /* HAVE_SH64 */
2971 md_show_usage (FILE *stream
)
2973 fprintf (stream
, _("\
2975 -little generate little endian code\n\
2976 -big generate big endian code\n\
2977 -relax alter jump instructions for long displacements\n\
2978 -small align sections to 4 byte boundaries, not 16\n\
2979 -dsp enable sh-dsp insns, and disable floating-point ISAs.\n"));
2981 fprintf (stream
, _("\
2984 | dsp same as '-dsp'\n\
2986 | shmedia set as the default instruction set for SH64\n\
2990 fprintf (stream
, _("\
2991 -abi=[32|64] set size of expanded SHmedia operands and object\n\
2993 -shcompact-const-crange emit code-range descriptors for constants in\n\
2994 SHcompact code sections\n\
2995 -no-mix disallow SHmedia code in the same section as\n\
2996 constants and SHcompact code\n\
2997 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
2998 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
2999 to 32 bits only\n"));
3001 fprintf (stream
, _("\
3004 | dsp same as '-dsp'\n\
3007 #endif /* HAVE_SH64 */
3010 /* This struct is used to pass arguments to sh_count_relocs through
3011 bfd_map_over_sections. */
3013 struct sh_count_relocs
3015 /* Symbol we are looking for. */
3017 /* Count of relocs found. */
3021 /* Count the number of fixups in a section which refer to a particular
3022 symbol. When using BFD_ASSEMBLER, this is called via
3023 bfd_map_over_sections. */
3026 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3028 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3029 segment_info_type
*seginfo
;
3033 seginfo
= seg_info (sec
);
3034 if (seginfo
== NULL
)
3038 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3040 if (fix
->fx_addsy
== sym
)
3048 /* Handle the count relocs for a particular section. When using
3049 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
3052 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3053 void *ignore ATTRIBUTE_UNUSED
)
3055 segment_info_type
*seginfo
;
3058 seginfo
= seg_info (sec
);
3059 if (seginfo
== NULL
)
3062 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3067 struct sh_count_relocs info
;
3069 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3072 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3073 symbol in the same section. */
3074 sym
= fix
->fx_addsy
;
3076 || fix
->fx_subsy
!= NULL
3077 || fix
->fx_addnumber
!= 0
3078 || S_GET_SEGMENT (sym
) != sec
3079 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3080 || S_GET_STORAGE_CLASS (sym
) == C_EXT
3082 || S_IS_EXTERNAL (sym
))
3084 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3085 _(".uses does not refer to a local symbol in the same section"));
3089 /* Look through the fixups again, this time looking for one
3090 at the same location as sym. */
3091 val
= S_GET_VALUE (sym
);
3092 for (fscan
= seginfo
->fix_root
;
3094 fscan
= fscan
->fx_next
)
3095 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3096 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3097 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3098 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3099 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3103 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3104 _("can't find fixup pointed to by .uses"));
3108 if (fscan
->fx_tcbit
)
3110 /* We've already done this one. */
3114 /* The variable fscan should also be a fixup to a local symbol
3115 in the same section. */
3116 sym
= fscan
->fx_addsy
;
3118 || fscan
->fx_subsy
!= NULL
3119 || fscan
->fx_addnumber
!= 0
3120 || S_GET_SEGMENT (sym
) != sec
3121 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3122 || S_GET_STORAGE_CLASS (sym
) == C_EXT
3124 || S_IS_EXTERNAL (sym
))
3126 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3127 _(".uses target does not refer to a local symbol in the same section"));
3131 /* Now we look through all the fixups of all the sections,
3132 counting the number of times we find a reference to sym. */
3135 #ifdef BFD_ASSEMBLER
3136 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3141 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
3142 sh_count_relocs ((bfd
*) NULL
, iscan
, &info
);
3149 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3150 We have already adjusted the value of sym to include the
3151 fragment address, so we undo that adjustment here. */
3152 subseg_change (sec
, 0);
3153 fix_new (fscan
->fx_frag
,
3154 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3155 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3159 /* This function is called after the symbol table has been completed,
3160 but before the relocs or section contents have been written out.
3161 If we have seen any .uses pseudo-ops, they point to an instruction
3162 which loads a register with the address of a function. We look
3163 through the fixups to find where the function address is being
3164 loaded from. We then generate a COUNT reloc giving the number of
3165 times that function address is referred to. The linker uses this
3166 information when doing relaxing, to decide when it can eliminate
3167 the stored function address entirely. */
3173 shmedia_frob_file_before_adjust ();
3179 #ifdef BFD_ASSEMBLER
3180 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3185 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
3186 sh_frob_section ((bfd
*) NULL
, iseg
, NULL
);
3191 /* Called after relaxing. Set the correct sizes of the fragments, and
3192 create relocs so that md_apply_fix3 will fill in the correct values. */
3195 #ifdef BFD_ASSEMBLER
3196 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3198 md_convert_frag (object_headers
*headers ATTRIBUTE_UNUSED
, segT seg
,
3204 switch (fragP
->fr_subtype
)
3206 case C (COND_JUMP
, COND8
):
3207 case C (COND_JUMP_DELAY
, COND8
):
3208 subseg_change (seg
, 0);
3209 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3210 1, BFD_RELOC_SH_PCDISP8BY2
);
3215 case C (UNCOND_JUMP
, UNCOND12
):
3216 subseg_change (seg
, 0);
3217 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3218 1, BFD_RELOC_SH_PCDISP12BY2
);
3223 case C (UNCOND_JUMP
, UNCOND32
):
3224 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3225 if (fragP
->fr_symbol
== NULL
)
3226 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3227 _("displacement overflows 12-bit field"));
3228 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3229 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3230 _("displacement to defined symbol %s overflows 12-bit field"),
3231 S_GET_NAME (fragP
->fr_symbol
));
3233 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3234 _("displacement to undefined symbol %s overflows 12-bit field"),
3235 S_GET_NAME (fragP
->fr_symbol
));
3236 /* Stabilize this frag, so we don't trip an assert. */
3237 fragP
->fr_fix
+= fragP
->fr_var
;
3241 case C (COND_JUMP
, COND12
):
3242 case C (COND_JUMP_DELAY
, COND12
):
3243 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3244 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3245 was due to gas incorrectly relaxing an out-of-range conditional
3246 branch with delay slot. It turned:
3247 bf.s L6 (slot mov.l r12,@(44,r0))
3250 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3252 32: 10 cb mov.l r12,@(44,r0)
3253 Therefore, branches with delay slots have to be handled
3254 differently from ones without delay slots. */
3256 unsigned char *buffer
=
3257 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3258 int highbyte
= target_big_endian
? 0 : 1;
3259 int lowbyte
= target_big_endian
? 1 : 0;
3260 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3262 /* Toggle the true/false bit of the bcond. */
3263 buffer
[highbyte
] ^= 0x2;
3265 /* If this is a delayed branch, we may not put the bra in the
3266 slot. So we change it to a non-delayed branch, like that:
3267 b! cond slot_label; bra disp; slot_label: slot_insn
3268 ??? We should try if swapping the conditional branch and
3269 its delay-slot insn already makes the branch reach. */
3271 /* Build a relocation to six / four bytes farther on. */
3272 subseg_change (seg
, 0);
3273 fix_new (fragP
, fragP
->fr_fix
, 2,
3274 #ifdef BFD_ASSEMBLER
3275 section_symbol (seg
),
3277 seg_info (seg
)->dot
,
3279 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3280 1, BFD_RELOC_SH_PCDISP8BY2
);
3282 /* Set up a jump instruction. */
3283 buffer
[highbyte
+ 2] = 0xa0;
3284 buffer
[lowbyte
+ 2] = 0;
3285 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3286 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3290 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3295 /* Fill in a NOP instruction. */
3296 buffer
[highbyte
+ 4] = 0x0;
3297 buffer
[lowbyte
+ 4] = 0x9;
3306 case C (COND_JUMP
, COND32
):
3307 case C (COND_JUMP_DELAY
, COND32
):
3308 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3309 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3310 if (fragP
->fr_symbol
== NULL
)
3311 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3312 _("displacement overflows 8-bit field"));
3313 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3314 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3315 _("displacement to defined symbol %s overflows 8-bit field"),
3316 S_GET_NAME (fragP
->fr_symbol
));
3318 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3319 _("displacement to undefined symbol %s overflows 8-bit field "),
3320 S_GET_NAME (fragP
->fr_symbol
));
3321 /* Stabilize this frag, so we don't trip an assert. */
3322 fragP
->fr_fix
+= fragP
->fr_var
;
3328 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3334 if (donerelax
&& !sh_relax
)
3335 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3336 _("overflow in branch to %s; converted into longer instruction sequence"),
3337 (fragP
->fr_symbol
!= NULL
3338 ? S_GET_NAME (fragP
->fr_symbol
)
3343 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3345 #ifdef BFD_ASSEMBLER
3348 #else /* ! OBJ_ELF */
3349 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3350 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3351 #endif /* ! OBJ_ELF */
3352 #else /* ! BFD_ASSEMBLER */
3353 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
3354 & (-1 << section_alignment
[(int) seg
]));
3355 #endif /* ! BFD_ASSEMBLER */
3358 /* This static variable is set by s_uacons to tell sh_cons_align that
3359 the expression does not need to be aligned. */
3361 static int sh_no_align_cons
= 0;
3363 /* This handles the unaligned space allocation pseudo-ops, such as
3364 .uaword. .uaword is just like .word, but the value does not need
3368 s_uacons (int bytes
)
3370 /* Tell sh_cons_align not to align this value. */
3371 sh_no_align_cons
= 1;
3375 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3376 aligned correctly. Note that this can cause warnings to be issued
3377 when assembling initialized structured which were declared with the
3378 packed attribute. FIXME: Perhaps we should require an option to
3379 enable this warning? */
3382 sh_cons_align (int nbytes
)
3387 if (sh_no_align_cons
)
3389 /* This is an unaligned pseudo-op. */
3390 sh_no_align_cons
= 0;
3395 while ((nbytes
& 1) == 0)
3404 if (now_seg
== absolute_section
)
3406 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3407 as_warn (_("misaligned data"));
3411 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3412 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3414 record_alignment (now_seg
, nalign
);
3417 /* When relaxing, we need to output a reloc for any .align directive
3418 that requests alignment to a four byte boundary or larger. This is
3419 also where we check for misaligned data. */
3422 sh_handle_align (fragS
*frag
)
3424 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3426 if (frag
->fr_type
== rs_align_code
)
3428 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3429 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3431 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3440 if (target_big_endian
)
3442 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3443 frag
->fr_var
= sizeof big_nop_pattern
;
3447 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3448 frag
->fr_var
= sizeof little_nop_pattern
;
3451 else if (frag
->fr_type
== rs_align_test
)
3454 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3458 && (frag
->fr_type
== rs_align
3459 || frag
->fr_type
== rs_align_code
)
3460 && frag
->fr_address
+ frag
->fr_fix
> 0
3461 && frag
->fr_offset
> 1
3462 && now_seg
!= bss_section
)
3463 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3464 BFD_RELOC_SH_ALIGN
);
3467 /* See whether the relocation should be resolved locally. */
3470 sh_local_pcrel (fixS
*fix
)
3473 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3474 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3475 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3476 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3477 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3478 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3479 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3482 /* See whether we need to force a relocation into the output file.
3483 This is used to force out switch and PC relative relocations when
3487 sh_force_relocation (fixS
*fix
)
3489 /* These relocations can't make it into a DSO, so no use forcing
3490 them for global symbols. */
3491 if (sh_local_pcrel (fix
))
3494 /* Make sure some relocations get emitted. */
3495 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3496 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3497 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3498 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3499 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3500 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3501 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3502 || generic_force_reloc (fix
))
3508 return (fix
->fx_pcrel
3509 || SWITCH_TABLE (fix
)
3510 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3511 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3512 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3513 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3515 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3517 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3522 sh_fix_adjustable (fixS
*fixP
)
3524 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3525 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3526 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3527 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3530 /* We need the symbol name for the VTABLE entries */
3531 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3532 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3539 sh_elf_final_processing (void)
3543 /* Set file-specific flags to indicate if this code needs
3544 a processor with the sh-dsp / sh2e ISA to execute. */
3546 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3547 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3548 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3551 #endif /* HAVE_SH64 */
3552 if (valid_arch
& arch_sh1
)
3554 else if (valid_arch
& arch_sh2
)
3556 else if (valid_arch
& arch_sh2e
)
3558 else if (valid_arch
& arch_sh_dsp
)
3560 else if (valid_arch
& arch_sh3
)
3562 else if (valid_arch
& arch_sh3_dsp
)
3564 else if (valid_arch
& arch_sh3e
)
3566 else if (valid_arch
& arch_sh4_nofpu
)
3568 else if (valid_arch
& arch_sh4
)
3570 else if (valid_arch
& arch_sh4a_nofpu
)
3571 val
= EF_SH4A_NOFPU
;
3572 else if (valid_arch
& arch_sh4a
)
3574 else if (valid_arch
& arch_sh4al_dsp
)
3579 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3580 elf_elfheader (stdoutput
)->e_flags
|= val
;
3584 /* Apply a fixup to the object file. */
3587 md_apply_fix3 (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3589 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3590 int lowbyte
= target_big_endian
? 1 : 0;
3591 int highbyte
= target_big_endian
? 0 : 1;
3592 long val
= (long) *valP
;
3596 #ifdef BFD_ASSEMBLER
3597 /* A difference between two symbols, the second of which is in the
3598 current section, is transformed in a PC-relative relocation to
3599 the other symbol. We have to adjust the relocation type here. */
3602 switch (fixP
->fx_r_type
)
3608 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3611 /* Currently, we only support 32-bit PCREL relocations.
3612 We'd need a new reloc type to handle 16_PCREL, and
3613 8_PCREL is already taken for R_SH_SWITCH8, which
3614 apparently does something completely different than what
3617 bfd_set_error (bfd_error_bad_value
);
3621 bfd_set_error (bfd_error_bad_value
);
3626 /* The function adjust_reloc_syms won't convert a reloc against a weak
3627 symbol into a reloc against a section, but bfd_install_relocation
3628 will screw up if the symbol is defined, so we have to adjust val here
3629 to avoid the screw up later.
3631 For ordinary relocs, this does not happen for ELF, since for ELF,
3632 bfd_install_relocation uses the "special function" field of the
3633 howto, and does not execute the code that needs to be undone, as long
3634 as the special function does not return bfd_reloc_continue.
3635 It can happen for GOT- and PLT-type relocs the way they are
3636 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3637 doesn't matter here since those relocs don't use VAL; see below. */
3638 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3639 && fixP
->fx_addsy
!= NULL
3640 && S_IS_WEAK (fixP
->fx_addsy
))
3641 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3644 #ifdef BFD_ASSEMBLER
3645 if (SWITCH_TABLE (fixP
))
3646 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3648 if (fixP
->fx_r_type
== 0)
3650 if (fixP
->fx_size
== 2)
3651 fixP
->fx_r_type
= BFD_RELOC_16
;
3652 else if (fixP
->fx_size
== 4)
3653 fixP
->fx_r_type
= BFD_RELOC_32
;
3654 else if (fixP
->fx_size
== 1)
3655 fixP
->fx_r_type
= BFD_RELOC_8
;
3663 switch (fixP
->fx_r_type
)
3665 case BFD_RELOC_SH_IMM4
:
3667 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3670 case BFD_RELOC_SH_IMM4BY2
:
3673 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3676 case BFD_RELOC_SH_IMM4BY4
:
3679 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3682 case BFD_RELOC_SH_IMM8BY2
:
3688 case BFD_RELOC_SH_IMM8BY4
:
3695 case BFD_RELOC_SH_IMM8
:
3696 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3697 sometimes it is not (e.g., and). We permit any 8 bit value.
3698 Note that adding further restrictions may invalidate
3699 reasonable looking assembly code, such as ``and -0x1,r0''. */
3705 case BFD_RELOC_SH_PCRELIMM8BY4
:
3706 /* The lower two bits of the PC are cleared before the
3707 displacement is added in. We can assume that the destination
3708 is on a 4 byte boundary. If this instruction is also on a 4
3709 byte boundary, then we want
3711 and target - here is a multiple of 4.
3712 Otherwise, we are on a 2 byte boundary, and we want
3713 (target - (here - 2)) / 4
3714 and target - here is not a multiple of 4. Computing
3715 (target - (here - 2)) / 4 == (target - here + 2) / 4
3716 works for both cases, since in the first case the addition of
3717 2 will be removed by the division. target - here is in the
3719 val
= (val
+ 2) / 4;
3721 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3725 case BFD_RELOC_SH_PCRELIMM8BY2
:
3728 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3732 case BFD_RELOC_SH_PCDISP8BY2
:
3734 if (val
< -0x80 || val
> 0x7f)
3735 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3739 case BFD_RELOC_SH_PCDISP12BY2
:
3741 if (val
< -0x800 || val
> 0x7ff)
3742 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3743 buf
[lowbyte
] = val
& 0xff;
3744 buf
[highbyte
] |= (val
>> 8) & 0xf;
3748 case BFD_RELOC_32_PCREL
:
3749 md_number_to_chars (buf
, val
, 4);
3753 md_number_to_chars (buf
, val
, 2);
3756 case BFD_RELOC_SH_USES
:
3757 /* Pass the value into sh_coff_reloc_mangle. */
3758 fixP
->fx_addnumber
= val
;
3761 case BFD_RELOC_SH_COUNT
:
3762 case BFD_RELOC_SH_ALIGN
:
3763 case BFD_RELOC_SH_CODE
:
3764 case BFD_RELOC_SH_DATA
:
3765 case BFD_RELOC_SH_LABEL
:
3766 /* Nothing to do here. */
3769 case BFD_RELOC_SH_LOOP_START
:
3770 case BFD_RELOC_SH_LOOP_END
:
3772 case BFD_RELOC_VTABLE_INHERIT
:
3773 case BFD_RELOC_VTABLE_ENTRY
:
3778 case BFD_RELOC_32_PLT_PCREL
:
3779 /* Make the jump instruction point to the address of the operand. At
3780 runtime we merely add the offset to the actual PLT entry. */
3781 * valP
= 0xfffffffc;
3782 val
= fixP
->fx_offset
;
3784 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3785 fixP
->fx_addnumber
= val
;
3786 md_number_to_chars (buf
, val
, 4);
3789 case BFD_RELOC_SH_GOTPC
:
3790 /* This is tough to explain. We end up with this one if we have
3791 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3792 The goal here is to obtain the absolute address of the GOT,
3793 and it is strongly preferable from a performance point of
3794 view to avoid using a runtime relocation for this. There are
3795 cases where you have something like:
3797 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3799 and here no correction would be required. Internally in the
3800 assembler we treat operands of this form as not being pcrel
3801 since the '.' is explicitly mentioned, and I wonder whether
3802 it would simplify matters to do it this way. Who knows. In
3803 earlier versions of the PIC patches, the pcrel_adjust field
3804 was used to store the correction, but since the expression is
3805 not pcrel, I felt it would be confusing to do it this way. */
3807 md_number_to_chars (buf
, val
, 4);
3810 case BFD_RELOC_SH_TLS_GD_32
:
3811 case BFD_RELOC_SH_TLS_LD_32
:
3812 case BFD_RELOC_SH_TLS_IE_32
:
3813 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3815 case BFD_RELOC_32_GOT_PCREL
:
3816 case BFD_RELOC_SH_GOTPLT32
:
3817 * valP
= 0; /* Fully resolved at runtime. No addend. */
3818 md_number_to_chars (buf
, 0, 4);
3821 case BFD_RELOC_SH_TLS_LDO_32
:
3822 case BFD_RELOC_SH_TLS_LE_32
:
3823 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3825 case BFD_RELOC_32_GOTOFF
:
3826 md_number_to_chars (buf
, val
, 4);
3832 shmedia_md_apply_fix3 (fixP
, valP
);
3841 if ((val
& ((1 << shift
) - 1)) != 0)
3842 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3846 val
= ((val
>> shift
)
3847 | ((long) -1 & ~ ((long) -1 >> shift
)));
3849 if (max
!= 0 && (val
< min
|| val
> max
))
3850 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3852 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3856 /* Called just before address relaxation. Return the length
3857 by which a fragment must grow to reach it's destination. */
3860 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
3864 switch (fragP
->fr_subtype
)
3868 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
3874 case C (UNCOND_JUMP
, UNDEF_DISP
):
3875 /* Used to be a branch to somewhere which was unknown. */
3876 if (!fragP
->fr_symbol
)
3878 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3880 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3882 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3886 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3890 case C (COND_JUMP
, UNDEF_DISP
):
3891 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3892 what
= GET_WHAT (fragP
->fr_subtype
);
3893 /* Used to be a branch to somewhere which was unknown. */
3894 if (fragP
->fr_symbol
3895 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3897 /* Got a symbol and it's defined in this segment, become byte
3898 sized - maybe it will fix up. */
3899 fragP
->fr_subtype
= C (what
, COND8
);
3901 else if (fragP
->fr_symbol
)
3903 /* Its got a segment, but its not ours, so it will always be long. */
3904 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3908 /* We know the abs value. */
3909 fragP
->fr_subtype
= C (what
, COND8
);
3913 case C (UNCOND_JUMP
, UNCOND12
):
3914 case C (UNCOND_JUMP
, UNCOND32
):
3915 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3916 case C (COND_JUMP
, COND8
):
3917 case C (COND_JUMP
, COND12
):
3918 case C (COND_JUMP
, COND32
):
3919 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3920 case C (COND_JUMP_DELAY
, COND8
):
3921 case C (COND_JUMP_DELAY
, COND12
):
3922 case C (COND_JUMP_DELAY
, COND32
):
3923 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3924 /* When relaxing a section for the second time, we don't need to
3925 do anything besides return the current size. */
3929 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3930 return fragP
->fr_var
;
3933 /* Put number into target byte order. */
3936 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
3939 /* We might need to set the contents type to data. */
3940 sh64_flag_output ();
3943 if (! target_big_endian
)
3944 number_to_chars_littleendian (ptr
, use
, nbytes
);
3946 number_to_chars_bigendian (ptr
, use
, nbytes
);
3949 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
3950 eg for the sh-hms target. */
3953 md_pcrel_from (fixS
*fixP
)
3955 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3959 md_pcrel_from_section (fixS
*fixP
, segT sec
)
3961 if (! sh_local_pcrel (fixP
)
3962 && fixP
->fx_addsy
!= (symbolS
*) NULL
3963 && (generic_force_reloc (fixP
)
3964 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3966 /* The symbol is undefined (or is defined but not in this section,
3967 or we're not sure about it being the final definition). Let the
3968 linker figure it out. We need to adjust the subtraction of a
3969 symbol to the position of the relocated data, though. */
3970 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3973 return md_pcrel_from (fixP
);
3979 tc_coff_sizemachdep (fragS
*frag
)
3981 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3984 #endif /* OBJ_COFF */
3986 #ifndef BFD_ASSEMBLER
3989 /* Map BFD relocs to SH COFF relocs. */
3993 bfd_reloc_code_real_type bfd_reloc
;
3997 static const struct reloc_map coff_reloc_map
[] =
3999 { BFD_RELOC_32
, R_SH_IMM32
},
4000 { BFD_RELOC_16
, R_SH_IMM16
},
4001 { BFD_RELOC_8
, R_SH_IMM8
},
4002 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
4003 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
4004 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
4005 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
4006 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
4007 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
4008 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
4009 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
4010 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
4011 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
4012 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
4013 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
4014 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
4015 { BFD_RELOC_SH_USES
, R_SH_USES
},
4016 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
4017 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
4018 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
4019 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
4020 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
4021 { BFD_RELOC_UNUSED
, 0 }
4024 /* Adjust a reloc for the SH. This is similar to the generic code,
4025 but does some minor tweaking. */
4028 sh_coff_reloc_mangle (segment_info_type
*seg
, fixS
*fix
,
4029 struct internal_reloc
*intr
, unsigned int paddr
)
4031 symbolS
*symbol_ptr
= fix
->fx_addsy
;
4034 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
4036 if (! SWITCH_TABLE (fix
))
4038 const struct reloc_map
*rm
;
4040 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
4041 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
4043 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
4044 as_bad_where (fix
->fx_file
, fix
->fx_line
,
4045 _("Can not represent %s relocation in this object file format"),
4046 bfd_get_reloc_code_name (fix
->fx_r_type
));
4047 intr
->r_type
= rm
->sh_reloc
;
4054 if (fix
->fx_r_type
== BFD_RELOC_16
)
4055 intr
->r_type
= R_SH_SWITCH16
;
4056 else if (fix
->fx_r_type
== BFD_RELOC_8
)
4057 intr
->r_type
= R_SH_SWITCH8
;
4058 else if (fix
->fx_r_type
== BFD_RELOC_32
)
4059 intr
->r_type
= R_SH_SWITCH32
;
4063 /* For a switch reloc, we set r_offset to the difference between
4064 the reloc address and the subtrahend. When the linker is
4065 doing relaxing, it can use the determine the starting and
4066 ending points of the switch difference expression. */
4067 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
4070 /* PC relative relocs are always against the current section. */
4071 if (symbol_ptr
== NULL
)
4073 switch (fix
->fx_r_type
)
4075 case BFD_RELOC_SH_PCRELIMM8BY2
:
4076 case BFD_RELOC_SH_PCRELIMM8BY4
:
4077 case BFD_RELOC_SH_PCDISP8BY2
:
4078 case BFD_RELOC_SH_PCDISP12BY2
:
4079 case BFD_RELOC_SH_USES
:
4080 symbol_ptr
= seg
->dot
;
4087 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
4089 /* We can't store the offset in the object file, since this
4090 reloc does not take up any space, so we store it in r_offset.
4091 The fx_addnumber field was set in md_apply_fix3. */
4092 intr
->r_offset
= fix
->fx_addnumber
;
4094 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
4096 /* We can't store the count in the object file, since this reloc
4097 does not take up any space, so we store it in r_offset. The
4098 fx_offset field was set when the fixup was created in
4099 sh_coff_frob_file. */
4100 intr
->r_offset
= fix
->fx_offset
;
4101 /* This reloc is always absolute. */
4104 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
4106 /* Store the alignment in the r_offset field. */
4107 intr
->r_offset
= fix
->fx_offset
;
4108 /* This reloc is always absolute. */
4111 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
4112 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
4113 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
4115 /* These relocs are always absolute. */
4119 /* Turn the segment of the symbol into an offset. */
4120 if (symbol_ptr
!= NULL
)
4122 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
4124 intr
->r_symndx
= dot
->sy_number
;
4126 intr
->r_symndx
= symbol_ptr
->sy_number
;
4129 intr
->r_symndx
= -1;
4132 #endif /* OBJ_COFF */
4133 #endif /* ! BFD_ASSEMBLER */
4135 #ifdef BFD_ASSEMBLER
4137 /* Create a reloc. */
4140 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4143 bfd_reloc_code_real_type r_type
;
4145 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4146 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4147 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4148 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4150 r_type
= fixp
->fx_r_type
;
4152 if (SWITCH_TABLE (fixp
))
4154 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4156 if (r_type
== BFD_RELOC_16
)
4157 r_type
= BFD_RELOC_SH_SWITCH16
;
4158 else if (r_type
== BFD_RELOC_8
)
4159 r_type
= BFD_RELOC_8_PCREL
;
4160 else if (r_type
== BFD_RELOC_32
)
4161 r_type
= BFD_RELOC_SH_SWITCH32
;
4165 else if (r_type
== BFD_RELOC_SH_USES
)
4166 rel
->addend
= fixp
->fx_addnumber
;
4167 else if (r_type
== BFD_RELOC_SH_COUNT
)
4168 rel
->addend
= fixp
->fx_offset
;
4169 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4170 rel
->addend
= fixp
->fx_offset
;
4171 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4172 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4173 rel
->addend
= fixp
->fx_offset
;
4174 else if (r_type
== BFD_RELOC_SH_LOOP_START
4175 || r_type
== BFD_RELOC_SH_LOOP_END
)
4176 rel
->addend
= fixp
->fx_offset
;
4177 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4180 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4183 else if (shmedia_init_reloc (rel
, fixp
))
4186 else if (fixp
->fx_pcrel
)
4187 rel
->addend
= fixp
->fx_addnumber
;
4188 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
4189 rel
->addend
= fixp
->fx_addnumber
;
4193 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4195 if (rel
->howto
->type
== R_SH_IND12W
)
4196 rel
->addend
+= fixp
->fx_offset
- 4;
4198 if (rel
->howto
== NULL
)
4200 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4201 _("Cannot represent relocation type %s"),
4202 bfd_get_reloc_code_name (r_type
));
4203 /* Set howto to a garbage value so that we can keep going. */
4204 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4205 assert (rel
->howto
!= NULL
);
4212 inline static char *
4213 sh_end_of_match (char *cont
, char *what
)
4215 int len
= strlen (what
);
4217 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4218 && ! is_part_of_name (cont
[len
]))
4225 sh_parse_name (char const *name
, expressionS
*exprP
, char *nextcharP
)
4227 char *next
= input_line_pointer
;
4232 exprP
->X_op_symbol
= NULL
;
4234 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4237 GOT_symbol
= symbol_find_or_make (name
);
4239 exprP
->X_add_symbol
= GOT_symbol
;
4241 /* If we have an absolute symbol or a reg, then we know its
4243 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4244 if (segment
== absolute_section
)
4246 exprP
->X_op
= O_constant
;
4247 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4248 exprP
->X_add_symbol
= NULL
;
4250 else if (segment
== reg_section
)
4252 exprP
->X_op
= O_register
;
4253 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4254 exprP
->X_add_symbol
= NULL
;
4258 exprP
->X_op
= O_symbol
;
4259 exprP
->X_add_number
= 0;
4265 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4267 if (*nextcharP
!= '@')
4269 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4270 reloc_type
= BFD_RELOC_32_GOTOFF
;
4271 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4272 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4273 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4274 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4275 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4276 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4277 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4278 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4279 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4280 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4281 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4282 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4283 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4284 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4285 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4286 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4290 *input_line_pointer
= *nextcharP
;
4291 input_line_pointer
= next_end
;
4292 *nextcharP
= *input_line_pointer
;
4293 *input_line_pointer
= '\0';
4295 exprP
->X_op
= O_PIC_reloc
;
4296 exprP
->X_add_number
= 0;
4297 exprP
->X_md
= reloc_type
;
4302 #endif /* BFD_ASSEMBLER */