* config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
[deliverable/binutils-gdb.git] / gas / config / tc-spu.c
1 /* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
2
3 Copyright 2006 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "opcode/spu.h"
26 #include "dwarf2dbg.h"
27
28 const struct spu_opcode spu_opcodes[] = {
29 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
30 { MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT },
31 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
32 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
33 #include "opcode/spu-insns.h"
34 #undef APUOP
35 #undef APUOPFB
36 };
37
38 static const int spu_num_opcodes =
39 sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);
40
41 #define MAX_RELOCS 2
42
43 struct spu_insn
44 {
45 unsigned int opcode;
46 expressionS exp[MAX_RELOCS];
47 int reloc_arg[MAX_RELOCS];
48 int flag[MAX_RELOCS];
49 enum spu_insns tag;
50 };
51
52 static const char *get_imm (const char *param, struct spu_insn *insn, int arg);
53 static const char *get_reg (const char *param, struct spu_insn *insn, int arg,
54 int accept_expr);
55
56 static int calcop (struct spu_opcode *format, const char *param,
57 struct spu_insn *insn);
58
59 extern char *myname;
60 static struct hash_control *op_hash = NULL;
61
62 /* These bits should be turned off in the first address of every segment */
63 int md_seg_align = 7;
64
65 /* These chars start a comment anywhere in a source file (except inside
66 another comment */
67 const char comment_chars[] = "#";
68
69 /* These chars only start a comment at the beginning of a line. */
70 const char line_comment_chars[] = "#";
71
72 /* gods own line continuation char */
73 const char line_separator_chars[] = ";";
74
75 /* Chars that can be used to separate mant from exp in floating point nums */
76 const char EXP_CHARS[] = "eE";
77
78 /* Chars that mean this number is a floating point constant */
79 /* as in 0f123.456 */
80 /* or 0H1.234E-12 (see exp chars above) */
81 const char FLT_CHARS[] = "dDfF";
82
83 const pseudo_typeS md_pseudo_table[] =
84 {
85 {"align", s_align_ptwo, 4},
86 {"def", s_set, 0},
87 {"dfloat", float_cons, 'd'},
88 {"ffloat", float_cons, 'f'},
89 {"global", s_globl, 0},
90 {"half", cons, 2},
91 {"bss", s_lcomm_bytes, 1},
92 {"string", stringer, 1},
93 {"word", cons, 4},
94 /* Force set to be treated as an instruction. */
95 {"set", NULL, 0},
96 {".set", s_set, 0},
97 /* Likewise for eqv. */
98 {"eqv", NULL, 0},
99 {".eqv", s_set, -1},
100 {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
101 {"loc", dwarf2_directive_loc, 0},
102 {0,0,0}
103 };
104
105 void
106 md_begin (void)
107 {
108 const char *retval = NULL;
109 int i;
110
111 /* initialize hash table */
112
113 op_hash = hash_new ();
114
115 /* loop until you see the end of the list */
116
117 for (i = 0; i < spu_num_opcodes; i++)
118 {
119 /* hash each mnemonic and record its position */
120
121 retval = hash_insert (op_hash, spu_opcodes[i].mnemonic, (PTR)&spu_opcodes[i]);
122
123 if (retval != NULL && strcmp (retval, "exists") != 0)
124 as_fatal (_("Can't hash instruction '%s':%s"),
125 spu_opcodes[i].mnemonic, retval);
126 }
127 }
128 \f
129 const char *md_shortopts = "";
130 struct option md_longopts[] = {
131 #define OPTION_APUASM (OPTION_MD_BASE)
132 {"apuasm", no_argument, NULL, OPTION_APUASM},
133 #define OPTION_DD2 (OPTION_MD_BASE+1)
134 {"mdd2.0", no_argument, NULL, OPTION_DD2},
135 #define OPTION_DD1 (OPTION_MD_BASE+2)
136 {"mdd1.0", no_argument, NULL, OPTION_DD1},
137 #define OPTION_DD3 (OPTION_MD_BASE+3)
138 {"mdd3.0", no_argument, NULL, OPTION_DD3},
139 { NULL, no_argument, NULL, 0 }
140 };
141 size_t md_longopts_size = sizeof (md_longopts);
142
143 /* When set (by -apuasm) our assembler emulates the behaviour of apuasm.
144 * e.g. don't add bias to float conversion and don't right shift
145 * immediate values. */
146 static int emulate_apuasm;
147
148 /* Use the dd2.0 instructions set. The only differences are some new
149 * register names and the orx insn */
150 static int use_dd2 = 1;
151
152 int
153 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
154 {
155 switch (c)
156 {
157 case OPTION_APUASM:
158 emulate_apuasm = 1;
159 break;
160 case OPTION_DD3:
161 use_dd2 = 1;
162 break;
163 case OPTION_DD2:
164 use_dd2 = 1;
165 break;
166 case OPTION_DD1:
167 use_dd2 = 0;
168 break;
169 default:
170 return 0;
171 }
172 return 1;
173 }
174
175 void
176 md_show_usage (FILE *stream)
177 {
178 fputs (_("\
179 SPU options:\n\
180 --apuasm emulate behaviour of apuasm\n"),
181 stream);
182 }
183 \f
184
185 struct arg_encode {
186 int size;
187 int pos;
188 int rshift;
189 int lo, hi;
190 int wlo, whi;
191 bfd_reloc_code_real_type reloc;
192 };
193
194 static struct arg_encode arg_encode[A_MAX] = {
195 { 7, 0, 0, 0, 127, 0, -1, 0 }, /* A_T */
196 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_A */
197 { 7, 14, 0, 0, 127, 0, -1, 0 }, /* A_B */
198 { 7, 21, 0, 0, 127, 0, -1, 0 }, /* A_C */
199 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_S */
200 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_H */
201 { 0, 0, 0, 0, -1, 0, -1, 0 }, /* A_P */
202 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S3 */
203 { 7, 14, 0, -32, 31, -31, 0, BFD_RELOC_SPU_IMM7 }, /* A_S6 */
204 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S7N */
205 { 7, 14, 0, -64, 63, -63, 0, BFD_RELOC_SPU_IMM7 }, /* A_S7 */
206 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7A */
207 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7B */
208 { 10, 14, 0, -512, 511, -128, 255, BFD_RELOC_SPU_IMM10 }, /* A_S10B */
209 { 10, 14, 0, -512, 511, 0, -1, BFD_RELOC_SPU_IMM10 }, /* A_S10 */
210 { 2, 23, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9a }, /* A_S11 */
211 { 2, 14, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9b }, /* A_S11I */
212 { 10, 14, 4, -8192, 8191, 0, -1, BFD_RELOC_SPU_IMM10W }, /* A_S14 */
213 { 16, 7, 0, -32768, 32767, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_S16 */
214 { 16, 7, 2, -131072, 262143, 0, -1, BFD_RELOC_SPU_IMM16W }, /* A_S18 */
215 { 16, 7, 2, -262144, 262143, 0, -1, BFD_RELOC_SPU_PCREL16 }, /* A_R18 */
216 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U3 */
217 { 7, 14, 0, 0, 127, 0, 31, BFD_RELOC_SPU_IMM7 }, /* A_U5 */
218 { 7, 14, 0, 0, 127, 0, 63, BFD_RELOC_SPU_IMM7 }, /* A_U6 */
219 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U7 */
220 { 14, 0, 0, 0, 16383, 0, -1, 0 }, /* A_U14 */
221 { 16, 7, 0, -32768, 65535, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_X16 */
222 { 18, 7, 0, 0, 262143, 0, -1, BFD_RELOC_SPU_IMM18 }, /* A_U18 */
223 };
224
225 /* Some flags for handling errors. This is very hackish and added after
226 * the fact. */
227 static int syntax_error_arg;
228 static const char *syntax_error_param;
229 static int syntax_reg;
230
231 static char *
232 insn_fmt_string (struct spu_opcode *format)
233 {
234 static char buf[64];
235 int len = 0;
236 int i;
237
238 len += sprintf (&buf[len], "%s\t", format->mnemonic);
239 for (i = 1; i <= format->arg[0]; i++)
240 {
241 int arg = format->arg[i];
242 char *exp;
243 if (i > 1 && arg != A_P && format->arg[i-1] != A_P)
244 buf[len++] = ',';
245 if (arg == A_P)
246 exp = "(";
247 else if (arg < A_P)
248 exp = i == syntax_error_arg ? "REG" : "reg";
249 else
250 exp = i == syntax_error_arg ? "IMM" : "imm";
251 len += sprintf (&buf[len], "%s", exp);
252 if (i > 1 && format->arg[i-1] == A_P)
253 buf[len++] = ')';
254 }
255 buf[len] = 0;
256 return buf;
257 }
258
259 void
260 md_assemble (char *op)
261 {
262 char *param, *thisfrag;
263 char c;
264 struct spu_opcode *format;
265 struct spu_insn insn;
266 int i;
267
268 assert (op);
269
270 /* skip over instruction to find parameters */
271
272 for (param = op; *param != 0 && !ISSPACE (*param); param++)
273 ;
274 c = *param;
275 *param = 0;
276
277 if (c != 0 && c != '\n')
278 param++;
279
280 /* try to find the instruction in the hash table */
281
282 if ((format = (struct spu_opcode *) hash_find (op_hash, op)) == NULL)
283 {
284 as_bad (_("Invalid mnemonic '%s'"), op);
285 return;
286 }
287
288 if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0)
289 {
290 as_bad (_("'%s' is only available in DD2.0 or higher."), op);
291 return;
292 }
293
294 while (1)
295 {
296 /* try parsing this instruction into insn */
297 for (i = 0; i < MAX_RELOCS; i++)
298 {
299 insn.exp[i].X_add_symbol = 0;
300 insn.exp[i].X_op_symbol = 0;
301 insn.exp[i].X_add_number = 0;
302 insn.exp[i].X_op = O_illegal;
303 insn.reloc_arg[i] = -1;
304 insn.flag[i] = 0;
305 }
306 insn.opcode = format->opcode;
307 insn.tag = (enum spu_insns) (format - spu_opcodes);
308
309 syntax_error_arg = 0;
310 syntax_error_param = 0;
311 syntax_reg = 0;
312 if (calcop (format, param, &insn))
313 break;
314
315 /* if it doesn't parse try the next instruction */
316 if (!strcmp (format[0].mnemonic, format[1].mnemonic))
317 format++;
318 else
319 {
320 int parg = format[0].arg[syntax_error_arg-1];
321
322 as_fatal (_("Error in argument %d. Expecting: \"%s\""),
323 syntax_error_arg - (parg == A_P),
324 insn_fmt_string (format));
325 return;
326 }
327 }
328
329 if ((syntax_reg & 4)
330 && ! (insn.tag == M_RDCH
331 || insn.tag == M_RCHCNT
332 || insn.tag == M_WRCH))
333 as_warn (_("Mixing register syntax, with and without '$'."));
334 if (syntax_error_param)
335 {
336 const char *d = syntax_error_param;
337 while (*d != '$')
338 d--;
339 as_warn (_("Treating '%-*s' as a symbol."), (int)(syntax_error_param - d), d);
340 }
341
342 /* grow the current frag and plop in the opcode */
343
344 thisfrag = frag_more (4);
345 md_number_to_chars (thisfrag, insn.opcode, 4);
346
347 /* if this instruction requires labels mark it for later */
348
349 for (i = 0; i < MAX_RELOCS; i++)
350 if (insn.reloc_arg[i] >= 0)
351 {
352 fixS *fixP;
353 bfd_reloc_code_real_type reloc = arg_encode[insn.reloc_arg[i]].reloc;
354 int pcrel = 0;
355 if (reloc == BFD_RELOC_SPU_PCREL9a
356 || reloc == BFD_RELOC_SPU_PCREL9b
357 || reloc == BFD_RELOC_SPU_PCREL16)
358 pcrel = 1;
359 if (insn.flag[i] & 1)
360 reloc = BFD_RELOC_SPU_HI16;
361 else if (insn.flag[i] & 2)
362 reloc = BFD_RELOC_SPU_LO16;
363 fixP = fix_new_exp (frag_now,
364 thisfrag - frag_now->fr_literal,
365 4,
366 &insn.exp[i],
367 pcrel,
368 reloc);
369 fixP->tc_fix_data = insn.reloc_arg[i];
370 }
371 dwarf2_emit_insn (4);
372 }
373
374 static int
375 calcop (struct spu_opcode *format, const char *param, struct spu_insn *insn)
376 {
377 int i;
378 int paren = 0;
379 int arg;
380
381 for (i = 1; i <= format->arg[0]; i++)
382 {
383 arg = format->arg[i];
384 syntax_error_arg = i;
385
386 while (ISSPACE (*param))
387 param++;
388 if (*param == 0 || *param == ',')
389 return 0;
390 if (arg < A_P)
391 param = get_reg (param, insn, arg, 1);
392 else if (arg > A_P)
393 param = get_imm (param, insn, arg);
394 else if (arg == A_P)
395 {
396 paren++;
397 if ('(' != *param++)
398 return 0;
399 }
400
401 if (!param)
402 return 0;
403
404 while (ISSPACE (*param))
405 param++;
406
407 if (arg != A_P && paren)
408 {
409 paren--;
410 if (')' != *param++)
411 return 0;
412 }
413 else if (i < format->arg[0]
414 && format->arg[i] != A_P
415 && format->arg[i+1] != A_P)
416 {
417 if (',' != *param++)
418 {
419 syntax_error_arg++;
420 return 0;
421 }
422 }
423 }
424 while (ISSPACE (*param))
425 param++;
426 return !paren && (*param == 0 || *param == '\n');
427 }
428
429 struct reg_name {
430 unsigned int regno;
431 unsigned int length;
432 char name[32];
433 };
434
435 #define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM }
436
437 static struct reg_name reg_name[] = {
438 REG_NAME (0, "lr"), /* link register */
439 REG_NAME (1, "sp"), /* stack pointer */
440 REG_NAME (0, "rp"), /* link register */
441 REG_NAME (127, "fp"), /* frame pointer */
442 };
443
444 static struct reg_name sp_reg_name[] = {
445 };
446
447 static struct reg_name ch_reg_name[] = {
448 REG_NAME ( 0, "SPU_RdEventStat"),
449 REG_NAME ( 1, "SPU_WrEventMask"),
450 REG_NAME ( 2, "SPU_WrEventAck"),
451 REG_NAME ( 3, "SPU_RdSigNotify1"),
452 REG_NAME ( 4, "SPU_RdSigNotify2"),
453 REG_NAME ( 7, "SPU_WrDec"),
454 REG_NAME ( 8, "SPU_RdDec"),
455 REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */
456 REG_NAME ( 13, "SPU_RdMachStat"),
457 REG_NAME ( 14, "SPU_WrSRR0"),
458 REG_NAME ( 15, "SPU_RdSRR0"),
459 REG_NAME ( 28, "SPU_WrOutMbox"),
460 REG_NAME ( 29, "SPU_RdInMbox"),
461 REG_NAME ( 30, "SPU_WrOutIntrMbox"),
462 REG_NAME ( 9, "MFC_WrMSSyncReq"),
463 REG_NAME ( 12, "MFC_RdTagMask"), /* DD2.0 only */
464 REG_NAME ( 16, "MFC_LSA"),
465 REG_NAME ( 17, "MFC_EAH"),
466 REG_NAME ( 18, "MFC_EAL"),
467 REG_NAME ( 19, "MFC_Size"),
468 REG_NAME ( 20, "MFC_TagID"),
469 REG_NAME ( 21, "MFC_Cmd"),
470 REG_NAME ( 22, "MFC_WrTagMask"),
471 REG_NAME ( 23, "MFC_WrTagUpdate"),
472 REG_NAME ( 24, "MFC_RdTagStat"),
473 REG_NAME ( 25, "MFC_RdListStallStat"),
474 REG_NAME ( 26, "MFC_WrListStallAck"),
475 REG_NAME ( 27, "MFC_RdAtomicStat"),
476 };
477 #undef REG_NAME
478
479 static const char *
480 get_reg (const char *param, struct spu_insn *insn, int arg, int accept_expr)
481 {
482 unsigned regno;
483 int saw_prefix = 0;
484
485 if (*param == '$')
486 {
487 saw_prefix = 1;
488 param++;
489 }
490
491 if (arg == A_H) /* Channel */
492 {
493 if ((param[0] == 'c' || param[0] == 'C')
494 && (param[1] == 'h' || param[1] == 'H')
495 && ISDIGIT (param[2]))
496 param += 2;
497 }
498 else if (arg == A_S) /* Special purpose register */
499 {
500 if ((param[0] == 's' || param[0] == 'S')
501 && (param[1] == 'p' || param[1] == 'P')
502 && ISDIGIT (param[2]))
503 param += 2;
504 }
505
506 if (ISDIGIT (*param))
507 {
508 regno = 0;
509 while (ISDIGIT (*param))
510 regno = regno * 10 + *param++ - '0';
511 }
512 else
513 {
514 struct reg_name *rn;
515 unsigned int i, n, l = 0;
516
517 if (arg == A_H) /* Channel */
518 {
519 rn = ch_reg_name;
520 n = sizeof (ch_reg_name) / sizeof (*ch_reg_name);
521 }
522 else if (arg == A_S) /* Special purpose register */
523 {
524 rn = sp_reg_name;
525 n = sizeof (sp_reg_name) / sizeof (*sp_reg_name);
526 }
527 else
528 {
529 rn = reg_name;
530 n = sizeof (reg_name) / sizeof (*reg_name);
531 }
532 regno = 128;
533 for (i = 0; i < n; i++)
534 if (rn[i].length > l
535 && 0 == strncasecmp (param, rn[i].name, rn[i].length))
536 {
537 l = rn[i].length;
538 regno = rn[i].regno;
539 }
540 param += l;
541 }
542
543 if (!use_dd2
544 && arg == A_H)
545 {
546 if (regno == 11)
547 as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher."));
548 else if (regno == 12)
549 as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher."));
550 }
551
552 if (regno < 128)
553 {
554 insn->opcode |= regno << arg_encode[arg].pos;
555 if ((!saw_prefix && syntax_reg == 1)
556 || (saw_prefix && syntax_reg == 2))
557 syntax_reg |= 4;
558 syntax_reg |= saw_prefix ? 1 : 2;
559 return param;
560 }
561
562 if (accept_expr)
563 {
564 char *save_ptr;
565 expressionS ex;
566 save_ptr = input_line_pointer;
567 input_line_pointer = (char *)param;
568 expression (&ex);
569 param = input_line_pointer;
570 input_line_pointer = save_ptr;
571 if (ex.X_op == O_register || ex.X_op == O_constant)
572 {
573 insn->opcode |= ex.X_add_number << arg_encode[arg].pos;
574 return param;
575 }
576 }
577 return 0;
578 }
579
580 static const char *
581 get_imm (const char *param, struct spu_insn *insn, int arg)
582 {
583 int val;
584 char *save_ptr;
585 int low = 0, high = 0;
586 int reloc_i = insn->reloc_arg[0] >= 0 ? 1 : 0;
587
588 if (strncmp (param, "%lo(", 4) == 0)
589 {
590 param += 3;
591 low = 1;
592 as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l."));
593 }
594 else if (strncmp (param, "%hi(", 4) == 0)
595 {
596 param += 3;
597 high = 1;
598 as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h."));
599 }
600 else if (strncmp (param, "%pic(", 5) == 0)
601 {
602 /* Currently we expect %pic(expr) == expr, so do nothing here.
603 * i.e. for code loaded at address 0 $toc will be 0. */
604 param += 4;
605 }
606
607 if (*param == '$')
608 {
609 /* Symbols can start with $, but if this symbol matches a register
610 * name, it's probably a mistake. The only way to avoid this
611 * warning is to rename the symbol. */
612 struct spu_insn tmp_insn;
613 const char *np = get_reg (param, &tmp_insn, arg, 0);
614
615 if (np)
616 syntax_error_param = np;
617 }
618
619 save_ptr = input_line_pointer;
620 input_line_pointer = (char *) param;
621 expression (&insn->exp[reloc_i]);
622 param = input_line_pointer;
623 input_line_pointer = save_ptr;
624
625 /* Similar to ppc_elf_suffix in tc-ppc.c. We have so few cases to
626 * handle we do it inlined here. */
627 if (param[0] == '@' && !ISALNUM (param[2]) && param[2] != '@')
628 {
629 if (param[1] == 'h' || param[1] == 'H')
630 {
631 high = 1;
632 param += 2;
633 }
634 else if (param[1] == 'l' || param[1] == 'L')
635 {
636 low = 1;
637 param += 2;
638 }
639 }
640
641 val = insn->exp[reloc_i].X_add_number;
642
643 if (insn->exp[reloc_i].X_op == O_constant)
644 {
645 if (emulate_apuasm)
646 {
647 /* Convert the value to a format we expect. */
648 val <<= arg_encode[arg].rshift;
649 if (arg == A_U7A)
650 val = 173 - val;
651 else if (arg == A_U7B)
652 val = 155 - val;
653 }
654
655 if (high)
656 val = val >> 16;
657 else if (low)
658 val = val & 0xffff;
659
660 /* Warn about out of range expressions. */
661 {
662 int hi = arg_encode[arg].hi;
663 int lo = arg_encode[arg].lo;
664 int whi = arg_encode[arg].whi;
665 int wlo = arg_encode[arg].wlo;
666
667 if (hi > lo && (val < lo || val > hi))
668 as_fatal (_("Constant expression %d out of range, [%d, %d]."),
669 val, lo, hi);
670 else if (whi > wlo && (val < wlo || val > whi))
671 as_warn (_("Constant expression %d out of range, [%d, %d]."),
672 val, wlo, whi);
673 }
674
675 if (arg == A_U7A)
676 val = 173 - val;
677 else if (arg == A_U7B)
678 val = 155 - val;
679
680 /* Branch hints have a split encoding. Do the bottom part. */
681 if (arg == A_S11 || arg == A_S11I)
682 insn->opcode |= ((val >> 2) & 0x7f);
683
684 insn->opcode |= (((val >> arg_encode[arg].rshift)
685 & ((1 << arg_encode[arg].size) - 1))
686 << arg_encode[arg].pos);
687 insn->reloc_arg[reloc_i] = -1;
688 insn->flag[reloc_i] = 0;
689 }
690 else
691 {
692 insn->reloc_arg[reloc_i] = arg;
693 if (high)
694 insn->flag[reloc_i] |= 1;
695 if (low)
696 insn->flag[reloc_i] |= 2;
697 }
698
699 return param;
700 }
701
702 #define MAX_LITTLENUMS 6
703
704 /* Turn a string in input_line_pointer into a floating point constant of type
705 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
706 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
707 */
708 char *
709 md_atof (int type, char *litP, int *sizeP)
710 {
711 int prec;
712 LITTLENUM_TYPE words[MAX_LITTLENUMS];
713 LITTLENUM_TYPE *wordP;
714 char *t;
715
716 switch (type)
717 {
718 case 'f':
719 case 'F':
720 case 's':
721 case 'S':
722 prec = 2;
723 break;
724
725 case 'd':
726 case 'D':
727 case 'r':
728 case 'R':
729 prec = 4;
730 break;
731
732 case 'x':
733 case 'X':
734 prec = 6;
735 break;
736
737 case 'p':
738 case 'P':
739 prec = 6;
740 break;
741
742 default:
743 *sizeP = 0;
744 return _("Bad call to MD_ATOF()");
745 }
746 t = atof_ieee (input_line_pointer, type, words);
747 if (t)
748 input_line_pointer = t;
749
750 *sizeP = prec * sizeof (LITTLENUM_TYPE);
751 for (wordP = words; prec--;)
752 {
753 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
754 litP += sizeof (LITTLENUM_TYPE);
755 }
756 return 0;
757 }
758
759 #ifndef WORKING_DOT_WORD
760 int md_short_jump_size = 4;
761
762 void
763 md_create_short_jump (char *ptr,
764 addressT from_addr ATTRIBUTE_UNUSED,
765 addressT to_addr ATTRIBUTE_UNUSED,
766 fragS *frag,
767 symbolS *to_symbol)
768 {
769 ptr[0] = (char) 0xc0;
770 ptr[1] = 0x00;
771 ptr[2] = 0x00;
772 ptr[3] = 0x00;
773 fix_new (frag,
774 ptr - frag->fr_literal,
775 4,
776 to_symbol,
777 (offsetT) 0,
778 0,
779 BFD_RELOC_SPU_PCREL16);
780 }
781
782 int md_long_jump_size = 4;
783
784 void
785 md_create_long_jump (char *ptr,
786 addressT from_addr ATTRIBUTE_UNUSED,
787 addressT to_addr ATTRIBUTE_UNUSED,
788 fragS *frag,
789 symbolS *to_symbol)
790 {
791 ptr[0] = (char) 0xc0;
792 ptr[1] = 0x00;
793 ptr[2] = 0x00;
794 ptr[3] = 0x00;
795 fix_new (frag,
796 ptr - frag->fr_literal,
797 4,
798 to_symbol,
799 (offsetT) 0,
800 0,
801 BFD_RELOC_SPU_PCREL16);
802 }
803 #endif
804
805 int
806 md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
807 segT segment_type ATTRIBUTE_UNUSED)
808 {
809 as_fatal (_("Relaxation should never occur"));
810 return -1;
811 }
812
813 /* If while processing a fixup, a reloc really needs to be created,
814 then it is done here. */
815
816 arelent *
817 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
818 {
819 arelent *reloc;
820 reloc = (arelent *) xmalloc (sizeof (arelent));
821 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
822 if (fixp->fx_addsy)
823 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
824 else if (fixp->fx_subsy)
825 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
826 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
827 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
828 if (reloc->howto == (reloc_howto_type *) NULL)
829 {
830 as_bad_where (fixp->fx_file, fixp->fx_line,
831 _("reloc %d not supported by object file format"),
832 (int) fixp->fx_r_type);
833 return NULL;
834 }
835 reloc->addend = fixp->fx_addnumber;
836 return reloc;
837 }
838
839 /* Round up a section's size to the appropriate boundary. */
840
841 valueT
842 md_section_align (segT seg, valueT size)
843 {
844 int align = bfd_get_section_alignment (stdoutput, seg);
845 valueT mask = ((valueT) 1 << align) - 1;
846
847 return (size + mask) & ~mask;
848 }
849
850 /* Where a PC relative offset is calculated from. On the spu they
851 are calculated from the beginning of the branch instruction. */
852
853 long
854 md_pcrel_from (fixS *fixp)
855 {
856 return fixp->fx_frag->fr_address + fixp->fx_where;
857 }
858
859 /* Fill in rs_align_code fragments. */
860
861 void
862 spu_handle_align (fragS *fragp)
863 {
864 static const unsigned char nop_pattern[8] = {
865 0x40, 0x20, 0x00, 0x00, /* even nop */
866 0x00, 0x20, 0x00, 0x00, /* odd nop */
867 };
868
869 int bytes;
870 char *p;
871
872 if (fragp->fr_type != rs_align_code)
873 return;
874
875 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
876 p = fragp->fr_literal + fragp->fr_fix;
877
878 if (bytes & 3)
879 {
880 int fix = bytes & 3;
881 memset (p, 0, fix);
882 p += fix;
883 bytes -= fix;
884 fragp->fr_fix += fix;
885 }
886 if (bytes & 4)
887 {
888 memcpy (p, &nop_pattern[4], 4);
889 p += 4;
890 bytes -= 4;
891 fragp->fr_fix += 4;
892 }
893
894 memcpy (p, nop_pattern, 8);
895 fragp->fr_var = 8;
896 }
897
898 void
899 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
900 {
901 unsigned int res;
902 valueT val = *valP;
903 char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
904
905 if (fixP->fx_subsy != (symbolS *) NULL)
906 {
907 /* We can't actually support subtracting a symbol. */
908 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
909 }
910
911 if (fixP->fx_addsy != NULL)
912 {
913 if (fixP->fx_pcrel)
914 {
915 /* Hack around bfd_install_relocation brain damage. */
916 val += fixP->fx_frag->fr_address + fixP->fx_where;
917
918 switch (fixP->fx_r_type)
919 {
920 case BFD_RELOC_32:
921 fixP->fx_r_type = BFD_RELOC_32_PCREL;
922 break;
923
924 case BFD_RELOC_SPU_PCREL16:
925 case BFD_RELOC_SPU_PCREL9a:
926 case BFD_RELOC_SPU_PCREL9b:
927 case BFD_RELOC_32_PCREL:
928 break;
929
930 default:
931 as_bad_where (fixP->fx_file, fixP->fx_line,
932 _("expression too complex"));
933 break;
934 }
935 }
936 }
937
938 fixP->fx_addnumber = val;
939
940 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
941 {
942 fixP->fx_done = 1;
943 res = 0;
944 if (fixP->tc_fix_data > A_P)
945 {
946 int hi = arg_encode[fixP->tc_fix_data].hi;
947 int lo = arg_encode[fixP->tc_fix_data].lo;
948 if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
949 as_bad_where (fixP->fx_file, fixP->fx_line,
950 "Relocation doesn't fit. (relocation value = 0x%lx)",
951 (long) val);
952 }
953
954 switch (fixP->fx_r_type)
955 {
956 case BFD_RELOC_8:
957 md_number_to_chars (place, val, 1);
958 return;
959
960 case BFD_RELOC_16:
961 md_number_to_chars (place, val, 2);
962 return;
963
964 case BFD_RELOC_32:
965 md_number_to_chars (place, val, 4);
966 return;
967
968 case BFD_RELOC_64:
969 md_number_to_chars (place, val, 8);
970 return;
971
972 case BFD_RELOC_SPU_IMM7:
973 res = (val & 0x7f) << 14;
974 break;
975
976 case BFD_RELOC_SPU_IMM8:
977 res = (val & 0xff) << 14;
978 break;
979
980 case BFD_RELOC_SPU_IMM10:
981 res = (val & 0x3ff) << 14;
982 break;
983
984 case BFD_RELOC_SPU_IMM10W:
985 res = (val & 0x3ff0) << 10;
986 break;
987
988 case BFD_RELOC_SPU_IMM16:
989 res = (val & 0xffff) << 7;
990 break;
991
992 case BFD_RELOC_SPU_IMM16W:
993 res = (val & 0x3fffc) << 5;
994 break;
995
996 case BFD_RELOC_SPU_IMM18:
997 res = (val & 0x3ffff) << 7;
998 break;
999
1000 case BFD_RELOC_SPU_PCREL9a:
1001 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 14);
1002 break;
1003
1004 case BFD_RELOC_SPU_PCREL9b:
1005 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 5);
1006 break;
1007
1008 case BFD_RELOC_SPU_PCREL16:
1009 res = (val & 0x3fffc) << 5;
1010 break;
1011
1012 default:
1013 as_bad_where (fixP->fx_file, fixP->fx_line,
1014 _("reloc %d not supported by object file format"),
1015 (int) fixP->fx_r_type);
1016 }
1017
1018 if (res != 0)
1019 {
1020 place[0] |= (res >> 24) & 0xff;
1021 place[1] |= (res >> 16) & 0xff;
1022 place[2] |= (res >> 8) & 0xff;
1023 place[3] |= (res) & 0xff;
1024 }
1025 }
1026 }
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