* config/tc-spu.c (md_assemble): Cast printf string size parameter
[deliverable/binutils-gdb.git] / gas / config / tc-spu.c
1 /* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
2
3 Copyright 2006 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "opcode/spu.h"
26 #include "dwarf2dbg.h"
27
28 const struct spu_opcode spu_opcodes[] = {
29 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
30 { MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT },
31 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
32 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
33 #include "opcode/spu-insns.h"
34 #undef APUOP
35 #undef APUOPFB
36 };
37
38 static const int spu_num_opcodes =
39 sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);
40
41 #define MAX_RELOCS 2
42
43 struct spu_insn
44 {
45 unsigned int opcode;
46 expressionS exp[MAX_RELOCS];
47 int reloc_arg[MAX_RELOCS];
48 int flag[MAX_RELOCS];
49 enum spu_insns tag;
50 };
51
52 static const char *get_imm (const char *param, struct spu_insn *insn, int arg);
53 static const char *get_reg (const char *param, struct spu_insn *insn, int arg,
54 int accept_expr);
55
56 static int calcop (struct spu_opcode *format, const char *param,
57 struct spu_insn *insn);
58
59 extern char *myname;
60 static struct hash_control *op_hash = NULL;
61
62 /* These bits should be turned off in the first address of every segment */
63 int md_seg_align = 7;
64
65 /* These chars start a comment anywhere in a source file (except inside
66 another comment */
67 const char comment_chars[] = "#";
68
69 /* These chars only start a comment at the beginning of a line. */
70 const char line_comment_chars[] = "#";
71
72 /* gods own line continuation char */
73 const char line_separator_chars[] = ";";
74
75 /* Chars that can be used to separate mant from exp in floating point nums */
76 const char EXP_CHARS[] = "eE";
77
78 /* Chars that mean this number is a floating point constant */
79 /* as in 0f123.456 */
80 /* or 0H1.234E-12 (see exp chars above) */
81 const char FLT_CHARS[] = "dDfF";
82
83 const pseudo_typeS md_pseudo_table[] =
84 {
85 {"align", s_align_ptwo, 4},
86 {"def", s_set, 0},
87 {"dfloat", float_cons, 'd'},
88 {"ffloat", float_cons, 'f'},
89 {"global", s_globl, 0},
90 {"half", cons, 2},
91 {"bss", s_lcomm_bytes, 1},
92 {"string", stringer, 1},
93 {"word", cons, 4},
94 /* Force set to be treated as an instruction. */
95 {"set", NULL, 0},
96 {".set", s_set, 0},
97 {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
98 {"loc", dwarf2_directive_loc, 0},
99 {0,0,0}
100 };
101
102 void
103 md_begin (void)
104 {
105 const char *retval = NULL;
106 int i;
107
108 /* initialize hash table */
109
110 op_hash = hash_new ();
111
112 /* loop until you see the end of the list */
113
114 for (i = 0; i < spu_num_opcodes; i++)
115 {
116 /* hash each mnemonic and record its position */
117
118 retval = hash_insert (op_hash, spu_opcodes[i].mnemonic, (PTR)&spu_opcodes[i]);
119
120 if (retval != NULL && strcmp (retval, "exists") != 0)
121 as_fatal (_("Can't hash instruction '%s':%s"),
122 spu_opcodes[i].mnemonic, retval);
123 }
124 }
125 \f
126 const char *md_shortopts = "";
127 struct option md_longopts[] = {
128 #define OPTION_APUASM (OPTION_MD_BASE)
129 {"apuasm", no_argument, NULL, OPTION_APUASM},
130 #define OPTION_DD2 (OPTION_MD_BASE+1)
131 {"mdd2.0", no_argument, NULL, OPTION_DD2},
132 #define OPTION_DD1 (OPTION_MD_BASE+2)
133 {"mdd1.0", no_argument, NULL, OPTION_DD1},
134 #define OPTION_DD3 (OPTION_MD_BASE+3)
135 {"mdd3.0", no_argument, NULL, OPTION_DD3},
136 { NULL, no_argument, NULL, 0 }
137 };
138 size_t md_longopts_size = sizeof (md_longopts);
139
140 /* When set (by -apuasm) our assembler emulates the behaviour of apuasm.
141 * e.g. don't add bias to float conversion and don't right shift
142 * immediate values. */
143 static int emulate_apuasm;
144
145 /* Use the dd2.0 instructions set. The only differences are some new
146 * register names and the orx insn */
147 static int use_dd2 = 1;
148
149 int
150 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
151 {
152 switch (c)
153 {
154 case OPTION_APUASM:
155 emulate_apuasm = 1;
156 break;
157 case OPTION_DD3:
158 use_dd2 = 1;
159 break;
160 case OPTION_DD2:
161 use_dd2 = 1;
162 break;
163 case OPTION_DD1:
164 use_dd2 = 0;
165 break;
166 default:
167 return 0;
168 }
169 return 1;
170 }
171
172 void
173 md_show_usage (FILE *stream)
174 {
175 fputs (_("\
176 SPU options:\n\
177 --apuasm emulate behaviour of apuasm\n"),
178 stream);
179 }
180 \f
181
182 struct arg_encode {
183 int size;
184 int pos;
185 int rshift;
186 int lo, hi;
187 int wlo, whi;
188 bfd_reloc_code_real_type reloc;
189 };
190
191 static struct arg_encode arg_encode[A_MAX] = {
192 { 7, 0, 0, 0, 127, 0, -1, 0 }, /* A_T */
193 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_A */
194 { 7, 14, 0, 0, 127, 0, -1, 0 }, /* A_B */
195 { 7, 21, 0, 0, 127, 0, -1, 0 }, /* A_C */
196 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_S */
197 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_H */
198 { 0, 0, 0, 0, -1, 0, -1, 0 }, /* A_P */
199 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S3 */
200 { 7, 14, 0, -32, 31, -31, 0, BFD_RELOC_SPU_IMM7 }, /* A_S6 */
201 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S7N */
202 { 7, 14, 0, -64, 63, -63, 0, BFD_RELOC_SPU_IMM7 }, /* A_S7 */
203 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7A */
204 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7B */
205 { 10, 14, 0, -512, 511, -128, 255, BFD_RELOC_SPU_IMM10 }, /* A_S10B */
206 { 10, 14, 0, -512, 511, 0, -1, BFD_RELOC_SPU_IMM10 }, /* A_S10 */
207 { 2, 23, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9a }, /* A_S11 */
208 { 2, 14, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9b }, /* A_S11I */
209 { 10, 14, 4, -8192, 8191, 0, -1, BFD_RELOC_SPU_IMM10W }, /* A_S14 */
210 { 16, 7, 0, -32768, 32767, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_S16 */
211 { 16, 7, 2, -131072, 262143, 0, -1, BFD_RELOC_SPU_IMM16W }, /* A_S18 */
212 { 16, 7, 2, -262144, 262143, 0, -1, BFD_RELOC_SPU_PCREL16 }, /* A_R18 */
213 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U3 */
214 { 7, 14, 0, 0, 127, 0, 31, BFD_RELOC_SPU_IMM7 }, /* A_U5 */
215 { 7, 14, 0, 0, 127, 0, 63, BFD_RELOC_SPU_IMM7 }, /* A_U6 */
216 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U7 */
217 { 14, 0, 0, 0, 16383, 0, -1, 0 }, /* A_U14 */
218 { 16, 7, 0, -32768, 65535, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_X16 */
219 { 18, 7, 0, 0, 262143, 0, -1, BFD_RELOC_SPU_IMM18 }, /* A_U18 */
220 };
221
222 /* Some flags for handling errors. This is very hackish and added after
223 * the fact. */
224 static int syntax_error_arg;
225 static const char *syntax_error_param;
226 static int syntax_reg;
227
228 static char *
229 insn_fmt_string (struct spu_opcode *format)
230 {
231 static char buf[64];
232 int len = 0;
233 int i;
234
235 len += sprintf (&buf[len], "%s\t", format->mnemonic);
236 for (i = 1; i <= format->arg[0]; i++)
237 {
238 int arg = format->arg[i];
239 char *exp;
240 if (i > 1 && arg != A_P && format->arg[i-1] != A_P)
241 buf[len++] = ',';
242 if (arg == A_P)
243 exp = "(";
244 else if (arg < A_P)
245 exp = i == syntax_error_arg ? "REG" : "reg";
246 else
247 exp = i == syntax_error_arg ? "IMM" : "imm";
248 len += sprintf (&buf[len], "%s", exp);
249 if (i > 1 && format->arg[i-1] == A_P)
250 buf[len++] = ')';
251 }
252 buf[len] = 0;
253 return buf;
254 }
255
256 void
257 md_assemble (char *op)
258 {
259 char *param, *thisfrag;
260 char c;
261 struct spu_opcode *format;
262 struct spu_insn insn;
263 int i;
264
265 assert (op);
266
267 /* skip over instruction to find parameters */
268
269 for (param = op; *param != 0 && !ISSPACE (*param); param++)
270 ;
271 c = *param;
272 *param = 0;
273
274 if (c != 0 && c != '\n')
275 param++;
276
277 /* try to find the instruction in the hash table */
278
279 if ((format = (struct spu_opcode *) hash_find (op_hash, op)) == NULL)
280 {
281 as_bad (_("Invalid mnemonic '%s'"), op);
282 return;
283 }
284
285 if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0)
286 {
287 as_bad (_("'%s' is only available in DD2.0 or higher."), op);
288 return;
289 }
290
291 while (1)
292 {
293 /* try parsing this instruction into insn */
294 for (i = 0; i < MAX_RELOCS; i++)
295 {
296 insn.exp[i].X_add_symbol = 0;
297 insn.exp[i].X_op_symbol = 0;
298 insn.exp[i].X_add_number = 0;
299 insn.exp[i].X_op = O_illegal;
300 insn.reloc_arg[i] = -1;
301 insn.flag[i] = 0;
302 }
303 insn.opcode = format->opcode;
304 insn.tag = (enum spu_insns) (format - spu_opcodes);
305
306 syntax_error_arg = 0;
307 syntax_error_param = 0;
308 syntax_reg = 0;
309 if (calcop (format, param, &insn))
310 break;
311
312 /* if it doesn't parse try the next instruction */
313 if (!strcmp (format[0].mnemonic, format[1].mnemonic))
314 format++;
315 else
316 {
317 int parg = format[0].arg[syntax_error_arg-1];
318
319 as_fatal (_("Error in argument %d. Expecting: \"%s\""),
320 syntax_error_arg - (parg == A_P),
321 insn_fmt_string (format));
322 return;
323 }
324 }
325
326 if ((syntax_reg & 4)
327 && ! (insn.tag == M_RDCH
328 || insn.tag == M_RCHCNT
329 || insn.tag == M_WRCH))
330 as_warn (_("Mixing register syntax, with and without '$'."));
331 if (syntax_error_param)
332 {
333 const char *d = syntax_error_param;
334 while (*d != '$')
335 d--;
336 as_warn (_("Treating '%-*s' as a symbol."), (int)(syntax_error_param - d), d);
337 }
338
339 /* grow the current frag and plop in the opcode */
340
341 thisfrag = frag_more (4);
342 md_number_to_chars (thisfrag, insn.opcode, 4);
343
344 /* if this instruction requires labels mark it for later */
345
346 for (i = 0; i < MAX_RELOCS; i++)
347 if (insn.reloc_arg[i] >= 0)
348 {
349 fixS *fixP;
350 bfd_reloc_code_real_type reloc = arg_encode[insn.reloc_arg[i]].reloc;
351 int pcrel = 0;
352 if (reloc == BFD_RELOC_SPU_PCREL9a
353 || reloc == BFD_RELOC_SPU_PCREL9b
354 || reloc == BFD_RELOC_SPU_PCREL16)
355 pcrel = 1;
356 if (insn.flag[i] & 1)
357 reloc = BFD_RELOC_SPU_HI16;
358 else if (insn.flag[i] & 2)
359 reloc = BFD_RELOC_SPU_LO16;
360 fixP = fix_new_exp (frag_now,
361 thisfrag - frag_now->fr_literal,
362 4,
363 &insn.exp[i],
364 pcrel,
365 reloc);
366 fixP->tc_fix_data = insn.reloc_arg[i];
367 }
368 dwarf2_emit_insn (4);
369 }
370
371 static int
372 calcop (struct spu_opcode *format, const char *param, struct spu_insn *insn)
373 {
374 int i;
375 int paren = 0;
376 int arg;
377
378 for (i = 1; i <= format->arg[0]; i++)
379 {
380 arg = format->arg[i];
381 syntax_error_arg = i;
382
383 while (ISSPACE (*param))
384 param++;
385 if (*param == 0 || *param == ',')
386 return 0;
387 if (arg < A_P)
388 param = get_reg (param, insn, arg, 1);
389 else if (arg > A_P)
390 param = get_imm (param, insn, arg);
391 else if (arg == A_P)
392 {
393 paren++;
394 if ('(' != *param++)
395 return 0;
396 }
397
398 if (!param)
399 return 0;
400
401 while (ISSPACE (*param))
402 param++;
403
404 if (arg != A_P && paren)
405 {
406 paren--;
407 if (')' != *param++)
408 return 0;
409 }
410 else if (i < format->arg[0]
411 && format->arg[i] != A_P
412 && format->arg[i+1] != A_P)
413 {
414 if (',' != *param++)
415 {
416 syntax_error_arg++;
417 return 0;
418 }
419 }
420 }
421 while (ISSPACE (*param))
422 param++;
423 return !paren && (*param == 0 || *param == '\n');
424 }
425
426 struct reg_name {
427 unsigned int regno;
428 unsigned int length;
429 char name[32];
430 };
431
432 #define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM }
433
434 static struct reg_name reg_name[] = {
435 REG_NAME (0, "lr"), /* link register */
436 REG_NAME (1, "sp"), /* stack pointer */
437 REG_NAME (0, "rp"), /* link register */
438 REG_NAME (127, "fp"), /* frame pointer */
439 };
440
441 static struct reg_name sp_reg_name[] = {
442 };
443
444 static struct reg_name ch_reg_name[] = {
445 REG_NAME ( 0, "SPU_RdEventStat"),
446 REG_NAME ( 1, "SPU_WrEventMask"),
447 REG_NAME ( 2, "SPU_WrEventAck"),
448 REG_NAME ( 3, "SPU_RdSigNotify1"),
449 REG_NAME ( 4, "SPU_RdSigNotify2"),
450 REG_NAME ( 7, "SPU_WrDec"),
451 REG_NAME ( 8, "SPU_RdDec"),
452 REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */
453 REG_NAME ( 13, "SPU_RdMachStat"),
454 REG_NAME ( 14, "SPU_WrSRR0"),
455 REG_NAME ( 15, "SPU_RdSRR0"),
456 REG_NAME ( 28, "SPU_WrOutMbox"),
457 REG_NAME ( 29, "SPU_RdInMbox"),
458 REG_NAME ( 30, "SPU_WrOutIntrMbox"),
459 REG_NAME ( 9, "MFC_WrMSSyncReq"),
460 REG_NAME ( 12, "MFC_RdTagMask"), /* DD2.0 only */
461 REG_NAME ( 16, "MFC_LSA"),
462 REG_NAME ( 17, "MFC_EAH"),
463 REG_NAME ( 18, "MFC_EAL"),
464 REG_NAME ( 19, "MFC_Size"),
465 REG_NAME ( 20, "MFC_TagID"),
466 REG_NAME ( 21, "MFC_Cmd"),
467 REG_NAME ( 22, "MFC_WrTagMask"),
468 REG_NAME ( 23, "MFC_WrTagUpdate"),
469 REG_NAME ( 24, "MFC_RdTagStat"),
470 REG_NAME ( 25, "MFC_RdListStallStat"),
471 REG_NAME ( 26, "MFC_WrListStallAck"),
472 REG_NAME ( 27, "MFC_RdAtomicStat"),
473 };
474 #undef REG_NAME
475
476 static const char *
477 get_reg (const char *param, struct spu_insn *insn, int arg, int accept_expr)
478 {
479 unsigned regno;
480 int saw_prefix = 0;
481
482 if (*param == '$')
483 {
484 saw_prefix = 1;
485 param++;
486 }
487
488 if (arg == A_H) /* Channel */
489 {
490 if ((param[0] == 'c' || param[0] == 'C')
491 && (param[1] == 'h' || param[1] == 'H')
492 && ISDIGIT (param[2]))
493 param += 2;
494 }
495 else if (arg == A_S) /* Special purpose register */
496 {
497 if ((param[0] == 's' || param[0] == 'S')
498 && (param[1] == 'p' || param[1] == 'P')
499 && ISDIGIT (param[2]))
500 param += 2;
501 }
502
503 if (ISDIGIT (*param))
504 {
505 regno = 0;
506 while (ISDIGIT (*param))
507 regno = regno * 10 + *param++ - '0';
508 }
509 else
510 {
511 struct reg_name *rn;
512 unsigned int i, n, l = 0;
513
514 if (arg == A_H) /* Channel */
515 {
516 rn = ch_reg_name;
517 n = sizeof (ch_reg_name) / sizeof (*ch_reg_name);
518 }
519 else if (arg == A_S) /* Special purpose register */
520 {
521 rn = sp_reg_name;
522 n = sizeof (sp_reg_name) / sizeof (*sp_reg_name);
523 }
524 else
525 {
526 rn = reg_name;
527 n = sizeof (reg_name) / sizeof (*reg_name);
528 }
529 regno = 128;
530 for (i = 0; i < n; i++)
531 if (rn[i].length > l
532 && 0 == strncasecmp (param, rn[i].name, rn[i].length))
533 {
534 l = rn[i].length;
535 regno = rn[i].regno;
536 }
537 param += l;
538 }
539
540 if (!use_dd2
541 && arg == A_H)
542 {
543 if (regno == 11)
544 as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher."));
545 else if (regno == 12)
546 as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher."));
547 }
548
549 if (regno < 128)
550 {
551 insn->opcode |= regno << arg_encode[arg].pos;
552 if ((!saw_prefix && syntax_reg == 1)
553 || (saw_prefix && syntax_reg == 2))
554 syntax_reg |= 4;
555 syntax_reg |= saw_prefix ? 1 : 2;
556 return param;
557 }
558
559 if (accept_expr)
560 {
561 char *save_ptr;
562 expressionS ex;
563 save_ptr = input_line_pointer;
564 input_line_pointer = (char *)param;
565 expression (&ex);
566 param = input_line_pointer;
567 input_line_pointer = save_ptr;
568 if (ex.X_op == O_register || ex.X_op == O_constant)
569 {
570 insn->opcode |= ex.X_add_number << arg_encode[arg].pos;
571 return param;
572 }
573 }
574 return 0;
575 }
576
577 static const char *
578 get_imm (const char *param, struct spu_insn *insn, int arg)
579 {
580 int val;
581 char *save_ptr;
582 int low = 0, high = 0;
583 int reloc_i = insn->reloc_arg[0] >= 0 ? 1 : 0;
584
585 if (strncmp (param, "%lo(", 4) == 0)
586 {
587 param += 3;
588 low = 1;
589 as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l."));
590 }
591 else if (strncmp (param, "%hi(", 4) == 0)
592 {
593 param += 3;
594 high = 1;
595 as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h."));
596 }
597 else if (strncmp (param, "%pic(", 5) == 0)
598 {
599 /* Currently we expect %pic(expr) == expr, so do nothing here.
600 * i.e. for code loaded at address 0 $toc will be 0. */
601 param += 4;
602 }
603
604 if (*param == '$')
605 {
606 /* Symbols can start with $, but if this symbol matches a register
607 * name, it's probably a mistake. The only way to avoid this
608 * warning is to rename the symbol. */
609 struct spu_insn tmp_insn;
610 const char *np = get_reg (param, &tmp_insn, arg, 0);
611
612 if (np)
613 syntax_error_param = np;
614 }
615
616 save_ptr = input_line_pointer;
617 input_line_pointer = (char *) param;
618 expression (&insn->exp[reloc_i]);
619 param = input_line_pointer;
620 input_line_pointer = save_ptr;
621
622 /* Similar to ppc_elf_suffix in tc-ppc.c. We have so few cases to
623 * handle we do it inlined here. */
624 if (param[0] == '@' && !ISALNUM (param[2]) && param[2] != '@')
625 {
626 if (param[1] == 'h' || param[1] == 'H')
627 {
628 high = 1;
629 param += 2;
630 }
631 else if (param[1] == 'l' || param[1] == 'L')
632 {
633 low = 1;
634 param += 2;
635 }
636 }
637
638 val = insn->exp[reloc_i].X_add_number;
639
640 if (insn->exp[reloc_i].X_op == O_constant)
641 {
642 if (emulate_apuasm)
643 {
644 /* Convert the value to a format we expect. */
645 val <<= arg_encode[arg].rshift;
646 if (arg == A_U7A)
647 val = 173 - val;
648 else if (arg == A_U7B)
649 val = 155 - val;
650 }
651
652 if (high)
653 val = val >> 16;
654 else if (low)
655 val = val & 0xffff;
656
657 /* Warn about out of range expressions. */
658 {
659 int hi = arg_encode[arg].hi;
660 int lo = arg_encode[arg].lo;
661 int whi = arg_encode[arg].whi;
662 int wlo = arg_encode[arg].wlo;
663
664 if (hi > lo && (val < lo || val > hi))
665 as_fatal (_("Constant expression %d out of range, [%d, %d]."),
666 val, lo, hi);
667 else if (whi > wlo && (val < wlo || val > whi))
668 as_warn (_("Constant expression %d out of range, [%d, %d]."),
669 val, wlo, whi);
670 }
671
672 if (arg == A_U7A)
673 val = 173 - val;
674 else if (arg == A_U7B)
675 val = 155 - val;
676
677 /* Branch hints have a split encoding. Do the bottom part. */
678 if (arg == A_S11 || arg == A_S11I)
679 insn->opcode |= ((val >> 2) & 0x7f);
680
681 insn->opcode |= (((val >> arg_encode[arg].rshift)
682 & ((1 << arg_encode[arg].size) - 1))
683 << arg_encode[arg].pos);
684 insn->reloc_arg[reloc_i] = -1;
685 insn->flag[reloc_i] = 0;
686 }
687 else
688 {
689 insn->reloc_arg[reloc_i] = arg;
690 if (high)
691 insn->flag[reloc_i] |= 1;
692 if (low)
693 insn->flag[reloc_i] |= 2;
694 }
695
696 return param;
697 }
698
699 #define MAX_LITTLENUMS 6
700
701 /* Turn a string in input_line_pointer into a floating point constant of type
702 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
703 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
704 */
705 char *
706 md_atof (int type, char *litP, int *sizeP)
707 {
708 int prec;
709 LITTLENUM_TYPE words[MAX_LITTLENUMS];
710 LITTLENUM_TYPE *wordP;
711 char *t;
712
713 switch (type)
714 {
715 case 'f':
716 case 'F':
717 case 's':
718 case 'S':
719 prec = 2;
720 break;
721
722 case 'd':
723 case 'D':
724 case 'r':
725 case 'R':
726 prec = 4;
727 break;
728
729 case 'x':
730 case 'X':
731 prec = 6;
732 break;
733
734 case 'p':
735 case 'P':
736 prec = 6;
737 break;
738
739 default:
740 *sizeP = 0;
741 return _("Bad call to MD_ATOF()");
742 }
743 t = atof_ieee (input_line_pointer, type, words);
744 if (t)
745 input_line_pointer = t;
746
747 *sizeP = prec * sizeof (LITTLENUM_TYPE);
748 for (wordP = words; prec--;)
749 {
750 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
751 litP += sizeof (LITTLENUM_TYPE);
752 }
753 return 0;
754 }
755
756 #ifndef WORKING_DOT_WORD
757 int md_short_jump_size = 4;
758
759 void
760 md_create_short_jump (char *ptr,
761 addressT from_addr ATTRIBUTE_UNUSED,
762 addressT to_addr ATTRIBUTE_UNUSED,
763 fragS *frag,
764 symbolS *to_symbol)
765 {
766 ptr[0] = (char) 0xc0;
767 ptr[1] = 0x00;
768 ptr[2] = 0x00;
769 ptr[3] = 0x00;
770 fix_new (frag,
771 ptr - frag->fr_literal,
772 4,
773 to_symbol,
774 (offsetT) 0,
775 0,
776 BFD_RELOC_SPU_PCREL16);
777 }
778
779 int md_long_jump_size = 4;
780
781 void
782 md_create_long_jump (char *ptr,
783 addressT from_addr ATTRIBUTE_UNUSED,
784 addressT to_addr ATTRIBUTE_UNUSED,
785 fragS *frag,
786 symbolS *to_symbol)
787 {
788 ptr[0] = (char) 0xc0;
789 ptr[1] = 0x00;
790 ptr[2] = 0x00;
791 ptr[3] = 0x00;
792 fix_new (frag,
793 ptr - frag->fr_literal,
794 4,
795 to_symbol,
796 (offsetT) 0,
797 0,
798 BFD_RELOC_SPU_PCREL16);
799 }
800 #endif
801
802 int
803 md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
804 segT segment_type ATTRIBUTE_UNUSED)
805 {
806 as_fatal (_("Relaxation should never occur"));
807 return -1;
808 }
809
810 /* If while processing a fixup, a reloc really needs to be created,
811 then it is done here. */
812
813 arelent *
814 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
815 {
816 arelent *reloc;
817 reloc = (arelent *) xmalloc (sizeof (arelent));
818 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
819 if (fixp->fx_addsy)
820 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
821 else if (fixp->fx_subsy)
822 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
823 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
824 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
825 if (reloc->howto == (reloc_howto_type *) NULL)
826 {
827 as_bad_where (fixp->fx_file, fixp->fx_line,
828 _("reloc %d not supported by object file format"),
829 (int) fixp->fx_r_type);
830 return NULL;
831 }
832 reloc->addend = fixp->fx_addnumber;
833 return reloc;
834 }
835
836 /* Round up a section's size to the appropriate boundary. */
837
838 valueT
839 md_section_align (segT seg, valueT size)
840 {
841 int align = bfd_get_section_alignment (stdoutput, seg);
842 valueT mask = ((valueT) 1 << align) - 1;
843
844 return (size + mask) & ~mask;
845 }
846
847 /* Where a PC relative offset is calculated from. On the spu they
848 are calculated from the beginning of the branch instruction. */
849
850 long
851 md_pcrel_from (fixS *fixp)
852 {
853 return fixp->fx_frag->fr_address + fixp->fx_where;
854 }
855
856 /* Fill in rs_align_code fragments. */
857
858 void
859 spu_handle_align (fragS *fragp)
860 {
861 static const unsigned char nop_pattern[8] = {
862 0x40, 0x20, 0x00, 0x00, /* even nop */
863 0x00, 0x20, 0x00, 0x00, /* odd nop */
864 };
865
866 int bytes;
867 char *p;
868
869 if (fragp->fr_type != rs_align_code)
870 return;
871
872 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
873 p = fragp->fr_literal + fragp->fr_fix;
874
875 if (bytes & 3)
876 {
877 int fix = bytes & 3;
878 memset (p, 0, fix);
879 p += fix;
880 bytes -= fix;
881 fragp->fr_fix += fix;
882 }
883 if (bytes & 4)
884 {
885 memcpy (p, &nop_pattern[4], 4);
886 p += 4;
887 bytes -= 4;
888 fragp->fr_fix += 4;
889 }
890
891 memcpy (p, nop_pattern, 8);
892 fragp->fr_var = 8;
893 }
894
895 void
896 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
897 {
898 unsigned int res;
899 valueT val = *valP;
900 char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
901
902 if (fixP->fx_subsy != (symbolS *) NULL)
903 {
904 /* We can't actually support subtracting a symbol. */
905 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
906 }
907
908 if (fixP->fx_addsy != NULL)
909 {
910 if (fixP->fx_pcrel)
911 {
912 /* Hack around bfd_install_relocation brain damage. */
913 val += fixP->fx_frag->fr_address + fixP->fx_where;
914
915 switch (fixP->fx_r_type)
916 {
917 case BFD_RELOC_32:
918 fixP->fx_r_type = BFD_RELOC_32_PCREL;
919 break;
920
921 case BFD_RELOC_SPU_PCREL16:
922 case BFD_RELOC_SPU_PCREL9a:
923 case BFD_RELOC_SPU_PCREL9b:
924 case BFD_RELOC_32_PCREL:
925 break;
926
927 default:
928 as_bad_where (fixP->fx_file, fixP->fx_line,
929 _("expression too complex"));
930 break;
931 }
932 }
933 }
934
935 fixP->fx_addnumber = val;
936
937 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
938 {
939 fixP->fx_done = 1;
940 res = 0;
941 if (fixP->tc_fix_data > A_P)
942 {
943 int hi = arg_encode[fixP->tc_fix_data].hi;
944 int lo = arg_encode[fixP->tc_fix_data].lo;
945 if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
946 as_bad_where (fixP->fx_file, fixP->fx_line,
947 "Relocation doesn't fit. (relocation value = 0x%lx)",
948 (long) val);
949 }
950
951 switch (fixP->fx_r_type)
952 {
953 case BFD_RELOC_8:
954 md_number_to_chars (place, val, 1);
955 return;
956
957 case BFD_RELOC_16:
958 md_number_to_chars (place, val, 2);
959 return;
960
961 case BFD_RELOC_32:
962 md_number_to_chars (place, val, 4);
963 return;
964
965 case BFD_RELOC_64:
966 md_number_to_chars (place, val, 8);
967 return;
968
969 case BFD_RELOC_SPU_IMM7:
970 res = (val & 0x7f) << 14;
971 break;
972
973 case BFD_RELOC_SPU_IMM8:
974 res = (val & 0xff) << 14;
975 break;
976
977 case BFD_RELOC_SPU_IMM10:
978 res = (val & 0x3ff) << 14;
979 break;
980
981 case BFD_RELOC_SPU_IMM10W:
982 res = (val & 0x3ff0) << 10;
983 break;
984
985 case BFD_RELOC_SPU_IMM16:
986 res = (val & 0xffff) << 7;
987 break;
988
989 case BFD_RELOC_SPU_IMM16W:
990 res = (val & 0x3fffc) << 5;
991 break;
992
993 case BFD_RELOC_SPU_IMM18:
994 res = (val & 0x3ffff) << 7;
995 break;
996
997 case BFD_RELOC_SPU_PCREL9a:
998 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 14);
999 break;
1000
1001 case BFD_RELOC_SPU_PCREL9b:
1002 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 5);
1003 break;
1004
1005 case BFD_RELOC_SPU_PCREL16:
1006 res = (val & 0x3fffc) << 5;
1007 break;
1008
1009 default:
1010 as_bad_where (fixP->fx_file, fixP->fx_line,
1011 _("reloc %d not supported by object file format"),
1012 (int) fixP->fx_r_type);
1013 }
1014
1015 if (res != 0)
1016 {
1017 place[0] |= (res >> 24) & 0xff;
1018 place[1] |= (res >> 16) & 0xff;
1019 place[2] |= (res >> 8) & 0xff;
1020 place[3] |= (res) & 0xff;
1021 }
1022 }
1023 }
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