PR gas/12390
[deliverable/binutils-gdb.git] / gas / doc / c-avr.texi
1 @c Copyright 2006, 2007, 2008, 2009, 2011
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
5
6 @ifset GENERIC
7 @page
8 @node AVR-Dependent
9 @chapter AVR Dependent Features
10 @end ifset
11
12 @ifclear GENERIC
13 @node Machine Dependencies
14 @chapter AVR Dependent Features
15 @end ifclear
16
17 @cindex AVR support
18 @menu
19 * AVR Options:: Options
20 * AVR Syntax:: Syntax
21 * AVR Opcodes:: Opcodes
22 @end menu
23
24 @node AVR Options
25 @section Options
26 @cindex AVR options (none)
27 @cindex options for AVR (none)
28
29 @table @code
30
31 @cindex @code{-mmcu=} command line option, AVR
32 @item -mmcu=@var{mcu}
33 Specify ATMEL AVR instruction set or MCU type.
34
35 Instruction set avr1 is for the minimal AVR core, not supported by the C
36 compiler, only for assembler programs (MCU types: at90s1200,
37 attiny11, attiny12, attiny15, attiny28).
38
39 Instruction set avr2 (default) is for the classic AVR core with up to
40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
42 at90s8535).
43
44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
46 attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
47 attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
48 attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
49 at86rf401, ata6289).
50
51 Instruction set avr3 is for the classic AVR core with up to 128K program
52 memory space (MCU types: at43usb355, at76c711).
53
54 Instruction set avr31 is for the classic AVR core with exactly 128K program
55 memory space (MCU types: atmega103, at43usb320).
56
57 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
58 instructions (MCU types: attiny167, at90usb82, at90usb162, atmega8u2,
59 atmega16u2, atmega32u2).
60
61 Instruction set avr4 is for the enhanced AVR core with up to 8K program
62 memory space (MCU types: atmega48, atmega48a, atmega48p, atmega8, atmega88,
63 atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, atmega8hva, at90pwm1,
64 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
65
66 Instruction set avr5 is for the enhanced AVR core with up to 128K program
67 memory space (MCU types: atmega16, atmega16a, atmega161, atmega162, atmega163,
68 atmega164a, atmega164p, atmega165, atmega165a, atmega165p, atmega168,
69 atmega168a, atmega168p, atmega169, atmega169a, atmega169p, atmega169pa,
70 atmega32, atmega323, atmega324a, atmega324p, atmega325, atmega325a, atmega325p,
71 atmega3250, atmega3250a, atmega3250p, atmega328, atmega328p, atmega329,
72 atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
73 atmega406, atmega64, atmega640, atmega644, atmega644a, atmega644p, atmega644pa,
74 atmega645, atmega645a, atmega645p, atmega6450, atmega6450a, atmega6450p,
75 atmega649, atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
76 atmega16hva, atmega16hva2, atmega16hvb, atmega32hvb, atmega64hve, at90can32,
77 at90can64, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1,
78 atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646,
79 at90usb647, at94k, at90scr100).
80
81 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
82 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
83 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000).
84
85 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
86 atmega2560, atmega2561).
87
88 @cindex @code{-mall-opcodes} command line option, AVR
89 @item -mall-opcodes
90 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
91
92 @cindex @code{-mno-skip-bug} command line option, AVR
93 @item -mno-skip-bug
94 This option disable warnings for skipping two-word instructions.
95
96 @cindex @code{-mno-wrap} command line option, AVR
97 @item -mno-wrap
98 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
99
100 @end table
101
102
103 @node AVR Syntax
104 @section Syntax
105 @menu
106 * AVR-Chars:: Special Characters
107 * AVR-Regs:: Register Names
108 * AVR-Modifiers:: Relocatable Expression Modifiers
109 @end menu
110
111 @node AVR-Chars
112 @subsection Special Characters
113
114 @cindex line comment character, AVR
115 @cindex AVR line comment character
116
117 The presence of a @samp{;} anywhere on a line indicates the start of a
118 comment that extends to the end of that line.
119
120 If a @samp{#} appears as the first character of a line, the whole line
121 is treated as a comment, but in this case the line can also be a
122 logical line number directive (@pxref{Comments}) or a preprocessor
123 control command (@pxref{Preprocessing}).
124
125 @cindex line separator, AVR
126 @cindex statement separator, AVR
127 @cindex AVR line separator
128
129 The @samp{$} character can be used instead of a newline to separate
130 statements.
131
132 @node AVR-Regs
133 @subsection Register Names
134
135 @cindex AVR register names
136 @cindex register names, AVR
137
138 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
139 @samp{r1}, ... @samp{r31}.
140 Six of the 32 registers can be used as three 16-bit indirect address
141 register pointers for Data Space addressing. One of the these address
142 pointers can also be used as an address pointer for look up tables in
143 Flash program memory. These added function registers are the 16-bit
144 @samp{X}, @samp{Y} and @samp{Z} - registers.
145
146 @smallexample
147 X = @r{r26:r27}
148 Y = @r{r28:r29}
149 Z = @r{r30:r31}
150 @end smallexample
151
152 @node AVR-Modifiers
153 @subsection Relocatable Expression Modifiers
154
155 @cindex AVR modifiers
156 @cindex syntax, AVR
157
158 The assembler supports several modifiers when using relocatable addresses
159 in AVR instruction operands. The general syntax is the following:
160
161 @smallexample
162 modifier(relocatable-expression)
163 @end smallexample
164
165 @table @code
166 @cindex symbol modifiers
167
168 @item lo8
169
170 This modifier allows you to use bits 0 through 7 of
171 an address expression as 8 bit relocatable expression.
172
173 @item hi8
174
175 This modifier allows you to use bits 7 through 15 of an address expression
176 as 8 bit relocatable expression. This is useful with, for example, the
177 AVR @samp{ldi} instruction and @samp{lo8} modifier.
178
179 For example
180
181 @smallexample
182 ldi r26, lo8(sym+10)
183 ldi r27, hi8(sym+10)
184 @end smallexample
185
186 @item hh8
187
188 This modifier allows you to use bits 16 through 23 of
189 an address expression as 8 bit relocatable expression.
190 Also, can be useful for loading 32 bit constants.
191
192 @item hlo8
193
194 Synonym of @samp{hh8}.
195
196 @item hhi8
197
198 This modifier allows you to use bits 24 through 31 of
199 an expression as 8 bit expression. This is useful with, for example, the
200 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
201 @samp{hhi8}, modifier.
202
203 For example
204
205 @smallexample
206 ldi r26, lo8(285774925)
207 ldi r27, hi8(285774925)
208 ldi r28, hlo8(285774925)
209 ldi r29, hhi8(285774925)
210 ; r29,r28,r27,r26 = 285774925
211 @end smallexample
212
213 @item pm_lo8
214
215 This modifier allows you to use bits 0 through 7 of
216 an address expression as 8 bit relocatable expression.
217 This modifier useful for addressing data or code from
218 Flash/Program memory. The using of @samp{pm_lo8} similar
219 to @samp{lo8}.
220
221 @item pm_hi8
222
223 This modifier allows you to use bits 8 through 15 of
224 an address expression as 8 bit relocatable expression.
225 This modifier useful for addressing data or code from
226 Flash/Program memory.
227
228 @item pm_hh8
229
230 This modifier allows you to use bits 15 through 23 of
231 an address expression as 8 bit relocatable expression.
232 This modifier useful for addressing data or code from
233 Flash/Program memory.
234
235 @end table
236
237 @node AVR Opcodes
238 @section Opcodes
239
240 @cindex AVR opcode summary
241 @cindex opcode summary, AVR
242 @cindex mnemonics, AVR
243 @cindex instruction summary, AVR
244 For detailed information on the AVR machine instruction set, see
245 @url{www.atmel.com/products/AVR}.
246
247 @code{@value{AS}} implements all the standard AVR opcodes.
248 The following table summarizes the AVR opcodes, and their arguments.
249
250 @smallexample
251 @i{Legend:}
252 r @r{any register}
253 d @r{`ldi' register (r16-r31)}
254 v @r{`movw' even register (r0, r2, ..., r28, r30)}
255 a @r{`fmul' register (r16-r23)}
256 w @r{`adiw' register (r24,r26,r28,r30)}
257 e @r{pointer registers (X,Y,Z)}
258 b @r{base pointer register and displacement ([YZ]+disp)}
259 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
260 M @r{immediate value from 0 to 255}
261 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
262 s @r{immediate value from 0 to 7}
263 P @r{Port address value from 0 to 63. (in, out)}
264 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
265 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
266 i @r{immediate value}
267 l @r{signed pc relative offset from -64 to 63}
268 L @r{signed pc relative offset from -2048 to 2047}
269 h @r{absolute code address (call, jmp)}
270 S @r{immediate value from 0 to 7 (S = s << 4)}
271 ? @r{use this opcode entry if no parameters, else use next opcode entry}
272
273 1001010010001000 clc
274 1001010011011000 clh
275 1001010011111000 cli
276 1001010010101000 cln
277 1001010011001000 cls
278 1001010011101000 clt
279 1001010010111000 clv
280 1001010010011000 clz
281 1001010000001000 sec
282 1001010001011000 seh
283 1001010001111000 sei
284 1001010000101000 sen
285 1001010001001000 ses
286 1001010001101000 set
287 1001010000111000 sev
288 1001010000011000 sez
289 100101001SSS1000 bclr S
290 100101000SSS1000 bset S
291 1001010100001001 icall
292 1001010000001001 ijmp
293 1001010111001000 lpm ?
294 1001000ddddd010+ lpm r,z
295 1001010111011000 elpm ?
296 1001000ddddd011+ elpm r,z
297 0000000000000000 nop
298 1001010100001000 ret
299 1001010100011000 reti
300 1001010110001000 sleep
301 1001010110011000 break
302 1001010110101000 wdr
303 1001010111101000 spm
304 000111rdddddrrrr adc r,r
305 000011rdddddrrrr add r,r
306 001000rdddddrrrr and r,r
307 000101rdddddrrrr cp r,r
308 000001rdddddrrrr cpc r,r
309 000100rdddddrrrr cpse r,r
310 001001rdddddrrrr eor r,r
311 001011rdddddrrrr mov r,r
312 100111rdddddrrrr mul r,r
313 001010rdddddrrrr or r,r
314 000010rdddddrrrr sbc r,r
315 000110rdddddrrrr sub r,r
316 001001rdddddrrrr clr r
317 000011rdddddrrrr lsl r
318 000111rdddddrrrr rol r
319 001000rdddddrrrr tst r
320 0111KKKKddddKKKK andi d,M
321 0111KKKKddddKKKK cbr d,n
322 1110KKKKddddKKKK ldi d,M
323 11101111dddd1111 ser d
324 0110KKKKddddKKKK ori d,M
325 0110KKKKddddKKKK sbr d,M
326 0011KKKKddddKKKK cpi d,M
327 0100KKKKddddKKKK sbci d,M
328 0101KKKKddddKKKK subi d,M
329 1111110rrrrr0sss sbrc r,s
330 1111111rrrrr0sss sbrs r,s
331 1111100ddddd0sss bld r,s
332 1111101ddddd0sss bst r,s
333 10110PPdddddPPPP in r,P
334 10111PPrrrrrPPPP out P,r
335 10010110KKddKKKK adiw w,K
336 10010111KKddKKKK sbiw w,K
337 10011000pppppsss cbi p,s
338 10011010pppppsss sbi p,s
339 10011001pppppsss sbic p,s
340 10011011pppppsss sbis p,s
341 111101lllllll000 brcc l
342 111100lllllll000 brcs l
343 111100lllllll001 breq l
344 111101lllllll100 brge l
345 111101lllllll101 brhc l
346 111100lllllll101 brhs l
347 111101lllllll111 brid l
348 111100lllllll111 brie l
349 111100lllllll000 brlo l
350 111100lllllll100 brlt l
351 111100lllllll010 brmi l
352 111101lllllll001 brne l
353 111101lllllll010 brpl l
354 111101lllllll000 brsh l
355 111101lllllll110 brtc l
356 111100lllllll110 brts l
357 111101lllllll011 brvc l
358 111100lllllll011 brvs l
359 111101lllllllsss brbc s,l
360 111100lllllllsss brbs s,l
361 1101LLLLLLLLLLLL rcall L
362 1100LLLLLLLLLLLL rjmp L
363 1001010hhhhh111h call h
364 1001010hhhhh110h jmp h
365 1001010rrrrr0101 asr r
366 1001010rrrrr0000 com r
367 1001010rrrrr1010 dec r
368 1001010rrrrr0011 inc r
369 1001010rrrrr0110 lsr r
370 1001010rrrrr0001 neg r
371 1001000rrrrr1111 pop r
372 1001001rrrrr1111 push r
373 1001010rrrrr0111 ror r
374 1001010rrrrr0010 swap r
375 00000001ddddrrrr movw v,v
376 00000010ddddrrrr muls d,d
377 000000110ddd0rrr mulsu a,a
378 000000110ddd1rrr fmul a,a
379 000000111ddd0rrr fmuls a,a
380 000000111ddd1rrr fmulsu a,a
381 1001001ddddd0000 sts i,r
382 1001000ddddd0000 lds r,i
383 10o0oo0dddddbooo ldd r,b
384 100!000dddddee-+ ld r,e
385 10o0oo1rrrrrbooo std b,r
386 100!001rrrrree-+ st e,r
387 1001010100011001 eicall
388 1001010000011001 eijmp
389 @end smallexample
This page took 0.040466 seconds and 5 git commands to generate.