Add support for 64-bit ARM architecture: AArch64
[deliverable/binutils-gdb.git] / gas / testsuite / gas / aarch64 / neon-ins.s
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2
3 .macro iterate_regs_types macro_name reg
4 .irp index, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
5 .irp regs, 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
6 \macro_name \regs b \index \reg
7 .endr
8 .endr
9
10 .irp index, 0,1,2,3,4,5,6,7
11 .irp regs, 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
12 \macro_name \regs h \index \reg
13 .endr
14 .endr
15
16 .irp index, 0,1,2,3
17 .irp regs, 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
18 \macro_name \regs s \index \reg
19 .endr
20 .endr
21 .endm
22
23 .macro ins_mov_main reg_num type index xw_reg
24 ins v\reg_num\().\type[\index], \xw_reg\reg_num
25 mov v\reg_num\().\type[\index], \xw_reg\reg_num
26 .endm
27
28 .macro ins_mov_element reg_num type index null
29 ins v\reg_num\().\type[\index], v\reg_num\().\type[\index]
30 mov v\reg_num\().\type[\index], v\reg_num\().\type[\index]
31 .endm
32
33 .text
34 iterate_regs_types macro_name=ins_mov_main reg=w
35 iterate_regs_types macro_name=ins_mov_element
36
37 .irp reg, 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
38 ins v\reg\().d[0], x\reg
39 mov v\reg\().d[0], x\reg
40 ins v\reg\().d[1], x\reg
41 mov v\reg\().d[1], x\reg
42
43 ins v\reg\().d[0], v\reg\().d[1]
44 mov v\reg\().d[0], v\reg\().d[1]
45 ins v\reg\().d[1], v\reg\().d[0]
46 mov v\reg\().d[1], v\reg\().d[0]
47 .endr
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