Add support for 64-bit ARM architecture: AArch64
[deliverable/binutils-gdb.git] / gas / testsuite / gas / aarch64 / no-aliases.d
1 #source: alias.s
2 #objdump: -dr -Mno-aliases
3
4 .*: file format .*
5
6 Disassembly of section \.text:
7
8 0000000000000000 <.*>:
9 0: 13823c20 extr w0, w1, w2, #15
10 4: 93c23c20 extr x0, x1, x2, #15
11 8: 13831c60 extr w0, w3, w3, #7
12 c: 93c51ca0 extr x0, x5, x5, #7
13 10: 138748e6 extr w6, w7, w7, #18
14 14: 93c7a0e6 extr x6, x7, x7, #40
15 18: 1b020c20 madd w0, w1, w2, w3
16 1c: 1b027c20 madd w0, w1, w2, wzr
17 20: 1b027c20 madd w0, w1, w2, wzr
18 24: 9b028c20 msub x0, x1, x2, x3
19 28: 9b02fc20 msub x0, x1, x2, xzr
20 2c: 9b02fc20 msub x0, x1, x2, xzr
21 30: 9b220c20 smaddl x0, w1, w2, x3
22 34: 9b227c20 smaddl x0, w1, w2, xzr
23 38: 9b227c20 smaddl x0, w1, w2, xzr
24 3c: 9b228c20 smsubl x0, w1, w2, x3
25 40: 9b22fc20 smsubl x0, w1, w2, xzr
26 44: 9b22fc20 smsubl x0, w1, w2, xzr
27 48: 9ba20c20 umaddl x0, w1, w2, x3
28 4c: 9ba27c20 umaddl x0, w1, w2, xzr
29 50: 9ba27c20 umaddl x0, w1, w2, xzr
30 54: 9ba28c20 umsubl x0, w1, w2, x3
31 58: 9ba2fc20 umsubl x0, w1, w2, xzr
32 5c: 9ba2fc20 umsubl x0, w1, w2, xzr
33 60: 1a9f0420 csinc w0, w1, wzr, eq
34 64: 1a810420 csinc w0, w1, w1, eq
35 68: 1a810420 csinc w0, w1, w1, eq
36 6c: 1a9f37e0 csinc w0, wzr, wzr, cc
37 70: 1a9f37e0 csinc w0, wzr, wzr, cc
38 74: da9f2020 csinv x0, x1, xzr, cs
39 78: da812020 csinv x0, x1, x1, cs
40 7c: da812020 csinv x0, x1, x1, cs
41 80: da9f43e0 csinv x0, xzr, xzr, mi
42 84: da9f43e0 csinv x0, xzr, xzr, mi
43 88: da9eb7e0 csneg x0, xzr, x30, lt
44 8c: da9eb7c0 csneg x0, x30, x30, lt
45 90: da9eb7c0 csneg x0, x30, x30, lt
46 94: ea020020 ands x0, x1, x2
47 98: ea02003f ands xzr, x1, x2
48 9c: ea02003f ands xzr, x1, x2
49 a0: 6ac27c3f ands wzr, w1, w2, ror #31
50 a4: 6ac27c3f ands wzr, w1, w2, ror #31
51 a8: aa220020 orn x0, x1, x2
52 ac: aa22003f orn xzr, x1, x2
53 b0: aa2203e0 orn x0, xzr, x2
54 b4: aa2203e0 orn x0, xzr, x2
55 b8: 2aa23c3f orn wzr, w1, w2, asr #15
56 bc: 2aa23fe0 orn w0, wzr, w2, asr #15
57 c0: 2aa23fe0 orn w0, wzr, w2, asr #15
58 c4: 0ea11c20 orr v0.8b, v1.8b, v1.8b
59 c8: 0ea21c20 orr v0.8b, v1.8b, v2.8b
60 cc: 0ea11c20 orr v0.8b, v1.8b, v1.8b
61 d0: aa1103e3 orr x3, xzr, x17
62 d4: aa110003 orr x3, x0, x17
63 d8: aa1103e3 orr x3, xzr, x17
64 dc: 92628421 and x1, x1, #0xffffffffc0000000
65 e0: 927ef800 and x0, x0, #0xfffffffffffffffd
66 e4: 121e7800 and w0, w0, #0xfffffffd
67 e8: 721d1f1f ands wzr, w24, #0x7f8
68 ec: 721d1f00 ands w0, w24, #0x7f8
69 f0: 721d1f1f ands wzr, w24, #0x7f8
70 f4: 7100807f subs wzr, w3, #0x20
71 f8: 710083e3 subs w3, wsp, #0x20
72 fc: 7100807f subs wzr, w3, #0x20
73 100: b13ffdff adds xzr, x15, #0xfff
74 104: f13fffef subs x15, sp, #0xfff
75 108: b13ffdff adds xzr, x15, #0xfff
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