2 #as: -mlfence-before-ret=or -mlfence-before-indirect-branch=all
8 Disassembly of section .text:
11 +[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
12 +[a-f0-9]+: 0f ae e8 lfence
13 +[a-f0-9]+: 66 c3 retw
14 +[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
15 +[a-f0-9]+: 0f ae e8 lfence
16 +[a-f0-9]+: 66 c2 14 00 retw \$0x14
17 +[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
18 +[a-f0-9]+: 0f ae e8 lfence
20 +[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
21 +[a-f0-9]+: 0f ae e8 lfence
22 +[a-f0-9]+: c2 1e 00 ret \$0x1e
23 +[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
24 +[a-f0-9]+: 0f ae e8 lfence
25 +[a-f0-9]+: 66 cb lretw
26 +[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
27 +[a-f0-9]+: 0f ae e8 lfence
28 +[a-f0-9]+: 66 ca 28 00 lretw \$0x28
29 +[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
30 +[a-f0-9]+: 0f ae e8 lfence
32 +[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
33 +[a-f0-9]+: 0f ae e8 lfence
34 +[a-f0-9]+: ca 28 00 lret \$0x28