Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are inval...
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-lfence-ret-c.d
1 #source: x86-64-lfence-ret.s
2 #as: -mlfence-before-ret=or -mlfence-before-indirect-branch=all
3 #objdump: -dw -Mintel64
4
5 .*: +file format .*
6
7
8 Disassembly of section .text:
9
10 0+ <_start>:
11 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
12 +[a-f0-9]+: 0f ae e8 lfence
13 +[a-f0-9]+: 66 c3 data16 retq
14 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
15 +[a-f0-9]+: 0f ae e8 lfence
16 +[a-f0-9]+: 66 c2 14 00 data16 retq \$0x14
17 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
18 +[a-f0-9]+: 0f ae e8 lfence
19 +[a-f0-9]+: c3 retq
20 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
21 +[a-f0-9]+: 0f ae e8 lfence
22 +[a-f0-9]+: c2 1e 00 retq \$0x1e
23 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
24 +[a-f0-9]+: 0f ae e8 lfence
25 +[a-f0-9]+: 66 48 c3 data16 rex.W retq
26 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
27 +[a-f0-9]+: 0f ae e8 lfence
28 +[a-f0-9]+: 66 48 c2 28 00 data16 rex.W retq \$0x28
29 #pass
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