gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2018 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "nat/aarch64-linux.h"
  34 #include "nat/aarch64-linux-hw-point.h"
  35
  36 #include "elf/external.h"
  37 #include "elf/common.h"
  38
  39 #include "nat/gdb_ptrace.h"
  40 #include <sys/utsname.h>
  41 #include <asm/ptrace.h>
  42
  43 #include "gregset.h"
  44
  45 /* Defines ps_err_e, struct ps_prochandle.  */
  46 #include "gdb_proc_service.h"
  47
  48 #ifndef TRAP_HWBKPT
  49 #define TRAP_HWBKPT 0x0004
  50 #endif
  51
  52 class aarch64_linux_nat_target final : public linux_nat_target
  53 {
  54 public:
  55   /* Add our register access methods.  */
  56   void fetch_registers (struct regcache *, int) override;
  57   void store_registers (struct regcache *, int) override;
  58
  59   const struct target_desc *read_description () override;
  60
  61   /* Add our hardware breakpoint and watchpoint implementation.  */
  62   int can_use_hw_breakpoint (enum bptype, int, int) override;
  63   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  64   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  65   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  66   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  67                          struct expression *) override;
  68   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  69                          struct expression *) override;
  70   bool stopped_by_watchpoint () override;
  71   bool stopped_data_address (CORE_ADDR *) override;
  72   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  73
  74   int can_do_single_step () override;
  75
  76   /* Override the GNU/Linux inferior startup hook.  */
  77   void post_startup_inferior (ptid_t) override;
  78
  79   /* These three defer to common nat/ code.  */
  80   void low_new_thread (struct lwp_info *lp) override
  81   { aarch64_linux_new_thread (lp); }
  82   void low_delete_thread (struct arch_lwp_info *lp) override
  83   { aarch64_linux_delete_thread (lp); }
  84   void low_prepare_to_resume (struct lwp_info *lp) override
  85   { aarch64_linux_prepare_to_resume (lp); }
  86
  87   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
  88   void low_forget_process (pid_t pid) override;
  89
  90   /* Add our siginfo layout converter.  */
  91   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
  92     override;
  93 };
  94
  95 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
  96
  97 /* Per-process data.  We don't bind this to a per-inferior registry
  98    because of targets like x86 GNU/Linux that need to keep track of
  99    processes that aren't bound to any inferior (e.g., fork children,
 100    checkpoints).  */
 101
 102 struct aarch64_process_info
 103 {
 104   /* Linked list.  */
 105   struct aarch64_process_info *next;
 106
 107   /* The process identifier.  */
 108   pid_t pid;
 109
 110   /* Copy of aarch64 hardware debug registers.  */
 111   struct aarch64_debug_reg_state state;
 112 };
 113
 114 static struct aarch64_process_info *aarch64_process_list = NULL;
 115
 116 /* Find process data for process PID.  */
 117
 118 static struct aarch64_process_info *
 119 aarch64_find_process_pid (pid_t pid)
 120 {
 121   struct aarch64_process_info *proc;
 122
 123   for (proc = aarch64_process_list; proc; proc = proc->next)
 124     if (proc->pid == pid)
 125       return proc;
 126
 127   return NULL;
 128 }
 129
 130 /* Add process data for process PID.  Returns newly allocated info
 131    object.  */
 132
 133 static struct aarch64_process_info *
 134 aarch64_add_process (pid_t pid)
 135 {
 136   struct aarch64_process_info *proc;
 137
 138   proc = XCNEW (struct aarch64_process_info);
 139   proc->pid = pid;
 140
 141   proc->next = aarch64_process_list;
 142   aarch64_process_list = proc;
 143
 144   return proc;
 145 }
 146
 147 /* Get data specific info for process PID, creating it if necessary.
 148    Never returns NULL.  */
 149
 150 static struct aarch64_process_info *
 151 aarch64_process_info_get (pid_t pid)
 152 {
 153   struct aarch64_process_info *proc;
 154
 155   proc = aarch64_find_process_pid (pid);
 156   if (proc == NULL)
 157     proc = aarch64_add_process (pid);
 158
 159   return proc;
 160 }
 161
 162 /* Called whenever GDB is no longer debugging process PID.  It deletes
 163    data structures that keep track of debug register state.  */
 164
 165 void
 166 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 167 {
 168   struct aarch64_process_info *proc, **proc_link;
 169
 170   proc = aarch64_process_list;
 171   proc_link = &aarch64_process_list;
 172
 173   while (proc != NULL)
 174     {
 175       if (proc->pid == pid)
 176         {
 177           *proc_link = proc->next;
 178
 179           xfree (proc);
 180           return;
 181         }
 182
 183       proc_link = &proc->next;
 184       proc = *proc_link;
 185     }
 186 }
 187
 188 /* Get debug registers state for process PID.  */
 189
 190 struct aarch64_debug_reg_state *
 191 aarch64_get_debug_reg_state (pid_t pid)
 192 {
 193   return &aarch64_process_info_get (pid)->state;
 194 }
 195
 196 /* Fill GDB's register array with the general-purpose register values
 197    from the current thread.  */
 198
 199 static void
 200 fetch_gregs_from_thread (struct regcache *regcache)
 201 {
 202   int ret, tid;
 203   struct gdbarch *gdbarch = regcache->arch ();
 204   elf_gregset_t regs;
 205   struct iovec iovec;
 206
 207   /* Make sure REGS can hold all registers contents on both aarch64
 208      and arm.  */
 209   gdb_static_assert (sizeof (regs) >= 18 * 4);
 210
 211   tid = ptid_get_lwp (regcache->ptid ());
 212
 213   iovec.iov_base = &regs;
 214   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 215     iovec.iov_len = 18 * 4;
 216   else
 217     iovec.iov_len = sizeof (regs);
 218
 219   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 220   if (ret < 0)
 221     perror_with_name (_("Unable to fetch general registers."));
 222
 223   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 224     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 225   else
 226     {
 227       int regno;
 228
 229       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 230         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 231     }
 232 }
 233
 234 /* Store to the current thread the valid general-purpose register
 235    values in the GDB's register array.  */
 236
 237 static void
 238 store_gregs_to_thread (const struct regcache *regcache)
 239 {
 240   int ret, tid;
 241   elf_gregset_t regs;
 242   struct iovec iovec;
 243   struct gdbarch *gdbarch = regcache->arch ();
 244
 245   /* Make sure REGS can hold all registers contents on both aarch64
 246      and arm.  */
 247   gdb_static_assert (sizeof (regs) >= 18 * 4);
 248   tid = ptid_get_lwp (regcache->ptid ());
 249
 250   iovec.iov_base = &regs;
 251   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 252     iovec.iov_len = 18 * 4;
 253   else
 254     iovec.iov_len = sizeof (regs);
 255
 256   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 257   if (ret < 0)
 258     perror_with_name (_("Unable to fetch general registers."));
 259
 260   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 261     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 262   else
 263     {
 264       int regno;
 265
 266       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 267         if (REG_VALID == regcache->get_register_status (regno))
 268           regcache_raw_collect (regcache, regno,
 269                                 &regs[regno - AARCH64_X0_REGNUM]);
 270     }
 271
 272   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 273   if (ret < 0)
 274     perror_with_name (_("Unable to store general registers."));
 275 }
 276
 277 /* Fill GDB's register array with the fp/simd register values
 278    from the current thread.  */
 279
 280 static void
 281 fetch_fpregs_from_thread (struct regcache *regcache)
 282 {
 283   int ret, tid;
 284   elf_fpregset_t regs;
 285   struct iovec iovec;
 286   struct gdbarch *gdbarch = regcache->arch ();
 287
 288   /* Make sure REGS can hold all VFP registers contents on both aarch64
 289      and arm.  */
 290   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 291
 292   tid = ptid_get_lwp (regcache->ptid ());
 293
 294   iovec.iov_base = &regs;
 295
 296   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 297     {
 298       iovec.iov_len = VFP_REGS_SIZE;
 299
 300       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 301       if (ret < 0)
 302         perror_with_name (_("Unable to fetch VFP registers."));
 303
 304       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 305     }
 306   else
 307     {
 308       int regno;
 309
 310       iovec.iov_len = sizeof (regs);
 311
 312       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 313       if (ret < 0)
 314         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 315
 316       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 317         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 318
 319       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 320       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 321     }
 322 }
 323
 324 /* Store to the current thread the valid fp/simd register
 325    values in the GDB's register array.  */
 326
 327 static void
 328 store_fpregs_to_thread (const struct regcache *regcache)
 329 {
 330   int ret, tid;
 331   elf_fpregset_t regs;
 332   struct iovec iovec;
 333   struct gdbarch *gdbarch = regcache->arch ();
 334
 335   /* Make sure REGS can hold all VFP registers contents on both aarch64
 336      and arm.  */
 337   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 338   tid = ptid_get_lwp (regcache->ptid ());
 339
 340   iovec.iov_base = &regs;
 341
 342   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 343     {
 344       iovec.iov_len = VFP_REGS_SIZE;
 345
 346       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 347       if (ret < 0)
 348         perror_with_name (_("Unable to fetch VFP registers."));
 349
 350       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 351     }
 352   else
 353     {
 354       int regno;
 355
 356       iovec.iov_len = sizeof (regs);
 357
 358       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 359       if (ret < 0)
 360         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 361
 362       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 363         if (REG_VALID == regcache->get_register_status (regno))
 364           regcache_raw_collect (regcache, regno,
 365                                 (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 366
 367       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 368         regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM,
 369                               (char *) &regs.fpsr);
 370       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 371         regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM,
 372                               (char *) &regs.fpcr);
 373     }
 374
 375   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 376     {
 377       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 378       if (ret < 0)
 379         perror_with_name (_("Unable to store VFP registers."));
 380     }
 381   else
 382     {
 383       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 384       if (ret < 0)
 385         perror_with_name (_("Unable to store FP/SIMD registers."));
 386     }
 387 }
 388
 389 /* Implement the "fetch_registers" target_ops method.  */
 390
 391 void
 392 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 393                                            int regno)
 394 {
 395   if (regno == -1)
 396     {
 397       fetch_gregs_from_thread (regcache);
 398       fetch_fpregs_from_thread (regcache);
 399     }
 400   else if (regno < AARCH64_V0_REGNUM)
 401     fetch_gregs_from_thread (regcache);
 402   else
 403     fetch_fpregs_from_thread (regcache);
 404 }
 405
 406 /* Implement the "store_registers" target_ops method.  */
 407
 408 void
 409 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 410                                            int regno)
 411 {
 412   if (regno == -1)
 413     {
 414       store_gregs_to_thread (regcache);
 415       store_fpregs_to_thread (regcache);
 416     }
 417   else if (regno < AARCH64_V0_REGNUM)
 418     store_gregs_to_thread (regcache);
 419   else
 420     store_fpregs_to_thread (regcache);
 421 }
 422
 423 /* Fill register REGNO (if it is a general-purpose register) in
 424    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 425    do this for all registers.  */
 426
 427 void
 428 fill_gregset (const struct regcache *regcache,
 429               gdb_gregset_t *gregsetp, int regno)
 430 {
 431   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 432                            regno, (gdb_byte *) gregsetp,
 433                            AARCH64_LINUX_SIZEOF_GREGSET);
 434 }
 435
 436 /* Fill GDB's register array with the general-purpose register values
 437    in *GREGSETP.  */
 438
 439 void
 440 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 441 {
 442   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 443                           (const gdb_byte *) gregsetp,
 444                           AARCH64_LINUX_SIZEOF_GREGSET);
 445 }
 446
 447 /* Fill register REGNO (if it is a floating-point register) in
 448    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 449    do this for all registers.  */
 450
 451 void
 452 fill_fpregset (const struct regcache *regcache,
 453                gdb_fpregset_t *fpregsetp, int regno)
 454 {
 455   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 456                            regno, (gdb_byte *) fpregsetp,
 457                            AARCH64_LINUX_SIZEOF_FPREGSET);
 458 }
 459
 460 /* Fill GDB's register array with the floating-point register values
 461    in *FPREGSETP.  */
 462
 463 void
 464 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 465 {
 466   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 467                           (const gdb_byte *) fpregsetp,
 468                           AARCH64_LINUX_SIZEOF_FPREGSET);
 469 }
 470
 471 /* linux_nat_new_fork hook.   */
 472
 473 void
 474 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 475                                         pid_t child_pid)
 476 {
 477   pid_t parent_pid;
 478   struct aarch64_debug_reg_state *parent_state;
 479   struct aarch64_debug_reg_state *child_state;
 480
 481   /* NULL means no watchpoint has ever been set in the parent.  In
 482      that case, there's nothing to do.  */
 483   if (parent->arch_private == NULL)
 484     return;
 485
 486   /* GDB core assumes the child inherits the watchpoints/hw
 487      breakpoints of the parent, and will remove them all from the
 488      forked off process.  Copy the debug registers mirrors into the
 489      new process so that all breakpoints and watchpoints can be
 490      removed together.  */
 491
 492   parent_pid = ptid_get_pid (parent->ptid);
 493   parent_state = aarch64_get_debug_reg_state (parent_pid);
 494   child_state = aarch64_get_debug_reg_state (child_pid);
 495   *child_state = *parent_state;
 496 }
 497 \f
 498
 499 /* Called by libthread_db.  Returns a pointer to the thread local
 500    storage (or its descriptor).  */
 501
 502 ps_err_e
 503 ps_get_thread_area (struct ps_prochandle *ph,
 504                     lwpid_t lwpid, int idx, void **base)
 505 {
 506   int is_64bit_p
 507     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 508
 509   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 510 }
 511 \f
 512
 513 /* Implement the "post_startup_inferior" target_ops method.  */
 514
 515 void
 516 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 517 {
 518   low_forget_process (ptid_get_pid (ptid));
 519   aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid));
 520   linux_nat_target::post_startup_inferior (ptid);
 521 }
 522
 523 extern struct target_desc *tdesc_arm_with_neon;
 524
 525 /* Implement the "read_description" target_ops method.  */
 526
 527 const struct target_desc *
 528 aarch64_linux_nat_target::read_description ()
 529 {
 530   int ret, tid;
 531   gdb_byte regbuf[VFP_REGS_SIZE];
 532   struct iovec iovec;
 533
 534   tid = ptid_get_lwp (inferior_ptid);
 535
 536   iovec.iov_base = regbuf;
 537   iovec.iov_len = VFP_REGS_SIZE;
 538
 539   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 540   if (ret == 0)
 541     return tdesc_arm_with_neon;
 542   else
 543     return aarch64_read_description ();
 544 }
 545
 546 /* Convert a native/host siginfo object, into/from the siginfo in the
 547    layout of the inferiors' architecture.  Returns true if any
 548    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 549    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 550    INF.  */
 551
 552 bool
 553 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 554                                              int direction)
 555 {
 556   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 557
 558   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 559      object.  */
 560   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 561     {
 562       if (direction == 0)
 563         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 564                                              native);
 565       else
 566         aarch64_siginfo_from_compat_siginfo (native,
 567                                              (struct compat_siginfo *) inf);
 568
 569       return true;
 570     }
 571
 572   return false;
 573 }
 574
 575 /* Returns the number of hardware watchpoints of type TYPE that we can
 576    set.  Value is positive if we can set CNT watchpoints, zero if
 577    setting watchpoints of type TYPE is not supported, and negative if
 578    CNT is more than the maximum number of watchpoints of type TYPE
 579    that we can support.  TYPE is one of bp_hardware_watchpoint,
 580    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 581    CNT is the number of such watchpoints used so far (including this
 582    one).  OTHERTYPE is non-zero if other types of watchpoints are
 583    currently enabled.  */
 584
 585 int
 586 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 587                                                  int cnt, int othertype)
 588 {
 589   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 590       || type == bp_access_watchpoint || type == bp_watchpoint)
 591     {
 592       if (aarch64_num_wp_regs == 0)
 593         return 0;
 594     }
 595   else if (type == bp_hardware_breakpoint)
 596     {
 597       if (aarch64_num_bp_regs == 0)
 598         return 0;
 599     }
 600   else
 601     gdb_assert_not_reached ("unexpected breakpoint type");
 602
 603   /* We always return 1 here because we don't have enough information
 604      about possible overlap of addresses that they want to watch.  As an
 605      extreme example, consider the case where all the watchpoints watch
 606      the same address and the same region length: then we can handle a
 607      virtually unlimited number of watchpoints, due to debug register
 608      sharing implemented via reference counts.  */
 609   return 1;
 610 }
 611
 612 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 613    Return 0 on success, -1 on failure.  */
 614
 615 int
 616 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 617                                                 struct bp_target_info *bp_tgt)
 618 {
 619   int ret;
 620   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 621   int len;
 622   const enum target_hw_bp_type type = hw_execute;
 623   struct aarch64_debug_reg_state *state
 624     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 625
 626   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 627
 628   if (show_debug_regs)
 629     fprintf_unfiltered
 630       (gdb_stdlog,
 631        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 632        (unsigned long) addr, len);
 633
 634   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 635
 636   if (show_debug_regs)
 637     {
 638       aarch64_show_debug_reg_state (state,
 639                                     "insert_hw_breakpoint", addr, len, type);
 640     }
 641
 642   return ret;
 643 }
 644
 645 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 646    Return 0 on success, -1 on failure.  */
 647
 648 int
 649 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 650                                                 struct bp_target_info *bp_tgt)
 651 {
 652   int ret;
 653   CORE_ADDR addr = bp_tgt->placed_address;
 654   int len = 4;
 655   const enum target_hw_bp_type type = hw_execute;
 656   struct aarch64_debug_reg_state *state
 657     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 658
 659   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 660
 661   if (show_debug_regs)
 662     fprintf_unfiltered
 663       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 664        (unsigned long) addr, len);
 665
 666   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 667
 668   if (show_debug_regs)
 669     {
 670       aarch64_show_debug_reg_state (state,
 671                                     "remove_hw_watchpoint", addr, len, type);
 672     }
 673
 674   return ret;
 675 }
 676
 677 /* Implement the "insert_watchpoint" target_ops method.
 678
 679    Insert a watchpoint to watch a memory region which starts at
 680    address ADDR and whose length is LEN bytes.  Watch memory accesses
 681    of the type TYPE.  Return 0 on success, -1 on failure.  */
 682
 683 int
 684 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 685                                              enum target_hw_bp_type type,
 686                                              struct expression *cond)
 687 {
 688   int ret;
 689   struct aarch64_debug_reg_state *state
 690     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 691
 692   if (show_debug_regs)
 693     fprintf_unfiltered (gdb_stdlog,
 694                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 695                         (unsigned long) addr, len);
 696
 697   gdb_assert (type != hw_execute);
 698
 699   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 700
 701   if (show_debug_regs)
 702     {
 703       aarch64_show_debug_reg_state (state,
 704                                     "insert_watchpoint", addr, len, type);
 705     }
 706
 707   return ret;
 708 }
 709
 710 /* Implement the "remove_watchpoint" target_ops method.
 711    Remove a watchpoint that watched the memory region which starts at
 712    address ADDR, whose length is LEN bytes, and for accesses of the
 713    type TYPE.  Return 0 on success, -1 on failure.  */
 714
 715 int
 716 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 717                                              enum target_hw_bp_type type,
 718                                              struct expression *cond)
 719 {
 720   int ret;
 721   struct aarch64_debug_reg_state *state
 722     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 723
 724   if (show_debug_regs)
 725     fprintf_unfiltered (gdb_stdlog,
 726                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 727                         (unsigned long) addr, len);
 728
 729   gdb_assert (type != hw_execute);
 730
 731   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 732
 733   if (show_debug_regs)
 734     {
 735       aarch64_show_debug_reg_state (state,
 736                                     "remove_watchpoint", addr, len, type);
 737     }
 738
 739   return ret;
 740 }
 741
 742 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 743
 744 int
 745 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 746 {
 747   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 748 }
 749
 750 /* Implement the "stopped_data_address" target_ops method.  */
 751
 752 bool
 753 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 754 {
 755   siginfo_t siginfo;
 756   int i, tid;
 757   struct aarch64_debug_reg_state *state;
 758
 759   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 760     return false;
 761
 762   /* This must be a hardware breakpoint.  */
 763   if (siginfo.si_signo != SIGTRAP
 764       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 765     return false;
 766
 767   /* Check if the address matches any watched address.  */
 768   state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 769   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 770     {
 771       const unsigned int offset
 772         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 773       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 774       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 775       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 776       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 777       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 778
 779       if (state->dr_ref_count_wp[i]
 780           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 781           && addr_trap >= addr_watch_aligned
 782           && addr_trap < addr_watch + len)
 783         {
 784           /* ADDR_TRAP reports the first address of the memory range
 785              accessed by the CPU, regardless of what was the memory
 786              range watched.  Thus, a large CPU access that straddles
 787              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 788              ADDR_TRAP that is lower than the
 789              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 790
 791              addr: |   4   |   5   |   6   |   7   |   8   |
 792                                    |---- range watched ----|
 793                    |----------- range accessed ------------|
 794
 795              In this case, ADDR_TRAP will be 4.
 796
 797              To match a watchpoint known to GDB core, we must never
 798              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 799              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 800              positive on kernels older than 4.10.  See PR
 801              external/20207.  */
 802           *addr_p = addr_orig;
 803           return true;
 804         }
 805     }
 806
 807   return false;
 808 }
 809
 810 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 811
 812 bool
 813 aarch64_linux_nat_target::stopped_by_watchpoint ()
 814 {
 815   CORE_ADDR addr;
 816
 817   return stopped_data_address (&addr);
 818 }
 819
 820 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
 821
 822 bool
 823 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
 824                                                         CORE_ADDR start, int length)
 825 {
 826   return start <= addr && start + length - 1 >= addr;
 827 }
 828
 829 /* Implement the "can_do_single_step" target_ops method.  */
 830
 831 int
 832 aarch64_linux_nat_target::can_do_single_step ()
 833 {
 834   return 1;
 835 }
 836
 837 /* Define AArch64 maintenance commands.  */
 838
 839 static void
 840 add_show_debug_regs_command (void)
 841 {
 842   /* A maintenance command to enable printing the internal DRi mirror
 843      variables.  */
 844   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 845                            &show_debug_regs, _("\
 846 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 847 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 848 Use \"on\" to enable, \"off\" to disable.\n\
 849 If enabled, the debug registers values are shown when GDB inserts\n\
 850 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 851 triggers a breakpoint or watchpoint."),
 852                            NULL,
 853                            NULL,
 854                            &maintenance_set_cmdlist,
 855                            &maintenance_show_cmdlist);
 856 }
 857
 858 void
 859 _initialize_aarch64_linux_nat (void)
 860 {
 861   add_show_debug_regs_command ();
 862
 863   /* Register the target.  */
 864   linux_target = &the_aarch64_linux_nat_target;
 865   add_inf_child_target (&the_aarch64_linux_nat_target);
 866 }