gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2021 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "aarch32-tdep.h"
  34 #include "arch/arm.h"
  35 #include "nat/aarch64-linux.h"
  36 #include "nat/aarch64-linux-hw-point.h"
  37 #include "nat/aarch64-sve-linux-ptrace.h"
  38
  39 #include "elf/external.h"
  40 #include "elf/common.h"
  41
  42 #include "nat/gdb_ptrace.h"
  43 #include <sys/utsname.h>
  44 #include <asm/ptrace.h>
  45
  46 #include "gregset.h"
  47 #include "linux-tdep.h"
  48
  49 /* Defines ps_err_e, struct ps_prochandle.  */
  50 #include "gdb_proc_service.h"
  51 #include "arch-utils.h"
  52
  53 #include "arch/aarch64-mte-linux.h"
  54
  55 #include "nat/aarch64-mte-linux-ptrace.h"
  56
  57 #ifndef TRAP_HWBKPT
  58 #define TRAP_HWBKPT 0x0004
  59 #endif
  60
  61 class aarch64_linux_nat_target final : public linux_nat_target
  62 {
  63 public:
  64   /* Add our register access methods.  */
  65   void fetch_registers (struct regcache *, int) override;
  66   void store_registers (struct regcache *, int) override;
  67
  68   const struct target_desc *read_description () override;
  69
  70   /* Add our hardware breakpoint and watchpoint implementation.  */
  71   int can_use_hw_breakpoint (enum bptype, int, int) override;
  72   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  73   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  74   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  75   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  76                          struct expression *) override;
  77   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  78                          struct expression *) override;
  79   bool stopped_by_watchpoint () override;
  80   bool stopped_data_address (CORE_ADDR *) override;
  81   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  82
  83   int can_do_single_step () override;
  84
  85   /* Override the GNU/Linux inferior startup hook.  */
  86   void post_startup_inferior (ptid_t) override;
  87
  88   /* Override the GNU/Linux post attach hook.  */
  89   void post_attach (int pid) override;
  90
  91   /* These three defer to common nat/ code.  */
  92   void low_new_thread (struct lwp_info *lp) override
  93   { aarch64_linux_new_thread (lp); }
  94   void low_delete_thread (struct arch_lwp_info *lp) override
  95   { aarch64_linux_delete_thread (lp); }
  96   void low_prepare_to_resume (struct lwp_info *lp) override
  97   { aarch64_linux_prepare_to_resume (lp); }
  98
  99   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
 100   void low_forget_process (pid_t pid) override;
 101
 102   /* Add our siginfo layout converter.  */
 103   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
 104     override;
 105
 106   struct gdbarch *thread_architecture (ptid_t) override;
 107
 108   bool supports_memory_tagging () override;
 109
 110   /* Read memory allocation tags from memory via PTRACE.  */
 111   bool fetch_memtags (CORE_ADDR address, size_t len,
 112                       gdb::byte_vector &tags, int type) override;
 113
 114   /* Write allocation tags to memory via PTRACE.  */
 115   bool store_memtags (CORE_ADDR address, size_t len,
 116                       const gdb::byte_vector &tags, int type) override;
 117 };
 118
 119 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
 120
 121 /* Per-process data.  We don't bind this to a per-inferior registry
 122    because of targets like x86 GNU/Linux that need to keep track of
 123    processes that aren't bound to any inferior (e.g., fork children,
 124    checkpoints).  */
 125
 126 struct aarch64_process_info
 127 {
 128   /* Linked list.  */
 129   struct aarch64_process_info *next;
 130
 131   /* The process identifier.  */
 132   pid_t pid;
 133
 134   /* Copy of aarch64 hardware debug registers.  */
 135   struct aarch64_debug_reg_state state;
 136 };
 137
 138 static struct aarch64_process_info *aarch64_process_list = NULL;
 139
 140 /* Find process data for process PID.  */
 141
 142 static struct aarch64_process_info *
 143 aarch64_find_process_pid (pid_t pid)
 144 {
 145   struct aarch64_process_info *proc;
 146
 147   for (proc = aarch64_process_list; proc; proc = proc->next)
 148     if (proc->pid == pid)
 149       return proc;
 150
 151   return NULL;
 152 }
 153
 154 /* Add process data for process PID.  Returns newly allocated info
 155    object.  */
 156
 157 static struct aarch64_process_info *
 158 aarch64_add_process (pid_t pid)
 159 {
 160   struct aarch64_process_info *proc;
 161
 162   proc = XCNEW (struct aarch64_process_info);
 163   proc->pid = pid;
 164
 165   proc->next = aarch64_process_list;
 166   aarch64_process_list = proc;
 167
 168   return proc;
 169 }
 170
 171 /* Get data specific info for process PID, creating it if necessary.
 172    Never returns NULL.  */
 173
 174 static struct aarch64_process_info *
 175 aarch64_process_info_get (pid_t pid)
 176 {
 177   struct aarch64_process_info *proc;
 178
 179   proc = aarch64_find_process_pid (pid);
 180   if (proc == NULL)
 181     proc = aarch64_add_process (pid);
 182
 183   return proc;
 184 }
 185
 186 /* Called whenever GDB is no longer debugging process PID.  It deletes
 187    data structures that keep track of debug register state.  */
 188
 189 void
 190 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 191 {
 192   struct aarch64_process_info *proc, **proc_link;
 193
 194   proc = aarch64_process_list;
 195   proc_link = &aarch64_process_list;
 196
 197   while (proc != NULL)
 198     {
 199       if (proc->pid == pid)
 200         {
 201           *proc_link = proc->next;
 202
 203           xfree (proc);
 204           return;
 205         }
 206
 207       proc_link = &proc->next;
 208       proc = *proc_link;
 209     }
 210 }
 211
 212 /* Get debug registers state for process PID.  */
 213
 214 struct aarch64_debug_reg_state *
 215 aarch64_get_debug_reg_state (pid_t pid)
 216 {
 217   return &aarch64_process_info_get (pid)->state;
 218 }
 219
 220 /* Fill GDB's register array with the general-purpose register values
 221    from the current thread.  */
 222
 223 static void
 224 fetch_gregs_from_thread (struct regcache *regcache)
 225 {
 226   int ret, tid;
 227   struct gdbarch *gdbarch = regcache->arch ();
 228   elf_gregset_t regs;
 229   struct iovec iovec;
 230
 231   /* Make sure REGS can hold all registers contents on both aarch64
 232      and arm.  */
 233   gdb_static_assert (sizeof (regs) >= 18 * 4);
 234
 235   tid = regcache->ptid ().lwp ();
 236
 237   iovec.iov_base = &regs;
 238   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 239     iovec.iov_len = 18 * 4;
 240   else
 241     iovec.iov_len = sizeof (regs);
 242
 243   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 244   if (ret < 0)
 245     perror_with_name (_("Unable to fetch general registers."));
 246
 247   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 248     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 249   else
 250     {
 251       int regno;
 252
 253       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 254         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 255     }
 256 }
 257
 258 /* Store to the current thread the valid general-purpose register
 259    values in the GDB's register array.  */
 260
 261 static void
 262 store_gregs_to_thread (const struct regcache *regcache)
 263 {
 264   int ret, tid;
 265   elf_gregset_t regs;
 266   struct iovec iovec;
 267   struct gdbarch *gdbarch = regcache->arch ();
 268
 269   /* Make sure REGS can hold all registers contents on both aarch64
 270      and arm.  */
 271   gdb_static_assert (sizeof (regs) >= 18 * 4);
 272   tid = regcache->ptid ().lwp ();
 273
 274   iovec.iov_base = &regs;
 275   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 276     iovec.iov_len = 18 * 4;
 277   else
 278     iovec.iov_len = sizeof (regs);
 279
 280   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 281   if (ret < 0)
 282     perror_with_name (_("Unable to fetch general registers."));
 283
 284   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 285     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 286   else
 287     {
 288       int regno;
 289
 290       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 291         if (REG_VALID == regcache->get_register_status (regno))
 292           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 293     }
 294
 295   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 296   if (ret < 0)
 297     perror_with_name (_("Unable to store general registers."));
 298 }
 299
 300 /* Fill GDB's register array with the fp/simd register values
 301    from the current thread.  */
 302
 303 static void
 304 fetch_fpregs_from_thread (struct regcache *regcache)
 305 {
 306   int ret, tid;
 307   elf_fpregset_t regs;
 308   struct iovec iovec;
 309   struct gdbarch *gdbarch = regcache->arch ();
 310
 311   /* Make sure REGS can hold all VFP registers contents on both aarch64
 312      and arm.  */
 313   gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
 314
 315   tid = regcache->ptid ().lwp ();
 316
 317   iovec.iov_base = &regs;
 318
 319   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 320     {
 321       iovec.iov_len = ARM_VFP3_REGS_SIZE;
 322
 323       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 324       if (ret < 0)
 325         perror_with_name (_("Unable to fetch VFP registers."));
 326
 327       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 328     }
 329   else
 330     {
 331       int regno;
 332
 333       iovec.iov_len = sizeof (regs);
 334
 335       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 336       if (ret < 0)
 337         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 338
 339       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 340         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 341
 342       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 343       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 344     }
 345 }
 346
 347 /* Store to the current thread the valid fp/simd register
 348    values in the GDB's register array.  */
 349
 350 static void
 351 store_fpregs_to_thread (const struct regcache *regcache)
 352 {
 353   int ret, tid;
 354   elf_fpregset_t regs;
 355   struct iovec iovec;
 356   struct gdbarch *gdbarch = regcache->arch ();
 357
 358   /* Make sure REGS can hold all VFP registers contents on both aarch64
 359      and arm.  */
 360   gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
 361   tid = regcache->ptid ().lwp ();
 362
 363   iovec.iov_base = &regs;
 364
 365   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 366     {
 367       iovec.iov_len = ARM_VFP3_REGS_SIZE;
 368
 369       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 370       if (ret < 0)
 371         perror_with_name (_("Unable to fetch VFP registers."));
 372
 373       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 374     }
 375   else
 376     {
 377       int regno;
 378
 379       iovec.iov_len = sizeof (regs);
 380
 381       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 382       if (ret < 0)
 383         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 384
 385       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 386         if (REG_VALID == regcache->get_register_status (regno))
 387           regcache->raw_collect
 388             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 389
 390       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 391         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 392       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 393         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 394     }
 395
 396   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 397     {
 398       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 399       if (ret < 0)
 400         perror_with_name (_("Unable to store VFP registers."));
 401     }
 402   else
 403     {
 404       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 405       if (ret < 0)
 406         perror_with_name (_("Unable to store FP/SIMD registers."));
 407     }
 408 }
 409
 410 /* Fill GDB's register array with the sve register values
 411    from the current thread.  */
 412
 413 static void
 414 fetch_sveregs_from_thread (struct regcache *regcache)
 415 {
 416   std::unique_ptr<gdb_byte[]> base
 417     = aarch64_sve_get_sveregs (regcache->ptid ().lwp ());
 418   aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ());
 419 }
 420
 421 /* Store to the current thread the valid sve register
 422    values in the GDB's register array.  */
 423
 424 static void
 425 store_sveregs_to_thread (struct regcache *regcache)
 426 {
 427   int ret;
 428   struct iovec iovec;
 429   int tid = regcache->ptid ().lwp ();
 430
 431   /* First store vector length to the thread.  This is done first to ensure the
 432      ptrace buffers read from the kernel are the correct size.  */
 433   if (!aarch64_sve_set_vq (tid, regcache))
 434     perror_with_name (_("Unable to set VG register."));
 435
 436   /* Obtain a dump of SVE registers from ptrace.  */
 437   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
 438
 439   /* Overwrite with regcache state.  */
 440   aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ());
 441
 442   /* Write back to the kernel.  */
 443   iovec.iov_base = base.get ();
 444   iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
 445   ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
 446
 447   if (ret < 0)
 448     perror_with_name (_("Unable to store sve registers"));
 449 }
 450
 451 /* Fill GDB's register array with the pointer authentication mask values from
 452    the current thread.  */
 453
 454 static void
 455 fetch_pauth_masks_from_thread (struct regcache *regcache)
 456 {
 457   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 458   int ret;
 459   struct iovec iovec;
 460   uint64_t pauth_regset[2] = {0, 0};
 461   int tid = regcache->ptid ().lwp ();
 462
 463   iovec.iov_base = &pauth_regset;
 464   iovec.iov_len = sizeof (pauth_regset);
 465
 466   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_PAC_MASK, &iovec);
 467   if (ret != 0)
 468     perror_with_name (_("unable to fetch pauth registers."));
 469
 470   regcache->raw_supply (AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base),
 471                         &pauth_regset[0]);
 472   regcache->raw_supply (AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base),
 473                         &pauth_regset[1]);
 474 }
 475
 476 /* Fill GDB's register array with the MTE register values from
 477    the current thread.  */
 478
 479 static void
 480 fetch_mteregs_from_thread (struct regcache *regcache)
 481 {
 482   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 483   int regno = tdep->mte_reg_base;
 484
 485   gdb_assert (regno != -1);
 486
 487   uint64_t tag_ctl = 0;
 488   struct iovec iovec;
 489
 490   iovec.iov_base = &tag_ctl;
 491   iovec.iov_len = sizeof (tag_ctl);
 492
 493   int tid = get_ptrace_pid (regcache->ptid ());
 494   if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TAGGED_ADDR_CTRL, &iovec) != 0)
 495       perror_with_name (_("unable to fetch MTE registers."));
 496
 497   regcache->raw_supply (regno, &tag_ctl);
 498 }
 499
 500 /* Store to the current thread the valid MTE register set in the GDB's
 501    register array.  */
 502
 503 static void
 504 store_mteregs_to_thread (struct regcache *regcache)
 505 {
 506   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 507   int regno = tdep->mte_reg_base;
 508
 509   gdb_assert (regno != -1);
 510
 511   uint64_t tag_ctl = 0;
 512
 513   if (REG_VALID != regcache->get_register_status (regno))
 514     return;
 515
 516   regcache->raw_collect (regno, (char *) &tag_ctl);
 517
 518   struct iovec iovec;
 519
 520   iovec.iov_base = &tag_ctl;
 521   iovec.iov_len = sizeof (tag_ctl);
 522
 523   int tid = get_ptrace_pid (regcache->ptid ());
 524   if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TAGGED_ADDR_CTRL, &iovec) != 0)
 525     perror_with_name (_("unable to store MTE registers."));
 526 }
 527
 528 /* Implement the "fetch_registers" target_ops method.  */
 529
 530 void
 531 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 532                                            int regno)
 533 {
 534   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 535
 536   if (regno == -1)
 537     {
 538       fetch_gregs_from_thread (regcache);
 539       if (tdep->has_sve ())
 540         fetch_sveregs_from_thread (regcache);
 541       else
 542         fetch_fpregs_from_thread (regcache);
 543
 544       if (tdep->has_pauth ())
 545         fetch_pauth_masks_from_thread (regcache);
 546
 547       if (tdep->has_mte ())
 548         fetch_mteregs_from_thread (regcache);
 549     }
 550   else if (regno < AARCH64_V0_REGNUM)
 551     fetch_gregs_from_thread (regcache);
 552   else if (tdep->has_sve ())
 553     fetch_sveregs_from_thread (regcache);
 554   else
 555     fetch_fpregs_from_thread (regcache);
 556
 557   if (tdep->has_pauth ())
 558     {
 559       if (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
 560           || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))
 561         fetch_pauth_masks_from_thread (regcache);
 562     }
 563
 564   /* Fetch individual MTE registers.  */
 565   if (tdep->has_mte ()
 566       && (regno == tdep->mte_reg_base))
 567     fetch_mteregs_from_thread (regcache);
 568 }
 569
 570 /* Implement the "store_registers" target_ops method.  */
 571
 572 void
 573 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 574                                            int regno)
 575 {
 576   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 577
 578   if (regno == -1)
 579     {
 580       store_gregs_to_thread (regcache);
 581       if (tdep->has_sve ())
 582         store_sveregs_to_thread (regcache);
 583       else
 584         store_fpregs_to_thread (regcache);
 585
 586       if (tdep->has_mte ())
 587         store_mteregs_to_thread (regcache);
 588     }
 589   else if (regno < AARCH64_V0_REGNUM)
 590     store_gregs_to_thread (regcache);
 591   else if (tdep->has_sve ())
 592     store_sveregs_to_thread (regcache);
 593   else
 594     store_fpregs_to_thread (regcache);
 595
 596   /* Store MTE registers.  */
 597   if (tdep->has_mte ()
 598       && (regno == tdep->mte_reg_base))
 599     store_mteregs_to_thread (regcache);
 600 }
 601
 602 /* Fill register REGNO (if it is a general-purpose register) in
 603    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 604    do this for all registers.  */
 605
 606 void
 607 fill_gregset (const struct regcache *regcache,
 608               gdb_gregset_t *gregsetp, int regno)
 609 {
 610   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 611                            regno, (gdb_byte *) gregsetp,
 612                            AARCH64_LINUX_SIZEOF_GREGSET);
 613 }
 614
 615 /* Fill GDB's register array with the general-purpose register values
 616    in *GREGSETP.  */
 617
 618 void
 619 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 620 {
 621   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 622                           (const gdb_byte *) gregsetp,
 623                           AARCH64_LINUX_SIZEOF_GREGSET);
 624 }
 625
 626 /* Fill register REGNO (if it is a floating-point register) in
 627    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 628    do this for all registers.  */
 629
 630 void
 631 fill_fpregset (const struct regcache *regcache,
 632                gdb_fpregset_t *fpregsetp, int regno)
 633 {
 634   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 635                            regno, (gdb_byte *) fpregsetp,
 636                            AARCH64_LINUX_SIZEOF_FPREGSET);
 637 }
 638
 639 /* Fill GDB's register array with the floating-point register values
 640    in *FPREGSETP.  */
 641
 642 void
 643 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 644 {
 645   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 646                           (const gdb_byte *) fpregsetp,
 647                           AARCH64_LINUX_SIZEOF_FPREGSET);
 648 }
 649
 650 /* linux_nat_new_fork hook.   */
 651
 652 void
 653 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 654                                         pid_t child_pid)
 655 {
 656   pid_t parent_pid;
 657   struct aarch64_debug_reg_state *parent_state;
 658   struct aarch64_debug_reg_state *child_state;
 659
 660   /* NULL means no watchpoint has ever been set in the parent.  In
 661      that case, there's nothing to do.  */
 662   if (parent->arch_private == NULL)
 663     return;
 664
 665   /* GDB core assumes the child inherits the watchpoints/hw
 666      breakpoints of the parent, and will remove them all from the
 667      forked off process.  Copy the debug registers mirrors into the
 668      new process so that all breakpoints and watchpoints can be
 669      removed together.  */
 670
 671   parent_pid = parent->ptid.pid ();
 672   parent_state = aarch64_get_debug_reg_state (parent_pid);
 673   child_state = aarch64_get_debug_reg_state (child_pid);
 674   *child_state = *parent_state;
 675 }
 676 \f
 677
 678 /* Called by libthread_db.  Returns a pointer to the thread local
 679    storage (or its descriptor).  */
 680
 681 ps_err_e
 682 ps_get_thread_area (struct ps_prochandle *ph,
 683                     lwpid_t lwpid, int idx, void **base)
 684 {
 685   int is_64bit_p
 686     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 687
 688   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 689 }
 690 \f
 691
 692 /* Implement the "post_startup_inferior" target_ops method.  */
 693
 694 void
 695 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 696 {
 697   low_forget_process (ptid.pid ());
 698   aarch64_linux_get_debug_reg_capacity (ptid.pid ());
 699   linux_nat_target::post_startup_inferior (ptid);
 700 }
 701
 702 /* Implement the "post_attach" target_ops method.  */
 703
 704 void
 705 aarch64_linux_nat_target::post_attach (int pid)
 706 {
 707   low_forget_process (pid);
 708   /* Set the hardware debug register capacity.  If
 709      aarch64_linux_get_debug_reg_capacity is not called
 710      (as it is in aarch64_linux_child_post_startup_inferior) then
 711      software watchpoints will be used instead of hardware
 712      watchpoints when attaching to a target.  */
 713   aarch64_linux_get_debug_reg_capacity (pid);
 714   linux_nat_target::post_attach (pid);
 715 }
 716
 717 /* Implement the "read_description" target_ops method.  */
 718
 719 const struct target_desc *
 720 aarch64_linux_nat_target::read_description ()
 721 {
 722   int ret, tid;
 723   gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
 724   struct iovec iovec;
 725
 726   tid = inferior_ptid.pid ();
 727
 728   iovec.iov_base = regbuf;
 729   iovec.iov_len = ARM_VFP3_REGS_SIZE;
 730
 731   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 732   if (ret == 0)
 733     return aarch32_read_description ();
 734
 735   CORE_ADDR hwcap = linux_get_hwcap (this);
 736   CORE_ADDR hwcap2 = linux_get_hwcap2 (this);
 737
 738   bool pauth_p = hwcap & AARCH64_HWCAP_PACA;
 739   bool mte_p = hwcap2 & HWCAP2_MTE;
 740
 741   return aarch64_read_description (aarch64_sve_get_vq (tid), pauth_p, mte_p);
 742 }
 743
 744 /* Convert a native/host siginfo object, into/from the siginfo in the
 745    layout of the inferiors' architecture.  Returns true if any
 746    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 747    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 748    INF.  */
 749
 750 bool
 751 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 752                                              int direction)
 753 {
 754   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 755
 756   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 757      object.  */
 758   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 759     {
 760       if (direction == 0)
 761         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 762                                              native);
 763       else
 764         aarch64_siginfo_from_compat_siginfo (native,
 765                                              (struct compat_siginfo *) inf);
 766
 767       return true;
 768     }
 769
 770   return false;
 771 }
 772
 773 /* Returns the number of hardware watchpoints of type TYPE that we can
 774    set.  Value is positive if we can set CNT watchpoints, zero if
 775    setting watchpoints of type TYPE is not supported, and negative if
 776    CNT is more than the maximum number of watchpoints of type TYPE
 777    that we can support.  TYPE is one of bp_hardware_watchpoint,
 778    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 779    CNT is the number of such watchpoints used so far (including this
 780    one).  OTHERTYPE is non-zero if other types of watchpoints are
 781    currently enabled.  */
 782
 783 int
 784 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 785                                                  int cnt, int othertype)
 786 {
 787   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 788       || type == bp_access_watchpoint || type == bp_watchpoint)
 789     {
 790       if (aarch64_num_wp_regs == 0)
 791         return 0;
 792     }
 793   else if (type == bp_hardware_breakpoint)
 794     {
 795       if (aarch64_num_bp_regs == 0)
 796         return 0;
 797     }
 798   else
 799     gdb_assert_not_reached ("unexpected breakpoint type");
 800
 801   /* We always return 1 here because we don't have enough information
 802      about possible overlap of addresses that they want to watch.  As an
 803      extreme example, consider the case where all the watchpoints watch
 804      the same address and the same region length: then we can handle a
 805      virtually unlimited number of watchpoints, due to debug register
 806      sharing implemented via reference counts.  */
 807   return 1;
 808 }
 809
 810 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 811    Return 0 on success, -1 on failure.  */
 812
 813 int
 814 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 815                                                 struct bp_target_info *bp_tgt)
 816 {
 817   int ret;
 818   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 819   int len;
 820   const enum target_hw_bp_type type = hw_execute;
 821   struct aarch64_debug_reg_state *state
 822     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 823
 824   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 825
 826   if (show_debug_regs)
 827     fprintf_unfiltered
 828       (gdb_stdlog,
 829        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 830        (unsigned long) addr, len);
 831
 832   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 833
 834   if (show_debug_regs)
 835     {
 836       aarch64_show_debug_reg_state (state,
 837                                     "insert_hw_breakpoint", addr, len, type);
 838     }
 839
 840   return ret;
 841 }
 842
 843 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 844    Return 0 on success, -1 on failure.  */
 845
 846 int
 847 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 848                                                 struct bp_target_info *bp_tgt)
 849 {
 850   int ret;
 851   CORE_ADDR addr = bp_tgt->placed_address;
 852   int len = 4;
 853   const enum target_hw_bp_type type = hw_execute;
 854   struct aarch64_debug_reg_state *state
 855     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 856
 857   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 858
 859   if (show_debug_regs)
 860     fprintf_unfiltered
 861       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 862        (unsigned long) addr, len);
 863
 864   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 865
 866   if (show_debug_regs)
 867     {
 868       aarch64_show_debug_reg_state (state,
 869                                     "remove_hw_watchpoint", addr, len, type);
 870     }
 871
 872   return ret;
 873 }
 874
 875 /* Implement the "insert_watchpoint" target_ops method.
 876
 877    Insert a watchpoint to watch a memory region which starts at
 878    address ADDR and whose length is LEN bytes.  Watch memory accesses
 879    of the type TYPE.  Return 0 on success, -1 on failure.  */
 880
 881 int
 882 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 883                                              enum target_hw_bp_type type,
 884                                              struct expression *cond)
 885 {
 886   int ret;
 887   struct aarch64_debug_reg_state *state
 888     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 889
 890   if (show_debug_regs)
 891     fprintf_unfiltered (gdb_stdlog,
 892                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 893                         (unsigned long) addr, len);
 894
 895   gdb_assert (type != hw_execute);
 896
 897   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 898
 899   if (show_debug_regs)
 900     {
 901       aarch64_show_debug_reg_state (state,
 902                                     "insert_watchpoint", addr, len, type);
 903     }
 904
 905   return ret;
 906 }
 907
 908 /* Implement the "remove_watchpoint" target_ops method.
 909    Remove a watchpoint that watched the memory region which starts at
 910    address ADDR, whose length is LEN bytes, and for accesses of the
 911    type TYPE.  Return 0 on success, -1 on failure.  */
 912
 913 int
 914 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 915                                              enum target_hw_bp_type type,
 916                                              struct expression *cond)
 917 {
 918   int ret;
 919   struct aarch64_debug_reg_state *state
 920     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 921
 922   if (show_debug_regs)
 923     fprintf_unfiltered (gdb_stdlog,
 924                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 925                         (unsigned long) addr, len);
 926
 927   gdb_assert (type != hw_execute);
 928
 929   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 930
 931   if (show_debug_regs)
 932     {
 933       aarch64_show_debug_reg_state (state,
 934                                     "remove_watchpoint", addr, len, type);
 935     }
 936
 937   return ret;
 938 }
 939
 940 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 941
 942 int
 943 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 944 {
 945   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 946 }
 947
 948 /* Implement the "stopped_data_address" target_ops method.  */
 949
 950 bool
 951 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 952 {
 953   siginfo_t siginfo;
 954   int i;
 955   struct aarch64_debug_reg_state *state;
 956
 957   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 958     return false;
 959
 960   /* This must be a hardware breakpoint.  */
 961   if (siginfo.si_signo != SIGTRAP
 962       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 963     return false;
 964
 965   /* Make sure to ignore the top byte, otherwise we may not recognize a
 966      hardware watchpoint hit.  The stopped data addresses coming from the
 967      kernel can potentially be tagged addresses.  */
 968   struct gdbarch *gdbarch = thread_architecture (inferior_ptid);
 969   const CORE_ADDR addr_trap
 970     = address_significant (gdbarch, (CORE_ADDR) siginfo.si_addr);
 971
 972   /* Check if the address matches any watched address.  */
 973   state = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 974   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 975     {
 976       const unsigned int offset
 977         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 978       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 979       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 980       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 981       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 982
 983       if (state->dr_ref_count_wp[i]
 984           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 985           && addr_trap >= addr_watch_aligned
 986           && addr_trap < addr_watch + len)
 987         {
 988           /* ADDR_TRAP reports the first address of the memory range
 989              accessed by the CPU, regardless of what was the memory
 990              range watched.  Thus, a large CPU access that straddles
 991              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 992              ADDR_TRAP that is lower than the
 993              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 994
 995              addr: |   4   |   5   |   6   |   7   |   8   |
 996                                    |---- range watched ----|
 997                    |----------- range accessed ------------|
 998
 999              In this case, ADDR_TRAP will be 4.
1000
1001              To match a watchpoint known to GDB core, we must never
1002              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
1003              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
1004              positive on kernels older than 4.10.  See PR
1005              external/20207.  */
1006           *addr_p = addr_orig;
1007           return true;
1008         }
1009     }
1010
1011   return false;
1012 }
1013
1014 /* Implement the "stopped_by_watchpoint" target_ops method.  */
1015
1016 bool
1017 aarch64_linux_nat_target::stopped_by_watchpoint ()
1018 {
1019   CORE_ADDR addr;
1020
1021   return stopped_data_address (&addr);
1022 }
1023
1024 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
1025
1026 bool
1027 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
1028                                                         CORE_ADDR start, int length)
1029 {
1030   return start <= addr && start + length - 1 >= addr;
1031 }
1032
1033 /* Implement the "can_do_single_step" target_ops method.  */
1034
1035 int
1036 aarch64_linux_nat_target::can_do_single_step ()
1037 {
1038   return 1;
1039 }
1040
1041 /* Implement the "thread_architecture" target_ops method.  */
1042
1043 struct gdbarch *
1044 aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
1045 {
1046   /* Return the gdbarch for the current thread.  If the vector length has
1047      changed since the last time this was called, then do a further lookup.  */
1048
1049   uint64_t vq = aarch64_sve_get_vq (ptid.lwp ());
1050
1051   /* Find the current gdbarch the same way as process_stratum_target.  Only
1052      return it if the current vector length matches the one in the tdep.  */
1053   inferior *inf = find_inferior_ptid (this, ptid);
1054   gdb_assert (inf != NULL);
1055   if (vq == gdbarch_tdep (inf->gdbarch)->vq)
1056     return inf->gdbarch;
1057
1058   /* We reach here if the vector length for the thread is different from its
1059      value at process start.  Lookup gdbarch via info (potentially creating a
1060      new one), stashing the vector length inside id.  Use -1 for when SVE
1061      unavailable, to distinguish from an unset value of 0.  */
1062   struct gdbarch_info info;
1063   info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64);
1064   info.id = (int *) (vq == 0 ? -1 : vq);
1065   return gdbarch_find_by_info (info);
1066 }
1067
1068 /* Implement the "supports_memory_tagging" target_ops method.  */
1069
1070 bool
1071 aarch64_linux_nat_target::supports_memory_tagging ()
1072 {
1073   return (linux_get_hwcap2 (this) & HWCAP2_MTE) != 0;
1074 }
1075
1076 /* Implement the "fetch_memtags" target_ops method.  */
1077
1078 bool
1079 aarch64_linux_nat_target::fetch_memtags (CORE_ADDR address, size_t len,
1080                                          gdb::byte_vector &tags, int type)
1081 {
1082   int tid = get_ptrace_pid (inferior_ptid);
1083
1084   /* Allocation tags?  */
1085   if (type == static_cast<int> (aarch64_memtag_type::mte_allocation))
1086     return aarch64_mte_fetch_memtags (tid, address, len, tags);
1087
1088   return false;
1089 }
1090
1091 /* Implement the "store_memtags" target_ops method.  */
1092
1093 bool
1094 aarch64_linux_nat_target::store_memtags (CORE_ADDR address, size_t len,
1095                                          const gdb::byte_vector &tags, int type)
1096 {
1097   int tid = get_ptrace_pid (inferior_ptid);
1098
1099   /* Allocation tags?  */
1100   if (type == static_cast<int> (aarch64_memtag_type::mte_allocation))
1101     return aarch64_mte_store_memtags (tid, address, len, tags);
1102
1103   return false;
1104 }
1105
1106 /* Define AArch64 maintenance commands.  */
1107
1108 static void
1109 add_show_debug_regs_command (void)
1110 {
1111   /* A maintenance command to enable printing the internal DRi mirror
1112      variables.  */
1113   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
1114                            &show_debug_regs, _("\
1115 Set whether to show variables that mirror the AArch64 debug registers."), _("\
1116 Show whether to show variables that mirror the AArch64 debug registers."), _("\
1117 Use \"on\" to enable, \"off\" to disable.\n\
1118 If enabled, the debug registers values are shown when GDB inserts\n\
1119 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
1120 triggers a breakpoint or watchpoint."),
1121                            NULL,
1122                            NULL,
1123                            &maintenance_set_cmdlist,
1124                            &maintenance_show_cmdlist);
1125 }
1126
1127 void _initialize_aarch64_linux_nat ();
1128 void
1129 _initialize_aarch64_linux_nat ()
1130 {
1131   add_show_debug_regs_command ();
1132
1133   /* Register the target.  */
1134   linux_target = &the_aarch64_linux_nat_target;
1135   add_inf_child_target (&the_aarch64_linux_nat_target);
1136 }