gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2019 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "nat/aarch64-linux.h"
  34 #include "nat/aarch64-linux-hw-point.h"
  35 #include "nat/aarch64-sve-linux-ptrace.h"
  36
  37 #include "elf/external.h"
  38 #include "elf/common.h"
  39
  40 #include "nat/gdb_ptrace.h"
  41 #include <sys/utsname.h>
  42 #include <asm/ptrace.h>
  43
  44 #include "gregset.h"
  45 #include "linux-tdep.h"
  46
  47 /* Defines ps_err_e, struct ps_prochandle.  */
  48 #include "gdb_proc_service.h"
  49 #include "arch-utils.h"
  50
  51 #ifndef TRAP_HWBKPT
  52 #define TRAP_HWBKPT 0x0004
  53 #endif
  54
  55 class aarch64_linux_nat_target final : public linux_nat_target
  56 {
  57 public:
  58   /* Add our register access methods.  */
  59   void fetch_registers (struct regcache *, int) override;
  60   void store_registers (struct regcache *, int) override;
  61
  62   const struct target_desc *read_description () override;
  63
  64   /* Add our hardware breakpoint and watchpoint implementation.  */
  65   int can_use_hw_breakpoint (enum bptype, int, int) override;
  66   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  67   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  68   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  69   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  70                          struct expression *) override;
  71   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  72                          struct expression *) override;
  73   bool stopped_by_watchpoint () override;
  74   bool stopped_data_address (CORE_ADDR *) override;
  75   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  76
  77   int can_do_single_step () override;
  78
  79   /* Override the GNU/Linux inferior startup hook.  */
  80   void post_startup_inferior (ptid_t) override;
  81
  82   /* Override the GNU/Linux post attach hook.  */
  83   void post_attach (int pid) override;
  84
  85   /* These three defer to common nat/ code.  */
  86   void low_new_thread (struct lwp_info *lp) override
  87   { aarch64_linux_new_thread (lp); }
  88   void low_delete_thread (struct arch_lwp_info *lp) override
  89   { aarch64_linux_delete_thread (lp); }
  90   void low_prepare_to_resume (struct lwp_info *lp) override
  91   { aarch64_linux_prepare_to_resume (lp); }
  92
  93   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
  94   void low_forget_process (pid_t pid) override;
  95
  96   /* Add our siginfo layout converter.  */
  97   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
  98     override;
  99
 100   struct gdbarch *thread_architecture (ptid_t) override;
 101 };
 102
 103 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
 104
 105 /* Per-process data.  We don't bind this to a per-inferior registry
 106    because of targets like x86 GNU/Linux that need to keep track of
 107    processes that aren't bound to any inferior (e.g., fork children,
 108    checkpoints).  */
 109
 110 struct aarch64_process_info
 111 {
 112   /* Linked list.  */
 113   struct aarch64_process_info *next;
 114
 115   /* The process identifier.  */
 116   pid_t pid;
 117
 118   /* Copy of aarch64 hardware debug registers.  */
 119   struct aarch64_debug_reg_state state;
 120 };
 121
 122 static struct aarch64_process_info *aarch64_process_list = NULL;
 123
 124 /* Find process data for process PID.  */
 125
 126 static struct aarch64_process_info *
 127 aarch64_find_process_pid (pid_t pid)
 128 {
 129   struct aarch64_process_info *proc;
 130
 131   for (proc = aarch64_process_list; proc; proc = proc->next)
 132     if (proc->pid == pid)
 133       return proc;
 134
 135   return NULL;
 136 }
 137
 138 /* Add process data for process PID.  Returns newly allocated info
 139    object.  */
 140
 141 static struct aarch64_process_info *
 142 aarch64_add_process (pid_t pid)
 143 {
 144   struct aarch64_process_info *proc;
 145
 146   proc = XCNEW (struct aarch64_process_info);
 147   proc->pid = pid;
 148
 149   proc->next = aarch64_process_list;
 150   aarch64_process_list = proc;
 151
 152   return proc;
 153 }
 154
 155 /* Get data specific info for process PID, creating it if necessary.
 156    Never returns NULL.  */
 157
 158 static struct aarch64_process_info *
 159 aarch64_process_info_get (pid_t pid)
 160 {
 161   struct aarch64_process_info *proc;
 162
 163   proc = aarch64_find_process_pid (pid);
 164   if (proc == NULL)
 165     proc = aarch64_add_process (pid);
 166
 167   return proc;
 168 }
 169
 170 /* Called whenever GDB is no longer debugging process PID.  It deletes
 171    data structures that keep track of debug register state.  */
 172
 173 void
 174 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 175 {
 176   struct aarch64_process_info *proc, **proc_link;
 177
 178   proc = aarch64_process_list;
 179   proc_link = &aarch64_process_list;
 180
 181   while (proc != NULL)
 182     {
 183       if (proc->pid == pid)
 184         {
 185           *proc_link = proc->next;
 186
 187           xfree (proc);
 188           return;
 189         }
 190
 191       proc_link = &proc->next;
 192       proc = *proc_link;
 193     }
 194 }
 195
 196 /* Get debug registers state for process PID.  */
 197
 198 struct aarch64_debug_reg_state *
 199 aarch64_get_debug_reg_state (pid_t pid)
 200 {
 201   return &aarch64_process_info_get (pid)->state;
 202 }
 203
 204 /* Fill GDB's register array with the general-purpose register values
 205    from the current thread.  */
 206
 207 static void
 208 fetch_gregs_from_thread (struct regcache *regcache)
 209 {
 210   int ret, tid;
 211   struct gdbarch *gdbarch = regcache->arch ();
 212   elf_gregset_t regs;
 213   struct iovec iovec;
 214
 215   /* Make sure REGS can hold all registers contents on both aarch64
 216      and arm.  */
 217   gdb_static_assert (sizeof (regs) >= 18 * 4);
 218
 219   tid = regcache->ptid ().lwp ();
 220
 221   iovec.iov_base = &regs;
 222   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 223     iovec.iov_len = 18 * 4;
 224   else
 225     iovec.iov_len = sizeof (regs);
 226
 227   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 228   if (ret < 0)
 229     perror_with_name (_("Unable to fetch general registers."));
 230
 231   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 232     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 233   else
 234     {
 235       int regno;
 236
 237       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 238         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 239     }
 240 }
 241
 242 /* Store to the current thread the valid general-purpose register
 243    values in the GDB's register array.  */
 244
 245 static void
 246 store_gregs_to_thread (const struct regcache *regcache)
 247 {
 248   int ret, tid;
 249   elf_gregset_t regs;
 250   struct iovec iovec;
 251   struct gdbarch *gdbarch = regcache->arch ();
 252
 253   /* Make sure REGS can hold all registers contents on both aarch64
 254      and arm.  */
 255   gdb_static_assert (sizeof (regs) >= 18 * 4);
 256   tid = regcache->ptid ().lwp ();
 257
 258   iovec.iov_base = &regs;
 259   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 260     iovec.iov_len = 18 * 4;
 261   else
 262     iovec.iov_len = sizeof (regs);
 263
 264   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 265   if (ret < 0)
 266     perror_with_name (_("Unable to fetch general registers."));
 267
 268   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 269     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 270   else
 271     {
 272       int regno;
 273
 274       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 275         if (REG_VALID == regcache->get_register_status (regno))
 276           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 277     }
 278
 279   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 280   if (ret < 0)
 281     perror_with_name (_("Unable to store general registers."));
 282 }
 283
 284 /* Fill GDB's register array with the fp/simd register values
 285    from the current thread.  */
 286
 287 static void
 288 fetch_fpregs_from_thread (struct regcache *regcache)
 289 {
 290   int ret, tid;
 291   elf_fpregset_t regs;
 292   struct iovec iovec;
 293   struct gdbarch *gdbarch = regcache->arch ();
 294
 295   /* Make sure REGS can hold all VFP registers contents on both aarch64
 296      and arm.  */
 297   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 298
 299   tid = regcache->ptid ().lwp ();
 300
 301   iovec.iov_base = &regs;
 302
 303   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 304     {
 305       iovec.iov_len = VFP_REGS_SIZE;
 306
 307       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 308       if (ret < 0)
 309         perror_with_name (_("Unable to fetch VFP registers."));
 310
 311       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 312     }
 313   else
 314     {
 315       int regno;
 316
 317       iovec.iov_len = sizeof (regs);
 318
 319       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 320       if (ret < 0)
 321         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 322
 323       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 324         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 325
 326       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 327       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 328     }
 329 }
 330
 331 /* Store to the current thread the valid fp/simd register
 332    values in the GDB's register array.  */
 333
 334 static void
 335 store_fpregs_to_thread (const struct regcache *regcache)
 336 {
 337   int ret, tid;
 338   elf_fpregset_t regs;
 339   struct iovec iovec;
 340   struct gdbarch *gdbarch = regcache->arch ();
 341
 342   /* Make sure REGS can hold all VFP registers contents on both aarch64
 343      and arm.  */
 344   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 345   tid = regcache->ptid ().lwp ();
 346
 347   iovec.iov_base = &regs;
 348
 349   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 350     {
 351       iovec.iov_len = VFP_REGS_SIZE;
 352
 353       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 354       if (ret < 0)
 355         perror_with_name (_("Unable to fetch VFP registers."));
 356
 357       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 358     }
 359   else
 360     {
 361       int regno;
 362
 363       iovec.iov_len = sizeof (regs);
 364
 365       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 366       if (ret < 0)
 367         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 368
 369       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 370         if (REG_VALID == regcache->get_register_status (regno))
 371           regcache->raw_collect
 372             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 373
 374       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 375         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 376       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 377         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 378     }
 379
 380   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 381     {
 382       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 383       if (ret < 0)
 384         perror_with_name (_("Unable to store VFP registers."));
 385     }
 386   else
 387     {
 388       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 389       if (ret < 0)
 390         perror_with_name (_("Unable to store FP/SIMD registers."));
 391     }
 392 }
 393
 394 /* Fill GDB's register array with the sve register values
 395    from the current thread.  */
 396
 397 static void
 398 fetch_sveregs_from_thread (struct regcache *regcache)
 399 {
 400   std::unique_ptr<gdb_byte[]> base
 401     = aarch64_sve_get_sveregs (regcache->ptid ().lwp ());
 402   aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ());
 403 }
 404
 405 /* Store to the current thread the valid sve register
 406    values in the GDB's register array.  */
 407
 408 static void
 409 store_sveregs_to_thread (struct regcache *regcache)
 410 {
 411   int ret;
 412   struct iovec iovec;
 413   int tid = regcache->ptid ().lwp ();
 414
 415   /* First store vector length to the thread.  This is done first to ensure the
 416      ptrace buffers read from the kernel are the correct size.  */
 417   if (!aarch64_sve_set_vq (tid, regcache))
 418     perror_with_name (_("Unable to set VG register."));
 419
 420   /* Obtain a dump of SVE registers from ptrace.  */
 421   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
 422
 423   /* Overwrite with regcache state.  */
 424   aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ());
 425
 426   /* Write back to the kernel.  */
 427   iovec.iov_base = base.get ();
 428   iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
 429   ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
 430
 431   if (ret < 0)
 432     perror_with_name (_("Unable to store sve registers"));
 433 }
 434
 435 /* Fill GDB's register array with the pointer authentication mask values from
 436    the current thread.  */
 437
 438 static void
 439 fetch_pauth_masks_from_thread (struct regcache *regcache)
 440 {
 441   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 442   int ret;
 443   struct iovec iovec;
 444   uint64_t pauth_regset[2] = {0, 0};
 445   int tid = regcache->ptid ().lwp ();
 446
 447   iovec.iov_base = &pauth_regset;
 448   iovec.iov_len = sizeof (pauth_regset);
 449
 450   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_PAC_MASK, &iovec);
 451   if (ret != 0)
 452     perror_with_name (_("unable to fetch pauth registers."));
 453
 454   regcache->raw_supply (AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base),
 455                         &pauth_regset[0]);
 456   regcache->raw_supply (AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base),
 457                         &pauth_regset[1]);
 458 }
 459
 460 /* Implement the "fetch_registers" target_ops method.  */
 461
 462 void
 463 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 464                                            int regno)
 465 {
 466   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 467
 468   if (regno == -1)
 469     {
 470       fetch_gregs_from_thread (regcache);
 471       if (tdep->has_sve ())
 472         fetch_sveregs_from_thread (regcache);
 473       else
 474         fetch_fpregs_from_thread (regcache);
 475
 476       if (tdep->has_pauth ())
 477         fetch_pauth_masks_from_thread (regcache);
 478     }
 479   else if (regno < AARCH64_V0_REGNUM)
 480     fetch_gregs_from_thread (regcache);
 481   else if (tdep->has_sve ())
 482     fetch_sveregs_from_thread (regcache);
 483   else
 484     fetch_fpregs_from_thread (regcache);
 485
 486   if (tdep->has_pauth ())
 487     {
 488       if (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
 489           || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))
 490         fetch_pauth_masks_from_thread (regcache);
 491     }
 492 }
 493
 494 /* Implement the "store_registers" target_ops method.  */
 495
 496 void
 497 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 498                                            int regno)
 499 {
 500   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 501
 502   if (regno == -1)
 503     {
 504       store_gregs_to_thread (regcache);
 505       if (tdep->has_sve ())
 506         store_sveregs_to_thread (regcache);
 507       else
 508         store_fpregs_to_thread (regcache);
 509     }
 510   else if (regno < AARCH64_V0_REGNUM)
 511     store_gregs_to_thread (regcache);
 512   else if (tdep->has_sve ())
 513     store_sveregs_to_thread (regcache);
 514   else
 515     store_fpregs_to_thread (regcache);
 516 }
 517
 518 /* Fill register REGNO (if it is a general-purpose register) in
 519    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 520    do this for all registers.  */
 521
 522 void
 523 fill_gregset (const struct regcache *regcache,
 524               gdb_gregset_t *gregsetp, int regno)
 525 {
 526   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 527                            regno, (gdb_byte *) gregsetp,
 528                            AARCH64_LINUX_SIZEOF_GREGSET);
 529 }
 530
 531 /* Fill GDB's register array with the general-purpose register values
 532    in *GREGSETP.  */
 533
 534 void
 535 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 536 {
 537   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 538                           (const gdb_byte *) gregsetp,
 539                           AARCH64_LINUX_SIZEOF_GREGSET);
 540 }
 541
 542 /* Fill register REGNO (if it is a floating-point register) in
 543    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 544    do this for all registers.  */
 545
 546 void
 547 fill_fpregset (const struct regcache *regcache,
 548                gdb_fpregset_t *fpregsetp, int regno)
 549 {
 550   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 551                            regno, (gdb_byte *) fpregsetp,
 552                            AARCH64_LINUX_SIZEOF_FPREGSET);
 553 }
 554
 555 /* Fill GDB's register array with the floating-point register values
 556    in *FPREGSETP.  */
 557
 558 void
 559 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 560 {
 561   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 562                           (const gdb_byte *) fpregsetp,
 563                           AARCH64_LINUX_SIZEOF_FPREGSET);
 564 }
 565
 566 /* linux_nat_new_fork hook.   */
 567
 568 void
 569 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 570                                         pid_t child_pid)
 571 {
 572   pid_t parent_pid;
 573   struct aarch64_debug_reg_state *parent_state;
 574   struct aarch64_debug_reg_state *child_state;
 575
 576   /* NULL means no watchpoint has ever been set in the parent.  In
 577      that case, there's nothing to do.  */
 578   if (parent->arch_private == NULL)
 579     return;
 580
 581   /* GDB core assumes the child inherits the watchpoints/hw
 582      breakpoints of the parent, and will remove them all from the
 583      forked off process.  Copy the debug registers mirrors into the
 584      new process so that all breakpoints and watchpoints can be
 585      removed together.  */
 586
 587   parent_pid = parent->ptid.pid ();
 588   parent_state = aarch64_get_debug_reg_state (parent_pid);
 589   child_state = aarch64_get_debug_reg_state (child_pid);
 590   *child_state = *parent_state;
 591 }
 592 \f
 593
 594 /* Called by libthread_db.  Returns a pointer to the thread local
 595    storage (or its descriptor).  */
 596
 597 ps_err_e
 598 ps_get_thread_area (struct ps_prochandle *ph,
 599                     lwpid_t lwpid, int idx, void **base)
 600 {
 601   int is_64bit_p
 602     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 603
 604   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 605 }
 606 \f
 607
 608 /* Implement the "post_startup_inferior" target_ops method.  */
 609
 610 void
 611 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 612 {
 613   low_forget_process (ptid.pid ());
 614   aarch64_linux_get_debug_reg_capacity (ptid.pid ());
 615   linux_nat_target::post_startup_inferior (ptid);
 616 }
 617
 618 /* Implement the "post_attach" target_ops method.  */
 619
 620 void
 621 aarch64_linux_nat_target::post_attach (int pid)
 622 {
 623   low_forget_process (pid);
 624   /* Set the hardware debug register capacity.  If
 625      aarch64_linux_get_debug_reg_capacity is not called
 626      (as it is in aarch64_linux_child_post_startup_inferior) then
 627      software watchpoints will be used instead of hardware
 628      watchpoints when attaching to a target.  */
 629   aarch64_linux_get_debug_reg_capacity (pid);
 630   linux_nat_target::post_attach (pid);
 631 }
 632
 633 extern struct target_desc *tdesc_arm_with_neon;
 634
 635 /* Implement the "read_description" target_ops method.  */
 636
 637 const struct target_desc *
 638 aarch64_linux_nat_target::read_description ()
 639 {
 640   int ret, tid;
 641   gdb_byte regbuf[VFP_REGS_SIZE];
 642   struct iovec iovec;
 643
 644   tid = inferior_ptid.lwp ();
 645
 646   iovec.iov_base = regbuf;
 647   iovec.iov_len = VFP_REGS_SIZE;
 648
 649   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 650   if (ret == 0)
 651     return tdesc_arm_with_neon;
 652
 653   CORE_ADDR hwcap = linux_get_hwcap (this);
 654
 655   return aarch64_read_description (aarch64_sve_get_vq (tid),
 656                                    hwcap & AARCH64_HWCAP_PACA);
 657 }
 658
 659 /* Convert a native/host siginfo object, into/from the siginfo in the
 660    layout of the inferiors' architecture.  Returns true if any
 661    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 662    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 663    INF.  */
 664
 665 bool
 666 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 667                                              int direction)
 668 {
 669   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 670
 671   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 672      object.  */
 673   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 674     {
 675       if (direction == 0)
 676         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 677                                              native);
 678       else
 679         aarch64_siginfo_from_compat_siginfo (native,
 680                                              (struct compat_siginfo *) inf);
 681
 682       return true;
 683     }
 684
 685   return false;
 686 }
 687
 688 /* Returns the number of hardware watchpoints of type TYPE that we can
 689    set.  Value is positive if we can set CNT watchpoints, zero if
 690    setting watchpoints of type TYPE is not supported, and negative if
 691    CNT is more than the maximum number of watchpoints of type TYPE
 692    that we can support.  TYPE is one of bp_hardware_watchpoint,
 693    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 694    CNT is the number of such watchpoints used so far (including this
 695    one).  OTHERTYPE is non-zero if other types of watchpoints are
 696    currently enabled.  */
 697
 698 int
 699 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 700                                                  int cnt, int othertype)
 701 {
 702   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 703       || type == bp_access_watchpoint || type == bp_watchpoint)
 704     {
 705       if (aarch64_num_wp_regs == 0)
 706         return 0;
 707     }
 708   else if (type == bp_hardware_breakpoint)
 709     {
 710       if (aarch64_num_bp_regs == 0)
 711         return 0;
 712     }
 713   else
 714     gdb_assert_not_reached ("unexpected breakpoint type");
 715
 716   /* We always return 1 here because we don't have enough information
 717      about possible overlap of addresses that they want to watch.  As an
 718      extreme example, consider the case where all the watchpoints watch
 719      the same address and the same region length: then we can handle a
 720      virtually unlimited number of watchpoints, due to debug register
 721      sharing implemented via reference counts.  */
 722   return 1;
 723 }
 724
 725 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 726    Return 0 on success, -1 on failure.  */
 727
 728 int
 729 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 730                                                 struct bp_target_info *bp_tgt)
 731 {
 732   int ret;
 733   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 734   int len;
 735   const enum target_hw_bp_type type = hw_execute;
 736   struct aarch64_debug_reg_state *state
 737     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 738
 739   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 740
 741   if (show_debug_regs)
 742     fprintf_unfiltered
 743       (gdb_stdlog,
 744        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 745        (unsigned long) addr, len);
 746
 747   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 748
 749   if (show_debug_regs)
 750     {
 751       aarch64_show_debug_reg_state (state,
 752                                     "insert_hw_breakpoint", addr, len, type);
 753     }
 754
 755   return ret;
 756 }
 757
 758 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 759    Return 0 on success, -1 on failure.  */
 760
 761 int
 762 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 763                                                 struct bp_target_info *bp_tgt)
 764 {
 765   int ret;
 766   CORE_ADDR addr = bp_tgt->placed_address;
 767   int len = 4;
 768   const enum target_hw_bp_type type = hw_execute;
 769   struct aarch64_debug_reg_state *state
 770     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 771
 772   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 773
 774   if (show_debug_regs)
 775     fprintf_unfiltered
 776       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 777        (unsigned long) addr, len);
 778
 779   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 780
 781   if (show_debug_regs)
 782     {
 783       aarch64_show_debug_reg_state (state,
 784                                     "remove_hw_watchpoint", addr, len, type);
 785     }
 786
 787   return ret;
 788 }
 789
 790 /* Implement the "insert_watchpoint" target_ops method.
 791
 792    Insert a watchpoint to watch a memory region which starts at
 793    address ADDR and whose length is LEN bytes.  Watch memory accesses
 794    of the type TYPE.  Return 0 on success, -1 on failure.  */
 795
 796 int
 797 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 798                                              enum target_hw_bp_type type,
 799                                              struct expression *cond)
 800 {
 801   int ret;
 802   struct aarch64_debug_reg_state *state
 803     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 804
 805   if (show_debug_regs)
 806     fprintf_unfiltered (gdb_stdlog,
 807                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 808                         (unsigned long) addr, len);
 809
 810   gdb_assert (type != hw_execute);
 811
 812   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 813
 814   if (show_debug_regs)
 815     {
 816       aarch64_show_debug_reg_state (state,
 817                                     "insert_watchpoint", addr, len, type);
 818     }
 819
 820   return ret;
 821 }
 822
 823 /* Implement the "remove_watchpoint" target_ops method.
 824    Remove a watchpoint that watched the memory region which starts at
 825    address ADDR, whose length is LEN bytes, and for accesses of the
 826    type TYPE.  Return 0 on success, -1 on failure.  */
 827
 828 int
 829 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 830                                              enum target_hw_bp_type type,
 831                                              struct expression *cond)
 832 {
 833   int ret;
 834   struct aarch64_debug_reg_state *state
 835     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 836
 837   if (show_debug_regs)
 838     fprintf_unfiltered (gdb_stdlog,
 839                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 840                         (unsigned long) addr, len);
 841
 842   gdb_assert (type != hw_execute);
 843
 844   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 845
 846   if (show_debug_regs)
 847     {
 848       aarch64_show_debug_reg_state (state,
 849                                     "remove_watchpoint", addr, len, type);
 850     }
 851
 852   return ret;
 853 }
 854
 855 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 856
 857 int
 858 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 859 {
 860   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 861 }
 862
 863 /* Implement the "stopped_data_address" target_ops method.  */
 864
 865 bool
 866 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 867 {
 868   siginfo_t siginfo;
 869   int i;
 870   struct aarch64_debug_reg_state *state;
 871
 872   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 873     return false;
 874
 875   /* This must be a hardware breakpoint.  */
 876   if (siginfo.si_signo != SIGTRAP
 877       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 878     return false;
 879
 880   /* Check if the address matches any watched address.  */
 881   state = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 882   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 883     {
 884       const unsigned int offset
 885         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 886       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 887       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 888       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 889       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 890       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 891
 892       if (state->dr_ref_count_wp[i]
 893           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 894           && addr_trap >= addr_watch_aligned
 895           && addr_trap < addr_watch + len)
 896         {
 897           /* ADDR_TRAP reports the first address of the memory range
 898              accessed by the CPU, regardless of what was the memory
 899              range watched.  Thus, a large CPU access that straddles
 900              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 901              ADDR_TRAP that is lower than the
 902              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 903
 904              addr: |   4   |   5   |   6   |   7   |   8   |
 905                                    |---- range watched ----|
 906                    |----------- range accessed ------------|
 907
 908              In this case, ADDR_TRAP will be 4.
 909
 910              To match a watchpoint known to GDB core, we must never
 911              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 912              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 913              positive on kernels older than 4.10.  See PR
 914              external/20207.  */
 915           *addr_p = addr_orig;
 916           return true;
 917         }
 918     }
 919
 920   return false;
 921 }
 922
 923 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 924
 925 bool
 926 aarch64_linux_nat_target::stopped_by_watchpoint ()
 927 {
 928   CORE_ADDR addr;
 929
 930   return stopped_data_address (&addr);
 931 }
 932
 933 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
 934
 935 bool
 936 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
 937                                                         CORE_ADDR start, int length)
 938 {
 939   return start <= addr && start + length - 1 >= addr;
 940 }
 941
 942 /* Implement the "can_do_single_step" target_ops method.  */
 943
 944 int
 945 aarch64_linux_nat_target::can_do_single_step ()
 946 {
 947   return 1;
 948 }
 949
 950 /* Implement the "thread_architecture" target_ops method.  */
 951
 952 struct gdbarch *
 953 aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
 954 {
 955   /* Return the gdbarch for the current thread.  If the vector length has
 956      changed since the last time this was called, then do a further lookup.  */
 957
 958   uint64_t vq = aarch64_sve_get_vq (ptid.lwp ());
 959
 960   /* Find the current gdbarch the same way as process_stratum_target.  Only
 961      return it if the current vector length matches the one in the tdep.  */
 962   inferior *inf = find_inferior_ptid (ptid);
 963   gdb_assert (inf != NULL);
 964   if (vq == gdbarch_tdep (inf->gdbarch)->vq)
 965     return inf->gdbarch;
 966
 967   /* We reach here if the vector length for the thread is different from its
 968      value at process start.  Lookup gdbarch via info (potentially creating a
 969      new one), stashing the vector length inside id.  Use -1 for when SVE
 970      unavailable, to distinguish from an unset value of 0.  */
 971   struct gdbarch_info info;
 972   gdbarch_info_init (&info);
 973   info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
 974   info.id = (int *) (vq == 0 ? -1 : vq);
 975   return gdbarch_find_by_info (info);
 976 }
 977
 978 /* Define AArch64 maintenance commands.  */
 979
 980 static void
 981 add_show_debug_regs_command (void)
 982 {
 983   /* A maintenance command to enable printing the internal DRi mirror
 984      variables.  */
 985   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 986                            &show_debug_regs, _("\
 987 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 988 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 989 Use \"on\" to enable, \"off\" to disable.\n\
 990 If enabled, the debug registers values are shown when GDB inserts\n\
 991 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 992 triggers a breakpoint or watchpoint."),
 993                            NULL,
 994                            NULL,
 995                            &maintenance_set_cmdlist,
 996                            &maintenance_show_cmdlist);
 997 }
 998
 999 void
1000 _initialize_aarch64_linux_nat (void)
1001 {
1002   add_show_debug_regs_command ();
1003
1004   /* Register the target.  */
1005   linux_target = &the_aarch64_linux_nat_target;
1006   add_inf_child_target (&the_aarch64_linux_nat_target);
1007 }