gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2018 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "nat/aarch64-linux.h"
  34 #include "nat/aarch64-linux-hw-point.h"
  35
  36 #include "elf/external.h"
  37 #include "elf/common.h"
  38
  39 #include "nat/gdb_ptrace.h"
  40 #include <sys/utsname.h>
  41 #include <asm/ptrace.h>
  42
  43 #include "gregset.h"
  44
  45 /* Defines ps_err_e, struct ps_prochandle.  */
  46 #include "gdb_proc_service.h"
  47
  48 #ifndef TRAP_HWBKPT
  49 #define TRAP_HWBKPT 0x0004
  50 #endif
  51
  52 class aarch64_linux_nat_target final : public linux_nat_target
  53 {
  54 public:
  55   /* Add our register access methods.  */
  56   void fetch_registers (struct regcache *, int) override;
  57   void store_registers (struct regcache *, int) override;
  58
  59   const struct target_desc *read_description () override;
  60
  61   /* Add our hardware breakpoint and watchpoint implementation.  */
  62   int can_use_hw_breakpoint (enum bptype, int, int) override;
  63   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  64   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  65   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  66   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  67                          struct expression *) override;
  68   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  69                          struct expression *) override;
  70   bool stopped_by_watchpoint () override;
  71   bool stopped_data_address (CORE_ADDR *) override;
  72   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  73
  74   int can_do_single_step () override;
  75
  76   /* Override the GNU/Linux inferior startup hook.  */
  77   void post_startup_inferior (ptid_t) override;
  78
  79   /* These three defer to common nat/ code.  */
  80   void low_new_thread (struct lwp_info *lp) override
  81   { aarch64_linux_new_thread (lp); }
  82   void low_delete_thread (struct arch_lwp_info *lp) override
  83   { aarch64_linux_delete_thread (lp); }
  84   void low_prepare_to_resume (struct lwp_info *lp) override
  85   { aarch64_linux_prepare_to_resume (lp); }
  86
  87   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
  88   void low_forget_process (pid_t pid) override;
  89
  90   /* Add our siginfo layout converter.  */
  91   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
  92     override;
  93 };
  94
  95 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
  96
  97 /* Per-process data.  We don't bind this to a per-inferior registry
  98    because of targets like x86 GNU/Linux that need to keep track of
  99    processes that aren't bound to any inferior (e.g., fork children,
 100    checkpoints).  */
 101
 102 struct aarch64_process_info
 103 {
 104   /* Linked list.  */
 105   struct aarch64_process_info *next;
 106
 107   /* The process identifier.  */
 108   pid_t pid;
 109
 110   /* Copy of aarch64 hardware debug registers.  */
 111   struct aarch64_debug_reg_state state;
 112 };
 113
 114 static struct aarch64_process_info *aarch64_process_list = NULL;
 115
 116 /* Find process data for process PID.  */
 117
 118 static struct aarch64_process_info *
 119 aarch64_find_process_pid (pid_t pid)
 120 {
 121   struct aarch64_process_info *proc;
 122
 123   for (proc = aarch64_process_list; proc; proc = proc->next)
 124     if (proc->pid == pid)
 125       return proc;
 126
 127   return NULL;
 128 }
 129
 130 /* Add process data for process PID.  Returns newly allocated info
 131    object.  */
 132
 133 static struct aarch64_process_info *
 134 aarch64_add_process (pid_t pid)
 135 {
 136   struct aarch64_process_info *proc;
 137
 138   proc = XCNEW (struct aarch64_process_info);
 139   proc->pid = pid;
 140
 141   proc->next = aarch64_process_list;
 142   aarch64_process_list = proc;
 143
 144   return proc;
 145 }
 146
 147 /* Get data specific info for process PID, creating it if necessary.
 148    Never returns NULL.  */
 149
 150 static struct aarch64_process_info *
 151 aarch64_process_info_get (pid_t pid)
 152 {
 153   struct aarch64_process_info *proc;
 154
 155   proc = aarch64_find_process_pid (pid);
 156   if (proc == NULL)
 157     proc = aarch64_add_process (pid);
 158
 159   return proc;
 160 }
 161
 162 /* Called whenever GDB is no longer debugging process PID.  It deletes
 163    data structures that keep track of debug register state.  */
 164
 165 void
 166 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 167 {
 168   struct aarch64_process_info *proc, **proc_link;
 169
 170   proc = aarch64_process_list;
 171   proc_link = &aarch64_process_list;
 172
 173   while (proc != NULL)
 174     {
 175       if (proc->pid == pid)
 176         {
 177           *proc_link = proc->next;
 178
 179           xfree (proc);
 180           return;
 181         }
 182
 183       proc_link = &proc->next;
 184       proc = *proc_link;
 185     }
 186 }
 187
 188 /* Get debug registers state for process PID.  */
 189
 190 struct aarch64_debug_reg_state *
 191 aarch64_get_debug_reg_state (pid_t pid)
 192 {
 193   return &aarch64_process_info_get (pid)->state;
 194 }
 195
 196 /* Fill GDB's register array with the general-purpose register values
 197    from the current thread.  */
 198
 199 static void
 200 fetch_gregs_from_thread (struct regcache *regcache)
 201 {
 202   int ret, tid;
 203   struct gdbarch *gdbarch = regcache->arch ();
 204   elf_gregset_t regs;
 205   struct iovec iovec;
 206
 207   /* Make sure REGS can hold all registers contents on both aarch64
 208      and arm.  */
 209   gdb_static_assert (sizeof (regs) >= 18 * 4);
 210
 211   tid = ptid_get_lwp (regcache->ptid ());
 212
 213   iovec.iov_base = &regs;
 214   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 215     iovec.iov_len = 18 * 4;
 216   else
 217     iovec.iov_len = sizeof (regs);
 218
 219   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 220   if (ret < 0)
 221     perror_with_name (_("Unable to fetch general registers."));
 222
 223   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 224     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 225   else
 226     {
 227       int regno;
 228
 229       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 230         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 231     }
 232 }
 233
 234 /* Store to the current thread the valid general-purpose register
 235    values in the GDB's register array.  */
 236
 237 static void
 238 store_gregs_to_thread (const struct regcache *regcache)
 239 {
 240   int ret, tid;
 241   elf_gregset_t regs;
 242   struct iovec iovec;
 243   struct gdbarch *gdbarch = regcache->arch ();
 244
 245   /* Make sure REGS can hold all registers contents on both aarch64
 246      and arm.  */
 247   gdb_static_assert (sizeof (regs) >= 18 * 4);
 248   tid = ptid_get_lwp (regcache->ptid ());
 249
 250   iovec.iov_base = &regs;
 251   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 252     iovec.iov_len = 18 * 4;
 253   else
 254     iovec.iov_len = sizeof (regs);
 255
 256   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 257   if (ret < 0)
 258     perror_with_name (_("Unable to fetch general registers."));
 259
 260   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 261     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 262   else
 263     {
 264       int regno;
 265
 266       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 267         if (REG_VALID == regcache->get_register_status (regno))
 268           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 269     }
 270
 271   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 272   if (ret < 0)
 273     perror_with_name (_("Unable to store general registers."));
 274 }
 275
 276 /* Fill GDB's register array with the fp/simd register values
 277    from the current thread.  */
 278
 279 static void
 280 fetch_fpregs_from_thread (struct regcache *regcache)
 281 {
 282   int ret, tid;
 283   elf_fpregset_t regs;
 284   struct iovec iovec;
 285   struct gdbarch *gdbarch = regcache->arch ();
 286
 287   /* Make sure REGS can hold all VFP registers contents on both aarch64
 288      and arm.  */
 289   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 290
 291   tid = ptid_get_lwp (regcache->ptid ());
 292
 293   iovec.iov_base = &regs;
 294
 295   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 296     {
 297       iovec.iov_len = VFP_REGS_SIZE;
 298
 299       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 300       if (ret < 0)
 301         perror_with_name (_("Unable to fetch VFP registers."));
 302
 303       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 304     }
 305   else
 306     {
 307       int regno;
 308
 309       iovec.iov_len = sizeof (regs);
 310
 311       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 312       if (ret < 0)
 313         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 314
 315       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 316         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 317
 318       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 319       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 320     }
 321 }
 322
 323 /* Store to the current thread the valid fp/simd register
 324    values in the GDB's register array.  */
 325
 326 static void
 327 store_fpregs_to_thread (const struct regcache *regcache)
 328 {
 329   int ret, tid;
 330   elf_fpregset_t regs;
 331   struct iovec iovec;
 332   struct gdbarch *gdbarch = regcache->arch ();
 333
 334   /* Make sure REGS can hold all VFP registers contents on both aarch64
 335      and arm.  */
 336   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 337   tid = ptid_get_lwp (regcache->ptid ());
 338
 339   iovec.iov_base = &regs;
 340
 341   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 342     {
 343       iovec.iov_len = VFP_REGS_SIZE;
 344
 345       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 346       if (ret < 0)
 347         perror_with_name (_("Unable to fetch VFP registers."));
 348
 349       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 350     }
 351   else
 352     {
 353       int regno;
 354
 355       iovec.iov_len = sizeof (regs);
 356
 357       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 358       if (ret < 0)
 359         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 360
 361       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 362         if (REG_VALID == regcache->get_register_status (regno))
 363           regcache->raw_collect
 364             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 365
 366       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 367         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 368       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 369         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 370     }
 371
 372   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 373     {
 374       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 375       if (ret < 0)
 376         perror_with_name (_("Unable to store VFP registers."));
 377     }
 378   else
 379     {
 380       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 381       if (ret < 0)
 382         perror_with_name (_("Unable to store FP/SIMD registers."));
 383     }
 384 }
 385
 386 /* Implement the "fetch_registers" target_ops method.  */
 387
 388 void
 389 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 390                                            int regno)
 391 {
 392   if (regno == -1)
 393     {
 394       fetch_gregs_from_thread (regcache);
 395       fetch_fpregs_from_thread (regcache);
 396     }
 397   else if (regno < AARCH64_V0_REGNUM)
 398     fetch_gregs_from_thread (regcache);
 399   else
 400     fetch_fpregs_from_thread (regcache);
 401 }
 402
 403 /* Implement the "store_registers" target_ops method.  */
 404
 405 void
 406 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 407                                            int regno)
 408 {
 409   if (regno == -1)
 410     {
 411       store_gregs_to_thread (regcache);
 412       store_fpregs_to_thread (regcache);
 413     }
 414   else if (regno < AARCH64_V0_REGNUM)
 415     store_gregs_to_thread (regcache);
 416   else
 417     store_fpregs_to_thread (regcache);
 418 }
 419
 420 /* Fill register REGNO (if it is a general-purpose register) in
 421    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 422    do this for all registers.  */
 423
 424 void
 425 fill_gregset (const struct regcache *regcache,
 426               gdb_gregset_t *gregsetp, int regno)
 427 {
 428   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 429                            regno, (gdb_byte *) gregsetp,
 430                            AARCH64_LINUX_SIZEOF_GREGSET);
 431 }
 432
 433 /* Fill GDB's register array with the general-purpose register values
 434    in *GREGSETP.  */
 435
 436 void
 437 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 438 {
 439   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 440                           (const gdb_byte *) gregsetp,
 441                           AARCH64_LINUX_SIZEOF_GREGSET);
 442 }
 443
 444 /* Fill register REGNO (if it is a floating-point register) in
 445    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 446    do this for all registers.  */
 447
 448 void
 449 fill_fpregset (const struct regcache *regcache,
 450                gdb_fpregset_t *fpregsetp, int regno)
 451 {
 452   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 453                            regno, (gdb_byte *) fpregsetp,
 454                            AARCH64_LINUX_SIZEOF_FPREGSET);
 455 }
 456
 457 /* Fill GDB's register array with the floating-point register values
 458    in *FPREGSETP.  */
 459
 460 void
 461 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 462 {
 463   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 464                           (const gdb_byte *) fpregsetp,
 465                           AARCH64_LINUX_SIZEOF_FPREGSET);
 466 }
 467
 468 /* linux_nat_new_fork hook.   */
 469
 470 void
 471 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 472                                         pid_t child_pid)
 473 {
 474   pid_t parent_pid;
 475   struct aarch64_debug_reg_state *parent_state;
 476   struct aarch64_debug_reg_state *child_state;
 477
 478   /* NULL means no watchpoint has ever been set in the parent.  In
 479      that case, there's nothing to do.  */
 480   if (parent->arch_private == NULL)
 481     return;
 482
 483   /* GDB core assumes the child inherits the watchpoints/hw
 484      breakpoints of the parent, and will remove them all from the
 485      forked off process.  Copy the debug registers mirrors into the
 486      new process so that all breakpoints and watchpoints can be
 487      removed together.  */
 488
 489   parent_pid = ptid_get_pid (parent->ptid);
 490   parent_state = aarch64_get_debug_reg_state (parent_pid);
 491   child_state = aarch64_get_debug_reg_state (child_pid);
 492   *child_state = *parent_state;
 493 }
 494 \f
 495
 496 /* Called by libthread_db.  Returns a pointer to the thread local
 497    storage (or its descriptor).  */
 498
 499 ps_err_e
 500 ps_get_thread_area (struct ps_prochandle *ph,
 501                     lwpid_t lwpid, int idx, void **base)
 502 {
 503   int is_64bit_p
 504     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 505
 506   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 507 }
 508 \f
 509
 510 /* Implement the "post_startup_inferior" target_ops method.  */
 511
 512 void
 513 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 514 {
 515   low_forget_process (ptid_get_pid (ptid));
 516   aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid));
 517   linux_nat_target::post_startup_inferior (ptid);
 518 }
 519
 520 extern struct target_desc *tdesc_arm_with_neon;
 521
 522 /* Implement the "read_description" target_ops method.  */
 523
 524 const struct target_desc *
 525 aarch64_linux_nat_target::read_description ()
 526 {
 527   int ret, tid;
 528   gdb_byte regbuf[VFP_REGS_SIZE];
 529   struct iovec iovec;
 530
 531   tid = ptid_get_lwp (inferior_ptid);
 532
 533   iovec.iov_base = regbuf;
 534   iovec.iov_len = VFP_REGS_SIZE;
 535
 536   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 537   if (ret == 0)
 538     return tdesc_arm_with_neon;
 539   else
 540     /* SVE not yet supported.  */
 541     return aarch64_read_description (0);
 542 }
 543
 544 /* Convert a native/host siginfo object, into/from the siginfo in the
 545    layout of the inferiors' architecture.  Returns true if any
 546    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 547    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 548    INF.  */
 549
 550 bool
 551 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 552                                              int direction)
 553 {
 554   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 555
 556   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 557      object.  */
 558   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 559     {
 560       if (direction == 0)
 561         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 562                                              native);
 563       else
 564         aarch64_siginfo_from_compat_siginfo (native,
 565                                              (struct compat_siginfo *) inf);
 566
 567       return true;
 568     }
 569
 570   return false;
 571 }
 572
 573 /* Returns the number of hardware watchpoints of type TYPE that we can
 574    set.  Value is positive if we can set CNT watchpoints, zero if
 575    setting watchpoints of type TYPE is not supported, and negative if
 576    CNT is more than the maximum number of watchpoints of type TYPE
 577    that we can support.  TYPE is one of bp_hardware_watchpoint,
 578    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 579    CNT is the number of such watchpoints used so far (including this
 580    one).  OTHERTYPE is non-zero if other types of watchpoints are
 581    currently enabled.  */
 582
 583 int
 584 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 585                                                  int cnt, int othertype)
 586 {
 587   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 588       || type == bp_access_watchpoint || type == bp_watchpoint)
 589     {
 590       if (aarch64_num_wp_regs == 0)
 591         return 0;
 592     }
 593   else if (type == bp_hardware_breakpoint)
 594     {
 595       if (aarch64_num_bp_regs == 0)
 596         return 0;
 597     }
 598   else
 599     gdb_assert_not_reached ("unexpected breakpoint type");
 600
 601   /* We always return 1 here because we don't have enough information
 602      about possible overlap of addresses that they want to watch.  As an
 603      extreme example, consider the case where all the watchpoints watch
 604      the same address and the same region length: then we can handle a
 605      virtually unlimited number of watchpoints, due to debug register
 606      sharing implemented via reference counts.  */
 607   return 1;
 608 }
 609
 610 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 611    Return 0 on success, -1 on failure.  */
 612
 613 int
 614 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 615                                                 struct bp_target_info *bp_tgt)
 616 {
 617   int ret;
 618   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 619   int len;
 620   const enum target_hw_bp_type type = hw_execute;
 621   struct aarch64_debug_reg_state *state
 622     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 623
 624   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 625
 626   if (show_debug_regs)
 627     fprintf_unfiltered
 628       (gdb_stdlog,
 629        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 630        (unsigned long) addr, len);
 631
 632   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 633
 634   if (show_debug_regs)
 635     {
 636       aarch64_show_debug_reg_state (state,
 637                                     "insert_hw_breakpoint", addr, len, type);
 638     }
 639
 640   return ret;
 641 }
 642
 643 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 644    Return 0 on success, -1 on failure.  */
 645
 646 int
 647 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 648                                                 struct bp_target_info *bp_tgt)
 649 {
 650   int ret;
 651   CORE_ADDR addr = bp_tgt->placed_address;
 652   int len = 4;
 653   const enum target_hw_bp_type type = hw_execute;
 654   struct aarch64_debug_reg_state *state
 655     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 656
 657   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 658
 659   if (show_debug_regs)
 660     fprintf_unfiltered
 661       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 662        (unsigned long) addr, len);
 663
 664   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 665
 666   if (show_debug_regs)
 667     {
 668       aarch64_show_debug_reg_state (state,
 669                                     "remove_hw_watchpoint", addr, len, type);
 670     }
 671
 672   return ret;
 673 }
 674
 675 /* Implement the "insert_watchpoint" target_ops method.
 676
 677    Insert a watchpoint to watch a memory region which starts at
 678    address ADDR and whose length is LEN bytes.  Watch memory accesses
 679    of the type TYPE.  Return 0 on success, -1 on failure.  */
 680
 681 int
 682 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 683                                              enum target_hw_bp_type type,
 684                                              struct expression *cond)
 685 {
 686   int ret;
 687   struct aarch64_debug_reg_state *state
 688     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 689
 690   if (show_debug_regs)
 691     fprintf_unfiltered (gdb_stdlog,
 692                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 693                         (unsigned long) addr, len);
 694
 695   gdb_assert (type != hw_execute);
 696
 697   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 698
 699   if (show_debug_regs)
 700     {
 701       aarch64_show_debug_reg_state (state,
 702                                     "insert_watchpoint", addr, len, type);
 703     }
 704
 705   return ret;
 706 }
 707
 708 /* Implement the "remove_watchpoint" target_ops method.
 709    Remove a watchpoint that watched the memory region which starts at
 710    address ADDR, whose length is LEN bytes, and for accesses of the
 711    type TYPE.  Return 0 on success, -1 on failure.  */
 712
 713 int
 714 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 715                                              enum target_hw_bp_type type,
 716                                              struct expression *cond)
 717 {
 718   int ret;
 719   struct aarch64_debug_reg_state *state
 720     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 721
 722   if (show_debug_regs)
 723     fprintf_unfiltered (gdb_stdlog,
 724                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 725                         (unsigned long) addr, len);
 726
 727   gdb_assert (type != hw_execute);
 728
 729   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 730
 731   if (show_debug_regs)
 732     {
 733       aarch64_show_debug_reg_state (state,
 734                                     "remove_watchpoint", addr, len, type);
 735     }
 736
 737   return ret;
 738 }
 739
 740 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 741
 742 int
 743 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 744 {
 745   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 746 }
 747
 748 /* Implement the "stopped_data_address" target_ops method.  */
 749
 750 bool
 751 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 752 {
 753   siginfo_t siginfo;
 754   int i, tid;
 755   struct aarch64_debug_reg_state *state;
 756
 757   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 758     return false;
 759
 760   /* This must be a hardware breakpoint.  */
 761   if (siginfo.si_signo != SIGTRAP
 762       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 763     return false;
 764
 765   /* Check if the address matches any watched address.  */
 766   state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 767   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 768     {
 769       const unsigned int offset
 770         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 771       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 772       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 773       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 774       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 775       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 776
 777       if (state->dr_ref_count_wp[i]
 778           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 779           && addr_trap >= addr_watch_aligned
 780           && addr_trap < addr_watch + len)
 781         {
 782           /* ADDR_TRAP reports the first address of the memory range
 783              accessed by the CPU, regardless of what was the memory
 784              range watched.  Thus, a large CPU access that straddles
 785              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 786              ADDR_TRAP that is lower than the
 787              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 788
 789              addr: |   4   |   5   |   6   |   7   |   8   |
 790                                    |---- range watched ----|
 791                    |----------- range accessed ------------|
 792
 793              In this case, ADDR_TRAP will be 4.
 794
 795              To match a watchpoint known to GDB core, we must never
 796              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 797              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 798              positive on kernels older than 4.10.  See PR
 799              external/20207.  */
 800           *addr_p = addr_orig;
 801           return true;
 802         }
 803     }
 804
 805   return false;
 806 }
 807
 808 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 809
 810 bool
 811 aarch64_linux_nat_target::stopped_by_watchpoint ()
 812 {
 813   CORE_ADDR addr;
 814
 815   return stopped_data_address (&addr);
 816 }
 817
 818 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
 819
 820 bool
 821 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
 822                                                         CORE_ADDR start, int length)
 823 {
 824   return start <= addr && start + length - 1 >= addr;
 825 }
 826
 827 /* Implement the "can_do_single_step" target_ops method.  */
 828
 829 int
 830 aarch64_linux_nat_target::can_do_single_step ()
 831 {
 832   return 1;
 833 }
 834
 835 /* Define AArch64 maintenance commands.  */
 836
 837 static void
 838 add_show_debug_regs_command (void)
 839 {
 840   /* A maintenance command to enable printing the internal DRi mirror
 841      variables.  */
 842   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 843                            &show_debug_regs, _("\
 844 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 845 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 846 Use \"on\" to enable, \"off\" to disable.\n\
 847 If enabled, the debug registers values are shown when GDB inserts\n\
 848 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 849 triggers a breakpoint or watchpoint."),
 850                            NULL,
 851                            NULL,
 852                            &maintenance_set_cmdlist,
 853                            &maintenance_show_cmdlist);
 854 }
 855
 856 void
 857 _initialize_aarch64_linux_nat (void)
 858 {
 859   add_show_debug_regs_command ();
 860
 861   /* Register the target.  */
 862   linux_target = &the_aarch64_linux_nat_target;
 863   add_inf_child_target (&the_aarch64_linux_nat_target);
 864 }