Convert struct target_ops to C++
[deliverable/binutils-gdb.git] / gdb / amd64-linux-nat.c
1 /* Native-dependent code for GNU/Linux x86-64.
2
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "inferior.h"
23 #include "regcache.h"
24 #include "elf/common.h"
25 #include <sys/uio.h>
26 #include "nat/gdb_ptrace.h"
27 #include <asm/prctl.h>
28 #include <sys/reg.h>
29 #include "gregset.h"
30 #include "gdb_proc_service.h"
31
32 #include "amd64-nat.h"
33 #include "amd64-tdep.h"
34 #include "amd64-linux-tdep.h"
35 #include "i386-linux-tdep.h"
36 #include "x86-xstate.h"
37
38 #include "x86-linux-nat.h"
39 #include "nat/linux-ptrace.h"
40 #include "nat/amd64-linux-siginfo.h"
41
42 /* This definition comes from prctl.h. Kernels older than 2.5.64
43 do not have it. */
44 #ifndef PTRACE_ARCH_PRCTL
45 #define PTRACE_ARCH_PRCTL 30
46 #endif
47
48 struct amd64_linux_nat_target final : public x86_linux_nat_target
49 {
50 /* Add our register access methods. */
51 void fetch_registers (struct regcache *, int) override;
52 void store_registers (struct regcache *, int) override;
53 };
54
55 static amd64_linux_nat_target the_amd64_linux_nat_target;
56
57 /* Mapping between the general-purpose registers in GNU/Linux x86-64
58 `struct user' format and GDB's register cache layout for GNU/Linux
59 i386.
60
61 Note that most GNU/Linux x86-64 registers are 64-bit, while the
62 GNU/Linux i386 registers are all 32-bit, but since we're
63 little-endian we get away with that. */
64
65 /* From <sys/reg.h> on GNU/Linux i386. */
66 static int amd64_linux_gregset32_reg_offset[] =
67 {
68 RAX * 8, RCX * 8, /* %eax, %ecx */
69 RDX * 8, RBX * 8, /* %edx, %ebx */
70 RSP * 8, RBP * 8, /* %esp, %ebp */
71 RSI * 8, RDI * 8, /* %esi, %edi */
72 RIP * 8, EFLAGS * 8, /* %eip, %eflags */
73 CS * 8, SS * 8, /* %cs, %ss */
74 DS * 8, ES * 8, /* %ds, %es */
75 FS * 8, GS * 8, /* %fs, %gs */
76 -1, -1, -1, -1, -1, -1, -1, -1,
77 -1, -1, -1, -1, -1, -1, -1, -1,
78 -1, -1, -1, -1, -1, -1, -1, -1, -1,
79 -1, -1, -1, -1, -1, -1, -1, -1,
80 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
81 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
82 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
83 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
84 -1, /* PKEYS register PKRU */
85 ORIG_RAX * 8 /* "orig_eax" */
86 };
87 \f
88
89 /* Transfering the general-purpose registers between GDB, inferiors
90 and core files. */
91
92 /* Fill GDB's register cache with the general-purpose register values
93 in *GREGSETP. */
94
95 void
96 supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp)
97 {
98 amd64_supply_native_gregset (regcache, gregsetp, -1);
99 }
100
101 /* Fill register REGNUM (if it is a general-purpose register) in
102 *GREGSETP with the value in GDB's register cache. If REGNUM is -1,
103 do this for all registers. */
104
105 void
106 fill_gregset (const struct regcache *regcache,
107 elf_gregset_t *gregsetp, int regnum)
108 {
109 amd64_collect_native_gregset (regcache, gregsetp, regnum);
110 }
111
112 /* Transfering floating-point registers between GDB, inferiors and cores. */
113
114 /* Fill GDB's register cache with the floating-point and SSE register
115 values in *FPREGSETP. */
116
117 void
118 supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp)
119 {
120 amd64_supply_fxsave (regcache, -1, fpregsetp);
121 }
122
123 /* Fill register REGNUM (if it is a floating-point or SSE register) in
124 *FPREGSETP with the value in GDB's register cache. If REGNUM is
125 -1, do this for all registers. */
126
127 void
128 fill_fpregset (const struct regcache *regcache,
129 elf_fpregset_t *fpregsetp, int regnum)
130 {
131 amd64_collect_fxsave (regcache, regnum, fpregsetp);
132 }
133 \f
134
135 /* Transferring arbitrary registers between GDB and inferior. */
136
137 /* Fetch register REGNUM from the child process. If REGNUM is -1, do
138 this for all registers (including the floating point and SSE
139 registers). */
140
141 void
142 amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
143 {
144 struct gdbarch *gdbarch = regcache->arch ();
145 int tid;
146
147 /* GNU/Linux LWP ID's are process ID's. */
148 tid = ptid_get_lwp (regcache_get_ptid (regcache));
149 if (tid == 0)
150 tid = ptid_get_pid (regcache_get_ptid (regcache)); /* Not a threaded program. */
151
152 if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
153 {
154 elf_gregset_t regs;
155
156 if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
157 perror_with_name (_("Couldn't get registers"));
158
159 amd64_supply_native_gregset (regcache, &regs, -1);
160 if (regnum != -1)
161 return;
162 }
163
164 if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
165 {
166 elf_fpregset_t fpregs;
167
168 if (have_ptrace_getregset == TRIBOOL_TRUE)
169 {
170 char xstateregs[X86_XSTATE_MAX_SIZE];
171 struct iovec iov;
172
173 iov.iov_base = xstateregs;
174 iov.iov_len = sizeof (xstateregs);
175 if (ptrace (PTRACE_GETREGSET, tid,
176 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
177 perror_with_name (_("Couldn't get extended state status"));
178
179 amd64_supply_xsave (regcache, -1, xstateregs);
180 }
181 else
182 {
183 if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
184 perror_with_name (_("Couldn't get floating point status"));
185
186 amd64_supply_fxsave (regcache, -1, &fpregs);
187 }
188 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
189 {
190 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
191 fs_base and gs_base fields of user_regs_struct can be
192 used directly. */
193 unsigned long base;
194
195 if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
196 {
197 if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_FS) < 0)
198 perror_with_name (_("Couldn't get segment register fs_base"));
199
200 regcache_raw_supply (regcache, AMD64_FSBASE_REGNUM, &base);
201 }
202
203 if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
204 {
205 if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_GS) < 0)
206 perror_with_name (_("Couldn't get segment register gs_base"));
207
208 regcache_raw_supply (regcache, AMD64_GSBASE_REGNUM, &base);
209 }
210 }
211 #endif
212 }
213 }
214
215 /* Store register REGNUM back into the child process. If REGNUM is
216 -1, do this for all registers (including the floating-point and SSE
217 registers). */
218
219 void
220 amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
221 {
222 struct gdbarch *gdbarch = regcache->arch ();
223 int tid;
224
225 /* GNU/Linux LWP ID's are process ID's. */
226 tid = ptid_get_lwp (regcache_get_ptid (regcache));
227 if (tid == 0)
228 tid = ptid_get_pid (regcache_get_ptid (regcache)); /* Not a threaded program. */
229
230 if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
231 {
232 elf_gregset_t regs;
233
234 if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
235 perror_with_name (_("Couldn't get registers"));
236
237 amd64_collect_native_gregset (regcache, &regs, regnum);
238
239 if (ptrace (PTRACE_SETREGS, tid, 0, (long) &regs) < 0)
240 perror_with_name (_("Couldn't write registers"));
241
242 if (regnum != -1)
243 return;
244 }
245
246 if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
247 {
248 elf_fpregset_t fpregs;
249
250 if (have_ptrace_getregset == TRIBOOL_TRUE)
251 {
252 char xstateregs[X86_XSTATE_MAX_SIZE];
253 struct iovec iov;
254
255 iov.iov_base = xstateregs;
256 iov.iov_len = sizeof (xstateregs);
257 if (ptrace (PTRACE_GETREGSET, tid,
258 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
259 perror_with_name (_("Couldn't get extended state status"));
260
261 amd64_collect_xsave (regcache, regnum, xstateregs, 0);
262
263 if (ptrace (PTRACE_SETREGSET, tid,
264 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
265 perror_with_name (_("Couldn't write extended state status"));
266 }
267 else
268 {
269 if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
270 perror_with_name (_("Couldn't get floating point status"));
271
272 amd64_collect_fxsave (regcache, regnum, &fpregs);
273
274 if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0)
275 perror_with_name (_("Couldn't write floating point status"));
276 }
277
278 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
279 {
280 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
281 fs_base and gs_base fields of user_regs_struct can be
282 used directly. */
283 void *base;
284
285 if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
286 {
287 regcache_raw_collect (regcache, AMD64_FSBASE_REGNUM, &base);
288
289 if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_FS) < 0)
290 perror_with_name (_("Couldn't write segment register fs_base"));
291 }
292 if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
293 {
294
295 regcache_raw_collect (regcache, AMD64_GSBASE_REGNUM, &base);
296 if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_GS) < 0)
297 perror_with_name (_("Couldn't write segment register gs_base"));
298 }
299 }
300 #endif
301 }
302 }
303 \f
304
305 /* This function is called by libthread_db as part of its handling of
306 a request for a thread's local storage address. */
307
308 ps_err_e
309 ps_get_thread_area (struct ps_prochandle *ph,
310 lwpid_t lwpid, int idx, void **base)
311 {
312 if (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 32)
313 {
314 unsigned int base_addr;
315 ps_err_e result;
316
317 result = x86_linux_get_thread_area (lwpid, (void *) (long) idx,
318 &base_addr);
319 if (result == PS_OK)
320 {
321 /* Extend the value to 64 bits. Here it's assumed that
322 a "long" and a "void *" are the same. */
323 (*base) = (void *) (long) base_addr;
324 }
325 return result;
326 }
327 else
328 {
329
330 /* FIXME: ezannoni-2003-07-09 see comment above about include
331 file order. We could be getting bogus values for these two. */
332 gdb_assert (FS < ELF_NGREG);
333 gdb_assert (GS < ELF_NGREG);
334 switch (idx)
335 {
336 case FS:
337 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
338 {
339 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
340 fs_base and gs_base fields of user_regs_struct can be
341 used directly. */
342 unsigned long fs;
343 errno = 0;
344 fs = ptrace (PTRACE_PEEKUSER, lwpid,
345 offsetof (struct user_regs_struct, fs_base), 0);
346 if (errno == 0)
347 {
348 *base = (void *) fs;
349 return PS_OK;
350 }
351 }
352 #endif
353 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0)
354 return PS_OK;
355 break;
356 case GS:
357 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_GS_BASE
358 {
359 unsigned long gs;
360 errno = 0;
361 gs = ptrace (PTRACE_PEEKUSER, lwpid,
362 offsetof (struct user_regs_struct, gs_base), 0);
363 if (errno == 0)
364 {
365 *base = (void *) gs;
366 return PS_OK;
367 }
368 }
369 #endif
370 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0)
371 return PS_OK;
372 break;
373 default: /* Should not happen. */
374 return PS_BADADDR;
375 }
376 }
377 return PS_ERR; /* ptrace failed. */
378 }
379 \f
380
381 /* Convert a ptrace/host siginfo object, into/from the siginfo in the
382 layout of the inferiors' architecture. Returns true if any
383 conversion was done; false otherwise. If DIRECTION is 1, then copy
384 from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
385 INF. */
386
387 static int
388 amd64_linux_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
389 {
390 struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
391
392 /* Is the inferior 32-bit? If so, then do fixup the siginfo
393 object. */
394 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
395 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
396 FIXUP_32);
397 /* No fixup for native x32 GDB. */
398 else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
399 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
400 FIXUP_X32);
401 else
402 return 0;
403 }
404
405 void
406 _initialize_amd64_linux_nat (void)
407 {
408 amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset;
409 amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS;
410 amd64_native_gregset64_reg_offset = amd64_linux_gregset_reg_offset;
411 amd64_native_gregset64_num_regs = AMD64_LINUX_NUM_REGS;
412
413 gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset)
414 == amd64_native_gregset32_num_regs);
415
416 linux_target = &the_amd64_linux_nat_target;
417
418 /* Add the target. */
419 x86_linux_add_target (linux_target);
420
421 /* Add our siginfo layout converter. */
422 linux_nat_set_siginfo_fixup (linux_target, amd64_linux_siginfo_fixup);
423 }
This page took 0.047589 seconds and 5 git commands to generate.