gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2015 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observer.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32
  33 #include <elf/common.h>
  34 #include <sys/user.h>
  35 #include <sys/ptrace.h>
  36 #include <sys/utsname.h>
  37 #include <sys/procfs.h>
  38
  39 /* Prototypes for supply_gregset etc.  */
  40 #include "gregset.h"
  41
  42 /* Defines ps_err_e, struct ps_prochandle.  */
  43 #include "gdb_proc_service.h"
  44
  45 #ifndef PTRACE_GET_THREAD_AREA
  46 #define PTRACE_GET_THREAD_AREA 22
  47 #endif
  48
  49 #ifndef PTRACE_GETWMMXREGS
  50 #define PTRACE_GETWMMXREGS 18
  51 #define PTRACE_SETWMMXREGS 19
  52 #endif
  53
  54 #ifndef PTRACE_GETVFPREGS
  55 #define PTRACE_GETVFPREGS 27
  56 #define PTRACE_SETVFPREGS 28
  57 #endif
  58
  59 #ifndef PTRACE_GETHBPREGS
  60 #define PTRACE_GETHBPREGS 29
  61 #define PTRACE_SETHBPREGS 30
  62 #endif
  63
  64 /* A flag for whether the WMMX registers are available.  */
  65 static int arm_linux_has_wmmx_registers;
  66
  67 /* The number of 64-bit VFP registers we have (expect this to be 0,
  68    16, or 32).  */
  69 static int arm_linux_vfp_register_count;
  70
  71 extern int arm_apcs_32;
  72
  73 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
  74    case we may be tracing more than one process at a time.  In that
  75    case, inferior_ptid will contain the main process ID and the
  76    individual thread (process) ID.  get_thread_id () is used to get
  77    the thread id if it's available, and the process id otherwise.  */
  78
  79 static int
  80 get_thread_id (ptid_t ptid)
  81 {
  82   int tid = ptid_get_lwp (ptid);
  83   if (0 == tid)
  84     tid = ptid_get_pid (ptid);
  85   return tid;
  86 }
  87
  88 #define GET_THREAD_ID(PTID)     get_thread_id (PTID)
  89
  90 /* Get the value of a particular register from the floating point
  91    state of the process and store it into regcache.  */
  92
  93 static void
  94 fetch_fpregister (struct regcache *regcache, int regno)
  95 {
  96   int ret, tid;
  97   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
  98
  99   /* Get the thread id for the ptrace call.  */
 100   tid = GET_THREAD_ID (inferior_ptid);
 101
 102   /* Read the floating point state.  */
 103   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 104   if (ret < 0)
 105     {
 106       warning (_("Unable to fetch floating point register."));
 107       return;
 108     }
 109
 110   /* Fetch fpsr.  */
 111   if (ARM_FPS_REGNUM == regno)
 112     regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 113                          fp + NWFPE_FPSR_OFFSET);
 114
 115   /* Fetch the floating point register.  */
 116   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 117     supply_nwfpe_register (regcache, regno, fp);
 118 }
 119
 120 /* Get the whole floating point state of the process and store it
 121    into regcache.  */
 122
 123 static void
 124 fetch_fpregs (struct regcache *regcache)
 125 {
 126   int ret, regno, tid;
 127   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 128
 129   /* Get the thread id for the ptrace call.  */
 130   tid = GET_THREAD_ID (inferior_ptid);
 131
 132   /* Read the floating point state.  */
 133   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 134   if (ret < 0)
 135     {
 136       warning (_("Unable to fetch the floating point registers."));
 137       return;
 138     }
 139
 140   /* Fetch fpsr.  */
 141   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 142                        fp + NWFPE_FPSR_OFFSET);
 143
 144   /* Fetch the floating point registers.  */
 145   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 146     supply_nwfpe_register (regcache, regno, fp);
 147 }
 148
 149 /* Save a particular register into the floating point state of the
 150    process using the contents from regcache.  */
 151
 152 static void
 153 store_fpregister (const struct regcache *regcache, int regno)
 154 {
 155   int ret, tid;
 156   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 157
 158   /* Get the thread id for the ptrace call.  */
 159   tid = GET_THREAD_ID (inferior_ptid);
 160
 161   /* Read the floating point state.  */
 162   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 163   if (ret < 0)
 164     {
 165       warning (_("Unable to fetch the floating point registers."));
 166       return;
 167     }
 168
 169   /* Store fpsr.  */
 170   if (ARM_FPS_REGNUM == regno
 171       && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 172     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 173
 174   /* Store the floating point register.  */
 175   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 176     collect_nwfpe_register (regcache, regno, fp);
 177
 178   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 179   if (ret < 0)
 180     {
 181       warning (_("Unable to store floating point register."));
 182       return;
 183     }
 184 }
 185
 186 /* Save the whole floating point state of the process using
 187    the contents from regcache.  */
 188
 189 static void
 190 store_fpregs (const struct regcache *regcache)
 191 {
 192   int ret, regno, tid;
 193   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 194
 195   /* Get the thread id for the ptrace call.  */
 196   tid = GET_THREAD_ID (inferior_ptid);
 197
 198   /* Read the floating point state.  */
 199   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 200   if (ret < 0)
 201     {
 202       warning (_("Unable to fetch the floating point registers."));
 203       return;
 204     }
 205
 206   /* Store fpsr.  */
 207   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 208     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 209
 210   /* Store the floating point registers.  */
 211   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 212     if (REG_VALID == regcache_register_status (regcache, regno))
 213       collect_nwfpe_register (regcache, regno, fp);
 214
 215   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 216   if (ret < 0)
 217     {
 218       warning (_("Unable to store floating point registers."));
 219       return;
 220     }
 221 }
 222
 223 /* Fetch a general register of the process and store into
 224    regcache.  */
 225
 226 static void
 227 fetch_register (struct regcache *regcache, int regno)
 228 {
 229   int ret, tid;
 230   elf_gregset_t regs;
 231
 232   /* Get the thread id for the ptrace call.  */
 233   tid = GET_THREAD_ID (inferior_ptid);
 234
 235   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 236   if (ret < 0)
 237     {
 238       warning (_("Unable to fetch general register."));
 239       return;
 240     }
 241
 242   if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
 243     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 244
 245   if (ARM_PS_REGNUM == regno)
 246     {
 247       if (arm_apcs_32)
 248         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 249                              (char *) &regs[ARM_CPSR_GREGNUM]);
 250       else
 251         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 252                              (char *) &regs[ARM_PC_REGNUM]);
 253     }
 254
 255   if (ARM_PC_REGNUM == regno)
 256     {
 257       regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 258                               (get_regcache_arch (regcache),
 259                                regs[ARM_PC_REGNUM]);
 260       regcache_raw_supply (regcache, ARM_PC_REGNUM,
 261                            (char *) &regs[ARM_PC_REGNUM]);
 262     }
 263 }
 264
 265 /* Fetch all general registers of the process and store into
 266    regcache.  */
 267
 268 static void
 269 fetch_regs (struct regcache *regcache)
 270 {
 271   int ret, regno, tid;
 272   elf_gregset_t regs;
 273
 274   /* Get the thread id for the ptrace call.  */
 275   tid = GET_THREAD_ID (inferior_ptid);
 276
 277   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 278   if (ret < 0)
 279     {
 280       warning (_("Unable to fetch general registers."));
 281       return;
 282     }
 283
 284   for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
 285     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 286
 287   if (arm_apcs_32)
 288     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 289                          (char *) &regs[ARM_CPSR_GREGNUM]);
 290   else
 291     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 292                          (char *) &regs[ARM_PC_REGNUM]);
 293
 294   regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 295                           (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
 296   regcache_raw_supply (regcache, ARM_PC_REGNUM,
 297                        (char *) &regs[ARM_PC_REGNUM]);
 298 }
 299
 300 /* Store all general registers of the process from the values in
 301    regcache.  */
 302
 303 static void
 304 store_register (const struct regcache *regcache, int regno)
 305 {
 306   int ret, tid;
 307   elf_gregset_t regs;
 308
 309   if (REG_VALID != regcache_register_status (regcache, regno))
 310     return;
 311
 312   /* Get the thread id for the ptrace call.  */
 313   tid = GET_THREAD_ID (inferior_ptid);
 314
 315   /* Get the general registers from the process.  */
 316   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 317   if (ret < 0)
 318     {
 319       warning (_("Unable to fetch general registers."));
 320       return;
 321     }
 322
 323   if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
 324     regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 325   else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
 326     regcache_raw_collect (regcache, regno,
 327                          (char *) &regs[ARM_CPSR_GREGNUM]);
 328   else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
 329     regcache_raw_collect (regcache, ARM_PC_REGNUM,
 330                          (char *) &regs[ARM_PC_REGNUM]);
 331
 332   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 333   if (ret < 0)
 334     {
 335       warning (_("Unable to store general register."));
 336       return;
 337     }
 338 }
 339
 340 static void
 341 store_regs (const struct regcache *regcache)
 342 {
 343   int ret, regno, tid;
 344   elf_gregset_t regs;
 345
 346   /* Get the thread id for the ptrace call.  */
 347   tid = GET_THREAD_ID (inferior_ptid);
 348
 349   /* Fetch the general registers.  */
 350   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 351   if (ret < 0)
 352     {
 353       warning (_("Unable to fetch general registers."));
 354       return;
 355     }
 356
 357   for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
 358     {
 359       if (REG_VALID == regcache_register_status (regcache, regno))
 360         regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 361     }
 362
 363   if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
 364     regcache_raw_collect (regcache, ARM_PS_REGNUM,
 365                          (char *) &regs[ARM_CPSR_GREGNUM]);
 366
 367   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 368
 369   if (ret < 0)
 370     {
 371       warning (_("Unable to store general registers."));
 372       return;
 373     }
 374 }
 375
 376 /* Fetch all WMMX registers of the process and store into
 377    regcache.  */
 378
 379 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 380
 381 static void
 382 fetch_wmmx_regs (struct regcache *regcache)
 383 {
 384   char regbuf[IWMMXT_REGS_SIZE];
 385   int ret, regno, tid;
 386
 387   /* Get the thread id for the ptrace call.  */
 388   tid = GET_THREAD_ID (inferior_ptid);
 389
 390   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 391   if (ret < 0)
 392     {
 393       warning (_("Unable to fetch WMMX registers."));
 394       return;
 395     }
 396
 397   for (regno = 0; regno < 16; regno++)
 398     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 399                          &regbuf[regno * 8]);
 400
 401   for (regno = 0; regno < 2; regno++)
 402     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 403                          &regbuf[16 * 8 + regno * 4]);
 404
 405   for (regno = 0; regno < 4; regno++)
 406     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 407                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 408 }
 409
 410 static void
 411 store_wmmx_regs (const struct regcache *regcache)
 412 {
 413   char regbuf[IWMMXT_REGS_SIZE];
 414   int ret, regno, tid;
 415
 416   /* Get the thread id for the ptrace call.  */
 417   tid = GET_THREAD_ID (inferior_ptid);
 418
 419   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 420   if (ret < 0)
 421     {
 422       warning (_("Unable to fetch WMMX registers."));
 423       return;
 424     }
 425
 426   for (regno = 0; regno < 16; regno++)
 427     if (REG_VALID == regcache_register_status (regcache,
 428                                                regno + ARM_WR0_REGNUM))
 429       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 430                             &regbuf[regno * 8]);
 431
 432   for (regno = 0; regno < 2; regno++)
 433     if (REG_VALID == regcache_register_status (regcache,
 434                                                regno + ARM_WCSSF_REGNUM))
 435       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 436                             &regbuf[16 * 8 + regno * 4]);
 437
 438   for (regno = 0; regno < 4; regno++)
 439     if (REG_VALID == regcache_register_status (regcache,
 440                                                regno + ARM_WCGR0_REGNUM))
 441       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 442                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 443
 444   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 445
 446   if (ret < 0)
 447     {
 448       warning (_("Unable to store WMMX registers."));
 449       return;
 450     }
 451 }
 452
 453 /* Fetch and store VFP Registers.  The kernel object has space for 32
 454    64-bit registers, and the FPSCR.  This is even when on a VFPv2 or
 455    VFPv3D16 target.  */
 456 #define VFP_REGS_SIZE (32 * 8 + 4)
 457
 458 static void
 459 fetch_vfp_regs (struct regcache *regcache)
 460 {
 461   char regbuf[VFP_REGS_SIZE];
 462   int ret, regno, tid;
 463
 464   /* Get the thread id for the ptrace call.  */
 465   tid = GET_THREAD_ID (inferior_ptid);
 466
 467   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 468   if (ret < 0)
 469     {
 470       warning (_("Unable to fetch VFP registers."));
 471       return;
 472     }
 473
 474   for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
 475     regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
 476                          (char *) regbuf + regno * 8);
 477
 478   regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
 479                        (char *) regbuf + 32 * 8);
 480 }
 481
 482 static void
 483 store_vfp_regs (const struct regcache *regcache)
 484 {
 485   char regbuf[VFP_REGS_SIZE];
 486   int ret, regno, tid;
 487
 488   /* Get the thread id for the ptrace call.  */
 489   tid = GET_THREAD_ID (inferior_ptid);
 490
 491   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 492   if (ret < 0)
 493     {
 494       warning (_("Unable to fetch VFP registers (for update)."));
 495       return;
 496     }
 497
 498   for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
 499     regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
 500                           (char *) regbuf + regno * 8);
 501
 502   regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
 503                         (char *) regbuf + 32 * 8);
 504
 505   ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 506
 507   if (ret < 0)
 508     {
 509       warning (_("Unable to store VFP registers."));
 510       return;
 511     }
 512 }
 513
 514 /* Fetch registers from the child process.  Fetch all registers if
 515    regno == -1, otherwise fetch all general registers or all floating
 516    point registers depending upon the value of regno.  */
 517
 518 static void
 519 arm_linux_fetch_inferior_registers (struct target_ops *ops,
 520                                     struct regcache *regcache, int regno)
 521 {
 522   if (-1 == regno)
 523     {
 524       fetch_regs (regcache);
 525       fetch_fpregs (regcache);
 526       if (arm_linux_has_wmmx_registers)
 527         fetch_wmmx_regs (regcache);
 528       if (arm_linux_vfp_register_count > 0)
 529         fetch_vfp_regs (regcache);
 530     }
 531   else
 532     {
 533       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 534         fetch_register (regcache, regno);
 535       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 536         fetch_fpregister (regcache, regno);
 537       else if (arm_linux_has_wmmx_registers
 538                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 539         fetch_wmmx_regs (regcache);
 540       else if (arm_linux_vfp_register_count > 0
 541                && regno >= ARM_D0_REGNUM
 542                && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
 543         fetch_vfp_regs (regcache);
 544     }
 545 }
 546
 547 /* Store registers back into the inferior.  Store all registers if
 548    regno == -1, otherwise store all general registers or all floating
 549    point registers depending upon the value of regno.  */
 550
 551 static void
 552 arm_linux_store_inferior_registers (struct target_ops *ops,
 553                                     struct regcache *regcache, int regno)
 554 {
 555   if (-1 == regno)
 556     {
 557       store_regs (regcache);
 558       store_fpregs (regcache);
 559       if (arm_linux_has_wmmx_registers)
 560         store_wmmx_regs (regcache);
 561       if (arm_linux_vfp_register_count > 0)
 562         store_vfp_regs (regcache);
 563     }
 564   else
 565     {
 566       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 567         store_register (regcache, regno);
 568       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 569         store_fpregister (regcache, regno);
 570       else if (arm_linux_has_wmmx_registers
 571                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 572         store_wmmx_regs (regcache);
 573       else if (arm_linux_vfp_register_count > 0
 574                && regno >= ARM_D0_REGNUM
 575                && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
 576         store_vfp_regs (regcache);
 577     }
 578 }
 579
 580 /* Wrapper functions for the standard regset handling, used by
 581    thread debugging.  */
 582
 583 void
 584 fill_gregset (const struct regcache *regcache,
 585               gdb_gregset_t *gregsetp, int regno)
 586 {
 587   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 588 }
 589
 590 void
 591 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 592 {
 593   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 594 }
 595
 596 void
 597 fill_fpregset (const struct regcache *regcache,
 598                gdb_fpregset_t *fpregsetp, int regno)
 599 {
 600   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 601 }
 602
 603 /* Fill GDB's register array with the floating-point register values
 604    in *fpregsetp.  */
 605
 606 void
 607 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 608 {
 609   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 610 }
 611
 612 /* Fetch the thread-local storage pointer for libthread_db.  */
 613
 614 ps_err_e
 615 ps_get_thread_area (const struct ps_prochandle *ph,
 616                     lwpid_t lwpid, int idx, void **base)
 617 {
 618   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 619     return PS_ERR;
 620
 621   /* IDX is the bias from the thread pointer to the beginning of the
 622      thread descriptor.  It has to be subtracted due to implementation
 623      quirks in libthread_db.  */
 624   *base = (void *) ((char *)*base - idx);
 625
 626   return PS_OK;
 627 }
 628
 629 static const struct target_desc *
 630 arm_linux_read_description (struct target_ops *ops)
 631 {
 632   CORE_ADDR arm_hwcap = 0;
 633   arm_linux_has_wmmx_registers = 0;
 634   arm_linux_vfp_register_count = 0;
 635
 636   if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
 637     {
 638       return ops->beneath->to_read_description (ops->beneath);
 639     }
 640
 641   if (arm_hwcap & HWCAP_IWMMXT)
 642     {
 643       arm_linux_has_wmmx_registers = 1;
 644       return tdesc_arm_with_iwmmxt;
 645     }
 646
 647   if (arm_hwcap & HWCAP_VFP)
 648     {
 649       int pid;
 650       char *buf;
 651       const struct target_desc * result = NULL;
 652
 653       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 654          Neon with VFPv3-D32.  */
 655       if (arm_hwcap & HWCAP_NEON)
 656         {
 657           arm_linux_vfp_register_count = 32;
 658           result = tdesc_arm_with_neon;
 659         }
 660       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 661         {
 662           arm_linux_vfp_register_count = 32;
 663           result = tdesc_arm_with_vfpv3;
 664         }
 665       else
 666         {
 667           arm_linux_vfp_register_count = 16;
 668           result = tdesc_arm_with_vfpv2;
 669         }
 670
 671       /* Now make sure that the kernel supports reading these
 672          registers.  Support was added in 2.6.30.  */
 673       pid = ptid_get_lwp (inferior_ptid);
 674       errno = 0;
 675       buf = alloca (VFP_REGS_SIZE);
 676       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 677           && errno == EIO)
 678         result = NULL;
 679
 680       return result;
 681     }
 682
 683   return ops->beneath->to_read_description (ops->beneath);
 684 }
 685
 686 /* Information describing the hardware breakpoint capabilities.  */
 687 struct arm_linux_hwbp_cap
 688 {
 689   gdb_byte arch;
 690   gdb_byte max_wp_length;
 691   gdb_byte wp_count;
 692   gdb_byte bp_count;
 693 };
 694
 695 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 696    assume a maximum number of supported break-/watchpoints.  */
 697 #define MAX_BPTS 16
 698 #define MAX_WPTS 16
 699
 700 /* Get hold of the Hardware Breakpoint information for the target we are
 701    attached to.  Returns NULL if the kernel doesn't support Hardware
 702    breakpoints at all, or a pointer to the information structure.  */
 703 static const struct arm_linux_hwbp_cap *
 704 arm_linux_get_hwbp_cap (void)
 705 {
 706   /* The info structure we return.  */
 707   static struct arm_linux_hwbp_cap info;
 708
 709   /* Is INFO in a good state?  -1 means that no attempt has been made to
 710      initialize INFO; 0 means an attempt has been made, but it failed; 1
 711      means INFO is in an initialized state.  */
 712   static int available = -1;
 713
 714   if (available == -1)
 715     {
 716       int tid;
 717       unsigned int val;
 718
 719       tid = GET_THREAD_ID (inferior_ptid);
 720       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 721         available = 0;
 722       else
 723         {
 724           info.arch = (gdb_byte)((val >> 24) & 0xff);
 725           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 726           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 727           info.bp_count = (gdb_byte)(val & 0xff);
 728
 729       if (info.wp_count > MAX_WPTS)
 730         {
 731           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 732                       supports %d"), MAX_WPTS, info.wp_count);
 733           info.wp_count = MAX_WPTS;
 734         }
 735
 736       if (info.bp_count > MAX_BPTS)
 737         {
 738           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 739                       supports %d"), MAX_BPTS, info.bp_count);
 740           info.bp_count = MAX_BPTS;
 741         }
 742           available = (info.arch != 0);
 743         }
 744     }
 745
 746   return available == 1 ? &info : NULL;
 747 }
 748
 749 /* How many hardware breakpoints are available?  */
 750 static int
 751 arm_linux_get_hw_breakpoint_count (void)
 752 {
 753   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 754   return cap != NULL ? cap->bp_count : 0;
 755 }
 756
 757 /* How many hardware watchpoints are available?  */
 758 static int
 759 arm_linux_get_hw_watchpoint_count (void)
 760 {
 761   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 762   return cap != NULL ? cap->wp_count : 0;
 763 }
 764
 765 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 766    there is not an appropriate resource available, otherwise returns 1.  */
 767 static int
 768 arm_linux_can_use_hw_breakpoint (struct target_ops *self,
 769                                  int type, int cnt, int ot)
 770 {
 771   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 772       || type == bp_access_watchpoint || type == bp_watchpoint)
 773     {
 774       int count = arm_linux_get_hw_watchpoint_count ();
 775
 776       if (count == 0)
 777         return 0;
 778       else if (cnt + ot > count)
 779         return -1;
 780     }
 781   else if (type == bp_hardware_breakpoint)
 782     {
 783       int count = arm_linux_get_hw_breakpoint_count ();
 784
 785       if (count == 0)
 786         return 0;
 787       else if (cnt > count)
 788         return -1;
 789     }
 790   else
 791     gdb_assert (FALSE);
 792
 793   return 1;
 794 }
 795
 796 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 797 typedef enum
 798 {
 799   arm_hwbp_break = 0,
 800   arm_hwbp_load = 1,
 801   arm_hwbp_store = 2,
 802   arm_hwbp_access = 3
 803 } arm_hwbp_type;
 804
 805 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 806 typedef unsigned int arm_hwbp_control_t;
 807
 808 /* Structure used to keep track of hardware break-/watch-points.  */
 809 struct arm_linux_hw_breakpoint
 810 {
 811   /* Address to break on, or being watched.  */
 812   unsigned int address;
 813   /* Control register for break-/watch- point.  */
 814   arm_hwbp_control_t control;
 815 };
 816
 817 /* Structure containing arrays of per process hardware break-/watchpoints
 818    for caching address and control information.
 819
 820    The Linux ptrace interface to hardware break-/watch-points presents the
 821    values in a vector centred around 0 (which is used fo generic information).
 822    Positive indicies refer to breakpoint addresses/control registers, negative
 823    indices to watchpoint addresses/control registers.
 824
 825    The Linux vector is indexed as follows:
 826       -((i << 1) + 2): Control register for watchpoint i.
 827       -((i << 1) + 1): Address register for watchpoint i.
 828                     0: Information register.
 829        ((i << 1) + 1): Address register for breakpoint i.
 830        ((i << 1) + 2): Control register for breakpoint i.
 831
 832    This structure is used as a per-thread cache of the state stored by the
 833    kernel, so that we don't need to keep calling into the kernel to find a
 834    free breakpoint.
 835
 836    We treat break-/watch-points with their enable bit clear as being deleted.
 837    */
 838 struct arm_linux_debug_reg_state
 839 {
 840   /* Hardware breakpoints for this process.  */
 841   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 842   /* Hardware watchpoints for this process.  */
 843   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 844 };
 845
 846 /* Per-process arch-specific data we want to keep.  */
 847 struct arm_linux_process_info
 848 {
 849   /* Linked list.  */
 850   struct arm_linux_process_info *next;
 851   /* The process identifier.  */
 852   pid_t pid;
 853   /* Hardware break-/watchpoints state information.  */
 854   struct arm_linux_debug_reg_state state;
 855
 856 };
 857
 858 /* Per-thread arch-specific data we want to keep.  */
 859 struct arch_lwp_info
 860 {
 861   /* Non-zero if our copy differs from what's recorded in the thread.  */
 862   char bpts_changed[MAX_BPTS];
 863   char wpts_changed[MAX_WPTS];
 864 };
 865
 866 static struct arm_linux_process_info *arm_linux_process_list = NULL;
 867
 868 /* Find process data for process PID.  */
 869
 870 static struct arm_linux_process_info *
 871 arm_linux_find_process_pid (pid_t pid)
 872 {
 873   struct arm_linux_process_info *proc;
 874
 875   for (proc = arm_linux_process_list; proc; proc = proc->next)
 876     if (proc->pid == pid)
 877       return proc;
 878
 879   return NULL;
 880 }
 881
 882 /* Add process data for process PID.  Returns newly allocated info
 883    object.  */
 884
 885 static struct arm_linux_process_info *
 886 arm_linux_add_process (pid_t pid)
 887 {
 888   struct arm_linux_process_info *proc;
 889
 890   proc = xcalloc (1, sizeof (*proc));
 891   proc->pid = pid;
 892
 893   proc->next = arm_linux_process_list;
 894   arm_linux_process_list = proc;
 895
 896   return proc;
 897 }
 898
 899 /* Get data specific info for process PID, creating it if necessary.
 900    Never returns NULL.  */
 901
 902 static struct arm_linux_process_info *
 903 arm_linux_process_info_get (pid_t pid)
 904 {
 905   struct arm_linux_process_info *proc;
 906
 907   proc = arm_linux_find_process_pid (pid);
 908   if (proc == NULL)
 909     proc = arm_linux_add_process (pid);
 910
 911   return proc;
 912 }
 913
 914 /* Called whenever GDB is no longer debugging process PID.  It deletes
 915    data structures that keep track of debug register state.  */
 916
 917 static void
 918 arm_linux_forget_process (pid_t pid)
 919 {
 920   struct arm_linux_process_info *proc, **proc_link;
 921
 922   proc = arm_linux_process_list;
 923   proc_link = &arm_linux_process_list;
 924
 925   while (proc != NULL)
 926     {
 927       if (proc->pid == pid)
 928     {
 929       *proc_link = proc->next;
 930
 931       xfree (proc);
 932       return;
 933     }
 934
 935       proc_link = &proc->next;
 936       proc = *proc_link;
 937     }
 938 }
 939
 940 /* Get hardware break-/watchpoint state for process PID.  */
 941
 942 static struct arm_linux_debug_reg_state *
 943 arm_linux_get_debug_reg_state (pid_t pid)
 944 {
 945   return &arm_linux_process_info_get (pid)->state;
 946 }
 947
 948 /* Initialize an ARM hardware break-/watch-point control register value.
 949    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 950    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 951    */
 952 static arm_hwbp_control_t
 953 arm_hwbp_control_initialize (unsigned byte_address_select,
 954                              arm_hwbp_type hwbp_type,
 955                              int enable)
 956 {
 957   gdb_assert ((byte_address_select & ~0xffU) == 0);
 958   gdb_assert (hwbp_type != arm_hwbp_break
 959               || ((byte_address_select & 0xfU) != 0));
 960
 961   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 962 }
 963
 964 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 965 static int
 966 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 967 {
 968   return control & 0x1;
 969 }
 970
 971 /* Change a breakpoint control word so that it is in the disabled state.  */
 972 static arm_hwbp_control_t
 973 arm_hwbp_control_disable (arm_hwbp_control_t control)
 974 {
 975   return control & ~0x1;
 976 }
 977
 978 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 979    enabled, and will point to the placed address of BP_TGT.  */
 980 static void
 981 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 982                                     struct bp_target_info *bp_tgt,
 983                                     struct arm_linux_hw_breakpoint *p)
 984 {
 985   unsigned mask;
 986   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
 987
 988   /* We have to create a mask for the control register which says which bits
 989      of the word pointed to by address to break on.  */
 990   if (arm_pc_is_thumb (gdbarch, address))
 991     {
 992       mask = 0x3;
 993       address &= ~1;
 994     }
 995   else
 996     {
 997       mask = 0xf;
 998       address &= ~3;
 999     }
1000
1001   p->address = (unsigned int) address;
1002   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
1003 }
1004
1005 /* Get the ARM hardware breakpoint type from the RW value we're given when
1006    asked to set a watchpoint.  */
1007 static arm_hwbp_type
1008 arm_linux_get_hwbp_type (int rw)
1009 {
1010   if (rw == hw_read)
1011     return arm_hwbp_load;
1012   else if (rw == hw_write)
1013     return arm_hwbp_store;
1014   else
1015     return arm_hwbp_access;
1016 }
1017
1018 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
1019    to LEN.  The type of watchpoint is given in RW.  */
1020 static void
1021 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
1022                                     struct arm_linux_hw_breakpoint *p)
1023 {
1024   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1025   unsigned mask;
1026
1027   gdb_assert (cap != NULL);
1028   gdb_assert (cap->max_wp_length != 0);
1029
1030   mask = (1 << len) - 1;
1031
1032   p->address = (unsigned int) addr;
1033   p->control = arm_hwbp_control_initialize (mask,
1034                                             arm_linux_get_hwbp_type (rw), 1);
1035 }
1036
1037 /* Are two break-/watch-points equal?  */
1038 static int
1039 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
1040                                const struct arm_linux_hw_breakpoint *p2)
1041 {
1042   return p1->address == p2->address && p1->control == p2->control;
1043 }
1044
1045 /* Callback to mark a watch-/breakpoint to be updated in all threads of
1046    the current process.  */
1047
1048 struct update_registers_data
1049 {
1050   int watch;
1051   int index;
1052 };
1053
1054 static int
1055 update_registers_callback (struct lwp_info *lwp, void *arg)
1056 {
1057   struct update_registers_data *data = (struct update_registers_data *) arg;
1058
1059   if (lwp->arch_private == NULL)
1060     lwp->arch_private = XCNEW (struct arch_lwp_info);
1061
1062   /* The actual update is done later just before resuming the lwp,
1063      we just mark that the registers need updating.  */
1064   if (data->watch)
1065     lwp->arch_private->wpts_changed[data->index] = 1;
1066   else
1067     lwp->arch_private->bpts_changed[data->index] = 1;
1068
1069   /* If the lwp isn't stopped, force it to momentarily pause, so
1070      we can update its breakpoint registers.  */
1071   if (!lwp->stopped)
1072     linux_stop_lwp (lwp);
1073
1074   return 0;
1075 }
1076
1077 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
1078    =1) BPT for thread TID.  */
1079 static void
1080 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
1081                                  int watchpoint)
1082 {
1083   int pid;
1084   ptid_t pid_ptid;
1085   gdb_byte count, i;
1086   struct arm_linux_hw_breakpoint* bpts;
1087   struct update_registers_data data;
1088
1089   pid = ptid_get_pid (inferior_ptid);
1090   pid_ptid = pid_to_ptid (pid);
1091
1092   if (watchpoint)
1093     {
1094       count = arm_linux_get_hw_watchpoint_count ();
1095       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1096     }
1097   else
1098     {
1099       count = arm_linux_get_hw_breakpoint_count ();
1100       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1101     }
1102
1103   for (i = 0; i < count; ++i)
1104     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1105       {
1106         data.watch = watchpoint;
1107         data.index = i;
1108         bpts[i] = *bpt;
1109         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1110         break;
1111       }
1112
1113   gdb_assert (i != count);
1114 }
1115
1116 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1117    (WATCHPOINT = 1) BPT for thread TID.  */
1118 static void
1119 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1120                                  int watchpoint)
1121 {
1122   int pid;
1123   gdb_byte count, i;
1124   ptid_t pid_ptid;
1125   struct arm_linux_hw_breakpoint* bpts;
1126   struct update_registers_data data;
1127
1128   pid = ptid_get_pid (inferior_ptid);
1129   pid_ptid = pid_to_ptid (pid);
1130
1131   if (watchpoint)
1132     {
1133       count = arm_linux_get_hw_watchpoint_count ();
1134       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1135     }
1136   else
1137     {
1138       count = arm_linux_get_hw_breakpoint_count ();
1139       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1140     }
1141
1142   for (i = 0; i < count; ++i)
1143     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1144       {
1145         data.watch = watchpoint;
1146         data.index = i;
1147         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1148         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1149         break;
1150       }
1151
1152   gdb_assert (i != count);
1153 }
1154
1155 /* Insert a Hardware breakpoint.  */
1156 static int
1157 arm_linux_insert_hw_breakpoint (struct target_ops *self,
1158                                 struct gdbarch *gdbarch,
1159                                 struct bp_target_info *bp_tgt)
1160 {
1161   struct lwp_info *lp;
1162   struct arm_linux_hw_breakpoint p;
1163
1164   if (arm_linux_get_hw_breakpoint_count () == 0)
1165     return -1;
1166
1167   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1168
1169   arm_linux_insert_hw_breakpoint1 (&p, 0);
1170
1171   return 0;
1172 }
1173
1174 /* Remove a hardware breakpoint.  */
1175 static int
1176 arm_linux_remove_hw_breakpoint (struct target_ops *self,
1177                                 struct gdbarch *gdbarch,
1178                                 struct bp_target_info *bp_tgt)
1179 {
1180   struct lwp_info *lp;
1181   struct arm_linux_hw_breakpoint p;
1182
1183   if (arm_linux_get_hw_breakpoint_count () == 0)
1184     return -1;
1185
1186   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1187
1188   arm_linux_remove_hw_breakpoint1 (&p, 0);
1189
1190   return 0;
1191 }
1192
1193 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1194    ADDR?  */
1195 static int
1196 arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
1197                                        CORE_ADDR addr, int len)
1198 {
1199   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1200   CORE_ADDR max_wp_length, aligned_addr;
1201
1202   /* Can not set watchpoints for zero or negative lengths.  */
1203   if (len <= 0)
1204     return 0;
1205
1206   /* Need to be able to use the ptrace interface.  */
1207   if (cap == NULL || cap->wp_count == 0)
1208     return 0;
1209
1210   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1211      range covered by a watchpoint.  */
1212   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1213   aligned_addr = addr & ~(max_wp_length - 1);
1214
1215   if (aligned_addr + max_wp_length < addr + len)
1216     return 0;
1217
1218   /* The current ptrace interface can only handle watchpoints that are a
1219      power of 2.  */
1220   if ((len & (len - 1)) != 0)
1221     return 0;
1222
1223   /* All tests passed so we must be able to set a watchpoint.  */
1224   return 1;
1225 }
1226
1227 /* Insert a Hardware breakpoint.  */
1228 static int
1229 arm_linux_insert_watchpoint (struct target_ops *self,
1230                              CORE_ADDR addr, int len, int rw,
1231                              struct expression *cond)
1232 {
1233   struct lwp_info *lp;
1234   struct arm_linux_hw_breakpoint p;
1235
1236   if (arm_linux_get_hw_watchpoint_count () == 0)
1237     return -1;
1238
1239   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1240
1241   arm_linux_insert_hw_breakpoint1 (&p, 1);
1242
1243   return 0;
1244 }
1245
1246 /* Remove a hardware breakpoint.  */
1247 static int
1248 arm_linux_remove_watchpoint (struct target_ops *self,
1249                              CORE_ADDR addr, int len, int rw,
1250                              struct expression *cond)
1251 {
1252   struct lwp_info *lp;
1253   struct arm_linux_hw_breakpoint p;
1254
1255   if (arm_linux_get_hw_watchpoint_count () == 0)
1256     return -1;
1257
1258   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1259
1260   arm_linux_remove_hw_breakpoint1 (&p, 1);
1261
1262   return 0;
1263 }
1264
1265 /* What was the data address the target was stopped on accessing.  */
1266 static int
1267 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1268 {
1269   siginfo_t siginfo;
1270   int slot;
1271
1272   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1273     return 0;
1274
1275   /* This must be a hardware breakpoint.  */
1276   if (siginfo.si_signo != SIGTRAP
1277       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1278     return 0;
1279
1280   /* We must be able to set hardware watchpoints.  */
1281   if (arm_linux_get_hw_watchpoint_count () == 0)
1282     return 0;
1283
1284   slot = siginfo.si_errno;
1285
1286   /* If we are in a positive slot then we're looking at a breakpoint and not
1287      a watchpoint.  */
1288   if (slot >= 0)
1289     return 0;
1290
1291   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1292   return 1;
1293 }
1294
1295 /* Has the target been stopped by hitting a watchpoint?  */
1296 static int
1297 arm_linux_stopped_by_watchpoint (struct target_ops *ops)
1298 {
1299   CORE_ADDR addr;
1300   return arm_linux_stopped_data_address (ops, &addr);
1301 }
1302
1303 static int
1304 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1305                                         CORE_ADDR addr,
1306                                         CORE_ADDR start, int length)
1307 {
1308   return start <= addr && start + length - 1 >= addr;
1309 }
1310
1311 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1312    in the parent thread to the child thread.  */
1313 static void
1314 arm_linux_new_thread (struct lwp_info *lp)
1315 {
1316   int i;
1317   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1318
1319   /* Mark that all the hardware breakpoint/watchpoint register pairs
1320      for this thread need to be initialized.  */
1321
1322   for (i = 0; i < MAX_BPTS; i++)
1323     {
1324       info->bpts_changed[i] = 1;
1325       info->wpts_changed[i] = 1;
1326     }
1327
1328   lp->arch_private = info;
1329 }
1330
1331 /* Called when resuming a thread.
1332    The hardware debug registers are updated when there is any change.  */
1333
1334 static void
1335 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1336 {
1337   int pid, i;
1338   struct arm_linux_hw_breakpoint *bpts, *wpts;
1339   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1340
1341   pid = ptid_get_lwp (lwp->ptid);
1342   bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1343   wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1344
1345   /* NULL means this is the main thread still going through the shell,
1346      or, no watchpoint has been set yet.  In that case, there's
1347      nothing to do.  */
1348   if (arm_lwp_info == NULL)
1349     return;
1350
1351   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1352     if (arm_lwp_info->bpts_changed[i])
1353       {
1354         errno = 0;
1355         if (arm_hwbp_control_is_enabled (bpts[i].control))
1356           if (ptrace (PTRACE_SETHBPREGS, pid,
1357               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1358             perror_with_name (_("Unexpected error setting breakpoint"));
1359
1360         if (bpts[i].control != 0)
1361           if (ptrace (PTRACE_SETHBPREGS, pid,
1362               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1363             perror_with_name (_("Unexpected error setting breakpoint"));
1364
1365         arm_lwp_info->bpts_changed[i] = 0;
1366       }
1367
1368   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1369     if (arm_lwp_info->wpts_changed[i])
1370       {
1371         errno = 0;
1372         if (arm_hwbp_control_is_enabled (wpts[i].control))
1373           if (ptrace (PTRACE_SETHBPREGS, pid,
1374               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1375             perror_with_name (_("Unexpected error setting watchpoint"));
1376
1377         if (wpts[i].control != 0)
1378           if (ptrace (PTRACE_SETHBPREGS, pid,
1379               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1380             perror_with_name (_("Unexpected error setting watchpoint"));
1381
1382         arm_lwp_info->wpts_changed[i] = 0;
1383       }
1384 }
1385
1386 /* linux_nat_new_fork hook.  */
1387
1388 static void
1389 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1390 {
1391   pid_t parent_pid;
1392   struct arm_linux_debug_reg_state *parent_state;
1393   struct arm_linux_debug_reg_state *child_state;
1394
1395   /* NULL means no watchpoint has ever been set in the parent.  In
1396      that case, there's nothing to do.  */
1397   if (parent->arch_private == NULL)
1398     return;
1399
1400   /* GDB core assumes the child inherits the watchpoints/hw
1401      breakpoints of the parent, and will remove them all from the
1402      forked off process.  Copy the debug registers mirrors into the
1403      new process so that all breakpoints and watchpoints can be
1404      removed together.  */
1405
1406   parent_pid = ptid_get_pid (parent->ptid);
1407   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1408   child_state = arm_linux_get_debug_reg_state (child_pid);
1409   *child_state = *parent_state;
1410 }
1411
1412 void _initialize_arm_linux_nat (void);
1413
1414 void
1415 _initialize_arm_linux_nat (void)
1416 {
1417   struct target_ops *t;
1418
1419   /* Fill in the generic GNU/Linux methods.  */
1420   t = linux_target ();
1421
1422   /* Add our register access methods.  */
1423   t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1424   t->to_store_registers = arm_linux_store_inferior_registers;
1425
1426   /* Add our hardware breakpoint and watchpoint implementation.  */
1427   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1428   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1429   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1430   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1431   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1432   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1433   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1434   t->to_stopped_data_address = arm_linux_stopped_data_address;
1435   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1436
1437   t->to_read_description = arm_linux_read_description;
1438
1439   /* Register the target.  */
1440   linux_nat_add_target (t);
1441
1442   /* Handle thread creation and exit.  */
1443   linux_nat_set_new_thread (t, arm_linux_new_thread);
1444   linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1445
1446   /* Handle process creation and exit.  */
1447   linux_nat_set_new_fork (t, arm_linux_new_fork);
1448   linux_nat_set_forget_process (t, arm_linux_forget_process);
1449 }