gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2014 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observer.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32
  33 #include <elf/common.h>
  34 #include <sys/user.h>
  35 #include <sys/ptrace.h>
  36 #include <sys/utsname.h>
  37 #include <sys/procfs.h>
  38
  39 /* Prototypes for supply_gregset etc.  */
  40 #include "gregset.h"
  41
  42 /* Defines ps_err_e, struct ps_prochandle.  */
  43 #include "gdb_proc_service.h"
  44
  45 #ifndef PTRACE_GET_THREAD_AREA
  46 #define PTRACE_GET_THREAD_AREA 22
  47 #endif
  48
  49 #ifndef PTRACE_GETWMMXREGS
  50 #define PTRACE_GETWMMXREGS 18
  51 #define PTRACE_SETWMMXREGS 19
  52 #endif
  53
  54 #ifndef PTRACE_GETVFPREGS
  55 #define PTRACE_GETVFPREGS 27
  56 #define PTRACE_SETVFPREGS 28
  57 #endif
  58
  59 #ifndef PTRACE_GETHBPREGS
  60 #define PTRACE_GETHBPREGS 29
  61 #define PTRACE_SETHBPREGS 30
  62 #endif
  63
  64 /* A flag for whether the WMMX registers are available.  */
  65 static int arm_linux_has_wmmx_registers;
  66
  67 /* The number of 64-bit VFP registers we have (expect this to be 0,
  68    16, or 32).  */
  69 static int arm_linux_vfp_register_count;
  70
  71 extern int arm_apcs_32;
  72
  73 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
  74    case we may be tracing more than one process at a time.  In that
  75    case, inferior_ptid will contain the main process ID and the
  76    individual thread (process) ID.  get_thread_id () is used to get
  77    the thread id if it's available, and the process id otherwise.  */
  78
  79 static int
  80 get_thread_id (ptid_t ptid)
  81 {
  82   int tid = ptid_get_lwp (ptid);
  83   if (0 == tid)
  84     tid = ptid_get_pid (ptid);
  85   return tid;
  86 }
  87
  88 #define GET_THREAD_ID(PTID)     get_thread_id (PTID)
  89
  90 /* Get the value of a particular register from the floating point
  91    state of the process and store it into regcache.  */
  92
  93 static void
  94 fetch_fpregister (struct regcache *regcache, int regno)
  95 {
  96   int ret, tid;
  97   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
  98
  99   /* Get the thread id for the ptrace call.  */
 100   tid = GET_THREAD_ID (inferior_ptid);
 101
 102   /* Read the floating point state.  */
 103   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 104   if (ret < 0)
 105     {
 106       warning (_("Unable to fetch floating point register."));
 107       return;
 108     }
 109
 110   /* Fetch fpsr.  */
 111   if (ARM_FPS_REGNUM == regno)
 112     regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 113                          fp + NWFPE_FPSR_OFFSET);
 114
 115   /* Fetch the floating point register.  */
 116   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 117     supply_nwfpe_register (regcache, regno, fp);
 118 }
 119
 120 /* Get the whole floating point state of the process and store it
 121    into regcache.  */
 122
 123 static void
 124 fetch_fpregs (struct regcache *regcache)
 125 {
 126   int ret, regno, tid;
 127   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 128
 129   /* Get the thread id for the ptrace call.  */
 130   tid = GET_THREAD_ID (inferior_ptid);
 131
 132   /* Read the floating point state.  */
 133   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 134   if (ret < 0)
 135     {
 136       warning (_("Unable to fetch the floating point registers."));
 137       return;
 138     }
 139
 140   /* Fetch fpsr.  */
 141   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 142                        fp + NWFPE_FPSR_OFFSET);
 143
 144   /* Fetch the floating point registers.  */
 145   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 146     supply_nwfpe_register (regcache, regno, fp);
 147 }
 148
 149 /* Save a particular register into the floating point state of the
 150    process using the contents from regcache.  */
 151
 152 static void
 153 store_fpregister (const struct regcache *regcache, int regno)
 154 {
 155   int ret, tid;
 156   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 157
 158   /* Get the thread id for the ptrace call.  */
 159   tid = GET_THREAD_ID (inferior_ptid);
 160
 161   /* Read the floating point state.  */
 162   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 163   if (ret < 0)
 164     {
 165       warning (_("Unable to fetch the floating point registers."));
 166       return;
 167     }
 168
 169   /* Store fpsr.  */
 170   if (ARM_FPS_REGNUM == regno
 171       && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 172     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 173
 174   /* Store the floating point register.  */
 175   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 176     collect_nwfpe_register (regcache, regno, fp);
 177
 178   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 179   if (ret < 0)
 180     {
 181       warning (_("Unable to store floating point register."));
 182       return;
 183     }
 184 }
 185
 186 /* Save the whole floating point state of the process using
 187    the contents from regcache.  */
 188
 189 static void
 190 store_fpregs (const struct regcache *regcache)
 191 {
 192   int ret, regno, tid;
 193   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 194
 195   /* Get the thread id for the ptrace call.  */
 196   tid = GET_THREAD_ID (inferior_ptid);
 197
 198   /* Read the floating point state.  */
 199   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 200   if (ret < 0)
 201     {
 202       warning (_("Unable to fetch the floating point registers."));
 203       return;
 204     }
 205
 206   /* Store fpsr.  */
 207   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 208     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 209
 210   /* Store the floating point registers.  */
 211   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 212     if (REG_VALID == regcache_register_status (regcache, regno))
 213       collect_nwfpe_register (regcache, regno, fp);
 214
 215   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 216   if (ret < 0)
 217     {
 218       warning (_("Unable to store floating point registers."));
 219       return;
 220     }
 221 }
 222
 223 /* Fetch a general register of the process and store into
 224    regcache.  */
 225
 226 static void
 227 fetch_register (struct regcache *regcache, int regno)
 228 {
 229   int ret, tid;
 230   elf_gregset_t regs;
 231
 232   /* Get the thread id for the ptrace call.  */
 233   tid = GET_THREAD_ID (inferior_ptid);
 234
 235   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 236   if (ret < 0)
 237     {
 238       warning (_("Unable to fetch general register."));
 239       return;
 240     }
 241
 242   if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
 243     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 244
 245   if (ARM_PS_REGNUM == regno)
 246     {
 247       if (arm_apcs_32)
 248         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 249                              (char *) &regs[ARM_CPSR_GREGNUM]);
 250       else
 251         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 252                              (char *) &regs[ARM_PC_REGNUM]);
 253     }
 254
 255   if (ARM_PC_REGNUM == regno)
 256     {
 257       regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 258                               (get_regcache_arch (regcache),
 259                                regs[ARM_PC_REGNUM]);
 260       regcache_raw_supply (regcache, ARM_PC_REGNUM,
 261                            (char *) &regs[ARM_PC_REGNUM]);
 262     }
 263 }
 264
 265 /* Fetch all general registers of the process and store into
 266    regcache.  */
 267
 268 static void
 269 fetch_regs (struct regcache *regcache)
 270 {
 271   int ret, regno, tid;
 272   elf_gregset_t regs;
 273
 274   /* Get the thread id for the ptrace call.  */
 275   tid = GET_THREAD_ID (inferior_ptid);
 276
 277   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 278   if (ret < 0)
 279     {
 280       warning (_("Unable to fetch general registers."));
 281       return;
 282     }
 283
 284   for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
 285     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 286
 287   if (arm_apcs_32)
 288     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 289                          (char *) &regs[ARM_CPSR_GREGNUM]);
 290   else
 291     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 292                          (char *) &regs[ARM_PC_REGNUM]);
 293
 294   regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 295                           (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
 296   regcache_raw_supply (regcache, ARM_PC_REGNUM,
 297                        (char *) &regs[ARM_PC_REGNUM]);
 298 }
 299
 300 /* Store all general registers of the process from the values in
 301    regcache.  */
 302
 303 static void
 304 store_register (const struct regcache *regcache, int regno)
 305 {
 306   int ret, tid;
 307   elf_gregset_t regs;
 308
 309   if (REG_VALID != regcache_register_status (regcache, regno))
 310     return;
 311
 312   /* Get the thread id for the ptrace call.  */
 313   tid = GET_THREAD_ID (inferior_ptid);
 314
 315   /* Get the general registers from the process.  */
 316   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 317   if (ret < 0)
 318     {
 319       warning (_("Unable to fetch general registers."));
 320       return;
 321     }
 322
 323   if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
 324     regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 325   else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
 326     regcache_raw_collect (regcache, regno,
 327                          (char *) &regs[ARM_CPSR_GREGNUM]);
 328   else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
 329     regcache_raw_collect (regcache, ARM_PC_REGNUM,
 330                          (char *) &regs[ARM_PC_REGNUM]);
 331
 332   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 333   if (ret < 0)
 334     {
 335       warning (_("Unable to store general register."));
 336       return;
 337     }
 338 }
 339
 340 static void
 341 store_regs (const struct regcache *regcache)
 342 {
 343   int ret, regno, tid;
 344   elf_gregset_t regs;
 345
 346   /* Get the thread id for the ptrace call.  */
 347   tid = GET_THREAD_ID (inferior_ptid);
 348
 349   /* Fetch the general registers.  */
 350   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 351   if (ret < 0)
 352     {
 353       warning (_("Unable to fetch general registers."));
 354       return;
 355     }
 356
 357   for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
 358     {
 359       if (REG_VALID == regcache_register_status (regcache, regno))
 360         regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 361     }
 362
 363   if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
 364     regcache_raw_collect (regcache, ARM_PS_REGNUM,
 365                          (char *) &regs[ARM_CPSR_GREGNUM]);
 366
 367   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 368
 369   if (ret < 0)
 370     {
 371       warning (_("Unable to store general registers."));
 372       return;
 373     }
 374 }
 375
 376 /* Fetch all WMMX registers of the process and store into
 377    regcache.  */
 378
 379 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 380
 381 static void
 382 fetch_wmmx_regs (struct regcache *regcache)
 383 {
 384   char regbuf[IWMMXT_REGS_SIZE];
 385   int ret, regno, tid;
 386
 387   /* Get the thread id for the ptrace call.  */
 388   tid = GET_THREAD_ID (inferior_ptid);
 389
 390   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 391   if (ret < 0)
 392     {
 393       warning (_("Unable to fetch WMMX registers."));
 394       return;
 395     }
 396
 397   for (regno = 0; regno < 16; regno++)
 398     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 399                          &regbuf[regno * 8]);
 400
 401   for (regno = 0; regno < 2; regno++)
 402     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 403                          &regbuf[16 * 8 + regno * 4]);
 404
 405   for (regno = 0; regno < 4; regno++)
 406     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 407                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 408 }
 409
 410 static void
 411 store_wmmx_regs (const struct regcache *regcache)
 412 {
 413   char regbuf[IWMMXT_REGS_SIZE];
 414   int ret, regno, tid;
 415
 416   /* Get the thread id for the ptrace call.  */
 417   tid = GET_THREAD_ID (inferior_ptid);
 418
 419   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 420   if (ret < 0)
 421     {
 422       warning (_("Unable to fetch WMMX registers."));
 423       return;
 424     }
 425
 426   for (regno = 0; regno < 16; regno++)
 427     if (REG_VALID == regcache_register_status (regcache,
 428                                                regno + ARM_WR0_REGNUM))
 429       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 430                             &regbuf[regno * 8]);
 431
 432   for (regno = 0; regno < 2; regno++)
 433     if (REG_VALID == regcache_register_status (regcache,
 434                                                regno + ARM_WCSSF_REGNUM))
 435       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 436                             &regbuf[16 * 8 + regno * 4]);
 437
 438   for (regno = 0; regno < 4; regno++)
 439     if (REG_VALID == regcache_register_status (regcache,
 440                                                regno + ARM_WCGR0_REGNUM))
 441       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 442                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 443
 444   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 445
 446   if (ret < 0)
 447     {
 448       warning (_("Unable to store WMMX registers."));
 449       return;
 450     }
 451 }
 452
 453 /* Fetch and store VFP Registers.  The kernel object has space for 32
 454    64-bit registers, and the FPSCR.  This is even when on a VFPv2 or
 455    VFPv3D16 target.  */
 456 #define VFP_REGS_SIZE (32 * 8 + 4)
 457
 458 static void
 459 fetch_vfp_regs (struct regcache *regcache)
 460 {
 461   char regbuf[VFP_REGS_SIZE];
 462   int ret, regno, tid;
 463
 464   /* Get the thread id for the ptrace call.  */
 465   tid = GET_THREAD_ID (inferior_ptid);
 466
 467   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 468   if (ret < 0)
 469     {
 470       warning (_("Unable to fetch VFP registers."));
 471       return;
 472     }
 473
 474   for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
 475     regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
 476                          (char *) regbuf + regno * 8);
 477
 478   regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
 479                        (char *) regbuf + 32 * 8);
 480 }
 481
 482 static void
 483 store_vfp_regs (const struct regcache *regcache)
 484 {
 485   char regbuf[VFP_REGS_SIZE];
 486   int ret, regno, tid;
 487
 488   /* Get the thread id for the ptrace call.  */
 489   tid = GET_THREAD_ID (inferior_ptid);
 490
 491   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 492   if (ret < 0)
 493     {
 494       warning (_("Unable to fetch VFP registers (for update)."));
 495       return;
 496     }
 497
 498   for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
 499     regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
 500                           (char *) regbuf + regno * 8);
 501
 502   regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
 503                         (char *) regbuf + 32 * 8);
 504
 505   ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 506
 507   if (ret < 0)
 508     {
 509       warning (_("Unable to store VFP registers."));
 510       return;
 511     }
 512 }
 513
 514 /* Fetch registers from the child process.  Fetch all registers if
 515    regno == -1, otherwise fetch all general registers or all floating
 516    point registers depending upon the value of regno.  */
 517
 518 static void
 519 arm_linux_fetch_inferior_registers (struct target_ops *ops,
 520                                     struct regcache *regcache, int regno)
 521 {
 522   if (-1 == regno)
 523     {
 524       fetch_regs (regcache);
 525       fetch_fpregs (regcache);
 526       if (arm_linux_has_wmmx_registers)
 527         fetch_wmmx_regs (regcache);
 528       if (arm_linux_vfp_register_count > 0)
 529         fetch_vfp_regs (regcache);
 530     }
 531   else
 532     {
 533       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 534         fetch_register (regcache, regno);
 535       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 536         fetch_fpregister (regcache, regno);
 537       else if (arm_linux_has_wmmx_registers
 538                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 539         fetch_wmmx_regs (regcache);
 540       else if (arm_linux_vfp_register_count > 0
 541                && regno >= ARM_D0_REGNUM
 542                && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
 543         fetch_vfp_regs (regcache);
 544     }
 545 }
 546
 547 /* Store registers back into the inferior.  Store all registers if
 548    regno == -1, otherwise store all general registers or all floating
 549    point registers depending upon the value of regno.  */
 550
 551 static void
 552 arm_linux_store_inferior_registers (struct target_ops *ops,
 553                                     struct regcache *regcache, int regno)
 554 {
 555   if (-1 == regno)
 556     {
 557       store_regs (regcache);
 558       store_fpregs (regcache);
 559       if (arm_linux_has_wmmx_registers)
 560         store_wmmx_regs (regcache);
 561       if (arm_linux_vfp_register_count > 0)
 562         store_vfp_regs (regcache);
 563     }
 564   else
 565     {
 566       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 567         store_register (regcache, regno);
 568       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 569         store_fpregister (regcache, regno);
 570       else if (arm_linux_has_wmmx_registers
 571                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 572         store_wmmx_regs (regcache);
 573       else if (arm_linux_vfp_register_count > 0
 574                && regno >= ARM_D0_REGNUM
 575                && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
 576         store_vfp_regs (regcache);
 577     }
 578 }
 579
 580 /* Wrapper functions for the standard regset handling, used by
 581    thread debugging.  */
 582
 583 void
 584 fill_gregset (const struct regcache *regcache,
 585               gdb_gregset_t *gregsetp, int regno)
 586 {
 587   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 588 }
 589
 590 void
 591 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 592 {
 593   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 594 }
 595
 596 void
 597 fill_fpregset (const struct regcache *regcache,
 598                gdb_fpregset_t *fpregsetp, int regno)
 599 {
 600   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 601 }
 602
 603 /* Fill GDB's register array with the floating-point register values
 604    in *fpregsetp.  */
 605
 606 void
 607 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 608 {
 609   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 610 }
 611
 612 /* Fetch the thread-local storage pointer for libthread_db.  */
 613
 614 ps_err_e
 615 ps_get_thread_area (const struct ps_prochandle *ph,
 616                     lwpid_t lwpid, int idx, void **base)
 617 {
 618   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 619     return PS_ERR;
 620
 621   /* IDX is the bias from the thread pointer to the beginning of the
 622      thread descriptor.  It has to be subtracted due to implementation
 623      quirks in libthread_db.  */
 624   *base = (void *) ((char *)*base - idx);
 625
 626   return PS_OK;
 627 }
 628
 629 static const struct target_desc *
 630 arm_linux_read_description (struct target_ops *ops)
 631 {
 632   CORE_ADDR arm_hwcap = 0;
 633   arm_linux_has_wmmx_registers = 0;
 634   arm_linux_vfp_register_count = 0;
 635
 636   if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
 637     {
 638       return ops->beneath->to_read_description (ops->beneath);
 639     }
 640
 641   if (arm_hwcap & HWCAP_IWMMXT)
 642     {
 643       arm_linux_has_wmmx_registers = 1;
 644       return tdesc_arm_with_iwmmxt;
 645     }
 646
 647   if (arm_hwcap & HWCAP_VFP)
 648     {
 649       int pid;
 650       char *buf;
 651       const struct target_desc * result = NULL;
 652
 653       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 654          Neon with VFPv3-D32.  */
 655       if (arm_hwcap & HWCAP_NEON)
 656         {
 657           arm_linux_vfp_register_count = 32;
 658           result = tdesc_arm_with_neon;
 659         }
 660       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 661         {
 662           arm_linux_vfp_register_count = 32;
 663           result = tdesc_arm_with_vfpv3;
 664         }
 665       else
 666         {
 667           arm_linux_vfp_register_count = 16;
 668           result = tdesc_arm_with_vfpv2;
 669         }
 670
 671       /* Now make sure that the kernel supports reading these
 672          registers.  Support was added in 2.6.30.  */
 673       pid = ptid_get_lwp (inferior_ptid);
 674       errno = 0;
 675       buf = alloca (VFP_REGS_SIZE);
 676       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 677           && errno == EIO)
 678         result = NULL;
 679
 680       return result;
 681     }
 682
 683   return ops->beneath->to_read_description (ops->beneath);
 684 }
 685
 686 /* Information describing the hardware breakpoint capabilities.  */
 687 struct arm_linux_hwbp_cap
 688 {
 689   gdb_byte arch;
 690   gdb_byte max_wp_length;
 691   gdb_byte wp_count;
 692   gdb_byte bp_count;
 693 };
 694
 695 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 696    assume a maximum number of supported break-/watchpoints.  */
 697 #define MAX_BPTS 16
 698 #define MAX_WPTS 16
 699
 700 /* Get hold of the Hardware Breakpoint information for the target we are
 701    attached to.  Returns NULL if the kernel doesn't support Hardware
 702    breakpoints at all, or a pointer to the information structure.  */
 703 static const struct arm_linux_hwbp_cap *
 704 arm_linux_get_hwbp_cap (void)
 705 {
 706   /* The info structure we return.  */
 707   static struct arm_linux_hwbp_cap info;
 708
 709   /* Is INFO in a good state?  -1 means that no attempt has been made to
 710      initialize INFO; 0 means an attempt has been made, but it failed; 1
 711      means INFO is in an initialized state.  */
 712   static int available = -1;
 713
 714   if (available == -1)
 715     {
 716       int tid;
 717       unsigned int val;
 718
 719       tid = GET_THREAD_ID (inferior_ptid);
 720       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 721         available = 0;
 722       else
 723         {
 724           info.arch = (gdb_byte)((val >> 24) & 0xff);
 725           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 726           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 727           info.bp_count = (gdb_byte)(val & 0xff);
 728
 729       if (info.wp_count > MAX_WPTS)
 730         {
 731           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 732                       supports %d"), MAX_WPTS, info.wp_count);
 733           info.wp_count = MAX_WPTS;
 734         }
 735
 736       if (info.bp_count > MAX_BPTS)
 737         {
 738           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 739                       supports %d"), MAX_BPTS, info.bp_count);
 740           info.bp_count = MAX_BPTS;
 741         }
 742           available = (info.arch != 0);
 743         }
 744     }
 745
 746   return available == 1 ? &info : NULL;
 747 }
 748
 749 /* How many hardware breakpoints are available?  */
 750 static int
 751 arm_linux_get_hw_breakpoint_count (void)
 752 {
 753   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 754   return cap != NULL ? cap->bp_count : 0;
 755 }
 756
 757 /* How many hardware watchpoints are available?  */
 758 static int
 759 arm_linux_get_hw_watchpoint_count (void)
 760 {
 761   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 762   return cap != NULL ? cap->wp_count : 0;
 763 }
 764
 765 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 766    there is not an appropriate resource available, otherwise returns 1.  */
 767 static int
 768 arm_linux_can_use_hw_breakpoint (struct target_ops *self,
 769                                  int type, int cnt, int ot)
 770 {
 771   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 772       || type == bp_access_watchpoint || type == bp_watchpoint)
 773     {
 774       if (cnt + ot > arm_linux_get_hw_watchpoint_count ())
 775         return -1;
 776     }
 777   else if (type == bp_hardware_breakpoint)
 778     {
 779       if (cnt > arm_linux_get_hw_breakpoint_count ())
 780         return -1;
 781     }
 782   else
 783     gdb_assert (FALSE);
 784
 785   return 1;
 786 }
 787
 788 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 789 typedef enum
 790 {
 791   arm_hwbp_break = 0,
 792   arm_hwbp_load = 1,
 793   arm_hwbp_store = 2,
 794   arm_hwbp_access = 3
 795 } arm_hwbp_type;
 796
 797 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 798 typedef unsigned int arm_hwbp_control_t;
 799
 800 /* Structure used to keep track of hardware break-/watch-points.  */
 801 struct arm_linux_hw_breakpoint
 802 {
 803   /* Address to break on, or being watched.  */
 804   unsigned int address;
 805   /* Control register for break-/watch- point.  */
 806   arm_hwbp_control_t control;
 807 };
 808
 809 /* Structure containing arrays of per process hardware break-/watchpoints
 810    for caching address and control information.
 811
 812    The Linux ptrace interface to hardware break-/watch-points presents the
 813    values in a vector centred around 0 (which is used fo generic information).
 814    Positive indicies refer to breakpoint addresses/control registers, negative
 815    indices to watchpoint addresses/control registers.
 816
 817    The Linux vector is indexed as follows:
 818       -((i << 1) + 2): Control register for watchpoint i.
 819       -((i << 1) + 1): Address register for watchpoint i.
 820                     0: Information register.
 821        ((i << 1) + 1): Address register for breakpoint i.
 822        ((i << 1) + 2): Control register for breakpoint i.
 823
 824    This structure is used as a per-thread cache of the state stored by the
 825    kernel, so that we don't need to keep calling into the kernel to find a
 826    free breakpoint.
 827
 828    We treat break-/watch-points with their enable bit clear as being deleted.
 829    */
 830 struct arm_linux_debug_reg_state
 831 {
 832   /* Hardware breakpoints for this process.  */
 833   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 834   /* Hardware watchpoints for this process.  */
 835   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 836 };
 837
 838 /* Per-process arch-specific data we want to keep.  */
 839 struct arm_linux_process_info
 840 {
 841   /* Linked list.  */
 842   struct arm_linux_process_info *next;
 843   /* The process identifier.  */
 844   pid_t pid;
 845   /* Hardware break-/watchpoints state information.  */
 846   struct arm_linux_debug_reg_state state;
 847
 848 };
 849
 850 /* Per-thread arch-specific data we want to keep.  */
 851 struct arch_lwp_info
 852 {
 853   /* Non-zero if our copy differs from what's recorded in the thread.  */
 854   char bpts_changed[MAX_BPTS];
 855   char wpts_changed[MAX_WPTS];
 856 };
 857
 858 static struct arm_linux_process_info *arm_linux_process_list = NULL;
 859
 860 /* Find process data for process PID.  */
 861
 862 static struct arm_linux_process_info *
 863 arm_linux_find_process_pid (pid_t pid)
 864 {
 865   struct arm_linux_process_info *proc;
 866
 867   for (proc = arm_linux_process_list; proc; proc = proc->next)
 868     if (proc->pid == pid)
 869       return proc;
 870
 871   return NULL;
 872 }
 873
 874 /* Add process data for process PID.  Returns newly allocated info
 875    object.  */
 876
 877 static struct arm_linux_process_info *
 878 arm_linux_add_process (pid_t pid)
 879 {
 880   struct arm_linux_process_info *proc;
 881
 882   proc = xcalloc (1, sizeof (*proc));
 883   proc->pid = pid;
 884
 885   proc->next = arm_linux_process_list;
 886   arm_linux_process_list = proc;
 887
 888   return proc;
 889 }
 890
 891 /* Get data specific info for process PID, creating it if necessary.
 892    Never returns NULL.  */
 893
 894 static struct arm_linux_process_info *
 895 arm_linux_process_info_get (pid_t pid)
 896 {
 897   struct arm_linux_process_info *proc;
 898
 899   proc = arm_linux_find_process_pid (pid);
 900   if (proc == NULL)
 901     proc = arm_linux_add_process (pid);
 902
 903   return proc;
 904 }
 905
 906 /* Called whenever GDB is no longer debugging process PID.  It deletes
 907    data structures that keep track of debug register state.  */
 908
 909 static void
 910 arm_linux_forget_process (pid_t pid)
 911 {
 912   struct arm_linux_process_info *proc, **proc_link;
 913
 914   proc = arm_linux_process_list;
 915   proc_link = &arm_linux_process_list;
 916
 917   while (proc != NULL)
 918     {
 919       if (proc->pid == pid)
 920     {
 921       *proc_link = proc->next;
 922
 923       xfree (proc);
 924       return;
 925     }
 926
 927       proc_link = &proc->next;
 928       proc = *proc_link;
 929     }
 930 }
 931
 932 /* Get hardware break-/watchpoint state for process PID.  */
 933
 934 static struct arm_linux_debug_reg_state *
 935 arm_linux_get_debug_reg_state (pid_t pid)
 936 {
 937   return &arm_linux_process_info_get (pid)->state;
 938 }
 939
 940 /* Initialize an ARM hardware break-/watch-point control register value.
 941    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 942    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 943    */
 944 static arm_hwbp_control_t
 945 arm_hwbp_control_initialize (unsigned byte_address_select,
 946                              arm_hwbp_type hwbp_type,
 947                              int enable)
 948 {
 949   gdb_assert ((byte_address_select & ~0xffU) == 0);
 950   gdb_assert (hwbp_type != arm_hwbp_break
 951               || ((byte_address_select & 0xfU) != 0));
 952
 953   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 954 }
 955
 956 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 957 static int
 958 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 959 {
 960   return control & 0x1;
 961 }
 962
 963 /* Change a breakpoint control word so that it is in the disabled state.  */
 964 static arm_hwbp_control_t
 965 arm_hwbp_control_disable (arm_hwbp_control_t control)
 966 {
 967   return control & ~0x1;
 968 }
 969
 970 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 971    enabled, and will point to the placed address of BP_TGT.  */
 972 static void
 973 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 974                                     struct bp_target_info *bp_tgt,
 975                                     struct arm_linux_hw_breakpoint *p)
 976 {
 977   unsigned mask;
 978   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
 979
 980   /* We have to create a mask for the control register which says which bits
 981      of the word pointed to by address to break on.  */
 982   if (arm_pc_is_thumb (gdbarch, address))
 983     {
 984       mask = 0x3;
 985       address &= ~1;
 986     }
 987   else
 988     {
 989       mask = 0xf;
 990       address &= ~3;
 991     }
 992
 993   p->address = (unsigned int) address;
 994   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
 995 }
 996
 997 /* Get the ARM hardware breakpoint type from the RW value we're given when
 998    asked to set a watchpoint.  */
 999 static arm_hwbp_type
1000 arm_linux_get_hwbp_type (int rw)
1001 {
1002   if (rw == hw_read)
1003     return arm_hwbp_load;
1004   else if (rw == hw_write)
1005     return arm_hwbp_store;
1006   else
1007     return arm_hwbp_access;
1008 }
1009
1010 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
1011    to LEN.  The type of watchpoint is given in RW.  */
1012 static void
1013 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
1014                                     struct arm_linux_hw_breakpoint *p)
1015 {
1016   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1017   unsigned mask;
1018
1019   gdb_assert (cap != NULL);
1020   gdb_assert (cap->max_wp_length != 0);
1021
1022   mask = (1 << len) - 1;
1023
1024   p->address = (unsigned int) addr;
1025   p->control = arm_hwbp_control_initialize (mask,
1026                                             arm_linux_get_hwbp_type (rw), 1);
1027 }
1028
1029 /* Are two break-/watch-points equal?  */
1030 static int
1031 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
1032                                const struct arm_linux_hw_breakpoint *p2)
1033 {
1034   return p1->address == p2->address && p1->control == p2->control;
1035 }
1036
1037 /* Callback to mark a watch-/breakpoint to be updated in all threads of
1038    the current process.  */
1039
1040 struct update_registers_data
1041 {
1042   int watch;
1043   int index;
1044 };
1045
1046 static int
1047 update_registers_callback (struct lwp_info *lwp, void *arg)
1048 {
1049   struct update_registers_data *data = (struct update_registers_data *) arg;
1050
1051   if (lwp->arch_private == NULL)
1052     lwp->arch_private = XCNEW (struct arch_lwp_info);
1053
1054   /* The actual update is done later just before resuming the lwp,
1055      we just mark that the registers need updating.  */
1056   if (data->watch)
1057     lwp->arch_private->wpts_changed[data->index] = 1;
1058   else
1059     lwp->arch_private->bpts_changed[data->index] = 1;
1060
1061   /* If the lwp isn't stopped, force it to momentarily pause, so
1062      we can update its breakpoint registers.  */
1063   if (!lwp->stopped)
1064     linux_stop_lwp (lwp);
1065
1066   return 0;
1067 }
1068
1069 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
1070    =1) BPT for thread TID.  */
1071 static void
1072 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
1073                                  int watchpoint)
1074 {
1075   int pid;
1076   ptid_t pid_ptid;
1077   gdb_byte count, i;
1078   struct arm_linux_hw_breakpoint* bpts;
1079   struct update_registers_data data;
1080
1081   pid = ptid_get_pid (inferior_ptid);
1082   pid_ptid = pid_to_ptid (pid);
1083
1084   if (watchpoint)
1085     {
1086       count = arm_linux_get_hw_watchpoint_count ();
1087       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1088     }
1089   else
1090     {
1091       count = arm_linux_get_hw_breakpoint_count ();
1092       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1093     }
1094
1095   for (i = 0; i < count; ++i)
1096     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1097       {
1098         data.watch = watchpoint;
1099         data.index = i;
1100         bpts[i] = *bpt;
1101         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1102         break;
1103       }
1104
1105   gdb_assert (i != count);
1106 }
1107
1108 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1109    (WATCHPOINT = 1) BPT for thread TID.  */
1110 static void
1111 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1112                                  int watchpoint)
1113 {
1114   int pid;
1115   gdb_byte count, i;
1116   ptid_t pid_ptid;
1117   struct arm_linux_hw_breakpoint* bpts;
1118   struct update_registers_data data;
1119
1120   pid = ptid_get_pid (inferior_ptid);
1121   pid_ptid = pid_to_ptid (pid);
1122
1123   if (watchpoint)
1124     {
1125       count = arm_linux_get_hw_watchpoint_count ();
1126       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1127     }
1128   else
1129     {
1130       count = arm_linux_get_hw_breakpoint_count ();
1131       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1132     }
1133
1134   for (i = 0; i < count; ++i)
1135     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1136       {
1137         data.watch = watchpoint;
1138         data.index = i;
1139         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1140         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1141         break;
1142       }
1143
1144   gdb_assert (i != count);
1145 }
1146
1147 /* Insert a Hardware breakpoint.  */
1148 static int
1149 arm_linux_insert_hw_breakpoint (struct target_ops *self,
1150                                 struct gdbarch *gdbarch,
1151                                 struct bp_target_info *bp_tgt)
1152 {
1153   struct lwp_info *lp;
1154   struct arm_linux_hw_breakpoint p;
1155
1156   if (arm_linux_get_hw_breakpoint_count () == 0)
1157     return -1;
1158
1159   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1160
1161   arm_linux_insert_hw_breakpoint1 (&p, 0);
1162
1163   return 0;
1164 }
1165
1166 /* Remove a hardware breakpoint.  */
1167 static int
1168 arm_linux_remove_hw_breakpoint (struct target_ops *self,
1169                                 struct gdbarch *gdbarch,
1170                                 struct bp_target_info *bp_tgt)
1171 {
1172   struct lwp_info *lp;
1173   struct arm_linux_hw_breakpoint p;
1174
1175   if (arm_linux_get_hw_breakpoint_count () == 0)
1176     return -1;
1177
1178   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1179
1180   arm_linux_remove_hw_breakpoint1 (&p, 0);
1181
1182   return 0;
1183 }
1184
1185 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1186    ADDR?  */
1187 static int
1188 arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
1189                                        CORE_ADDR addr, int len)
1190 {
1191   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1192   CORE_ADDR max_wp_length, aligned_addr;
1193
1194   /* Can not set watchpoints for zero or negative lengths.  */
1195   if (len <= 0)
1196     return 0;
1197
1198   /* Need to be able to use the ptrace interface.  */
1199   if (cap == NULL || cap->wp_count == 0)
1200     return 0;
1201
1202   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1203      range covered by a watchpoint.  */
1204   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1205   aligned_addr = addr & ~(max_wp_length - 1);
1206
1207   if (aligned_addr + max_wp_length < addr + len)
1208     return 0;
1209
1210   /* The current ptrace interface can only handle watchpoints that are a
1211      power of 2.  */
1212   if ((len & (len - 1)) != 0)
1213     return 0;
1214
1215   /* All tests passed so we must be able to set a watchpoint.  */
1216   return 1;
1217 }
1218
1219 /* Insert a Hardware breakpoint.  */
1220 static int
1221 arm_linux_insert_watchpoint (struct target_ops *self,
1222                              CORE_ADDR addr, int len, int rw,
1223                              struct expression *cond)
1224 {
1225   struct lwp_info *lp;
1226   struct arm_linux_hw_breakpoint p;
1227
1228   if (arm_linux_get_hw_watchpoint_count () == 0)
1229     return -1;
1230
1231   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1232
1233   arm_linux_insert_hw_breakpoint1 (&p, 1);
1234
1235   return 0;
1236 }
1237
1238 /* Remove a hardware breakpoint.  */
1239 static int
1240 arm_linux_remove_watchpoint (struct target_ops *self,
1241                              CORE_ADDR addr, int len, int rw,
1242                              struct expression *cond)
1243 {
1244   struct lwp_info *lp;
1245   struct arm_linux_hw_breakpoint p;
1246
1247   if (arm_linux_get_hw_watchpoint_count () == 0)
1248     return -1;
1249
1250   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1251
1252   arm_linux_remove_hw_breakpoint1 (&p, 1);
1253
1254   return 0;
1255 }
1256
1257 /* What was the data address the target was stopped on accessing.  */
1258 static int
1259 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1260 {
1261   siginfo_t siginfo;
1262   int slot;
1263
1264   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1265     return 0;
1266
1267   /* This must be a hardware breakpoint.  */
1268   if (siginfo.si_signo != SIGTRAP
1269       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1270     return 0;
1271
1272   /* We must be able to set hardware watchpoints.  */
1273   if (arm_linux_get_hw_watchpoint_count () == 0)
1274     return 0;
1275
1276   slot = siginfo.si_errno;
1277
1278   /* If we are in a positive slot then we're looking at a breakpoint and not
1279      a watchpoint.  */
1280   if (slot >= 0)
1281     return 0;
1282
1283   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1284   return 1;
1285 }
1286
1287 /* Has the target been stopped by hitting a watchpoint?  */
1288 static int
1289 arm_linux_stopped_by_watchpoint (struct target_ops *ops)
1290 {
1291   CORE_ADDR addr;
1292   return arm_linux_stopped_data_address (ops, &addr);
1293 }
1294
1295 static int
1296 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1297                                         CORE_ADDR addr,
1298                                         CORE_ADDR start, int length)
1299 {
1300   return start <= addr && start + length - 1 >= addr;
1301 }
1302
1303 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1304    in the parent thread to the child thread.  */
1305 static void
1306 arm_linux_new_thread (struct lwp_info *lp)
1307 {
1308   int i;
1309   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1310
1311   /* Mark that all the hardware breakpoint/watchpoint register pairs
1312      for this thread need to be initialized.  */
1313
1314   for (i = 0; i < MAX_BPTS; i++)
1315     {
1316       info->bpts_changed[i] = 1;
1317       info->wpts_changed[i] = 1;
1318     }
1319
1320   lp->arch_private = info;
1321 }
1322
1323 /* Called when resuming a thread.
1324    The hardware debug registers are updated when there is any change.  */
1325
1326 static void
1327 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1328 {
1329   int pid, i;
1330   struct arm_linux_hw_breakpoint *bpts, *wpts;
1331   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1332
1333   pid = ptid_get_lwp (lwp->ptid);
1334   bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1335   wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1336
1337   /* NULL means this is the main thread still going through the shell,
1338      or, no watchpoint has been set yet.  In that case, there's
1339      nothing to do.  */
1340   if (arm_lwp_info == NULL)
1341     return;
1342
1343   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1344     if (arm_lwp_info->bpts_changed[i])
1345       {
1346         errno = 0;
1347         if (arm_hwbp_control_is_enabled (bpts[i].control))
1348           if (ptrace (PTRACE_SETHBPREGS, pid,
1349               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1350             perror_with_name (_("Unexpected error setting breakpoint"));
1351
1352         if (bpts[i].control != 0)
1353           if (ptrace (PTRACE_SETHBPREGS, pid,
1354               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1355             perror_with_name (_("Unexpected error setting breakpoint"));
1356
1357         arm_lwp_info->bpts_changed[i] = 0;
1358       }
1359
1360   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1361     if (arm_lwp_info->wpts_changed[i])
1362       {
1363         errno = 0;
1364         if (arm_hwbp_control_is_enabled (wpts[i].control))
1365           if (ptrace (PTRACE_SETHBPREGS, pid,
1366               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1367             perror_with_name (_("Unexpected error setting watchpoint"));
1368
1369         if (wpts[i].control != 0)
1370           if (ptrace (PTRACE_SETHBPREGS, pid,
1371               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1372             perror_with_name (_("Unexpected error setting watchpoint"));
1373
1374         arm_lwp_info->wpts_changed[i] = 0;
1375       }
1376 }
1377
1378 /* linux_nat_new_fork hook.  */
1379
1380 static void
1381 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1382 {
1383   pid_t parent_pid;
1384   struct arm_linux_debug_reg_state *parent_state;
1385   struct arm_linux_debug_reg_state *child_state;
1386
1387   /* NULL means no watchpoint has ever been set in the parent.  In
1388      that case, there's nothing to do.  */
1389   if (parent->arch_private == NULL)
1390     return;
1391
1392   /* GDB core assumes the child inherits the watchpoints/hw
1393      breakpoints of the parent, and will remove them all from the
1394      forked off process.  Copy the debug registers mirrors into the
1395      new process so that all breakpoints and watchpoints can be
1396      removed together.  */
1397
1398   parent_pid = ptid_get_pid (parent->ptid);
1399   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1400   child_state = arm_linux_get_debug_reg_state (child_pid);
1401   *child_state = *parent_state;
1402 }
1403
1404 void _initialize_arm_linux_nat (void);
1405
1406 void
1407 _initialize_arm_linux_nat (void)
1408 {
1409   struct target_ops *t;
1410
1411   /* Fill in the generic GNU/Linux methods.  */
1412   t = linux_target ();
1413
1414   /* Add our register access methods.  */
1415   t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1416   t->to_store_registers = arm_linux_store_inferior_registers;
1417
1418   /* Add our hardware breakpoint and watchpoint implementation.  */
1419   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1420   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1421   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1422   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1423   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1424   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1425   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1426   t->to_stopped_data_address = arm_linux_stopped_data_address;
1427   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1428
1429   t->to_read_description = arm_linux_read_description;
1430
1431   /* Register the target.  */
1432   linux_nat_add_target (t);
1433
1434   /* Handle thread creation and exit.  */
1435   linux_nat_set_new_thread (t, arm_linux_new_thread);
1436   linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1437
1438   /* Handle process creation and exit.  */
1439   linux_nat_set_new_fork (t, arm_linux_new_fork);
1440   linux_nat_set_forget_process (t, arm_linux_forget_process);
1441 }