gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2018 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observable.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33
  34 #include <elf/common.h>
  35 #include <sys/user.h>
  36 #include "nat/gdb_ptrace.h"
  37 #include <sys/utsname.h>
  38 #include <sys/procfs.h>
  39
  40 #include "nat/linux-ptrace.h"
  41
  42 /* Prototypes for supply_gregset etc.  */
  43 #include "gregset.h"
  44
  45 /* Defines ps_err_e, struct ps_prochandle.  */
  46 #include "gdb_proc_service.h"
  47
  48 #ifndef PTRACE_GET_THREAD_AREA
  49 #define PTRACE_GET_THREAD_AREA 22
  50 #endif
  51
  52 #ifndef PTRACE_GETWMMXREGS
  53 #define PTRACE_GETWMMXREGS 18
  54 #define PTRACE_SETWMMXREGS 19
  55 #endif
  56
  57 #ifndef PTRACE_GETVFPREGS
  58 #define PTRACE_GETVFPREGS 27
  59 #define PTRACE_SETVFPREGS 28
  60 #endif
  61
  62 #ifndef PTRACE_GETHBPREGS
  63 #define PTRACE_GETHBPREGS 29
  64 #define PTRACE_SETHBPREGS 30
  65 #endif
  66
  67 extern int arm_apcs_32;
  68
  69 class arm_linux_nat_target final : public linux_nat_target
  70 {
  71 public:
  72   /* Add our register access methods.  */
  73   void fetch_registers (struct regcache *, int) override;
  74   void store_registers (struct regcache *, int) override;
  75
  76   /* Add our hardware breakpoint and watchpoint implementation.  */
  77   int can_use_hw_breakpoint (enum bptype, int, int) override;
  78
  79   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  80
  81   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  82
  83   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  84
  85   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  86                          struct expression *) override;
  87
  88   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  89                          struct expression *) override;
  90   bool stopped_by_watchpoint () override;
  91
  92   bool stopped_data_address (CORE_ADDR *) override;
  93
  94   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  95
  96   const struct target_desc *read_description () override;
  97 };
  98
  99 static arm_linux_nat_target the_arm_linux_nat_target;
 100
 101 /* Get the whole floating point state of the process and store it
 102    into regcache.  */
 103
 104 static void
 105 fetch_fpregs (struct regcache *regcache)
 106 {
 107   int ret, regno, tid;
 108   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 109
 110   /* Get the thread id for the ptrace call.  */
 111   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 112
 113   /* Read the floating point state.  */
 114   if (have_ptrace_getregset == TRIBOOL_TRUE)
 115     {
 116       struct iovec iov;
 117
 118       iov.iov_base = &fp;
 119       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 120
 121       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 122     }
 123   else
 124     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 125
 126   if (ret < 0)
 127     perror_with_name (_("Unable to fetch the floating point registers."));
 128
 129   /* Fetch fpsr.  */
 130   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 131                        fp + NWFPE_FPSR_OFFSET);
 132
 133   /* Fetch the floating point registers.  */
 134   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 135     supply_nwfpe_register (regcache, regno, fp);
 136 }
 137
 138 /* Save the whole floating point state of the process using
 139    the contents from regcache.  */
 140
 141 static void
 142 store_fpregs (const struct regcache *regcache)
 143 {
 144   int ret, regno, tid;
 145   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 146
 147   /* Get the thread id for the ptrace call.  */
 148   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 149
 150   /* Read the floating point state.  */
 151   if (have_ptrace_getregset == TRIBOOL_TRUE)
 152     {
 153       elf_fpregset_t fpregs;
 154       struct iovec iov;
 155
 156       iov.iov_base = &fpregs;
 157       iov.iov_len = sizeof (fpregs);
 158
 159       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 160     }
 161   else
 162     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 163
 164   if (ret < 0)
 165     perror_with_name (_("Unable to fetch the floating point registers."));
 166
 167   /* Store fpsr.  */
 168   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 169     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 170
 171   /* Store the floating point registers.  */
 172   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 173     if (REG_VALID == regcache_register_status (regcache, regno))
 174       collect_nwfpe_register (regcache, regno, fp);
 175
 176   if (have_ptrace_getregset == TRIBOOL_TRUE)
 177     {
 178       struct iovec iov;
 179
 180       iov.iov_base = &fp;
 181       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 182
 183       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 184     }
 185   else
 186     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 187
 188   if (ret < 0)
 189     perror_with_name (_("Unable to store floating point registers."));
 190 }
 191
 192 /* Fetch all general registers of the process and store into
 193    regcache.  */
 194
 195 static void
 196 fetch_regs (struct regcache *regcache)
 197 {
 198   int ret, regno, tid;
 199   elf_gregset_t regs;
 200
 201   /* Get the thread id for the ptrace call.  */
 202   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 203
 204   if (have_ptrace_getregset == TRIBOOL_TRUE)
 205     {
 206       struct iovec iov;
 207
 208       iov.iov_base = &regs;
 209       iov.iov_len = sizeof (regs);
 210
 211       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 212     }
 213   else
 214     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 215
 216   if (ret < 0)
 217     perror_with_name (_("Unable to fetch general registers."));
 218
 219   aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
 220 }
 221
 222 static void
 223 store_regs (const struct regcache *regcache)
 224 {
 225   int ret, regno, tid;
 226   elf_gregset_t regs;
 227
 228   /* Get the thread id for the ptrace call.  */
 229   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 230
 231   /* Fetch the general registers.  */
 232   if (have_ptrace_getregset == TRIBOOL_TRUE)
 233     {
 234       struct iovec iov;
 235
 236       iov.iov_base = &regs;
 237       iov.iov_len = sizeof (regs);
 238
 239       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 240     }
 241   else
 242     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 243
 244   if (ret < 0)
 245     perror_with_name (_("Unable to fetch general registers."));
 246
 247   aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
 248
 249   if (have_ptrace_getregset == TRIBOOL_TRUE)
 250     {
 251       struct iovec iov;
 252
 253       iov.iov_base = &regs;
 254       iov.iov_len = sizeof (regs);
 255
 256       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 257     }
 258   else
 259     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 260
 261   if (ret < 0)
 262     perror_with_name (_("Unable to store general registers."));
 263 }
 264
 265 /* Fetch all WMMX registers of the process and store into
 266    regcache.  */
 267
 268 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 269
 270 static void
 271 fetch_wmmx_regs (struct regcache *regcache)
 272 {
 273   char regbuf[IWMMXT_REGS_SIZE];
 274   int ret, regno, tid;
 275
 276   /* Get the thread id for the ptrace call.  */
 277   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 278
 279   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 280   if (ret < 0)
 281     perror_with_name (_("Unable to fetch WMMX registers."));
 282
 283   for (regno = 0; regno < 16; regno++)
 284     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 285                          &regbuf[regno * 8]);
 286
 287   for (regno = 0; regno < 2; regno++)
 288     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 289                          &regbuf[16 * 8 + regno * 4]);
 290
 291   for (regno = 0; regno < 4; regno++)
 292     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 293                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 294 }
 295
 296 static void
 297 store_wmmx_regs (const struct regcache *regcache)
 298 {
 299   char regbuf[IWMMXT_REGS_SIZE];
 300   int ret, regno, tid;
 301
 302   /* Get the thread id for the ptrace call.  */
 303   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 304
 305   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 306   if (ret < 0)
 307     perror_with_name (_("Unable to fetch WMMX registers."));
 308
 309   for (regno = 0; regno < 16; regno++)
 310     if (REG_VALID == regcache_register_status (regcache,
 311                                                regno + ARM_WR0_REGNUM))
 312       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 313                             &regbuf[regno * 8]);
 314
 315   for (regno = 0; regno < 2; regno++)
 316     if (REG_VALID == regcache_register_status (regcache,
 317                                                regno + ARM_WCSSF_REGNUM))
 318       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 319                             &regbuf[16 * 8 + regno * 4]);
 320
 321   for (regno = 0; regno < 4; regno++)
 322     if (REG_VALID == regcache_register_status (regcache,
 323                                                regno + ARM_WCGR0_REGNUM))
 324       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 325                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 326
 327   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 328
 329   if (ret < 0)
 330     perror_with_name (_("Unable to store WMMX registers."));
 331 }
 332
 333 static void
 334 fetch_vfp_regs (struct regcache *regcache)
 335 {
 336   gdb_byte regbuf[VFP_REGS_SIZE];
 337   int ret, regno, tid;
 338   struct gdbarch *gdbarch = regcache->arch ();
 339   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 340
 341   /* Get the thread id for the ptrace call.  */
 342   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 343
 344   if (have_ptrace_getregset == TRIBOOL_TRUE)
 345     {
 346       struct iovec iov;
 347
 348       iov.iov_base = regbuf;
 349       iov.iov_len = VFP_REGS_SIZE;
 350       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 351     }
 352   else
 353     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 354
 355   if (ret < 0)
 356     perror_with_name (_("Unable to fetch VFP registers."));
 357
 358   aarch32_vfp_regcache_supply (regcache, regbuf,
 359                                tdep->vfp_register_count);
 360 }
 361
 362 static void
 363 store_vfp_regs (const struct regcache *regcache)
 364 {
 365   gdb_byte regbuf[VFP_REGS_SIZE];
 366   int ret, regno, tid;
 367   struct gdbarch *gdbarch = regcache->arch ();
 368   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 369
 370   /* Get the thread id for the ptrace call.  */
 371   tid = ptid_get_lwp (regcache_get_ptid (regcache));
 372
 373   if (have_ptrace_getregset == TRIBOOL_TRUE)
 374     {
 375       struct iovec iov;
 376
 377       iov.iov_base = regbuf;
 378       iov.iov_len = VFP_REGS_SIZE;
 379       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 380     }
 381   else
 382     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 383
 384   if (ret < 0)
 385     perror_with_name (_("Unable to fetch VFP registers (for update)."));
 386
 387   aarch32_vfp_regcache_collect (regcache, regbuf,
 388                                 tdep->vfp_register_count);
 389
 390   if (have_ptrace_getregset == TRIBOOL_TRUE)
 391     {
 392       struct iovec iov;
 393
 394       iov.iov_base = regbuf;
 395       iov.iov_len = VFP_REGS_SIZE;
 396       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
 397     }
 398   else
 399     ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 400
 401   if (ret < 0)
 402     perror_with_name (_("Unable to store VFP registers."));
 403 }
 404
 405 /* Fetch registers from the child process.  Fetch all registers if
 406    regno == -1, otherwise fetch all general registers or all floating
 407    point registers depending upon the value of regno.  */
 408
 409 void
 410 arm_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
 411 {
 412   struct gdbarch *gdbarch = regcache->arch ();
 413   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 414
 415   if (-1 == regno)
 416     {
 417       fetch_regs (regcache);
 418       if (tdep->have_wmmx_registers)
 419         fetch_wmmx_regs (regcache);
 420       if (tdep->vfp_register_count > 0)
 421         fetch_vfp_regs (regcache);
 422       if (tdep->have_fpa_registers)
 423         fetch_fpregs (regcache);
 424     }
 425   else
 426     {
 427       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 428         fetch_regs (regcache);
 429       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 430         fetch_fpregs (regcache);
 431       else if (tdep->have_wmmx_registers
 432                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 433         fetch_wmmx_regs (regcache);
 434       else if (tdep->vfp_register_count > 0
 435                && regno >= ARM_D0_REGNUM
 436                && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
 437                    || regno == ARM_FPSCR_REGNUM))
 438         fetch_vfp_regs (regcache);
 439     }
 440 }
 441
 442 /* Store registers back into the inferior.  Store all registers if
 443    regno == -1, otherwise store all general registers or all floating
 444    point registers depending upon the value of regno.  */
 445
 446 void
 447 arm_linux_nat_target::store_registers (struct regcache *regcache, int regno)
 448 {
 449   struct gdbarch *gdbarch = regcache->arch ();
 450   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 451
 452   if (-1 == regno)
 453     {
 454       store_regs (regcache);
 455       if (tdep->have_wmmx_registers)
 456         store_wmmx_regs (regcache);
 457       if (tdep->vfp_register_count > 0)
 458         store_vfp_regs (regcache);
 459       if (tdep->have_fpa_registers)
 460         store_fpregs (regcache);
 461     }
 462   else
 463     {
 464       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 465         store_regs (regcache);
 466       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 467         store_fpregs (regcache);
 468       else if (tdep->have_wmmx_registers
 469                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 470         store_wmmx_regs (regcache);
 471       else if (tdep->vfp_register_count > 0
 472                && regno >= ARM_D0_REGNUM
 473                && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
 474                    || regno == ARM_FPSCR_REGNUM))
 475         store_vfp_regs (regcache);
 476     }
 477 }
 478
 479 /* Wrapper functions for the standard regset handling, used by
 480    thread debugging.  */
 481
 482 void
 483 fill_gregset (const struct regcache *regcache,
 484               gdb_gregset_t *gregsetp, int regno)
 485 {
 486   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 487 }
 488
 489 void
 490 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 491 {
 492   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 493 }
 494
 495 void
 496 fill_fpregset (const struct regcache *regcache,
 497                gdb_fpregset_t *fpregsetp, int regno)
 498 {
 499   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 500 }
 501
 502 /* Fill GDB's register array with the floating-point register values
 503    in *fpregsetp.  */
 504
 505 void
 506 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 507 {
 508   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 509 }
 510
 511 /* Fetch the thread-local storage pointer for libthread_db.  */
 512
 513 ps_err_e
 514 ps_get_thread_area (struct ps_prochandle *ph,
 515                     lwpid_t lwpid, int idx, void **base)
 516 {
 517   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 518     return PS_ERR;
 519
 520   /* IDX is the bias from the thread pointer to the beginning of the
 521      thread descriptor.  It has to be subtracted due to implementation
 522      quirks in libthread_db.  */
 523   *base = (void *) ((char *)*base - idx);
 524
 525   return PS_OK;
 526 }
 527
 528 const struct target_desc *
 529 arm_linux_nat_target::read_description ()
 530 {
 531   CORE_ADDR arm_hwcap = 0;
 532
 533   if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
 534     {
 535       elf_gregset_t gpregs;
 536       struct iovec iov;
 537       int tid = ptid_get_lwp (inferior_ptid);
 538
 539       iov.iov_base = &gpregs;
 540       iov.iov_len = sizeof (gpregs);
 541
 542       /* Check if PTRACE_GETREGSET works.  */
 543       if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
 544         have_ptrace_getregset = TRIBOOL_FALSE;
 545       else
 546         have_ptrace_getregset = TRIBOOL_TRUE;
 547     }
 548
 549   if (target_auxv_search (this, AT_HWCAP, &arm_hwcap) != 1)
 550     {
 551       return this->beneath->read_description ();
 552     }
 553
 554   if (arm_hwcap & HWCAP_IWMMXT)
 555     return tdesc_arm_with_iwmmxt;
 556
 557   if (arm_hwcap & HWCAP_VFP)
 558     {
 559       int pid;
 560       char *buf;
 561       const struct target_desc * result = NULL;
 562
 563       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 564          Neon with VFPv3-D32.  */
 565       if (arm_hwcap & HWCAP_NEON)
 566         result = tdesc_arm_with_neon;
 567       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 568         result = tdesc_arm_with_vfpv3;
 569       else
 570         result = tdesc_arm_with_vfpv2;
 571
 572       /* Now make sure that the kernel supports reading these
 573          registers.  Support was added in 2.6.30.  */
 574       pid = ptid_get_lwp (inferior_ptid);
 575       errno = 0;
 576       buf = (char *) alloca (VFP_REGS_SIZE);
 577       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 578           && errno == EIO)
 579         result = NULL;
 580
 581       return result;
 582     }
 583
 584   return this->beneath->read_description ();
 585 }
 586
 587 /* Information describing the hardware breakpoint capabilities.  */
 588 struct arm_linux_hwbp_cap
 589 {
 590   gdb_byte arch;
 591   gdb_byte max_wp_length;
 592   gdb_byte wp_count;
 593   gdb_byte bp_count;
 594 };
 595
 596 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 597    assume a maximum number of supported break-/watchpoints.  */
 598 #define MAX_BPTS 16
 599 #define MAX_WPTS 16
 600
 601 /* Get hold of the Hardware Breakpoint information for the target we are
 602    attached to.  Returns NULL if the kernel doesn't support Hardware
 603    breakpoints at all, or a pointer to the information structure.  */
 604 static const struct arm_linux_hwbp_cap *
 605 arm_linux_get_hwbp_cap (void)
 606 {
 607   /* The info structure we return.  */
 608   static struct arm_linux_hwbp_cap info;
 609
 610   /* Is INFO in a good state?  -1 means that no attempt has been made to
 611      initialize INFO; 0 means an attempt has been made, but it failed; 1
 612      means INFO is in an initialized state.  */
 613   static int available = -1;
 614
 615   if (available == -1)
 616     {
 617       int tid;
 618       unsigned int val;
 619
 620       tid = ptid_get_lwp (inferior_ptid);
 621       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 622         available = 0;
 623       else
 624         {
 625           info.arch = (gdb_byte)((val >> 24) & 0xff);
 626           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 627           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 628           info.bp_count = (gdb_byte)(val & 0xff);
 629
 630       if (info.wp_count > MAX_WPTS)
 631         {
 632           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 633                       supports %d"), MAX_WPTS, info.wp_count);
 634           info.wp_count = MAX_WPTS;
 635         }
 636
 637       if (info.bp_count > MAX_BPTS)
 638         {
 639           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 640                       supports %d"), MAX_BPTS, info.bp_count);
 641           info.bp_count = MAX_BPTS;
 642         }
 643           available = (info.arch != 0);
 644         }
 645     }
 646
 647   return available == 1 ? &info : NULL;
 648 }
 649
 650 /* How many hardware breakpoints are available?  */
 651 static int
 652 arm_linux_get_hw_breakpoint_count (void)
 653 {
 654   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 655   return cap != NULL ? cap->bp_count : 0;
 656 }
 657
 658 /* How many hardware watchpoints are available?  */
 659 static int
 660 arm_linux_get_hw_watchpoint_count (void)
 661 {
 662   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 663   return cap != NULL ? cap->wp_count : 0;
 664 }
 665
 666 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 667    there is not an appropriate resource available, otherwise returns 1.  */
 668 int
 669 arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 670                                              int cnt, int ot)
 671 {
 672   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 673       || type == bp_access_watchpoint || type == bp_watchpoint)
 674     {
 675       int count = arm_linux_get_hw_watchpoint_count ();
 676
 677       if (count == 0)
 678         return 0;
 679       else if (cnt + ot > count)
 680         return -1;
 681     }
 682   else if (type == bp_hardware_breakpoint)
 683     {
 684       int count = arm_linux_get_hw_breakpoint_count ();
 685
 686       if (count == 0)
 687         return 0;
 688       else if (cnt > count)
 689         return -1;
 690     }
 691   else
 692     gdb_assert (FALSE);
 693
 694   return 1;
 695 }
 696
 697 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 698 typedef enum
 699 {
 700   arm_hwbp_break = 0,
 701   arm_hwbp_load = 1,
 702   arm_hwbp_store = 2,
 703   arm_hwbp_access = 3
 704 } arm_hwbp_type;
 705
 706 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 707 typedef unsigned int arm_hwbp_control_t;
 708
 709 /* Structure used to keep track of hardware break-/watch-points.  */
 710 struct arm_linux_hw_breakpoint
 711 {
 712   /* Address to break on, or being watched.  */
 713   unsigned int address;
 714   /* Control register for break-/watch- point.  */
 715   arm_hwbp_control_t control;
 716 };
 717
 718 /* Structure containing arrays of per process hardware break-/watchpoints
 719    for caching address and control information.
 720
 721    The Linux ptrace interface to hardware break-/watch-points presents the
 722    values in a vector centred around 0 (which is used fo generic information).
 723    Positive indicies refer to breakpoint addresses/control registers, negative
 724    indices to watchpoint addresses/control registers.
 725
 726    The Linux vector is indexed as follows:
 727       -((i << 1) + 2): Control register for watchpoint i.
 728       -((i << 1) + 1): Address register for watchpoint i.
 729                     0: Information register.
 730        ((i << 1) + 1): Address register for breakpoint i.
 731        ((i << 1) + 2): Control register for breakpoint i.
 732
 733    This structure is used as a per-thread cache of the state stored by the
 734    kernel, so that we don't need to keep calling into the kernel to find a
 735    free breakpoint.
 736
 737    We treat break-/watch-points with their enable bit clear as being deleted.
 738    */
 739 struct arm_linux_debug_reg_state
 740 {
 741   /* Hardware breakpoints for this process.  */
 742   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 743   /* Hardware watchpoints for this process.  */
 744   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 745 };
 746
 747 /* Per-process arch-specific data we want to keep.  */
 748 struct arm_linux_process_info
 749 {
 750   /* Linked list.  */
 751   struct arm_linux_process_info *next;
 752   /* The process identifier.  */
 753   pid_t pid;
 754   /* Hardware break-/watchpoints state information.  */
 755   struct arm_linux_debug_reg_state state;
 756
 757 };
 758
 759 /* Per-thread arch-specific data we want to keep.  */
 760 struct arch_lwp_info
 761 {
 762   /* Non-zero if our copy differs from what's recorded in the thread.  */
 763   char bpts_changed[MAX_BPTS];
 764   char wpts_changed[MAX_WPTS];
 765 };
 766
 767 static struct arm_linux_process_info *arm_linux_process_list = NULL;
 768
 769 /* Find process data for process PID.  */
 770
 771 static struct arm_linux_process_info *
 772 arm_linux_find_process_pid (pid_t pid)
 773 {
 774   struct arm_linux_process_info *proc;
 775
 776   for (proc = arm_linux_process_list; proc; proc = proc->next)
 777     if (proc->pid == pid)
 778       return proc;
 779
 780   return NULL;
 781 }
 782
 783 /* Add process data for process PID.  Returns newly allocated info
 784    object.  */
 785
 786 static struct arm_linux_process_info *
 787 arm_linux_add_process (pid_t pid)
 788 {
 789   struct arm_linux_process_info *proc;
 790
 791   proc = XCNEW (struct arm_linux_process_info);
 792   proc->pid = pid;
 793
 794   proc->next = arm_linux_process_list;
 795   arm_linux_process_list = proc;
 796
 797   return proc;
 798 }
 799
 800 /* Get data specific info for process PID, creating it if necessary.
 801    Never returns NULL.  */
 802
 803 static struct arm_linux_process_info *
 804 arm_linux_process_info_get (pid_t pid)
 805 {
 806   struct arm_linux_process_info *proc;
 807
 808   proc = arm_linux_find_process_pid (pid);
 809   if (proc == NULL)
 810     proc = arm_linux_add_process (pid);
 811
 812   return proc;
 813 }
 814
 815 /* Called whenever GDB is no longer debugging process PID.  It deletes
 816    data structures that keep track of debug register state.  */
 817
 818 static void
 819 arm_linux_forget_process (pid_t pid)
 820 {
 821   struct arm_linux_process_info *proc, **proc_link;
 822
 823   proc = arm_linux_process_list;
 824   proc_link = &arm_linux_process_list;
 825
 826   while (proc != NULL)
 827     {
 828       if (proc->pid == pid)
 829     {
 830       *proc_link = proc->next;
 831
 832       xfree (proc);
 833       return;
 834     }
 835
 836       proc_link = &proc->next;
 837       proc = *proc_link;
 838     }
 839 }
 840
 841 /* Get hardware break-/watchpoint state for process PID.  */
 842
 843 static struct arm_linux_debug_reg_state *
 844 arm_linux_get_debug_reg_state (pid_t pid)
 845 {
 846   return &arm_linux_process_info_get (pid)->state;
 847 }
 848
 849 /* Initialize an ARM hardware break-/watch-point control register value.
 850    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 851    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 852    */
 853 static arm_hwbp_control_t
 854 arm_hwbp_control_initialize (unsigned byte_address_select,
 855                              arm_hwbp_type hwbp_type,
 856                              int enable)
 857 {
 858   gdb_assert ((byte_address_select & ~0xffU) == 0);
 859   gdb_assert (hwbp_type != arm_hwbp_break
 860               || ((byte_address_select & 0xfU) != 0));
 861
 862   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 863 }
 864
 865 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 866 static int
 867 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 868 {
 869   return control & 0x1;
 870 }
 871
 872 /* Change a breakpoint control word so that it is in the disabled state.  */
 873 static arm_hwbp_control_t
 874 arm_hwbp_control_disable (arm_hwbp_control_t control)
 875 {
 876   return control & ~0x1;
 877 }
 878
 879 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 880    enabled, and will point to the placed address of BP_TGT.  */
 881 static void
 882 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 883                                     struct bp_target_info *bp_tgt,
 884                                     struct arm_linux_hw_breakpoint *p)
 885 {
 886   unsigned mask;
 887   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
 888
 889   /* We have to create a mask for the control register which says which bits
 890      of the word pointed to by address to break on.  */
 891   if (arm_pc_is_thumb (gdbarch, address))
 892     {
 893       mask = 0x3;
 894       address &= ~1;
 895     }
 896   else
 897     {
 898       mask = 0xf;
 899       address &= ~3;
 900     }
 901
 902   p->address = (unsigned int) address;
 903   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
 904 }
 905
 906 /* Get the ARM hardware breakpoint type from the TYPE value we're
 907    given when asked to set a watchpoint.  */
 908 static arm_hwbp_type
 909 arm_linux_get_hwbp_type (enum target_hw_bp_type type)
 910 {
 911   if (type == hw_read)
 912     return arm_hwbp_load;
 913   else if (type == hw_write)
 914     return arm_hwbp_store;
 915   else
 916     return arm_hwbp_access;
 917 }
 918
 919 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
 920    to LEN.  The type of watchpoint is given in RW.  */
 921 static void
 922 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
 923                                     enum target_hw_bp_type type,
 924                                     struct arm_linux_hw_breakpoint *p)
 925 {
 926   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 927   unsigned mask;
 928
 929   gdb_assert (cap != NULL);
 930   gdb_assert (cap->max_wp_length != 0);
 931
 932   mask = (1 << len) - 1;
 933
 934   p->address = (unsigned int) addr;
 935   p->control = arm_hwbp_control_initialize (mask,
 936                                             arm_linux_get_hwbp_type (type), 1);
 937 }
 938
 939 /* Are two break-/watch-points equal?  */
 940 static int
 941 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 942                                const struct arm_linux_hw_breakpoint *p2)
 943 {
 944   return p1->address == p2->address && p1->control == p2->control;
 945 }
 946
 947 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 948    the current process.  */
 949
 950 struct update_registers_data
 951 {
 952   int watch;
 953   int index;
 954 };
 955
 956 static int
 957 update_registers_callback (struct lwp_info *lwp, void *arg)
 958 {
 959   struct update_registers_data *data = (struct update_registers_data *) arg;
 960
 961   if (lwp->arch_private == NULL)
 962     lwp->arch_private = XCNEW (struct arch_lwp_info);
 963
 964   /* The actual update is done later just before resuming the lwp,
 965      we just mark that the registers need updating.  */
 966   if (data->watch)
 967     lwp->arch_private->wpts_changed[data->index] = 1;
 968   else
 969     lwp->arch_private->bpts_changed[data->index] = 1;
 970
 971   /* If the lwp isn't stopped, force it to momentarily pause, so
 972      we can update its breakpoint registers.  */
 973   if (!lwp->stopped)
 974     linux_stop_lwp (lwp);
 975
 976   return 0;
 977 }
 978
 979 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
 980    =1) BPT for thread TID.  */
 981 static void
 982 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
 983                                  int watchpoint)
 984 {
 985   int pid;
 986   ptid_t pid_ptid;
 987   gdb_byte count, i;
 988   struct arm_linux_hw_breakpoint* bpts;
 989   struct update_registers_data data;
 990
 991   pid = ptid_get_pid (inferior_ptid);
 992   pid_ptid = pid_to_ptid (pid);
 993
 994   if (watchpoint)
 995     {
 996       count = arm_linux_get_hw_watchpoint_count ();
 997       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
 998     }
 999   else
1000     {
1001       count = arm_linux_get_hw_breakpoint_count ();
1002       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1003     }
1004
1005   for (i = 0; i < count; ++i)
1006     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1007       {
1008         data.watch = watchpoint;
1009         data.index = i;
1010         bpts[i] = *bpt;
1011         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1012         break;
1013       }
1014
1015   gdb_assert (i != count);
1016 }
1017
1018 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1019    (WATCHPOINT = 1) BPT for thread TID.  */
1020 static void
1021 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1022                                  int watchpoint)
1023 {
1024   int pid;
1025   gdb_byte count, i;
1026   ptid_t pid_ptid;
1027   struct arm_linux_hw_breakpoint* bpts;
1028   struct update_registers_data data;
1029
1030   pid = ptid_get_pid (inferior_ptid);
1031   pid_ptid = pid_to_ptid (pid);
1032
1033   if (watchpoint)
1034     {
1035       count = arm_linux_get_hw_watchpoint_count ();
1036       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1037     }
1038   else
1039     {
1040       count = arm_linux_get_hw_breakpoint_count ();
1041       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1042     }
1043
1044   for (i = 0; i < count; ++i)
1045     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1046       {
1047         data.watch = watchpoint;
1048         data.index = i;
1049         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1050         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1051         break;
1052       }
1053
1054   gdb_assert (i != count);
1055 }
1056
1057 /* Insert a Hardware breakpoint.  */
1058 int
1059 arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
1060                                             struct bp_target_info *bp_tgt)
1061 {
1062   struct lwp_info *lp;
1063   struct arm_linux_hw_breakpoint p;
1064
1065   if (arm_linux_get_hw_breakpoint_count () == 0)
1066     return -1;
1067
1068   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1069
1070   arm_linux_insert_hw_breakpoint1 (&p, 0);
1071
1072   return 0;
1073 }
1074
1075 /* Remove a hardware breakpoint.  */
1076 int
1077 arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
1078                                             struct bp_target_info *bp_tgt)
1079 {
1080   struct lwp_info *lp;
1081   struct arm_linux_hw_breakpoint p;
1082
1083   if (arm_linux_get_hw_breakpoint_count () == 0)
1084     return -1;
1085
1086   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1087
1088   arm_linux_remove_hw_breakpoint1 (&p, 0);
1089
1090   return 0;
1091 }
1092
1093 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1094    ADDR?  */
1095 int
1096 arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
1097 {
1098   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1099   CORE_ADDR max_wp_length, aligned_addr;
1100
1101   /* Can not set watchpoints for zero or negative lengths.  */
1102   if (len <= 0)
1103     return 0;
1104
1105   /* Need to be able to use the ptrace interface.  */
1106   if (cap == NULL || cap->wp_count == 0)
1107     return 0;
1108
1109   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1110      range covered by a watchpoint.  */
1111   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1112   aligned_addr = addr & ~(max_wp_length - 1);
1113
1114   if (aligned_addr + max_wp_length < addr + len)
1115     return 0;
1116
1117   /* The current ptrace interface can only handle watchpoints that are a
1118      power of 2.  */
1119   if ((len & (len - 1)) != 0)
1120     return 0;
1121
1122   /* All tests passed so we must be able to set a watchpoint.  */
1123   return 1;
1124 }
1125
1126 /* Insert a Hardware breakpoint.  */
1127 int
1128 arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
1129                                          enum target_hw_bp_type rw,
1130                                          struct expression *cond)
1131 {
1132   struct lwp_info *lp;
1133   struct arm_linux_hw_breakpoint p;
1134
1135   if (arm_linux_get_hw_watchpoint_count () == 0)
1136     return -1;
1137
1138   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1139
1140   arm_linux_insert_hw_breakpoint1 (&p, 1);
1141
1142   return 0;
1143 }
1144
1145 /* Remove a hardware breakpoint.  */
1146 int
1147 arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr,
1148                                          int len, enum target_hw_bp_type rw,
1149                                          struct expression *cond)
1150 {
1151   struct lwp_info *lp;
1152   struct arm_linux_hw_breakpoint p;
1153
1154   if (arm_linux_get_hw_watchpoint_count () == 0)
1155     return -1;
1156
1157   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1158
1159   arm_linux_remove_hw_breakpoint1 (&p, 1);
1160
1161   return 0;
1162 }
1163
1164 /* What was the data address the target was stopped on accessing.  */
1165 bool
1166 arm_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
1167 {
1168   siginfo_t siginfo;
1169   int slot;
1170
1171   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1172     return false;
1173
1174   /* This must be a hardware breakpoint.  */
1175   if (siginfo.si_signo != SIGTRAP
1176       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1177     return false;
1178
1179   /* We must be able to set hardware watchpoints.  */
1180   if (arm_linux_get_hw_watchpoint_count () == 0)
1181     return 0;
1182
1183   slot = siginfo.si_errno;
1184
1185   /* If we are in a positive slot then we're looking at a breakpoint and not
1186      a watchpoint.  */
1187   if (slot >= 0)
1188     return false;
1189
1190   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1191   return true;
1192 }
1193
1194 /* Has the target been stopped by hitting a watchpoint?  */
1195 bool
1196 arm_linux_nat_target::stopped_by_watchpoint ()
1197 {
1198   CORE_ADDR addr;
1199   return stopped_data_address (&addr);
1200 }
1201
1202 bool
1203 arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
1204                                                     CORE_ADDR start,
1205                                                     int length)
1206 {
1207   return start <= addr && start + length - 1 >= addr;
1208 }
1209
1210 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1211    in the parent thread to the child thread.  */
1212 static void
1213 arm_linux_new_thread (struct lwp_info *lp)
1214 {
1215   int i;
1216   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1217
1218   /* Mark that all the hardware breakpoint/watchpoint register pairs
1219      for this thread need to be initialized.  */
1220
1221   for (i = 0; i < MAX_BPTS; i++)
1222     {
1223       info->bpts_changed[i] = 1;
1224       info->wpts_changed[i] = 1;
1225     }
1226
1227   lp->arch_private = info;
1228 }
1229
1230 /* Function to call when a thread is being deleted.  */
1231
1232 static void
1233 arm_linux_delete_thread (struct arch_lwp_info *arch_lwp)
1234 {
1235   xfree (arch_lwp);
1236 }
1237
1238 /* Called when resuming a thread.
1239    The hardware debug registers are updated when there is any change.  */
1240
1241 static void
1242 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1243 {
1244   int pid, i;
1245   struct arm_linux_hw_breakpoint *bpts, *wpts;
1246   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1247
1248   pid = ptid_get_lwp (lwp->ptid);
1249   bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1250   wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1251
1252   /* NULL means this is the main thread still going through the shell,
1253      or, no watchpoint has been set yet.  In that case, there's
1254      nothing to do.  */
1255   if (arm_lwp_info == NULL)
1256     return;
1257
1258   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1259     if (arm_lwp_info->bpts_changed[i])
1260       {
1261         errno = 0;
1262         if (arm_hwbp_control_is_enabled (bpts[i].control))
1263           if (ptrace (PTRACE_SETHBPREGS, pid,
1264               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1265             perror_with_name (_("Unexpected error setting breakpoint"));
1266
1267         if (bpts[i].control != 0)
1268           if (ptrace (PTRACE_SETHBPREGS, pid,
1269               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1270             perror_with_name (_("Unexpected error setting breakpoint"));
1271
1272         arm_lwp_info->bpts_changed[i] = 0;
1273       }
1274
1275   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1276     if (arm_lwp_info->wpts_changed[i])
1277       {
1278         errno = 0;
1279         if (arm_hwbp_control_is_enabled (wpts[i].control))
1280           if (ptrace (PTRACE_SETHBPREGS, pid,
1281               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1282             perror_with_name (_("Unexpected error setting watchpoint"));
1283
1284         if (wpts[i].control != 0)
1285           if (ptrace (PTRACE_SETHBPREGS, pid,
1286               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1287             perror_with_name (_("Unexpected error setting watchpoint"));
1288
1289         arm_lwp_info->wpts_changed[i] = 0;
1290       }
1291 }
1292
1293 /* linux_nat_new_fork hook.  */
1294
1295 static void
1296 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1297 {
1298   pid_t parent_pid;
1299   struct arm_linux_debug_reg_state *parent_state;
1300   struct arm_linux_debug_reg_state *child_state;
1301
1302   /* NULL means no watchpoint has ever been set in the parent.  In
1303      that case, there's nothing to do.  */
1304   if (parent->arch_private == NULL)
1305     return;
1306
1307   /* GDB core assumes the child inherits the watchpoints/hw
1308      breakpoints of the parent, and will remove them all from the
1309      forked off process.  Copy the debug registers mirrors into the
1310      new process so that all breakpoints and watchpoints can be
1311      removed together.  */
1312
1313   parent_pid = ptid_get_pid (parent->ptid);
1314   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1315   child_state = arm_linux_get_debug_reg_state (child_pid);
1316   *child_state = *parent_state;
1317 }
1318
1319 void
1320 _initialize_arm_linux_nat (void)
1321 {
1322   target_ops *t = &the_arm_linux_nat_target;
1323
1324   /* Register the target.  */
1325   linux_target = &the_arm_linux_nat_target;
1326   add_target (t);
1327
1328   /* Handle thread creation and exit.  */
1329   linux_nat_set_new_thread (t, arm_linux_new_thread);
1330   linux_nat_set_delete_thread (t, arm_linux_delete_thread);
1331   linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1332
1333   /* Handle process creation and exit.  */
1334   linux_nat_set_new_fork (t, arm_linux_new_fork);
1335   linux_nat_set_forget_process (t, arm_linux_forget_process);
1336 }