gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2019 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observable.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33
  34 #include <elf/common.h>
  35 #include <sys/user.h>
  36 #include "nat/gdb_ptrace.h"
  37 #include <sys/utsname.h>
  38 #include <sys/procfs.h>
  39
  40 #include "nat/linux-ptrace.h"
  41
  42 /* Prototypes for supply_gregset etc.  */
  43 #include "gregset.h"
  44
  45 /* Defines ps_err_e, struct ps_prochandle.  */
  46 #include "gdb_proc_service.h"
  47
  48 #ifndef PTRACE_GET_THREAD_AREA
  49 #define PTRACE_GET_THREAD_AREA 22
  50 #endif
  51
  52 #ifndef PTRACE_GETWMMXREGS
  53 #define PTRACE_GETWMMXREGS 18
  54 #define PTRACE_SETWMMXREGS 19
  55 #endif
  56
  57 #ifndef PTRACE_GETVFPREGS
  58 #define PTRACE_GETVFPREGS 27
  59 #define PTRACE_SETVFPREGS 28
  60 #endif
  61
  62 #ifndef PTRACE_GETHBPREGS
  63 #define PTRACE_GETHBPREGS 29
  64 #define PTRACE_SETHBPREGS 30
  65 #endif
  66
  67 extern int arm_apcs_32;
  68
  69 class arm_linux_nat_target final : public linux_nat_target
  70 {
  71 public:
  72   /* Add our register access methods.  */
  73   void fetch_registers (struct regcache *, int) override;
  74   void store_registers (struct regcache *, int) override;
  75
  76   /* Add our hardware breakpoint and watchpoint implementation.  */
  77   int can_use_hw_breakpoint (enum bptype, int, int) override;
  78
  79   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  80
  81   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  82
  83   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  84
  85   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  86                          struct expression *) override;
  87
  88   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  89                          struct expression *) override;
  90   bool stopped_by_watchpoint () override;
  91
  92   bool stopped_data_address (CORE_ADDR *) override;
  93
  94   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  95
  96   const struct target_desc *read_description () override;
  97
  98   /* Override linux_nat_target low methods.  */
  99
 100   /* Handle thread creation and exit.  */
 101   void low_new_thread (struct lwp_info *lp) override;
 102   void low_delete_thread (struct arch_lwp_info *lp) override;
 103   void low_prepare_to_resume (struct lwp_info *lp) override;
 104
 105   /* Handle process creation and exit.  */
 106   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
 107   void low_forget_process (pid_t pid) override;
 108 };
 109
 110 static arm_linux_nat_target the_arm_linux_nat_target;
 111
 112 /* Get the whole floating point state of the process and store it
 113    into regcache.  */
 114
 115 static void
 116 fetch_fpregs (struct regcache *regcache)
 117 {
 118   int ret, regno, tid;
 119   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 120
 121   /* Get the thread id for the ptrace call.  */
 122   tid = regcache->ptid ().lwp ();
 123
 124   /* Read the floating point state.  */
 125   if (have_ptrace_getregset == TRIBOOL_TRUE)
 126     {
 127       struct iovec iov;
 128
 129       iov.iov_base = &fp;
 130       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 131
 132       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 133     }
 134   else
 135     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 136
 137   if (ret < 0)
 138     perror_with_name (_("Unable to fetch the floating point registers."));
 139
 140   /* Fetch fpsr.  */
 141   regcache->raw_supply (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 142
 143   /* Fetch the floating point registers.  */
 144   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 145     supply_nwfpe_register (regcache, regno, fp);
 146 }
 147
 148 /* Save the whole floating point state of the process using
 149    the contents from regcache.  */
 150
 151 static void
 152 store_fpregs (const struct regcache *regcache)
 153 {
 154   int ret, regno, tid;
 155   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 156
 157   /* Get the thread id for the ptrace call.  */
 158   tid = regcache->ptid ().lwp ();
 159
 160   /* Read the floating point state.  */
 161   if (have_ptrace_getregset == TRIBOOL_TRUE)
 162     {
 163       elf_fpregset_t fpregs;
 164       struct iovec iov;
 165
 166       iov.iov_base = &fpregs;
 167       iov.iov_len = sizeof (fpregs);
 168
 169       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 170     }
 171   else
 172     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 173
 174   if (ret < 0)
 175     perror_with_name (_("Unable to fetch the floating point registers."));
 176
 177   /* Store fpsr.  */
 178   if (REG_VALID == regcache->get_register_status (ARM_FPS_REGNUM))
 179     regcache->raw_collect (ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 180
 181   /* Store the floating point registers.  */
 182   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 183     if (REG_VALID == regcache->get_register_status (regno))
 184       collect_nwfpe_register (regcache, regno, fp);
 185
 186   if (have_ptrace_getregset == TRIBOOL_TRUE)
 187     {
 188       struct iovec iov;
 189
 190       iov.iov_base = &fp;
 191       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 192
 193       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 194     }
 195   else
 196     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 197
 198   if (ret < 0)
 199     perror_with_name (_("Unable to store floating point registers."));
 200 }
 201
 202 /* Fetch all general registers of the process and store into
 203    regcache.  */
 204
 205 static void
 206 fetch_regs (struct regcache *regcache)
 207 {
 208   int ret, tid;
 209   elf_gregset_t regs;
 210
 211   /* Get the thread id for the ptrace call.  */
 212   tid = regcache->ptid ().lwp ();
 213
 214   if (have_ptrace_getregset == TRIBOOL_TRUE)
 215     {
 216       struct iovec iov;
 217
 218       iov.iov_base = &regs;
 219       iov.iov_len = sizeof (regs);
 220
 221       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 222     }
 223   else
 224     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 225
 226   if (ret < 0)
 227     perror_with_name (_("Unable to fetch general registers."));
 228
 229   aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
 230 }
 231
 232 static void
 233 store_regs (const struct regcache *regcache)
 234 {
 235   int ret, tid;
 236   elf_gregset_t regs;
 237
 238   /* Get the thread id for the ptrace call.  */
 239   tid = regcache->ptid ().lwp ();
 240
 241   /* Fetch the general registers.  */
 242   if (have_ptrace_getregset == TRIBOOL_TRUE)
 243     {
 244       struct iovec iov;
 245
 246       iov.iov_base = &regs;
 247       iov.iov_len = sizeof (regs);
 248
 249       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 250     }
 251   else
 252     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 253
 254   if (ret < 0)
 255     perror_with_name (_("Unable to fetch general registers."));
 256
 257   aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
 258
 259   if (have_ptrace_getregset == TRIBOOL_TRUE)
 260     {
 261       struct iovec iov;
 262
 263       iov.iov_base = &regs;
 264       iov.iov_len = sizeof (regs);
 265
 266       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 267     }
 268   else
 269     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 270
 271   if (ret < 0)
 272     perror_with_name (_("Unable to store general registers."));
 273 }
 274
 275 /* Fetch all WMMX registers of the process and store into
 276    regcache.  */
 277
 278 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 279
 280 static void
 281 fetch_wmmx_regs (struct regcache *regcache)
 282 {
 283   char regbuf[IWMMXT_REGS_SIZE];
 284   int ret, regno, tid;
 285
 286   /* Get the thread id for the ptrace call.  */
 287   tid = regcache->ptid ().lwp ();
 288
 289   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 290   if (ret < 0)
 291     perror_with_name (_("Unable to fetch WMMX registers."));
 292
 293   for (regno = 0; regno < 16; regno++)
 294     regcache->raw_supply (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
 295
 296   for (regno = 0; regno < 2; regno++)
 297     regcache->raw_supply (regno + ARM_WCSSF_REGNUM,
 298                           &regbuf[16 * 8 + regno * 4]);
 299
 300   for (regno = 0; regno < 4; regno++)
 301     regcache->raw_supply (regno + ARM_WCGR0_REGNUM,
 302                           &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 303 }
 304
 305 static void
 306 store_wmmx_regs (const struct regcache *regcache)
 307 {
 308   char regbuf[IWMMXT_REGS_SIZE];
 309   int ret, regno, tid;
 310
 311   /* Get the thread id for the ptrace call.  */
 312   tid = regcache->ptid ().lwp ();
 313
 314   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 315   if (ret < 0)
 316     perror_with_name (_("Unable to fetch WMMX registers."));
 317
 318   for (regno = 0; regno < 16; regno++)
 319     if (REG_VALID == regcache->get_register_status (regno + ARM_WR0_REGNUM))
 320       regcache->raw_collect (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
 321
 322   for (regno = 0; regno < 2; regno++)
 323     if (REG_VALID == regcache->get_register_status (regno + ARM_WCSSF_REGNUM))
 324       regcache->raw_collect (regno + ARM_WCSSF_REGNUM,
 325                              &regbuf[16 * 8 + regno * 4]);
 326
 327   for (regno = 0; regno < 4; regno++)
 328     if (REG_VALID == regcache->get_register_status (regno + ARM_WCGR0_REGNUM))
 329       regcache->raw_collect (regno + ARM_WCGR0_REGNUM,
 330                              &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 331
 332   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 333
 334   if (ret < 0)
 335     perror_with_name (_("Unable to store WMMX registers."));
 336 }
 337
 338 static void
 339 fetch_vfp_regs (struct regcache *regcache)
 340 {
 341   gdb_byte regbuf[VFP_REGS_SIZE];
 342   int ret, tid;
 343   struct gdbarch *gdbarch = regcache->arch ();
 344   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 345
 346   /* Get the thread id for the ptrace call.  */
 347   tid = regcache->ptid ().lwp ();
 348
 349   if (have_ptrace_getregset == TRIBOOL_TRUE)
 350     {
 351       struct iovec iov;
 352
 353       iov.iov_base = regbuf;
 354       iov.iov_len = VFP_REGS_SIZE;
 355       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 356     }
 357   else
 358     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 359
 360   if (ret < 0)
 361     perror_with_name (_("Unable to fetch VFP registers."));
 362
 363   aarch32_vfp_regcache_supply (regcache, regbuf,
 364                                tdep->vfp_register_count);
 365 }
 366
 367 static void
 368 store_vfp_regs (const struct regcache *regcache)
 369 {
 370   gdb_byte regbuf[VFP_REGS_SIZE];
 371   int ret, tid;
 372   struct gdbarch *gdbarch = regcache->arch ();
 373   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 374
 375   /* Get the thread id for the ptrace call.  */
 376   tid = regcache->ptid ().lwp ();
 377
 378   if (have_ptrace_getregset == TRIBOOL_TRUE)
 379     {
 380       struct iovec iov;
 381
 382       iov.iov_base = regbuf;
 383       iov.iov_len = VFP_REGS_SIZE;
 384       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 385     }
 386   else
 387     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 388
 389   if (ret < 0)
 390     perror_with_name (_("Unable to fetch VFP registers (for update)."));
 391
 392   aarch32_vfp_regcache_collect (regcache, regbuf,
 393                                 tdep->vfp_register_count);
 394
 395   if (have_ptrace_getregset == TRIBOOL_TRUE)
 396     {
 397       struct iovec iov;
 398
 399       iov.iov_base = regbuf;
 400       iov.iov_len = VFP_REGS_SIZE;
 401       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
 402     }
 403   else
 404     ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 405
 406   if (ret < 0)
 407     perror_with_name (_("Unable to store VFP registers."));
 408 }
 409
 410 /* Fetch registers from the child process.  Fetch all registers if
 411    regno == -1, otherwise fetch all general registers or all floating
 412    point registers depending upon the value of regno.  */
 413
 414 void
 415 arm_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
 416 {
 417   struct gdbarch *gdbarch = regcache->arch ();
 418   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 419
 420   if (-1 == regno)
 421     {
 422       fetch_regs (regcache);
 423       if (tdep->have_wmmx_registers)
 424         fetch_wmmx_regs (regcache);
 425       if (tdep->vfp_register_count > 0)
 426         fetch_vfp_regs (regcache);
 427       if (tdep->have_fpa_registers)
 428         fetch_fpregs (regcache);
 429     }
 430   else
 431     {
 432       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 433         fetch_regs (regcache);
 434       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 435         fetch_fpregs (regcache);
 436       else if (tdep->have_wmmx_registers
 437                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 438         fetch_wmmx_regs (regcache);
 439       else if (tdep->vfp_register_count > 0
 440                && regno >= ARM_D0_REGNUM
 441                && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
 442                    || regno == ARM_FPSCR_REGNUM))
 443         fetch_vfp_regs (regcache);
 444     }
 445 }
 446
 447 /* Store registers back into the inferior.  Store all registers if
 448    regno == -1, otherwise store all general registers or all floating
 449    point registers depending upon the value of regno.  */
 450
 451 void
 452 arm_linux_nat_target::store_registers (struct regcache *regcache, int regno)
 453 {
 454   struct gdbarch *gdbarch = regcache->arch ();
 455   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 456
 457   if (-1 == regno)
 458     {
 459       store_regs (regcache);
 460       if (tdep->have_wmmx_registers)
 461         store_wmmx_regs (regcache);
 462       if (tdep->vfp_register_count > 0)
 463         store_vfp_regs (regcache);
 464       if (tdep->have_fpa_registers)
 465         store_fpregs (regcache);
 466     }
 467   else
 468     {
 469       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 470         store_regs (regcache);
 471       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 472         store_fpregs (regcache);
 473       else if (tdep->have_wmmx_registers
 474                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 475         store_wmmx_regs (regcache);
 476       else if (tdep->vfp_register_count > 0
 477                && regno >= ARM_D0_REGNUM
 478                && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
 479                    || regno == ARM_FPSCR_REGNUM))
 480         store_vfp_regs (regcache);
 481     }
 482 }
 483
 484 /* Wrapper functions for the standard regset handling, used by
 485    thread debugging.  */
 486
 487 void
 488 fill_gregset (const struct regcache *regcache,
 489               gdb_gregset_t *gregsetp, int regno)
 490 {
 491   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 492 }
 493
 494 void
 495 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 496 {
 497   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 498 }
 499
 500 void
 501 fill_fpregset (const struct regcache *regcache,
 502                gdb_fpregset_t *fpregsetp, int regno)
 503 {
 504   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 505 }
 506
 507 /* Fill GDB's register array with the floating-point register values
 508    in *fpregsetp.  */
 509
 510 void
 511 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 512 {
 513   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 514 }
 515
 516 /* Fetch the thread-local storage pointer for libthread_db.  */
 517
 518 ps_err_e
 519 ps_get_thread_area (struct ps_prochandle *ph,
 520                     lwpid_t lwpid, int idx, void **base)
 521 {
 522   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 523     return PS_ERR;
 524
 525   /* IDX is the bias from the thread pointer to the beginning of the
 526      thread descriptor.  It has to be subtracted due to implementation
 527      quirks in libthread_db.  */
 528   *base = (void *) ((char *)*base - idx);
 529
 530   return PS_OK;
 531 }
 532
 533 const struct target_desc *
 534 arm_linux_nat_target::read_description ()
 535 {
 536   CORE_ADDR arm_hwcap = 0;
 537
 538   if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
 539     {
 540       elf_gregset_t gpregs;
 541       struct iovec iov;
 542       int tid = inferior_ptid.lwp ();
 543
 544       iov.iov_base = &gpregs;
 545       iov.iov_len = sizeof (gpregs);
 546
 547       /* Check if PTRACE_GETREGSET works.  */
 548       if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
 549         have_ptrace_getregset = TRIBOOL_FALSE;
 550       else
 551         have_ptrace_getregset = TRIBOOL_TRUE;
 552     }
 553
 554   if (target_auxv_search (this, AT_HWCAP, &arm_hwcap) != 1)
 555     {
 556       return this->beneath ()->read_description ();
 557     }
 558
 559   if (arm_hwcap & HWCAP_IWMMXT)
 560     return tdesc_arm_with_iwmmxt;
 561
 562   if (arm_hwcap & HWCAP_VFP)
 563     {
 564       int pid;
 565       char *buf;
 566       const struct target_desc * result = NULL;
 567
 568       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 569          Neon with VFPv3-D32.  */
 570       if (arm_hwcap & HWCAP_NEON)
 571         result = tdesc_arm_with_neon;
 572       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 573         result = tdesc_arm_with_vfpv3;
 574       else
 575         result = tdesc_arm_with_vfpv2;
 576
 577       /* Now make sure that the kernel supports reading these
 578          registers.  Support was added in 2.6.30.  */
 579       pid = inferior_ptid.lwp ();
 580       errno = 0;
 581       buf = (char *) alloca (VFP_REGS_SIZE);
 582       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 583           && errno == EIO)
 584         result = NULL;
 585
 586       return result;
 587     }
 588
 589   return this->beneath ()->read_description ();
 590 }
 591
 592 /* Information describing the hardware breakpoint capabilities.  */
 593 struct arm_linux_hwbp_cap
 594 {
 595   gdb_byte arch;
 596   gdb_byte max_wp_length;
 597   gdb_byte wp_count;
 598   gdb_byte bp_count;
 599 };
 600
 601 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 602    assume a maximum number of supported break-/watchpoints.  */
 603 #define MAX_BPTS 16
 604 #define MAX_WPTS 16
 605
 606 /* Get hold of the Hardware Breakpoint information for the target we are
 607    attached to.  Returns NULL if the kernel doesn't support Hardware
 608    breakpoints at all, or a pointer to the information structure.  */
 609 static const struct arm_linux_hwbp_cap *
 610 arm_linux_get_hwbp_cap (void)
 611 {
 612   /* The info structure we return.  */
 613   static struct arm_linux_hwbp_cap info;
 614
 615   /* Is INFO in a good state?  -1 means that no attempt has been made to
 616      initialize INFO; 0 means an attempt has been made, but it failed; 1
 617      means INFO is in an initialized state.  */
 618   static int available = -1;
 619
 620   if (available == -1)
 621     {
 622       int tid;
 623       unsigned int val;
 624
 625       tid = inferior_ptid.lwp ();
 626       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 627         available = 0;
 628       else
 629         {
 630           info.arch = (gdb_byte)((val >> 24) & 0xff);
 631           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 632           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 633           info.bp_count = (gdb_byte)(val & 0xff);
 634
 635       if (info.wp_count > MAX_WPTS)
 636         {
 637           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 638                       supports %d"), MAX_WPTS, info.wp_count);
 639           info.wp_count = MAX_WPTS;
 640         }
 641
 642       if (info.bp_count > MAX_BPTS)
 643         {
 644           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 645                       supports %d"), MAX_BPTS, info.bp_count);
 646           info.bp_count = MAX_BPTS;
 647         }
 648           available = (info.arch != 0);
 649         }
 650     }
 651
 652   return available == 1 ? &info : NULL;
 653 }
 654
 655 /* How many hardware breakpoints are available?  */
 656 static int
 657 arm_linux_get_hw_breakpoint_count (void)
 658 {
 659   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 660   return cap != NULL ? cap->bp_count : 0;
 661 }
 662
 663 /* How many hardware watchpoints are available?  */
 664 static int
 665 arm_linux_get_hw_watchpoint_count (void)
 666 {
 667   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 668   return cap != NULL ? cap->wp_count : 0;
 669 }
 670
 671 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 672    there is not an appropriate resource available, otherwise returns 1.  */
 673 int
 674 arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 675                                              int cnt, int ot)
 676 {
 677   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 678       || type == bp_access_watchpoint || type == bp_watchpoint)
 679     {
 680       int count = arm_linux_get_hw_watchpoint_count ();
 681
 682       if (count == 0)
 683         return 0;
 684       else if (cnt + ot > count)
 685         return -1;
 686     }
 687   else if (type == bp_hardware_breakpoint)
 688     {
 689       int count = arm_linux_get_hw_breakpoint_count ();
 690
 691       if (count == 0)
 692         return 0;
 693       else if (cnt > count)
 694         return -1;
 695     }
 696   else
 697     gdb_assert (FALSE);
 698
 699   return 1;
 700 }
 701
 702 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 703 typedef enum
 704 {
 705   arm_hwbp_break = 0,
 706   arm_hwbp_load = 1,
 707   arm_hwbp_store = 2,
 708   arm_hwbp_access = 3
 709 } arm_hwbp_type;
 710
 711 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 712 typedef unsigned int arm_hwbp_control_t;
 713
 714 /* Structure used to keep track of hardware break-/watch-points.  */
 715 struct arm_linux_hw_breakpoint
 716 {
 717   /* Address to break on, or being watched.  */
 718   unsigned int address;
 719   /* Control register for break-/watch- point.  */
 720   arm_hwbp_control_t control;
 721 };
 722
 723 /* Structure containing arrays of per process hardware break-/watchpoints
 724    for caching address and control information.
 725
 726    The Linux ptrace interface to hardware break-/watch-points presents the
 727    values in a vector centred around 0 (which is used fo generic information).
 728    Positive indicies refer to breakpoint addresses/control registers, negative
 729    indices to watchpoint addresses/control registers.
 730
 731    The Linux vector is indexed as follows:
 732       -((i << 1) + 2): Control register for watchpoint i.
 733       -((i << 1) + 1): Address register for watchpoint i.
 734                     0: Information register.
 735        ((i << 1) + 1): Address register for breakpoint i.
 736        ((i << 1) + 2): Control register for breakpoint i.
 737
 738    This structure is used as a per-thread cache of the state stored by the
 739    kernel, so that we don't need to keep calling into the kernel to find a
 740    free breakpoint.
 741
 742    We treat break-/watch-points with their enable bit clear as being deleted.
 743    */
 744 struct arm_linux_debug_reg_state
 745 {
 746   /* Hardware breakpoints for this process.  */
 747   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 748   /* Hardware watchpoints for this process.  */
 749   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 750 };
 751
 752 /* Per-process arch-specific data we want to keep.  */
 753 struct arm_linux_process_info
 754 {
 755   /* Linked list.  */
 756   struct arm_linux_process_info *next;
 757   /* The process identifier.  */
 758   pid_t pid;
 759   /* Hardware break-/watchpoints state information.  */
 760   struct arm_linux_debug_reg_state state;
 761
 762 };
 763
 764 /* Per-thread arch-specific data we want to keep.  */
 765 struct arch_lwp_info
 766 {
 767   /* Non-zero if our copy differs from what's recorded in the thread.  */
 768   char bpts_changed[MAX_BPTS];
 769   char wpts_changed[MAX_WPTS];
 770 };
 771
 772 static struct arm_linux_process_info *arm_linux_process_list = NULL;
 773
 774 /* Find process data for process PID.  */
 775
 776 static struct arm_linux_process_info *
 777 arm_linux_find_process_pid (pid_t pid)
 778 {
 779   struct arm_linux_process_info *proc;
 780
 781   for (proc = arm_linux_process_list; proc; proc = proc->next)
 782     if (proc->pid == pid)
 783       return proc;
 784
 785   return NULL;
 786 }
 787
 788 /* Add process data for process PID.  Returns newly allocated info
 789    object.  */
 790
 791 static struct arm_linux_process_info *
 792 arm_linux_add_process (pid_t pid)
 793 {
 794   struct arm_linux_process_info *proc;
 795
 796   proc = XCNEW (struct arm_linux_process_info);
 797   proc->pid = pid;
 798
 799   proc->next = arm_linux_process_list;
 800   arm_linux_process_list = proc;
 801
 802   return proc;
 803 }
 804
 805 /* Get data specific info for process PID, creating it if necessary.
 806    Never returns NULL.  */
 807
 808 static struct arm_linux_process_info *
 809 arm_linux_process_info_get (pid_t pid)
 810 {
 811   struct arm_linux_process_info *proc;
 812
 813   proc = arm_linux_find_process_pid (pid);
 814   if (proc == NULL)
 815     proc = arm_linux_add_process (pid);
 816
 817   return proc;
 818 }
 819
 820 /* Called whenever GDB is no longer debugging process PID.  It deletes
 821    data structures that keep track of debug register state.  */
 822
 823 void
 824 arm_linux_nat_target::low_forget_process (pid_t pid)
 825 {
 826   struct arm_linux_process_info *proc, **proc_link;
 827
 828   proc = arm_linux_process_list;
 829   proc_link = &arm_linux_process_list;
 830
 831   while (proc != NULL)
 832     {
 833       if (proc->pid == pid)
 834     {
 835       *proc_link = proc->next;
 836
 837       xfree (proc);
 838       return;
 839     }
 840
 841       proc_link = &proc->next;
 842       proc = *proc_link;
 843     }
 844 }
 845
 846 /* Get hardware break-/watchpoint state for process PID.  */
 847
 848 static struct arm_linux_debug_reg_state *
 849 arm_linux_get_debug_reg_state (pid_t pid)
 850 {
 851   return &arm_linux_process_info_get (pid)->state;
 852 }
 853
 854 /* Initialize an ARM hardware break-/watch-point control register value.
 855    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 856    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 857    */
 858 static arm_hwbp_control_t
 859 arm_hwbp_control_initialize (unsigned byte_address_select,
 860                              arm_hwbp_type hwbp_type,
 861                              int enable)
 862 {
 863   gdb_assert ((byte_address_select & ~0xffU) == 0);
 864   gdb_assert (hwbp_type != arm_hwbp_break
 865               || ((byte_address_select & 0xfU) != 0));
 866
 867   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 868 }
 869
 870 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 871 static int
 872 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 873 {
 874   return control & 0x1;
 875 }
 876
 877 /* Change a breakpoint control word so that it is in the disabled state.  */
 878 static arm_hwbp_control_t
 879 arm_hwbp_control_disable (arm_hwbp_control_t control)
 880 {
 881   return control & ~0x1;
 882 }
 883
 884 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 885    enabled, and will point to the placed address of BP_TGT.  */
 886 static void
 887 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 888                                     struct bp_target_info *bp_tgt,
 889                                     struct arm_linux_hw_breakpoint *p)
 890 {
 891   unsigned mask;
 892   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
 893
 894   /* We have to create a mask for the control register which says which bits
 895      of the word pointed to by address to break on.  */
 896   if (arm_pc_is_thumb (gdbarch, address))
 897     {
 898       mask = 0x3;
 899       address &= ~1;
 900     }
 901   else
 902     {
 903       mask = 0xf;
 904       address &= ~3;
 905     }
 906
 907   p->address = (unsigned int) address;
 908   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
 909 }
 910
 911 /* Get the ARM hardware breakpoint type from the TYPE value we're
 912    given when asked to set a watchpoint.  */
 913 static arm_hwbp_type
 914 arm_linux_get_hwbp_type (enum target_hw_bp_type type)
 915 {
 916   if (type == hw_read)
 917     return arm_hwbp_load;
 918   else if (type == hw_write)
 919     return arm_hwbp_store;
 920   else
 921     return arm_hwbp_access;
 922 }
 923
 924 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
 925    to LEN.  The type of watchpoint is given in RW.  */
 926 static void
 927 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
 928                                     enum target_hw_bp_type type,
 929                                     struct arm_linux_hw_breakpoint *p)
 930 {
 931   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 932   unsigned mask;
 933
 934   gdb_assert (cap != NULL);
 935   gdb_assert (cap->max_wp_length != 0);
 936
 937   mask = (1 << len) - 1;
 938
 939   p->address = (unsigned int) addr;
 940   p->control = arm_hwbp_control_initialize (mask,
 941                                             arm_linux_get_hwbp_type (type), 1);
 942 }
 943
 944 /* Are two break-/watch-points equal?  */
 945 static int
 946 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 947                                const struct arm_linux_hw_breakpoint *p2)
 948 {
 949   return p1->address == p2->address && p1->control == p2->control;
 950 }
 951
 952 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 953    the current process.  */
 954
 955 static int
 956 update_registers_callback (struct lwp_info *lwp, int watch, int index)
 957 {
 958   if (lwp->arch_private == NULL)
 959     lwp->arch_private = XCNEW (struct arch_lwp_info);
 960
 961   /* The actual update is done later just before resuming the lwp,
 962      we just mark that the registers need updating.  */
 963   if (watch)
 964     lwp->arch_private->wpts_changed[index] = 1;
 965   else
 966     lwp->arch_private->bpts_changed[index] = 1;
 967
 968   /* If the lwp isn't stopped, force it to momentarily pause, so
 969      we can update its breakpoint registers.  */
 970   if (!lwp->stopped)
 971     linux_stop_lwp (lwp);
 972
 973   return 0;
 974 }
 975
 976 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
 977    =1) BPT for thread TID.  */
 978 static void
 979 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
 980                                  int watchpoint)
 981 {
 982   int pid;
 983   ptid_t pid_ptid;
 984   gdb_byte count, i;
 985   struct arm_linux_hw_breakpoint* bpts;
 986
 987   pid = inferior_ptid.pid ();
 988   pid_ptid = ptid_t (pid);
 989
 990   if (watchpoint)
 991     {
 992       count = arm_linux_get_hw_watchpoint_count ();
 993       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
 994     }
 995   else
 996     {
 997       count = arm_linux_get_hw_breakpoint_count ();
 998       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
 999     }
1000
1001   for (i = 0; i < count; ++i)
1002     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1003       {
1004         bpts[i] = *bpt;
1005         iterate_over_lwps (pid_ptid,
1006                            [=] (struct lwp_info *info)
1007                            {
1008                              return update_registers_callback (info, watch,
1009                                                                index);
1010                            });
1011         break;
1012       }
1013
1014   gdb_assert (i != count);
1015 }
1016
1017 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1018    (WATCHPOINT = 1) BPT for thread TID.  */
1019 static void
1020 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1021                                  int watchpoint)
1022 {
1023   int pid;
1024   gdb_byte count, i;
1025   ptid_t pid_ptid;
1026   struct arm_linux_hw_breakpoint* bpts;
1027   struct update_registers_data data;
1028
1029   pid = inferior_ptid.pid ();
1030   pid_ptid = ptid_t (pid);
1031
1032   if (watchpoint)
1033     {
1034       count = arm_linux_get_hw_watchpoint_count ();
1035       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1036     }
1037   else
1038     {
1039       count = arm_linux_get_hw_breakpoint_count ();
1040       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1041     }
1042
1043   for (i = 0; i < count; ++i)
1044     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1045       {
1046         data.watch = watchpoint;
1047         data.index = i;
1048         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1049         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1050         break;
1051       }
1052
1053   gdb_assert (i != count);
1054 }
1055
1056 /* Insert a Hardware breakpoint.  */
1057 int
1058 arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
1059                                             struct bp_target_info *bp_tgt)
1060 {
1061   struct arm_linux_hw_breakpoint p;
1062
1063   if (arm_linux_get_hw_breakpoint_count () == 0)
1064     return -1;
1065
1066   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1067
1068   arm_linux_insert_hw_breakpoint1 (&p, 0);
1069
1070   return 0;
1071 }
1072
1073 /* Remove a hardware breakpoint.  */
1074 int
1075 arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
1076                                             struct bp_target_info *bp_tgt)
1077 {
1078   struct arm_linux_hw_breakpoint p;
1079
1080   if (arm_linux_get_hw_breakpoint_count () == 0)
1081     return -1;
1082
1083   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1084
1085   arm_linux_remove_hw_breakpoint1 (&p, 0);
1086
1087   return 0;
1088 }
1089
1090 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1091    ADDR?  */
1092 int
1093 arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
1094 {
1095   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1096   CORE_ADDR max_wp_length, aligned_addr;
1097
1098   /* Can not set watchpoints for zero or negative lengths.  */
1099   if (len <= 0)
1100     return 0;
1101
1102   /* Need to be able to use the ptrace interface.  */
1103   if (cap == NULL || cap->wp_count == 0)
1104     return 0;
1105
1106   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1107      range covered by a watchpoint.  */
1108   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1109   aligned_addr = addr & ~(max_wp_length - 1);
1110
1111   if (aligned_addr + max_wp_length < addr + len)
1112     return 0;
1113
1114   /* The current ptrace interface can only handle watchpoints that are a
1115      power of 2.  */
1116   if ((len & (len - 1)) != 0)
1117     return 0;
1118
1119   /* All tests passed so we must be able to set a watchpoint.  */
1120   return 1;
1121 }
1122
1123 /* Insert a Hardware breakpoint.  */
1124 int
1125 arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
1126                                          enum target_hw_bp_type rw,
1127                                          struct expression *cond)
1128 {
1129   struct arm_linux_hw_breakpoint p;
1130
1131   if (arm_linux_get_hw_watchpoint_count () == 0)
1132     return -1;
1133
1134   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1135
1136   arm_linux_insert_hw_breakpoint1 (&p, 1);
1137
1138   return 0;
1139 }
1140
1141 /* Remove a hardware breakpoint.  */
1142 int
1143 arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr,
1144                                          int len, enum target_hw_bp_type rw,
1145                                          struct expression *cond)
1146 {
1147   struct arm_linux_hw_breakpoint p;
1148
1149   if (arm_linux_get_hw_watchpoint_count () == 0)
1150     return -1;
1151
1152   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1153
1154   arm_linux_remove_hw_breakpoint1 (&p, 1);
1155
1156   return 0;
1157 }
1158
1159 /* What was the data address the target was stopped on accessing.  */
1160 bool
1161 arm_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
1162 {
1163   siginfo_t siginfo;
1164   int slot;
1165
1166   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1167     return false;
1168
1169   /* This must be a hardware breakpoint.  */
1170   if (siginfo.si_signo != SIGTRAP
1171       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1172     return false;
1173
1174   /* We must be able to set hardware watchpoints.  */
1175   if (arm_linux_get_hw_watchpoint_count () == 0)
1176     return 0;
1177
1178   slot = siginfo.si_errno;
1179
1180   /* If we are in a positive slot then we're looking at a breakpoint and not
1181      a watchpoint.  */
1182   if (slot >= 0)
1183     return false;
1184
1185   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1186   return true;
1187 }
1188
1189 /* Has the target been stopped by hitting a watchpoint?  */
1190 bool
1191 arm_linux_nat_target::stopped_by_watchpoint ()
1192 {
1193   CORE_ADDR addr;
1194   return stopped_data_address (&addr);
1195 }
1196
1197 bool
1198 arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
1199                                                     CORE_ADDR start,
1200                                                     int length)
1201 {
1202   return start <= addr && start + length - 1 >= addr;
1203 }
1204
1205 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1206    in the parent thread to the child thread.  */
1207 void
1208 arm_linux_nat_target::low_new_thread (struct lwp_info *lp)
1209 {
1210   int i;
1211   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1212
1213   /* Mark that all the hardware breakpoint/watchpoint register pairs
1214      for this thread need to be initialized.  */
1215
1216   for (i = 0; i < MAX_BPTS; i++)
1217     {
1218       info->bpts_changed[i] = 1;
1219       info->wpts_changed[i] = 1;
1220     }
1221
1222   lp->arch_private = info;
1223 }
1224
1225 /* Function to call when a thread is being deleted.  */
1226
1227 void
1228 arm_linux_nat_target::low_delete_thread (struct arch_lwp_info *arch_lwp)
1229 {
1230   xfree (arch_lwp);
1231 }
1232
1233 /* Called when resuming a thread.
1234    The hardware debug registers are updated when there is any change.  */
1235
1236 void
1237 arm_linux_nat_target::low_prepare_to_resume (struct lwp_info *lwp)
1238 {
1239   int pid, i;
1240   struct arm_linux_hw_breakpoint *bpts, *wpts;
1241   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1242
1243   pid = lwp->ptid.lwp ();
1244   bpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->bpts;
1245   wpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->wpts;
1246
1247   /* NULL means this is the main thread still going through the shell,
1248      or, no watchpoint has been set yet.  In that case, there's
1249      nothing to do.  */
1250   if (arm_lwp_info == NULL)
1251     return;
1252
1253   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1254     if (arm_lwp_info->bpts_changed[i])
1255       {
1256         errno = 0;
1257         if (arm_hwbp_control_is_enabled (bpts[i].control))
1258           if (ptrace (PTRACE_SETHBPREGS, pid,
1259               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1260             perror_with_name (_("Unexpected error setting breakpoint"));
1261
1262         if (bpts[i].control != 0)
1263           if (ptrace (PTRACE_SETHBPREGS, pid,
1264               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1265             perror_with_name (_("Unexpected error setting breakpoint"));
1266
1267         arm_lwp_info->bpts_changed[i] = 0;
1268       }
1269
1270   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1271     if (arm_lwp_info->wpts_changed[i])
1272       {
1273         errno = 0;
1274         if (arm_hwbp_control_is_enabled (wpts[i].control))
1275           if (ptrace (PTRACE_SETHBPREGS, pid,
1276               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1277             perror_with_name (_("Unexpected error setting watchpoint"));
1278
1279         if (wpts[i].control != 0)
1280           if (ptrace (PTRACE_SETHBPREGS, pid,
1281               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1282             perror_with_name (_("Unexpected error setting watchpoint"));
1283
1284         arm_lwp_info->wpts_changed[i] = 0;
1285       }
1286 }
1287
1288 /* linux_nat_new_fork hook.  */
1289
1290 void
1291 arm_linux_nat_target::low_new_fork (struct lwp_info *parent, pid_t child_pid)
1292 {
1293   pid_t parent_pid;
1294   struct arm_linux_debug_reg_state *parent_state;
1295   struct arm_linux_debug_reg_state *child_state;
1296
1297   /* NULL means no watchpoint has ever been set in the parent.  In
1298      that case, there's nothing to do.  */
1299   if (parent->arch_private == NULL)
1300     return;
1301
1302   /* GDB core assumes the child inherits the watchpoints/hw
1303      breakpoints of the parent, and will remove them all from the
1304      forked off process.  Copy the debug registers mirrors into the
1305      new process so that all breakpoints and watchpoints can be
1306      removed together.  */
1307
1308   parent_pid = parent->ptid.pid ();
1309   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1310   child_state = arm_linux_get_debug_reg_state (child_pid);
1311   *child_state = *parent_state;
1312 }
1313
1314 void
1315 _initialize_arm_linux_nat (void)
1316 {
1317   /* Register the target.  */
1318   linux_target = &the_arm_linux_nat_target;
1319   add_inf_child_target (&the_arm_linux_nat_target);
1320 }