gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2015 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observer.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32
  33 #include <elf/common.h>
  34 #include <sys/user.h>
  35 #include <sys/ptrace.h>
  36 #include <sys/utsname.h>
  37 #include <sys/procfs.h>
  38
  39 /* Prototypes for supply_gregset etc.  */
  40 #include "gregset.h"
  41
  42 /* Defines ps_err_e, struct ps_prochandle.  */
  43 #include "gdb_proc_service.h"
  44
  45 #ifndef PTRACE_GET_THREAD_AREA
  46 #define PTRACE_GET_THREAD_AREA 22
  47 #endif
  48
  49 #ifndef PTRACE_GETWMMXREGS
  50 #define PTRACE_GETWMMXREGS 18
  51 #define PTRACE_SETWMMXREGS 19
  52 #endif
  53
  54 #ifndef PTRACE_GETVFPREGS
  55 #define PTRACE_GETVFPREGS 27
  56 #define PTRACE_SETVFPREGS 28
  57 #endif
  58
  59 #ifndef PTRACE_GETHBPREGS
  60 #define PTRACE_GETHBPREGS 29
  61 #define PTRACE_SETHBPREGS 30
  62 #endif
  63
  64 extern int arm_apcs_32;
  65
  66 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
  67    case we may be tracing more than one process at a time.  In that
  68    case, inferior_ptid will contain the main process ID and the
  69    individual thread (process) ID.  get_thread_id () is used to get
  70    the thread id if it's available, and the process id otherwise.  */
  71
  72 static int
  73 get_thread_id (ptid_t ptid)
  74 {
  75   int tid = ptid_get_lwp (ptid);
  76   if (0 == tid)
  77     tid = ptid_get_pid (ptid);
  78   return tid;
  79 }
  80
  81 #define GET_THREAD_ID(PTID)     get_thread_id (PTID)
  82
  83 /* Get the value of a particular register from the floating point
  84    state of the process and store it into regcache.  */
  85
  86 static void
  87 fetch_fpregister (struct regcache *regcache, int regno)
  88 {
  89   int ret, tid;
  90   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
  91
  92   /* Get the thread id for the ptrace call.  */
  93   tid = GET_THREAD_ID (inferior_ptid);
  94
  95   /* Read the floating point state.  */
  96   if (have_ptrace_getregset)
  97     {
  98       struct iovec iov;
  99
 100       iov.iov_base = &fp;
 101       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 102
 103       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 104     }
 105   else
 106     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 107
 108   if (ret < 0)
 109     {
 110       warning (_("Unable to fetch floating point register."));
 111       return;
 112     }
 113
 114   /* Fetch fpsr.  */
 115   if (ARM_FPS_REGNUM == regno)
 116     regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 117                          fp + NWFPE_FPSR_OFFSET);
 118
 119   /* Fetch the floating point register.  */
 120   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 121     supply_nwfpe_register (regcache, regno, fp);
 122 }
 123
 124 /* Get the whole floating point state of the process and store it
 125    into regcache.  */
 126
 127 static void
 128 fetch_fpregs (struct regcache *regcache)
 129 {
 130   int ret, regno, tid;
 131   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 132
 133   /* Get the thread id for the ptrace call.  */
 134   tid = GET_THREAD_ID (inferior_ptid);
 135
 136   /* Read the floating point state.  */
 137   if (have_ptrace_getregset)
 138     {
 139       struct iovec iov;
 140
 141       iov.iov_base = &fp;
 142       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 143
 144       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 145     }
 146   else
 147     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 148
 149   if (ret < 0)
 150     {
 151       warning (_("Unable to fetch the floating point registers."));
 152       return;
 153     }
 154
 155   /* Fetch fpsr.  */
 156   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 157                        fp + NWFPE_FPSR_OFFSET);
 158
 159   /* Fetch the floating point registers.  */
 160   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 161     supply_nwfpe_register (regcache, regno, fp);
 162 }
 163
 164 /* Save a particular register into the floating point state of the
 165    process using the contents from regcache.  */
 166
 167 static void
 168 store_fpregister (const struct regcache *regcache, int regno)
 169 {
 170   int ret, tid;
 171   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 172
 173   /* Get the thread id for the ptrace call.  */
 174   tid = GET_THREAD_ID (inferior_ptid);
 175
 176   /* Read the floating point state.  */
 177   if (have_ptrace_getregset)
 178     {
 179       struct iovec iov;
 180
 181       iov.iov_base = &fp;
 182       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 183
 184       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 185     }
 186   else
 187     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 188
 189   if (ret < 0)
 190     {
 191       warning (_("Unable to fetch the floating point registers."));
 192       return;
 193     }
 194
 195   /* Store fpsr.  */
 196   if (ARM_FPS_REGNUM == regno
 197       && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 198     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 199
 200   /* Store the floating point register.  */
 201   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 202     collect_nwfpe_register (regcache, regno, fp);
 203
 204   if (have_ptrace_getregset)
 205     {
 206       struct iovec iov;
 207
 208       iov.iov_base = &fp;
 209       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 210
 211       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 212     }
 213   else
 214     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 215
 216   if (ret < 0)
 217     {
 218       warning (_("Unable to store floating point register."));
 219       return;
 220     }
 221 }
 222
 223 /* Save the whole floating point state of the process using
 224    the contents from regcache.  */
 225
 226 static void
 227 store_fpregs (const struct regcache *regcache)
 228 {
 229   int ret, regno, tid;
 230   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 231
 232   /* Get the thread id for the ptrace call.  */
 233   tid = GET_THREAD_ID (inferior_ptid);
 234
 235   /* Read the floating point state.  */
 236   if (have_ptrace_getregset)
 237     {
 238       elf_fpregset_t fpregs;
 239       struct iovec iov;
 240
 241       iov.iov_base = &fpregs;
 242       iov.iov_len = sizeof (fpregs);
 243
 244       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 245     }
 246   else
 247     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 248
 249   if (ret < 0)
 250     {
 251       warning (_("Unable to fetch the floating point registers."));
 252       return;
 253     }
 254
 255   /* Store fpsr.  */
 256   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 257     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 258
 259   /* Store the floating point registers.  */
 260   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 261     if (REG_VALID == regcache_register_status (regcache, regno))
 262       collect_nwfpe_register (regcache, regno, fp);
 263
 264   if (have_ptrace_getregset)
 265     {
 266       struct iovec iov;
 267
 268       iov.iov_base = &fp;
 269       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 270
 271       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 272     }
 273   else
 274     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 275
 276   if (ret < 0)
 277     {
 278       warning (_("Unable to store floating point registers."));
 279       return;
 280     }
 281 }
 282
 283 /* Fetch a general register of the process and store into
 284    regcache.  */
 285
 286 static void
 287 fetch_register (struct regcache *regcache, int regno)
 288 {
 289   int ret, tid;
 290   elf_gregset_t regs;
 291
 292   /* Get the thread id for the ptrace call.  */
 293   tid = GET_THREAD_ID (inferior_ptid);
 294
 295   if (have_ptrace_getregset)
 296     {
 297       struct iovec iov;
 298
 299       iov.iov_base = &regs;
 300       iov.iov_len = sizeof (regs);
 301
 302       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 303     }
 304   else
 305     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 306
 307   if (ret < 0)
 308     {
 309       warning (_("Unable to fetch general register."));
 310       return;
 311     }
 312
 313   if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
 314     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 315
 316   if (ARM_PS_REGNUM == regno)
 317     {
 318       if (arm_apcs_32)
 319         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 320                              (char *) &regs[ARM_CPSR_GREGNUM]);
 321       else
 322         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 323                              (char *) &regs[ARM_PC_REGNUM]);
 324     }
 325
 326   if (ARM_PC_REGNUM == regno)
 327     {
 328       regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 329                               (get_regcache_arch (regcache),
 330                                regs[ARM_PC_REGNUM]);
 331       regcache_raw_supply (regcache, ARM_PC_REGNUM,
 332                            (char *) &regs[ARM_PC_REGNUM]);
 333     }
 334 }
 335
 336 /* Fetch all general registers of the process and store into
 337    regcache.  */
 338
 339 static void
 340 fetch_regs (struct regcache *regcache)
 341 {
 342   int ret, regno, tid;
 343   elf_gregset_t regs;
 344
 345   /* Get the thread id for the ptrace call.  */
 346   tid = GET_THREAD_ID (inferior_ptid);
 347
 348   if (have_ptrace_getregset)
 349     {
 350       struct iovec iov;
 351
 352       iov.iov_base = &regs;
 353       iov.iov_len = sizeof (regs);
 354
 355       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 356     }
 357   else
 358     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 359
 360   if (ret < 0)
 361     {
 362       warning (_("Unable to fetch general registers."));
 363       return;
 364     }
 365
 366   for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
 367     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 368
 369   if (arm_apcs_32)
 370     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 371                          (char *) &regs[ARM_CPSR_GREGNUM]);
 372   else
 373     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 374                          (char *) &regs[ARM_PC_REGNUM]);
 375
 376   regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 377                           (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
 378   regcache_raw_supply (regcache, ARM_PC_REGNUM,
 379                        (char *) &regs[ARM_PC_REGNUM]);
 380 }
 381
 382 /* Store all general registers of the process from the values in
 383    regcache.  */
 384
 385 static void
 386 store_register (const struct regcache *regcache, int regno)
 387 {
 388   int ret, tid;
 389   elf_gregset_t regs;
 390
 391   if (REG_VALID != regcache_register_status (regcache, regno))
 392     return;
 393
 394   /* Get the thread id for the ptrace call.  */
 395   tid = GET_THREAD_ID (inferior_ptid);
 396
 397   /* Get the general registers from the process.  */
 398   if (have_ptrace_getregset)
 399     {
 400       struct iovec iov;
 401
 402       iov.iov_base = &regs;
 403       iov.iov_len = sizeof (regs);
 404
 405       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 406     }
 407   else
 408     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 409
 410   if (ret < 0)
 411     {
 412       warning (_("Unable to fetch general registers."));
 413       return;
 414     }
 415
 416   if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
 417     regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 418   else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
 419     regcache_raw_collect (regcache, regno,
 420                          (char *) &regs[ARM_CPSR_GREGNUM]);
 421   else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
 422     regcache_raw_collect (regcache, ARM_PC_REGNUM,
 423                          (char *) &regs[ARM_PC_REGNUM]);
 424
 425   if (have_ptrace_getregset)
 426     {
 427       struct iovec iov;
 428
 429       iov.iov_base = &regs;
 430       iov.iov_len = sizeof (regs);
 431
 432       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 433     }
 434   else
 435     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 436
 437   if (ret < 0)
 438     {
 439       warning (_("Unable to store general register."));
 440       return;
 441     }
 442 }
 443
 444 static void
 445 store_regs (const struct regcache *regcache)
 446 {
 447   int ret, regno, tid;
 448   elf_gregset_t regs;
 449
 450   /* Get the thread id for the ptrace call.  */
 451   tid = GET_THREAD_ID (inferior_ptid);
 452
 453   /* Fetch the general registers.  */
 454   if (have_ptrace_getregset)
 455     {
 456       struct iovec iov;
 457
 458       iov.iov_base = &regs;
 459       iov.iov_len = sizeof (regs);
 460
 461       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 462     }
 463   else
 464     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 465
 466   if (ret < 0)
 467     {
 468       warning (_("Unable to fetch general registers."));
 469       return;
 470     }
 471
 472   for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
 473     {
 474       if (REG_VALID == regcache_register_status (regcache, regno))
 475         regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 476     }
 477
 478   if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
 479     regcache_raw_collect (regcache, ARM_PS_REGNUM,
 480                          (char *) &regs[ARM_CPSR_GREGNUM]);
 481
 482   if (have_ptrace_getregset)
 483     {
 484       struct iovec iov;
 485
 486       iov.iov_base = &regs;
 487       iov.iov_len = sizeof (regs);
 488
 489       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 490     }
 491   else
 492     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 493
 494   if (ret < 0)
 495     {
 496       warning (_("Unable to store general registers."));
 497       return;
 498     }
 499 }
 500
 501 /* Fetch all WMMX registers of the process and store into
 502    regcache.  */
 503
 504 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 505
 506 static void
 507 fetch_wmmx_regs (struct regcache *regcache)
 508 {
 509   char regbuf[IWMMXT_REGS_SIZE];
 510   int ret, regno, tid;
 511
 512   /* Get the thread id for the ptrace call.  */
 513   tid = GET_THREAD_ID (inferior_ptid);
 514
 515   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 516   if (ret < 0)
 517     {
 518       warning (_("Unable to fetch WMMX registers."));
 519       return;
 520     }
 521
 522   for (regno = 0; regno < 16; regno++)
 523     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 524                          &regbuf[regno * 8]);
 525
 526   for (regno = 0; regno < 2; regno++)
 527     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 528                          &regbuf[16 * 8 + regno * 4]);
 529
 530   for (regno = 0; regno < 4; regno++)
 531     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 532                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 533 }
 534
 535 static void
 536 store_wmmx_regs (const struct regcache *regcache)
 537 {
 538   char regbuf[IWMMXT_REGS_SIZE];
 539   int ret, regno, tid;
 540
 541   /* Get the thread id for the ptrace call.  */
 542   tid = GET_THREAD_ID (inferior_ptid);
 543
 544   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 545   if (ret < 0)
 546     {
 547       warning (_("Unable to fetch WMMX registers."));
 548       return;
 549     }
 550
 551   for (regno = 0; regno < 16; regno++)
 552     if (REG_VALID == regcache_register_status (regcache,
 553                                                regno + ARM_WR0_REGNUM))
 554       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 555                             &regbuf[regno * 8]);
 556
 557   for (regno = 0; regno < 2; regno++)
 558     if (REG_VALID == regcache_register_status (regcache,
 559                                                regno + ARM_WCSSF_REGNUM))
 560       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 561                             &regbuf[16 * 8 + regno * 4]);
 562
 563   for (regno = 0; regno < 4; regno++)
 564     if (REG_VALID == regcache_register_status (regcache,
 565                                                regno + ARM_WCGR0_REGNUM))
 566       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 567                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 568
 569   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 570
 571   if (ret < 0)
 572     {
 573       warning (_("Unable to store WMMX registers."));
 574       return;
 575     }
 576 }
 577
 578 /* Fetch and store VFP Registers.  The kernel object has space for 32
 579    64-bit registers, and the FPSCR.  This is even when on a VFPv2 or
 580    VFPv3D16 target.  */
 581 #define VFP_REGS_SIZE (32 * 8 + 4)
 582
 583 static void
 584 fetch_vfp_regs (struct regcache *regcache)
 585 {
 586   char regbuf[VFP_REGS_SIZE];
 587   int ret, regno, tid;
 588   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 589   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 590
 591   /* Get the thread id for the ptrace call.  */
 592   tid = GET_THREAD_ID (inferior_ptid);
 593
 594   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 595   if (ret < 0)
 596     {
 597       warning (_("Unable to fetch VFP registers."));
 598       return;
 599     }
 600
 601   for (regno = 0; regno < tdep->vfp_register_count; regno++)
 602     regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
 603                          (char *) regbuf + regno * 8);
 604
 605   regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
 606                        (char *) regbuf + 32 * 8);
 607 }
 608
 609 static void
 610 store_vfp_regs (const struct regcache *regcache)
 611 {
 612   char regbuf[VFP_REGS_SIZE];
 613   int ret, regno, tid;
 614   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 615   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 616
 617   /* Get the thread id for the ptrace call.  */
 618   tid = GET_THREAD_ID (inferior_ptid);
 619
 620   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 621   if (ret < 0)
 622     {
 623       warning (_("Unable to fetch VFP registers (for update)."));
 624       return;
 625     }
 626
 627   for (regno = 0; regno < tdep->vfp_register_count; regno++)
 628     regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
 629                           (char *) regbuf + regno * 8);
 630
 631   regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
 632                         (char *) regbuf + 32 * 8);
 633
 634   ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 635
 636   if (ret < 0)
 637     {
 638       warning (_("Unable to store VFP registers."));
 639       return;
 640     }
 641 }
 642
 643 /* Fetch registers from the child process.  Fetch all registers if
 644    regno == -1, otherwise fetch all general registers or all floating
 645    point registers depending upon the value of regno.  */
 646
 647 static void
 648 arm_linux_fetch_inferior_registers (struct target_ops *ops,
 649                                     struct regcache *regcache, int regno)
 650 {
 651   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 652   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 653
 654   if (-1 == regno)
 655     {
 656       fetch_regs (regcache);
 657       fetch_fpregs (regcache);
 658       if (tdep->have_wmmx_registers)
 659         fetch_wmmx_regs (regcache);
 660       if (tdep->vfp_register_count > 0)
 661         fetch_vfp_regs (regcache);
 662     }
 663   else
 664     {
 665       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 666         fetch_register (regcache, regno);
 667       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 668         fetch_fpregister (regcache, regno);
 669       else if (tdep->have_wmmx_registers
 670                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 671         fetch_wmmx_regs (regcache);
 672       else if (tdep->vfp_register_count > 0
 673                && regno >= ARM_D0_REGNUM
 674                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 675         fetch_vfp_regs (regcache);
 676     }
 677 }
 678
 679 /* Store registers back into the inferior.  Store all registers if
 680    regno == -1, otherwise store all general registers or all floating
 681    point registers depending upon the value of regno.  */
 682
 683 static void
 684 arm_linux_store_inferior_registers (struct target_ops *ops,
 685                                     struct regcache *regcache, int regno)
 686 {
 687   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 688   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 689
 690   if (-1 == regno)
 691     {
 692       store_regs (regcache);
 693       store_fpregs (regcache);
 694       if (tdep->have_wmmx_registers)
 695         store_wmmx_regs (regcache);
 696       if (tdep->vfp_register_count > 0)
 697         store_vfp_regs (regcache);
 698     }
 699   else
 700     {
 701       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 702         store_register (regcache, regno);
 703       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 704         store_fpregister (regcache, regno);
 705       else if (tdep->have_wmmx_registers
 706                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 707         store_wmmx_regs (regcache);
 708       else if (tdep->vfp_register_count > 0
 709                && regno >= ARM_D0_REGNUM
 710                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 711         store_vfp_regs (regcache);
 712     }
 713 }
 714
 715 /* Wrapper functions for the standard regset handling, used by
 716    thread debugging.  */
 717
 718 void
 719 fill_gregset (const struct regcache *regcache,
 720               gdb_gregset_t *gregsetp, int regno)
 721 {
 722   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 723 }
 724
 725 void
 726 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 727 {
 728   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 729 }
 730
 731 void
 732 fill_fpregset (const struct regcache *regcache,
 733                gdb_fpregset_t *fpregsetp, int regno)
 734 {
 735   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 736 }
 737
 738 /* Fill GDB's register array with the floating-point register values
 739    in *fpregsetp.  */
 740
 741 void
 742 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 743 {
 744   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 745 }
 746
 747 /* Fetch the thread-local storage pointer for libthread_db.  */
 748
 749 ps_err_e
 750 ps_get_thread_area (const struct ps_prochandle *ph,
 751                     lwpid_t lwpid, int idx, void **base)
 752 {
 753   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 754     return PS_ERR;
 755
 756   /* IDX is the bias from the thread pointer to the beginning of the
 757      thread descriptor.  It has to be subtracted due to implementation
 758      quirks in libthread_db.  */
 759   *base = (void *) ((char *)*base - idx);
 760
 761   return PS_OK;
 762 }
 763
 764 static const struct target_desc *
 765 arm_linux_read_description (struct target_ops *ops)
 766 {
 767   CORE_ADDR arm_hwcap = 0;
 768
 769   if (have_ptrace_getregset == -1)
 770     {
 771       elf_gregset_t gpregs;
 772       struct iovec iov;
 773       int tid = GET_THREAD_ID (inferior_ptid);
 774
 775       iov.iov_base = &gpregs;
 776       iov.iov_len = sizeof (gpregs);
 777
 778       /* Check if PTRACE_GETREGSET works.  */
 779       if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
 780         have_ptrace_getregset = 0;
 781       else
 782         have_ptrace_getregset = 1;
 783     }
 784
 785   if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
 786     {
 787       return ops->beneath->to_read_description (ops->beneath);
 788     }
 789
 790   if (arm_hwcap & HWCAP_IWMMXT)
 791     return tdesc_arm_with_iwmmxt;
 792
 793   if (arm_hwcap & HWCAP_VFP)
 794     {
 795       int pid;
 796       char *buf;
 797       const struct target_desc * result = NULL;
 798
 799       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 800          Neon with VFPv3-D32.  */
 801       if (arm_hwcap & HWCAP_NEON)
 802         result = tdesc_arm_with_neon;
 803       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 804         result = tdesc_arm_with_vfpv3;
 805       else
 806         result = tdesc_arm_with_vfpv2;
 807
 808       /* Now make sure that the kernel supports reading these
 809          registers.  Support was added in 2.6.30.  */
 810       pid = ptid_get_lwp (inferior_ptid);
 811       errno = 0;
 812       buf = alloca (VFP_REGS_SIZE);
 813       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 814           && errno == EIO)
 815         result = NULL;
 816
 817       return result;
 818     }
 819
 820   return ops->beneath->to_read_description (ops->beneath);
 821 }
 822
 823 /* Information describing the hardware breakpoint capabilities.  */
 824 struct arm_linux_hwbp_cap
 825 {
 826   gdb_byte arch;
 827   gdb_byte max_wp_length;
 828   gdb_byte wp_count;
 829   gdb_byte bp_count;
 830 };
 831
 832 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 833    assume a maximum number of supported break-/watchpoints.  */
 834 #define MAX_BPTS 16
 835 #define MAX_WPTS 16
 836
 837 /* Get hold of the Hardware Breakpoint information for the target we are
 838    attached to.  Returns NULL if the kernel doesn't support Hardware
 839    breakpoints at all, or a pointer to the information structure.  */
 840 static const struct arm_linux_hwbp_cap *
 841 arm_linux_get_hwbp_cap (void)
 842 {
 843   /* The info structure we return.  */
 844   static struct arm_linux_hwbp_cap info;
 845
 846   /* Is INFO in a good state?  -1 means that no attempt has been made to
 847      initialize INFO; 0 means an attempt has been made, but it failed; 1
 848      means INFO is in an initialized state.  */
 849   static int available = -1;
 850
 851   if (available == -1)
 852     {
 853       int tid;
 854       unsigned int val;
 855
 856       tid = GET_THREAD_ID (inferior_ptid);
 857       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 858         available = 0;
 859       else
 860         {
 861           info.arch = (gdb_byte)((val >> 24) & 0xff);
 862           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 863           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 864           info.bp_count = (gdb_byte)(val & 0xff);
 865
 866       if (info.wp_count > MAX_WPTS)
 867         {
 868           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 869                       supports %d"), MAX_WPTS, info.wp_count);
 870           info.wp_count = MAX_WPTS;
 871         }
 872
 873       if (info.bp_count > MAX_BPTS)
 874         {
 875           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 876                       supports %d"), MAX_BPTS, info.bp_count);
 877           info.bp_count = MAX_BPTS;
 878         }
 879           available = (info.arch != 0);
 880         }
 881     }
 882
 883   return available == 1 ? &info : NULL;
 884 }
 885
 886 /* How many hardware breakpoints are available?  */
 887 static int
 888 arm_linux_get_hw_breakpoint_count (void)
 889 {
 890   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 891   return cap != NULL ? cap->bp_count : 0;
 892 }
 893
 894 /* How many hardware watchpoints are available?  */
 895 static int
 896 arm_linux_get_hw_watchpoint_count (void)
 897 {
 898   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 899   return cap != NULL ? cap->wp_count : 0;
 900 }
 901
 902 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 903    there is not an appropriate resource available, otherwise returns 1.  */
 904 static int
 905 arm_linux_can_use_hw_breakpoint (struct target_ops *self,
 906                                  int type, int cnt, int ot)
 907 {
 908   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 909       || type == bp_access_watchpoint || type == bp_watchpoint)
 910     {
 911       int count = arm_linux_get_hw_watchpoint_count ();
 912
 913       if (count == 0)
 914         return 0;
 915       else if (cnt + ot > count)
 916         return -1;
 917     }
 918   else if (type == bp_hardware_breakpoint)
 919     {
 920       int count = arm_linux_get_hw_breakpoint_count ();
 921
 922       if (count == 0)
 923         return 0;
 924       else if (cnt > count)
 925         return -1;
 926     }
 927   else
 928     gdb_assert (FALSE);
 929
 930   return 1;
 931 }
 932
 933 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 934 typedef enum
 935 {
 936   arm_hwbp_break = 0,
 937   arm_hwbp_load = 1,
 938   arm_hwbp_store = 2,
 939   arm_hwbp_access = 3
 940 } arm_hwbp_type;
 941
 942 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 943 typedef unsigned int arm_hwbp_control_t;
 944
 945 /* Structure used to keep track of hardware break-/watch-points.  */
 946 struct arm_linux_hw_breakpoint
 947 {
 948   /* Address to break on, or being watched.  */
 949   unsigned int address;
 950   /* Control register for break-/watch- point.  */
 951   arm_hwbp_control_t control;
 952 };
 953
 954 /* Structure containing arrays of per process hardware break-/watchpoints
 955    for caching address and control information.
 956
 957    The Linux ptrace interface to hardware break-/watch-points presents the
 958    values in a vector centred around 0 (which is used fo generic information).
 959    Positive indicies refer to breakpoint addresses/control registers, negative
 960    indices to watchpoint addresses/control registers.
 961
 962    The Linux vector is indexed as follows:
 963       -((i << 1) + 2): Control register for watchpoint i.
 964       -((i << 1) + 1): Address register for watchpoint i.
 965                     0: Information register.
 966        ((i << 1) + 1): Address register for breakpoint i.
 967        ((i << 1) + 2): Control register for breakpoint i.
 968
 969    This structure is used as a per-thread cache of the state stored by the
 970    kernel, so that we don't need to keep calling into the kernel to find a
 971    free breakpoint.
 972
 973    We treat break-/watch-points with their enable bit clear as being deleted.
 974    */
 975 struct arm_linux_debug_reg_state
 976 {
 977   /* Hardware breakpoints for this process.  */
 978   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 979   /* Hardware watchpoints for this process.  */
 980   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 981 };
 982
 983 /* Per-process arch-specific data we want to keep.  */
 984 struct arm_linux_process_info
 985 {
 986   /* Linked list.  */
 987   struct arm_linux_process_info *next;
 988   /* The process identifier.  */
 989   pid_t pid;
 990   /* Hardware break-/watchpoints state information.  */
 991   struct arm_linux_debug_reg_state state;
 992
 993 };
 994
 995 /* Per-thread arch-specific data we want to keep.  */
 996 struct arch_lwp_info
 997 {
 998   /* Non-zero if our copy differs from what's recorded in the thread.  */
 999   char bpts_changed[MAX_BPTS];
1000   char wpts_changed[MAX_WPTS];
1001 };
1002
1003 static struct arm_linux_process_info *arm_linux_process_list = NULL;
1004
1005 /* Find process data for process PID.  */
1006
1007 static struct arm_linux_process_info *
1008 arm_linux_find_process_pid (pid_t pid)
1009 {
1010   struct arm_linux_process_info *proc;
1011
1012   for (proc = arm_linux_process_list; proc; proc = proc->next)
1013     if (proc->pid == pid)
1014       return proc;
1015
1016   return NULL;
1017 }
1018
1019 /* Add process data for process PID.  Returns newly allocated info
1020    object.  */
1021
1022 static struct arm_linux_process_info *
1023 arm_linux_add_process (pid_t pid)
1024 {
1025   struct arm_linux_process_info *proc;
1026
1027   proc = xcalloc (1, sizeof (*proc));
1028   proc->pid = pid;
1029
1030   proc->next = arm_linux_process_list;
1031   arm_linux_process_list = proc;
1032
1033   return proc;
1034 }
1035
1036 /* Get data specific info for process PID, creating it if necessary.
1037    Never returns NULL.  */
1038
1039 static struct arm_linux_process_info *
1040 arm_linux_process_info_get (pid_t pid)
1041 {
1042   struct arm_linux_process_info *proc;
1043
1044   proc = arm_linux_find_process_pid (pid);
1045   if (proc == NULL)
1046     proc = arm_linux_add_process (pid);
1047
1048   return proc;
1049 }
1050
1051 /* Called whenever GDB is no longer debugging process PID.  It deletes
1052    data structures that keep track of debug register state.  */
1053
1054 static void
1055 arm_linux_forget_process (pid_t pid)
1056 {
1057   struct arm_linux_process_info *proc, **proc_link;
1058
1059   proc = arm_linux_process_list;
1060   proc_link = &arm_linux_process_list;
1061
1062   while (proc != NULL)
1063     {
1064       if (proc->pid == pid)
1065     {
1066       *proc_link = proc->next;
1067
1068       xfree (proc);
1069       return;
1070     }
1071
1072       proc_link = &proc->next;
1073       proc = *proc_link;
1074     }
1075 }
1076
1077 /* Get hardware break-/watchpoint state for process PID.  */
1078
1079 static struct arm_linux_debug_reg_state *
1080 arm_linux_get_debug_reg_state (pid_t pid)
1081 {
1082   return &arm_linux_process_info_get (pid)->state;
1083 }
1084
1085 /* Initialize an ARM hardware break-/watch-point control register value.
1086    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
1087    type of break-/watch-point; ENABLE indicates whether the point is enabled.
1088    */
1089 static arm_hwbp_control_t
1090 arm_hwbp_control_initialize (unsigned byte_address_select,
1091                              arm_hwbp_type hwbp_type,
1092                              int enable)
1093 {
1094   gdb_assert ((byte_address_select & ~0xffU) == 0);
1095   gdb_assert (hwbp_type != arm_hwbp_break
1096               || ((byte_address_select & 0xfU) != 0));
1097
1098   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
1099 }
1100
1101 /* Does the breakpoint control value CONTROL have the enable bit set?  */
1102 static int
1103 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
1104 {
1105   return control & 0x1;
1106 }
1107
1108 /* Change a breakpoint control word so that it is in the disabled state.  */
1109 static arm_hwbp_control_t
1110 arm_hwbp_control_disable (arm_hwbp_control_t control)
1111 {
1112   return control & ~0x1;
1113 }
1114
1115 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
1116    enabled, and will point to the placed address of BP_TGT.  */
1117 static void
1118 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
1119                                     struct bp_target_info *bp_tgt,
1120                                     struct arm_linux_hw_breakpoint *p)
1121 {
1122   unsigned mask;
1123   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
1124
1125   /* We have to create a mask for the control register which says which bits
1126      of the word pointed to by address to break on.  */
1127   if (arm_pc_is_thumb (gdbarch, address))
1128     {
1129       mask = 0x3;
1130       address &= ~1;
1131     }
1132   else
1133     {
1134       mask = 0xf;
1135       address &= ~3;
1136     }
1137
1138   p->address = (unsigned int) address;
1139   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
1140 }
1141
1142 /* Get the ARM hardware breakpoint type from the RW value we're given when
1143    asked to set a watchpoint.  */
1144 static arm_hwbp_type
1145 arm_linux_get_hwbp_type (int rw)
1146 {
1147   if (rw == hw_read)
1148     return arm_hwbp_load;
1149   else if (rw == hw_write)
1150     return arm_hwbp_store;
1151   else
1152     return arm_hwbp_access;
1153 }
1154
1155 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
1156    to LEN.  The type of watchpoint is given in RW.  */
1157 static void
1158 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
1159                                     struct arm_linux_hw_breakpoint *p)
1160 {
1161   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1162   unsigned mask;
1163
1164   gdb_assert (cap != NULL);
1165   gdb_assert (cap->max_wp_length != 0);
1166
1167   mask = (1 << len) - 1;
1168
1169   p->address = (unsigned int) addr;
1170   p->control = arm_hwbp_control_initialize (mask,
1171                                             arm_linux_get_hwbp_type (rw), 1);
1172 }
1173
1174 /* Are two break-/watch-points equal?  */
1175 static int
1176 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
1177                                const struct arm_linux_hw_breakpoint *p2)
1178 {
1179   return p1->address == p2->address && p1->control == p2->control;
1180 }
1181
1182 /* Callback to mark a watch-/breakpoint to be updated in all threads of
1183    the current process.  */
1184
1185 struct update_registers_data
1186 {
1187   int watch;
1188   int index;
1189 };
1190
1191 static int
1192 update_registers_callback (struct lwp_info *lwp, void *arg)
1193 {
1194   struct update_registers_data *data = (struct update_registers_data *) arg;
1195
1196   if (lwp->arch_private == NULL)
1197     lwp->arch_private = XCNEW (struct arch_lwp_info);
1198
1199   /* The actual update is done later just before resuming the lwp,
1200      we just mark that the registers need updating.  */
1201   if (data->watch)
1202     lwp->arch_private->wpts_changed[data->index] = 1;
1203   else
1204     lwp->arch_private->bpts_changed[data->index] = 1;
1205
1206   /* If the lwp isn't stopped, force it to momentarily pause, so
1207      we can update its breakpoint registers.  */
1208   if (!lwp->stopped)
1209     linux_stop_lwp (lwp);
1210
1211   return 0;
1212 }
1213
1214 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
1215    =1) BPT for thread TID.  */
1216 static void
1217 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
1218                                  int watchpoint)
1219 {
1220   int pid;
1221   ptid_t pid_ptid;
1222   gdb_byte count, i;
1223   struct arm_linux_hw_breakpoint* bpts;
1224   struct update_registers_data data;
1225
1226   pid = ptid_get_pid (inferior_ptid);
1227   pid_ptid = pid_to_ptid (pid);
1228
1229   if (watchpoint)
1230     {
1231       count = arm_linux_get_hw_watchpoint_count ();
1232       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1233     }
1234   else
1235     {
1236       count = arm_linux_get_hw_breakpoint_count ();
1237       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1238     }
1239
1240   for (i = 0; i < count; ++i)
1241     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1242       {
1243         data.watch = watchpoint;
1244         data.index = i;
1245         bpts[i] = *bpt;
1246         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1247         break;
1248       }
1249
1250   gdb_assert (i != count);
1251 }
1252
1253 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1254    (WATCHPOINT = 1) BPT for thread TID.  */
1255 static void
1256 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1257                                  int watchpoint)
1258 {
1259   int pid;
1260   gdb_byte count, i;
1261   ptid_t pid_ptid;
1262   struct arm_linux_hw_breakpoint* bpts;
1263   struct update_registers_data data;
1264
1265   pid = ptid_get_pid (inferior_ptid);
1266   pid_ptid = pid_to_ptid (pid);
1267
1268   if (watchpoint)
1269     {
1270       count = arm_linux_get_hw_watchpoint_count ();
1271       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1272     }
1273   else
1274     {
1275       count = arm_linux_get_hw_breakpoint_count ();
1276       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1277     }
1278
1279   for (i = 0; i < count; ++i)
1280     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1281       {
1282         data.watch = watchpoint;
1283         data.index = i;
1284         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1285         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1286         break;
1287       }
1288
1289   gdb_assert (i != count);
1290 }
1291
1292 /* Insert a Hardware breakpoint.  */
1293 static int
1294 arm_linux_insert_hw_breakpoint (struct target_ops *self,
1295                                 struct gdbarch *gdbarch,
1296                                 struct bp_target_info *bp_tgt)
1297 {
1298   struct lwp_info *lp;
1299   struct arm_linux_hw_breakpoint p;
1300
1301   if (arm_linux_get_hw_breakpoint_count () == 0)
1302     return -1;
1303
1304   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1305
1306   arm_linux_insert_hw_breakpoint1 (&p, 0);
1307
1308   return 0;
1309 }
1310
1311 /* Remove a hardware breakpoint.  */
1312 static int
1313 arm_linux_remove_hw_breakpoint (struct target_ops *self,
1314                                 struct gdbarch *gdbarch,
1315                                 struct bp_target_info *bp_tgt)
1316 {
1317   struct lwp_info *lp;
1318   struct arm_linux_hw_breakpoint p;
1319
1320   if (arm_linux_get_hw_breakpoint_count () == 0)
1321     return -1;
1322
1323   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1324
1325   arm_linux_remove_hw_breakpoint1 (&p, 0);
1326
1327   return 0;
1328 }
1329
1330 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1331    ADDR?  */
1332 static int
1333 arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
1334                                        CORE_ADDR addr, int len)
1335 {
1336   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1337   CORE_ADDR max_wp_length, aligned_addr;
1338
1339   /* Can not set watchpoints for zero or negative lengths.  */
1340   if (len <= 0)
1341     return 0;
1342
1343   /* Need to be able to use the ptrace interface.  */
1344   if (cap == NULL || cap->wp_count == 0)
1345     return 0;
1346
1347   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1348      range covered by a watchpoint.  */
1349   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1350   aligned_addr = addr & ~(max_wp_length - 1);
1351
1352   if (aligned_addr + max_wp_length < addr + len)
1353     return 0;
1354
1355   /* The current ptrace interface can only handle watchpoints that are a
1356      power of 2.  */
1357   if ((len & (len - 1)) != 0)
1358     return 0;
1359
1360   /* All tests passed so we must be able to set a watchpoint.  */
1361   return 1;
1362 }
1363
1364 /* Insert a Hardware breakpoint.  */
1365 static int
1366 arm_linux_insert_watchpoint (struct target_ops *self,
1367                              CORE_ADDR addr, int len, int rw,
1368                              struct expression *cond)
1369 {
1370   struct lwp_info *lp;
1371   struct arm_linux_hw_breakpoint p;
1372
1373   if (arm_linux_get_hw_watchpoint_count () == 0)
1374     return -1;
1375
1376   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1377
1378   arm_linux_insert_hw_breakpoint1 (&p, 1);
1379
1380   return 0;
1381 }
1382
1383 /* Remove a hardware breakpoint.  */
1384 static int
1385 arm_linux_remove_watchpoint (struct target_ops *self,
1386                              CORE_ADDR addr, int len, int rw,
1387                              struct expression *cond)
1388 {
1389   struct lwp_info *lp;
1390   struct arm_linux_hw_breakpoint p;
1391
1392   if (arm_linux_get_hw_watchpoint_count () == 0)
1393     return -1;
1394
1395   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1396
1397   arm_linux_remove_hw_breakpoint1 (&p, 1);
1398
1399   return 0;
1400 }
1401
1402 /* What was the data address the target was stopped on accessing.  */
1403 static int
1404 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1405 {
1406   siginfo_t siginfo;
1407   int slot;
1408
1409   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1410     return 0;
1411
1412   /* This must be a hardware breakpoint.  */
1413   if (siginfo.si_signo != SIGTRAP
1414       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1415     return 0;
1416
1417   /* We must be able to set hardware watchpoints.  */
1418   if (arm_linux_get_hw_watchpoint_count () == 0)
1419     return 0;
1420
1421   slot = siginfo.si_errno;
1422
1423   /* If we are in a positive slot then we're looking at a breakpoint and not
1424      a watchpoint.  */
1425   if (slot >= 0)
1426     return 0;
1427
1428   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1429   return 1;
1430 }
1431
1432 /* Has the target been stopped by hitting a watchpoint?  */
1433 static int
1434 arm_linux_stopped_by_watchpoint (struct target_ops *ops)
1435 {
1436   CORE_ADDR addr;
1437   return arm_linux_stopped_data_address (ops, &addr);
1438 }
1439
1440 static int
1441 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1442                                         CORE_ADDR addr,
1443                                         CORE_ADDR start, int length)
1444 {
1445   return start <= addr && start + length - 1 >= addr;
1446 }
1447
1448 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1449    in the parent thread to the child thread.  */
1450 static void
1451 arm_linux_new_thread (struct lwp_info *lp)
1452 {
1453   int i;
1454   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1455
1456   /* Mark that all the hardware breakpoint/watchpoint register pairs
1457      for this thread need to be initialized.  */
1458
1459   for (i = 0; i < MAX_BPTS; i++)
1460     {
1461       info->bpts_changed[i] = 1;
1462       info->wpts_changed[i] = 1;
1463     }
1464
1465   lp->arch_private = info;
1466 }
1467
1468 /* Called when resuming a thread.
1469    The hardware debug registers are updated when there is any change.  */
1470
1471 static void
1472 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1473 {
1474   int pid, i;
1475   struct arm_linux_hw_breakpoint *bpts, *wpts;
1476   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1477
1478   pid = ptid_get_lwp (lwp->ptid);
1479   bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1480   wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1481
1482   /* NULL means this is the main thread still going through the shell,
1483      or, no watchpoint has been set yet.  In that case, there's
1484      nothing to do.  */
1485   if (arm_lwp_info == NULL)
1486     return;
1487
1488   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1489     if (arm_lwp_info->bpts_changed[i])
1490       {
1491         errno = 0;
1492         if (arm_hwbp_control_is_enabled (bpts[i].control))
1493           if (ptrace (PTRACE_SETHBPREGS, pid,
1494               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1495             perror_with_name (_("Unexpected error setting breakpoint"));
1496
1497         if (bpts[i].control != 0)
1498           if (ptrace (PTRACE_SETHBPREGS, pid,
1499               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1500             perror_with_name (_("Unexpected error setting breakpoint"));
1501
1502         arm_lwp_info->bpts_changed[i] = 0;
1503       }
1504
1505   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1506     if (arm_lwp_info->wpts_changed[i])
1507       {
1508         errno = 0;
1509         if (arm_hwbp_control_is_enabled (wpts[i].control))
1510           if (ptrace (PTRACE_SETHBPREGS, pid,
1511               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1512             perror_with_name (_("Unexpected error setting watchpoint"));
1513
1514         if (wpts[i].control != 0)
1515           if (ptrace (PTRACE_SETHBPREGS, pid,
1516               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1517             perror_with_name (_("Unexpected error setting watchpoint"));
1518
1519         arm_lwp_info->wpts_changed[i] = 0;
1520       }
1521 }
1522
1523 /* linux_nat_new_fork hook.  */
1524
1525 static void
1526 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1527 {
1528   pid_t parent_pid;
1529   struct arm_linux_debug_reg_state *parent_state;
1530   struct arm_linux_debug_reg_state *child_state;
1531
1532   /* NULL means no watchpoint has ever been set in the parent.  In
1533      that case, there's nothing to do.  */
1534   if (parent->arch_private == NULL)
1535     return;
1536
1537   /* GDB core assumes the child inherits the watchpoints/hw
1538      breakpoints of the parent, and will remove them all from the
1539      forked off process.  Copy the debug registers mirrors into the
1540      new process so that all breakpoints and watchpoints can be
1541      removed together.  */
1542
1543   parent_pid = ptid_get_pid (parent->ptid);
1544   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1545   child_state = arm_linux_get_debug_reg_state (child_pid);
1546   *child_state = *parent_state;
1547 }
1548
1549 void _initialize_arm_linux_nat (void);
1550
1551 void
1552 _initialize_arm_linux_nat (void)
1553 {
1554   struct target_ops *t;
1555
1556   /* Fill in the generic GNU/Linux methods.  */
1557   t = linux_target ();
1558
1559   /* Add our register access methods.  */
1560   t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1561   t->to_store_registers = arm_linux_store_inferior_registers;
1562
1563   /* Add our hardware breakpoint and watchpoint implementation.  */
1564   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1565   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1566   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1567   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1568   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1569   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1570   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1571   t->to_stopped_data_address = arm_linux_stopped_data_address;
1572   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1573
1574   t->to_read_description = arm_linux_read_description;
1575
1576   /* Register the target.  */
1577   linux_nat_add_target (t);
1578
1579   /* Handle thread creation and exit.  */
1580   linux_nat_set_new_thread (t, arm_linux_new_thread);
1581   linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1582
1583   /* Handle process creation and exit.  */
1584   linux_nat_set_new_fork (t, arm_linux_new_fork);
1585   linux_nat_set_forget_process (t, arm_linux_forget_process);
1586 }