beb4ecf6068ff9bc1deb7c0cbfe9a1815e8e7525
[deliverable/binutils-gdb.git] / gdb / arm-linux-tdep.c
1 /* GNU/Linux on ARM target support.
2
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "target.h"
23 #include "value.h"
24 #include "gdbtypes.h"
25 #include "floatformat.h"
26 #include "gdbcore.h"
27 #include "frame.h"
28 #include "regcache.h"
29 #include "doublest.h"
30 #include "solib-svr4.h"
31 #include "osabi.h"
32 #include "regset.h"
33 #include "trad-frame.h"
34 #include "tramp-frame.h"
35 #include "breakpoint.h"
36
37 #include "arm-tdep.h"
38 #include "arm-linux-tdep.h"
39 #include "linux-tdep.h"
40 #include "glibc-tdep.h"
41 #include "arch-utils.h"
42 #include "inferior.h"
43 #include "gdbthread.h"
44 #include "symfile.h"
45
46 #include "gdb_string.h"
47
48 extern int arm_apcs_32;
49
50 /* Under ARM GNU/Linux the traditional way of performing a breakpoint
51 is to execute a particular software interrupt, rather than use a
52 particular undefined instruction to provoke a trap. Upon exection
53 of the software interrupt the kernel stops the inferior with a
54 SIGTRAP, and wakes the debugger. */
55
56 static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
57
58 static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
59
60 /* However, the EABI syscall interface (new in Nov. 2005) does not look at
61 the operand of the swi if old-ABI compatibility is disabled. Therefore,
62 use an undefined instruction instead. This is supported as of kernel
63 version 2.5.70 (May 2003), so should be a safe assumption for EABI
64 binaries. */
65
66 static const char eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 };
67
68 static const char eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 };
69
70 /* All the kernels which support Thumb support using a specific undefined
71 instruction for the Thumb breakpoint. */
72
73 static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01};
74
75 static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde};
76
77 /* Description of the longjmp buffer. */
78 #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
79 #define ARM_LINUX_JB_PC 21
80
81 /*
82 Dynamic Linking on ARM GNU/Linux
83 --------------------------------
84
85 Note: PLT = procedure linkage table
86 GOT = global offset table
87
88 As much as possible, ELF dynamic linking defers the resolution of
89 jump/call addresses until the last minute. The technique used is
90 inspired by the i386 ELF design, and is based on the following
91 constraints.
92
93 1) The calling technique should not force a change in the assembly
94 code produced for apps; it MAY cause changes in the way assembly
95 code is produced for position independent code (i.e. shared
96 libraries).
97
98 2) The technique must be such that all executable areas must not be
99 modified; and any modified areas must not be executed.
100
101 To do this, there are three steps involved in a typical jump:
102
103 1) in the code
104 2) through the PLT
105 3) using a pointer from the GOT
106
107 When the executable or library is first loaded, each GOT entry is
108 initialized to point to the code which implements dynamic name
109 resolution and code finding. This is normally a function in the
110 program interpreter (on ARM GNU/Linux this is usually
111 ld-linux.so.2, but it does not have to be). On the first
112 invocation, the function is located and the GOT entry is replaced
113 with the real function address. Subsequent calls go through steps
114 1, 2 and 3 and end up calling the real code.
115
116 1) In the code:
117
118 b function_call
119 bl function_call
120
121 This is typical ARM code using the 26 bit relative branch or branch
122 and link instructions. The target of the instruction
123 (function_call is usually the address of the function to be called.
124 In position independent code, the target of the instruction is
125 actually an entry in the PLT when calling functions in a shared
126 library. Note that this call is identical to a normal function
127 call, only the target differs.
128
129 2) In the PLT:
130
131 The PLT is a synthetic area, created by the linker. It exists in
132 both executables and libraries. It is an array of stubs, one per
133 imported function call. It looks like this:
134
135 PLT[0]:
136 str lr, [sp, #-4]! @push the return address (lr)
137 ldr lr, [pc, #16] @load from 6 words ahead
138 add lr, pc, lr @form an address for GOT[0]
139 ldr pc, [lr, #8]! @jump to the contents of that addr
140
141 The return address (lr) is pushed on the stack and used for
142 calculations. The load on the second line loads the lr with
143 &GOT[3] - . - 20. The addition on the third leaves:
144
145 lr = (&GOT[3] - . - 20) + (. + 8)
146 lr = (&GOT[3] - 12)
147 lr = &GOT[0]
148
149 On the fourth line, the pc and lr are both updated, so that:
150
151 pc = GOT[2]
152 lr = &GOT[0] + 8
153 = &GOT[2]
154
155 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
156 "tight", but allows us to keep all the PLT entries the same size.
157
158 PLT[n+1]:
159 ldr ip, [pc, #4] @load offset from gotoff
160 add ip, pc, ip @add the offset to the pc
161 ldr pc, [ip] @jump to that address
162 gotoff: .word GOT[n+3] - .
163
164 The load on the first line, gets an offset from the fourth word of
165 the PLT entry. The add on the second line makes ip = &GOT[n+3],
166 which contains either a pointer to PLT[0] (the fixup trampoline) or
167 a pointer to the actual code.
168
169 3) In the GOT:
170
171 The GOT contains helper pointers for both code (PLT) fixups and
172 data fixups. The first 3 entries of the GOT are special. The next
173 M entries (where M is the number of entries in the PLT) belong to
174 the PLT fixups. The next D (all remaining) entries belong to
175 various data fixups. The actual size of the GOT is 3 + M + D.
176
177 The GOT is also a synthetic area, created by the linker. It exists
178 in both executables and libraries. When the GOT is first
179 initialized , all the GOT entries relating to PLT fixups are
180 pointing to code back at PLT[0].
181
182 The special entries in the GOT are:
183
184 GOT[0] = linked list pointer used by the dynamic loader
185 GOT[1] = pointer to the reloc table for this module
186 GOT[2] = pointer to the fixup/resolver code
187
188 The first invocation of function call comes through and uses the
189 fixup/resolver code. On the entry to the fixup/resolver code:
190
191 ip = &GOT[n+3]
192 lr = &GOT[2]
193 stack[0] = return address (lr) of the function call
194 [r0, r1, r2, r3] are still the arguments to the function call
195
196 This is enough information for the fixup/resolver code to work
197 with. Before the fixup/resolver code returns, it actually calls
198 the requested function and repairs &GOT[n+3]. */
199
200 /* The constants below were determined by examining the following files
201 in the linux kernel sources:
202
203 arch/arm/kernel/signal.c
204 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
205 include/asm-arm/unistd.h
206 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
207
208 #define ARM_LINUX_SIGRETURN_INSTR 0xef900077
209 #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
210
211 /* For ARM EABI, the syscall number is not in the SWI instruction
212 (instead it is loaded into r7). We recognize the pattern that
213 glibc uses... alternatively, we could arrange to do this by
214 function name, but they are not always exported. */
215 #define ARM_SET_R7_SIGRETURN 0xe3a07077
216 #define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad
217 #define ARM_EABI_SYSCALL 0xef000000
218
219 static void
220 arm_linux_sigtramp_cache (struct frame_info *this_frame,
221 struct trad_frame_cache *this_cache,
222 CORE_ADDR func, int regs_offset)
223 {
224 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
225 CORE_ADDR base = sp + regs_offset;
226 int i;
227
228 for (i = 0; i < 16; i++)
229 trad_frame_set_reg_addr (this_cache, i, base + i * 4);
230
231 trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4);
232
233 /* The VFP or iWMMXt registers may be saved on the stack, but there's
234 no reliable way to restore them (yet). */
235
236 /* Save a frame ID. */
237 trad_frame_set_id (this_cache, frame_id_build (sp, func));
238 }
239
240 /* There are a couple of different possible stack layouts that
241 we need to support.
242
243 Before version 2.6.18, the kernel used completely independent
244 layouts for non-RT and RT signals. For non-RT signals the stack
245 began directly with a struct sigcontext. For RT signals the stack
246 began with two redundant pointers (to the siginfo and ucontext),
247 and then the siginfo and ucontext.
248
249 As of version 2.6.18, the non-RT signal frame layout starts with
250 a ucontext and the RT signal frame starts with a siginfo and then
251 a ucontext. Also, the ucontext now has a designated save area
252 for coprocessor registers.
253
254 For RT signals, it's easy to tell the difference: we look for
255 pinfo, the pointer to the siginfo. If it has the expected
256 value, we have an old layout. If it doesn't, we have the new
257 layout.
258
259 For non-RT signals, it's a bit harder. We need something in one
260 layout or the other with a recognizable offset and value. We can't
261 use the return trampoline, because ARM usually uses SA_RESTORER,
262 in which case the stack return trampoline is not filled in.
263 We can't use the saved stack pointer, because sigaltstack might
264 be in use. So for now we guess the new layout... */
265
266 /* There are three words (trap_no, error_code, oldmask) in
267 struct sigcontext before r0. */
268 #define ARM_SIGCONTEXT_R0 0xc
269
270 /* There are five words (uc_flags, uc_link, and three for uc_stack)
271 in the ucontext_t before the sigcontext. */
272 #define ARM_UCONTEXT_SIGCONTEXT 0x14
273
274 /* There are three elements in an rt_sigframe before the ucontext:
275 pinfo, puc, and info. The first two are pointers and the third
276 is a struct siginfo, with size 128 bytes. We could follow puc
277 to the ucontext, but it's simpler to skip the whole thing. */
278 #define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8
279 #define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88
280
281 #define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80
282
283 #define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a
284
285 static void
286 arm_linux_sigreturn_init (const struct tramp_frame *self,
287 struct frame_info *this_frame,
288 struct trad_frame_cache *this_cache,
289 CORE_ADDR func)
290 {
291 struct gdbarch *gdbarch = get_frame_arch (this_frame);
292 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
293 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
294 ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order);
295
296 if (uc_flags == ARM_NEW_SIGFRAME_MAGIC)
297 arm_linux_sigtramp_cache (this_frame, this_cache, func,
298 ARM_UCONTEXT_SIGCONTEXT
299 + ARM_SIGCONTEXT_R0);
300 else
301 arm_linux_sigtramp_cache (this_frame, this_cache, func,
302 ARM_SIGCONTEXT_R0);
303 }
304
305 static void
306 arm_linux_rt_sigreturn_init (const struct tramp_frame *self,
307 struct frame_info *this_frame,
308 struct trad_frame_cache *this_cache,
309 CORE_ADDR func)
310 {
311 struct gdbarch *gdbarch = get_frame_arch (this_frame);
312 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
313 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
314 ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order);
315
316 if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO)
317 arm_linux_sigtramp_cache (this_frame, this_cache, func,
318 ARM_OLD_RT_SIGFRAME_UCONTEXT
319 + ARM_UCONTEXT_SIGCONTEXT
320 + ARM_SIGCONTEXT_R0);
321 else
322 arm_linux_sigtramp_cache (this_frame, this_cache, func,
323 ARM_NEW_RT_SIGFRAME_UCONTEXT
324 + ARM_UCONTEXT_SIGCONTEXT
325 + ARM_SIGCONTEXT_R0);
326 }
327
328 static struct tramp_frame arm_linux_sigreturn_tramp_frame = {
329 SIGTRAMP_FRAME,
330 4,
331 {
332 { ARM_LINUX_SIGRETURN_INSTR, -1 },
333 { TRAMP_SENTINEL_INSN }
334 },
335 arm_linux_sigreturn_init
336 };
337
338 static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = {
339 SIGTRAMP_FRAME,
340 4,
341 {
342 { ARM_LINUX_RT_SIGRETURN_INSTR, -1 },
343 { TRAMP_SENTINEL_INSN }
344 },
345 arm_linux_rt_sigreturn_init
346 };
347
348 static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = {
349 SIGTRAMP_FRAME,
350 4,
351 {
352 { ARM_SET_R7_SIGRETURN, -1 },
353 { ARM_EABI_SYSCALL, -1 },
354 { TRAMP_SENTINEL_INSN }
355 },
356 arm_linux_sigreturn_init
357 };
358
359 static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = {
360 SIGTRAMP_FRAME,
361 4,
362 {
363 { ARM_SET_R7_RT_SIGRETURN, -1 },
364 { ARM_EABI_SYSCALL, -1 },
365 { TRAMP_SENTINEL_INSN }
366 },
367 arm_linux_rt_sigreturn_init
368 };
369
370 /* Core file and register set support. */
371
372 #define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE)
373
374 void
375 arm_linux_supply_gregset (const struct regset *regset,
376 struct regcache *regcache,
377 int regnum, const void *gregs_buf, size_t len)
378 {
379 struct gdbarch *gdbarch = get_regcache_arch (regcache);
380 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
381 const gdb_byte *gregs = gregs_buf;
382 int regno;
383 CORE_ADDR reg_pc;
384 gdb_byte pc_buf[INT_REGISTER_SIZE];
385
386 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
387 if (regnum == -1 || regnum == regno)
388 regcache_raw_supply (regcache, regno,
389 gregs + INT_REGISTER_SIZE * regno);
390
391 if (regnum == ARM_PS_REGNUM || regnum == -1)
392 {
393 if (arm_apcs_32)
394 regcache_raw_supply (regcache, ARM_PS_REGNUM,
395 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
396 else
397 regcache_raw_supply (regcache, ARM_PS_REGNUM,
398 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
399 }
400
401 if (regnum == ARM_PC_REGNUM || regnum == -1)
402 {
403 reg_pc = extract_unsigned_integer (gregs
404 + INT_REGISTER_SIZE * ARM_PC_REGNUM,
405 INT_REGISTER_SIZE, byte_order);
406 reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
407 store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc);
408 regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf);
409 }
410 }
411
412 void
413 arm_linux_collect_gregset (const struct regset *regset,
414 const struct regcache *regcache,
415 int regnum, void *gregs_buf, size_t len)
416 {
417 gdb_byte *gregs = gregs_buf;
418 int regno;
419
420 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
421 if (regnum == -1 || regnum == regno)
422 regcache_raw_collect (regcache, regno,
423 gregs + INT_REGISTER_SIZE * regno);
424
425 if (regnum == ARM_PS_REGNUM || regnum == -1)
426 {
427 if (arm_apcs_32)
428 regcache_raw_collect (regcache, ARM_PS_REGNUM,
429 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
430 else
431 regcache_raw_collect (regcache, ARM_PS_REGNUM,
432 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
433 }
434
435 if (regnum == ARM_PC_REGNUM || regnum == -1)
436 regcache_raw_collect (regcache, ARM_PC_REGNUM,
437 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
438 }
439
440 /* Support for register format used by the NWFPE FPA emulator. */
441
442 #define typeNone 0x00
443 #define typeSingle 0x01
444 #define typeDouble 0x02
445 #define typeExtended 0x03
446
447 void
448 supply_nwfpe_register (struct regcache *regcache, int regno,
449 const gdb_byte *regs)
450 {
451 const gdb_byte *reg_data;
452 gdb_byte reg_tag;
453 gdb_byte buf[FP_REGISTER_SIZE];
454
455 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
456 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
457 memset (buf, 0, FP_REGISTER_SIZE);
458
459 switch (reg_tag)
460 {
461 case typeSingle:
462 memcpy (buf, reg_data, 4);
463 break;
464 case typeDouble:
465 memcpy (buf, reg_data + 4, 4);
466 memcpy (buf + 4, reg_data, 4);
467 break;
468 case typeExtended:
469 /* We want sign and exponent, then least significant bits,
470 then most significant. NWFPE does sign, most, least. */
471 memcpy (buf, reg_data, 4);
472 memcpy (buf + 4, reg_data + 8, 4);
473 memcpy (buf + 8, reg_data + 4, 4);
474 break;
475 default:
476 break;
477 }
478
479 regcache_raw_supply (regcache, regno, buf);
480 }
481
482 void
483 collect_nwfpe_register (const struct regcache *regcache, int regno,
484 gdb_byte *regs)
485 {
486 gdb_byte *reg_data;
487 gdb_byte reg_tag;
488 gdb_byte buf[FP_REGISTER_SIZE];
489
490 regcache_raw_collect (regcache, regno, buf);
491
492 /* NOTE drow/2006-06-07: This code uses the tag already in the
493 register buffer. I've preserved that when moving the code
494 from the native file to the target file. But this doesn't
495 always make sense. */
496
497 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
498 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
499
500 switch (reg_tag)
501 {
502 case typeSingle:
503 memcpy (reg_data, buf, 4);
504 break;
505 case typeDouble:
506 memcpy (reg_data, buf + 4, 4);
507 memcpy (reg_data + 4, buf, 4);
508 break;
509 case typeExtended:
510 memcpy (reg_data, buf, 4);
511 memcpy (reg_data + 4, buf + 8, 4);
512 memcpy (reg_data + 8, buf + 4, 4);
513 break;
514 default:
515 break;
516 }
517 }
518
519 void
520 arm_linux_supply_nwfpe (const struct regset *regset,
521 struct regcache *regcache,
522 int regnum, const void *regs_buf, size_t len)
523 {
524 const gdb_byte *regs = regs_buf;
525 int regno;
526
527 if (regnum == ARM_FPS_REGNUM || regnum == -1)
528 regcache_raw_supply (regcache, ARM_FPS_REGNUM,
529 regs + NWFPE_FPSR_OFFSET);
530
531 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
532 if (regnum == -1 || regnum == regno)
533 supply_nwfpe_register (regcache, regno, regs);
534 }
535
536 void
537 arm_linux_collect_nwfpe (const struct regset *regset,
538 const struct regcache *regcache,
539 int regnum, void *regs_buf, size_t len)
540 {
541 gdb_byte *regs = regs_buf;
542 int regno;
543
544 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
545 if (regnum == -1 || regnum == regno)
546 collect_nwfpe_register (regcache, regno, regs);
547
548 if (regnum == ARM_FPS_REGNUM || regnum == -1)
549 regcache_raw_collect (regcache, ARM_FPS_REGNUM,
550 regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM);
551 }
552
553 /* Return the appropriate register set for the core section identified
554 by SECT_NAME and SECT_SIZE. */
555
556 static const struct regset *
557 arm_linux_regset_from_core_section (struct gdbarch *gdbarch,
558 const char *sect_name, size_t sect_size)
559 {
560 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
561
562 if (strcmp (sect_name, ".reg") == 0
563 && sect_size == ARM_LINUX_SIZEOF_GREGSET)
564 {
565 if (tdep->gregset == NULL)
566 tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset,
567 arm_linux_collect_gregset);
568 return tdep->gregset;
569 }
570
571 if (strcmp (sect_name, ".reg2") == 0
572 && sect_size == ARM_LINUX_SIZEOF_NWFPE)
573 {
574 if (tdep->fpregset == NULL)
575 tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe,
576 arm_linux_collect_nwfpe);
577 return tdep->fpregset;
578 }
579
580 return NULL;
581 }
582
583 /* Insert a single step breakpoint at the next executed instruction. */
584
585 static int
586 arm_linux_software_single_step (struct frame_info *frame)
587 {
588 struct gdbarch *gdbarch = get_frame_arch (frame);
589 CORE_ADDR next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
590
591 /* The Linux kernel offers some user-mode helpers in a high page. We can
592 not read this page (as of 2.6.23), and even if we could then we couldn't
593 set breakpoints in it, and even if we could then the atomic operations
594 would fail when interrupted. They are all called as functions and return
595 to the address in LR, so step to there instead. */
596 if (next_pc > 0xffff0000)
597 next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM);
598
599 insert_single_step_breakpoint (gdbarch, next_pc);
600
601 return 1;
602 }
603
604 /* Support for displaced stepping of Linux SVC instructions. */
605
606 static void
607 arm_linux_cleanup_svc (struct gdbarch *gdbarch ATTRIBUTE_UNUSED,
608 struct regcache *regs,
609 struct displaced_step_closure *dsc)
610 {
611 CORE_ADDR from = dsc->insn_addr;
612 ULONGEST apparent_pc;
613 int within_scratch;
614
615 regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc);
616
617 within_scratch = (apparent_pc >= dsc->scratch_base
618 && apparent_pc < (dsc->scratch_base
619 + DISPLACED_MODIFIED_INSNS * 4 + 4));
620
621 if (debug_displaced)
622 {
623 fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after "
624 "SVC step ", (unsigned long) apparent_pc);
625 if (within_scratch)
626 fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n");
627 else
628 fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n");
629 }
630
631 if (within_scratch)
632 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC);
633 }
634
635 static int
636 arm_linux_copy_svc (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to,
637 struct regcache *regs, struct displaced_step_closure *dsc)
638 {
639 CORE_ADDR from = dsc->insn_addr;
640 struct frame_info *frame;
641 unsigned int svc_number = displaced_read_reg (regs, from, 7);
642
643 if (debug_displaced)
644 fprintf_unfiltered (gdb_stdlog, "displaced: copying Linux svc insn %.8lx\n",
645 (unsigned long) insn);
646
647 frame = get_current_frame ();
648
649 /* Is this a sigreturn or rt_sigreturn syscall? Note: these are only useful
650 for EABI. */
651 if (svc_number == 119 || svc_number == 173)
652 {
653 if (get_frame_type (frame) == SIGTRAMP_FRAME)
654 {
655 CORE_ADDR return_to;
656 struct symtab_and_line sal;
657
658 if (debug_displaced)
659 fprintf_unfiltered (gdb_stdlog, "displaced: found "
660 "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n",
661 (unsigned long) get_frame_pc (frame));
662
663 return_to = frame_unwind_caller_pc (frame);
664 if (debug_displaced)
665 fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. "
666 "Setting momentary breakpoint.\n", (unsigned long) return_to);
667
668 gdb_assert (inferior_thread ()->step_resume_breakpoint == NULL);
669
670 sal = find_pc_line (return_to, 0);
671 sal.pc = return_to;
672 sal.section = find_pc_overlay (return_to);
673 sal.explicit_pc = 1;
674
675 frame = get_prev_frame (frame);
676
677 if (frame)
678 {
679 inferior_thread ()->step_resume_breakpoint
680 = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame),
681 bp_step_resume);
682
683 /* We need to make sure we actually insert the momentary
684 breakpoint set above. */
685 insert_breakpoints ();
686 }
687 else if (debug_displaced)
688 fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous "
689 "frame to set momentary breakpoint for "
690 "sigreturn/rt_sigreturn\n");
691 }
692 else if (debug_displaced)
693 fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn "
694 "SVC call not in signal trampoline frame\n");
695 }
696
697 /* Preparation: If we detect sigreturn, set momentary breakpoint at resume
698 location, else nothing.
699 Insn: unmodified svc.
700 Cleanup: if pc lands in scratch space, pc <- insn_addr + 4
701 else leave pc alone. */
702
703 dsc->modinsn[0] = insn;
704
705 dsc->cleanup = &arm_linux_cleanup_svc;
706 /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next
707 instruction. */
708 dsc->wrote_to_pc = 1;
709
710 return 0;
711 }
712
713
714 /* The following two functions implement single-stepping over calls to Linux
715 kernel helper routines, which perform e.g. atomic operations on architecture
716 variants which don't support them natively.
717
718 When this function is called, the PC will be pointing at the kernel helper
719 (at an address inaccessible to GDB), and r14 will point to the return
720 address. Displaced stepping always executes code in the copy area:
721 so, make the copy-area instruction branch back to the kernel helper (the
722 "from" address), and make r14 point to the breakpoint in the copy area. In
723 that way, we regain control once the kernel helper returns, and can clean
724 up appropriately (as if we had just returned from the kernel helper as it
725 would have been called from the non-displaced location). */
726
727 static void
728 cleanup_kernel_helper_return (struct gdbarch *gdbarch ATTRIBUTE_UNUSED,
729 struct regcache *regs,
730 struct displaced_step_closure *dsc)
731 {
732 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC);
733 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC);
734 }
735
736 static void
737 arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from,
738 CORE_ADDR to, struct regcache *regs,
739 struct displaced_step_closure *dsc)
740 {
741 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
742
743 dsc->numinsns = 1;
744 dsc->insn_addr = from;
745 dsc->cleanup = &cleanup_kernel_helper_return;
746 /* Say we wrote to the PC, else cleanup will set PC to the next
747 instruction in the helper, which isn't helpful. */
748 dsc->wrote_to_pc = 1;
749
750 /* Preparation: tmp[0] <- r14
751 r14 <- <scratch space>+4
752 *(<scratch space>+8) <- from
753 Insn: ldr pc, [r14, #4]
754 Cleanup: r14 <- tmp[0], pc <- tmp[0]. */
755
756 dsc->tmp[0] = displaced_read_reg (regs, from, ARM_LR_REGNUM);
757 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4,
758 CANNOT_WRITE_PC);
759 write_memory_unsigned_integer (to + 8, 4, byte_order, from);
760
761 dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */
762 }
763
764 /* Linux-specific displaced step instruction copying function. Detects when
765 the program has stepped into a Linux kernel helper routine (which must be
766 handled as a special case), falling back to arm_displaced_step_copy_insn()
767 if it hasn't. */
768
769 static struct displaced_step_closure *
770 arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch,
771 CORE_ADDR from, CORE_ADDR to,
772 struct regcache *regs)
773 {
774 struct displaced_step_closure *dsc
775 = xmalloc (sizeof (struct displaced_step_closure));
776
777 /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and
778 stop at the return location. */
779 if (from > 0xffff0000)
780 {
781 if (debug_displaced)
782 fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper "
783 "at %.8lx\n", (unsigned long) from);
784
785 arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc);
786 }
787 else
788 {
789 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
790 uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order);
791
792 if (debug_displaced)
793 fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
794 "at %.8lx\n", (unsigned long) insn,
795 (unsigned long) from);
796
797 /* Override the default handling of SVC instructions. */
798 dsc->u.svc.copy_svc_os = arm_linux_copy_svc;
799
800 arm_process_displaced_insn (gdbarch, insn, from, to, regs, dsc);
801 }
802
803 arm_displaced_init_closure (gdbarch, from, to, dsc);
804
805 return dsc;
806 }
807
808 static void
809 arm_linux_init_abi (struct gdbarch_info info,
810 struct gdbarch *gdbarch)
811 {
812 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
813
814 tdep->lowest_pc = 0x8000;
815 if (info.byte_order == BFD_ENDIAN_BIG)
816 {
817 if (tdep->arm_abi == ARM_ABI_AAPCS)
818 tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint;
819 else
820 tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
821 tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint;
822 }
823 else
824 {
825 if (tdep->arm_abi == ARM_ABI_AAPCS)
826 tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint;
827 else
828 tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
829 tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint;
830 }
831 tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
832 tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint);
833
834 if (tdep->fp_model == ARM_FLOAT_AUTO)
835 tdep->fp_model = ARM_FLOAT_FPA;
836
837 tdep->jb_pc = ARM_LINUX_JB_PC;
838 tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
839
840 set_solib_svr4_fetch_link_map_offsets
841 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
842
843 /* Single stepping. */
844 set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step);
845
846 /* Shared library handling. */
847 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
848 set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
849
850 /* Enable TLS support. */
851 set_gdbarch_fetch_tls_load_module_address (gdbarch,
852 svr4_fetch_objfile_link_map);
853
854 tramp_frame_prepend_unwinder (gdbarch,
855 &arm_linux_sigreturn_tramp_frame);
856 tramp_frame_prepend_unwinder (gdbarch,
857 &arm_linux_rt_sigreturn_tramp_frame);
858 tramp_frame_prepend_unwinder (gdbarch,
859 &arm_eabi_linux_sigreturn_tramp_frame);
860 tramp_frame_prepend_unwinder (gdbarch,
861 &arm_eabi_linux_rt_sigreturn_tramp_frame);
862
863 /* Core file support. */
864 set_gdbarch_regset_from_core_section (gdbarch,
865 arm_linux_regset_from_core_section);
866
867 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
868
869 /* Displaced stepping. */
870 set_gdbarch_displaced_step_copy_insn (gdbarch,
871 arm_linux_displaced_step_copy_insn);
872 set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup);
873 set_gdbarch_displaced_step_free_closure (gdbarch,
874 simple_displaced_step_free_closure);
875 set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point);
876 }
877
878 /* Provide a prototype to silence -Wmissing-prototypes. */
879 extern initialize_file_ftype _initialize_arm_linux_tdep;
880
881 void
882 _initialize_arm_linux_tdep (void)
883 {
884 gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
885 arm_linux_init_abi);
886 }
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