gdb/bfin-tdep.c

   1 /* Target-dependent code for Analog Devices Blackfin processor, for GDB.
   2
   3    Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011
   4    Free Software Foundation, Inc.
   5
   6    Contributed by Analog Devices, Inc.
   7
   8    This file is part of GDB.
   9
  10    This program is free software; you can redistribute it and/or modify
  11    it under the terms of the GNU General Public License as published by
  12    the Free Software Foundation; either version 3 of the License, or
  13    (at your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful,
  16    but WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18    GNU General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  22
  23 #include "defs.h"
  24 #include "gdb_string.h"
  25 #include "inferior.h"
  26 #include "gdbcore.h"
  27 #include "arch-utils.h"
  28 #include "regcache.h"
  29 #include "frame.h"
  30 #include "frame-unwind.h"
  31 #include "frame-base.h"
  32 #include "trad-frame.h"
  33 #include "dis-asm.h"
  34 #include "gdb_assert.h"
  35 #include "dwarf2-frame.h"
  36 #include "symtab.h"
  37 #include "elf-bfd.h"
  38 #include "elf/bfin.h"
  39 #include "osabi.h"
  40 #include "infcall.h"
  41 #include "xml-syscall.h"
  42 #include "bfin-tdep.h"
  43
  44 /* Macros used by prologue functions.  */
  45 #define P_LINKAGE                       0xE800
  46 #define P_MINUS_SP1                     0x0140
  47 #define P_MINUS_SP2                     0x05C0
  48 #define P_MINUS_SP3                     0x0540
  49 #define P_MINUS_SP4                     0x04C0
  50 #define P_SP_PLUS                       0x6C06
  51 #define P_P2_LOW                        0xE10A
  52 #define P_P2_HIGH                       0XE14A
  53 #define P_SP_EQ_SP_PLUS_P2              0X5BB2
  54 #define P_SP_EQ_P2_PLUS_SP              0x5B96
  55 #define P_MINUS_MINUS_SP_EQ_RETS        0x0167
  56
  57 /* Macros used for program flow control.  */
  58 /* 16 bit instruction, max  */
  59 #define P_16_BIT_INSR_MAX               0xBFFF
  60 /* 32 bit instruction, min  */
  61 #define P_32_BIT_INSR_MIN               0xC000
  62 /* 32 bit instruction, max  */
  63 #define P_32_BIT_INSR_MAX               0xE801
  64 /* jump (preg), 16-bit, min  */
  65 #define P_JUMP_PREG_MIN                 0x0050
  66 /* jump (preg), 16-bit, max  */
  67 #define P_JUMP_PREG_MAX                 0x0057
  68 /* jump (pc+preg), 16-bit, min  */
  69 #define P_JUMP_PC_PLUS_PREG_MIN         0x0080
  70 /* jump (pc+preg), 16-bit, max  */
  71 #define P_JUMP_PC_PLUS_PREG_MAX         0x0087
  72 /* jump.s pcrel13m2, 16-bit, min  */
  73 #define P_JUMP_S_MIN                    0x2000
  74 /* jump.s pcrel13m2, 16-bit, max  */
  75 #define P_JUMP_S_MAX                    0x2FFF
  76 /* jump.l pcrel25m2, 32-bit, min  */
  77 #define P_JUMP_L_MIN                    0xE200
  78 /* jump.l pcrel25m2, 32-bit, max  */
  79 #define P_JUMP_L_MAX                    0xE2FF
  80 /* conditional jump pcrel11m2, 16-bit, min  */
  81 #define P_IF_CC_JUMP_MIN                0x1800
  82 /* conditional jump pcrel11m2, 16-bit, max  */
  83 #define P_IF_CC_JUMP_MAX                0x1BFF
  84 /* conditional jump(bp) pcrel11m2, 16-bit, min  */
  85 #define P_IF_CC_JUMP_BP_MIN             0x1C00
  86 /* conditional jump(bp) pcrel11m2, 16-bit, max  */
  87 #define P_IF_CC_JUMP_BP_MAX             0x1FFF
  88 /* conditional !jump pcrel11m2, 16-bit, min  */
  89 #define P_IF_NOT_CC_JUMP_MIN            0x1000
  90 /* conditional !jump pcrel11m2, 16-bit, max  */
  91 #define P_IF_NOT_CC_JUMP_MAX            0x13FF
  92 /* conditional jump(bp) pcrel11m2, 16-bit, min  */
  93 #define P_IF_NOT_CC_JUMP_BP_MIN         0x1400
  94 /* conditional jump(bp) pcrel11m2, 16-bit, max  */
  95 #define P_IF_NOT_CC_JUMP_BP_MAX         0x17FF
  96 /* call (preg), 16-bit, min  */
  97 #define P_CALL_PREG_MIN                 0x0060
  98 /* call (preg), 16-bit, max  */
  99 #define P_CALL_PREG_MAX                 0x0067
 100 /* call (pc+preg), 16-bit, min  */
 101 #define P_CALL_PC_PLUS_PREG_MIN         0x0070
 102 /* call (pc+preg), 16-bit, max  */
 103 #define P_CALL_PC_PLUS_PREG_MAX         0x0077
 104 /* call pcrel25m2, 32-bit, min  */
 105 #define P_CALL_MIN                      0xE300
 106 /* call pcrel25m2, 32-bit, max  */
 107 #define P_CALL_MAX                      0xE3FF
 108 /* RTS  */
 109 #define P_RTS                           0x0010
 110 /* MNOP  */
 111 #define P_MNOP                          0xC803
 112 /* EXCPT, 16-bit, min  */
 113 #define P_EXCPT_MIN                     0x00A0
 114 /* EXCPT, 16-bit, max  */
 115 #define P_EXCPT_MAX                     0x00AF
 116 /* multi instruction mask 1, 16-bit  */
 117 #define P_BIT_MULTI_INS_1               0xC000
 118 /* multi instruction mask 2, 16-bit  */
 119 #define P_BIT_MULTI_INS_2               0x0800
 120
 121 /* The maximum bytes we search to skip the prologue.  */
 122 #define UPPER_LIMIT                     40
 123
 124 /* ASTAT bits  */
 125 #define ASTAT_CC_POS                    5
 126 #define ASTAT_CC                        (1 << ASTAT_CC_POS)
 127
 128 /* Initial value: Register names used in BFIN's ISA documentation.  */
 129
 130 static const char * const bfin_register_name_strings[] =
 131 {
 132   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
 133   "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
 134   "i0", "i1", "i2", "i3", "m0", "m1", "m2", "m3",
 135   "b0", "b1", "b2", "b3", "l0", "l1", "l2", "l3",
 136   "a0x", "a0w", "a1x", "a1w", "astat", "rets",
 137   "lc0", "lt0", "lb0", "lc1", "lt1", "lb1", "cycles", "cycles2",
 138   "usp", "seqstat", "syscfg", "reti", "retx", "retn", "rete",
 139   "pc", "cc",
 140 };
 141
 142 #define NUM_BFIN_REGNAMES ARRAY_SIZE (bfin_register_name_strings)
 143
 144
 145 /* In this diagram successive memory locations increase downwards or the
 146    stack grows upwards with negative indices.  (PUSH analogy for stack.)
 147
 148    The top frame is the "frame" of the current function being executed.
 149
 150      +--------------+ SP    -
 151      |  local vars  |       ^
 152      +--------------+       |
 153      |  save regs   |       |
 154      +--------------+ FP    |
 155      |   old FP    -|--    top
 156      +--------------+  |  frame
 157      |    RETS      |  |    |
 158      +--------------+  |    |
 159      |   param 1    |  |    |
 160      |   param 2    |  |    |
 161      |    ...       |  |    V
 162      +--------------+  |    -
 163      |  local vars  |  |    ^
 164      +--------------+  |    |
 165      |  save regs   |  |    |
 166      +--------------+<-     |
 167      |   old FP    -|--   next
 168      +--------------+  |  frame
 169      |    RETS      |  |    |
 170      +--------------+  |    |
 171      |   param 1    |  |    |
 172      |   param 2    |  |    |
 173      |    ...       |  |    V
 174      +--------------+  |    -
 175      |  local vars  |  |    ^
 176      +--------------+  |    |
 177      |  save regs   |  |    |
 178      +--------------+<-  next frame
 179      |   old FP     |       |
 180      +--------------+       |
 181      |    RETS      |       V
 182      +--------------+       -
 183
 184    The frame chain is formed as following:
 185
 186      FP has the topmost frame.
 187      FP + 4 has the previous FP and so on.  */
 188
 189
 190 /* Map from DWARF2 register number to GDB register number.  */
 191
 192 static const int map_gcc_gdb[] =
 193 {
 194   BFIN_R0_REGNUM,
 195   BFIN_R1_REGNUM,
 196   BFIN_R2_REGNUM,
 197   BFIN_R3_REGNUM,
 198   BFIN_R4_REGNUM,
 199   BFIN_R5_REGNUM,
 200   BFIN_R6_REGNUM,
 201   BFIN_R7_REGNUM,
 202   BFIN_P0_REGNUM,
 203   BFIN_P1_REGNUM,
 204   BFIN_P2_REGNUM,
 205   BFIN_P3_REGNUM,
 206   BFIN_P4_REGNUM,
 207   BFIN_P5_REGNUM,
 208   BFIN_SP_REGNUM,
 209   BFIN_FP_REGNUM,
 210   BFIN_I0_REGNUM,
 211   BFIN_I1_REGNUM,
 212   BFIN_I2_REGNUM,
 213   BFIN_I3_REGNUM,
 214   BFIN_B0_REGNUM,
 215   BFIN_B1_REGNUM,
 216   BFIN_B2_REGNUM,
 217   BFIN_B3_REGNUM,
 218   BFIN_L0_REGNUM,
 219   BFIN_L1_REGNUM,
 220   BFIN_L2_REGNUM,
 221   BFIN_L3_REGNUM,
 222   BFIN_M0_REGNUM,
 223   BFIN_M1_REGNUM,
 224   BFIN_M2_REGNUM,
 225   BFIN_M3_REGNUM,
 226   BFIN_A0_DOT_X_REGNUM,
 227   BFIN_A1_DOT_X_REGNUM,
 228   BFIN_CC_REGNUM,
 229   BFIN_RETS_REGNUM,
 230   BFIN_RETI_REGNUM,
 231   BFIN_RETX_REGNUM,
 232   BFIN_RETN_REGNUM,
 233   BFIN_RETE_REGNUM,
 234   BFIN_ASTAT_REGNUM,
 235   BFIN_SEQSTAT_REGNUM,
 236   BFIN_USP_REGNUM,
 237   BFIN_LT0_REGNUM,
 238   BFIN_LT1_REGNUM,
 239   BFIN_LC0_REGNUM,
 240   BFIN_LC1_REGNUM,
 241   BFIN_LB0_REGNUM,
 242   BFIN_LB1_REGNUM
 243 };
 244
 245
 246 struct bfin_frame_cache
 247 {
 248   /* Base address.  */
 249   CORE_ADDR base;
 250   CORE_ADDR sp_offset;
 251   CORE_ADDR pc;
 252   int frameless_pc_value;
 253
 254   /* Saved registers.  */
 255   CORE_ADDR saved_regs[BFIN_NUM_REGS];
 256   CORE_ADDR saved_sp;
 257
 258   /* Stack space reserved for local variables.  */
 259   long locals;
 260 };
 261
 262 /* Allocate and initialize a frame cache.  */
 263
 264 static struct bfin_frame_cache *
 265 bfin_alloc_frame_cache (void)
 266 {
 267   struct bfin_frame_cache *cache;
 268   int i;
 269
 270   cache = FRAME_OBSTACK_ZALLOC (struct bfin_frame_cache);
 271
 272   /* Base address.  */
 273   cache->base = 0;
 274   cache->sp_offset = -4;
 275   cache->pc = 0;
 276   cache->frameless_pc_value = 0;
 277
 278   /* Saved registers.  We initialize these to -1 since zero is a valid
 279      offset (that's where fp is supposed to be stored).  */
 280   for (i = 0; i < BFIN_NUM_REGS; i++)
 281     cache->saved_regs[i] = -1;
 282
 283   /* Frameless until proven otherwise.  */
 284   cache->locals = -1;
 285
 286   return cache;
 287 }
 288
 289 static struct bfin_frame_cache *
 290 bfin_frame_cache (struct frame_info *this_frame, void **this_cache)
 291 {
 292   struct bfin_frame_cache *cache;
 293   int i;
 294
 295   if (*this_cache)
 296     return *this_cache;
 297
 298   cache = bfin_alloc_frame_cache ();
 299   *this_cache = cache;
 300
 301   cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
 302   if (cache->base == 0)
 303     return cache;
 304
 305   /* For normal frames, PC is stored at [FP + 4].  */
 306   cache->saved_regs[BFIN_PC_REGNUM] = 4;
 307   cache->saved_regs[BFIN_FP_REGNUM] = 0;
 308
 309   /* Adjust all the saved registers such that they contain addresses
 310      instead of offsets.  */
 311   for (i = 0; i < BFIN_NUM_REGS; i++)
 312     if (cache->saved_regs[i] != -1)
 313       cache->saved_regs[i] += cache->base;
 314
 315   cache->pc = get_frame_func (this_frame) ;
 316   if (cache->pc == 0 || cache->pc == get_frame_pc (this_frame))
 317     {
 318       /* Either there is no prologue (frameless function) or we are at
 319          the start of a function.  In short we do not have a frame.
 320          PC is stored in rets register.  FP points to previous frame.  */
 321
 322       cache->saved_regs[BFIN_PC_REGNUM] =
 323         get_frame_register_unsigned (this_frame, BFIN_RETS_REGNUM);
 324       cache->frameless_pc_value = 1;
 325       cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
 326       cache->saved_regs[BFIN_FP_REGNUM] = cache->base;
 327       cache->saved_sp = cache->base;
 328     }
 329   else
 330     {
 331       cache->frameless_pc_value = 0;
 332
 333       /* Now that we have the base address for the stack frame we can
 334          calculate the value of SP in the calling frame.  */
 335       cache->saved_sp = cache->base + 8;
 336     }
 337
 338   return cache;
 339 }
 340
 341 static void
 342 bfin_frame_this_id (struct frame_info *this_frame,
 343                     void **this_cache,
 344                     struct frame_id *this_id)
 345 {
 346   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 347
 348   /* This marks the outermost frame.  */
 349   if (cache->base == 0)
 350     return;
 351
 352   /* See the end of bfin_push_dummy_call.  */
 353   *this_id = frame_id_build (cache->base + 8, cache->pc);
 354 }
 355
 356 static struct value *
 357 bfin_frame_prev_register (struct frame_info *this_frame,
 358                           void **this_cache,
 359                           int regnum)
 360 {
 361   struct gdbarch *gdbarch = get_frame_arch (this_frame);
 362   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 363
 364   if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
 365     return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
 366
 367   if (regnum < BFIN_NUM_REGS && cache->saved_regs[regnum] != -1)
 368     return frame_unwind_got_memory (this_frame, regnum,
 369                                     cache->saved_regs[regnum]);
 370
 371   return frame_unwind_got_register (this_frame, regnum, regnum);
 372 }
 373
 374 static const struct frame_unwind bfin_frame_unwind =
 375 {
 376   NORMAL_FRAME,
 377   bfin_frame_this_id,
 378   bfin_frame_prev_register,
 379   NULL,
 380   default_frame_sniffer
 381 };
 382
 383 /* Check for "[--SP] = <reg>;" insns.  These are appear in function
 384    prologues to save misc registers onto the stack.  */
 385
 386 static int
 387 is_minus_minus_sp (int op)
 388 {
 389   op &= 0xFFC0;
 390
 391   if ((op == P_MINUS_SP1) || (op == P_MINUS_SP2)
 392       || (op == P_MINUS_SP3) || (op == P_MINUS_SP4))
 393     return 1;
 394
 395   return 0;
 396 }
 397
 398 /* Skip all the insns that appear in generated function prologues.  */
 399
 400 static CORE_ADDR
 401 bfin_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 402 {
 403   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 404   int op = read_memory_unsigned_integer (pc, 2, byte_order);
 405   CORE_ADDR orig_pc = pc;
 406   int done = 0;
 407
 408   /* The new gcc prologue generates the register saves BEFORE the link
 409      or RETS saving instruction.
 410      So, our job is to stop either at those instructions or some upper
 411      limit saying there is no frame!  */
 412
 413   while (!done)
 414     {
 415       if (is_minus_minus_sp (op))
 416         {
 417           while (is_minus_minus_sp (op))
 418             {
 419               pc += 2;
 420               op = read_memory_unsigned_integer (pc, 2, byte_order);
 421             }
 422
 423           if (op == P_LINKAGE)
 424             pc += 4;
 425
 426           done = 1;
 427         }
 428       else if (op == P_LINKAGE)
 429         {
 430           pc += 4;
 431           done = 1;
 432         }
 433       else if (op == P_MINUS_MINUS_SP_EQ_RETS)
 434         {
 435           pc += 2;
 436           done = 1;
 437         }
 438       else if (op == P_RTS)
 439         {
 440           done = 1;
 441         }
 442       else if ((op >= P_JUMP_PREG_MIN && op <= P_JUMP_PREG_MAX)
 443                || (op >= P_JUMP_PC_PLUS_PREG_MIN
 444                    && op <= P_JUMP_PC_PLUS_PREG_MAX)
 445                || (op == P_JUMP_S_MIN && op <= P_JUMP_S_MAX))
 446         {
 447           done = 1;
 448         }
 449       else if (pc - orig_pc >= UPPER_LIMIT)
 450         {
 451           warning (_("Function Prologue not recognised; "
 452                      "pc will point to ENTRY_POINT of the function"));
 453           pc = orig_pc + 2;
 454           done = 1;
 455         }
 456       else
 457         {
 458           pc += 2; /* Not a terminating instruction go on.  */
 459           op = read_memory_unsigned_integer (pc, 2, byte_order);
 460         }
 461     }
 462
 463    /* TODO:
 464       Dwarf2 uses entry point value AFTER some register initializations.
 465       We should perhaps skip such asssignments as well (R6 = R1, ...).  */
 466
 467   return pc;
 468 }
 469
 470 /* Return the GDB type object for the "standard" data type of data in
 471    register N.  This should be void pointer for P0-P5, SP, FP;
 472    void pointer to function for PC; int otherwise.  */
 473
 474 static struct type *
 475 bfin_register_type (struct gdbarch *gdbarch, int regnum)
 476 {
 477   if ((regnum >= BFIN_P0_REGNUM && regnum <= BFIN_FP_REGNUM)
 478       || regnum == BFIN_USP_REGNUM)
 479     return builtin_type (gdbarch)->builtin_data_ptr;
 480
 481   if (regnum == BFIN_PC_REGNUM || regnum == BFIN_RETS_REGNUM
 482       || regnum == BFIN_RETI_REGNUM || regnum == BFIN_RETX_REGNUM
 483       || regnum == BFIN_RETN_REGNUM || regnum == BFIN_RETE_REGNUM
 484       || regnum == BFIN_LT0_REGNUM || regnum == BFIN_LB0_REGNUM
 485       || regnum == BFIN_LT1_REGNUM || regnum == BFIN_LB1_REGNUM)
 486     return builtin_type (gdbarch)->builtin_func_ptr;
 487
 488   return builtin_type (gdbarch)->builtin_int32;
 489 }
 490
 491 static CORE_ADDR
 492 bfin_push_dummy_call (struct gdbarch *gdbarch,
 493                       struct value *function,
 494                       struct regcache *regcache,
 495                       CORE_ADDR bp_addr,
 496                       int nargs,
 497                       struct value **args,
 498                       CORE_ADDR sp,
 499                       int struct_return,
 500                       CORE_ADDR struct_addr)
 501 {
 502   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 503   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 504   char buf[4];
 505   int i;
 506   long reg_r0, reg_r1, reg_r2;
 507   int total_len = 0;
 508   enum bfin_abi abi = bfin_abi (gdbarch);
 509   CORE_ADDR func_addr = find_function_addr (function, NULL);
 510
 511   for (i = nargs - 1; i >= 0; i--)
 512     {
 513       struct type *value_type = value_enclosing_type (args[i]);
 514       int len = TYPE_LENGTH (value_type);
 515
 516       total_len += (len + 3) & ~3;
 517     }
 518
 519   /* At least twelve bytes of stack space must be allocated for the function's
 520      arguments, even for functions that have less than 12 bytes of argument
 521      data.  */
 522
 523   if (total_len < 12)
 524     sp -= 12 - total_len;
 525
 526   /* Push arguments in reverse order.  */
 527
 528   for (i = nargs - 1; i >= 0; i--)
 529     {
 530       struct type *value_type = value_enclosing_type (args[i]);
 531       struct type *arg_type = check_typedef (value_type);
 532       int len = TYPE_LENGTH (value_type);
 533       int container_len = (len + 3) & ~3;
 534
 535       sp -= container_len;
 536       write_memory (sp, value_contents_writeable (args[i]), container_len);
 537     }
 538
 539   /* Initialize R0, R1, and R2 to the first 3 words of parameters.  */
 540
 541   reg_r0 = read_memory_integer (sp, 4, byte_order);
 542   regcache_cooked_write_unsigned (regcache, BFIN_R0_REGNUM, reg_r0);
 543   reg_r1 = read_memory_integer (sp + 4, 4, byte_order);
 544   regcache_cooked_write_unsigned (regcache, BFIN_R1_REGNUM, reg_r1);
 545   reg_r2 = read_memory_integer (sp + 8, 4, byte_order);
 546   regcache_cooked_write_unsigned (regcache, BFIN_R2_REGNUM, reg_r2);
 547
 548   /* Store struct value address.  */
 549
 550   if (struct_return)
 551     regcache_cooked_write_unsigned (regcache, BFIN_P0_REGNUM, struct_addr);
 552
 553   /* Set the dummy return value to bp_addr.
 554      A dummy breakpoint will be setup to execute the call.  */
 555
 556   regcache_cooked_write_unsigned (regcache, BFIN_RETS_REGNUM, bp_addr);
 557
 558   /* Finally, update the stack pointer.  */
 559
 560   regcache_cooked_write_unsigned (regcache, BFIN_SP_REGNUM, sp);
 561
 562   return sp;
 563 }
 564
 565 /* Convert DWARF2 register number REG to the appropriate register number
 566    used by GDB.  */
 567
 568 static int
 569 bfin_reg_to_regnum (struct gdbarch *gdbarch, int reg)
 570 {
 571   if (reg > ARRAY_SIZE (map_gcc_gdb))
 572     return 0;
 573
 574   return map_gcc_gdb[reg];
 575 }
 576
 577 /* This function implements the BREAKPOINT_FROM_PC macro.  It returns
 578    a pointer to a string of bytes that encode a breakpoint instruction,
 579    stores the length of the string to *lenptr, and adjusts the program
 580    counter (if necessary) to point to the actual memory location where
 581    the breakpoint should be inserted.  */
 582
 583 static const unsigned char *
 584 bfin_breakpoint_from_pc (struct gdbarch *gdbarch,
 585                          CORE_ADDR *pcptr, int *lenptr)
 586 {
 587   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 588   unsigned short iw;
 589   static unsigned char bfin_breakpoint[] = {0xa1, 0x00, 0x00, 0x00};
 590   static unsigned char bfin_sim_breakpoint[] = {0x25, 0x00, 0x00, 0x00};
 591
 592   iw = read_memory_unsigned_integer (*pcptr, 2, byte_order);
 593
 594   if ((iw & 0xf000) >= 0xc000)
 595     /* 32-bit instruction.  */
 596     *lenptr = 4;
 597   else
 598     *lenptr = 2;
 599
 600   if (strcmp (target_shortname, "sim") == 0)
 601     return bfin_sim_breakpoint;
 602   else
 603     return bfin_breakpoint;
 604 }
 605
 606 static void
 607 bfin_extract_return_value (struct type *type,
 608                            struct regcache *regs,
 609                            gdb_byte *dst)
 610 {
 611   struct gdbarch *gdbarch = get_regcache_arch (regs);
 612   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 613   bfd_byte *valbuf = dst;
 614   int len = TYPE_LENGTH (type);
 615   ULONGEST tmp;
 616   int regno = BFIN_R0_REGNUM;
 617
 618   gdb_assert (len <= 8);
 619
 620   while (len > 0)
 621     {
 622       regcache_cooked_read_unsigned (regs, regno++, &tmp);
 623       store_unsigned_integer (valbuf, (len > 4 ? 4 : len), tmp, byte_order);
 624       len -= 4;
 625       valbuf += 4;
 626     }
 627 }
 628
 629 /* Write into appropriate registers a function return value of type
 630    TYPE, given in virtual format.  */
 631
 632 static void
 633 bfin_store_return_value (struct type *type,
 634                          struct regcache *regs,
 635                          const gdb_byte *src)
 636 {
 637   const bfd_byte *valbuf = src;
 638
 639   /* Integral values greater than one word are stored in consecutive
 640      registers starting with R0.  This will always be a multiple of
 641      the register size.  */
 642
 643   int len = TYPE_LENGTH (type);
 644   int regno = BFIN_R0_REGNUM;
 645
 646   gdb_assert (len <= 8);
 647
 648   while (len > 0)
 649     {
 650       regcache_cooked_write (regs, regno++, valbuf);
 651       len -= 4;
 652       valbuf += 4;
 653     }
 654 }
 655
 656 /* Determine, for architecture GDBARCH, how a return value of TYPE
 657    should be returned.  If it is supposed to be returned in registers,
 658    and READBUF is nonzero, read the appropriate value from REGCACHE,
 659    and copy it into READBUF.  If WRITEBUF is nonzero, write the value
 660    from WRITEBUF into REGCACHE.  */
 661
 662 static enum return_value_convention
 663 bfin_return_value (struct gdbarch *gdbarch,
 664                    struct type *func_type,
 665                    struct type *type,
 666                    struct regcache *regcache,
 667                    gdb_byte *readbuf,
 668                    const gdb_byte *writebuf)
 669 {
 670   if (TYPE_LENGTH (type) > 8)
 671     return RETURN_VALUE_STRUCT_CONVENTION;
 672
 673   if (readbuf)
 674     bfin_extract_return_value (type, regcache, readbuf);
 675
 676   if (writebuf)
 677     bfin_store_return_value (type, regcache, writebuf);
 678
 679   return RETURN_VALUE_REGISTER_CONVENTION;
 680 }
 681
 682 /* Return the BFIN register name corresponding to register I.  */
 683
 684 static const char *
 685 bfin_register_name (struct gdbarch *gdbarch, int i)
 686 {
 687   return bfin_register_name_strings[i];
 688 }
 689
 690 static void
 691 bfin_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
 692                            int regnum, gdb_byte *buffer)
 693 {
 694   gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
 695
 696   if (regnum != BFIN_CC_REGNUM)
 697     internal_error (__FILE__, __LINE__,
 698                     _("invalid register number %d"), regnum);
 699
 700   /* Extract the CC bit from the ASTAT register.  */
 701   regcache_raw_read (regcache, BFIN_ASTAT_REGNUM, buf);
 702   buffer[1] = buffer[2] = buffer[3] = 0;
 703   buffer[0] = !!(buf[0] & ASTAT_CC);
 704 }
 705
 706 static void
 707 bfin_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
 708                             int regnum, const gdb_byte *buffer)
 709 {
 710   gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
 711
 712   if (regnum != BFIN_CC_REGNUM)
 713     internal_error (__FILE__, __LINE__,
 714                     _("invalid register number %d"), regnum);
 715
 716   /* Overlay the CC bit in the ASTAT register.  */
 717   regcache_raw_read (regcache, BFIN_ASTAT_REGNUM, buf);
 718   buf[0] = (buf[0] & ~ASTAT_CC) | ((buffer[0] & 1) << ASTAT_CC_POS);
 719   regcache_raw_write (regcache, BFIN_ASTAT_REGNUM, buf);
 720 }
 721
 722 static CORE_ADDR
 723 bfin_frame_base_address (struct frame_info *this_frame, void **this_cache)
 724 {
 725   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 726
 727   return cache->base;
 728 }
 729
 730 static CORE_ADDR
 731 bfin_frame_local_address (struct frame_info *this_frame, void **this_cache)
 732 {
 733   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 734
 735   return cache->base - 4;
 736 }
 737
 738 static CORE_ADDR
 739 bfin_frame_args_address (struct frame_info *this_frame, void **this_cache)
 740 {
 741   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 742
 743   return cache->base + 8;
 744 }
 745
 746 static const struct frame_base bfin_frame_base =
 747 {
 748   &bfin_frame_unwind,
 749   bfin_frame_base_address,
 750   bfin_frame_local_address,
 751   bfin_frame_args_address
 752 };
 753
 754 static struct frame_id
 755 bfin_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
 756 {
 757   CORE_ADDR sp;
 758
 759   sp = get_frame_register_unsigned (this_frame, BFIN_SP_REGNUM);
 760
 761   return frame_id_build (sp, get_frame_pc (this_frame));
 762 }
 763
 764 static CORE_ADDR
 765 bfin_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
 766 {
 767   return frame_unwind_register_unsigned (next_frame, BFIN_PC_REGNUM);
 768 }
 769
 770 static CORE_ADDR
 771 bfin_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
 772 {
 773   return (address & ~0x3);
 774 }
 775
 776 enum bfin_abi
 777 bfin_abi (struct gdbarch *gdbarch)
 778 {
 779   return gdbarch_tdep (gdbarch)->bfin_abi;
 780 }
 781
 782 /* Initialize the current architecture based on INFO.  If possible,
 783    re-use an architecture from ARCHES, which is a list of
 784    architectures already created during this debugging session.
 785
 786    Called e.g. at program startup, when reading a core file, and when
 787    reading a binary file.  */
 788
 789 static struct gdbarch *
 790 bfin_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 791 {
 792   struct gdbarch_tdep *tdep;
 793   struct gdbarch *gdbarch;
 794   int elf_flags;
 795   enum bfin_abi abi;
 796
 797   /* Extract the ELF flags, if available.  */
 798   if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
 799     elf_flags = elf_elfheader (info.abfd)->e_flags;
 800   else
 801     elf_flags = 0;
 802
 803   abi = BFIN_ABI_FLAT;
 804
 805   /* If there is already a candidate, use it.  */
 806
 807   for (arches = gdbarch_list_lookup_by_info (arches, &info);
 808        arches != NULL;
 809        arches = gdbarch_list_lookup_by_info (arches->next, &info))
 810     {
 811       if (gdbarch_tdep (arches->gdbarch)->bfin_abi != abi)
 812         continue;
 813       return arches->gdbarch;
 814     }
 815
 816   tdep = XMALLOC (struct gdbarch_tdep);
 817   gdbarch = gdbarch_alloc (&info, tdep);
 818
 819   tdep->bfin_abi = abi;
 820
 821   set_gdbarch_num_regs (gdbarch, BFIN_NUM_REGS);
 822   set_gdbarch_pseudo_register_read (gdbarch, bfin_pseudo_register_read);
 823   set_gdbarch_pseudo_register_write (gdbarch, bfin_pseudo_register_write);
 824   set_gdbarch_num_pseudo_regs (gdbarch, BFIN_NUM_PSEUDO_REGS);
 825   set_gdbarch_sp_regnum (gdbarch, BFIN_SP_REGNUM);
 826   set_gdbarch_pc_regnum (gdbarch, BFIN_PC_REGNUM);
 827   set_gdbarch_ps_regnum (gdbarch, BFIN_ASTAT_REGNUM);
 828   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, bfin_reg_to_regnum);
 829   set_gdbarch_register_name (gdbarch, bfin_register_name);
 830   set_gdbarch_register_type (gdbarch, bfin_register_type);
 831   set_gdbarch_dummy_id (gdbarch, bfin_dummy_id);
 832   set_gdbarch_push_dummy_call (gdbarch, bfin_push_dummy_call);
 833   set_gdbarch_believe_pcc_promotion (gdbarch, 1);
 834   set_gdbarch_return_value (gdbarch, bfin_return_value);
 835   set_gdbarch_skip_prologue (gdbarch, bfin_skip_prologue);
 836   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
 837   set_gdbarch_breakpoint_from_pc (gdbarch, bfin_breakpoint_from_pc);
 838   set_gdbarch_decr_pc_after_break (gdbarch, 2);
 839   set_gdbarch_frame_args_skip (gdbarch, 8);
 840   set_gdbarch_unwind_pc (gdbarch, bfin_unwind_pc);
 841   set_gdbarch_frame_align (gdbarch, bfin_frame_align);
 842   set_gdbarch_print_insn (gdbarch, print_insn_bfin);
 843
 844   /* Hook in ABI-specific overrides, if they have been registered.  */
 845   gdbarch_init_osabi (info, gdbarch);
 846
 847   dwarf2_append_unwinders (gdbarch);
 848
 849   frame_base_set_default (gdbarch, &bfin_frame_base);
 850
 851   frame_unwind_append_unwinder (gdbarch, &bfin_frame_unwind);
 852
 853   return gdbarch;
 854 }
 855
 856 /* Provide a prototype to silence -Wmissing-prototypes.  */
 857 extern initialize_file_ftype _initialize_bfin_tdep;
 858
 859 void
 860 _initialize_bfin_tdep (void)
 861 {
 862   register_gdbarch_init (bfd_arch_bfin, bfin_gdbarch_init);
 863 }